diff --git a/.gitignore b/.gitignore
index 8b13789..30023e6 100644
--- a/.gitignore
+++ b/.gitignore
@@ -1 +1,2 @@
+build/
diff --git a/.mxproject b/.mxproject
deleted file mode 100644
index d29b12c..0000000
--- a/.mxproject
+++ /dev/null
@@ -1,27 +0,0 @@
-[PreviousLibFiles]
-LibFiles=Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_mmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Middlewares/Third_Party/FatFs/src/diskio.h;Middlewares/Third_Party/FatFs/src/ff.h;Middlewares/Third_Party/FatFs/src/ff_gen_drv.h;Middlewares/Third_Party/FatFs/src/integer.h;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_mmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_adc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dmamux.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_mmc.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h;Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h;Middlewares/Third_Party/FatFs/src/diskio.h;Middlewares/Third_Party/FatFs/src/ff.h;Middlewares/Third_Party/FatFs/src/ff_gen_drv.h;Middlewares/Third_Party/FatFs/src/integer.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;
-
-[PreviousUsedKeilFiles]
-SourceFiles=..\Src\main.c;..\Src\bsp_driver_sd.c;..\Src\sd_diskio.c;..\Src\fatfs.c;..\Src\fatfs_platform.c;..\Src\stm32f7xx_it.c;..\Src\stm32f7xx_hal_msp.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_adc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_adc_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_rcc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_rcc_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_flash.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_flash_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_gpio.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_dma.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_dma_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_pwr.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_pwr_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_cortex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_i2c.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_i2c_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_exti.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_rcc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_utils.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_exti.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_gpio.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_dma.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_sdmmc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_sd.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_spi.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_tim.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_tim_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_tim.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_usart.c;..\Middlewares\Third_Party\FatFs\src\diskio.c;..\Middlewares\Third_Party\FatFs\src\ff.c;..\Middlewares\Third_Party\FatFs\src\ff_gen_drv.c;..\Middlewares\Third_Party\FatFs\src\option\syscall.c;..\Drivers\CMSIS\Device\ST\STM32F7xx\Source\Templates\system_stm32f7xx.c;..\\Src\system_stm32f7xx.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_adc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_adc_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_rcc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_rcc_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_flash.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_flash_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_gpio.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_dma.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_dma_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_pwr.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_pwr_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_cortex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_i2c.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_i2c_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_exti.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_rcc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_utils.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_exti.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_gpio.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_dma.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_sdmmc.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_sd.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_spi.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_tim.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_hal_tim_ex.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_tim.c;..\Drivers\STM32F7xx_HAL_Driver\Src\stm32f7xx_ll_usart.c;..\Middlewares\Third_Party\FatFs\src\diskio.c;..\Middlewares\Third_Party\FatFs\src\ff.c;..\Middlewares\Third_Party\FatFs\src\ff_gen_drv.c;..\Middlewares\Third_Party\FatFs\src\option\syscall.c;..\Drivers\CMSIS\Device\ST\STM32F7xx\Source\Templates\system_stm32f7xx.c;..\\Src\system_stm32f7xx.c;;;..\Middlewares\Third_Party\FatFs\src\diskio.c;..\Middlewares\Third_Party\FatFs\src\ff.c;..\Middlewares\Third_Party\FatFs\src\ff_gen_drv.c;..\Middlewares\Third_Party\FatFs\src\option\syscall.c;
-HeaderPath=..\Drivers\STM32F7xx_HAL_Driver\Inc;..\Drivers\STM32F7xx_HAL_Driver\Inc\Legacy;..\Middlewares\Third_Party\FatFs\src;..\Drivers\CMSIS\Device\ST\STM32F7xx\Include;..\Drivers\CMSIS\Include;..\Inc;
-CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32F767xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
-[PreviousUsedMakefileFiles]
-SourceFiles=Src/main.c;Src/bsp_driver_sd.c;Src/sd_diskio.c;Src/fatfs.c;Src/fatfs_platform.c;Src/stm32f7xx_it.c;Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Src/system_stm32f7xx.c;;;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;
-HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy;Middlewares/Third_Party/FatFs/src;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32F767xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
-[PreviousUsedCubeIDEFiles]
-SourceFiles=Src/main.c;Src/bsp_driver_sd.c;Src/sd_diskio.c;Src/fatfs.c;Src/fatfs_platform.c;Src/stm32f7xx_it.c;Src/stm32f7xx_hal_msp.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Src/system_stm32f7xx.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c;Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/system_stm32f7xx.c;Src/system_stm32f7xx.c;;;Middlewares/Third_Party/FatFs/src/diskio.c;Middlewares/Third_Party/FatFs/src/ff.c;Middlewares/Third_Party/FatFs/src/ff_gen_drv.c;Middlewares/Third_Party/FatFs/src/option/syscall.c;
-HeaderPath=Drivers/STM32F7xx_HAL_Driver/Inc;Drivers/STM32F7xx_HAL_Driver/Inc/Legacy;Middlewares/Third_Party/FatFs/src;Drivers/CMSIS/Device/ST/STM32F7xx/Include;Drivers/CMSIS/Include;Inc;
-CDefines=USE_FULL_LL_DRIVER;USE_HAL_DRIVER;STM32F767xx;USE_FULL_LL_DRIVER;USE_HAL_DRIVER;USE_HAL_DRIVER;
-
-[]
-SourceFiles=;;
-
-[PreviousGenFiles]
-HeaderPath=../Inc
-HeaderFiles=ffconf.h;bsp_driver_sd.h;sd_diskio.h;fatfs.h;fatfs_platform.h;stm32f7xx_it.h;stm32_assert.h;stm32f7xx_hal_conf.h;main.h;
-SourcePath=../Src
-SourceFiles=bsp_driver_sd.c;sd_diskio.c;fatfs.c;fatfs_platform.c;stm32f7xx_it.c;stm32f7xx_hal_msp.c;main.c;
-
diff --git a/.project b/.project
deleted file mode 100644
index 6e67db5..0000000
--- a/.project
+++ /dev/null
@@ -1,11 +0,0 @@
-
-
- RadioPhotonic_PCB_software
-
-
-
-
-
-
-
-
diff --git a/.project.bak b/.project.bak
deleted file mode 100644
index a430205..0000000
--- a/.project.bak
+++ /dev/null
@@ -1,11 +0,0 @@
-
-
- For_stm32_2023_12_08
-
-
-
-
-
-
-
-
diff --git a/App/Core/app_core.c b/App/Core/app_core.c
new file mode 100644
index 0000000..9132805
--- /dev/null
+++ b/App/Core/app_core.c
@@ -0,0 +1,1416 @@
+/**
+ * @file app_core.c
+ * @brief Top-level application runtime and IRQ entry points.
+ *
+ * Architectural note:
+ * This module owns the application state machine, boot policy, command
+ * dispatch, and integration of services/devices. The CubeMX-generated files
+ * only initialise hardware and forward interrupts into this module.
+ */
+
+#include "app_core.h"
+
+#include
+#include
+#include
+
+#include "app_uart_protocol.h"
+#include "ad9102_device.h"
+#include "ad9833_device.h"
+#include "adc_mux.h"
+#include "board_handles.h"
+#include "board_io.h"
+#include "ds1809_device.h"
+#include "laser_dac.h"
+#include "profile_repository.h"
+#include "profile_storage.h"
+#include "storage_sd.h"
+#include "stm32_dac_output.h"
+#include "telemetry.h"
+#include "temperature_control.h"
+#include "uart_transport.h"
+#include "ui_status.h"
+
+#define APP_DEFAULT_PID_P 10.0f
+#define APP_DEFAULT_PID_I 0.01f
+#define APP_TEC_PRECHARGE_CODE 32767u
+#define APP_UART_TIMEOUT_TICKS_10MS 100u
+#define APP_STATUS_BYTE_COUNT 2u
+#define APP_CUSTOM_WAVE_BUFFER_SIZE 1024u
+
+/*
+ * Boot-diagnostic codes exposed through QUERY_STATE (0x6666).
+ * Status byte 0 keeps the existing error-bitmask semantics.
+ * Status byte 1 reports the most recent standalone SD-boot outcome.
+ */
+#define APP_BOOT_DIAG_NONE 0x00u
+#define APP_BOOT_DIAG_STARTED 0x01u
+#define APP_BOOT_DIAG_NO_SD_CARD 0x02u
+#define APP_BOOT_DIAG_SD_FILESYSTEM_ERROR 0x03u
+#define APP_BOOT_DIAG_PROFILE_INDEX_MISSING 0x04u
+#define APP_BOOT_DIAG_PROFILE_LOAD_FAILED 0x05u
+#define APP_BOOT_DIAG_BOOT_DISABLED 0x06u
+#define APP_BOOT_DIAG_PROFILE_APPLY_FAILED 0x07u
+#define APP_BOOT_DIAG_PROFILE_READY_IDLE 0x08u
+#define APP_BOOT_DIAG_PROFILE_RUNNING 0x09u
+
+typedef struct app_context_t {
+ /* Written by TIM6 IRQ. Read by telemetry and UART timeout logic. Purpose: coarse 10 ms system timebase. */
+ volatile uint32_t tick_10ms;
+
+ /* Written by TIM7 IRQ. Read by PID and mode-processing loops. Purpose: fine 1 ms runtime timebase. */
+ volatile uint32_t tick_1ms;
+
+ /* Written when the first UART byte arrives. Read by timeout logic. Purpose: detect stalled packet reception. */
+ volatile uint32_t uart_rx_start_tick_10ms;
+
+ /* Written by app_post_event() or future UI/button glue. Read by app_handle_pending_event(). Purpose: deferred main-loop event slot. */
+ volatile app_event_t pending_event;
+
+ /* Written after each processed live-sample cycle. Read by the WORK loop. Purpose: avoid processing the same 1 ms tick twice. */
+ uint32_t last_processed_tick_1ms;
+
+ /* Written by temperature_control_compute_pid(). Read and passed back into the same PID helper. Purpose: shared timestamp anchor for both PID channels. */
+ uint32_t pid_reference_tick_1ms;
+
+ /* Written by app_run_once() and reset helpers. Read by app_run_once(). Purpose: remember whether UART RX IRQ has already been enabled. */
+ uint8_t uart_rx_enabled;
+
+ /* Written by error handlers and AD9102 packet handlers. Read by app_flush_tx_request(). Purpose: compact two-byte host status reply. */
+ uint8_t status_bytes[APP_STATUS_BYTE_COUNT];
+
+ /* Written by standalone SD-boot helpers. Read when QUERY_STATE snapshots boot diagnostics. Purpose: persistent last boot outcome code. */
+ uint8_t boot_diag_code;
+
+ /* Written by telemetry_to_bytes(). Read by uart_transport_send_dma(). Purpose: byte-oriented DMA snapshot of the current telemetry frame. */
+ uint8_t tx_buffer[APP_TELEMETRY_FRAME_BYTES];
+
+ /* Written by packet handlers, boot/profile activation, and error paths. Read by app_run_once(). Purpose: top-level application state. */
+ app_mode_t mode;
+
+ /* Written before entering transient modes and steady-state processors. Read when a transient mode completes. Purpose: "return to previous mode" marker. */
+ app_mode_t resume_mode;
+
+ /* Written by response-preparation logic. Read and cleared by app_flush_tx_request(). Purpose: deferred transmit action selector. */
+ app_tx_request_t tx_request;
+
+ /* Written by app_uart_protocol_feed_byte() and reset helpers. Read by UART IRQ path and timeout logic. Purpose: incremental UART parser state. */
+ app_uart_protocol_parser_t parser;
+
+ /* Written by app_capture_live_frame() and telemetry helpers. Read by telemetry finalisation/serialisation. Purpose: canonical structured telemetry snapshot. */
+ telemetry_frame_t telemetry;
+
+ /* Written by host work packets and profile activation. Read by board-apply and telemetry code. Purpose: desired board-level operating configuration. */
+ work_config_t work_config;
+
+ /* Written once during initialisation. Read by idle/reset paths. Purpose: safe zeroed fallback board configuration. */
+ work_config_t default_work_config;
+
+ /* Written by host work packets, profile activation, and default-PID fallback logic. Read by PID and laser-current writes. Purpose: desired settings for both laser channels. */
+ laser_channel_config_t laser_config[2];
+
+ /* Written once during initialisation. Read by idle/reset paths. Purpose: safe zeroed fallback channel configuration. */
+ laser_channel_config_t default_laser_config[2];
+
+ /* Written by ADC sampling and PID helpers. Read by telemetry and PID logic. Purpose: measured live state for both laser channels. */
+ laser_runtime_t laser_runtime[2];
+
+ /* Written when a profile is activated. Read mainly for future profile cycling/debug visibility. Purpose: snapshot of the currently selected standalone profile. */
+ profile_t active_profile;
+
+ /* Written when a profile is activated or cleared. Read when switching to the next profile. Purpose: current index within profiles.csv. */
+ uint16_t active_profile_index;
+
+ /* Written when entering manual host mode or profile mode. Read by profile-switching logic. Purpose: tell whether runtime state currently originates from a profile. */
+ bool has_active_profile;
+} app_context_t;
+
+/* Singleton runtime context owned by App/Core. No other module mutates it directly. */
+static app_context_t g_app;
+
+static void app_initialise_default_configuration(void);
+static void app_clear_active_profile(void);
+static void app_reset_runtime_state(bool reset_ticks);
+static void app_reset_uart_parser(void);
+static void app_set_mode(app_mode_t mode);
+static void app_apply_work_config_to_board(void);
+static void app_enter_idle_state(bool reset_ticks);
+static void app_prepare_status_response(void);
+static void app_capture_live_frame(bool update_temperature_loops, bool drive_laser_currents);
+static void app_decode_work_packet(const uint16_t *packet_words);
+static void app_set_error(uint8_t error_flag);
+static void app_set_boot_diag(uint8_t boot_diag_code);
+static void app_request_transient_mode(app_mode_t transient_mode);
+static bool app_activate_profile(const profile_t *profile, uint16_t index, bool allow_auto_run);
+static bool app_handle_profile_boot(void);
+static bool app_apply_waveform_config(const waveform_config_t *waveform);
+static void app_apply_profile_auxiliary_outputs(const profile_t *profile);
+static bool app_load_custom_waveform_from_file(const char *path);
+static void app_handle_packet(const app_packet_t *packet);
+static void app_handle_work_config_packet(const app_packet_t *packet);
+static void app_handle_profile_save_control_packet(const app_packet_t *packet);
+static void app_handle_ad9102_control_packet(const app_packet_t *packet);
+static void app_handle_ad9833_control_packet(const app_packet_t *packet);
+static void app_handle_ds1809_control_packet(const app_packet_t *packet);
+static void app_handle_stm32_dac_control_packet(const app_packet_t *packet);
+static void app_handle_ad9102_wave_control_packet(const app_packet_t *packet);
+static void app_handle_ad9102_wave_data_packet(const app_packet_t *packet);
+static void app_handle_profile_save_data_packet(const app_packet_t *packet);
+static void app_process_work_mode(void);
+static void app_flush_tx_request(void);
+static void app_check_uart_timeout(void);
+static void app_handle_pending_event(void);
+static void app_ensure_uart_rx_enabled(void);
+static bool app_decode_profile_name(const uint16_t *packet_words,
+ uint16_t name_length,
+ char *out_name,
+ size_t out_name_size);
+static void app_unpack_profile_chunk_bytes(const uint16_t *packet_words, uint8_t *out_bytes);
+static void app_apply_profile_storage_error(profile_storage_status_t status);
+
+static void app_initialise_default_configuration(void)
+{
+ memset(&g_app.default_work_config, 0, sizeof(g_app.default_work_config));
+ memset(&g_app.default_laser_config, 0, sizeof(g_app.default_laser_config));
+}
+
+static void app_clear_active_profile(void)
+{
+ memset(&g_app.active_profile, 0, sizeof(g_app.active_profile));
+ g_app.has_active_profile = false;
+ g_app.active_profile_index = 0u;
+ ui_status_set_profile_name(NULL);
+}
+
+static void app_reset_runtime_state(bool reset_ticks)
+{
+ g_app.status_bytes[0] = 0u;
+ g_app.status_bytes[1] = 0u;
+ g_app.tx_request = APP_TX_REQUEST_NONE;
+ g_app.uart_rx_enabled = 0u;
+ g_app.pid_reference_tick_1ms = 0u;
+ g_app.last_processed_tick_1ms = 0u;
+ g_app.pending_event = APP_EVENT_NONE;
+ memset(&g_app.laser_runtime, 0, sizeof(g_app.laser_runtime));
+ app_clear_active_profile();
+ ui_status_set_error(0u);
+
+ telemetry_reset(&g_app.telemetry);
+ app_uart_protocol_reset(&g_app.parser);
+ uart_transport_reset();
+
+ if (reset_ticks)
+ {
+ g_app.tick_10ms = 0u;
+ g_app.tick_1ms = 0u;
+ g_app.uart_rx_start_tick_10ms = 0u;
+ }
+}
+
+static void app_reset_uart_parser(void)
+{
+ app_uart_protocol_reset(&g_app.parser);
+ g_app.uart_rx_start_tick_10ms = g_app.tick_10ms;
+}
+
+static void app_set_mode(app_mode_t mode)
+{
+ g_app.mode = mode;
+ ui_status_set_mode(mode);
+}
+
+static void app_ensure_uart_rx_enabled(void)
+{
+ /*
+ * The desktop GUI may connect long after standalone profile boot has
+ * already started. Keep USART RX armed independently of the USB-detect
+ * GPIO so the board remains controllable even if that detect signal is
+ * missing, noisy, or not wired in a given setup.
+ */
+ if (g_app.uart_rx_enabled == 0u)
+ {
+ board_io_enable_uart_rx_irq();
+ g_app.uart_rx_enabled = 1u;
+ }
+}
+
+static void app_apply_work_config_to_board(void)
+{
+ board_io_set_supply_enabled(1u, g_app.work_config.supply_5v1_enabled != 0u);
+ board_io_set_supply_enabled(2u, g_app.work_config.supply_5v2_enabled != 0u);
+ board_io_set_laser_enabled(1u, g_app.work_config.laser1_enabled != 0u);
+ board_io_set_laser_enabled(2u, g_app.work_config.laser2_enabled != 0u);
+ board_io_set_reference_enabled(1u, g_app.work_config.reference1_enabled != 0u);
+ board_io_set_reference_enabled(2u, g_app.work_config.reference2_enabled != 0u);
+
+ if (g_app.work_config.pid1_from_host == 0u)
+ {
+ g_app.laser_config[0].pid_p = APP_DEFAULT_PID_P;
+ g_app.laser_config[0].pid_i = APP_DEFAULT_PID_I;
+ }
+ if (g_app.work_config.pid2_from_host == 0u)
+ {
+ g_app.laser_config[1].pid_p = APP_DEFAULT_PID_P;
+ g_app.laser_config[1].pid_i = APP_DEFAULT_PID_I;
+ }
+
+ if ((g_app.work_config.temp_sensor1_enabled != 0u) && (g_app.work_config.tec1_enabled != 0u))
+ {
+ laser_dac_write_channel(3u, APP_TEC_PRECHARGE_CODE);
+ laser_dac_write_channel(3u, APP_TEC_PRECHARGE_CODE);
+ board_io_set_tec_channel_enabled(1u, true);
+ }
+ else
+ {
+ board_io_set_tec_channel_enabled(1u, false);
+ }
+
+ if ((g_app.work_config.temp_sensor2_enabled != 0u) && (g_app.work_config.tec2_enabled != 0u))
+ {
+ laser_dac_write_channel(4u, APP_TEC_PRECHARGE_CODE);
+ laser_dac_write_channel(4u, APP_TEC_PRECHARGE_CODE);
+ board_io_set_tec_channel_enabled(2u, true);
+ }
+ else
+ {
+ board_io_set_tec_channel_enabled(2u, false);
+ }
+}
+
+static void app_enter_idle_state(bool reset_ticks)
+{
+ g_app.work_config = g_app.default_work_config;
+ g_app.laser_config[0] = g_app.default_laser_config[0];
+ g_app.laser_config[1] = g_app.default_laser_config[1];
+ app_set_mode(APP_MODE_IDLE);
+ g_app.resume_mode = APP_MODE_IDLE;
+
+ profile_storage_cancel();
+ ad9102_cancel_custom_upload();
+ ad9102_stop_output();
+ ad9833_apply(0u, 0u, 0u);
+ board_io_reset_runtime_outputs();
+ stm32_dac_output_set(0u, 0u);
+
+ if (LL_SPI_IsEnabled(SPI2))
+ {
+ LL_SPI_Disable(SPI2);
+ }
+ if (LL_SPI_IsEnabled(SPI6))
+ {
+ LL_SPI_Disable(SPI6);
+ }
+
+ app_reset_runtime_state(reset_ticks);
+}
+
+static void app_apply_profile_auxiliary_outputs(const profile_t *profile)
+{
+ if (profile == NULL)
+ {
+ return;
+ }
+
+ ad9833_apply(profile->ad9833.enabled, profile->ad9833.triangle, profile->ad9833.frequency_word);
+ stm32_dac_output_set(profile->stm32_dac.code, profile->stm32_dac.enabled);
+
+ if (profile->ds1809.apply_position)
+ {
+ ds1809_apply_position_from_min(profile->ds1809.position_from_min);
+ }
+}
+
+static void app_prepare_status_response(void)
+{
+ g_app.tx_request = APP_TX_REQUEST_STATUS;
+ ui_status_set_error(g_app.status_bytes[0]);
+}
+
+static void app_set_error(uint8_t error_flag)
+{
+ g_app.status_bytes[0] |= error_flag;
+ ui_status_set_error(g_app.status_bytes[0]);
+}
+
+static void app_set_boot_diag(uint8_t boot_diag_code)
+{
+ g_app.boot_diag_code = boot_diag_code;
+}
+
+static void app_request_transient_mode(app_mode_t transient_mode)
+{
+ g_app.resume_mode = g_app.mode;
+ app_set_mode(transient_mode);
+}
+
+static bool app_activate_profile(const profile_t *profile, uint16_t index, bool allow_auto_run)
+{
+ bool should_auto_run;
+
+ if (profile == NULL)
+ {
+ return false;
+ }
+
+ should_auto_run = allow_auto_run && profile->auto_run;
+ app_enter_idle_state(false);
+
+ g_app.active_profile = *profile;
+ g_app.active_profile_index = index;
+ g_app.has_active_profile = true;
+ g_app.work_config = profile->work_config;
+ g_app.laser_config[0] = profile->laser_channels[0];
+ g_app.laser_config[1] = profile->laser_channels[1];
+
+ if (!app_apply_waveform_config(&profile->waveform))
+ {
+ app_enter_idle_state(false);
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ return false;
+ }
+
+ app_apply_profile_auxiliary_outputs(profile);
+
+ ui_status_set_profile_name(profile->display_name);
+
+ if (should_auto_run)
+ {
+ LL_SPI_Enable(SPI2);
+ LL_SPI_Enable(SPI6);
+ app_apply_work_config_to_board();
+ app_set_mode(APP_MODE_WORK);
+ g_app.resume_mode = APP_MODE_WORK;
+ }
+
+ return true;
+}
+
+static void app_capture_live_frame(bool update_temperature_loops, bool drive_laser_currents)
+{
+ uint16_t adc_slot_7;
+ uint16_t adc_slot_8;
+ uint16_t adc_slot_9;
+ uint16_t adc_slot_10;
+ uint16_t adc_slot_11;
+ uint16_t adc_slot_12;
+ uint16_t tec_drive_code;
+
+ g_app.laser_runtime[0].power_raw = adc_mux_read_external_channel(1u);
+ g_app.laser_runtime[0].power_raw = adc_mux_read_external_channel(1u);
+ g_app.laser_runtime[1].power_raw = adc_mux_read_external_channel(2u);
+ g_app.laser_runtime[1].power_raw = adc_mux_read_external_channel(2u);
+
+ (void)adc_mux_read_external_channel(3u);
+ g_app.laser_runtime[0].current_temperature_raw = adc_mux_read_external_channel(3u);
+ (void)adc_mux_read_external_channel(4u);
+ g_app.laser_runtime[1].current_temperature_raw = adc_mux_read_external_channel(4u);
+
+ if (update_temperature_loops)
+ {
+ tec_drive_code = temperature_control_compute_pid(&g_app.laser_config[0],
+ &g_app.laser_runtime[0],
+ 1u,
+ g_app.tick_1ms,
+ &g_app.pid_reference_tick_1ms);
+ laser_dac_write_channel(3u, tec_drive_code);
+
+ tec_drive_code = temperature_control_compute_pid(&g_app.laser_config[1],
+ &g_app.laser_runtime[1],
+ 2u,
+ g_app.tick_1ms,
+ &g_app.pid_reference_tick_1ms);
+ laser_dac_write_channel(4u, tec_drive_code);
+ }
+
+ if (drive_laser_currents)
+ {
+ laser_dac_write_channel(1u, g_app.laser_config[0].current_raw);
+ laser_dac_write_channel(2u, g_app.laser_config[1].current_raw);
+ }
+
+ (void)adc_mux_process_internal_adc_step(0u);
+ adc_slot_7 = adc_mux_process_internal_adc_step(1u);
+ adc_slot_8 = adc_mux_process_internal_adc_step(1u);
+ adc_slot_9 = adc_mux_process_internal_adc_step(1u);
+ adc_slot_10 = adc_mux_process_internal_adc_step(1u);
+ adc_slot_11 = adc_mux_process_internal_adc_step(1u);
+ (void)adc_mux_process_internal_adc_step(2u);
+ (void)adc_mux_process_internal_adc_step(3u);
+ (void)adc_mux_process_internal_adc_step(4u);
+ adc_slot_12 = adc_mux_process_internal_adc_step(4u);
+ (void)adc_mux_process_internal_adc_step(5u);
+
+ telemetry_set_message_id(&g_app.telemetry, g_app.work_config.message_id);
+ telemetry_set_live_data(&g_app.telemetry,
+ g_app.laser_runtime[0].power_raw,
+ g_app.laser_runtime[1].power_raw,
+ g_app.tick_10ms,
+ g_app.laser_runtime[0].current_temperature_raw,
+ g_app.laser_runtime[1].current_temperature_raw,
+ adc_slot_7,
+ adc_slot_8,
+ adc_slot_9,
+ adc_slot_10,
+ adc_slot_11,
+ adc_slot_12);
+}
+
+static void app_decode_work_packet(const uint16_t *packet_words)
+{
+ uint16_t flags_word = packet_words[0];
+
+ g_app.work_config.work_enabled = (uint8_t)((flags_word >> 0) & 0x01u);
+ g_app.work_config.supply_5v1_enabled = (uint8_t)((flags_word >> 1) & 0x01u);
+ g_app.work_config.supply_5v2_enabled = (uint8_t)((flags_word >> 2) & 0x01u);
+ g_app.work_config.laser1_enabled = (uint8_t)((flags_word >> 3) & 0x01u);
+ g_app.work_config.laser2_enabled = (uint8_t)((flags_word >> 4) & 0x01u);
+ g_app.work_config.reference1_enabled = (uint8_t)((flags_word >> 5) & 0x01u);
+ g_app.work_config.reference2_enabled = (uint8_t)((flags_word >> 6) & 0x01u);
+ g_app.work_config.tec1_enabled = (uint8_t)((flags_word >> 7) & 0x01u);
+ g_app.work_config.tec2_enabled = (uint8_t)((flags_word >> 8) & 0x01u);
+ g_app.work_config.temp_sensor1_enabled = (uint8_t)((flags_word >> 9) & 0x01u);
+ g_app.work_config.temp_sensor2_enabled = (uint8_t)((flags_word >> 10) & 0x01u);
+ g_app.work_config.pid1_from_host = (uint8_t)((flags_word >> 12) & 0x01u);
+ g_app.work_config.pid2_from_host = (uint8_t)((flags_word >> 13) & 0x01u);
+
+ g_app.laser_config[0].target_temperature_raw = packet_words[1];
+ g_app.laser_config[1].target_temperature_raw = packet_words[2];
+ g_app.work_config.averages = packet_words[5];
+ g_app.laser_config[0].pid_p = (float)packet_words[6] / 256.0f;
+ g_app.laser_config[0].pid_i = (float)packet_words[7] / 256.0f;
+ g_app.laser_config[1].pid_p = (float)packet_words[8] / 256.0f;
+ g_app.laser_config[1].pid_i = (float)packet_words[9] / 256.0f;
+ g_app.work_config.message_id = packet_words[10];
+ g_app.laser_config[0].current_raw = packet_words[11];
+ g_app.laser_config[1].current_raw = packet_words[12];
+}
+
+static bool app_load_custom_waveform_from_file(const char *path)
+{
+ char buffer[APP_CUSTOM_WAVE_BUFFER_SIZE];
+ UINT bytes_read = 0u;
+ char *cursor;
+ uint16_t chunk[12];
+ uint16_t chunk_count = 0u;
+ uint16_t sample_count = 0u;
+ bool commit_ok = false;
+ FRESULT result;
+
+ if ((path == NULL) || (*path == '\0'))
+ {
+ return false;
+ }
+
+ result = storage_sd_read_bytes(path, 0u, buffer, sizeof(buffer) - 1u, &bytes_read);
+ if (result != FR_OK)
+ {
+ return false;
+ }
+
+ buffer[bytes_read] = '\0';
+ cursor = buffer;
+
+ while (*cursor != '\0')
+ {
+ char *end_ptr;
+ (void)strtol(cursor, &end_ptr, 0);
+
+ if (end_ptr == cursor)
+ {
+ ++cursor;
+ continue;
+ }
+
+ if (sample_count >= AD9102_SRAM_MAX_SAMPLE_COUNT)
+ {
+ return false;
+ }
+
+ ++sample_count;
+ cursor = end_ptr;
+ }
+
+ if ((sample_count < 2u) || !ad9102_begin_custom_upload(sample_count))
+ {
+ return false;
+ }
+
+ cursor = buffer;
+ while (*cursor != '\0')
+ {
+ char *end_ptr;
+ long sample = strtol(cursor, &end_ptr, 0);
+
+ if (end_ptr == cursor)
+ {
+ ++cursor;
+ continue;
+ }
+
+ chunk[chunk_count] = (uint16_t)(int16_t)sample;
+ ++chunk_count;
+
+ if (chunk_count == 12u)
+ {
+ if (!ad9102_write_custom_chunk(chunk, chunk_count))
+ {
+ ad9102_cancel_custom_upload();
+ return false;
+ }
+ chunk_count = 0u;
+ }
+
+ cursor = end_ptr;
+ }
+
+ if ((chunk_count > 0u) && !ad9102_write_custom_chunk(chunk, chunk_count))
+ {
+ ad9102_cancel_custom_upload();
+ return false;
+ }
+
+ (void)ad9102_commit_custom_upload(&commit_ok);
+ if (!commit_ok)
+ {
+ ad9102_cancel_custom_upload();
+ }
+
+ return commit_ok;
+}
+
+static bool app_apply_waveform_config(const waveform_config_t *waveform)
+{
+ uint16_t pat_status;
+
+ if (waveform == NULL)
+ {
+ return true;
+ }
+
+ switch (waveform->mode)
+ {
+ case WAVEFORM_MODE_SAW:
+ pat_status = ad9102_apply_saw((waveform->triangle != 0u) ? 2u : 0u,
+ waveform->enabled,
+ waveform->saw_step,
+ waveform->pat_period_base,
+ waveform->pat_period);
+ return ad9102_check_saw_configuration(pat_status,
+ waveform->enabled,
+ (waveform->triangle != 0u) ? 2u : 0u,
+ waveform->saw_step,
+ waveform->pat_period_base,
+ waveform->pat_period) == 0u;
+
+ case WAVEFORM_MODE_SRAM_GENERATED:
+ pat_status = ad9102_apply_generated_sram(waveform->enabled,
+ waveform->sample_count,
+ waveform->hold_cycles,
+ waveform->triangle,
+ waveform->amplitude);
+ return ad9102_check_sram_configuration(pat_status,
+ waveform->enabled,
+ waveform->sample_count,
+ waveform->hold_cycles) == 0u;
+
+ case WAVEFORM_MODE_SRAM_CUSTOM:
+ if (waveform->enabled == 0u)
+ {
+ ad9102_stop_output();
+ return true;
+ }
+ return app_load_custom_waveform_from_file(waveform->source_path);
+
+ default:
+ return false;
+ }
+}
+
+static bool app_handle_profile_boot(void)
+{
+ profile_t profile;
+ uint16_t index = 0u;
+ FILINFO profile_index_info;
+ FRESULT profile_index_result;
+
+ app_set_boot_diag(APP_BOOT_DIAG_STARTED);
+
+ if (!storage_sd_is_available())
+ {
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ app_set_boot_diag(APP_BOOT_DIAG_NO_SD_CARD);
+ return false;
+ }
+
+ profile_index_result = storage_sd_stat(APP_STORAGE_PROFILE_INDEX_FILE, &profile_index_info);
+ if ((profile_index_result != FR_OK) &&
+ (profile_index_result != FR_NO_FILE) &&
+ (profile_index_result != FR_NO_PATH))
+ {
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ app_set_boot_diag(APP_BOOT_DIAG_SD_FILESYSTEM_ERROR);
+ return false;
+ }
+
+ if ((profile_index_result == FR_NO_FILE) || (profile_index_result == FR_NO_PATH))
+ {
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ app_set_boot_diag(APP_BOOT_DIAG_PROFILE_INDEX_MISSING);
+ return false;
+ }
+
+ if (!profile_repository_load_first(&profile, &index))
+ {
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ app_set_boot_diag(APP_BOOT_DIAG_PROFILE_LOAD_FAILED);
+ return false;
+ }
+
+ if (!profile.boot_enabled)
+ {
+ app_set_boot_diag(APP_BOOT_DIAG_BOOT_DISABLED);
+ return false;
+ }
+
+ if (!app_activate_profile(&profile, index, true))
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ app_set_boot_diag(APP_BOOT_DIAG_PROFILE_APPLY_FAILED);
+ return false;
+ }
+
+ app_set_boot_diag(profile.auto_run ? APP_BOOT_DIAG_PROFILE_RUNNING : APP_BOOT_DIAG_PROFILE_READY_IDLE);
+ return true;
+}
+
+static void app_handle_work_config_packet(const app_packet_t *packet)
+{
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ LL_SPI_Enable(SPI2);
+ LL_SPI_Enable(SPI6);
+ app_clear_active_profile();
+ app_decode_work_packet(packet->words);
+ app_apply_work_config_to_board();
+
+ app_set_mode(APP_MODE_WORK);
+ g_app.resume_mode = APP_MODE_WORK;
+ app_prepare_status_response();
+}
+
+static bool app_decode_profile_name(const uint16_t *packet_words,
+ uint16_t name_length,
+ char *out_name,
+ size_t out_name_size)
+{
+ uint8_t packed_name[APP_PROFILE_NAME_MAX_CHARACTERS];
+ uint8_t index;
+
+ if ((packet_words == NULL) || (out_name == NULL) || (out_name_size < APP_PROFILE_NAME_LENGTH))
+ {
+ return false;
+ }
+
+ if ((name_length == 0u) || (name_length > APP_PROFILE_NAME_MAX_CHARACTERS))
+ {
+ return false;
+ }
+
+ memset(packed_name, 0, sizeof(packed_name));
+ for (index = 0u; index < 8u; ++index)
+ {
+ packed_name[index * 2u] = (uint8_t)(packet_words[4u + index] & 0x00FFu);
+ packed_name[index * 2u + 1u] = (uint8_t)((packet_words[4u + index] >> 8) & 0x00FFu);
+ }
+
+ for (index = (uint8_t)name_length; index < APP_PROFILE_NAME_MAX_CHARACTERS; ++index)
+ {
+ if (packed_name[index] != 0u)
+ {
+ return false;
+ }
+ }
+
+ memcpy(out_name, packed_name, name_length);
+ out_name[name_length] = '\0';
+ return true;
+}
+
+static void app_unpack_profile_chunk_bytes(const uint16_t *packet_words, uint8_t *out_bytes)
+{
+ uint8_t index;
+
+ if ((packet_words == NULL) || (out_bytes == NULL))
+ {
+ return;
+ }
+
+ for (index = 0u; index < 11u; ++index)
+ {
+ out_bytes[index * 2u] = (uint8_t)(packet_words[2u + index] & 0x00FFu);
+ out_bytes[index * 2u + 1u] = (uint8_t)((packet_words[2u + index] >> 8) & 0x00FFu);
+ }
+}
+
+static void app_apply_profile_storage_error(profile_storage_status_t status)
+{
+ switch (status)
+ {
+ case PROFILE_STORAGE_STATUS_OK:
+ break;
+
+ case PROFILE_STORAGE_STATUS_INVALID_ARGUMENT:
+ case PROFILE_STORAGE_STATUS_NAME_INVALID:
+ case PROFILE_STORAGE_STATUS_SESSION_ACTIVE:
+ case PROFILE_STORAGE_STATUS_NO_ACTIVE_SESSION:
+ case PROFILE_STORAGE_STATUS_SIZE_MISMATCH:
+ case PROFILE_STORAGE_STATUS_SECTION_ERROR:
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ break;
+
+ case PROFILE_STORAGE_STATUS_STORAGE_UNAVAILABLE:
+ case PROFILE_STORAGE_STATUS_DIRECTORY_ERROR:
+ case PROFILE_STORAGE_STATUS_FILE_NAME_EXHAUSTED:
+ case PROFILE_STORAGE_STATUS_FILE_OPEN_ERROR:
+ case PROFILE_STORAGE_STATUS_WRITE_ERROR:
+ case PROFILE_STORAGE_STATUS_INDEX_UPDATE_ERROR:
+ default:
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ break;
+ }
+}
+
+static void app_handle_profile_save_control_packet(const app_packet_t *packet)
+{
+ char profile_name[APP_PROFILE_NAME_LENGTH];
+ uint16_t opcode;
+ profile_storage_status_t status = PROFILE_STORAGE_STATUS_OK;
+
+ g_app.status_bytes[1] = 0u;
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ profile_storage_cancel();
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ opcode = packet->words[0];
+ switch (opcode)
+ {
+ case APP_PROFILE_SAVE_OPCODE_BEGIN:
+ if (!app_decode_profile_name(packet->words,
+ packet->words[3],
+ profile_name,
+ sizeof(profile_name)))
+ {
+ status = PROFILE_STORAGE_STATUS_NAME_INVALID;
+ }
+ else
+ {
+ status = profile_storage_begin(profile_name, packet->words[1], packet->words[2]);
+ }
+ break;
+
+ case APP_PROFILE_SAVE_OPCODE_COMMIT:
+ status = profile_storage_commit();
+ break;
+
+ case APP_PROFILE_SAVE_OPCODE_CANCEL:
+ profile_storage_cancel();
+ status = profile_storage_get_last_status();
+ break;
+
+ default:
+ profile_storage_cancel();
+ status = PROFILE_STORAGE_STATUS_INVALID_ARGUMENT;
+ break;
+ }
+
+ if (status != PROFILE_STORAGE_STATUS_OK)
+ {
+ app_apply_profile_storage_error(status);
+ }
+
+ g_app.status_bytes[1] = (uint8_t)status;
+ app_prepare_status_response();
+}
+
+static void app_handle_ad9102_control_packet(const app_packet_t *packet)
+{
+ uint16_t flags;
+ uint16_t param0;
+ uint16_t param1;
+ uint8_t enabled;
+ uint8_t triangle;
+ uint8_t sram_mode;
+ uint16_t pat_status = 0u;
+
+ g_app.status_bytes[1] = 0u;
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ flags = packet->words[0];
+ param0 = packet->words[1];
+ param1 = packet->words[2];
+ enabled = (flags & APP_AD9102_FLAG_ENABLE) ? 1u : 0u;
+ triangle = (flags & APP_AD9102_FLAG_TRIANGLE) ? 1u : 0u;
+ sram_mode = (flags & APP_AD9102_FLAG_SRAM) ? 1u : 0u;
+
+ if (sram_mode != 0u)
+ {
+ uint16_t sample_count;
+ uint8_t hold_cycles;
+ uint16_t amplitude;
+
+ if ((flags & APP_AD9102_FLAG_SRAM_FORMAT_ALT) != 0u)
+ {
+ amplitude = param0;
+ sample_count = param1;
+ hold_cycles = AD9102_SRAM_DEFAULT_HOLD;
+ }
+ else
+ {
+ sample_count = param0;
+ hold_cycles = (uint8_t)(param1 & 0x0Fu);
+ amplitude = AD9102_SRAM_DEFAULT_AMPLITUDE;
+ }
+
+ pat_status = ad9102_apply_generated_sram(enabled,
+ sample_count,
+ hold_cycles,
+ triangle,
+ amplitude);
+ if (ad9102_check_sram_configuration(pat_status, enabled, sample_count, hold_cycles) != 0u)
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ }
+ else
+ {
+ uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
+ uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
+ uint16_t pat_period = param1;
+
+ if ((param0 == 0u) && (param1 == 0u))
+ {
+ saw_step = 1u;
+ pat_base = 2u;
+ pat_period = 0xFFFFu;
+ }
+ else
+ {
+ if (saw_step == 0u)
+ {
+ saw_step = 1u;
+ }
+ else if (saw_step > 63u)
+ {
+ saw_step = 63u;
+ }
+ if (pat_period == 0u)
+ {
+ pat_period = 0xFFFFu;
+ }
+ }
+
+ pat_status = ad9102_apply_saw((triangle != 0u) ? 2u : 0u,
+ enabled,
+ saw_step,
+ pat_base,
+ pat_period);
+ if (ad9102_check_saw_configuration(pat_status,
+ enabled,
+ (triangle != 0u) ? 2u : 0u,
+ saw_step,
+ pat_base,
+ pat_period) != 0u)
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ }
+
+ g_app.status_bytes[1] = (uint8_t)(pat_status & 0x00FFu);
+ app_prepare_status_response();
+}
+
+static void app_handle_ad9833_control_packet(const app_packet_t *packet)
+{
+ uint16_t flags;
+ uint16_t lsw;
+ uint16_t msw;
+ uint32_t frequency_word;
+
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ flags = packet->words[0];
+ lsw = (uint16_t)(packet->words[1] & 0x3FFFu);
+ msw = (uint16_t)(packet->words[2] & 0x3FFFu);
+ frequency_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
+ ad9833_apply((flags & APP_AD9833_FLAG_ENABLE) ? 1u : 0u,
+ (flags & APP_AD9833_FLAG_TRIANGLE) ? 1u : 0u,
+ frequency_word);
+ app_prepare_status_response();
+}
+
+static void app_handle_ds1809_control_packet(const app_packet_t *packet)
+{
+ uint16_t flags;
+ uint16_t count;
+ uint16_t pulse_ms;
+ uint8_t increment;
+ uint8_t decrement;
+
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ flags = packet->words[0];
+ count = packet->words[1];
+ pulse_ms = packet->words[2];
+ increment = (flags & APP_DS1809_FLAG_INCREMENT) ? 1u : 0u;
+ decrement = (flags & APP_DS1809_FLAG_DECREMENT) ? 1u : 0u;
+
+ if ((increment != 0u) && (decrement != 0u))
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ if (count == 0u)
+ {
+ count = 1u;
+ }
+ if (count > 64u)
+ {
+ count = 64u;
+ }
+ if (pulse_ms == 0u)
+ {
+ pulse_ms = 2u;
+ }
+ if (pulse_ms > 500u)
+ {
+ pulse_ms = 500u;
+ }
+
+ ds1809_pulse(increment, decrement, count, pulse_ms);
+ app_prepare_status_response();
+}
+
+static void app_handle_stm32_dac_control_packet(const app_packet_t *packet)
+{
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ stm32_dac_output_set((uint16_t)(packet->words[1] & 0x0FFFu),
+ (packet->words[0] & APP_STM32_DAC_FLAG_ENABLE) ? 1u : 0u);
+ app_prepare_status_response();
+}
+
+static void app_handle_ad9102_wave_control_packet(const app_packet_t *packet)
+{
+ uint16_t opcode;
+ uint16_t param0;
+ uint16_t param1;
+ bool commit_ok = false;
+ uint16_t pat_status = 0u;
+
+ g_app.status_bytes[1] = 0u;
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ opcode = packet->words[0];
+ param0 = packet->words[1];
+ param1 = packet->words[2];
+
+ switch (opcode)
+ {
+ case APP_AD9102_WAVE_OPCODE_BEGIN:
+ if ((param1 != 0u) || !ad9102_begin_custom_upload(param0))
+ {
+ ad9102_cancel_custom_upload();
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ break;
+
+ case APP_AD9102_WAVE_OPCODE_COMMIT:
+ if ((param0 != 0u) || (param1 != 0u))
+ {
+ ad9102_cancel_custom_upload();
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ break;
+ }
+
+ pat_status = ad9102_commit_custom_upload(&commit_ok);
+ g_app.status_bytes[1] = (uint8_t)(pat_status & 0x00FFu);
+ if (!commit_ok)
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ break;
+
+ case APP_AD9102_WAVE_OPCODE_CANCEL:
+ if ((param0 != 0u) || (param1 != 0u))
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ ad9102_cancel_custom_upload();
+ break;
+
+ default:
+ ad9102_cancel_custom_upload();
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ break;
+ }
+
+ app_prepare_status_response();
+}
+
+static void app_handle_ad9102_wave_data_packet(const app_packet_t *packet)
+{
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ ad9102_cancel_custom_upload();
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ if (!ad9102_write_custom_chunk(&packet->words[1], packet->words[0]))
+ {
+ ad9102_cancel_custom_upload();
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+
+ app_prepare_status_response();
+}
+
+static void app_handle_profile_save_data_packet(const app_packet_t *packet)
+{
+ uint8_t chunk_bytes[APP_PROFILE_SAVE_MAX_DATA_BYTES_PER_PACKET];
+ uint16_t section_id;
+ uint16_t chunk_length;
+ profile_storage_status_t status;
+
+ g_app.status_bytes[1] = 0u;
+ if ((packet == NULL) || !packet->checksum_valid)
+ {
+ profile_storage_cancel();
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ section_id = packet->words[0];
+ chunk_length = packet->words[1];
+ if (chunk_length > APP_PROFILE_SAVE_MAX_DATA_BYTES_PER_PACKET)
+ {
+ profile_storage_cancel();
+ app_set_error(APP_STATUS_FLAG_UART_DECODE_ERROR);
+ app_prepare_status_response();
+ return;
+ }
+
+ memset(chunk_bytes, 0, sizeof(chunk_bytes));
+ app_unpack_profile_chunk_bytes(packet->words, chunk_bytes);
+ status = profile_storage_write_chunk(section_id, chunk_bytes, chunk_length);
+ if (status != PROFILE_STORAGE_STATUS_OK)
+ {
+ app_apply_profile_storage_error(status);
+ }
+
+ g_app.status_bytes[1] = (uint8_t)status;
+ app_prepare_status_response();
+}
+
+static void app_handle_packet(const app_packet_t *packet)
+{
+ if (packet == NULL)
+ {
+ return;
+ }
+
+ switch (packet->kind)
+ {
+ case APP_PACKET_KIND_WORK_CONFIG:
+ app_handle_work_config_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_DEFAULTS:
+ app_enter_idle_state(false);
+ app_prepare_status_response();
+ break;
+
+ case APP_PACKET_KIND_TX_CURRENT:
+ app_request_transient_mode(APP_MODE_TX_CURRENT);
+ break;
+
+ case APP_PACKET_KIND_QUERY_STATE:
+ g_app.status_bytes[1] = g_app.boot_diag_code;
+ app_prepare_status_response();
+ break;
+
+ case APP_PACKET_KIND_PROFILE_SAVE_CONTROL:
+ app_handle_profile_save_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_AD9102_CONTROL:
+ app_handle_ad9102_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_AD9833_CONTROL:
+ app_handle_ad9833_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_DS1809_CONTROL:
+ app_handle_ds1809_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_STM32_DAC_CONTROL:
+ app_handle_stm32_dac_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_AD9102_WAVE_CONTROL:
+ app_handle_ad9102_wave_control_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_AD9102_WAVE_DATA:
+ app_handle_ad9102_wave_data_packet(packet);
+ break;
+
+ case APP_PACKET_KIND_PROFILE_SAVE_DATA:
+ app_handle_profile_save_data_packet(packet);
+ break;
+
+ default:
+ break;
+ }
+}
+
+static void app_process_work_mode(void)
+{
+ if (g_app.tick_1ms > g_app.last_processed_tick_1ms)
+ {
+ g_app.last_processed_tick_1ms = g_app.tick_1ms;
+ app_capture_live_frame(true, true);
+ g_app.resume_mode = APP_MODE_WORK;
+ }
+}
+
+static void app_flush_tx_request(void)
+{
+ switch (g_app.tx_request)
+ {
+ case APP_TX_REQUEST_STATUS:
+ uart_transport_send_blocking(g_app.status_bytes, APP_STATUS_BYTE_COUNT);
+ g_app.status_bytes[0] = 0u;
+ g_app.status_bytes[1] = 0u;
+ g_app.tx_request = APP_TX_REQUEST_NONE;
+ break;
+
+ case APP_TX_REQUEST_CURRENT_FRAME:
+ telemetry_finalize(&g_app.telemetry);
+ telemetry_to_bytes(&g_app.telemetry, g_app.tx_buffer);
+ uart_transport_send_dma(g_app.tx_buffer, APP_TELEMETRY_FRAME_BYTES);
+ g_app.tx_request = APP_TX_REQUEST_NONE;
+ break;
+
+ case APP_TX_REQUEST_NONE:
+ default:
+ break;
+ }
+}
+
+static void app_check_uart_timeout(void)
+{
+ if ((g_app.parser.bytes_received > 0u) &&
+ ((g_app.tick_10ms - g_app.uart_rx_start_tick_10ms) > APP_UART_TIMEOUT_TICKS_10MS))
+ {
+ app_reset_uart_parser();
+ app_set_error(APP_STATUS_FLAG_UART_ERROR);
+ }
+}
+
+static void app_handle_pending_event(void)
+{
+ app_event_t event = g_app.pending_event;
+
+ if (event == APP_EVENT_NONE)
+ {
+ return;
+ }
+
+ g_app.pending_event = APP_EVENT_NONE;
+
+ switch (event)
+ {
+ case APP_EVENT_PROFILE_NEXT:
+ {
+ profile_t profile;
+ uint16_t index = g_app.active_profile_index;
+ bool loaded;
+
+ loaded = g_app.has_active_profile ? profile_repository_load_next(&index, &profile)
+ : profile_repository_load_first(&profile, &index);
+ if (!loaded)
+ {
+ app_set_error(APP_STATUS_FLAG_SD_ERROR);
+ break;
+ }
+
+ if (!app_activate_profile(&profile, index, true))
+ {
+ app_set_error(APP_STATUS_FLAG_AD9102_ERROR);
+ }
+ break;
+ }
+
+ case APP_EVENT_NONE:
+ default:
+ break;
+ }
+}
+
+void app_init(void)
+{
+ memset(&g_app, 0, sizeof(g_app));
+
+ app_initialise_default_configuration();
+ app_reset_runtime_state(true);
+ ui_status_init();
+ app_set_mode(APP_MODE_IDLE);
+ g_app.resume_mode = APP_MODE_IDLE;
+ app_set_boot_diag(APP_BOOT_DIAG_NONE);
+ uart_transport_init();
+ stm32_dac_output_init();
+ profile_storage_init();
+ stm32_dac_output_set(0u, 0u);
+ board_io_reset_runtime_outputs();
+ HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
+
+ LL_TIM_EnableIT_UPDATE(TIM6);
+ LL_TIM_EnableCounter(TIM6);
+ LL_TIM_EnableIT_UPDATE(TIM7);
+ LL_TIM_EnableCounter(TIM7);
+ app_ensure_uart_rx_enabled();
+
+ ad9102_init();
+ (void)app_handle_profile_boot();
+}
+
+void app_run_once(void)
+{
+ app_event_t ui_event;
+
+ app_ensure_uart_rx_enabled();
+ ui_event = ui_status_poll_event(g_app.tick_10ms);
+ app_post_event(ui_event);
+
+ app_handle_pending_event();
+
+ switch (g_app.mode)
+ {
+ case APP_MODE_IDLE:
+ break;
+
+ case APP_MODE_WORK:
+ app_process_work_mode();
+ break;
+
+ case APP_MODE_TX_CURRENT:
+ g_app.tx_request = APP_TX_REQUEST_CURRENT_FRAME;
+ app_set_mode(g_app.resume_mode);
+ break;
+
+ case APP_MODE_ERROR:
+ app_prepare_status_response();
+ app_set_mode(APP_MODE_IDLE);
+ break;
+
+ default:
+ app_set_mode(APP_MODE_ERROR);
+ break;
+ }
+
+ app_flush_tx_request();
+ app_check_uart_timeout();
+}
+
+void app_post_event(app_event_t event)
+{
+ if (event != APP_EVENT_NONE)
+ {
+ g_app.pending_event = event;
+ }
+}
+
+void app_on_uart_byte(uint8_t byte)
+{
+ app_packet_t packet;
+ app_protocol_feed_result_t result;
+
+ if (g_app.parser.bytes_received == 0u)
+ {
+ g_app.uart_rx_start_tick_10ms = g_app.tick_10ms;
+ }
+
+ result = app_uart_protocol_feed_byte(&g_app.parser, byte, &packet);
+ if (result == APP_PROTOCOL_FEED_INVALID_HEADER)
+ {
+ app_reset_uart_parser();
+ app_set_error(APP_STATUS_FLAG_UART_ERROR);
+ }
+ else if (result == APP_PROTOCOL_FEED_PACKET_READY)
+ {
+ app_handle_packet(&packet);
+ }
+}
+
+void app_on_uart_error(void)
+{
+ app_reset_uart_parser();
+ app_set_error(APP_STATUS_FLAG_UART_ERROR);
+}
+
+void app_on_tim6_tick(void)
+{
+ ++g_app.tick_10ms;
+ board_io_toggle_debug_pin();
+}
+
+void app_on_tim7_tick(void)
+{
+ ++g_app.tick_1ms;
+}
+
+void app_on_dma_tx_complete(void)
+{
+ uart_transport_mark_dma_complete();
+}
diff --git a/App/Core/app_core.h b/App/Core/app_core.h
new file mode 100644
index 0000000..b1125d7
--- /dev/null
+++ b/App/Core/app_core.h
@@ -0,0 +1,61 @@
+/**
+ * @file app_core.h
+ * @brief Top-level application runtime and IRQ entry points.
+ */
+
+#ifndef APP_CORE_H
+#define APP_CORE_H
+
+#include
+
+#include "app_types.h"
+
+/**
+ * @brief Initialise the modular application layer after CubeMX peripherals are ready.
+ */
+void app_init(void);
+
+/**
+ * @brief Execute one non-blocking iteration of the top-level application state machine.
+ */
+void app_run_once(void);
+
+/**
+ * @brief Post a deferred application event from an ISR, button handler, or future UI backend.
+ *
+ * The event is latched and consumed inside `app_run_once()` so hardware-facing
+ * interrupt adapters stay thin and the main runtime keeps ownership of mode
+ * transitions and safe-stop sequencing.
+ *
+ * @param event Event to enqueue for the application core.
+ */
+void app_post_event(app_event_t event);
+
+/**
+ * @brief Forward one raw UART byte into the transport-agnostic protocol parser.
+ *
+ * @param byte Newly received UART byte.
+ */
+void app_on_uart_byte(uint8_t byte);
+
+/**
+ * @brief Notify the application core about a UART framing/parity/overrun error.
+ */
+void app_on_uart_error(void);
+
+/**
+ * @brief Notify the application core about the 10 ms housekeeping tick.
+ */
+void app_on_tim6_tick(void);
+
+/**
+ * @brief Notify the application core about the 1 ms timebase tick.
+ */
+void app_on_tim7_tick(void);
+
+/**
+ * @brief Notify the application core that the USART DMA transmit finished.
+ */
+void app_on_dma_tx_complete(void);
+
+#endif /* APP_CORE_H */
diff --git a/App/Devices/ad9102_device.c b/App/Devices/ad9102_device.c
new file mode 100644
index 0000000..5764a88
--- /dev/null
+++ b/App/Devices/ad9102_device.c
@@ -0,0 +1,716 @@
+/**
+ * @file ad9102_device.c
+ * @brief AD9102 waveform-generation device driver.
+ */
+
+#include "ad9102_device.h"
+
+#include "board_io.h"
+#include "main.h"
+
+/* AD9102 register map used by the existing firmware. See ad9102.pdf. */
+#define AD9102_REG_SPICONFIG 0x0000u
+#define AD9102_REG_POWERCONFIG 0x0001u
+#define AD9102_REG_CLOCKCONFIG 0x0002u
+#define AD9102_REG_RAMUPDATE 0x001Du
+#define AD9102_REG_PAT_STATUS 0x001Eu
+#define AD9102_REG_PAT_TYPE 0x001Fu
+#define AD9102_REG_WAV_CONFIG 0x0027u
+#define AD9102_REG_PAT_TIMEBASE 0x0028u
+#define AD9102_REG_PAT_PERIOD 0x0029u
+#define AD9102_REG_DAC_PAT 0x002Bu
+#define AD9102_REG_SAW_CONFIG 0x0037u
+#define AD9102_REG_START_DLY 0x005Cu
+#define AD9102_REG_START_ADDR 0x005Du
+#define AD9102_REG_STOP_ADDR 0x005Eu
+#define AD9102_REG_CFG_ERROR 0x0060u
+#define AD9102_REG_SRAM_DATA_BASE 0x6000u
+
+#define AD9102_PAT_STATUS_RUN (1u << 0)
+
+#define AD9102_SAW_TYPE_UP 0u
+#define AD9102_SAW_TYPE_TRIANGLE 2u
+
+#define AD9102_SAW_STEP_DEFAULT 1u
+#define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
+#define AD9102_START_DELAY_BASE_DEFAULT 0x1u
+#define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
+#define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
+
+#define AD9102_EX4_WAV_CONFIG 0x3212u
+#define AD9102_EX4_SAW_CONFIG 0x0606u
+#define AD9102_EX2_WAV_CONFIG 0x3030u
+#define AD9102_EX2_DAC_PAT 0x0101u
+#define AD9102_EX2_SAW_CONFIG 0x0200u
+#define AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT 0x1u
+#define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
+#define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
+#define AD9102_SRAM_RAMP_MIN (-8192)
+#define AD9102_SRAM_RAMP_MAX (8191)
+
+#define AD9102_REG_COUNT 66u
+#define AD9102_WAVE_MAX_CHUNK_SAMPLES 12u
+
+static const uint16_t g_ad9102_reg_addr[AD9102_REG_COUNT] = {
+ 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
+ 0x0008u, 0x0009u, 0x000Au, 0x000Bu, 0x000Cu, 0x000Du, 0x000Eu, 0x001Fu,
+ 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
+ 0x0029u, 0x002Au, 0x002Bu, 0x002Cu, 0x002Du, 0x002Eu, 0x002Fu, 0x0030u,
+ 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003Eu,
+ 0x003Fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
+ 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
+ 0x0058u, 0x0059u, 0x005Au, 0x005Bu, 0x005Cu, 0x005Du, 0x005Eu, 0x005Fu,
+ 0x001Eu, 0x001Du
+};
+
+static const uint16_t g_ad9102_example4_regval[AD9102_REG_COUNT] = {
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1F00u, 0x0000u, 0x0000u, 0x0000u,
+ 0x000Eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
+ 0xFFFFu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
+ 0x9A00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0FA0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16FFu,
+ 0x0001u, 0x0001u
+};
+
+static const uint16_t g_ad9102_example2_regval[AD9102_REG_COUNT] = {
+ 0x0000u, 0x0E00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1F00u, 0x0000u, 0x0000u, 0x0000u,
+ 0x000Eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u,
+ 0xFFFFu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
+ 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0FA0u, 0x0000u, 0x3FF0u, 0x0100u,
+ 0x0001u, 0x0001u
+};
+
+typedef struct ad9102_upload_state_t {
+ uint8_t active;
+ uint16_t expected_samples;
+ uint16_t written_samples;
+} ad9102_upload_state_t;
+
+static ad9102_upload_state_t g_upload_state;
+
+static void ad9102_write_reg(uint16_t address, uint16_t value)
+{
+ uint16_t command = (uint16_t)(address & 0x7FFFu);
+ uint32_t timeout = 0u;
+
+ board_io_configure_spi2_mode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+
+ if (!LL_SPI_IsEnabled(SPI2))
+ {
+ LL_SPI_Enable(SPI2);
+ }
+
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
+
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ LL_SPI_TransmitData16(SPI2, command);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ (void)SPI2->DR;
+
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ LL_SPI_TransmitData16(SPI2, value);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ (void)SPI2->DR;
+
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+}
+
+static uint16_t ad9102_read_reg(uint16_t address)
+{
+ uint16_t command = (uint16_t)(0x8000u | (address & 0x7FFFu));
+ uint16_t value;
+ uint32_t timeout = 0u;
+
+ board_io_configure_spi2_mode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+
+ if (!LL_SPI_IsEnabled(SPI2))
+ {
+ LL_SPI_Enable(SPI2);
+ }
+
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
+
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ LL_SPI_TransmitData16(SPI2, command);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ (void)SPI2->DR;
+
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ LL_SPI_TransmitData16(SPI2, 0x0000u);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ value = LL_SPI_ReceiveData16(SPI2);
+
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ return value;
+}
+
+static void ad9102_write_reg_table(const uint16_t *values, uint16_t count)
+{
+ uint16_t index;
+
+ for (index = 0u; index < count; ++index)
+ {
+ ad9102_write_reg(g_ad9102_reg_addr[index], values[index]);
+ }
+}
+
+static void ad9102_reset_upload_state(void)
+{
+ g_upload_state.active = 0u;
+ g_upload_state.expected_samples = 0u;
+ g_upload_state.written_samples = 0u;
+}
+
+static void ad9102_start_output(void)
+{
+ HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
+ ad9102_write_reg(AD9102_REG_RAMUPDATE, 0x0001u);
+
+ for (volatile uint32_t delay_counter = 0u; delay_counter < 1000u; ++delay_counter)
+ {
+ }
+
+ HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
+}
+
+static void ad9102_configure_sram_playback(uint16_t sample_count, uint8_t hold_cycles)
+{
+ uint16_t pat_timebase;
+ uint32_t pat_period;
+
+ if (sample_count < 2u)
+ {
+ sample_count = 2u;
+ }
+ if (sample_count > AD9102_SRAM_MAX_SAMPLE_COUNT)
+ {
+ sample_count = AD9102_SRAM_MAX_SAMPLE_COUNT;
+ }
+ if (hold_cycles == 0u)
+ {
+ hold_cycles = AD9102_SRAM_DEFAULT_HOLD;
+ }
+ if (hold_cycles > 0x0Fu)
+ {
+ hold_cycles = 0x0Fu;
+ }
+
+ pat_timebase = (uint16_t)(((uint16_t)(hold_cycles & 0x0Fu) << 8) |
+ ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ pat_period = (uint32_t)sample_count * (uint32_t)(hold_cycles & 0x0Fu);
+ if (pat_period == 0u)
+ {
+ pat_period = sample_count;
+ }
+ if (pat_period > 0xFFFFu)
+ {
+ pat_period = 0xFFFFu;
+ }
+
+ ad9102_write_reg_table(g_ad9102_example2_regval, AD9102_REG_COUNT);
+ ad9102_stop_output();
+ ad9102_write_reg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
+ ad9102_write_reg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
+ ad9102_write_reg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
+ ad9102_write_reg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+ ad9102_write_reg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
+ ad9102_write_reg(AD9102_REG_PAT_TYPE, 0x0000u);
+ ad9102_write_reg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
+ ad9102_write_reg(AD9102_REG_START_ADDR, 0x0000u);
+ ad9102_write_reg(AD9102_REG_STOP_ADDR, (uint16_t)((sample_count - 1u) << 4));
+ ad9102_write_reg(AD9102_REG_RAMUPDATE, 0x0001u);
+}
+
+static void ad9102_load_sram_ramp(uint16_t sample_count, uint8_t triangle_mode, uint16_t amplitude)
+{
+ uint16_t sample_index;
+
+ if (sample_count < 2u)
+ {
+ sample_count = 2u;
+ }
+ if (sample_count > AD9102_SRAM_MAX_SAMPLE_COUNT)
+ {
+ sample_count = AD9102_SRAM_MAX_SAMPLE_COUNT;
+ }
+ if (amplitude > AD9102_SRAM_DEFAULT_AMPLITUDE)
+ {
+ amplitude = AD9102_SRAM_DEFAULT_AMPLITUDE;
+ }
+
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0004u);
+
+ for (sample_index = 0u; sample_index < sample_count; ++sample_index)
+ {
+ int32_t value;
+ int32_t min_value = -(int32_t)amplitude;
+ int32_t max_value = (int32_t)amplitude;
+ int32_t span = max_value - min_value;
+
+ if (triangle_mode != 0u)
+ {
+ uint16_t half = sample_count / 2u;
+ if (half == 0u)
+ {
+ half = 1u;
+ }
+
+ if (sample_index < half)
+ {
+ uint16_t denominator = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
+ value = min_value + (span * (int32_t)sample_index) / (int32_t)denominator;
+ }
+ else
+ {
+ uint16_t tail = (uint16_t)(sample_count - half);
+ uint16_t denominator = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
+ value = max_value - (span * (int32_t)(sample_index - half)) / (int32_t)denominator;
+ }
+ }
+ else
+ {
+ uint16_t denominator = (sample_count > 1u) ? (uint16_t)(sample_count - 1u) : 1u;
+ value = min_value + (span * (int32_t)sample_index) / (int32_t)denominator;
+ }
+
+ if (value < AD9102_SRAM_RAMP_MIN)
+ {
+ value = AD9102_SRAM_RAMP_MIN;
+ }
+ else if (value > AD9102_SRAM_RAMP_MAX)
+ {
+ value = AD9102_SRAM_RAMP_MAX;
+ }
+
+ ad9102_write_reg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + sample_index),
+ (uint16_t)(((uint16_t)((int16_t)value) & 0x3FFFu) << 2));
+ }
+
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0000u);
+}
+
+void ad9102_init(void)
+{
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
+
+ for (volatile uint32_t delay_counter = 0u; delay_counter < 1000u; ++delay_counter)
+ {
+ }
+
+ HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
+ ad9102_write_reg_table(g_ad9102_example4_regval, AD9102_REG_COUNT);
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0000u);
+ ad9102_write_reg(AD9102_REG_RAMUPDATE, 0x0001u);
+ HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+ ad9102_reset_upload_state();
+}
+
+void ad9102_stop_output(void)
+{
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0000u);
+ HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
+}
+
+uint16_t ad9102_apply_saw(uint8_t saw_type,
+ uint8_t enabled,
+ uint8_t saw_step,
+ uint8_t pat_period_base,
+ uint16_t pat_period)
+{
+ uint16_t saw_config;
+ uint16_t pat_timebase;
+
+ ad9102_reset_upload_state();
+
+ if (enabled == 0u)
+ {
+ ad9102_stop_output();
+ return ad9102_read_reg(AD9102_REG_PAT_STATUS);
+ }
+
+ if (saw_step == 0u)
+ {
+ saw_step = AD9102_SAW_STEP_DEFAULT;
+ }
+ else if (saw_step > 63u)
+ {
+ saw_step = 63u;
+ }
+
+ if (pat_period == 0u)
+ {
+ pat_period = AD9102_PAT_PERIOD_DEFAULT;
+ }
+
+ saw_config = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | ((uint16_t)(saw_type & 0x3u)));
+ pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ ((pat_period_base & 0x0Fu) << 4) |
+ (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+
+ ad9102_write_reg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
+ ad9102_write_reg(AD9102_REG_SAW_CONFIG, saw_config);
+ ad9102_write_reg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
+ ad9102_write_reg(AD9102_REG_PAT_PERIOD, pat_period);
+ ad9102_write_reg(AD9102_REG_PAT_TYPE, 0x0000u);
+ ad9102_start_output();
+
+ return ad9102_read_reg(AD9102_REG_PAT_STATUS);
+}
+
+uint16_t ad9102_apply_generated_sram(uint8_t enabled,
+ uint16_t sample_count,
+ uint8_t hold_cycles,
+ uint8_t triangle_mode,
+ uint16_t amplitude)
+{
+ ad9102_reset_upload_state();
+
+ if (sample_count == 0u)
+ {
+ sample_count = AD9102_SRAM_DEFAULT_SAMPLE_COUNT;
+ }
+ if (sample_count < 2u)
+ {
+ sample_count = 2u;
+ }
+ if (sample_count > AD9102_SRAM_MAX_SAMPLE_COUNT)
+ {
+ sample_count = AD9102_SRAM_MAX_SAMPLE_COUNT;
+ }
+ if (hold_cycles == 0u)
+ {
+ hold_cycles = AD9102_SRAM_DEFAULT_HOLD;
+ }
+ if (hold_cycles > 0x0Fu)
+ {
+ hold_cycles = 0x0Fu;
+ }
+ if (amplitude > AD9102_SRAM_DEFAULT_AMPLITUDE)
+ {
+ amplitude = AD9102_SRAM_DEFAULT_AMPLITUDE;
+ }
+
+ ad9102_configure_sram_playback(sample_count, hold_cycles);
+ ad9102_load_sram_ramp(sample_count, triangle_mode, amplitude);
+
+ if (enabled != 0u)
+ {
+ ad9102_start_output();
+ }
+ else
+ {
+ ad9102_stop_output();
+ }
+
+ return ad9102_read_reg(AD9102_REG_PAT_STATUS);
+}
+
+bool ad9102_begin_custom_upload(uint16_t sample_count)
+{
+ if ((sample_count < 2u) || (sample_count > AD9102_SRAM_MAX_SAMPLE_COUNT))
+ {
+ return false;
+ }
+
+ ad9102_stop_output();
+ ad9102_reset_upload_state();
+ ad9102_configure_sram_playback(sample_count, AD9102_SRAM_DEFAULT_HOLD);
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0004u);
+
+ g_upload_state.expected_samples = sample_count;
+ g_upload_state.written_samples = 0u;
+ g_upload_state.active = 1u;
+ return true;
+}
+
+bool ad9102_write_custom_chunk(const uint16_t *samples, uint16_t chunk_count)
+{
+ uint16_t index;
+
+ if ((samples == NULL) || (g_upload_state.active == 0u))
+ {
+ return false;
+ }
+ if ((chunk_count == 0u) || (chunk_count > AD9102_WAVE_MAX_CHUNK_SAMPLES))
+ {
+ return false;
+ }
+ if (((uint32_t)g_upload_state.written_samples + (uint32_t)chunk_count) >
+ (uint32_t)g_upload_state.expected_samples)
+ {
+ return false;
+ }
+
+ for (index = 0u; index < chunk_count; ++index)
+ {
+ int16_t sample = (int16_t)samples[index];
+
+ if ((sample < AD9102_SRAM_RAMP_MIN) || (sample > AD9102_SRAM_RAMP_MAX))
+ {
+ return false;
+ }
+
+ ad9102_write_reg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + g_upload_state.written_samples + index),
+ (uint16_t)(((uint16_t)sample & 0x3FFFu) << 2));
+ }
+
+ g_upload_state.written_samples = (uint16_t)(g_upload_state.written_samples + chunk_count);
+ return true;
+}
+
+uint16_t ad9102_commit_custom_upload(bool *out_ok)
+{
+ uint16_t pat_status;
+
+ if (out_ok != NULL)
+ {
+ *out_ok = false;
+ }
+
+ if ((g_upload_state.active == 0u) ||
+ (g_upload_state.expected_samples < 2u) ||
+ (g_upload_state.written_samples != g_upload_state.expected_samples))
+ {
+ ad9102_cancel_custom_upload();
+ return ad9102_read_reg(AD9102_REG_PAT_STATUS);
+ }
+
+ ad9102_write_reg(AD9102_REG_PAT_STATUS, 0x0000u);
+ ad9102_write_reg(AD9102_REG_START_ADDR, 0x0000u);
+ ad9102_write_reg(AD9102_REG_STOP_ADDR, (uint16_t)((g_upload_state.expected_samples - 1u) << 4));
+ ad9102_write_reg(AD9102_REG_RAMUPDATE, 0x0001u);
+ ad9102_start_output();
+ pat_status = ad9102_read_reg(AD9102_REG_PAT_STATUS);
+
+ ad9102_reset_upload_state();
+ if (out_ok != NULL)
+ {
+ *out_ok = true;
+ }
+
+ return pat_status;
+}
+
+void ad9102_cancel_custom_upload(void)
+{
+ if (g_upload_state.active != 0u)
+ {
+ ad9102_stop_output();
+ }
+
+ ad9102_reset_upload_state();
+}
+
+uint8_t ad9102_check_saw_configuration(uint16_t pat_status,
+ uint8_t expect_run,
+ uint8_t saw_type,
+ uint8_t saw_step,
+ uint8_t pat_period_base,
+ uint16_t pat_period)
+{
+ uint16_t spiconfig = ad9102_read_reg(AD9102_REG_SPICONFIG);
+ uint16_t power_config = ad9102_read_reg(AD9102_REG_POWERCONFIG);
+ uint16_t clock_config = ad9102_read_reg(AD9102_REG_CLOCKCONFIG);
+ uint16_t config_error = ad9102_read_reg(AD9102_REG_CFG_ERROR);
+ uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
+ ((pat_period_base & 0x0Fu) << 4) |
+ (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ uint16_t expected_saw;
+ uint8_t ok = 1u;
+
+ if (saw_step == 0u)
+ {
+ saw_step = AD9102_SAW_STEP_DEFAULT;
+ }
+ if (saw_step > 63u)
+ {
+ saw_step = 63u;
+ }
+ if (pat_period == 0u)
+ {
+ pat_period = AD9102_PAT_PERIOD_DEFAULT;
+ }
+
+ expected_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) | ((uint16_t)(saw_type & 0x3u)));
+
+ if (spiconfig != 0x0000u)
+ {
+ ok = 0u;
+ }
+ if (power_config & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
+ {
+ ok = 0u;
+ }
+ if (clock_config & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
+ {
+ ok = 0u;
+ }
+ if (config_error & 0x003Fu)
+ {
+ ok = 0u;
+ }
+ if ((expect_run != 0u) && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_PERIOD) != pat_period)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_TYPE) != 0x0000u)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_SAW_CONFIG) != expected_saw)
+ {
+ ok = 0u;
+ }
+
+ return (ok != 0u) ? 0u : 1u;
+}
+
+uint8_t ad9102_check_sram_configuration(uint16_t pat_status,
+ uint8_t expect_run,
+ uint16_t sample_count,
+ uint8_t hold_cycles)
+{
+ uint16_t spiconfig = ad9102_read_reg(AD9102_REG_SPICONFIG);
+ uint16_t power_config = ad9102_read_reg(AD9102_REG_POWERCONFIG);
+ uint16_t clock_config = ad9102_read_reg(AD9102_REG_CLOCKCONFIG);
+ uint16_t config_error = ad9102_read_reg(AD9102_REG_CFG_ERROR);
+ uint16_t pat_timebase;
+ uint32_t pat_period;
+ uint16_t stop_address;
+ uint8_t ok = 1u;
+
+ if (sample_count == 0u)
+ {
+ sample_count = AD9102_SRAM_DEFAULT_SAMPLE_COUNT;
+ }
+ if (sample_count < 2u)
+ {
+ sample_count = 2u;
+ }
+ if (sample_count > AD9102_SRAM_MAX_SAMPLE_COUNT)
+ {
+ sample_count = AD9102_SRAM_MAX_SAMPLE_COUNT;
+ }
+ if (hold_cycles == 0u)
+ {
+ hold_cycles = AD9102_SRAM_DEFAULT_HOLD;
+ }
+ if (hold_cycles > 0x0Fu)
+ {
+ hold_cycles = 0x0Fu;
+ }
+
+ pat_timebase = (uint16_t)(((uint16_t)(hold_cycles & 0x0Fu) << 8) |
+ ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
+ (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
+ pat_period = (uint32_t)sample_count * (uint32_t)(hold_cycles & 0x0Fu);
+ if (pat_period == 0u)
+ {
+ pat_period = sample_count;
+ }
+ if (pat_period > 0xFFFFu)
+ {
+ pat_period = 0xFFFFu;
+ }
+
+ stop_address = (uint16_t)((sample_count - 1u) << 4);
+
+ if (spiconfig != 0x0000u)
+ {
+ ok = 0u;
+ }
+ if (power_config & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
+ {
+ ok = 0u;
+ }
+ if (clock_config & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
+ {
+ ok = 0u;
+ }
+ if (config_error & 0x003Fu)
+ {
+ ok = 0u;
+ }
+ if ((expect_run != 0u) && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_PAT_TYPE) != 0x0000u)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_START_ADDR) != 0x0000u)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_STOP_ADDR) != stop_address)
+ {
+ ok = 0u;
+ }
+ if (ad9102_read_reg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT)
+ {
+ ok = 0u;
+ }
+
+ return (ok != 0u) ? 0u : 1u;
+}
diff --git a/App/Devices/ad9102_device.h b/App/Devices/ad9102_device.h
new file mode 100644
index 0000000..d84aac6
--- /dev/null
+++ b/App/Devices/ad9102_device.h
@@ -0,0 +1,52 @@
+/**
+ * @file ad9102_device.h
+ * @brief AD9102 waveform-generation device driver.
+ *
+ * Architectural note:
+ * The driver owns all AD9102 register tables and safe mode switching rules.
+ * High-level services describe *what* waveform to apply, while this module
+ * owns the register-level details of *how* to enter, verify, and leave each
+ * mode without cross-coupling to UART or storage logic.
+ */
+
+#ifndef AD9102_DEVICE_H
+#define AD9102_DEVICE_H
+
+#include
+#include
+
+#include "app_types.h"
+
+#define AD9102_SRAM_DEFAULT_HOLD 1u
+#define AD9102_SRAM_DEFAULT_AMPLITUDE 8191u
+#define AD9102_SRAM_DEFAULT_SAMPLE_COUNT 16u
+#define AD9102_SRAM_MAX_SAMPLE_COUNT 4096u
+
+void ad9102_init(void);
+void ad9102_stop_output(void);
+uint16_t ad9102_apply_saw(uint8_t saw_type,
+ uint8_t enabled,
+ uint8_t saw_step,
+ uint8_t pat_period_base,
+ uint16_t pat_period);
+uint16_t ad9102_apply_generated_sram(uint8_t enabled,
+ uint16_t sample_count,
+ uint8_t hold_cycles,
+ uint8_t triangle_mode,
+ uint16_t amplitude);
+bool ad9102_begin_custom_upload(uint16_t sample_count);
+bool ad9102_write_custom_chunk(const uint16_t *samples, uint16_t chunk_count);
+uint16_t ad9102_commit_custom_upload(bool *out_ok);
+void ad9102_cancel_custom_upload(void);
+uint8_t ad9102_check_saw_configuration(uint16_t pat_status,
+ uint8_t expect_run,
+ uint8_t saw_type,
+ uint8_t saw_step,
+ uint8_t pat_period_base,
+ uint16_t pat_period);
+uint8_t ad9102_check_sram_configuration(uint16_t pat_status,
+ uint8_t expect_run,
+ uint16_t sample_count,
+ uint8_t hold_cycles);
+
+#endif /* AD9102_DEVICE_H */
diff --git a/App/Devices/ad9833_device.c b/App/Devices/ad9833_device.c
new file mode 100644
index 0000000..a612c60
--- /dev/null
+++ b/App/Devices/ad9833_device.c
@@ -0,0 +1,64 @@
+/**
+ * @file ad9833_device.c
+ * @brief AD9833 waveform-generator control helpers.
+ */
+
+#include "ad9833_device.h"
+
+#include "board_io.h"
+#include "main.h"
+
+static void ad9833_write_word(uint16_t word)
+{
+ uint32_t timeout = 0u;
+
+ board_io_configure_spi2_mode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
+
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
+
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ LL_SPI_TransmitData16(SPI2, word);
+
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout++ < 1000u))
+ {
+ }
+ (void)SPI2->DR;
+
+ HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+}
+
+void ad9833_apply(uint8_t enabled, uint8_t triangle_mode, uint32_t frequency_word)
+{
+ uint16_t control = 0x2000u;
+ uint16_t lsw;
+ uint16_t msw;
+
+ if (triangle_mode != 0u)
+ {
+ control |= 0x0002u;
+ }
+
+ control |= 0x0100u;
+
+ frequency_word &= 0x0FFFFFFFu;
+ lsw = (uint16_t)(0x4000u | (frequency_word & 0x3FFFu));
+ msw = (uint16_t)(0x4000u | ((frequency_word >> 14) & 0x3FFFu));
+
+ ad9833_write_word(control);
+ ad9833_write_word(lsw);
+ ad9833_write_word(msw);
+ ad9833_write_word(0xC000u);
+
+ if (enabled != 0u)
+ {
+ control &= (uint16_t)(~0x0100u);
+ }
+
+ ad9833_write_word(control);
+}
diff --git a/App/Devices/ad9833_device.h b/App/Devices/ad9833_device.h
new file mode 100644
index 0000000..44c868d
--- /dev/null
+++ b/App/Devices/ad9833_device.h
@@ -0,0 +1,13 @@
+/**
+ * @file ad9833_device.h
+ * @brief AD9833 waveform generator control helpers.
+ */
+
+#ifndef AD9833_DEVICE_H
+#define AD9833_DEVICE_H
+
+#include
+
+void ad9833_apply(uint8_t enabled, uint8_t triangle_mode, uint32_t frequency_word);
+
+#endif /* AD9833_DEVICE_H */
diff --git a/App/Devices/adc_mux.c b/App/Devices/adc_mux.c
new file mode 100644
index 0000000..caa464d
--- /dev/null
+++ b/App/Devices/adc_mux.c
@@ -0,0 +1,135 @@
+/**
+ * @file adc_mux.c
+ * @brief External photodiode ADC and internal STM32 ADC helpers.
+ */
+
+#include "adc_mux.h"
+
+#include "board_handles.h"
+#include "main.h"
+
+uint16_t adc_mux_read_external_channel(uint8_t channel_index)
+{
+ uint16_t result = 0u;
+ uint32_t delay_counter;
+
+ HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ if (channel_index == 1u)
+ {
+ HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ LL_SPI_Enable(SPI4);
+ delay_counter = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI4)) && (delay_counter <= 1000u))
+ {
+ ++delay_counter;
+ }
+ LL_SPI_Disable(SPI4);
+ HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
+ result = LL_SPI_ReceiveData16(SPI4);
+ }
+ else if (channel_index == 2u)
+ {
+ HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ LL_SPI_Enable(SPI5);
+ delay_counter = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI5)) && (delay_counter <= 1000u))
+ {
+ ++delay_counter;
+ }
+ LL_SPI_Disable(SPI5);
+ HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
+ result = LL_SPI_ReceiveData16(SPI5);
+ }
+ else if (channel_index == 3u)
+ {
+ HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ LL_SPI_Enable(SPI4);
+ delay_counter = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI4)) && (delay_counter <= 1000u))
+ {
+ ++delay_counter;
+ }
+ LL_SPI_Disable(SPI4);
+ HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
+ result = LL_SPI_ReceiveData16(SPI4);
+ }
+ else if (channel_index == 4u)
+ {
+ HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
+ for (delay_counter = 0u; delay_counter < 500u; ++delay_counter)
+ {
+ }
+
+ LL_SPI_Enable(SPI5);
+ delay_counter = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI5)) && (delay_counter <= 1000u))
+ {
+ ++delay_counter;
+ }
+ LL_SPI_Disable(SPI5);
+ HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
+ result = LL_SPI_ReceiveData16(SPI5);
+ }
+
+ return result;
+}
+
+uint16_t adc_mux_process_internal_adc_step(uint8_t step)
+{
+ uint16_t output = 0u;
+
+ switch (step)
+ {
+ case 0u:
+ HAL_ADC_Start(&hadc1);
+ break;
+ case 1u:
+ HAL_ADC_PollForConversion(&hadc1, 100u);
+ output = HAL_ADC_GetValue(&hadc1);
+ break;
+ case 2u:
+ HAL_ADC_Stop(&hadc1);
+ break;
+ case 3u:
+ HAL_ADC_Start(&hadc3);
+ break;
+ case 4u:
+ HAL_ADC_PollForConversion(&hadc3, 100u);
+ output = HAL_ADC_GetValue(&hadc3);
+ break;
+ case 5u:
+ HAL_ADC_Stop(&hadc3);
+ break;
+ default:
+ break;
+ }
+
+ return output;
+}
diff --git a/App/Devices/adc_mux.h b/App/Devices/adc_mux.h
new file mode 100644
index 0000000..42cba4d
--- /dev/null
+++ b/App/Devices/adc_mux.h
@@ -0,0 +1,14 @@
+/**
+ * @file adc_mux.h
+ * @brief Helpers for external photodiode ADCs and internal STM32 ADC channels.
+ */
+
+#ifndef ADC_MUX_H
+#define ADC_MUX_H
+
+#include
+
+uint16_t adc_mux_read_external_channel(uint8_t channel_index);
+uint16_t adc_mux_process_internal_adc_step(uint8_t step);
+
+#endif /* ADC_MUX_H */
diff --git a/App/Devices/board_handles.h b/App/Devices/board_handles.h
new file mode 100644
index 0000000..a3b2cab
--- /dev/null
+++ b/App/Devices/board_handles.h
@@ -0,0 +1,22 @@
+/**
+ * @file board_handles.h
+ * @brief Extern declarations for CubeMX-generated peripheral handles.
+ *
+ * Architectural note:
+ * Device and service modules depend on hardware handles owned by `Src/main.c`.
+ * This header isolates those extern declarations so the App layer never has to
+ * pull application types back into the CubeMX-generated file.
+ */
+
+#ifndef BOARD_HANDLES_H
+#define BOARD_HANDLES_H
+
+#include "main.h"
+
+extern ADC_HandleTypeDef hadc1;
+extern ADC_HandleTypeDef hadc3;
+extern SD_HandleTypeDef hsd1;
+extern TIM_HandleTypeDef htim1;
+extern UART_HandleTypeDef huart8;
+
+#endif /* BOARD_HANDLES_H */
diff --git a/App/Devices/board_io.c b/App/Devices/board_io.c
new file mode 100644
index 0000000..a63c3ba
--- /dev/null
+++ b/App/Devices/board_io.c
@@ -0,0 +1,257 @@
+/**
+ * @file board_io.c
+ * @brief Board-specific GPIO and shared low-level control helpers.
+ */
+
+#include "board_io.h"
+
+#define UI_LCD_CONTRAST_PWM_FREQUENCY_HZ 20000u
+#define UI_LCD_CONTRAST_PWM_PERIOD_COUNTS 1000u
+#define UI_LCD_CONTRAST_PWM_DUTY_PERMILLE 300u
+
+static TIM_HandleTypeDef g_ui_lcd_contrast_pwm_timer;
+
+static uint32_t board_io_get_apb1_timer_clock_hz(void);
+static void board_io_init_lcd_contrast_pwm(void);
+
+void board_io_enable_uart_rx_irq(void)
+{
+ LL_USART_EnableIT_PE(USART1);
+ LL_USART_EnableIT_RXNE(USART1);
+ LL_USART_EnableIT_ERROR(USART1);
+ NVIC_SetPriority(USART1_IRQn, 0);
+ NVIC_EnableIRQ(USART1_IRQn);
+}
+
+void board_io_init_standalone_ui(void)
+{
+ GPIO_InitTypeDef gpio_init = {0};
+
+ __HAL_RCC_GPIOG_CLK_ENABLE();
+ __HAL_RCC_GPIOD_CLK_ENABLE();
+
+ HAL_GPIO_WritePin(UI_LCD_RS_GPIO_Port,
+ UI_LCD_RS_Pin | UI_LCD_E_Pin | UI_LCD_D4_Pin | UI_LCD_D5_Pin | UI_LCD_D6_Pin | UI_LCD_D7_Pin,
+ GPIO_PIN_RESET);
+
+ /*
+ * A fixed contrast pin is only a compromise until a potentiometer is
+ * added. Driving V0 low is the safest default for HD44780/SPLC780D-style
+ * modules because it makes characters visible instead of appearing blank.
+ */
+ HAL_GPIO_WritePin(UI_LCD_V0_REF_GPIO_Port, UI_LCD_V0_REF_Pin, GPIO_PIN_RESET);
+
+ gpio_init.Pin = UI_LCD_RS_Pin | UI_LCD_E_Pin | UI_LCD_D4_Pin | UI_LCD_D5_Pin | UI_LCD_D6_Pin | UI_LCD_D7_Pin;
+ gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
+ gpio_init.Pull = GPIO_NOPULL;
+ gpio_init.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(GPIOG, &gpio_init);
+
+ gpio_init.Pin = UI_LCD_V0_REF_Pin;
+ gpio_init.Mode = GPIO_MODE_OUTPUT_PP;
+ gpio_init.Pull = GPIO_NOPULL;
+ gpio_init.Speed = GPIO_SPEED_FREQ_LOW;
+ HAL_GPIO_Init(UI_LCD_V0_REF_GPIO_Port, &gpio_init);
+
+ gpio_init.Pin = UI_BUTTON_Pin;
+ gpio_init.Mode = GPIO_MODE_INPUT;
+ gpio_init.Pull = GPIO_PULLUP;
+ HAL_GPIO_Init(UI_BUTTON_GPIO_Port, &gpio_init);
+
+ board_io_init_lcd_contrast_pwm();
+}
+
+static uint32_t board_io_get_apb1_timer_clock_hz(void)
+{
+ uint32_t pclk1_hz = HAL_RCC_GetPCLK1Freq();
+
+ if ((RCC->CFGR & RCC_CFGR_PPRE1) == RCC_CFGR_PPRE1_DIV1)
+ {
+ return pclk1_hz;
+ }
+
+ return pclk1_hz * 2u;
+}
+
+static void board_io_init_lcd_contrast_pwm(void)
+{
+ GPIO_InitTypeDef gpio_init = {0};
+ TIM_OC_InitTypeDef pwm_channel = {0};
+ uint32_t timer_clock_hz = board_io_get_apb1_timer_clock_hz();
+ uint32_t prescaler_divisor = timer_clock_hz / (UI_LCD_CONTRAST_PWM_FREQUENCY_HZ * UI_LCD_CONTRAST_PWM_PERIOD_COUNTS);
+ uint32_t pulse_counts = ((UI_LCD_CONTRAST_PWM_PERIOD_COUNTS * UI_LCD_CONTRAST_PWM_DUTY_PERMILLE) + 999u) / 1000u;
+
+ if (prescaler_divisor == 0u)
+ {
+ prescaler_divisor = 1u;
+ }
+
+ if (pulse_counts >= UI_LCD_CONTRAST_PWM_PERIOD_COUNTS)
+ {
+ pulse_counts = UI_LCD_CONTRAST_PWM_PERIOD_COUNTS - 1u;
+ }
+
+ __HAL_RCC_GPIOB_CLK_ENABLE();
+ __HAL_RCC_TIM4_CLK_ENABLE();
+
+ /*
+ * This PWM output is intended for the LCD contrast input (V0) through a
+ * simple RC low-pass filter. Keeping it local to board_io.c avoids
+ * spreading board wiring assumptions into higher-level UI code.
+ */
+ gpio_init.Pin = UI_LCD_CONTRAST_PWM_Pin;
+ gpio_init.Mode = GPIO_MODE_AF_PP;
+ gpio_init.Pull = GPIO_NOPULL;
+ gpio_init.Speed = GPIO_SPEED_FREQ_LOW;
+ gpio_init.Alternate = GPIO_AF2_TIM4;
+ HAL_GPIO_Init(UI_LCD_CONTRAST_PWM_GPIO_Port, &gpio_init);
+
+ g_ui_lcd_contrast_pwm_timer.Instance = TIM4;
+ g_ui_lcd_contrast_pwm_timer.Init.Prescaler = (uint32_t)(prescaler_divisor - 1u);
+ g_ui_lcd_contrast_pwm_timer.Init.CounterMode = TIM_COUNTERMODE_UP;
+ g_ui_lcd_contrast_pwm_timer.Init.Period = UI_LCD_CONTRAST_PWM_PERIOD_COUNTS - 1u;
+ g_ui_lcd_contrast_pwm_timer.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ g_ui_lcd_contrast_pwm_timer.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+
+ if (HAL_TIM_PWM_Init(&g_ui_lcd_contrast_pwm_timer) != HAL_OK)
+ {
+ return;
+ }
+
+ pwm_channel.OCMode = TIM_OCMODE_PWM1;
+ pwm_channel.Pulse = pulse_counts;
+ pwm_channel.OCPolarity = TIM_OCPOLARITY_HIGH;
+ pwm_channel.OCFastMode = TIM_OCFAST_DISABLE;
+
+ if (HAL_TIM_PWM_ConfigChannel(&g_ui_lcd_contrast_pwm_timer, &pwm_channel, TIM_CHANNEL_3) != HAL_OK)
+ {
+ return;
+ }
+
+ (void)HAL_TIM_PWM_Start(&g_ui_lcd_contrast_pwm_timer, TIM_CHANNEL_3);
+}
+
+void board_io_reset_runtime_outputs(void)
+{
+ HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
+
+ HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);
+
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
+}
+
+void board_io_configure_spi2_mode(uint32_t polarity, uint32_t phase)
+{
+ if (LL_SPI_IsEnabled(SPI2))
+ {
+ LL_SPI_Disable(SPI2);
+ }
+
+ LL_SPI_SetClockPolarity(SPI2, polarity);
+ LL_SPI_SetClockPhase(SPI2, phase);
+
+ if (!LL_SPI_IsEnabled(SPI2))
+ {
+ LL_SPI_Enable(SPI2);
+ }
+}
+
+bool board_io_is_usb_connected(void)
+{
+ return HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET;
+}
+
+bool board_io_is_sd_card_present(void)
+{
+ return HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET;
+}
+
+bool board_io_is_standalone_ui_button_pressed(void)
+{
+ return HAL_GPIO_ReadPin(UI_BUTTON_GPIO_Port, UI_BUTTON_Pin) == GPIO_PIN_RESET;
+}
+
+void board_io_set_supply_enabled(uint8_t supply_index, bool enabled)
+{
+ GPIO_PinState pin_state = enabled ? GPIO_PIN_SET : GPIO_PIN_RESET;
+
+ if (supply_index == 1u)
+ {
+ HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, pin_state);
+ }
+ else if (supply_index == 2u)
+ {
+ HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, pin_state);
+ }
+}
+
+void board_io_set_laser_enabled(uint8_t laser_index, bool enabled)
+{
+ GPIO_PinState pin_state = enabled ? GPIO_PIN_SET : GPIO_PIN_RESET;
+
+ if (laser_index == 1u)
+ {
+ HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, pin_state);
+ }
+ else if (laser_index == 2u)
+ {
+ HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, pin_state);
+ }
+}
+
+void board_io_set_reference_enabled(uint8_t reference_index, bool enabled)
+{
+ GPIO_PinState pin_state = enabled ? GPIO_PIN_SET : GPIO_PIN_RESET;
+
+ if (reference_index == 1u)
+ {
+ HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, pin_state);
+ }
+ else if (reference_index == 2u)
+ {
+ HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, pin_state);
+ }
+}
+
+void board_io_set_tec_channel_enabled(uint8_t tec_index, bool enabled)
+{
+ GPIO_PinState pin_state = enabled ? GPIO_PIN_SET : GPIO_PIN_RESET;
+
+ if (tec_index == 1u)
+ {
+ HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, pin_state);
+ HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, pin_state);
+ }
+ else if (tec_index == 2u)
+ {
+ HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, pin_state);
+ HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, pin_state);
+ }
+}
+
+void board_io_write_signal(GPIO_TypeDef *port, uint16_t pin, bool level_high)
+{
+ HAL_GPIO_WritePin(port, pin, level_high ? GPIO_PIN_SET : GPIO_PIN_RESET);
+}
+
+void board_io_toggle_debug_pin(void)
+{
+ HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
+}
diff --git a/App/Devices/board_io.h b/App/Devices/board_io.h
new file mode 100644
index 0000000..82388fb
--- /dev/null
+++ b/App/Devices/board_io.h
@@ -0,0 +1,33 @@
+/**
+ * @file board_io.h
+ * @brief Board-specific GPIO and low-level control helpers.
+ *
+ * Architectural note:
+ * This module groups direct GPIO manipulations that are shared across several
+ * devices and services. Doing so keeps register-driving code localised and
+ * prevents high-level services from depending on scattered pin knowledge.
+ */
+
+#ifndef BOARD_IO_H
+#define BOARD_IO_H
+
+#include
+#include
+
+#include "main.h"
+
+void board_io_enable_uart_rx_irq(void);
+void board_io_init_standalone_ui(void);
+void board_io_reset_runtime_outputs(void);
+void board_io_configure_spi2_mode(uint32_t polarity, uint32_t phase);
+bool board_io_is_usb_connected(void);
+bool board_io_is_sd_card_present(void);
+bool board_io_is_standalone_ui_button_pressed(void);
+void board_io_set_supply_enabled(uint8_t supply_index, bool enabled);
+void board_io_set_laser_enabled(uint8_t laser_index, bool enabled);
+void board_io_set_reference_enabled(uint8_t reference_index, bool enabled);
+void board_io_set_tec_channel_enabled(uint8_t tec_index, bool enabled);
+void board_io_toggle_debug_pin(void);
+void board_io_write_signal(GPIO_TypeDef *port, uint16_t pin, bool level_high);
+
+#endif /* BOARD_IO_H */
diff --git a/App/Devices/ds1809_device.c b/App/Devices/ds1809_device.c
new file mode 100644
index 0000000..37d218c
--- /dev/null
+++ b/App/Devices/ds1809_device.c
@@ -0,0 +1,83 @@
+/**
+ * @file ds1809_device.c
+ * @brief DS1809 pulse-based control helper.
+ */
+
+#include "ds1809_device.h"
+
+#include "main.h"
+
+#define DS1809_POSITION_COUNT 64u
+#define DS1809_CPU_PULSE_WIDTH_MS 2u
+#define DS1809_CPU_INTER_PULSE_HIGH_MS 2u
+#define DS1809_CONTROL_PORT_READY_DELAY_MS 10u
+
+static void ds1809_drive_idle_high(void)
+{
+ HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
+}
+
+static void ds1809_pulse_direction(uint8_t increment,
+ uint8_t decrement,
+ uint16_t count,
+ uint16_t low_time_ms,
+ uint16_t high_time_ms)
+{
+ uint16_t pulse_index;
+
+ if ((count == 0u) || ((increment == 0u) && (decrement == 0u)))
+ {
+ ds1809_drive_idle_high();
+ return;
+ }
+
+ ds1809_drive_idle_high();
+
+ for (pulse_index = 0u; pulse_index < count; ++pulse_index)
+ {
+ if (increment != 0u)
+ {
+ HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
+ }
+ if (decrement != 0u)
+ {
+ HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
+ }
+
+ HAL_Delay(low_time_ms);
+ ds1809_drive_idle_high();
+ HAL_Delay(high_time_ms);
+ }
+}
+
+void ds1809_pulse(uint8_t increment, uint8_t decrement, uint16_t count, uint16_t pulse_ms)
+{
+ if (pulse_ms < DS1809_CPU_PULSE_WIDTH_MS)
+ {
+ pulse_ms = DS1809_CPU_PULSE_WIDTH_MS;
+ }
+
+ ds1809_pulse_direction(increment, decrement, count, pulse_ms, pulse_ms);
+}
+
+void ds1809_apply_position_from_min(uint8_t position_from_min)
+{
+ /*
+ * DS1809 CPU-driven timing requirements from the local datasheet:
+ * - a pulse must stay low for longer than 1 ms to count as a step;
+ * - repetitive pulses need at least 1 ms of high time between steps;
+ * - the control inputs are locked out for at least 10 ms after power-up.
+ *
+ * Use 2 ms low/high timing for margin, always drive to the RL end first,
+ * then walk back up to the requested absolute position.
+ */
+ if (position_from_min >= DS1809_POSITION_COUNT)
+ {
+ position_from_min = (uint8_t)(DS1809_POSITION_COUNT - 1u);
+ }
+
+ HAL_Delay(DS1809_CONTROL_PORT_READY_DELAY_MS);
+ ds1809_pulse_direction(0u, 1u, DS1809_POSITION_COUNT, DS1809_CPU_PULSE_WIDTH_MS, DS1809_CPU_INTER_PULSE_HIGH_MS);
+ ds1809_pulse_direction(1u, 0u, position_from_min, DS1809_CPU_PULSE_WIDTH_MS, DS1809_CPU_INTER_PULSE_HIGH_MS);
+}
diff --git a/App/Devices/ds1809_device.h b/App/Devices/ds1809_device.h
new file mode 100644
index 0000000..607d3c7
--- /dev/null
+++ b/App/Devices/ds1809_device.h
@@ -0,0 +1,32 @@
+/**
+ * @file ds1809_device.h
+ * @brief DS1809 pulse-based control helper.
+ */
+
+#ifndef DS1809_DEVICE_H
+#define DS1809_DEVICE_H
+
+#include
+
+/**
+ * @brief Send relative UC/DC pulses using the legacy serial-command semantics.
+ *
+ * @param increment Non-zero to pulse the UC pin.
+ * @param decrement Non-zero to pulse the DC pin.
+ * @param count Number of pulses to issue.
+ * @param pulse_ms Low time and inter-pulse high time, in milliseconds.
+ */
+void ds1809_pulse(uint8_t increment, uint8_t decrement, uint16_t count, uint16_t pulse_ms);
+
+/**
+ * @brief Force the DS1809 to a known absolute position above the minimum tap.
+ *
+ * The helper first overdrives the wiper all the way down to the RL terminal and
+ * then steps back up to the requested tap. This makes the standalone profile
+ * path deterministic even though the DS1809 serial command itself is relative.
+ *
+ * @param position_from_min Number of upward steps above the minimum tap.
+ */
+void ds1809_apply_position_from_min(uint8_t position_from_min);
+
+#endif /* DS1809_DEVICE_H */
diff --git a/App/Devices/laser_dac.c b/App/Devices/laser_dac.c
new file mode 100644
index 0000000..9ed53d0
--- /dev/null
+++ b/App/Devices/laser_dac.c
@@ -0,0 +1,103 @@
+/**
+ * @file laser_dac.c
+ * @brief External DAC access for laser-current and TEC channels.
+ */
+
+#include "laser_dac.h"
+
+#include "board_io.h"
+#include "main.h"
+
+void laser_dac_write_channel(uint8_t channel, uint16_t value)
+{
+ uint32_t timeout;
+
+ if ((channel == 1u) || (channel == 3u))
+ {
+ board_io_configure_spi2_mode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
+ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
+ }
+
+ switch (channel)
+ {
+ case 1u:
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ LL_SPI_TransmitData16(SPI2, value);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ (void)SPI2->DR;
+ break;
+
+ case 2u:
+ if (!LL_SPI_IsEnabled(SPI6))
+ {
+ LL_SPI_Enable(SPI6);
+ }
+ HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI6)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ LL_SPI_TransmitData16(SPI6, value);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI6)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ (void)SPI6->DR;
+ break;
+
+ case 3u:
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ LL_SPI_TransmitData16(SPI2, value);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ (void)SPI2->DR;
+ break;
+
+ case 4u:
+ if (!LL_SPI_IsEnabled(SPI6))
+ {
+ LL_SPI_Enable(SPI6);
+ }
+ HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_TXE(SPI6)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ LL_SPI_TransmitData16(SPI6, value);
+ timeout = 0u;
+ while ((!LL_SPI_IsActiveFlag_RXNE(SPI6)) && (timeout <= 500u))
+ {
+ ++timeout;
+ }
+ (void)SPI6->DR;
+ break;
+
+ default:
+ break;
+ }
+
+ HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
+ HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
+}
diff --git a/App/Devices/laser_dac.h b/App/Devices/laser_dac.h
new file mode 100644
index 0000000..b4beeb3
--- /dev/null
+++ b/App/Devices/laser_dac.h
@@ -0,0 +1,13 @@
+/**
+ * @file laser_dac.h
+ * @brief Drivers for the external laser-current and TEC DAC channels.
+ */
+
+#ifndef LASER_DAC_H
+#define LASER_DAC_H
+
+#include
+
+void laser_dac_write_channel(uint8_t channel, uint16_t value);
+
+#endif /* LASER_DAC_H */
diff --git a/App/Devices/lcd1602_display.c b/App/Devices/lcd1602_display.c
new file mode 100644
index 0000000..abd82d9
--- /dev/null
+++ b/App/Devices/lcd1602_display.c
@@ -0,0 +1,199 @@
+/**
+ * @file lcd1602_display.c
+ * @brief Minimal SPLC780D/HD44780-compatible LCD1602 driver in 4-bit mode.
+ *
+ * Architectural note:
+ * The chosen wiring keeps the whole standalone UI on GPIOG. This driver uses
+ * write-only transfers with fixed delays, which keeps the implementation
+ * compact and avoids a bidirectional R/W pin or extra state.
+ */
+
+#include "lcd1602_display.h"
+
+#include
+#include
+
+#include "main.h"
+
+#define LCD1602_COLUMNS 16u
+#define LCD1602_LINE_1_ADDRESS 0x00u
+#define LCD1602_LINE_2_ADDRESS 0x40u
+#define LCD1602_COMMAND_DELAY_US 50u
+#define LCD1602_CLEAR_DELAY_US 2000u
+#define LCD1602_ENABLE_PULSE_US 1u
+#define LCD1602_POWER_ON_DELAY_US 50000u
+
+#define LCD1602_DATA_MASK (UI_LCD_D4_Pin | UI_LCD_D5_Pin | UI_LCD_D6_Pin | UI_LCD_D7_Pin)
+
+static uint8_t g_cycle_counter_available = 0u;
+
+static void lcd1602_enable_cycle_counter(void);
+static void lcd1602_delay_us(uint32_t delay_us);
+static void lcd1602_write_nibble(uint8_t nibble);
+static void lcd1602_pulse_enable(void);
+static void lcd1602_write_byte(bool is_data, uint8_t value);
+static void lcd1602_write_command(uint8_t command);
+static void lcd1602_write_data(uint8_t value);
+static void lcd1602_set_cursor(uint8_t address);
+static void lcd1602_write_padded_line(const char *text);
+
+void lcd1602_display_init(void)
+{
+ lcd1602_enable_cycle_counter();
+
+ HAL_GPIO_WritePin(UI_LCD_RS_GPIO_Port, UI_LCD_RS_Pin, GPIO_PIN_RESET);
+ HAL_GPIO_WritePin(UI_LCD_E_GPIO_Port, UI_LCD_E_Pin, GPIO_PIN_RESET);
+ UI_LCD_D4_GPIO_Port->BSRR = ((uint32_t)LCD1602_DATA_MASK) << 16u;
+
+ lcd1602_delay_us(LCD1602_POWER_ON_DELAY_US);
+
+ lcd1602_write_nibble(0x03u);
+ lcd1602_delay_us(5000u);
+ lcd1602_write_nibble(0x03u);
+ lcd1602_delay_us(150u);
+ lcd1602_write_nibble(0x03u);
+ lcd1602_delay_us(150u);
+ lcd1602_write_nibble(0x02u);
+ lcd1602_delay_us(LCD1602_COMMAND_DELAY_US);
+
+ lcd1602_write_command(0x28u);
+ lcd1602_write_command(0x08u);
+ lcd1602_write_command(0x01u);
+ lcd1602_write_command(0x06u);
+ lcd1602_write_command(0x0Cu);
+}
+
+void lcd1602_display_set_lines(const char *line1, const char *line2)
+{
+ lcd1602_set_cursor(LCD1602_LINE_1_ADDRESS);
+ lcd1602_write_padded_line(line1);
+ lcd1602_set_cursor(LCD1602_LINE_2_ADDRESS);
+ lcd1602_write_padded_line(line2);
+}
+
+static void lcd1602_enable_cycle_counter(void)
+{
+ uint32_t start_cycles;
+ uint32_t spin;
+
+ CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+ DWT->CYCCNT = 0u;
+ DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk;
+
+ start_cycles = DWT->CYCCNT;
+ for (spin = 0u; spin < 64u; ++spin)
+ {
+ __NOP();
+ }
+
+ /*
+ * DWT-based microsecond delays are convenient, but they are not
+ * guaranteed to be available in every production boot/debug state.
+ * Falling back to HAL_Delay() keeps the LCD optional rather than
+ * letting the standalone UI block the whole firmware startup.
+ */
+ g_cycle_counter_available = (DWT->CYCCNT != start_cycles) ? 1u : 0u;
+}
+
+static void lcd1602_delay_us(uint32_t delay_us)
+{
+ if (delay_us == 0u)
+ {
+ return;
+ }
+
+ if (g_cycle_counter_available != 0u)
+ {
+ uint32_t start_cycles = DWT->CYCCNT;
+ uint32_t target_cycles = delay_us * (SystemCoreClock / 1000000u);
+
+ while ((DWT->CYCCNT - start_cycles) < target_cycles)
+ {
+ }
+ return;
+ }
+
+ while (delay_us > 1000u)
+ {
+ HAL_Delay(1u);
+ delay_us -= 1000u;
+ }
+
+ HAL_Delay(1u);
+}
+
+static void lcd1602_write_nibble(uint8_t nibble)
+{
+ uint32_t bsrr = ((uint32_t)LCD1602_DATA_MASK) << 16u;
+
+ if ((nibble & 0x01u) != 0u)
+ {
+ bsrr |= UI_LCD_D4_Pin;
+ }
+ if ((nibble & 0x02u) != 0u)
+ {
+ bsrr |= UI_LCD_D5_Pin;
+ }
+ if ((nibble & 0x04u) != 0u)
+ {
+ bsrr |= UI_LCD_D6_Pin;
+ }
+ if ((nibble & 0x08u) != 0u)
+ {
+ bsrr |= UI_LCD_D7_Pin;
+ }
+
+ UI_LCD_D4_GPIO_Port->BSRR = bsrr;
+ lcd1602_pulse_enable();
+}
+
+static void lcd1602_pulse_enable(void)
+{
+ HAL_GPIO_WritePin(UI_LCD_E_GPIO_Port, UI_LCD_E_Pin, GPIO_PIN_SET);
+ lcd1602_delay_us(LCD1602_ENABLE_PULSE_US);
+ HAL_GPIO_WritePin(UI_LCD_E_GPIO_Port, UI_LCD_E_Pin, GPIO_PIN_RESET);
+ lcd1602_delay_us(LCD1602_COMMAND_DELAY_US);
+}
+
+static void lcd1602_write_byte(bool is_data, uint8_t value)
+{
+ HAL_GPIO_WritePin(UI_LCD_RS_GPIO_Port, UI_LCD_RS_Pin, is_data ? GPIO_PIN_SET : GPIO_PIN_RESET);
+ lcd1602_write_nibble((uint8_t)(value >> 4u));
+ lcd1602_write_nibble((uint8_t)(value & 0x0Fu));
+}
+
+static void lcd1602_write_command(uint8_t command)
+{
+ lcd1602_write_byte(false, command);
+
+ if ((command == 0x01u) || (command == 0x02u))
+ {
+ lcd1602_delay_us(LCD1602_CLEAR_DELAY_US);
+ }
+}
+
+static void lcd1602_write_data(uint8_t value)
+{
+ lcd1602_write_byte(true, value);
+}
+
+static void lcd1602_set_cursor(uint8_t address)
+{
+ lcd1602_write_command((uint8_t)(0x80u | address));
+}
+
+static void lcd1602_write_padded_line(const char *text)
+{
+ uint8_t index;
+ uint8_t value;
+
+ for (index = 0u; index < LCD1602_COLUMNS; ++index)
+ {
+ value = ' ';
+ if ((text != NULL) && (text[index] != '\0'))
+ {
+ value = (uint8_t)text[index];
+ }
+ lcd1602_write_data(value);
+ }
+}
diff --git a/App/Devices/lcd1602_display.h b/App/Devices/lcd1602_display.h
new file mode 100644
index 0000000..af1909d
--- /dev/null
+++ b/App/Devices/lcd1602_display.h
@@ -0,0 +1,19 @@
+/**
+ * @file lcd1602_display.h
+ * @brief Minimal SPLC780D/HD44780-compatible LCD1602 driver in 4-bit mode.
+ *
+ * Architectural note:
+ * This module owns the LCD bus timing and character writes for the standalone
+ * front panel. High-level services format text elsewhere and call this driver
+ * only with already-prepared 16-character lines.
+ */
+
+#ifndef LCD1602_DISPLAY_H
+#define LCD1602_DISPLAY_H
+
+#include
+
+void lcd1602_display_init(void);
+void lcd1602_display_set_lines(const char *line1, const char *line2);
+
+#endif /* LCD1602_DISPLAY_H */
diff --git a/App/Devices/stm32_dac_output.c b/App/Devices/stm32_dac_output.c
new file mode 100644
index 0000000..d5a3dab
--- /dev/null
+++ b/App/Devices/stm32_dac_output.c
@@ -0,0 +1,45 @@
+/**
+ * @file stm32_dac_output.c
+ * @brief STM32 internal DAC helper for the PA4 analogue output.
+ */
+
+#include "stm32_dac_output.h"
+
+#include "main.h"
+
+#define STM32_DAC_MAX_CODE 4095u
+
+void stm32_dac_output_init(void)
+{
+ GPIO_InitTypeDef gpio_init = {0};
+
+ __HAL_RCC_DAC_CLK_ENABLE();
+ __HAL_RCC_GPIOA_CLK_ENABLE();
+
+ gpio_init.Pin = GPIO_PIN_4;
+ gpio_init.Mode = GPIO_MODE_ANALOG;
+ gpio_init.Pull = GPIO_NOPULL;
+ HAL_GPIO_Init(GPIOA, &gpio_init);
+
+ DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1);
+ DAC->DHR12R1 = 0u;
+}
+
+void stm32_dac_output_set(uint16_t dac_code, uint8_t enabled)
+{
+ if (dac_code > STM32_DAC_MAX_CODE)
+ {
+ dac_code = STM32_DAC_MAX_CODE;
+ }
+
+ DAC->DHR12R1 = dac_code;
+
+ if (enabled != 0u)
+ {
+ DAC->CR |= DAC_CR_EN1;
+ }
+ else
+ {
+ DAC->CR &= ~DAC_CR_EN1;
+ }
+}
diff --git a/App/Devices/stm32_dac_output.h b/App/Devices/stm32_dac_output.h
new file mode 100644
index 0000000..2c98d97
--- /dev/null
+++ b/App/Devices/stm32_dac_output.h
@@ -0,0 +1,14 @@
+/**
+ * @file stm32_dac_output.h
+ * @brief STM32 internal DAC helper for PA4 output generation.
+ */
+
+#ifndef STM32_DAC_OUTPUT_H
+#define STM32_DAC_OUTPUT_H
+
+#include
+
+void stm32_dac_output_init(void);
+void stm32_dac_output_set(uint16_t dac_code, uint8_t enabled);
+
+#endif /* STM32_DAC_OUTPUT_H */
diff --git a/App/Devices/uart_transport.c b/App/Devices/uart_transport.c
new file mode 100644
index 0000000..4646fdd
--- /dev/null
+++ b/App/Devices/uart_transport.c
@@ -0,0 +1,68 @@
+/**
+ * @file uart_transport.c
+ * @brief USART1 transmit helpers used by the application core.
+ */
+
+#include "uart_transport.h"
+
+#include "main.h"
+
+static volatile uint8_t g_dma_busy = 0u;
+
+void uart_transport_init(void)
+{
+ LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+ LL_DMA_ClearFlag_TC7(DMA2);
+ LL_DMA_ClearFlag_TE7(DMA2);
+ LL_USART_EnableDMAReq_TX(USART1);
+ LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
+ LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
+ g_dma_busy = 0u;
+}
+
+void uart_transport_reset(void)
+{
+ g_dma_busy = 0u;
+}
+
+void uart_transport_send_blocking(const uint8_t *data, uint16_t size)
+{
+ uint16_t index;
+
+ for (index = 0u; index < size; ++index)
+ {
+ while (!LL_USART_IsActiveFlag_TXE(USART1))
+ {
+ }
+ LL_USART_TransmitData8(USART1, data[index]);
+ }
+}
+
+void uart_transport_send_dma(const uint8_t *data, uint16_t size)
+{
+ while (g_dma_busy != 0u)
+ {
+ }
+
+ LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
+ LL_DMA_ClearFlag_TC7(DMA2);
+ LL_DMA_ClearFlag_TE7(DMA2);
+ LL_DMA_ConfigAddresses(DMA2,
+ LL_DMA_STREAM_7,
+ (uint32_t)data,
+ LL_USART_DMA_GetRegAddr(USART1, LL_USART_DMA_REG_DATA_TRANSMIT),
+ LL_DMA_GetDataTransferDirection(DMA2, LL_DMA_STREAM_7));
+ LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, size);
+ g_dma_busy = 1u;
+ LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
+}
+
+void uart_transport_mark_dma_complete(void)
+{
+ g_dma_busy = 0u;
+}
+
+bool uart_transport_is_dma_busy(void)
+{
+ return g_dma_busy != 0u;
+}
diff --git a/App/Devices/uart_transport.h b/App/Devices/uart_transport.h
new file mode 100644
index 0000000..92e0b1f
--- /dev/null
+++ b/App/Devices/uart_transport.h
@@ -0,0 +1,19 @@
+/**
+ * @file uart_transport.h
+ * @brief USART1 transmit helpers used by the application core.
+ */
+
+#ifndef UART_TRANSPORT_H
+#define UART_TRANSPORT_H
+
+#include
+#include
+
+void uart_transport_init(void);
+void uart_transport_reset(void);
+void uart_transport_send_blocking(const uint8_t *data, uint16_t size);
+void uart_transport_send_dma(const uint8_t *data, uint16_t size);
+void uart_transport_mark_dma_complete(void);
+bool uart_transport_is_dma_busy(void);
+
+#endif /* UART_TRANSPORT_H */
diff --git a/App/Models/app_types.h b/App/Models/app_types.h
new file mode 100644
index 0000000..79a3787
--- /dev/null
+++ b/App/Models/app_types.h
@@ -0,0 +1,344 @@
+/**
+ * @file app_types.h
+ * @brief Shared application-level types, constants, and protocol identifiers.
+ *
+ * Architectural note:
+ * This header owns the firmware vocabulary used by the modular App layer.
+ * CubeMX-generated headers keep only board-level definitions, while every
+ * application module includes these types to communicate through explicit
+ * interfaces instead of ad-hoc globals and scattered macros.
+ */
+
+#ifndef APP_TYPES_H
+#define APP_TYPES_H
+
+#include
+#include
+#include
+
+/** @brief Total number of 16-bit words in a telemetry frame, including header. */
+#define APP_TELEMETRY_WORD_COUNT 15u
+
+/** @brief Total number of bytes in a telemetry frame. */
+#define APP_TELEMETRY_FRAME_BYTES 30u
+
+/** @brief Maximum number of payload words stored by the UART protocol parser. */
+#define APP_PROTOCOL_MAX_PAYLOAD_WORDS 15u
+
+/** @brief Maximum packet size handled by the UART protocol parser. */
+#define APP_PROTOCOL_MAX_PACKET_BYTES 32u
+
+/** @brief Maximum number of visible characters allowed in a saved profile name. */
+#define APP_PROFILE_NAME_MAX_CHARACTERS 16u
+
+/** @brief Maximum profile display-name length, including the terminating NUL. */
+#define APP_PROFILE_NAME_LENGTH (APP_PROFILE_NAME_MAX_CHARACTERS + 1u)
+
+/** @brief Maximum stored path length for profile and waveform files. */
+#define APP_PROFILE_PATH_LENGTH 96u
+
+/** @brief Future profile list file for SD-card based standalone operation. */
+#define APP_STORAGE_PROFILE_INDEX_FILE "profiles.csv"
+
+/** @brief UART header for the host work-configuration packet. */
+#define APP_PACKET_HEADER_WORK_CONFIG 0x1111u
+
+/** @brief UART header for the "return to defaults" command. */
+#define APP_PACKET_HEADER_DEFAULTS 0x2222u
+
+/** @brief UART header for the "transmit live telemetry" command. */
+#define APP_PACKET_HEADER_TX_CURRENT 0x4444u
+
+/** @brief UART header for the "query state" command. */
+#define APP_PACKET_HEADER_QUERY_STATE 0x6666u
+
+/** @brief UART header for profile-save control packets. */
+#define APP_PACKET_HEADER_PROFILE_SAVE_CONTROL 0x7777u
+
+/** @brief UART header for the AD9102 control packet. */
+#define APP_PACKET_HEADER_AD9102_CONTROL 0x8888u
+
+/** @brief UART header for the AD9833 control packet. */
+#define APP_PACKET_HEADER_AD9833_CONTROL 0x9999u
+
+/** @brief UART header for the DS1809 control packet. */
+#define APP_PACKET_HEADER_DS1809_CONTROL 0xAAAAu
+
+/** @brief UART header for the STM32 internal DAC control packet. */
+#define APP_PACKET_HEADER_STM32_DAC_CONTROL 0xBBBBu
+
+/** @brief UART header for the AD9102 waveform upload control packet. */
+#define APP_PACKET_HEADER_AD9102_WAVE_CONTROL 0xCCCCu
+
+/** @brief UART header for the AD9102 waveform upload data packet. */
+#define APP_PACKET_HEADER_AD9102_WAVE_DATA 0xDDDDu
+
+/** @brief UART header for profile-save data packets. */
+#define APP_PACKET_HEADER_PROFILE_SAVE_DATA 0xEEEEu
+
+/** @brief Packet size of the host work-configuration message, in bytes. */
+#define APP_PACKET_BYTES_WORK_CONFIG 30u
+
+/** @brief Packet size of short control messages, in bytes. */
+#define APP_PACKET_BYTES_SHORT_CONTROL 10u
+
+/** @brief Packet size of AD9102 waveform-data messages, in bytes. */
+#define APP_PACKET_BYTES_AD9102_WAVE_DATA 30u
+
+/** @brief Packet size of profile-save control messages, in bytes. */
+#define APP_PACKET_BYTES_PROFILE_SAVE_CONTROL 30u
+
+/** @brief Packet size of profile-save data messages, in bytes. */
+#define APP_PACKET_BYTES_PROFILE_SAVE_DATA 30u
+
+/** @brief Number of payload words carried by the host work packet. */
+#define APP_PACKET_WORDS_WORK_CONFIG 14u
+
+/** @brief Number of payload words carried by short control packets. */
+#define APP_PACKET_WORDS_SHORT_CONTROL 4u
+
+/** @brief Number of payload words carried by AD9102 waveform-data packets. */
+#define APP_PACKET_WORDS_AD9102_WAVE_DATA 14u
+
+/** @brief Number of payload words carried by profile-save control packets. */
+#define APP_PACKET_WORDS_PROFILE_SAVE_CONTROL 14u
+
+/** @brief Number of payload words carried by profile-save data packets. */
+#define APP_PACKET_WORDS_PROFILE_SAVE_DATA 14u
+
+/** @brief First status byte flag for SD-card related errors. */
+#define APP_STATUS_FLAG_SD_ERROR 0x01u
+
+/** @brief First status byte flag for UART framing/header errors. */
+#define APP_STATUS_FLAG_UART_ERROR 0x02u
+
+/** @brief First status byte flag for checksum or payload validation errors. */
+#define APP_STATUS_FLAG_UART_DECODE_ERROR 0x04u
+
+/** @brief First status byte flag for TEC1-related runtime errors. */
+#define APP_STATUS_FLAG_TEC1_ERROR 0x08u
+
+/** @brief First status byte flag for TEC2-related runtime errors. */
+#define APP_STATUS_FLAG_TEC2_ERROR 0x10u
+
+/** @brief First status byte flag for default/reset handling errors. */
+#define APP_STATUS_FLAG_DEFAULT_ERROR 0x20u
+
+/** @brief First status byte flag for AD9102 configuration/upload errors. */
+#define APP_STATUS_FLAG_AD9102_ERROR 0x80u
+
+/** @brief AD9102 control flag: enable or disable output. */
+#define APP_AD9102_FLAG_ENABLE 0x0001u
+
+/** @brief AD9102 control flag: select triangle instead of saw ramp. */
+#define APP_AD9102_FLAG_TRIANGLE 0x0002u
+
+/** @brief AD9102 control flag: use SRAM-backed waveform path. */
+#define APP_AD9102_FLAG_SRAM 0x0004u
+
+/** @brief AD9102 control flag: use amplitude/sample-count short format. */
+#define APP_AD9102_FLAG_SRAM_FORMAT_ALT 0x0008u
+
+/** @brief AD9833 control flag: enable or disable output. */
+#define APP_AD9833_FLAG_ENABLE 0x0001u
+
+/** @brief AD9833 control flag: select triangle mode. */
+#define APP_AD9833_FLAG_TRIANGLE 0x0002u
+
+/** @brief DS1809 control flag: pulse the "up" control line. */
+#define APP_DS1809_FLAG_INCREMENT 0x0001u
+
+/** @brief DS1809 control flag: pulse the "down" control line. */
+#define APP_DS1809_FLAG_DECREMENT 0x0002u
+
+/** @brief STM32 DAC control flag: enable output buffer/channel. */
+#define APP_STM32_DAC_FLAG_ENABLE 0x0001u
+
+/** @brief Op-code used to begin a custom AD9102 waveform upload. */
+#define APP_AD9102_WAVE_OPCODE_BEGIN 0x0001u
+
+/** @brief Op-code used to commit a custom AD9102 waveform upload. */
+#define APP_AD9102_WAVE_OPCODE_COMMIT 0x0002u
+
+/** @brief Op-code used to cancel a custom AD9102 waveform upload. */
+#define APP_AD9102_WAVE_OPCODE_CANCEL 0x0003u
+
+/** @brief Op-code used to begin a streamed profile-save session. */
+#define APP_PROFILE_SAVE_OPCODE_BEGIN 0x0001u
+
+/** @brief Op-code used to commit a streamed profile-save session. */
+#define APP_PROFILE_SAVE_OPCODE_COMMIT 0x0002u
+
+/** @brief Op-code used to cancel a streamed profile-save session. */
+#define APP_PROFILE_SAVE_OPCODE_CANCEL 0x0003u
+
+/** @brief Section id used for profile INI text chunks during profile save. */
+#define APP_PROFILE_SAVE_SECTION_PROFILE_TEXT 0x0001u
+
+/** @brief Section id used for optional waveform CSV chunks during profile save. */
+#define APP_PROFILE_SAVE_SECTION_WAVEFORM_TEXT 0x0002u
+
+/** @brief Maximum number of raw data bytes carried by one profile-save data packet. */
+#define APP_PROFILE_SAVE_MAX_DATA_BYTES_PER_PACKET 22u
+
+/**
+ * @brief High-level runtime modes executed by the application core.
+ */
+typedef enum app_mode_t {
+ APP_MODE_IDLE = 0,
+ APP_MODE_WORK,
+ APP_MODE_TX_CURRENT,
+ APP_MODE_ERROR
+} app_mode_t;
+
+/**
+ * @brief Deferred application events injected by future UI/GPIO frontends.
+ */
+typedef enum app_event_t {
+ APP_EVENT_NONE = 0,
+ APP_EVENT_PROFILE_NEXT
+} app_event_t;
+
+/**
+ * @brief Internal transmission slots queued by the application core.
+ */
+typedef enum app_tx_request_t {
+ APP_TX_REQUEST_NONE = 0,
+ APP_TX_REQUEST_STATUS,
+ APP_TX_REQUEST_CURRENT_FRAME
+} app_tx_request_t;
+
+/**
+ * @brief Packet kinds emitted by the UART protocol parser.
+ */
+typedef enum app_packet_kind_t {
+ APP_PACKET_KIND_NONE = 0,
+ APP_PACKET_KIND_WORK_CONFIG,
+ APP_PACKET_KIND_DEFAULTS,
+ APP_PACKET_KIND_TX_CURRENT,
+ APP_PACKET_KIND_QUERY_STATE,
+ APP_PACKET_KIND_PROFILE_SAVE_CONTROL,
+ APP_PACKET_KIND_AD9102_CONTROL,
+ APP_PACKET_KIND_AD9833_CONTROL,
+ APP_PACKET_KIND_DS1809_CONTROL,
+ APP_PACKET_KIND_STM32_DAC_CONTROL,
+ APP_PACKET_KIND_AD9102_WAVE_CONTROL,
+ APP_PACKET_KIND_AD9102_WAVE_DATA,
+ APP_PACKET_KIND_PROFILE_SAVE_DATA
+} app_packet_kind_t;
+
+/**
+ * @brief User-visible signal-generation mode for the AD9102 path.
+ */
+typedef enum waveform_mode_t {
+ WAVEFORM_MODE_SAW = 0,
+ WAVEFORM_MODE_SRAM_GENERATED,
+ WAVEFORM_MODE_SRAM_CUSTOM
+} waveform_mode_t;
+
+/**
+ * @brief Packed enable flags and misc runtime settings for the board.
+ */
+typedef struct work_config_t {
+ uint8_t work_enabled;
+ uint8_t supply_5v1_enabled;
+ uint8_t supply_5v2_enabled;
+ uint8_t laser1_enabled;
+ uint8_t laser2_enabled;
+ uint8_t reference1_enabled;
+ uint8_t reference2_enabled;
+ uint8_t tec1_enabled;
+ uint8_t tec2_enabled;
+ uint8_t temp_sensor1_enabled;
+ uint8_t temp_sensor2_enabled;
+ uint8_t pid1_from_host;
+ uint8_t pid2_from_host;
+ uint16_t averages;
+ uint16_t message_id;
+} work_config_t;
+
+/**
+ * @brief Runtime configuration of one laser channel.
+ */
+typedef struct laser_channel_config_t {
+ uint16_t target_temperature_raw;
+ float pid_p;
+ float pid_i;
+ uint16_t current_raw;
+} laser_channel_config_t;
+
+/**
+ * @brief Mutable per-channel runtime state derived from sensor feedback.
+ */
+typedef struct laser_runtime_t {
+ uint16_t current_temperature_raw;
+ float integral_error;
+ uint16_t power_raw;
+} laser_runtime_t;
+
+/**
+ * @brief Normalised configuration for AD9102 waveform control.
+ */
+typedef struct waveform_config_t {
+ waveform_mode_t mode;
+ uint8_t enabled;
+ uint8_t triangle;
+ uint8_t saw_step;
+ uint8_t pat_period_base;
+ uint16_t pat_period;
+ uint16_t sample_count;
+ uint8_t hold_cycles;
+ uint16_t amplitude;
+ char source_path[APP_PROFILE_PATH_LENGTH];
+} waveform_config_t;
+
+/**
+ * @brief AD9833 generator configuration mirrored from the serial-control path.
+ */
+typedef struct ad9833_config_t {
+ uint8_t enabled;
+ uint8_t triangle;
+ uint32_t frequency_word;
+} ad9833_config_t;
+
+/**
+ * @brief STM32 internal DAC configuration mirrored from the serial-control path.
+ */
+typedef struct stm32_dac_config_t {
+ uint8_t enabled;
+ uint16_t code;
+} stm32_dac_config_t;
+
+/**
+ * @brief Absolute DS1809 target expressed as a number of steps above the minimum tap.
+ */
+typedef struct ds1809_config_t {
+ bool apply_position;
+ uint8_t position_from_min;
+} ds1809_config_t;
+
+/**
+ * @brief Standalone profile model loaded from SD-card configuration.
+ */
+typedef struct profile_t {
+ char display_name[APP_PROFILE_NAME_LENGTH];
+ char profile_path[APP_PROFILE_PATH_LENGTH];
+ char waveform_path[APP_PROFILE_PATH_LENGTH];
+ bool auto_run;
+ bool boot_enabled;
+ work_config_t work_config;
+ laser_channel_config_t laser_channels[2];
+ waveform_config_t waveform;
+ ad9833_config_t ad9833;
+ stm32_dac_config_t stm32_dac;
+ ds1809_config_t ds1809;
+} profile_t;
+
+/**
+ * @brief Telemetry frame sent over UART.
+ */
+typedef struct telemetry_frame_t {
+ uint16_t words[APP_TELEMETRY_WORD_COUNT];
+} telemetry_frame_t;
+
+#endif /* APP_TYPES_H */
diff --git a/App/Protocol/app_uart_protocol.c b/App/Protocol/app_uart_protocol.c
new file mode 100644
index 0000000..c8b92d5
--- /dev/null
+++ b/App/Protocol/app_uart_protocol.c
@@ -0,0 +1,162 @@
+/**
+ * @file app_uart_protocol.c
+ * @brief Table-driven incremental UART packet parser and checksum helpers.
+ */
+
+#include "app_uart_protocol.h"
+
+#include
+
+static const app_packet_descriptor_t g_packet_descriptors[] = {
+ {APP_PACKET_HEADER_WORK_CONFIG, APP_PACKET_BYTES_WORK_CONFIG, APP_PACKET_WORDS_WORK_CONFIG, 13, APP_PACKET_KIND_WORK_CONFIG},
+ {APP_PACKET_HEADER_DEFAULTS, 2u, 0u, -1, APP_PACKET_KIND_DEFAULTS},
+ {APP_PACKET_HEADER_TX_CURRENT, 2u, 0u, -1, APP_PACKET_KIND_TX_CURRENT},
+ {APP_PACKET_HEADER_QUERY_STATE, 2u, 0u, -1, APP_PACKET_KIND_QUERY_STATE},
+ {APP_PACKET_HEADER_PROFILE_SAVE_CONTROL, APP_PACKET_BYTES_PROFILE_SAVE_CONTROL, APP_PACKET_WORDS_PROFILE_SAVE_CONTROL, 13, APP_PACKET_KIND_PROFILE_SAVE_CONTROL},
+ {APP_PACKET_HEADER_AD9102_CONTROL, APP_PACKET_BYTES_SHORT_CONTROL, APP_PACKET_WORDS_SHORT_CONTROL, 3, APP_PACKET_KIND_AD9102_CONTROL},
+ {APP_PACKET_HEADER_AD9833_CONTROL, APP_PACKET_BYTES_SHORT_CONTROL, APP_PACKET_WORDS_SHORT_CONTROL, 3, APP_PACKET_KIND_AD9833_CONTROL},
+ {APP_PACKET_HEADER_DS1809_CONTROL, APP_PACKET_BYTES_SHORT_CONTROL, APP_PACKET_WORDS_SHORT_CONTROL, 3, APP_PACKET_KIND_DS1809_CONTROL},
+ {APP_PACKET_HEADER_STM32_DAC_CONTROL, APP_PACKET_BYTES_SHORT_CONTROL, APP_PACKET_WORDS_SHORT_CONTROL, 3, APP_PACKET_KIND_STM32_DAC_CONTROL},
+ {APP_PACKET_HEADER_AD9102_WAVE_CONTROL, APP_PACKET_BYTES_SHORT_CONTROL, APP_PACKET_WORDS_SHORT_CONTROL, 3, APP_PACKET_KIND_AD9102_WAVE_CONTROL},
+ {APP_PACKET_HEADER_AD9102_WAVE_DATA, APP_PACKET_BYTES_AD9102_WAVE_DATA, APP_PACKET_WORDS_AD9102_WAVE_DATA, 13, APP_PACKET_KIND_AD9102_WAVE_DATA},
+ {APP_PACKET_HEADER_PROFILE_SAVE_DATA, APP_PACKET_BYTES_PROFILE_SAVE_DATA, APP_PACKET_WORDS_PROFILE_SAVE_DATA, 13, APP_PACKET_KIND_PROFILE_SAVE_DATA}
+};
+
+static const app_packet_descriptor_t *app_uart_protocol_find_descriptor(uint16_t header)
+{
+ size_t index;
+
+ for (index = 0u; index < (sizeof(g_packet_descriptors) / sizeof(g_packet_descriptors[0])); ++index)
+ {
+ if (g_packet_descriptors[index].header == header)
+ {
+ return &g_packet_descriptors[index];
+ }
+ }
+
+ return NULL;
+}
+
+uint16_t app_protocol_calculate_checksum(const uint16_t *words, uint16_t word_count)
+{
+ uint16_t checksum;
+ uint16_t index;
+
+ if ((words == NULL) || (word_count == 0u))
+ {
+ return 0u;
+ }
+
+ checksum = words[0];
+ for (index = 1u; index < word_count; ++index)
+ {
+ checksum ^= words[index];
+ }
+
+ return checksum;
+}
+
+void app_uart_protocol_init(app_uart_protocol_parser_t *parser)
+{
+ if (parser != NULL)
+ {
+ memset(parser, 0, sizeof(*parser));
+ }
+}
+
+void app_uart_protocol_reset(app_uart_protocol_parser_t *parser)
+{
+ app_uart_protocol_init(parser);
+}
+
+app_protocol_feed_result_t app_uart_protocol_feed_byte(app_uart_protocol_parser_t *parser,
+ uint8_t byte,
+ app_packet_t *out_packet)
+{
+ uint8_t word_index;
+
+ if ((parser == NULL) || (out_packet == NULL))
+ {
+ return APP_PROTOCOL_FEED_IN_PROGRESS;
+ }
+
+ if (parser->bytes_received == 0u)
+ {
+ parser->buffer[0] = byte;
+ parser->partial_header = byte;
+ parser->bytes_received = 1u;
+ return APP_PROTOCOL_FEED_IN_PROGRESS;
+ }
+
+ if (parser->bytes_received == 1u)
+ {
+ parser->buffer[1] = byte;
+ parser->partial_header = (uint16_t)(parser->partial_header | ((uint16_t)byte << 8));
+ parser->descriptor = app_uart_protocol_find_descriptor(parser->partial_header);
+
+ if (parser->descriptor == NULL)
+ {
+ app_uart_protocol_reset(parser);
+ return APP_PROTOCOL_FEED_INVALID_HEADER;
+ }
+
+ parser->bytes_received = 2u;
+ if (parser->descriptor->total_bytes == 2u)
+ {
+ memset(out_packet, 0, sizeof(*out_packet));
+ out_packet->kind = parser->descriptor->kind;
+ out_packet->header = parser->descriptor->header;
+ out_packet->checksum_valid = true;
+ app_uart_protocol_reset(parser);
+ return APP_PROTOCOL_FEED_PACKET_READY;
+ }
+
+ return APP_PROTOCOL_FEED_IN_PROGRESS;
+ }
+
+ if (parser->descriptor == NULL)
+ {
+ app_uart_protocol_reset(parser);
+ return APP_PROTOCOL_FEED_INVALID_HEADER;
+ }
+
+ if (parser->bytes_received >= parser->descriptor->total_bytes)
+ {
+ app_uart_protocol_reset(parser);
+ return APP_PROTOCOL_FEED_INVALID_HEADER;
+ }
+
+ parser->buffer[parser->bytes_received] = byte;
+ ++parser->bytes_received;
+
+ if (parser->bytes_received < parser->descriptor->total_bytes)
+ {
+ return APP_PROTOCOL_FEED_IN_PROGRESS;
+ }
+
+ memset(out_packet, 0, sizeof(*out_packet));
+ out_packet->kind = parser->descriptor->kind;
+ out_packet->header = parser->descriptor->header;
+ out_packet->payload_words = parser->descriptor->payload_words;
+
+ for (word_index = 0u; word_index < parser->descriptor->payload_words; ++word_index)
+ {
+ uint8_t byte_offset = (uint8_t)(2u + (word_index * 2u));
+ out_packet->words[word_index] = (uint16_t)(parser->buffer[byte_offset] |
+ ((uint16_t)parser->buffer[byte_offset + 1u] << 8));
+ }
+
+ if (parser->descriptor->checksum_word_index >= 0)
+ {
+ uint8_t checksum_index = (uint8_t)parser->descriptor->checksum_word_index;
+ out_packet->checksum_valid =
+ app_protocol_calculate_checksum(out_packet->words, checksum_index) == out_packet->words[checksum_index];
+ }
+ else
+ {
+ out_packet->checksum_valid = true;
+ }
+
+ app_uart_protocol_reset(parser);
+ return APP_PROTOCOL_FEED_PACKET_READY;
+}
diff --git a/App/Protocol/app_uart_protocol.h b/App/Protocol/app_uart_protocol.h
new file mode 100644
index 0000000..3d994c7
--- /dev/null
+++ b/App/Protocol/app_uart_protocol.h
@@ -0,0 +1,68 @@
+/**
+ * @file app_uart_protocol.h
+ * @brief Table-driven incremental UART packet parser and checksum helpers.
+ *
+ * Architectural note:
+ * The parser is intentionally transport-agnostic. It receives one byte at a
+ * time from the IRQ adapter, reconstructs packets according to a descriptor
+ * table, validates checksums when applicable, and emits fully decoded packet
+ * objects for the application core.
+ */
+
+#ifndef APP_UART_PROTOCOL_H
+#define APP_UART_PROTOCOL_H
+
+#include
+#include
+
+#include "app_types.h"
+
+/**
+ * @brief Descriptor describing one supported UART packet shape.
+ */
+typedef struct app_packet_descriptor_t {
+ uint16_t header;
+ uint8_t total_bytes;
+ uint8_t payload_words;
+ int8_t checksum_word_index;
+ app_packet_kind_t kind;
+} app_packet_descriptor_t;
+
+/**
+ * @brief Parsed UART packet emitted by the protocol layer.
+ */
+typedef struct app_packet_t {
+ app_packet_kind_t kind;
+ uint16_t header;
+ uint8_t payload_words;
+ bool checksum_valid;
+ uint16_t words[APP_PROTOCOL_MAX_PAYLOAD_WORDS];
+} app_packet_t;
+
+/**
+ * @brief Mutable state of the incremental UART parser.
+ */
+typedef struct app_uart_protocol_parser_t {
+ const app_packet_descriptor_t *descriptor;
+ uint16_t partial_header;
+ uint8_t bytes_received;
+ uint8_t buffer[APP_PROTOCOL_MAX_PACKET_BYTES];
+} app_uart_protocol_parser_t;
+
+/**
+ * @brief Result returned after feeding one byte into the parser.
+ */
+typedef enum app_protocol_feed_result_t {
+ APP_PROTOCOL_FEED_IN_PROGRESS = 0,
+ APP_PROTOCOL_FEED_PACKET_READY,
+ APP_PROTOCOL_FEED_INVALID_HEADER
+} app_protocol_feed_result_t;
+
+void app_uart_protocol_init(app_uart_protocol_parser_t *parser);
+void app_uart_protocol_reset(app_uart_protocol_parser_t *parser);
+app_protocol_feed_result_t app_uart_protocol_feed_byte(app_uart_protocol_parser_t *parser,
+ uint8_t byte,
+ app_packet_t *out_packet);
+uint16_t app_protocol_calculate_checksum(const uint16_t *words, uint16_t word_count);
+
+#endif /* APP_UART_PROTOCOL_H */
diff --git a/App/Services/profile_repository.c b/App/Services/profile_repository.c
new file mode 100644
index 0000000..2e14c80
--- /dev/null
+++ b/App/Services/profile_repository.c
@@ -0,0 +1,525 @@
+/**
+ * @file profile_repository.c
+ * @brief Future SD-card profile repository with minimal standalone parsing.
+ */
+
+#include "profile_repository.h"
+
+#include
+#include
+#include
+#include
+
+#include "ad9102_device.h"
+#include "storage_sd.h"
+
+#define PROFILE_REPOSITORY_BUFFER_SIZE 1024u
+
+static char *profile_repository_trim(char *text)
+{
+ char *end;
+
+ while ((*text != '\0') && isspace((unsigned char)*text))
+ {
+ ++text;
+ }
+
+ if (*text == '\0')
+ {
+ return text;
+ }
+
+ end = text + strlen(text) - 1u;
+ while ((end > text) && isspace((unsigned char)*end))
+ {
+ *end = '\0';
+ --end;
+ }
+
+ return text;
+}
+
+static void profile_repository_copy_string(char *destination, size_t destination_size, const char *source)
+{
+ if ((destination == NULL) || (destination_size == 0u))
+ {
+ return;
+ }
+
+ if (source == NULL)
+ {
+ destination[0] = '\0';
+ return;
+ }
+
+ strncpy(destination, source, destination_size - 1u);
+ destination[destination_size - 1u] = '\0';
+}
+
+static bool profile_repository_parse_bool(const char *value, bool *out_value)
+{
+ if ((value == NULL) || (out_value == NULL))
+ {
+ return false;
+ }
+
+ if ((strcmp(value, "1") == 0) || (strcasecmp(value, "true") == 0) || (strcasecmp(value, "yes") == 0))
+ {
+ *out_value = true;
+ return true;
+ }
+
+ if ((strcmp(value, "0") == 0) || (strcasecmp(value, "false") == 0) || (strcasecmp(value, "no") == 0))
+ {
+ *out_value = false;
+ return true;
+ }
+
+ return false;
+}
+
+static uint16_t profile_repository_parse_u16(const char *value)
+{
+ return (uint16_t)strtoul(value, NULL, 0);
+}
+
+static uint32_t profile_repository_parse_u32(const char *value)
+{
+ return (uint32_t)strtoul(value, NULL, 0);
+}
+
+static float profile_repository_parse_float(const char *value)
+{
+ return strtof(value, NULL);
+}
+
+static void profile_repository_reset_profile(profile_t *profile)
+{
+ memset(profile, 0, sizeof(*profile));
+ profile->auto_run = true;
+ profile->boot_enabled = true;
+ profile->waveform.mode = WAVEFORM_MODE_SAW;
+ profile->waveform.enabled = 1u;
+ profile->waveform.saw_step = 1u;
+ profile->waveform.pat_period_base = 2u;
+ profile->waveform.pat_period = 0xFFFFu;
+ profile->waveform.sample_count = AD9102_SRAM_DEFAULT_SAMPLE_COUNT;
+ profile->waveform.hold_cycles = AD9102_SRAM_DEFAULT_HOLD;
+ profile->waveform.amplitude = AD9102_SRAM_DEFAULT_AMPLITUDE;
+ profile->ds1809.apply_position = false;
+}
+
+static void profile_repository_apply_key_value(profile_t *profile, const char *key, const char *value)
+{
+ bool bool_value;
+
+ if ((profile == NULL) || (key == NULL) || (value == NULL))
+ {
+ return;
+ }
+
+ if (strcmp(key, "profile_name") == 0)
+ {
+ profile_repository_copy_string(profile->display_name, sizeof(profile->display_name), value);
+ }
+ else if (strcmp(key, "auto_run") == 0)
+ {
+ if (profile_repository_parse_bool(value, &bool_value))
+ {
+ profile->auto_run = bool_value;
+ }
+ }
+ else if (strcmp(key, "boot_enabled") == 0)
+ {
+ if (profile_repository_parse_bool(value, &bool_value))
+ {
+ profile->boot_enabled = bool_value;
+ }
+ }
+ else if (strcmp(key, "work_enable") == 0)
+ {
+ profile->work_config.work_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "u5v1_enable") == 0)
+ {
+ profile->work_config.supply_5v1_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "u5v2_enable") == 0)
+ {
+ profile->work_config.supply_5v2_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ld1_enable") == 0)
+ {
+ profile->work_config.laser1_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ld2_enable") == 0)
+ {
+ profile->work_config.laser2_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ref1_enable") == 0)
+ {
+ profile->work_config.reference1_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ref2_enable") == 0)
+ {
+ profile->work_config.reference2_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "tec1_enable") == 0)
+ {
+ profile->work_config.tec1_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "tec2_enable") == 0)
+ {
+ profile->work_config.tec2_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ts1_enable") == 0)
+ {
+ profile->work_config.temp_sensor1_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ts2_enable") == 0)
+ {
+ profile->work_config.temp_sensor2_enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "pid1_from_host") == 0)
+ {
+ profile->work_config.pid1_from_host = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "pid2_from_host") == 0)
+ {
+ profile->work_config.pid2_from_host = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "averages") == 0)
+ {
+ profile->work_config.averages = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "message_id") == 0)
+ {
+ profile->work_config.message_id = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "laser1_target_temp") == 0)
+ {
+ profile->laser_channels[0].target_temperature_raw = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "laser2_target_temp") == 0)
+ {
+ profile->laser_channels[1].target_temperature_raw = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "laser1_current") == 0)
+ {
+ profile->laser_channels[0].current_raw = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "laser2_current") == 0)
+ {
+ profile->laser_channels[1].current_raw = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "laser1_pid_p") == 0)
+ {
+ profile->laser_channels[0].pid_p = profile_repository_parse_float(value);
+ }
+ else if (strcmp(key, "laser1_pid_i") == 0)
+ {
+ profile->laser_channels[0].pid_i = profile_repository_parse_float(value);
+ }
+ else if (strcmp(key, "laser2_pid_p") == 0)
+ {
+ profile->laser_channels[1].pid_p = profile_repository_parse_float(value);
+ }
+ else if (strcmp(key, "laser2_pid_i") == 0)
+ {
+ profile->laser_channels[1].pid_i = profile_repository_parse_float(value);
+ }
+ else if (strcmp(key, "waveform_mode") == 0)
+ {
+ if (strcasecmp(value, "saw") == 0)
+ {
+ profile->waveform.mode = WAVEFORM_MODE_SAW;
+ }
+ else if (strcasecmp(value, "generated_sram") == 0)
+ {
+ profile->waveform.mode = WAVEFORM_MODE_SRAM_GENERATED;
+ }
+ else if (strcasecmp(value, "custom_sram") == 0)
+ {
+ profile->waveform.mode = WAVEFORM_MODE_SRAM_CUSTOM;
+ }
+ }
+ else if (strcmp(key, "waveform_enable") == 0)
+ {
+ profile->waveform.enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_triangle") == 0)
+ {
+ profile->waveform.triangle = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_saw_step") == 0)
+ {
+ profile->waveform.saw_step = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_pat_base") == 0)
+ {
+ profile->waveform.pat_period_base = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_pat_period") == 0)
+ {
+ profile->waveform.pat_period = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_sample_count") == 0)
+ {
+ profile->waveform.sample_count = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_hold_cycles") == 0)
+ {
+ profile->waveform.hold_cycles = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_amplitude") == 0)
+ {
+ profile->waveform.amplitude = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "waveform_source") == 0)
+ {
+ profile_repository_copy_string(profile->waveform.source_path, sizeof(profile->waveform.source_path), value);
+ }
+ else if (strcmp(key, "ad9833_enable") == 0)
+ {
+ profile->ad9833.enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ad9833_triangle") == 0)
+ {
+ profile->ad9833.triangle = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ad9833_frequency_word") == 0)
+ {
+ profile->ad9833.frequency_word = profile_repository_parse_u32(value);
+ }
+ else if (strcmp(key, "stm32_dac_enable") == 0)
+ {
+ profile->stm32_dac.enabled = (uint8_t)profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "stm32_dac_code") == 0)
+ {
+ profile->stm32_dac.code = profile_repository_parse_u16(value);
+ }
+ else if (strcmp(key, "ds1809_apply") == 0)
+ {
+ if (profile_repository_parse_bool(value, &bool_value))
+ {
+ profile->ds1809.apply_position = bool_value;
+ }
+ }
+ else if (strcmp(key, "ds1809_position_from_min") == 0)
+ {
+ profile->ds1809.position_from_min = (uint8_t)profile_repository_parse_u16(value);
+ }
+}
+
+static bool profile_repository_load_ini_file(const char *profile_path, profile_t *profile)
+{
+ char buffer[PROFILE_REPOSITORY_BUFFER_SIZE];
+ UINT bytes_read = 0u;
+ char *cursor;
+ FRESULT result;
+
+ result = storage_sd_read_bytes(profile_path, 0u, buffer, sizeof(buffer) - 1u, &bytes_read);
+ if (result != FR_OK)
+ {
+ return false;
+ }
+
+ buffer[bytes_read] = '\0';
+ cursor = buffer;
+
+ while (*cursor != '\0')
+ {
+ char *line_start = cursor;
+ char *line_end = strpbrk(cursor, "\r\n");
+ char *separator;
+ char *key;
+ char *value;
+
+ if (line_end != NULL)
+ {
+ *line_end = '\0';
+ cursor = line_end + 1;
+ while ((*cursor == '\r') || (*cursor == '\n'))
+ {
+ ++cursor;
+ }
+ }
+ else
+ {
+ cursor += strlen(cursor);
+ }
+
+ line_start = profile_repository_trim(line_start);
+ if ((*line_start == '\0') || (*line_start == '#') || (*line_start == ';'))
+ {
+ continue;
+ }
+
+ separator = strchr(line_start, '=');
+ if (separator == NULL)
+ {
+ continue;
+ }
+
+ *separator = '\0';
+ key = profile_repository_trim(line_start);
+ value = profile_repository_trim(separator + 1);
+ profile_repository_apply_key_value(profile, key, value);
+ }
+
+ return true;
+}
+
+static bool profile_repository_load_by_valid_line_index(uint16_t target_index,
+ profile_t *out_profile,
+ uint16_t *out_total_valid_lines)
+{
+ char buffer[PROFILE_REPOSITORY_BUFFER_SIZE];
+ UINT bytes_read = 0u;
+ char *cursor;
+ uint16_t valid_line_index = 0u;
+ FRESULT result;
+
+ if ((out_profile == NULL) || !storage_sd_file_exists(APP_STORAGE_PROFILE_INDEX_FILE))
+ {
+ return false;
+ }
+
+ result = storage_sd_read_bytes(APP_STORAGE_PROFILE_INDEX_FILE, 0u, buffer, sizeof(buffer) - 1u, &bytes_read);
+ if (result != FR_OK)
+ {
+ return false;
+ }
+
+ buffer[bytes_read] = '\0';
+ cursor = buffer;
+
+ while (*cursor != '\0')
+ {
+ char *line_start = cursor;
+ char *line_end = strpbrk(cursor, "\r\n");
+ char *display_name;
+ char *profile_path;
+ char *waveform_path;
+ char *separator_1;
+ char *separator_2;
+
+ if (line_end != NULL)
+ {
+ *line_end = '\0';
+ cursor = line_end + 1;
+ while ((*cursor == '\r') || (*cursor == '\n'))
+ {
+ ++cursor;
+ }
+ }
+ else
+ {
+ cursor += strlen(cursor);
+ }
+
+ line_start = profile_repository_trim(line_start);
+ if ((*line_start == '\0') || (*line_start == '#') || (*line_start == ';'))
+ {
+ continue;
+ }
+
+ separator_1 = strchr(line_start, ',');
+ if (separator_1 == NULL)
+ {
+ continue;
+ }
+
+ *separator_1 = '\0';
+ separator_2 = strchr(separator_1 + 1, ',');
+ if (separator_2 != NULL)
+ {
+ *separator_2 = '\0';
+ }
+
+ display_name = profile_repository_trim(line_start);
+ profile_path = profile_repository_trim(separator_1 + 1);
+ waveform_path = (separator_2 != NULL) ? profile_repository_trim(separator_2 + 1) : "";
+
+ if (*profile_path == '\0')
+ {
+ continue;
+ }
+
+ if (valid_line_index == target_index)
+ {
+ profile_repository_reset_profile(out_profile);
+ profile_repository_copy_string(out_profile->display_name, sizeof(out_profile->display_name), display_name);
+ profile_repository_copy_string(out_profile->profile_path, sizeof(out_profile->profile_path), profile_path);
+ profile_repository_copy_string(out_profile->waveform_path, sizeof(out_profile->waveform_path), waveform_path);
+ profile_repository_copy_string(out_profile->waveform.source_path,
+ sizeof(out_profile->waveform.source_path),
+ waveform_path);
+
+ if (!profile_repository_load_ini_file(profile_path, out_profile))
+ {
+ return false;
+ }
+
+ if (out_total_valid_lines != NULL)
+ {
+ *out_total_valid_lines = (uint16_t)(valid_line_index + 1u);
+ }
+
+ return true;
+ }
+
+ ++valid_line_index;
+ }
+
+ if (out_total_valid_lines != NULL)
+ {
+ *out_total_valid_lines = valid_line_index;
+ }
+
+ return false;
+}
+
+bool profile_repository_load_first(profile_t *out_profile, uint16_t *out_index)
+{
+ uint16_t total_lines = 0u;
+
+ if (!profile_repository_load_by_valid_line_index(0u, out_profile, &total_lines))
+ {
+ return false;
+ }
+
+ if (out_index != NULL)
+ {
+ *out_index = 0u;
+ }
+
+ return true;
+}
+
+bool profile_repository_load_next(uint16_t *in_out_index, profile_t *out_profile)
+{
+ uint16_t requested_index;
+ uint16_t total_lines = 0u;
+
+ if ((in_out_index == NULL) || (out_profile == NULL))
+ {
+ return false;
+ }
+
+ requested_index = (uint16_t)(*in_out_index + 1u);
+ if (profile_repository_load_by_valid_line_index(requested_index, out_profile, &total_lines))
+ {
+ *in_out_index = requested_index;
+ return true;
+ }
+
+ if ((total_lines == 0u) || !profile_repository_load_by_valid_line_index(0u, out_profile, NULL))
+ {
+ return false;
+ }
+
+ *in_out_index = 0u;
+ return true;
+}
diff --git a/App/Services/profile_repository.h b/App/Services/profile_repository.h
new file mode 100644
index 0000000..e6c1876
--- /dev/null
+++ b/App/Services/profile_repository.h
@@ -0,0 +1,36 @@
+/**
+ * @file profile_repository.h
+ * @brief Future SD-card profile repository with minimal standalone parsing.
+ */
+
+#ifndef PROFILE_REPOSITORY_H
+#define PROFILE_REPOSITORY_H
+
+#include
+#include
+
+#include "app_types.h"
+
+/**
+ * @brief Load the first valid profile listed in `profiles.csv`.
+ *
+ * @param out_profile Destination profile object.
+ * @param out_index Receives the zero-based valid profile index.
+ *
+ * @retval true A valid profile was loaded.
+ * @retval false No valid profile entry was available.
+ */
+bool profile_repository_load_first(profile_t *out_profile, uint16_t *out_index);
+
+/**
+ * @brief Load the next valid profile, wrapping around to the first entry.
+ *
+ * @param in_out_index Current profile index on input, next index on success.
+ * @param out_profile Destination profile object.
+ *
+ * @retval true The next valid profile was loaded.
+ * @retval false No valid profile entry was available.
+ */
+bool profile_repository_load_next(uint16_t *in_out_index, profile_t *out_profile);
+
+#endif /* PROFILE_REPOSITORY_H */
diff --git a/App/Services/profile_storage.c b/App/Services/profile_storage.c
new file mode 100644
index 0000000..e916466
--- /dev/null
+++ b/App/Services/profile_storage.c
@@ -0,0 +1,497 @@
+/**
+ * @file profile_storage.c
+ * @brief Streamed SD-card writer for GUI-initiated profile saves.
+ */
+
+#include "profile_storage.h"
+
+#include
+#include
+#include
+
+#include "app_types.h"
+#include "storage_sd.h"
+
+#define PROFILE_STORAGE_PROFILES_DIR "profiles"
+#define PROFILE_STORAGE_WAVES_DIR "waves"
+#define PROFILE_STORAGE_PROFILE_FILE_TEMPLATE "profiles/PROF%04u.INI"
+#define PROFILE_STORAGE_WAVE_FILE_TEMPLATE "waves/WAVE%04u.CSV"
+#define PROFILE_STORAGE_MAX_FILE_INDEX 9999u
+#define PROFILE_STORAGE_INDEX_LINE_BUFFER_SIZE 192u
+
+typedef struct profile_storage_context_t {
+ bool active;
+ bool profile_file_open;
+ bool waveform_file_open;
+ char display_name[APP_PROFILE_NAME_LENGTH];
+ char profile_path[APP_PROFILE_PATH_LENGTH];
+ char waveform_path[APP_PROFILE_PATH_LENGTH];
+ uint16_t profile_expected_bytes;
+ uint16_t waveform_expected_bytes;
+ uint16_t profile_received_bytes;
+ uint16_t waveform_received_bytes;
+ FIL profile_file;
+ FIL waveform_file;
+ profile_storage_status_t last_status;
+} profile_storage_context_t;
+
+static profile_storage_context_t g_profile_storage;
+
+static profile_storage_status_t profile_storage_set_status(profile_storage_status_t status)
+{
+ g_profile_storage.last_status = status;
+ return status;
+}
+
+static void profile_storage_reset_context(void)
+{
+ memset(&g_profile_storage, 0, sizeof(g_profile_storage));
+ g_profile_storage.last_status = PROFILE_STORAGE_STATUS_OK;
+}
+
+static bool profile_storage_is_name_character_allowed(char character)
+{
+ return (isalnum((unsigned char)character) != 0) ||
+ (character == ' ') ||
+ (character == '-') ||
+ (character == '_');
+}
+
+static bool profile_storage_copy_validated_name(char *destination, size_t destination_size, const char *source)
+{
+ const char *start;
+ const char *end;
+ size_t length;
+ size_t index;
+
+ if ((destination == NULL) || (destination_size < APP_PROFILE_NAME_LENGTH) || (source == NULL))
+ {
+ return false;
+ }
+
+ start = source;
+ while ((*start != '\0') && isspace((unsigned char)*start))
+ {
+ ++start;
+ }
+
+ end = start + strlen(start);
+ while ((end > start) && isspace((unsigned char)end[-1]))
+ {
+ --end;
+ }
+
+ length = (size_t)(end - start);
+ if ((length == 0u) || (length > APP_PROFILE_NAME_MAX_CHARACTERS))
+ {
+ return false;
+ }
+
+ for (index = 0u; index < length; ++index)
+ {
+ if (!profile_storage_is_name_character_allowed(start[index]))
+ {
+ return false;
+ }
+ }
+
+ memcpy(destination, start, length);
+ destination[length] = '\0';
+ return true;
+}
+
+static void profile_storage_clear_session_paths(void)
+{
+ g_profile_storage.display_name[0] = '\0';
+ g_profile_storage.profile_path[0] = '\0';
+ g_profile_storage.waveform_path[0] = '\0';
+}
+
+static void profile_storage_close_open_files(void)
+{
+ if (g_profile_storage.waveform_file_open)
+ {
+ (void)storage_sd_close_file(&g_profile_storage.waveform_file);
+ g_profile_storage.waveform_file_open = false;
+ }
+
+ if (g_profile_storage.profile_file_open)
+ {
+ (void)storage_sd_close_file(&g_profile_storage.profile_file);
+ g_profile_storage.profile_file_open = false;
+ }
+}
+
+static void profile_storage_remove_partial_files(void)
+{
+ if (g_profile_storage.waveform_path[0] != '\0')
+ {
+ (void)storage_sd_remove_file(g_profile_storage.waveform_path);
+ }
+
+ if (g_profile_storage.profile_path[0] != '\0')
+ {
+ (void)storage_sd_remove_file(g_profile_storage.profile_path);
+ }
+}
+
+static void profile_storage_abort_session(void)
+{
+ profile_storage_close_open_files();
+ profile_storage_remove_partial_files();
+ g_profile_storage.active = false;
+ g_profile_storage.profile_expected_bytes = 0u;
+ g_profile_storage.waveform_expected_bytes = 0u;
+ g_profile_storage.profile_received_bytes = 0u;
+ g_profile_storage.waveform_received_bytes = 0u;
+ profile_storage_clear_session_paths();
+}
+
+static profile_storage_status_t profile_storage_format_target_path(char *destination,
+ size_t destination_size,
+ const char *format_string,
+ uint16_t file_index)
+{
+ int written;
+
+ written = snprintf(destination, destination_size, format_string, (unsigned int)file_index);
+ if ((written <= 0) || ((size_t)written >= destination_size))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_FILE_NAME_EXHAUSTED);
+ }
+
+ return PROFILE_STORAGE_STATUS_OK;
+}
+
+static profile_storage_status_t profile_storage_find_free_paths(uint16_t waveform_text_bytes)
+{
+ uint16_t file_index;
+
+ for (file_index = 1u; file_index <= PROFILE_STORAGE_MAX_FILE_INDEX; ++file_index)
+ {
+ FILINFO file_info;
+ FRESULT result;
+ profile_storage_status_t status;
+
+ status = profile_storage_format_target_path(g_profile_storage.profile_path,
+ sizeof(g_profile_storage.profile_path),
+ PROFILE_STORAGE_PROFILE_FILE_TEMPLATE,
+ file_index);
+ if (status != PROFILE_STORAGE_STATUS_OK)
+ {
+ return status;
+ }
+
+ result = storage_sd_stat(g_profile_storage.profile_path, &file_info);
+ if (result == FR_OK)
+ {
+ continue;
+ }
+ if ((result != FR_NO_FILE) && (result != FR_NO_PATH))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_STORAGE_UNAVAILABLE);
+ }
+
+ if (waveform_text_bytes > 0u)
+ {
+ status = profile_storage_format_target_path(g_profile_storage.waveform_path,
+ sizeof(g_profile_storage.waveform_path),
+ PROFILE_STORAGE_WAVE_FILE_TEMPLATE,
+ file_index);
+ if (status != PROFILE_STORAGE_STATUS_OK)
+ {
+ return status;
+ }
+
+ result = storage_sd_stat(g_profile_storage.waveform_path, &file_info);
+ if (result == FR_OK)
+ {
+ continue;
+ }
+ if ((result != FR_NO_FILE) && (result != FR_NO_PATH))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_STORAGE_UNAVAILABLE);
+ }
+ }
+ else
+ {
+ g_profile_storage.waveform_path[0] = '\0';
+ }
+
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+ }
+
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_FILE_NAME_EXHAUSTED);
+}
+
+static profile_storage_status_t profile_storage_open_target_files(void)
+{
+ FRESULT result;
+
+ result = storage_sd_make_directory(PROFILE_STORAGE_PROFILES_DIR);
+ if (result != FR_OK)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_DIRECTORY_ERROR);
+ }
+
+ if (g_profile_storage.waveform_expected_bytes > 0u)
+ {
+ result = storage_sd_make_directory(PROFILE_STORAGE_WAVES_DIR);
+ if (result != FR_OK)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_DIRECTORY_ERROR);
+ }
+ }
+
+ result = storage_sd_open_file(&g_profile_storage.profile_file,
+ g_profile_storage.profile_path,
+ FA_CREATE_ALWAYS | FA_WRITE);
+ if (result != FR_OK)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_FILE_OPEN_ERROR);
+ }
+ g_profile_storage.profile_file_open = true;
+
+ if (g_profile_storage.waveform_expected_bytes > 0u)
+ {
+ result = storage_sd_open_file(&g_profile_storage.waveform_file,
+ g_profile_storage.waveform_path,
+ FA_CREATE_ALWAYS | FA_WRITE);
+ if (result != FR_OK)
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_FILE_OPEN_ERROR);
+ }
+ g_profile_storage.waveform_file_open = true;
+ }
+
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+}
+
+static profile_storage_status_t profile_storage_write_to_file(FIL *file,
+ uint16_t *received_bytes,
+ uint16_t expected_bytes,
+ const uint8_t *data,
+ uint16_t data_size)
+{
+ UINT bytes_written = 0u;
+ FRESULT result;
+
+ if ((file == NULL) || (received_bytes == NULL) || (data == NULL) || (data_size == 0u))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_INVALID_ARGUMENT);
+ }
+
+ if ((uint32_t)(*received_bytes) + (uint32_t)data_size > (uint32_t)expected_bytes)
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_SIZE_MISMATCH);
+ }
+
+ result = f_write(file, data, data_size, &bytes_written);
+ if ((result != FR_OK) || (bytes_written != data_size))
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_WRITE_ERROR);
+ }
+
+ *received_bytes = (uint16_t)(*received_bytes + data_size);
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+}
+
+static profile_storage_status_t profile_storage_append_index_entry(void)
+{
+ char line_buffer[PROFILE_STORAGE_INDEX_LINE_BUFFER_SIZE];
+ FIL index_file;
+ UINT bytes_written = 0u;
+ FRESULT result;
+ int line_length;
+
+ line_length = snprintf(line_buffer,
+ sizeof(line_buffer),
+ "%s,%s,%s\r\n",
+ g_profile_storage.display_name,
+ g_profile_storage.profile_path,
+ g_profile_storage.waveform_path);
+ if ((line_length <= 0) || ((size_t)line_length >= sizeof(line_buffer)))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_INDEX_UPDATE_ERROR);
+ }
+
+ result = storage_sd_open_file(&index_file,
+ APP_STORAGE_PROFILE_INDEX_FILE,
+ FA_OPEN_ALWAYS | FA_WRITE);
+ if (result != FR_OK)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_INDEX_UPDATE_ERROR);
+ }
+
+ result = f_lseek(&index_file, f_size(&index_file));
+ if (result == FR_OK)
+ {
+ result = f_write(&index_file, line_buffer, (UINT)line_length, &bytes_written);
+ }
+ if (result == FR_OK)
+ {
+ result = f_sync(&index_file);
+ }
+
+ (void)storage_sd_close_file(&index_file);
+
+ if ((result != FR_OK) || (bytes_written != (UINT)line_length))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_INDEX_UPDATE_ERROR);
+ }
+
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+}
+
+void profile_storage_init(void)
+{
+ profile_storage_reset_context();
+}
+
+bool profile_storage_is_active(void)
+{
+ return g_profile_storage.active;
+}
+
+profile_storage_status_t profile_storage_get_last_status(void)
+{
+ return g_profile_storage.last_status;
+}
+
+profile_storage_status_t profile_storage_begin(const char *display_name,
+ uint16_t profile_text_bytes,
+ uint16_t waveform_text_bytes)
+{
+ if (profile_storage_is_active())
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_SESSION_ACTIVE);
+ }
+
+ profile_storage_reset_context();
+
+ if (!storage_sd_is_available())
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_STORAGE_UNAVAILABLE);
+ }
+
+ if ((profile_text_bytes == 0u) || !profile_storage_copy_validated_name(g_profile_storage.display_name,
+ sizeof(g_profile_storage.display_name),
+ display_name))
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_NAME_INVALID);
+ }
+
+ g_profile_storage.profile_expected_bytes = profile_text_bytes;
+ g_profile_storage.waveform_expected_bytes = waveform_text_bytes;
+ g_profile_storage.active = true;
+
+ if (profile_storage_find_free_paths(waveform_text_bytes) != PROFILE_STORAGE_STATUS_OK)
+ {
+ g_profile_storage.active = false;
+ return g_profile_storage.last_status;
+ }
+
+ if (profile_storage_open_target_files() != PROFILE_STORAGE_STATUS_OK)
+ {
+ g_profile_storage.active = false;
+ profile_storage_clear_session_paths();
+ return g_profile_storage.last_status;
+ }
+
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+}
+
+profile_storage_status_t profile_storage_write_chunk(uint16_t section_id,
+ const uint8_t *data,
+ uint16_t data_size)
+{
+ if (!g_profile_storage.active)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_NO_ACTIVE_SESSION);
+ }
+
+ if ((data == NULL) || (data_size == 0u) || (data_size > APP_PROFILE_SAVE_MAX_DATA_BYTES_PER_PACKET))
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_INVALID_ARGUMENT);
+ }
+
+ if (section_id == APP_PROFILE_SAVE_SECTION_PROFILE_TEXT)
+ {
+ return profile_storage_write_to_file(&g_profile_storage.profile_file,
+ &g_profile_storage.profile_received_bytes,
+ g_profile_storage.profile_expected_bytes,
+ data,
+ data_size);
+ }
+
+ if ((section_id == APP_PROFILE_SAVE_SECTION_WAVEFORM_TEXT) && g_profile_storage.waveform_file_open)
+ {
+ return profile_storage_write_to_file(&g_profile_storage.waveform_file,
+ &g_profile_storage.waveform_received_bytes,
+ g_profile_storage.waveform_expected_bytes,
+ data,
+ data_size);
+ }
+
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_SECTION_ERROR);
+}
+
+profile_storage_status_t profile_storage_commit(void)
+{
+ if (!g_profile_storage.active)
+ {
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_NO_ACTIVE_SESSION);
+ }
+
+ if ((g_profile_storage.profile_received_bytes != g_profile_storage.profile_expected_bytes) ||
+ (g_profile_storage.waveform_received_bytes != g_profile_storage.waveform_expected_bytes))
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_SIZE_MISMATCH);
+ }
+
+ if (g_profile_storage.profile_file_open && (f_sync(&g_profile_storage.profile_file) != FR_OK))
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_WRITE_ERROR);
+ }
+
+ if (g_profile_storage.waveform_file_open && (f_sync(&g_profile_storage.waveform_file) != FR_OK))
+ {
+ profile_storage_abort_session();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_WRITE_ERROR);
+ }
+
+ profile_storage_close_open_files();
+
+ if (profile_storage_append_index_entry() != PROFILE_STORAGE_STATUS_OK)
+ {
+ profile_storage_remove_partial_files();
+ g_profile_storage.active = false;
+ profile_storage_clear_session_paths();
+ return g_profile_storage.last_status;
+ }
+
+ g_profile_storage.active = false;
+ g_profile_storage.profile_expected_bytes = 0u;
+ g_profile_storage.waveform_expected_bytes = 0u;
+ g_profile_storage.profile_received_bytes = 0u;
+ g_profile_storage.waveform_received_bytes = 0u;
+ profile_storage_clear_session_paths();
+ return profile_storage_set_status(PROFILE_STORAGE_STATUS_OK);
+}
+
+void profile_storage_cancel(void)
+{
+ if (g_profile_storage.active)
+ {
+ profile_storage_abort_session();
+ }
+
+ g_profile_storage.last_status = PROFILE_STORAGE_STATUS_OK;
+}
diff --git a/App/Services/profile_storage.h b/App/Services/profile_storage.h
new file mode 100644
index 0000000..5826691
--- /dev/null
+++ b/App/Services/profile_storage.h
@@ -0,0 +1,50 @@
+/**
+ * @file profile_storage.h
+ * @brief Streamed SD-card writer for GUI-initiated profile saves.
+ *
+ * Architectural note:
+ * The desktop GUI already knows the current human-facing configuration values.
+ * It serialises them into the same INI/CSV text format that standalone boot
+ * understands, while this service owns the SD-card side: validating the
+ * profile name, generating 8.3-compatible file names, streaming incoming text
+ * into files, and updating `profiles.csv` only after the full upload succeeds.
+ */
+
+#ifndef PROFILE_STORAGE_H
+#define PROFILE_STORAGE_H
+
+#include
+#include
+
+/**
+ * @brief Result codes returned by the streamed profile-save service.
+ */
+typedef enum profile_storage_status_t {
+ PROFILE_STORAGE_STATUS_OK = 0,
+ PROFILE_STORAGE_STATUS_INVALID_ARGUMENT,
+ PROFILE_STORAGE_STATUS_NAME_INVALID,
+ PROFILE_STORAGE_STATUS_STORAGE_UNAVAILABLE,
+ PROFILE_STORAGE_STATUS_SESSION_ACTIVE,
+ PROFILE_STORAGE_STATUS_NO_ACTIVE_SESSION,
+ PROFILE_STORAGE_STATUS_DIRECTORY_ERROR,
+ PROFILE_STORAGE_STATUS_FILE_NAME_EXHAUSTED,
+ PROFILE_STORAGE_STATUS_FILE_OPEN_ERROR,
+ PROFILE_STORAGE_STATUS_WRITE_ERROR,
+ PROFILE_STORAGE_STATUS_INDEX_UPDATE_ERROR,
+ PROFILE_STORAGE_STATUS_SIZE_MISMATCH,
+ PROFILE_STORAGE_STATUS_SECTION_ERROR
+} profile_storage_status_t;
+
+void profile_storage_init(void);
+bool profile_storage_is_active(void);
+profile_storage_status_t profile_storage_get_last_status(void);
+profile_storage_status_t profile_storage_begin(const char *display_name,
+ uint16_t profile_text_bytes,
+ uint16_t waveform_text_bytes);
+profile_storage_status_t profile_storage_write_chunk(uint16_t section_id,
+ const uint8_t *data,
+ uint16_t data_size);
+profile_storage_status_t profile_storage_commit(void);
+void profile_storage_cancel(void);
+
+#endif /* PROFILE_STORAGE_H */
diff --git a/App/Services/storage_sd.c b/App/Services/storage_sd.c
new file mode 100644
index 0000000..dabeaba
--- /dev/null
+++ b/App/Services/storage_sd.c
@@ -0,0 +1,214 @@
+/**
+ * @file storage_sd.c
+ * @brief Narrow SD-card storage wrapper built directly on FatFs.
+ */
+
+#include "storage_sd.h"
+
+#include "fatfs.h"
+
+#include "board_io.h"
+
+static uint8_t g_storage_mounted = 0u;
+static uint16_t g_storage_mount_depth = 0u;
+
+bool storage_sd_is_available(void)
+{
+ return board_io_is_sd_card_present();
+}
+
+FRESULT storage_sd_begin(void)
+{
+ FRESULT result;
+
+ if (!storage_sd_is_available())
+ {
+ return FR_NOT_READY;
+ }
+
+ if (g_storage_mount_depth > 0u)
+ {
+ ++g_storage_mount_depth;
+ return FR_OK;
+ }
+
+ result = f_mount(&SDFatFS, SDPath, 1u);
+ if (result == FR_OK)
+ {
+ g_storage_mounted = 1u;
+ g_storage_mount_depth = 1u;
+ }
+
+ return result;
+}
+
+FRESULT storage_sd_end(void)
+{
+ FRESULT result;
+
+ if (g_storage_mount_depth == 0u)
+ {
+ return FR_OK;
+ }
+
+ --g_storage_mount_depth;
+ if (g_storage_mount_depth > 0u)
+ {
+ return FR_OK;
+ }
+
+ result = f_mount(NULL, SDPath, 1u);
+ if (result == FR_OK)
+ {
+ g_storage_mounted = 0u;
+ }
+ else
+ {
+ g_storage_mount_depth = 1u;
+ }
+
+ return result;
+}
+
+FRESULT storage_sd_open_file(FIL *file, const char *path, BYTE mode)
+{
+ FRESULT result;
+
+ if ((file == NULL) || (path == NULL))
+ {
+ return FR_INVALID_PARAMETER;
+ }
+
+ result = storage_sd_begin();
+ if (result != FR_OK)
+ {
+ return result;
+ }
+
+ result = f_open(file, path, mode);
+ if (result != FR_OK)
+ {
+ (void)storage_sd_end();
+ }
+
+ return result;
+}
+
+FRESULT storage_sd_close_file(FIL *file)
+{
+ FRESULT close_result = FR_OK;
+ FRESULT end_result;
+
+ if (file != NULL)
+ {
+ close_result = f_close(file);
+ }
+
+ end_result = storage_sd_end();
+ if (close_result != FR_OK)
+ {
+ return close_result;
+ }
+
+ return end_result;
+}
+
+FRESULT storage_sd_read_bytes(const char *path, FSIZE_t offset, void *data, UINT size, UINT *bytes_read)
+{
+ FIL file;
+ UINT local_bytes_read = 0u;
+ FRESULT result = storage_sd_open_file(&file, path, FA_READ);
+
+ if (result != FR_OK)
+ {
+ return result;
+ }
+
+ result = f_lseek(&file, offset);
+ if (result == FR_OK)
+ {
+ result = f_read(&file, data, size, &local_bytes_read);
+ }
+ (void)storage_sd_close_file(&file);
+
+ if (bytes_read != NULL)
+ {
+ *bytes_read = local_bytes_read;
+ }
+
+ return result;
+}
+
+FRESULT storage_sd_stat(const char *path, FILINFO *out_info)
+{
+ FRESULT result;
+
+ if (path == NULL)
+ {
+ return FR_INVALID_PARAMETER;
+ }
+
+ result = storage_sd_begin();
+ if (result != FR_OK)
+ {
+ return result;
+ }
+
+ result = f_stat(path, out_info);
+ (void)storage_sd_end();
+ return result;
+}
+
+bool storage_sd_file_exists(const char *path)
+{
+ FILINFO info;
+ return storage_sd_stat(path, &info) == FR_OK;
+}
+
+FRESULT storage_sd_make_directory(const char *path)
+{
+ FRESULT result;
+
+ if (path == NULL)
+ {
+ return FR_INVALID_PARAMETER;
+ }
+
+ result = storage_sd_begin();
+ if (result != FR_OK)
+ {
+ return result;
+ }
+
+ result = f_mkdir(path);
+ if (result == FR_EXIST)
+ {
+ result = FR_OK;
+ }
+ (void)storage_sd_end();
+ return result;
+}
+
+FRESULT storage_sd_remove_file(const char *path)
+{
+ FRESULT result;
+
+ if (path == NULL)
+ {
+ return FR_INVALID_PARAMETER;
+ }
+
+ result = storage_sd_begin();
+ if (result != FR_OK)
+ {
+ return result;
+ }
+
+ result = f_unlink(path);
+ if ((result == FR_NO_FILE) || (result == FR_NO_PATH))
+ {
+ result = FR_OK;
+ }
+ (void)storage_sd_end();
+ return result;
+}
diff --git a/App/Services/storage_sd.h b/App/Services/storage_sd.h
new file mode 100644
index 0000000..f432152
--- /dev/null
+++ b/App/Services/storage_sd.h
@@ -0,0 +1,30 @@
+/**
+ * @file storage_sd.h
+ * @brief Narrow SD-card storage wrapper built directly on FatFs.
+ *
+ * Architectural note:
+ * An earlier storage layer mixed allocation-heavy tutorial helpers with
+ * application-specific policies. This service now exposes only the minimal
+ * file-oriented operations needed by profile loading and streamed profile
+ * saving, while keeping FatFs details out of higher-level services.
+ */
+
+#ifndef STORAGE_SD_H
+#define STORAGE_SD_H
+
+#include
+
+#include "ff.h"
+
+bool storage_sd_is_available(void);
+FRESULT storage_sd_begin(void);
+FRESULT storage_sd_end(void);
+FRESULT storage_sd_read_bytes(const char *path, FSIZE_t offset, void *data, UINT size, UINT *bytes_read);
+FRESULT storage_sd_open_file(FIL *file, const char *path, BYTE mode);
+FRESULT storage_sd_close_file(FIL *file);
+FRESULT storage_sd_stat(const char *path, FILINFO *out_info);
+bool storage_sd_file_exists(const char *path);
+FRESULT storage_sd_make_directory(const char *path);
+FRESULT storage_sd_remove_file(const char *path);
+
+#endif /* STORAGE_SD_H */
diff --git a/App/Services/telemetry.c b/App/Services/telemetry.c
new file mode 100644
index 0000000..166ea0d
--- /dev/null
+++ b/App/Services/telemetry.c
@@ -0,0 +1,87 @@
+/**
+ * @file telemetry.c
+ * @brief Telemetry-frame creation, checksum finalisation, and serialisation.
+ */
+
+#include "telemetry.h"
+
+#include
+
+#include "app_uart_protocol.h"
+
+void telemetry_reset(telemetry_frame_t *frame)
+{
+ if (frame == NULL)
+ {
+ return;
+ }
+
+ memset(frame->words, 0, sizeof(frame->words));
+ frame->words[0] = APP_PACKET_HEADER_WORK_CONFIG;
+}
+
+void telemetry_set_message_id(telemetry_frame_t *frame, uint16_t message_id)
+{
+ if (frame != NULL)
+ {
+ frame->words[13] = message_id;
+ }
+}
+
+void telemetry_set_live_data(telemetry_frame_t *frame,
+ uint16_t laser1_power,
+ uint16_t laser2_power,
+ uint32_t tick_10ms,
+ uint16_t laser1_temperature,
+ uint16_t laser2_temperature,
+ uint16_t adc_slot_7,
+ uint16_t adc_slot_8,
+ uint16_t adc_slot_9,
+ uint16_t adc_slot_10,
+ uint16_t adc_slot_11,
+ uint16_t adc_slot_12)
+{
+ if (frame == NULL)
+ {
+ return;
+ }
+
+ frame->words[1] = laser1_power;
+ frame->words[2] = laser2_power;
+ frame->words[3] = (uint16_t)(tick_10ms & 0xFFFFu);
+ frame->words[4] = (uint16_t)((tick_10ms >> 16) & 0xFFFFu);
+ frame->words[5] = laser1_temperature;
+ frame->words[6] = laser2_temperature;
+ frame->words[7] = adc_slot_7;
+ frame->words[8] = adc_slot_8;
+ frame->words[9] = adc_slot_9;
+ frame->words[10] = adc_slot_10;
+ frame->words[11] = adc_slot_11;
+ frame->words[12] = adc_slot_12;
+}
+
+void telemetry_finalize(telemetry_frame_t *frame)
+{
+ if (frame == NULL)
+ {
+ return;
+ }
+
+ frame->words[14] = app_protocol_calculate_checksum(&frame->words[1], 13u);
+}
+
+void telemetry_to_bytes(const telemetry_frame_t *frame, uint8_t *out_bytes)
+{
+ uint8_t index;
+
+ if ((frame == NULL) || (out_bytes == NULL))
+ {
+ return;
+ }
+
+ for (index = 0u; index < APP_TELEMETRY_WORD_COUNT; ++index)
+ {
+ out_bytes[index * 2u] = (uint8_t)(frame->words[index] & 0x00FFu);
+ out_bytes[(index * 2u) + 1u] = (uint8_t)((frame->words[index] >> 8) & 0x00FFu);
+ }
+}
diff --git a/App/Services/telemetry.h b/App/Services/telemetry.h
new file mode 100644
index 0000000..c1068c4
--- /dev/null
+++ b/App/Services/telemetry.h
@@ -0,0 +1,30 @@
+/**
+ * @file telemetry.h
+ * @brief Telemetry-frame creation, checksum finalisation, and serialisation.
+ */
+
+#ifndef TELEMETRY_H
+#define TELEMETRY_H
+
+#include
+
+#include "app_types.h"
+
+void telemetry_reset(telemetry_frame_t *frame);
+void telemetry_set_message_id(telemetry_frame_t *frame, uint16_t message_id);
+void telemetry_set_live_data(telemetry_frame_t *frame,
+ uint16_t laser1_power,
+ uint16_t laser2_power,
+ uint32_t tick_10ms,
+ uint16_t laser1_temperature,
+ uint16_t laser2_temperature,
+ uint16_t adc_slot_7,
+ uint16_t adc_slot_8,
+ uint16_t adc_slot_9,
+ uint16_t adc_slot_10,
+ uint16_t adc_slot_11,
+ uint16_t adc_slot_12);
+void telemetry_finalize(telemetry_frame_t *frame);
+void telemetry_to_bytes(const telemetry_frame_t *frame, uint8_t *out_bytes);
+
+#endif /* TELEMETRY_H */
diff --git a/App/Services/temperature_control.c b/App/Services/temperature_control.c
new file mode 100644
index 0000000..ff82d42
--- /dev/null
+++ b/App/Services/temperature_control.c
@@ -0,0 +1,67 @@
+/**
+ * @file temperature_control.c
+ * @brief Temperature-control services for the laser TEC loops.
+ */
+
+#include "temperature_control.h"
+
+uint16_t temperature_control_compute_pid(const laser_channel_config_t *channel_config,
+ laser_runtime_t *runtime_state,
+ uint8_t channel_index,
+ uint32_t current_tick_1ms,
+ uint32_t *shared_pid_reference_tick)
+{
+ int32_t error;
+ float proportional_gain;
+ float integral_term;
+ int32_t output;
+
+ if ((channel_config == NULL) || (runtime_state == NULL) || (shared_pid_reference_tick == NULL))
+ {
+ return 32768u;
+ }
+
+ error = (int32_t)runtime_state->current_temperature_raw - (int32_t)channel_config->target_temperature_raw;
+ integral_term = runtime_state->integral_error;
+
+ if ((error < 3000) && (error > -3000))
+ {
+ integral_term += channel_config->pid_i *
+ (float)error *
+ (float)(current_tick_1ms - *shared_pid_reference_tick) /
+ 100.0f;
+ }
+
+ proportional_gain = channel_config->pid_p;
+
+ if (integral_term > 32000.0f)
+ {
+ integral_term = 32000.0f;
+ }
+ else if (integral_term < -32000.0f)
+ {
+ integral_term = -32000.0f;
+ }
+
+ runtime_state->integral_error = integral_term;
+
+ output = 32768 + (int32_t)(proportional_gain * (float)error) + (int32_t)integral_term;
+
+ if (output < 1000)
+ {
+ output = 8800;
+ }
+ else if (output > 56800)
+ {
+ output = 56800;
+ }
+
+ /* Both PID channels use a shared timing reference updated after the
+ * second TEC computation. This preserves the original controller timing. */
+ if (channel_index == 2u)
+ {
+ *shared_pid_reference_tick = current_tick_1ms;
+ }
+
+ return (uint16_t)output;
+}
diff --git a/App/Services/temperature_control.h b/App/Services/temperature_control.h
new file mode 100644
index 0000000..b1ccf1e
--- /dev/null
+++ b/App/Services/temperature_control.h
@@ -0,0 +1,19 @@
+/**
+ * @file temperature_control.h
+ * @brief Temperature-control services for the laser TEC loops.
+ */
+
+#ifndef TEMPERATURE_CONTROL_H
+#define TEMPERATURE_CONTROL_H
+
+#include
+
+#include "app_types.h"
+
+uint16_t temperature_control_compute_pid(const laser_channel_config_t *channel_config,
+ laser_runtime_t *runtime_state,
+ uint8_t channel_index,
+ uint32_t current_tick_1ms,
+ uint32_t *shared_pid_reference_tick);
+
+#endif /* TEMPERATURE_CONTROL_H */
diff --git a/App/Services/ui_status.c b/App/Services/ui_status.c
new file mode 100644
index 0000000..308fa40
--- /dev/null
+++ b/App/Services/ui_status.c
@@ -0,0 +1,237 @@
+/**
+ * @file ui_status.c
+ * @brief Standalone LCD/button frontend for profile-driven operation.
+ *
+ * Architectural note:
+ * This service owns all user-facing status formatting and button debouncing.
+ * The application core pushes state into this module, while this module
+ * returns high-level events such as "select next profile".
+ */
+
+#include "ui_status.h"
+
+#include
+#include
+#include
+
+#include "board_io.h"
+#include "lcd1602_display.h"
+
+#define UI_STATUS_LCD_COLUMNS 16u
+#define UI_STATUS_BUTTON_DEBOUNCE_TICKS_10MS 3u
+
+typedef struct ui_button_state_t {
+ bool raw_pressed;
+ bool stable_pressed;
+ uint32_t last_change_tick_10ms;
+} ui_button_state_t;
+
+static char g_profile_name[APP_PROFILE_NAME_LENGTH];
+static app_mode_t g_mode = APP_MODE_IDLE;
+static uint8_t g_error_flags = 0u;
+static uint8_t g_initialised = 0u;
+static uint8_t g_display_dirty = 0u;
+static ui_button_state_t g_button = {false, false, 0u};
+
+static void ui_status_mark_dirty(void);
+static void ui_status_copy_padded(char *destination, const char *source);
+static const char *ui_status_mode_name(app_mode_t mode);
+static void ui_status_build_line_1(char *line_buffer);
+static void ui_status_build_line_2(char *line_buffer);
+static void ui_status_refresh_display(void);
+
+void ui_status_init(void)
+{
+ bool raw_pressed;
+
+ memset(g_profile_name, 0, sizeof(g_profile_name));
+ g_mode = APP_MODE_IDLE;
+ g_error_flags = 0u;
+
+ board_io_init_standalone_ui();
+ raw_pressed = board_io_is_standalone_ui_button_pressed();
+
+ /*
+ * Synchronise the debounce state with the physical input level at boot.
+ * This prevents a stuck-low or already-held button from generating a
+ * synthetic "next profile" event immediately after startup.
+ */
+ g_button.raw_pressed = raw_pressed;
+ g_button.stable_pressed = raw_pressed;
+ g_button.last_change_tick_10ms = 0u;
+
+ lcd1602_display_init();
+
+ g_initialised = 1u;
+ g_display_dirty = 1u;
+ ui_status_refresh_display();
+}
+
+void ui_status_set_profile_name(const char *profile_name)
+{
+ char next_name[APP_PROFILE_NAME_LENGTH] = {0};
+
+ if (profile_name != NULL)
+ {
+ strncpy(next_name, profile_name, sizeof(next_name) - 1u);
+ }
+
+ if (strncmp(g_profile_name, next_name, sizeof(g_profile_name)) != 0)
+ {
+ memcpy(g_profile_name, next_name, sizeof(g_profile_name));
+ ui_status_mark_dirty();
+ }
+}
+
+void ui_status_set_mode(app_mode_t mode)
+{
+ /*
+ * TX_CURRENT is a transient transport state rather than a user-visible
+ * operating mode. Ignoring it prevents needless LCD churn during polling.
+ */
+ if (mode == APP_MODE_TX_CURRENT)
+ {
+ return;
+ }
+
+ if (g_mode != mode)
+ {
+ g_mode = mode;
+ ui_status_mark_dirty();
+ }
+}
+
+void ui_status_set_error(uint8_t error_flags)
+{
+ if (g_error_flags != error_flags)
+ {
+ g_error_flags = error_flags;
+ ui_status_mark_dirty();
+ }
+}
+
+app_event_t ui_status_poll_event(uint32_t tick_10ms)
+{
+ bool raw_pressed = board_io_is_standalone_ui_button_pressed();
+ app_event_t event = APP_EVENT_NONE;
+
+ if (raw_pressed != g_button.raw_pressed)
+ {
+ g_button.raw_pressed = raw_pressed;
+ g_button.last_change_tick_10ms = tick_10ms;
+ }
+ else if ((tick_10ms - g_button.last_change_tick_10ms) >= UI_STATUS_BUTTON_DEBOUNCE_TICKS_10MS)
+ {
+ if (g_button.stable_pressed != g_button.raw_pressed)
+ {
+ g_button.stable_pressed = g_button.raw_pressed;
+ if (g_button.stable_pressed)
+ {
+ event = APP_EVENT_PROFILE_NEXT;
+ }
+ }
+ }
+
+ if (g_display_dirty != 0u)
+ {
+ ui_status_refresh_display();
+ }
+
+ return event;
+}
+
+static void ui_status_mark_dirty(void)
+{
+ g_display_dirty = 1u;
+}
+
+static void ui_status_copy_padded(char *destination, const char *source)
+{
+ size_t index;
+
+ for (index = 0u; index < UI_STATUS_LCD_COLUMNS; ++index)
+ {
+ destination[index] = ' ';
+ }
+ destination[UI_STATUS_LCD_COLUMNS] = '\0';
+
+ if (source == NULL)
+ {
+ return;
+ }
+
+ for (index = 0u; (index < UI_STATUS_LCD_COLUMNS) && (source[index] != '\0'); ++index)
+ {
+ destination[index] = source[index];
+ }
+}
+
+static const char *ui_status_mode_name(app_mode_t mode)
+{
+ switch (mode)
+ {
+ case APP_MODE_WORK:
+ return "WORK";
+
+ case APP_MODE_ERROR:
+ return "ERROR";
+
+ case APP_MODE_IDLE:
+ default:
+ return "IDLE";
+ }
+}
+
+static void ui_status_build_line_1(char *line_buffer)
+{
+ const char *label = g_profile_name;
+
+ if (line_buffer == NULL)
+ {
+ return;
+ }
+
+ if (label[0] == '\0')
+ {
+ label = (g_mode == APP_MODE_WORK) ? "Manual control" : "No profile";
+ }
+
+ ui_status_copy_padded(line_buffer, label);
+}
+
+static void ui_status_build_line_2(char *line_buffer)
+{
+ char status_text[UI_STATUS_LCD_COLUMNS + 1u];
+
+ if (line_buffer == NULL)
+ {
+ return;
+ }
+
+ if (g_error_flags == 0u)
+ {
+ (void)snprintf(status_text, sizeof(status_text), "%s OK", ui_status_mode_name(g_mode));
+ }
+ else
+ {
+ (void)snprintf(status_text, sizeof(status_text), "%s ERR %02X", ui_status_mode_name(g_mode), g_error_flags);
+ }
+
+ ui_status_copy_padded(line_buffer, status_text);
+}
+
+static void ui_status_refresh_display(void)
+{
+ char line_1[UI_STATUS_LCD_COLUMNS + 1u];
+ char line_2[UI_STATUS_LCD_COLUMNS + 1u];
+
+ if (g_initialised == 0u)
+ {
+ return;
+ }
+
+ ui_status_build_line_1(line_1);
+ ui_status_build_line_2(line_2);
+ lcd1602_display_set_lines(line_1, line_2);
+ g_display_dirty = 0u;
+}
diff --git a/App/Services/ui_status.h b/App/Services/ui_status.h
new file mode 100644
index 0000000..30b6025
--- /dev/null
+++ b/App/Services/ui_status.h
@@ -0,0 +1,19 @@
+/**
+ * @file ui_status.h
+ * @brief Future LCD/UI abstraction used by standalone profile mode.
+ */
+
+#ifndef UI_STATUS_H
+#define UI_STATUS_H
+
+#include
+
+#include "app_types.h"
+
+void ui_status_init(void);
+void ui_status_set_profile_name(const char *profile_name);
+void ui_status_set_mode(app_mode_t mode);
+void ui_status_set_error(uint8_t error_flags);
+app_event_t ui_status_poll_event(uint32_t tick_10ms);
+
+#endif /* UI_STATUS_H */
diff --git a/AD7686.pdf b/Datasheets/AD7686.pdf
similarity index 100%
rename from AD7686.pdf
rename to Datasheets/AD7686.pdf
diff --git a/DACUSAGE.pdf b/Datasheets/DACUSAGE.pdf
similarity index 100%
rename from DACUSAGE.pdf
rename to Datasheets/DACUSAGE.pdf
diff --git a/DS1809.pdf b/Datasheets/DS1809.pdf
similarity index 100%
rename from DS1809.pdf
rename to Datasheets/DS1809.pdf
diff --git a/ad9102.pdf b/Datasheets/ad9102.pdf
similarity index 100%
rename from ad9102.pdf
rename to Datasheets/ad9102.pdf
diff --git a/ad9833.pdf b/Datasheets/ad9833.pdf
similarity index 100%
rename from ad9833.pdf
rename to Datasheets/ad9833.pdf
diff --git a/Examples/SD_Card/README.md b/Examples/SD_Card/README.md
new file mode 100644
index 0000000..fbf8f22
--- /dev/null
+++ b/Examples/SD_Card/README.md
@@ -0,0 +1,70 @@
+SD card example layout
+
+Firmware expects a plain FAT volume handled by FatFs. In this project `exFAT` is disabled in [ffconf.h](/home/europa/Desktop/RadioPhotonic_PCB_software/Inc/ffconf.h:213), so the safe choice is `FAT32` with a standard MBR partition.
+
+Recommended card preparation:
+
+1. Format the card as `FAT32`.
+2. Copy the files from this directory to the root of the SD card, or keep the same relative folder structure.
+3. Make sure `profiles.csv` is present at the root path expected by the firmware.
+
+Expected file set:
+
+- `profiles.csv`
+- `profiles/profile_1_saw.ini`
+- `profiles/profile_2_custom_wave.ini`
+- `waves/wave_custom.csv`
+
+`profiles.csv` format:
+
+- One profile per line.
+- Columns: `display_name, profile_ini_path, optional_waveform_csv_path`
+- Empty lines are ignored.
+- Lines starting with `#` or `;` are ignored.
+
+Example:
+
+```csv
+Factory Saw,profiles/profile_1_saw.ini,
+Custom SRAM,profiles/profile_2_custom_wave.ini,waves/wave_custom.csv
+```
+
+Profile `.ini` format:
+
+- One `key=value` pair per line.
+- Empty lines are ignored.
+- Lines starting with `#` or `;` are ignored.
+- Unknown keys are ignored.
+
+Additional profile-controlled devices:
+
+- `AD9102` waveform settings are stored through the `waveform_*` keys.
+- `AD9833` settings are stored through `ad9833_enable`, `ad9833_triangle`, and `ad9833_frequency_word`.
+- STM32 internal DAC settings are stored through `stm32_dac_enable` and `stm32_dac_code`.
+- `DS1809` is stored as an absolute target above the minimum tap using `ds1809_apply` and `ds1809_position_from_min`.
+
+Notes:
+
+- `ad9833_frequency_word` uses the same raw 28-bit tuning word that the old serial command accepted.
+- `ds1809_position_from_min` is clamped to the valid `0..63` range by the firmware.
+- When `ds1809_apply=true`, the firmware first drives the potentiometer fully down and then steps it up to the requested absolute position.
+
+Waveform file format:
+
+- The firmware scans the file with `strtol()`.
+- Any integer token found in the file becomes one AD9102 SRAM sample.
+- Separators may be commas, spaces, tabs, or newlines.
+- Do not put comments or stray digits into the waveform file, because any parsed integer will be treated as a sample.
+
+Supported `waveform_mode` values:
+
+- `saw`
+- `generated_sram`
+- `custom_sram`
+
+Minimal boot behavior:
+
+- On startup the firmware loads the first valid line from `profiles.csv`.
+- It then loads the referenced profile `.ini`.
+- If `boot_enabled=true`, the profile is activated.
+- If `auto_run=true`, the board immediately enters `WORK` mode.
diff --git a/Examples/SD_Card/profiles.csv b/Examples/SD_Card/profiles.csv
new file mode 100644
index 0000000..616624e
--- /dev/null
+++ b/Examples/SD_Card/profiles.csv
@@ -0,0 +1,3 @@
+# display_name, profile_ini_path, optional_waveform_csv_path
+Factory Saw,profiles/prof1.ini,
+Custom SRAM,profiles/prof2.ini,waves/wave1.csv
diff --git a/Examples/SD_Card/profiles/PROF1.INI b/Examples/SD_Card/profiles/PROF1.INI
new file mode 100644
index 0000000..396749e
--- /dev/null
+++ b/Examples/SD_Card/profiles/PROF1.INI
@@ -0,0 +1,47 @@
+# Profile 1: standard saw waveform, immediate boot and auto-run.
+profile_name=Factory Saw
+boot_enabled=true
+auto_run=true
+
+work_enable=1
+u5v1_enable=1
+u5v2_enable=1
+ld1_enable=1
+ld2_enable=1
+ref1_enable=1
+ref2_enable=1
+tec1_enable=1
+tec2_enable=1
+ts1_enable=1
+ts2_enable=1
+
+pid1_from_host=1
+pid2_from_host=1
+averages=16
+message_id=100
+
+laser1_target_temp=2500
+laser2_target_temp=2520
+laser1_current=1200
+laser2_current=1180
+laser1_pid_p=10.0
+laser1_pid_i=0.01
+laser2_pid_p=10.0
+laser2_pid_i=0.01
+
+waveform_mode=saw
+waveform_enable=1
+waveform_triangle=0
+waveform_saw_step=4
+waveform_pat_base=2
+waveform_pat_period=65535
+
+ad9833_enable=0
+ad9833_triangle=0
+ad9833_frequency_word=0
+
+stm32_dac_enable=0
+stm32_dac_code=0
+
+ds1809_apply=true
+ds1809_position_from_min=0
diff --git a/Examples/SD_Card/profiles/PROF2.INI b/Examples/SD_Card/profiles/PROF2.INI
new file mode 100644
index 0000000..489296e
--- /dev/null
+++ b/Examples/SD_Card/profiles/PROF2.INI
@@ -0,0 +1,51 @@
+# Profile 2: custom waveform loaded from a separate CSV file.
+profile_name=Custom SRAM
+boot_enabled=true
+auto_run=true
+
+work_enable=1
+u5v1_enable=1
+u5v2_enable=1
+ld1_enable=1
+ld2_enable=0
+ref1_enable=1
+ref2_enable=0
+tec1_enable=1
+tec2_enable=0
+ts1_enable=1
+ts2_enable=0
+
+pid1_from_host=1
+pid2_from_host=1
+averages=16
+message_id=200
+
+laser1_target_temp=2480
+laser2_target_temp=0
+laser1_current=1350
+laser2_current=0
+laser1_pid_p=9.5
+laser1_pid_i=0.02
+laser2_pid_p=0.0
+laser2_pid_i=0.0
+
+waveform_mode=custom_sram
+waveform_enable=1
+waveform_triangle=0
+waveform_saw_step=1
+waveform_pat_base=2
+waveform_pat_period=65535
+waveform_sample_count=16
+waveform_hold_cycles=8
+waveform_amplitude=4095
+waveform_source=waves/wave1.csv
+
+ad9833_enable=1
+ad9833_triangle=0
+ad9833_frequency_word=0x00123456
+
+stm32_dac_enable=1
+stm32_dac_code=2048
+
+ds1809_apply=true
+ds1809_position_from_min=18
diff --git a/Examples/SD_Card/waves/WAVE1.CSV b/Examples/SD_Card/waves/WAVE1.CSV
new file mode 100644
index 0000000..095bc72
--- /dev/null
+++ b/Examples/SD_Card/waves/WAVE1.CSV
@@ -0,0 +1,16 @@
+0,
+512,
+1024,
+1536,
+2048,
+3072,
+4095,
+3072,
+2048,
+1024,
+0,
+-1024,
+-2048,
+-1024,
+0,
+512
diff --git a/Inc/File_Handling.h b/Inc/File_Handling.h
deleted file mode 100644
index d157dd9..0000000
--- a/Inc/File_Handling.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * File_Handling_RTOS.h
- *
- * Created on: 14-May-2020
- * Author: Controllerstech
- */
-
-#ifndef FILE_HANDLING_RTOS_H_
-#define FILE_HANDLING_RTOS_H_
-
-#include "fatfs.h"
-#include
-#include "stdio.h"
-#include "fatfs.h"
-
-
-/* mounts the sd card*/
-int Mount_SD (const TCHAR* path);
-
-/* unmounts the sd card*/
-int Unmount_SD (const TCHAR* path);
-
-/* Start node to be scanned (***also used as work area***) */
-FRESULT Scan_SD (char* pat);
-
-/* Only supports removing files from home directory. Directory remover to be added soon */
-FRESULT Format_SD (void);
-
-/* write the data to the file
- * @ name : is the path to the file*/
-FRESULT Write_File (char *name, char *data);
-
-/* write the data to the file
- * @ name : is the path to the file tooooooooooooooooooooooooooooooooooooooooooooooooo*/
-FRESULT Write_File_byte (char *name, uint8_t *data, unsigned int bytesize);
-
-/* read data from the file
- * @ name : is the path to the file*/
-FRESULT Read_File (char *name);
-
-FRESULT Seek_Read_File (char *name, uint8_t *data, unsigned int bytesize, unsigned long goto_label);
-
-/* creates the file, if it does not exists
- * @ name : is the path to the file*/
-FRESULT Create_File (char *name);
-
-/* Removes the file from the sd card
- * @ name : is the path to the file*/
-FRESULT Remove_File (char *name);
-
-/* creates a directory
- * @ name: is the path to the directory
- */
-FRESULT Create_Dir (char *name);
-
-/* checks the free space in the sd card*/
-void Check_SD_Space (void);
-
-/* updates the file. write pointer is set to the end of the file
- * @ name : is the path to the file
- */
-FRESULT Update_File (char *name, char *data);
-
-FRESULT Update_File_float (char *name, float *data, unsigned int bytesize);
-
-FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize);
-
-
-#endif /* FILE_HANDLING_RTOS_H_ */
diff --git a/Inc/bsp_driver_sd.h b/Inc/bsp_driver_sd.h
index de81b56..4f31b62 100644
--- a/Inc/bsp_driver_sd.h
+++ b/Inc/bsp_driver_sd.h
@@ -60,10 +60,19 @@
/* USER CODE END 0 */
#else
-/* USER CODE BEGIN BSP_H_CODE */
-
-/* Exported functions --------------------------------------------------------*/
-uint8_t BSP_SD_Init(void);
+/* USER CODE BEGIN BSP_H_CODE */
+
+typedef struct bsp_sd_debug_info_t
+{
+ uint8_t last_init_status;
+ uint8_t last_detect_status;
+ uint8_t last_hal_init_status;
+ uint8_t last_wide_bus_status;
+ uint32_t last_hal_error;
+} bsp_sd_debug_info_t;
+
+/* Exported functions --------------------------------------------------------*/
+uint8_t BSP_SD_Init(void);
uint8_t BSP_SD_ITConfig(void);
uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t Timeout);
uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32_t Timeout);
@@ -76,10 +85,11 @@ uint8_t BSP_SD_IsDetected(void);
/* These functions can be modified in case the current settings (e.g. DMA stream)
need to be changed for specific application needs */
-void BSP_SD_AbortCallback(void);
-void BSP_SD_WriteCpltCallback(void);
-void BSP_SD_ReadCpltCallback(void);
-/* USER CODE END BSP_H_CODE */
+void BSP_SD_AbortCallback(void);
+void BSP_SD_WriteCpltCallback(void);
+void BSP_SD_ReadCpltCallback(void);
+void BSP_SD_GetDebugInfo(bsp_sd_debug_info_t *out_info);
+/* USER CODE END BSP_H_CODE */
#endif
#ifdef __cplusplus
diff --git a/Inc/main.h b/Inc/main.h
index ee03496..e9fa70b 100644
--- a/Inc/main.h
+++ b/Inc/main.h
@@ -65,12 +65,8 @@ extern "C" {
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
-/* Exported functions prototypes ---------------------------------------------*/
-void Error_Handler(void);
-
-/* USER CODE BEGIN EFP */
-void Set_LTEC(uint8_t, uint16_t);
-/* USER CODE END EFP */
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
/* Private defines -----------------------------------------------------------*/
#define INP_0_Pin GPIO_PIN_3
@@ -166,149 +162,27 @@ void Set_LTEC(uint8_t, uint16_t);
#define OUT_9_Pin GPIO_PIN_7
#define OUT_9_GPIO_Port GPIOB
-/* USER CODE BEGIN Private defines */
- #define CL_16 15
- #define DL_16 15
- #define CL_8 30
- #define DL_8 30
- #define TSK_8 32
- #define TSK_16 16
-
-
-// #define SD_Length 100
-
- #define HALT 0
- #define DECODE_ENABLE 1
- #define DEFAULT_ENABLE 2
- #define TRANS_S_ENABLE 3
- #define TRANS_ENABLE 4
- #define REMOVE_FILE 5
- #define STATE 6
- #define WORK_ENABLE 7
- #define DECODE_TASK 8
- #define RUN_TASK 9
- #define AD9102_CMD 10
- #define AD9833_CMD 11
- #define DS1809_CMD 12
- #define STM32_DAC_CMD 13
- #define AD9102_WAVE_CTRL_CMD 14
- #define AD9102_WAVE_DATA_CMD 15
-
- #define SD_ERR 0x01
- #define UART_ERR 0x02
- #define UART_DECODE_ERR 0x04
- #define TEC1_ERR 0x08
- #define TEC2_ERR 0x10
- #define DEFAUL_ERR 0x20
- #define REMOVE_ERR 0x40
- #define AD9102_ERR 0x80
-
- #define NO_MESS 0
- #define MESS_01 1
- #define MESS_02 2
- #define MESS_03 3
-
- // AD9102 serial command (compatible header with PC tool)
- #define AD9102_CMD_HEADER 0x8888
- #define AD9102_CMD_8 10 // total bytes including header
- #define AD9102_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum)
- #define AD9833_CMD_HEADER 0x9999
- #define AD9833_CMD_8 10 // total bytes including header
- #define AD9833_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum)
- #define DS1809_CMD_HEADER 0xAAAA
- #define DS1809_CMD_8 10 // total bytes including header
- #define DS1809_CMD_WORDS 4 // data words (flags, count, pulse_ms, checksum)
- #define STM32_DAC_CMD_HEADER 0xBBBB
- #define STM32_DAC_CMD_8 10 // total bytes including header
- #define STM32_DAC_CMD_WORDS 4 // data words (flags, dac_code, reserved, checksum)
- #define AD9102_WAVE_CTRL_HEADER 0xCCCC
- #define AD9102_WAVE_CTRL_8 10 // total bytes including header
- #define AD9102_WAVE_CTRL_WORDS 4 // data words (opcode, param0, param1, checksum)
- #define AD9102_WAVE_DATA_HEADER 0xDDDD
- #define AD9102_WAVE_DATA_8 30 // total bytes including header
- #define AD9102_WAVE_DATA_WORDS 14 // data words (count, 12 samples, checksum)
-
- #define AD9102_ON_SPI2 1
-
- // AD9102 CS (chip select) uses AD9102_CS_* pin definitions above.
-
- typedef struct{
-
- uint8_t WORK_EN;
- uint8_t U5V1_EN;
- uint8_t U5V2_EN;
- uint8_t LD1_EN;
- uint8_t LD2_EN;
- uint8_t REF1_EN;
- uint8_t REF2_EN;
- uint8_t TEC1_EN;
- uint8_t TEC2_EN;
- uint8_t TS1_EN;
- uint8_t TS2_EN;
- uint8_t SD_EN;
- uint8_t PI1_RD;
- uint8_t PI2_RD;
-
- uint16_t AVERAGES;
- uint16_t MES_ID;
-
- }Work_SetupTypeDef;
-
- typedef struct{
-
- uint16_t LD_TEMP;
- float P_coef_temp;
- float I_coef_temp;
- uint16_t CURRENT;
-
- }LDx_SetupTypeDef;
-
- typedef struct{
-
- uint16_t LD_CURR_TEMP;
- float e_integral;
- uint16_t POWER;
-
- }LDx_ParamTypeDef;
-
- typedef enum _task_type_t
- {
- TT_CHANGE_CURR_1 = 0x1,
- TT_CHANGE_CURR_2 = 0x2,
- TT_CHANGE_TEMP_1 = 0x3,
- TT_CHANGE_TEMP_2 = 0x4,
- } task_type_t;
-
- typedef struct _task_t
- {
- task_type_t task_type;
- float min_param;
- float max_param;
- float delta_param; // change step between min_param and max_param
- float current_param; // current_param is iterating by summary with delta_param every interrupt
- uint8_t dt; // microseconds
- uint16_t tau; // milliseconds or microseconds?
- float sec_param;
- float curr;
- float temp;
- float i_coef_1;
- float p_coef_1;
- float i_coef_2;
- float p_coef_2;
- } task_t;
-
-
- typedef struct{
- task_type_t task_type;
- uint16_t signal_pin;
- GPIO_TypeDef * signal_port;
- uint16_t param;
- uint8_t state; //0 -- disabled (do nothing);
- //1 -- update LD current;
- //2 -- blinking, set LD ON now;
- //3 -- blinking, set LD OFF now
- } LD_Blinker_StateTypeDef;
-/* USER CODE END Private defines */
+/* USER CODE BEGIN Private defines */
+/* Board-level extensions only. Application-layer types live under App/. */
+#define UI_LCD_RS_Pin GPIO_PIN_9
+#define UI_LCD_RS_GPIO_Port GPIOG
+#define UI_LCD_V0_REF_Pin GPIO_PIN_7
+#define UI_LCD_V0_REF_GPIO_Port GPIOD
+#define UI_LCD_CONTRAST_PWM_Pin GPIO_PIN_8
+#define UI_LCD_CONTRAST_PWM_GPIO_Port GPIOB
+#define UI_LCD_E_Pin OUT_0_Pin
+#define UI_LCD_E_GPIO_Port OUT_0_GPIO_Port
+#define UI_BUTTON_Pin OUT_1_Pin
+#define UI_BUTTON_GPIO_Port OUT_1_GPIO_Port
+#define UI_LCD_D4_Pin OUT_2_Pin
+#define UI_LCD_D4_GPIO_Port OUT_2_GPIO_Port
+#define UI_LCD_D5_Pin OUT_3_Pin
+#define UI_LCD_D5_GPIO_Port OUT_3_GPIO_Port
+#define UI_LCD_D6_Pin OUT_4_Pin
+#define UI_LCD_D6_GPIO_Port OUT_4_GPIO_Port
+#define UI_LCD_D7_Pin OUT_5_Pin
+#define UI_LCD_D7_GPIO_Port OUT_5_GPIO_Port
+/* USER CODE END Private defines */
#ifdef __cplusplus
}
diff --git a/Inc/sd_diskio.h b/Inc/sd_diskio.h
index 47b48e0..cd8700f 100644
--- a/Inc/sd_diskio.h
+++ b/Inc/sd_diskio.h
@@ -27,15 +27,18 @@
/* can be used to modify / undefine following code or add new definitions */
/* USER CODE END firstSection */
-/* Includes ------------------------------------------------------------------*/
-#include "bsp_driver_sd.h"
+/* Includes ------------------------------------------------------------------*/
+#include "ff_gen_drv.h"
+#include "bsp_driver_sd.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
-/* Exported functions ------------------------------------------------------- */
-extern const Diskio_drvTypeDef SD_Driver;
-
-/* USER CODE BEGIN lastSection */
-/* can be used to modify / undefine previous code or add new definitions */
-/* USER CODE END lastSection */
+/* Exported functions ------------------------------------------------------- */
+extern const Diskio_drvTypeDef SD_Driver;
+
+/* USER CODE BEGIN lastSection */
+/* can be used to modify / undefine previous code or add new definitions */
+DSTATUS sd_diskio_debug_get_last_initialize_status(void);
+DSTATUS sd_diskio_debug_get_last_status_result(void);
+/* USER CODE END lastSection */
#endif /* __SD_DISKIO_H */
diff --git a/Inc/stm32f7xx_it.h b/Inc/stm32f7xx_it.h
index bdc73dc..b4553ef 100644
--- a/Inc/stm32f7xx_it.h
+++ b/Inc/stm32f7xx_it.h
@@ -54,16 +54,13 @@ void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
-void SysTick_Handler(void);
-void ADC_IRQHandler(void);
-void TIM1_UP_TIM10_IRQHandler(void);
-void TIM1_TRG_COM_TIM11_IRQHandler(void);
-void TIM2_IRQHandler(void);
-void USART1_IRQHandler(void);
-void TIM8_UP_TIM13_IRQHandler(void);
-void TIM5_IRQHandler(void);
-void TIM6_DAC_IRQHandler(void);
-void TIM7_IRQHandler(void);
+void SysTick_Handler(void);
+void ADC_IRQHandler(void);
+void TIM2_IRQHandler(void);
+void USART1_IRQHandler(void);
+void TIM5_IRQHandler(void);
+void TIM6_DAC_IRQHandler(void);
+void TIM7_IRQHandler(void);
void DMA2_Stream7_IRQHandler(void);
/* USER CODE BEGIN EFP */
diff --git a/MDK-ARM/DebugConfig/For_stm32_STM32F767ZITx_2.0.0.dbgconf b/MDK-ARM/DebugConfig/For_stm32_STM32F767ZITx_2.0.0.dbgconf
deleted file mode 100644
index 5cba73a..0000000
--- a/MDK-ARM/DebugConfig/For_stm32_STM32F767ZITx_2.0.0.dbgconf
+++ /dev/null
@@ -1,77 +0,0 @@
-// File: STM32F76x_77x.dbgconf
-// Version: 1.0.0
-// Note: refer to STM32F76xxx STM32F77xxx reference manual (RM0410)
-// refer to STM32F76xxx STM32F77xxx datasheets
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-// Debug MCU configuration register (DBGMCU_CR)
-// DBG_STANDBY Debug standby mode
-// DBG_STOP Debug stop mode
-// DBG_SLEEP Debug sleep mode
-//
-DbgMCU_CR = 0x00000007;
-
-// Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)
-// Reserved bits must be kept at reset value
-// DBG_CAN2_STOP Debug CAN2 stopped when core is halted
-// DBG_CAN1_STOP Debug CAN1 stopped when core is halted
-// DBG_I2C4_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
-// DBG_I2C3_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
-// DBG_I2C2_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
-// DBG_I2C1_SMBUS_TIMEOUT SMBUS timeout mode stopped when core is halted
-// DBG_CAN3_STOP Debug CAN3 stopped when core is halted
-// DBG_IWDG_STOP Debug independent watchdog stopped when core is halted
-// DBG_WWDG_STOP Debug window watchdog stopped when core is halted
-// DBG_RTC_STOP RTC stopped when core is halted
-// DBG_LPTIM1_STOP LPTMI1 counter stopped when core is halted
-// DBG_TIM14_STOP TIM14 counter stopped when core is halted
-// DBG_TIM13_STOP TIM13 counter stopped when core is halted
-// DBG_TIM12_STOP TIM12 counter stopped when core is halted
-// DBG_TIM7_STOP TIM7 counter stopped when core is halted
-// DBG_TIM6_STOP TIM6 counter stopped when core is halted
-// DBG_TIM5_STOP TIM5 counter stopped when core is halted
-// DBG_TIM4_STOP TIM4 counter stopped when core is halted
-// DBG_TIM3_STOP TIM3 counter stopped when core is halted
-// DBG_TIM2_STOP TIM2 counter stopped when core is halted
-//
-DbgMCU_APB1_Fz = 0x00000000;
-
-// Debug MCU APB2 freeze register (DBGMCU_APB2_FZ)
-// Reserved bits must be kept at reset value
-// DBG_TIM11_STOP TIM11 counter stopped when core is halted
-// DBG_TIM10_STOP TIM10 counter stopped when core is halted
-// DBG_TIM9_STOP TIM9 counter stopped when core is halted
-// DBG_TIM8_STOP TIM8 counter stopped when core is halted
-// DBG_TIM1_STOP TIM1 counter stopped when core is halted
-//
-DbgMCU_APB2_Fz = 0x00000000;
-
-// TPIU Pin Routing (TRACECLK fixed on Pin PE2)
-// TRACECLK: Pin PE2
-// TRACED0
-// ETM Trace Data 0
-// <0x00040003=> Pin PE3
-// <0x00020001=> Pin PC1
-// <0x0006000D=> Pin PG13
-// TRACED1
-// ETM Trace Data 1
-// <0x00040004=> Pin PE4
-// <0x00020008=> Pin PC8
-// <0x0006000E=> Pin PG14
-// TRACED2
-// ETM Trace Data 2
-// <0x00040005=> Pin PE5
-// <0x00030002=> Pin PD2
-// TRACED3
-// ETM Trace Data 3
-// <0x00040006=> Pin PE6
-// <0x0002000C=> Pin PC12
-//
-TraceClk_Pin = 0x00040002;
-TraceD0_Pin = 0x00040003;
-TraceD1_Pin = 0x00040004;
-TraceD2_Pin = 0x00040005;
-TraceD3_Pin = 0x00040006;
-
-// <<< end of configuration section >>>
diff --git a/MDK-ARM/EventRecorderStub.scvd b/MDK-ARM/EventRecorderStub.scvd
deleted file mode 100644
index 2956b29..0000000
--- a/MDK-ARM/EventRecorderStub.scvd
+++ /dev/null
@@ -1,9 +0,0 @@
-
-
-
-
-
-
-
-
-
diff --git a/MDK-ARM/For_stm32.uvguix.User b/MDK-ARM/For_stm32.uvguix.User
deleted file mode 100644
index 1ab92db..0000000
--- a/MDK-ARM/For_stm32.uvguix.User
+++ /dev/null
@@ -1,3698 +0,0 @@
-
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- -6.1
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diff --git a/MDK-ARM/For_stm32.uvguix.Viktor b/MDK-ARM/For_stm32.uvguix.Viktor
deleted file mode 100644
index f74460e..0000000
--- a/MDK-ARM/For_stm32.uvguix.Viktor
+++ /dev/null
@@ -1,3700 +0,0 @@
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diff --git a/MDK-ARM/For_stm32.uvguix.é¿¬Γ«α b/MDK-ARM/For_stm32.uvguix.é¿¬Γ«α
deleted file mode 100644
index f593023..0000000
--- a/MDK-ARM/For_stm32.uvguix.é¿¬Γ«α
+++ /dev/null
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diff --git a/MDK-ARM/For_stm32.uvoptx b/MDK-ARM/For_stm32.uvoptx
deleted file mode 100644
index 52f7d65..0000000
--- a/MDK-ARM/For_stm32.uvoptx
+++ /dev/null
@@ -1,822 +0,0 @@
-
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diff --git a/MDK-ARM/For_stm32.uvprojx b/MDK-ARM/For_stm32.uvprojx
deleted file mode 100644
index cc09963..0000000
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- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_ll_exti.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_ll_gpio.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_ll_dma.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_ll_sdmmc.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c
-
-
- stm32f7xx_hal_sd.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c
-
-
- stm32f7xx_ll_spi.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_hal_tim.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c
-
-
- stm32f7xx_hal_tim_ex.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c
-
-
- stm32f7xx_ll_tim.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
- stm32f7xx_ll_usart.c
- 1
- ../Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c
-
-
- 2
- 0
- 0
- 0
- 0
- 1
- 2
- 2
- 2
- 2
- 11
-
-
- 1
-
-
-
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 2
- 0
- 2
- 2
- 2
- 2
- 2
- 0
- 0
- 2
- 2
- 2
- 2
- 2
-
-
-
-
-
-
-
-
-
-
-
-
-
- Drivers/CMSIS
-
-
- system_stm32f7xx.c
- 1
- ../Src/system_stm32f7xx.c
-
-
-
-
- Middlewares/FatFs
-
-
- diskio.c
- 1
- ../Middlewares/Third_Party/FatFs/src/diskio.c
-
-
- ff.c
- 1
- ../Middlewares/Third_Party/FatFs/src/ff.c
-
-
- ff_gen_drv.c
- 1
- ../Middlewares/Third_Party/FatFs/src/ff_gen_drv.c
-
-
- syscall.c
- 1
- ../Middlewares/Third_Party/FatFs/src/option/syscall.c
-
-
-
-
- ::CMSIS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
- For_stm32
- 0
- 1
-
-
-
-
-
diff --git a/MDK-ARM/For_stm32/ExtDll.iex b/MDK-ARM/For_stm32/ExtDll.iex
deleted file mode 100644
index 6c0896e..0000000
--- a/MDK-ARM/For_stm32/ExtDll.iex
+++ /dev/null
@@ -1,2 +0,0 @@
-[EXTDLL]
-Count=0
diff --git a/MDK-ARM/For_stm32/For_stm32.lnp b/MDK-ARM/For_stm32/For_stm32.lnp
deleted file mode 100644
index 4f55651..0000000
--- a/MDK-ARM/For_stm32/For_stm32.lnp
+++ /dev/null
@@ -1,47 +0,0 @@
---cpu Cortex-M7.fp.dp
-"for_stm32\startup_stm32f767xx.o"
-"for_stm32\file_handling.o"
-"for_stm32\main.o"
-"for_stm32\bsp_driver_sd.o"
-"for_stm32\sd_diskio.o"
-"for_stm32\fatfs.o"
-"for_stm32\fatfs_platform.o"
-"for_stm32\stm32f7xx_it.o"
-"for_stm32\stm32f7xx_hal_msp.o"
-"for_stm32\stm32f7xx_hal_adc.o"
-"for_stm32\stm32f7xx_hal_adc_ex.o"
-"for_stm32\stm32f7xx_hal_rcc.o"
-"for_stm32\stm32f7xx_hal_rcc_ex.o"
-"for_stm32\stm32f7xx_hal_flash.o"
-"for_stm32\stm32f7xx_hal_flash_ex.o"
-"for_stm32\stm32f7xx_hal_gpio.o"
-"for_stm32\stm32f7xx_hal_dma.o"
-"for_stm32\stm32f7xx_hal_dma_ex.o"
-"for_stm32\stm32f7xx_hal_pwr.o"
-"for_stm32\stm32f7xx_hal_pwr_ex.o"
-"for_stm32\stm32f7xx_hal_cortex.o"
-"for_stm32\stm32f7xx_hal.o"
-"for_stm32\stm32f7xx_hal_i2c.o"
-"for_stm32\stm32f7xx_hal_i2c_ex.o"
-"for_stm32\stm32f7xx_hal_exti.o"
-"for_stm32\stm32f7xx_ll_rcc.o"
-"for_stm32\stm32f7xx_ll_utils.o"
-"for_stm32\stm32f7xx_ll_exti.o"
-"for_stm32\stm32f7xx_ll_gpio.o"
-"for_stm32\stm32f7xx_ll_dma.o"
-"for_stm32\stm32f7xx_ll_sdmmc.o"
-"for_stm32\stm32f7xx_hal_sd.o"
-"for_stm32\stm32f7xx_ll_spi.o"
-"for_stm32\stm32f7xx_hal_tim.o"
-"for_stm32\stm32f7xx_hal_tim_ex.o"
-"for_stm32\stm32f7xx_ll_tim.o"
-"for_stm32\stm32f7xx_ll_usart.o"
-"for_stm32\system_stm32f7xx.o"
-"for_stm32\diskio.o"
-"for_stm32\ff.o"
-"for_stm32\ff_gen_drv.o"
-"for_stm32\syscall.o"
---strict --scatter "For_stm32\For_stm32.sct"
---summary_stderr --info summarysizes --map --load_addr_map_info --xref --callgraph --symbols
---info sizes --info totals --info unused --info veneers
---list "For_stm32.map" -o For_stm32\For_stm32.axf
\ No newline at end of file
diff --git a/MDK-ARM/For_stm32/For_stm32.sct b/MDK-ARM/For_stm32/For_stm32.sct
deleted file mode 100644
index bb4f637..0000000
--- a/MDK-ARM/For_stm32/For_stm32.sct
+++ /dev/null
@@ -1,16 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-LR_IROM1 0x08000000 0x00200000 { ; load region size_region
- ER_IROM1 0x08000000 0x00200000 { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- .ANY (+XO)
- }
- RW_IRAM1 0x20000000 0x00080000 { ; RW data
- .ANY (+RW +ZI)
- }
-}
-
diff --git a/MDK-ARM/For_stm32/For_stm32_sct.Bak b/MDK-ARM/For_stm32/For_stm32_sct.Bak
deleted file mode 100644
index c668c36..0000000
--- a/MDK-ARM/For_stm32/For_stm32_sct.Bak
+++ /dev/null
@@ -1,15 +0,0 @@
-; *************************************************************
-; *** Scatter-Loading Description File generated by uVision ***
-; *************************************************************
-
-LR_IROM1 0x08000000 0x00200000 { ; load region size_region
- ER_IROM1 0x08000000 0x00200000 { ; load address = execution address
- *.o (RESET, +First)
- *(InRoot$$Sections)
- .ANY (+RO)
- }
- RW_IRAM1 0x20000000 0x00080000 { ; RW data
- .ANY (+RW +ZI)
- }
-}
-
diff --git a/MDK-ARM/For_stm32/bsp_driver_sd.crf b/MDK-ARM/For_stm32/bsp_driver_sd.crf
deleted file mode 100644
index b97d78c..0000000
Binary files a/MDK-ARM/For_stm32/bsp_driver_sd.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/diskio.crf b/MDK-ARM/For_stm32/diskio.crf
deleted file mode 100644
index f9ca472..0000000
Binary files a/MDK-ARM/For_stm32/diskio.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/fatfs.crf b/MDK-ARM/For_stm32/fatfs.crf
deleted file mode 100644
index d309c69..0000000
Binary files a/MDK-ARM/For_stm32/fatfs.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/fatfs_platform.crf b/MDK-ARM/For_stm32/fatfs_platform.crf
deleted file mode 100644
index 3eda6a1..0000000
Binary files a/MDK-ARM/For_stm32/fatfs_platform.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/ff.crf b/MDK-ARM/For_stm32/ff.crf
deleted file mode 100644
index 75bd932..0000000
Binary files a/MDK-ARM/For_stm32/ff.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/ff_gen_drv.crf b/MDK-ARM/For_stm32/ff_gen_drv.crf
deleted file mode 100644
index 50808bf..0000000
Binary files a/MDK-ARM/For_stm32/ff_gen_drv.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/file_handling.crf b/MDK-ARM/For_stm32/file_handling.crf
deleted file mode 100644
index b466ec0..0000000
Binary files a/MDK-ARM/For_stm32/file_handling.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/main.crf b/MDK-ARM/For_stm32/main.crf
deleted file mode 100644
index a06b131..0000000
Binary files a/MDK-ARM/For_stm32/main.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/sd_diskio.crf b/MDK-ARM/For_stm32/sd_diskio.crf
deleted file mode 100644
index 3573dfb..0000000
Binary files a/MDK-ARM/For_stm32/sd_diskio.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal.crf b/MDK-ARM/For_stm32/stm32f7xx_hal.crf
deleted file mode 100644
index e1b7ad8..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_adc.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_adc.crf
deleted file mode 100644
index f3c29c2..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_adc.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_adc_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_adc_ex.crf
deleted file mode 100644
index 76340b3..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_adc_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_cortex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_cortex.crf
deleted file mode 100644
index e7c4eb0..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_cortex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_dma.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_dma.crf
deleted file mode 100644
index 631dc82..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_dma.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_dma_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_dma_ex.crf
deleted file mode 100644
index 12b0192..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_dma_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_exti.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_exti.crf
deleted file mode 100644
index 9460855..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_exti.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_flash.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_flash.crf
deleted file mode 100644
index 64197e9..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_flash.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_flash_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_flash_ex.crf
deleted file mode 100644
index 8ae7ac0..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_flash_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_gpio.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_gpio.crf
deleted file mode 100644
index e0c8d53..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_gpio.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_i2c.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_i2c.crf
deleted file mode 100644
index 5a8b951..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_i2c.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_i2c_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_i2c_ex.crf
deleted file mode 100644
index a3746ce..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_i2c_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_msp.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_msp.crf
deleted file mode 100644
index 0175a9d..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_msp.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_pwr.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_pwr.crf
deleted file mode 100644
index c82d454..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_pwr.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_pwr_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_pwr_ex.crf
deleted file mode 100644
index 0126768..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_pwr_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_rcc.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_rcc.crf
deleted file mode 100644
index 817f4de..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_rcc.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_rcc_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_rcc_ex.crf
deleted file mode 100644
index 990bea4..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_rcc_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_sd.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_sd.crf
deleted file mode 100644
index 78c31fe..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_sd.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_spi.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_spi.crf
deleted file mode 100644
index bf3e443..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_spi.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_spi_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_spi_ex.crf
deleted file mode 100644
index 8d55ae9..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_spi_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_tim.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_tim.crf
deleted file mode 100644
index f2f1cf4..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_tim.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_tim_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_tim_ex.crf
deleted file mode 100644
index 85fdbf1..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_tim_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_uart.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_uart.crf
deleted file mode 100644
index e33d424..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_uart.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_hal_uart_ex.crf b/MDK-ARM/For_stm32/stm32f7xx_hal_uart_ex.crf
deleted file mode 100644
index 057310f..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_hal_uart_ex.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_it.crf b/MDK-ARM/For_stm32/stm32f7xx_it.crf
deleted file mode 100644
index 0ae975c..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_it.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_adc.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_adc.crf
deleted file mode 100644
index c1c05bd..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_adc.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_dma.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_dma.crf
deleted file mode 100644
index 38baa55..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_dma.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_exti.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_exti.crf
deleted file mode 100644
index beb57bc..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_exti.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_gpio.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_gpio.crf
deleted file mode 100644
index 6f54542..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_gpio.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_rcc.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_rcc.crf
deleted file mode 100644
index ef951a6..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_rcc.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_sdmmc.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_sdmmc.crf
deleted file mode 100644
index 4bd1a29..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_sdmmc.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_spi.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_spi.crf
deleted file mode 100644
index b53672b..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_spi.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_tim.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_tim.crf
deleted file mode 100644
index 47ce695..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_tim.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_usart.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_usart.crf
deleted file mode 100644
index 08fad1b..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_usart.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/stm32f7xx_ll_utils.crf b/MDK-ARM/For_stm32/stm32f7xx_ll_utils.crf
deleted file mode 100644
index 325be36..0000000
Binary files a/MDK-ARM/For_stm32/stm32f7xx_ll_utils.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/syscall.crf b/MDK-ARM/For_stm32/syscall.crf
deleted file mode 100644
index 578a6da..0000000
Binary files a/MDK-ARM/For_stm32/syscall.crf and /dev/null differ
diff --git a/MDK-ARM/For_stm32/system_stm32f7xx.crf b/MDK-ARM/For_stm32/system_stm32f7xx.crf
deleted file mode 100644
index b5633a6..0000000
Binary files a/MDK-ARM/For_stm32/system_stm32f7xx.crf and /dev/null differ
diff --git a/MDK-ARM/startup_stm32f767xx.s b/MDK-ARM/startup_stm32f767xx.s
deleted file mode 100644
index c7dee5c..0000000
--- a/MDK-ARM/startup_stm32f767xx.s
+++ /dev/null
@@ -1,502 +0,0 @@
-;*******************************************************************************
-;* File Name : startup_stm32f767xx.s
-;* Author : MCD Application Team
-;* Description : STM32F767xx devices vector table for MDK-ARM toolchain.
-;* This module performs:
-;* - Set the initial SP
-;* - Set the initial PC == Reset_Handler
-;* - Set the vector table entries with the exceptions ISR address
-;* - Branches to __main in the C library (which eventually
-;* calls main()).
-;* After Reset the CortexM7 processor is in Thread mode,
-;* priority is Privileged, and the Stack is set to Main.
-;********************************************************************************
-;* @attention
-;*
-;* Copyright (c) 2016 STMicroelectronics.
-;* All rights reserved.
-;*
-;* This software is licensed under terms that can be found in the LICENSE file
-;* in the root directory of this software component.
-;* If no LICENSE file comes with this software, it is provided AS-IS.
-;
-;*******************************************************************************
-;* <<< Use Configuration Wizard in Context Menu >>>
-;
-; Amount of memory (in bytes) allocated for Stack
-; Tailor this value to your application needs
-; Stack Configuration
-; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Stack_Size EQU 0x4000
-
- AREA STACK, NOINIT, READWRITE, ALIGN=3
-Stack_Mem SPACE Stack_Size
-__initial_sp
-
-
-; Heap Configuration
-; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
-;
-
-Heap_Size EQU 0x2000
-
- AREA HEAP, NOINIT, READWRITE, ALIGN=3
-__heap_base
-Heap_Mem SPACE Heap_Size
-__heap_limit
-
- PRESERVE8
- THUMB
-
-
-; Vector Table Mapped to Address 0 at Reset
- AREA RESET, DATA, READONLY
- EXPORT __Vectors
- EXPORT __Vectors_End
- EXPORT __Vectors_Size
-
-__Vectors DCD __initial_sp ; Top of Stack
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD MemManage_Handler ; MPU Fault Handler
- DCD BusFault_Handler ; Bus Fault Handler
- DCD UsageFault_Handler ; Usage Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD DebugMon_Handler ; Debug Monitor Handler
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
-
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window WatchDog
- DCD PVD_IRQHandler ; PVD through EXTI Line detection
- DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line
- DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_IRQHandler ; EXTI Line0
- DCD EXTI1_IRQHandler ; EXTI Line1
- DCD EXTI2_IRQHandler ; EXTI Line2
- DCD EXTI3_IRQHandler ; EXTI Line3
- DCD EXTI4_IRQHandler ; EXTI Line4
- DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0
- DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1
- DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2
- DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3
- DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4
- DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5
- DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6
- DCD ADC_IRQHandler ; ADC1, ADC2 and ADC3s
- DCD CAN1_TX_IRQHandler ; CAN1 TX
- DCD CAN1_RX0_IRQHandler ; CAN1 RX0
- DCD CAN1_RX1_IRQHandler ; CAN1 RX1
- DCD CAN1_SCE_IRQHandler ; CAN1 SCE
- DCD EXTI9_5_IRQHandler ; External Line[9:5]s
- DCD TIM1_BRK_TIM9_IRQHandler ; TIM1 Break and TIM9
- DCD TIM1_UP_TIM10_IRQHandler ; TIM1 Update and TIM10
- DCD TIM1_TRG_COM_TIM11_IRQHandler ; TIM1 Trigger and Commutation and TIM11
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD TIM2_IRQHandler ; TIM2
- DCD TIM3_IRQHandler ; TIM3
- DCD TIM4_IRQHandler ; TIM4
- DCD I2C1_EV_IRQHandler ; I2C1 Event
- DCD I2C1_ER_IRQHandler ; I2C1 Error
- DCD I2C2_EV_IRQHandler ; I2C2 Event
- DCD I2C2_ER_IRQHandler ; I2C2 Error
- DCD SPI1_IRQHandler ; SPI1
- DCD SPI2_IRQHandler ; SPI2
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_IRQHandler ; USART3
- DCD EXTI15_10_IRQHandler ; External Line[15:10]s
- DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line
- DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI line
- DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break and TIM12
- DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update and TIM13
- DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation and TIM14
- DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare
- DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7
- DCD FMC_IRQHandler ; FMC
- DCD SDMMC1_IRQHandler ; SDMMC1
- DCD TIM5_IRQHandler ; TIM5
- DCD SPI3_IRQHandler ; SPI3
- DCD UART4_IRQHandler ; UART4
- DCD UART5_IRQHandler ; UART5
- DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors
- DCD TIM7_IRQHandler ; TIM7
- DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0
- DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1
- DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2
- DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3
- DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4
- DCD ETH_IRQHandler ; Ethernet
- DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line
- DCD CAN2_TX_IRQHandler ; CAN2 TX
- DCD CAN2_RX0_IRQHandler ; CAN2 RX0
- DCD CAN2_RX1_IRQHandler ; CAN2 RX1
- DCD CAN2_SCE_IRQHandler ; CAN2 SCE
- DCD OTG_FS_IRQHandler ; USB OTG FS
- DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5
- DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6
- DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7
- DCD USART6_IRQHandler ; USART6
- DCD I2C3_EV_IRQHandler ; I2C3 event
- DCD I2C3_ER_IRQHandler ; I2C3 error
- DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out
- DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In
- DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI
- DCD OTG_HS_IRQHandler ; USB OTG HS
- DCD DCMI_IRQHandler ; DCMI
- DCD 0 ; Reserved
- DCD RNG_IRQHandler ; Rng
- DCD FPU_IRQHandler ; FPU
- DCD UART7_IRQHandler ; UART7
- DCD UART8_IRQHandler ; UART8
- DCD SPI4_IRQHandler ; SPI4
- DCD SPI5_IRQHandler ; SPI5
- DCD SPI6_IRQHandler ; SPI6
- DCD SAI1_IRQHandler ; SAI1
- DCD LTDC_IRQHandler ; LTDC
- DCD LTDC_ER_IRQHandler ; LTDC error
- DCD DMA2D_IRQHandler ; DMA2D
- DCD SAI2_IRQHandler ; SAI2
- DCD QUADSPI_IRQHandler ; QUADSPI
- DCD LPTIM1_IRQHandler ; LPTIM1
- DCD CEC_IRQHandler ; HDMI_CEC
- DCD I2C4_EV_IRQHandler ; I2C4 Event
- DCD I2C4_ER_IRQHandler ; I2C4 Error
- DCD SPDIF_RX_IRQHandler ; SPDIF_RX
- DCD 0 ; Reserved
- DCD DFSDM1_FLT0_IRQHandler ; DFSDM1 Filter 0 global Interrupt
- DCD DFSDM1_FLT1_IRQHandler ; DFSDM1 Filter 1 global Interrupt
- DCD DFSDM1_FLT2_IRQHandler ; DFSDM1 Filter 2 global Interrupt
- DCD DFSDM1_FLT3_IRQHandler ; DFSDM1 Filter 3 global Interrupt
- DCD SDMMC2_IRQHandler ; SDMMC2
- DCD CAN3_TX_IRQHandler ; CAN3 TX
- DCD CAN3_RX0_IRQHandler ; CAN3 RX0
- DCD CAN3_RX1_IRQHandler ; CAN3 RX1
- DCD CAN3_SCE_IRQHandler ; CAN3 SCE
- DCD JPEG_IRQHandler ; JPEG
- DCD MDIOS_IRQHandler ; MDIOS
-__Vectors_End
-
-__Vectors_Size EQU __Vectors_End - __Vectors
-
- AREA |.text|, CODE, READONLY
-
-; Reset handler
-Reset_Handler PROC
- EXPORT Reset_Handler [WEAK]
- IMPORT SystemInit
- IMPORT __main
-
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__main
- BX R0
- ENDP
-
-; Dummy Exception Handlers (infinite loops which can be modified)
-
-NMI_Handler PROC
- EXPORT NMI_Handler [WEAK]
- B .
- ENDP
-HardFault_Handler\
- PROC
- EXPORT HardFault_Handler [WEAK]
- B .
- ENDP
-MemManage_Handler\
- PROC
- EXPORT MemManage_Handler [WEAK]
- B .
- ENDP
-BusFault_Handler\
- PROC
- EXPORT BusFault_Handler [WEAK]
- B .
- ENDP
-UsageFault_Handler\
- PROC
- EXPORT UsageFault_Handler [WEAK]
- B .
- ENDP
-SVC_Handler PROC
- EXPORT SVC_Handler [WEAK]
- B .
- ENDP
-DebugMon_Handler\
- PROC
- EXPORT DebugMon_Handler [WEAK]
- B .
- ENDP
-PendSV_Handler PROC
- EXPORT PendSV_Handler [WEAK]
- B .
- ENDP
-SysTick_Handler PROC
- EXPORT SysTick_Handler [WEAK]
- B .
- ENDP
-
-Default_Handler PROC
-
- EXPORT WWDG_IRQHandler [WEAK]
- EXPORT PVD_IRQHandler [WEAK]
- EXPORT TAMP_STAMP_IRQHandler [WEAK]
- EXPORT RTC_WKUP_IRQHandler [WEAK]
- EXPORT FLASH_IRQHandler [WEAK]
- EXPORT RCC_IRQHandler [WEAK]
- EXPORT EXTI0_IRQHandler [WEAK]
- EXPORT EXTI1_IRQHandler [WEAK]
- EXPORT EXTI2_IRQHandler [WEAK]
- EXPORT EXTI3_IRQHandler [WEAK]
- EXPORT EXTI4_IRQHandler [WEAK]
- EXPORT DMA1_Stream0_IRQHandler [WEAK]
- EXPORT DMA1_Stream1_IRQHandler [WEAK]
- EXPORT DMA1_Stream2_IRQHandler [WEAK]
- EXPORT DMA1_Stream3_IRQHandler [WEAK]
- EXPORT DMA1_Stream4_IRQHandler [WEAK]
- EXPORT DMA1_Stream5_IRQHandler [WEAK]
- EXPORT DMA1_Stream6_IRQHandler [WEAK]
- EXPORT ADC_IRQHandler [WEAK]
- EXPORT CAN1_TX_IRQHandler [WEAK]
- EXPORT CAN1_RX0_IRQHandler [WEAK]
- EXPORT CAN1_RX1_IRQHandler [WEAK]
- EXPORT CAN1_SCE_IRQHandler [WEAK]
- EXPORT EXTI9_5_IRQHandler [WEAK]
- EXPORT TIM1_BRK_TIM9_IRQHandler [WEAK]
- EXPORT TIM1_UP_TIM10_IRQHandler [WEAK]
- EXPORT TIM1_TRG_COM_TIM11_IRQHandler [WEAK]
- EXPORT TIM1_CC_IRQHandler [WEAK]
- EXPORT TIM2_IRQHandler [WEAK]
- EXPORT TIM3_IRQHandler [WEAK]
- EXPORT TIM4_IRQHandler [WEAK]
- EXPORT I2C1_EV_IRQHandler [WEAK]
- EXPORT I2C1_ER_IRQHandler [WEAK]
- EXPORT I2C2_EV_IRQHandler [WEAK]
- EXPORT I2C2_ER_IRQHandler [WEAK]
- EXPORT SPI1_IRQHandler [WEAK]
- EXPORT SPI2_IRQHandler [WEAK]
- EXPORT USART1_IRQHandler [WEAK]
- EXPORT USART2_IRQHandler [WEAK]
- EXPORT USART3_IRQHandler [WEAK]
- EXPORT EXTI15_10_IRQHandler [WEAK]
- EXPORT RTC_Alarm_IRQHandler [WEAK]
- EXPORT OTG_FS_WKUP_IRQHandler [WEAK]
- EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK]
- EXPORT TIM8_UP_TIM13_IRQHandler [WEAK]
- EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK]
- EXPORT TIM8_CC_IRQHandler [WEAK]
- EXPORT DMA1_Stream7_IRQHandler [WEAK]
- EXPORT FMC_IRQHandler [WEAK]
- EXPORT SDMMC1_IRQHandler [WEAK]
- EXPORT TIM5_IRQHandler [WEAK]
- EXPORT SPI3_IRQHandler [WEAK]
- EXPORT UART4_IRQHandler [WEAK]
- EXPORT UART5_IRQHandler [WEAK]
- EXPORT TIM6_DAC_IRQHandler [WEAK]
- EXPORT TIM7_IRQHandler [WEAK]
- EXPORT DMA2_Stream0_IRQHandler [WEAK]
- EXPORT DMA2_Stream1_IRQHandler [WEAK]
- EXPORT DMA2_Stream2_IRQHandler [WEAK]
- EXPORT DMA2_Stream3_IRQHandler [WEAK]
- EXPORT DMA2_Stream4_IRQHandler [WEAK]
- EXPORT ETH_IRQHandler [WEAK]
- EXPORT ETH_WKUP_IRQHandler [WEAK]
- EXPORT CAN2_TX_IRQHandler [WEAK]
- EXPORT CAN2_RX0_IRQHandler [WEAK]
- EXPORT CAN2_RX1_IRQHandler [WEAK]
- EXPORT CAN2_SCE_IRQHandler [WEAK]
- EXPORT OTG_FS_IRQHandler [WEAK]
- EXPORT DMA2_Stream5_IRQHandler [WEAK]
- EXPORT DMA2_Stream6_IRQHandler [WEAK]
- EXPORT DMA2_Stream7_IRQHandler [WEAK]
- EXPORT USART6_IRQHandler [WEAK]
- EXPORT I2C3_EV_IRQHandler [WEAK]
- EXPORT I2C3_ER_IRQHandler [WEAK]
- EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK]
- EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK]
- EXPORT OTG_HS_WKUP_IRQHandler [WEAK]
- EXPORT OTG_HS_IRQHandler [WEAK]
- EXPORT DCMI_IRQHandler [WEAK]
- EXPORT RNG_IRQHandler [WEAK]
- EXPORT FPU_IRQHandler [WEAK]
- EXPORT UART7_IRQHandler [WEAK]
- EXPORT UART8_IRQHandler [WEAK]
- EXPORT SPI4_IRQHandler [WEAK]
- EXPORT SPI5_IRQHandler [WEAK]
- EXPORT SPI6_IRQHandler [WEAK]
- EXPORT SAI1_IRQHandler [WEAK]
- EXPORT LTDC_IRQHandler [WEAK]
- EXPORT LTDC_ER_IRQHandler [WEAK]
- EXPORT DMA2D_IRQHandler [WEAK]
- EXPORT SAI2_IRQHandler [WEAK]
- EXPORT QUADSPI_IRQHandler [WEAK]
- EXPORT LPTIM1_IRQHandler [WEAK]
- EXPORT CEC_IRQHandler [WEAK]
- EXPORT I2C4_EV_IRQHandler [WEAK]
- EXPORT I2C4_ER_IRQHandler [WEAK]
- EXPORT SPDIF_RX_IRQHandler [WEAK]
- EXPORT DFSDM1_FLT0_IRQHandler [WEAK]
- EXPORT DFSDM1_FLT1_IRQHandler [WEAK]
- EXPORT DFSDM1_FLT2_IRQHandler [WEAK]
- EXPORT DFSDM1_FLT3_IRQHandler [WEAK]
- EXPORT SDMMC2_IRQHandler [WEAK]
- EXPORT CAN3_TX_IRQHandler [WEAK]
- EXPORT CAN3_RX0_IRQHandler [WEAK]
- EXPORT CAN3_RX1_IRQHandler [WEAK]
- EXPORT CAN3_SCE_IRQHandler [WEAK]
- EXPORT JPEG_IRQHandler [WEAK]
- EXPORT MDIOS_IRQHandler [WEAK]
-
-WWDG_IRQHandler
-PVD_IRQHandler
-TAMP_STAMP_IRQHandler
-RTC_WKUP_IRQHandler
-FLASH_IRQHandler
-RCC_IRQHandler
-EXTI0_IRQHandler
-EXTI1_IRQHandler
-EXTI2_IRQHandler
-EXTI3_IRQHandler
-EXTI4_IRQHandler
-DMA1_Stream0_IRQHandler
-DMA1_Stream1_IRQHandler
-DMA1_Stream2_IRQHandler
-DMA1_Stream3_IRQHandler
-DMA1_Stream4_IRQHandler
-DMA1_Stream5_IRQHandler
-DMA1_Stream6_IRQHandler
-ADC_IRQHandler
-CAN1_TX_IRQHandler
-CAN1_RX0_IRQHandler
-CAN1_RX1_IRQHandler
-CAN1_SCE_IRQHandler
-EXTI9_5_IRQHandler
-TIM1_BRK_TIM9_IRQHandler
-TIM1_UP_TIM10_IRQHandler
-TIM1_TRG_COM_TIM11_IRQHandler
-TIM1_CC_IRQHandler
-TIM2_IRQHandler
-TIM3_IRQHandler
-TIM4_IRQHandler
-I2C1_EV_IRQHandler
-I2C1_ER_IRQHandler
-I2C2_EV_IRQHandler
-I2C2_ER_IRQHandler
-SPI1_IRQHandler
-SPI2_IRQHandler
-USART1_IRQHandler
-USART2_IRQHandler
-USART3_IRQHandler
-EXTI15_10_IRQHandler
-RTC_Alarm_IRQHandler
-OTG_FS_WKUP_IRQHandler
-TIM8_BRK_TIM12_IRQHandler
-TIM8_UP_TIM13_IRQHandler
-TIM8_TRG_COM_TIM14_IRQHandler
-TIM8_CC_IRQHandler
-DMA1_Stream7_IRQHandler
-FMC_IRQHandler
-SDMMC1_IRQHandler
-TIM5_IRQHandler
-SPI3_IRQHandler
-UART4_IRQHandler
-UART5_IRQHandler
-TIM6_DAC_IRQHandler
-TIM7_IRQHandler
-DMA2_Stream0_IRQHandler
-DMA2_Stream1_IRQHandler
-DMA2_Stream2_IRQHandler
-DMA2_Stream3_IRQHandler
-DMA2_Stream4_IRQHandler
-ETH_IRQHandler
-ETH_WKUP_IRQHandler
-CAN2_TX_IRQHandler
-CAN2_RX0_IRQHandler
-CAN2_RX1_IRQHandler
-CAN2_SCE_IRQHandler
-OTG_FS_IRQHandler
-DMA2_Stream5_IRQHandler
-DMA2_Stream6_IRQHandler
-DMA2_Stream7_IRQHandler
-USART6_IRQHandler
-I2C3_EV_IRQHandler
-I2C3_ER_IRQHandler
-OTG_HS_EP1_OUT_IRQHandler
-OTG_HS_EP1_IN_IRQHandler
-OTG_HS_WKUP_IRQHandler
-OTG_HS_IRQHandler
-DCMI_IRQHandler
-RNG_IRQHandler
-FPU_IRQHandler
-UART7_IRQHandler
-UART8_IRQHandler
-SPI4_IRQHandler
-SPI5_IRQHandler
-SPI6_IRQHandler
-SAI1_IRQHandler
-LTDC_IRQHandler
-LTDC_ER_IRQHandler
-DMA2D_IRQHandler
-SAI2_IRQHandler
-QUADSPI_IRQHandler
-LPTIM1_IRQHandler
-CEC_IRQHandler
-I2C4_EV_IRQHandler
-I2C4_ER_IRQHandler
-SPDIF_RX_IRQHandler
-DFSDM1_FLT0_IRQHandler
-DFSDM1_FLT1_IRQHandler
-DFSDM1_FLT2_IRQHandler
-DFSDM1_FLT3_IRQHandler
-SDMMC2_IRQHandler
-CAN3_TX_IRQHandler
-CAN3_RX0_IRQHandler
-CAN3_RX1_IRQHandler
-CAN3_SCE_IRQHandler
-JPEG_IRQHandler
-MDIOS_IRQHandler
- B .
-
- ENDP
-
- ALIGN
-
-;*******************************************************************************
-; User Stack and Heap initialization
-;*******************************************************************************
- IF :DEF:__MICROLIB
-
- EXPORT __initial_sp
- EXPORT __heap_base
- EXPORT __heap_limit
-
- ELSE
-
- IMPORT __use_two_region_memory
- EXPORT __user_initial_stackheap
-
-__user_initial_stackheap
-
- LDR R0, = Heap_Mem
- LDR R1, =(Stack_Mem + Stack_Size)
- LDR R2, = (Heap_Mem + Heap_Size)
- LDR R3, = Stack_Mem
- BX LR
-
- ALIGN
-
- ENDIF
-
- END
-
diff --git a/Makefile b/Makefile
index d287b5a..97a6541 100644
--- a/Makefile
+++ b/Makefile
@@ -35,15 +35,32 @@ BUILD_DIR = build
# source
######################################
# C sources
-C_SOURCES = \
-Src/main.c \
-Src/bsp_driver_sd.c \
-Src/sd_diskio.c \
-Src/fatfs.c \
-Src/fatfs_platform.c \
-Src/stm32f7xx_it.c \
-Src/stm32f7xx_hal_msp.c \
-Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c \
+C_SOURCES = \
+Src/main.c \
+Src/bsp_driver_sd.c \
+Src/sd_diskio.c \
+Src/fatfs.c \
+Src/fatfs_platform.c \
+Src/stm32f7xx_it.c \
+Src/stm32f7xx_hal_msp.c \
+App/Core/app_core.c \
+App/Protocol/app_uart_protocol.c \
+App/Devices/board_io.c \
+App/Devices/uart_transport.c \
+App/Devices/laser_dac.c \
+App/Devices/adc_mux.c \
+App/Devices/stm32_dac_output.c \
+App/Devices/ad9833_device.c \
+App/Devices/ds1809_device.c \
+App/Devices/ad9102_device.c \
+App/Devices/lcd1602_display.c \
+App/Services/telemetry.c \
+App/Services/temperature_control.c \
+App/Services/storage_sd.c \
+App/Services/profile_repository.c \
+App/Services/profile_storage.c \
+App/Services/ui_status.c \
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c \
@@ -69,12 +86,11 @@ Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c \
Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c \
-Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c \
-Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c \
-Src/system_stm32f7xx.c \
-Src/File_Handling.c \
-Middlewares/Third_Party/FatFs/src/diskio.c \
-Middlewares/Third_Party/FatFs/src/ff.c \
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c \
+Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c \
+Src/system_stm32f7xx.c \
+Middlewares/Third_Party/FatFs/src/diskio.c \
+Middlewares/Third_Party/FatFs/src/ff.c \
Middlewares/Third_Party/FatFs/src/ff_gen_drv.c \
Middlewares/Third_Party/FatFs/src/option/syscall.c \
Src/sysmem.c \
@@ -140,11 +156,15 @@ C_DEFS = \
AS_INCLUDES =
# C includes
-C_INCLUDES = \
--IInc \
--IDrivers/STM32F7xx_HAL_Driver/Inc \
--IDrivers/STM32F7xx_HAL_Driver/Inc/Legacy \
--IMiddlewares/Third_Party/FatFs/src \
+C_INCLUDES = \
+-IInc \
+-IApp/Core \
+-IApp/Protocol \
+-IApp/Devices \
+-IApp/Services \
+-IApp/Models \
+-IDrivers/STM32F7xx_HAL_Driver/Inc \
+-IMiddlewares/Third_Party/FatFs/src \
-IDrivers/CMSIS/Device/ST/STM32F7xx/Include \
-IDrivers/CMSIS/Include
diff --git a/Src/File_Handling.c b/Src/File_Handling.c
deleted file mode 100644
index 1cc0f2a..0000000
--- a/Src/File_Handling.c
+++ /dev/null
@@ -1,709 +0,0 @@
-/*
- * File_Handling_RTOS.c
- *
- * Created on: 14-May-2020
- * Author: Controllerstech
- */
-
-#include
-#include "stm32f7xx_hal.h"
-
-#define UART USART1
-
-
-
-/* =============================>>>>>>>> NO CHANGES AFTER THIS LINE =====================================>>>>>>> */
-
-FATFS fs; // file system
-FIL fil; // File
-FILINFO fno;
-extern FRESULT fresult; // result
-extern unsigned long sizeoffile;
-UINT br, bw; // File read/write count
-
-/**** capacity related *****/
-FATFS *pfs;
-DWORD fre_clust;
-uint32_t total, free_space;
-
-
-void Send_Uart (char *string)
-{
- //HAL_UART_Transmit(UART, (uint8_t *)string, strlen (string), HAL_MAX_DELAY);
-}
-
-
-
-int Mount_SD (const TCHAR* path)
-{
- fresult = f_mount(&fs, path, 1);
- if (fresult != FR_OK) return 1;
- else return 0;
-}
-
-int Unmount_SD (const TCHAR* path)
-{
- fresult = f_mount(NULL, path, 1);
- if (fresult == FR_OK) return 0;//Send_Uart ("SD CARD UNMOUNTED successfully...\n\n\n");
- return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n");
-}
-
-/* Start node to be scanned (***also used as work area***) */
-FRESULT Scan_SD (char* pat)
-{
- DIR dir;
- UINT i;
- char *path = malloc(20*sizeof (char));
- sprintf (path, "%s",pat);
-
- fresult = f_opendir(&dir, path); /* Open the directory */
- if (fresult == FR_OK)
- {
- for (;;)
- {
- fresult = f_readdir(&dir, &fno); /* Read a directory item */
- if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- if (fno.fattrib & AM_DIR) /* It is a directory */
- {
- if (!(strcmp ("SYSTEM~1", fno.fname))) continue;
- char *buf = malloc(30*sizeof(char));
- sprintf (buf, "Dir: %s\r\n", fno.fname);
- Send_Uart(buf);
- free(buf);
- i = strlen(path);
- sprintf(&path[i], "/%s", fno.fname);
- fresult = Scan_SD(path); /* Enter the directory */
- if (fresult != FR_OK) break;
- path[i] = 0;
- }
- else
- { /* It is a file. */
- char *buf = malloc(30*sizeof(char));
- sprintf(buf,"File: %s/%s\n", path, fno.fname);
- Send_Uart(buf);
- free(buf);
- }
- }
- f_closedir(&dir);
- }
- free(path);
- return fresult;
-}
-
-/* Only supports removing files from home directory */
-FRESULT Format_SD (void)
-{
- DIR dir;
- char *path = malloc(20*sizeof (char));
- sprintf (path, "%s","/");
-
- fresult = f_opendir(&dir, path); /* Open the directory */
- if (fresult == FR_OK)
- {
- for (;;)
- {
- fresult = f_readdir(&dir, &fno); /* Read a directory item */
- if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- if (fno.fattrib & AM_DIR) /* It is a directory */
- {
- if (!(strcmp ("SYSTEM~1", fno.fname))) continue;
- fresult = f_unlink(fno.fname);
- if (fresult == FR_DENIED) continue;
- }
- else
- { /* It is a file. */
- fresult = f_unlink(fno.fname);
- }
- }
- f_closedir(&dir);
- }
- free(path);
- return fresult;
-}
-
-
-
-
-FRESULT Write_File (char *name, char *data)
-{
-
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Create a file with read write access and open it */
- fresult = f_open(&fil, name, FA_OPEN_EXISTING | FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- fresult = f_write(&fil, data, strlen(data), &bw);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in closing file *%s* after writing it\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
- }
-}
-
-FRESULT Write_File_byte (char *name, uint8_t *data, unsigned int bytesize)
-{
-
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Create a file with read write access and open it */
- fresult = f_open(&fil, name, FA_OPEN_EXISTING | FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- fresult = f_write(&fil, data, bytesize, &bw);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in closing file *%s* after writing it\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
- }
-}
-
-FRESULT Read_File (char *name)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Open file to read */
- fresult = f_open(&fil, name, FA_READ);
-
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- /* Read data from the file
- * see the function details for the arguments */
-
- char *buffer = malloc(sizeof(f_size(&fil)));
- fresult = f_read (&fil, buffer, f_size(&fil), &br);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- free(buffer);
- sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- Send_Uart(buffer);
- free(buf);
- }
-
- else
- {
- Send_Uart(buffer);
- free(buffer);
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "File *%s* CLOSED successfully\n", name);
- Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
- }
-}
-
-FRESULT Seek_Read_File (char *name, uint8_t *data, unsigned int bytesize, unsigned long goto_label)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Open file to read */
- fresult = f_open(&fil, name, FA_READ);
-
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- /* Read data from the file
- * see the function details for the arguments */
-
- //char *buffer = malloc(sizeof(f_size(&fil)));
- fresult = f_lseek (&fil, goto_label); /* Move file pointer of the file object */
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //free(buffer);
- sprintf (buf, "ERROR!!! Can't seek the file: *%s*\n\n", name);
- //Send_Uart(buffer);
- free(buf);
- return fresult;
- }
- fresult = f_read (&fil, data, bytesize, &br);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //free(buffer);
- sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- //Send_Uart(buffer);
- free(buf);
-
- }
-
- else
- {
- //Send_Uart(buffer);
- //free(buffer);
- if (goto_label==0)//Set size of file in first 4 bytes
- {
- sizeoffile = f_size(&fil);
- data[0] = (uint8_t) (sizeoffile&0xff);
- data[1] = (uint8_t) ((sizeoffile>>8)&0xff);
- data[2] = (uint8_t) ((sizeoffile>>16)&0xff);
- data[3] = (uint8_t) ((sizeoffile>>24)&0xff);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "File *%s* CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
- }
-}
-
-FRESULT Create_File (char *name)
-{
- fresult = f_stat (name, &fno);
- if (fresult == FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* already exists!!!!\n use Update_File \n\n",name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
- else
- {
- fresult = f_open(&fil, name, FA_CREATE_ALWAYS|FA_READ|FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in creating file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "*%s* created successfully\n Now use Write_File to write data\n",name);
- //Send_Uart(buf);
- free(buf);
- }
-
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR No. %d in closing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
-}
-
-FRESULT Update_File (char *name, char *data)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Create a file with read write access and open it */
- fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- /* Writing text */
- fresult = f_write(&fil, data, strlen (data), &bw);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
-
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "*%s* UPDATED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
-}
-
-FRESULT Remove_File (char *name)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- fresult = f_unlink (name);
- if (fresult == FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "*%s* has been removed successfully\n", name);
- Send_Uart (buf);
- free(buf);
- }
-
- else
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR No. %d in removing *%s*\n\n",fresult, name);
- Send_Uart (buf);
- free(buf);
- }
- }
- return fresult;
-}
-
-FRESULT Create_Dir (char *name)
-{
- fresult = f_mkdir(name);
- if (fresult == FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "*%s* has been created successfully\n", name);
- Send_Uart (buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- sprintf (buf, "ERROR No. %d in creating directory *%s*\n\n", fresult,name);
- Send_Uart(buf);
- free(buf);
- }
- return fresult;
-}
-
-void Check_SD_Space (void)
-{
- /* Check free space */
- f_getfree("", &fre_clust, &pfs);
-
- total = (uint32_t)((pfs->n_fatent - 2) * pfs->csize * 0.5);
- char *buf = malloc(30*sizeof(char));
- sprintf (buf, "SD CARD Total Size: \t%lu\n",total);
- Send_Uart(buf);
- free(buf);
- free_space = (uint32_t)(fre_clust * pfs->csize * 0.5);
- buf = malloc(30*sizeof(char));
- sprintf (buf, "SD CARD Free Space: \t%lu\n",free_space);
- Send_Uart(buf);
- free(buf);
-}
-
-FRESULT Update_File_float (char *name, float *data, unsigned int bytesize)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Create a file with read write access and open it */
- fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- /* Writing text */
- fresult = f_write(&fil, data, bytesize, &bw);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
-
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "*%s* UPDATED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
-}
-
-FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize)
-{
- /**** check whether the file exists or not ****/
- fresult = f_stat (name, &fno);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- //Send_Uart (buf);
- free(buf);
- return fresult;
- }
-
- else
- {
- /* Create a file with read write access and open it */
- fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- return fresult;
- }
-
- /* Writing text */
- fresult = f_write(&fil, data, bytesize, &bw);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
-
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "*%s* UPDATED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
-
- /* Close file */
- fresult = f_close(&fil);
- if (fresult != FR_OK)
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- //Send_Uart(buf);
- free(buf);
- }
- else
- {
- char *buf = malloc(100*sizeof(char));
- //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- //Send_Uart(buf);
- free(buf);
- }
- }
- return fresult;
-}
diff --git a/Src/bsp_driver_sd.c b/Src/bsp_driver_sd.c
index f3d988b..bee1bb8 100644
--- a/Src/bsp_driver_sd.c
+++ b/Src/bsp_driver_sd.c
@@ -28,45 +28,70 @@
/* USER CODE END 0 */
#else
-/* USER CODE BEGIN FirstSection */
-/* can be used to modify / undefine following code or add new definitions */
-/* USER CODE END FirstSection */
-/* Includes ------------------------------------------------------------------*/
-#include "bsp_driver_sd.h"
+/* USER CODE BEGIN FirstSection */
+/* can be used to modify / undefine following code or add new definitions */
+/* USER CODE END FirstSection */
+/* Includes ------------------------------------------------------------------*/
+#include "bsp_driver_sd.h"
/* Extern variables ---------------------------------------------------------*/
extern SD_HandleTypeDef hsd1;
-/* USER CODE BEGIN BeforeInitSection */
-/* can be used to modify / undefine following code or add code */
-/* USER CODE END BeforeInitSection */
+/* USER CODE BEGIN BeforeInitSection */
+/* can be used to modify / undefine following code or add code */
+static volatile uint8_t g_last_bsp_sd_init_status = MSD_ERROR_SD_NOT_PRESENT;
+static volatile uint8_t g_last_bsp_sd_detect_status = SD_NOT_PRESENT;
+static volatile uint8_t g_last_bsp_sd_hal_init_status = HAL_ERROR;
+static volatile uint8_t g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+static volatile uint32_t g_last_bsp_sd_hal_error = 0u;
+
+void BSP_SD_GetDebugInfo(bsp_sd_debug_info_t *out_info)
+{
+ if (out_info == NULL)
+ {
+ return;
+ }
+
+ out_info->last_init_status = g_last_bsp_sd_init_status;
+ out_info->last_detect_status = g_last_bsp_sd_detect_status;
+ out_info->last_hal_init_status = g_last_bsp_sd_hal_init_status;
+ out_info->last_wide_bus_status = g_last_bsp_sd_wide_bus_status;
+ out_info->last_hal_error = g_last_bsp_sd_hal_error;
+}
+/* USER CODE END BeforeInitSection */
/**
* @brief Initializes the SD card device.
* @retval SD status
*/
-__weak uint8_t BSP_SD_Init(void)
-{
- uint8_t sd_state = MSD_OK;
- /* Check if the SD card is plugged in the slot */
- if (BSP_SD_IsDetected() != SD_PRESENT)
- {
- return MSD_ERROR_SD_NOT_PRESENT;
- }
- /* HAL SD initialization */
- sd_state = HAL_SD_Init(&hsd1);
- /* Configure SD Bus width (4 bits mode selected) */
- if (sd_state == MSD_OK)
- {
- /* Enable wide operation */
- if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK)
- {
- sd_state = MSD_ERROR;
- }
- }
-
- return sd_state;
-}
+__weak uint8_t BSP_SD_Init(void)
+{
+ uint8_t sd_state = MSD_OK;
+ g_last_bsp_sd_detect_status = BSP_SD_IsDetected();
+ g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+ g_last_bsp_sd_hal_error = 0u;
+ /* Check if the SD card is plugged in the slot */
+ if (g_last_bsp_sd_detect_status != SD_PRESENT)
+ {
+ g_last_bsp_sd_init_status = MSD_ERROR_SD_NOT_PRESENT;
+ return MSD_ERROR_SD_NOT_PRESENT;
+ }
+ hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;
+ hsd1.Init.ClockDiv = 118u;
+ /* HAL SD initialization */
+ sd_state = HAL_SD_Init(&hsd1);
+ g_last_bsp_sd_hal_init_status = sd_state;
+ g_last_bsp_sd_hal_error = hsd1.ErrorCode;
+ /* Configure SD Bus width (4 bits mode selected) */
+ if (sd_state == MSD_OK)
+ {
+ g_last_bsp_sd_wide_bus_status = HAL_OK;
+ }
+
+ g_last_bsp_sd_init_status = sd_state;
+ return sd_state;
+}
/* USER CODE BEGIN AfterInitSection */
/* can be used to modify previous code / undefine following code / add code */
/* USER CODE END AfterInitSection */
diff --git a/Src/main.c b/Src/main.c
index 74ffb9f..d3ce1e8 100644
--- a/Src/main.c
+++ b/Src/main.c
@@ -20,96 +20,19 @@
#include "main.h"
#include "fatfs.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-// #include "math.h"
- #include "File_Handling.h"
- #include
-/* USER CODE END Includes */
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+#include "app_core.h"
+/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-// AD9102 register addresses and bit fields (see ad9102.pdf)
-#define AD9102_REG_RAMUPDATE 0x001Du
-#define AD9102_REG_PAT_STATUS 0x001Eu
-#define AD9102_REG_PAT_TYPE 0x001Fu
-#define AD9102_REG_SPICONFIG 0x0000u
-#define AD9102_REG_POWERCONFIG 0x0001u
-#define AD9102_REG_CLOCKCONFIG 0x0002u
-#define AD9102_REG_WAV_CONFIG 0x0027u
-#define AD9102_REG_PAT_TIMEBASE 0x0028u
-#define AD9102_REG_PAT_PERIOD 0x0029u
-#define AD9102_REG_DAC_PAT 0x002Bu
-#define AD9102_REG_SAW_CONFIG 0x0037u
-#define AD9102_REG_START_DLY 0x005Cu
-#define AD9102_REG_START_ADDR 0x005Du
-#define AD9102_REG_STOP_ADDR 0x005Eu
-#define AD9102_REG_SRAM_DATA_BASE 0x6000u
-#define AD9102_REG_CFG_ERROR 0x0060u
-
-#define AD9102_PAT_STATUS_RUN (1u << 0)
-
-#define AD9102_WAV_PRESTORE_SEL_SHIFT 4
-#define AD9102_WAV_WAVE_SEL_SHIFT 0
-#define AD9102_WAV_PRESTORE_SAW 1u
-#define AD9102_WAV_WAVE_SEL_PRESTORE 1u
-
-#define AD9102_SAW_STEP_SHIFT 2
-#define AD9102_SAW_TYPE_SHIFT 0
-#define AD9102_SAW_TYPE_UP 0u
-#define AD9102_SAW_TYPE_DOWN 1u
-#define AD9102_SAW_TYPE_TRI 2u
-#define AD9102_SAW_TYPE_ZERO 3u
-
-#define AD9102_REG_COUNT 66u
-
-#define AD9102_EX4_WAV_CONFIG 0x3212u
-#define AD9102_EX4_PAT_TIMEBASE 0x0121u
-#define AD9102_EX4_PAT_PERIOD 0xFFFFu
-#define AD9102_EX4_SAW_CONFIG 0x0606u
-
-#define AD9102_EX2_WAV_CONFIG 0x3030u
-#define AD9102_EX2_DAC_PAT 0x0101u
-#define AD9102_EX2_SAW_CONFIG 0x0200u
-#define AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT 0x1u
-#define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
-#define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
-#define AD9102_SRAM_HOLD_DEFAULT 0x1u
-#define AD9102_SRAM_AMP_DEFAULT 8191u
-#define AD9102_SRAM_SAMPLES_DEFAULT 16u
-#define AD9102_SRAM_MAX_SAMPLES 4096u
-#define AD9102_SRAM_RAMP_MIN (-8192)
-#define AD9102_SRAM_RAMP_MAX (8191)
-#define AD9102_SRAM_RAMP_SPAN (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN)
-
-#define AD9102_SAW_STEP_DEFAULT 1u
-#define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
-#define AD9102_START_DELAY_BASE_DEFAULT 0x1u
-#define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
-#define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
-
-#define AD9102_FLAG_ENABLE 0x0001u
-#define AD9102_FLAG_TRIANGLE 0x0002u
-#define AD9102_FLAG_SRAM 0x0004u
-#define AD9102_FLAG_SRAM_FMT 0x0008u
-#define AD9102_WAVE_OPCODE_BEGIN 0x0001u
-#define AD9102_WAVE_OPCODE_COMMIT 0x0002u
-#define AD9102_WAVE_OPCODE_CANCEL 0x0003u
-#define AD9102_WAVE_MAX_CHUNK_SAMPLES 12u
-
-#define AD9833_FLAG_ENABLE 0x0001u
-#define AD9833_FLAG_TRIANGLE 0x0002u
-#define DS1809_FLAG_UC 0x0001u
-#define DS1809_FLAG_DC 0x0002u
-#define DS1809_PULSE_MS_DEFAULT 2u
-#define STM32_DAC_FLAG_ENABLE 0x0001u
-#define STM32_DAC_CODE_MAX 4095u
-/* USER CODE END PD */
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN PD */
+/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
@@ -120,76 +43,14 @@
ADC_HandleTypeDef hadc1;
ADC_HandleTypeDef hadc3;
-SD_HandleTypeDef hsd1;
-
-TIM_HandleTypeDef htim4;
-TIM_HandleTypeDef htim8;
+SD_HandleTypeDef hsd1;
+
TIM_HandleTypeDef htim1;
-TIM_HandleTypeDef htim10;
-TIM_HandleTypeDef htim11;
-
-UART_HandleTypeDef huart8;
-
-/* USER CODE BEGIN PV */
-uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, TO10, TO10_counter, TIM10_period;//timer 6 ticks & SD FILE COUNTER
-uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_8], flg_tmt, u_tx_flg, u_rx_flg, TIM10_coflag;
-uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_matr[SD_Length][DL_16];
-FRESULT fresult; // result
-int test;
-unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_SIZE_32*FPGA_RECEIVE_WORD_SIZE_8+4+2
-
-LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup;
-Work_SetupTypeDef Curr_setup, Def_setup;
-LDx_ParamTypeDef LD1_param, LD2_param;
-
-LD_Blinker_StateTypeDef LD_blinker;
-
-task_t task;
-
-static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
- 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
- 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
- 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
- 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
- 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
- 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
- 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
- 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
- 0x001eu, 0x001du
-};
-
-static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
- 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
- 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
- 0x0001u, 0x0001u
-};
-static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = {
- 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u,
- 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u,
- 0x0001u, 0x0001u
-};
+UART_HandleTypeDef huart8;
-static uint8_t ad9102_wave_upload_active = 0u;
-static uint16_t ad9102_wave_expected_samples = 0u;
-static uint16_t ad9102_wave_written_samples = 0u;
-
-
-
-
-/* USER CODE END PV */
+/* USER CODE BEGIN PV */
+/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
@@ -204,58 +65,13 @@ static void MX_SPI2_Init(void);
static void MX_SPI5_Init(void);
static void MX_SPI6_Init(void);
static void MX_USART1_UART_Init(void);
-static void MX_SDMMC1_SD_Init(void);
-static void MX_TIM7_Init(void);
-static void MX_TIM6_Init(void);
-static void MX_TIM10_Init(void);
+static void MX_SDMMC1_SD_Init(void);
+static void MX_TIM7_Init(void);
+static void MX_TIM6_Init(void);
static void MX_UART8_Init(void);
-static void MX_TIM8_Init(void);
-static void MX_TIM11_Init(void);
-static void MX_TIM4_Init(void);
static void MX_TIM1_Init(void);
-/* USER CODE BEGIN PFP */
-static void Init_params(void);
-static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
-static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
-void Set_LTEC(uint8_t num, uint16_t DATA);
-static uint16_t MPhD_T(uint8_t num);
-static uint16_t Get_ADC(uint8_t num);
-static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num);
-static void AD9102_Init(void);
-static void AD9102_WriteReg(uint16_t addr, uint16_t value);
-static uint16_t AD9102_ReadReg(uint16_t addr);
-static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
-static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
-static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude);
-static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude);
-static void AD9102_ResetWaveUploadState(void);
-static void AD9102_StopOutput(void);
-static void AD9102_StartOutput(void);
-static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold);
-static uint8_t AD9102_BeginWaveUpload(uint16_t samples);
-static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count);
-static uint16_t AD9102_CommitWaveUpload(uint8_t *ok);
-static void AD9102_CancelWaveUpload(void);
-static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
-static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold);
-static void SPI2_SetMode(uint32_t polarity, uint32_t phase);
-static void AD9833_WriteWord(uint16_t word);
-static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word);
-static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms);
-static void PA4_DAC_Init(void);
-static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable);
-uint8_t CheckChecksum(uint16_t *pbuff);
-uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
-//int SD_Init(void);
-int SD_SAVE(uint16_t *pbuff);
-//uint32_t Get_Length(void);
-int SD_READ(uint16_t *pbuff);
-int SD_REMOVE(void);
-void USART_TX (uint8_t* dt, uint16_t sz);
-void USART_TX_DMA (uint16_t sz);
-static void Stop_TIM10();
-static void OUT_trigger(uint8_t);
-/* USER CODE END PFP */
+/* USER CODE BEGIN PFP */
+/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
@@ -266,14 +82,9 @@ static void OUT_trigger(uint8_t);
* @brief The application entry point.
* @retval int
*/
-int main(void)
-{
-
- /* USER CODE BEGIN 1 */
- HAL_StatusTypeDef st;
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
+int main(void)
+{
+ /* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
@@ -302,835 +113,21 @@ int main(void)
MX_SPI5_Init();
MX_SPI6_Init();
MX_USART1_UART_Init();
- MX_SDMMC1_SD_Init();
- MX_TIM7_Init();
- MX_TIM6_Init();
- MX_TIM10_Init();
- MX_UART8_Init();
- MX_TIM8_Init();
- MX_TIM11_Init();
- MX_TIM4_Init();
+ MX_SDMMC1_SD_Init();
+ MX_TIM7_Init();
+ MX_TIM6_Init();
+ MX_UART8_Init();
MX_TIM1_Init();
- PA4_DAC_Init();
/* USER CODE BEGIN 2 */
- Init_params();
- //HAL_TIM_Base_Start(&htim11);
- //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
-
-
- //TIM4,11 clocks = 92 MHz
-
- //ADC clock
- //TIM4 -> ARR = 60; // for 1.5 MHz
- //TIM4 -> ARR = 91; // for 1 MHz
- //TIM4 -> ARR = 45; // for 2 MHz
- TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
-
- TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
-
-
- //Mach-Zander clock (should be 1/4 of ADC clock freq)
-
- TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
- TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
-
- // AD9833 MCLK output on PE9 (TIM1_CH1)
- // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output
- HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
-
- /*
- if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
-
- CPU_state = DECODE_ENABLE;
- }
- */
- /* USER CODE END 2 */
+ app_init();
+ /* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
- while (1)
- {
- if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0))
- {
- //NVIC_DisableIRQ(USART1_IRQn);
- LL_USART_EnableIT_PE(USART1);
- LL_USART_EnableIT_RXNE(USART1);
- LL_USART_EnableIT_ERROR(USART1);
- NVIC_SetPriority(USART1_IRQn, 0);
- NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- u_rx_flg = 1;
- }
-// else
-// {
-// //NVIC_DisableIRQ(USART1_IRQn);
-// u_rx_flg = 0;
-// }
- switch (CPU_state)
- {
- case HALT://0 - Default state
- CPU_state_old = HALT;//Save main current cycle
- task.current_param = task.min_param;
- Stop_TIM10();
- break;
- case DECODE_ENABLE://1 - Decode rec. message
- CS_result = CalculateChecksum(COMMAND, CL_16-2);
- if (CheckChecksum(COMMAND))
- {
- LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1
- LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- TO6_before = TO6;
- //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP;
- CPU_state = WORK_ENABLE;
- CPU_state_old = WORK_ENABLE;//Save main current cycle
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- CPU_state = DEFAULT_ENABLE;
- CPU_state_old = HALT;//Save main current cycle
- }
- UART_transmission_request = MESS_01;
- break;
- case DEFAULT_ENABLE://2 - Go to HALT
- //Set current setup to default
- task.current_param = task.min_param;
- Stop_TIM10();
- Init_params();
- AD9102_CancelWaveUpload();
- LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- CPU_state = HALT;
- CPU_state_old = HALT;//Save main current cycle
- UART_transmission_request = MESS_01;
- break;
- case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- temp16 = SD_READ(&Long_Data[0]);
- State_Data[0]|=temp16&0xff;
- if (temp16==0)
- {
- UART_transmission_request = MESS_03;
- }
- else
- {
- UART_transmission_request = MESS_01;
- }
- CPU_state_old = HALT;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case TRANS_ENABLE://4 - Transmith current packet
- UART_transmission_request = MESS_02;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case REMOVE_FILE://5 - Remove file from SD
- State_Data[0]|=SD_REMOVE()&0xff;
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case STATE://6 - Transmith state message
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case WORK_ENABLE://7 - Main work cycle
- task.current_param = task.min_param;
- Stop_TIM10();
- if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- {
- TO7_before = TO7;
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-
- //Correct temperature in all pulses
- (void) MPhD_T(3);
- LD1_param.LD_CURR_TEMP = MPhD_T(3);
- (void) MPhD_T(4);
- LD2_param.LD_CURR_TEMP = MPhD_T(4);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(3, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(4, temp16);//Drive Laser TEC 2
-
- Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
-
- Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1
- Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
-
- //Prepare DATA of internals ADCs
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(0);
- temp16 = Get_ADC(1);
- Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- temp16 = Get_ADC(2);
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(3);
- temp16 = Get_ADC(4);
- Long_Data[12] = temp16;
- temp16 = Get_ADC(5);
-
- //Put the timer tick to Long_Data:
- TO6_stop = TO6;
- Long_Data[3] = (TO6_stop)&0xffff;
- Long_Data[4] = (TO6_stop>>16)&0xffff;
-
- //Put the average temperature of LD1 to Long_Data:
- Long_Data[5] = LD1_param.LD_CURR_TEMP;
-
- //Put the average temperature of LD2 to Long_Data:
- Long_Data[6] = LD2_param.LD_CURR_TEMP;
-
- if (Curr_setup.SD_EN==1)
- {
- CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- Long_Data[DL_16-1] = CS_result;
- temp16 = SD_SAVE(&Long_Data[0]);
- State_Data[0]|=temp16&0xff;
- }
- CPU_state_old = WORK_ENABLE;//Save main current cycle
- }
- break;
- case AD9102_CMD://10 - Configure AD9102 sawtooth output
- if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
- {
- uint16_t flags = COMMAND[0];
- uint16_t param0 = COMMAND[1];
- uint16_t param1 = COMMAND[2];
- uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
-
- if (sram_mode)
- {
- uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u;
- uint16_t samples;
- uint8_t hold;
- uint16_t amplitude;
-
- if (sram_fmt)
- {
- amplitude = param0;
- samples = param1;
- hold = AD9102_SRAM_HOLD_DEFAULT;
- }
- else
- {
- samples = param0;
- hold = (uint8_t)(param1 & 0x0Fu);
- amplitude = AD9102_SRAM_AMP_DEFAULT;
- }
-
- uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude);
- State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- {
- State_Data[0] |= AD9102_ERR;
- }
- }
- else
- {
- uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
- uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- uint16_t pat_period = param1;
-
- if (param0 == 0u && param1 == 0u)
- {
- saw_step = AD9102_SAW_STEP_DEFAULT;
- pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
- pat_period = AD9102_PAT_PERIOD_DEFAULT;
- }
- else
- {
- if (saw_step == 0u)
- {
- saw_step = AD9102_SAW_STEP_DEFAULT;
- }
- else if (saw_step > 63u)
- {
- saw_step = 63u;
- }
- if (pat_period == 0u)
- {
- pat_period = AD9102_PAT_PERIOD_DEFAULT;
- }
- }
-
- uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
- State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- {
- State_Data[0] |= AD9102_ERR;
- }
- }
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case AD9833_CMD://11 - Configure AD9833 triangle output
- State_Data[1] = 0u;
- if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
- {
- uint16_t flags = COMMAND[0];
- uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
- uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
- uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
- uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
- uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
-
- AD9833_Apply(enable, triangle, freq_word);
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
- if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1])
- {
- uint16_t flags = COMMAND[0];
- uint16_t count = COMMAND[1];
- uint16_t pulse_ms = COMMAND[2];
- uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
- uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
-
- if (uc && dc)
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- else
- {
- if (count == 0u)
- {
- count = 1u;
- }
- if (count > 64u)
- {
- count = 64u;
- }
- if (pulse_ms == 0u)
- {
- pulse_ms = DS1809_PULSE_MS_DEFAULT;
- }
- if (pulse_ms > 500u)
- {
- pulse_ms = 500u;
- }
- DS1809_Pulse(uc, dc, count, pulse_ms);
- }
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4)
- if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1])
- {
- uint16_t flags = COMMAND[0];
- uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu);
- uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u;
- PA4_DAC_Set(dac_code, enable);
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload
- State_Data[1] = 0u;
- if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS - 1])
- {
- uint16_t opcode = COMMAND[0];
- uint16_t param0 = COMMAND[1];
- uint16_t param1 = COMMAND[2];
-
- switch (opcode)
- {
- case AD9102_WAVE_OPCODE_BEGIN:
- if ((param1 != 0u) || !AD9102_BeginWaveUpload(param0))
- {
- AD9102_CancelWaveUpload();
- State_Data[0] |= AD9102_ERR;
- }
- break;
- case AD9102_WAVE_OPCODE_COMMIT:
- {
- uint16_t samples = ad9102_wave_expected_samples;
- uint8_t ok = 0u;
- uint16_t pat_status;
-
- if ((param0 != 0u) || (param1 != 0u))
- {
- AD9102_CancelWaveUpload();
- State_Data[0] |= AD9102_ERR;
- break;
- }
-
- pat_status = AD9102_CommitWaveUpload(&ok);
- State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT))
- {
- State_Data[0] |= AD9102_ERR;
- }
- }
- break;
- case AD9102_WAVE_OPCODE_CANCEL:
- if ((param0 != 0u) || (param1 != 0u))
- {
- State_Data[0] |= AD9102_ERR;
- }
- AD9102_CancelWaveUpload();
- break;
- default:
- AD9102_CancelWaveUpload();
- State_Data[0] |= AD9102_ERR;
- break;
- }
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples
- State_Data[1] = 0u;
- if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS - 1])
- {
- uint16_t chunk_count = COMMAND[0];
- if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count))
- {
- AD9102_CancelWaveUpload();
- State_Data[0] |= AD9102_ERR;
- }
- }
- else
- {
- AD9102_CancelWaveUpload();
- State_Data[0] |= UART_DECODE_ERR;
- }
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case DECODE_TASK:
- if (CheckChecksum(COMMAND))
- {
- Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- TO6_before = TO6;
- CPU_state = RUN_TASK;
- CPU_state_old = RUN_TASK;//Save main current cycle
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- CPU_state = DEFAULT_ENABLE;
- CPU_state_old = HALT;//Save main current cycle
- }
- UART_transmission_request = MESS_01;
- break;
- case RUN_TASK:
- switch (task.task_type)
- {
- case TT_CHANGE_CURR_1:
-
-
- //calculating timer periods for ADC clock and Mach-Zander modulator
- //ADC clock
- //TIM4 -> ARR = 60; // for 1.5 MHz
- //TIM4 -> ARR = 91; // for 1 MHz
- //TIM4 -> ARR = 45; // for 2 MHz
-
- //online calculation for debug purposes:
- //manually varying TIM4 -> ARR by debugger while running
- //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
-
-
- //Mach-Zander clock (should be half of ADC clock freq)
- //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
- //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
-
-
-
- Set_LTEC(TT_CHANGE_CURR_2, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep procedure
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
-
- uint16_t step_counter = 0;
- uint16_t trigger_counter = 0;
- uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 10);
- uint16_t task_sheduler = 0;
-
-
-
- HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
-
-
-
- TIM11 -> CNT = 0;
- TIM4 -> CNT = 0;
-
- HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
- //TIM4 -> CNT = 0;
-
- TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big delay in RF subsystem (up to ~400 ns)
- TIM11 -> CNT = 0;
-
-
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- //TIM11 -> CNT = 0; // to link modulator phase
- //TIM4 -> CNT = 0; // to link ADC clock phase
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
-
- HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current trigger
- HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
-//*
- if (step_counter % trigger_step == 0){ //trigger at every 60 step
- OUT_trigger(trigger_counter);
- ++trigger_counter;
- }
- ++step_counter;
-//*/
-/*
- ++task_sheduler;
- if (task_sheduler >= 10){
- task_sheduler = 0;
- }
- //maintain stable temperature of laser 2
- if (task_sheduler == 0){
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- }
- //maintain stable temperature of laser 1
- //*
- if (task_sheduler == 5){
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- }
-//*/
- }
- }
- TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to one-pulse mode.
- //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
- //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
- //but one-pulse mode should be disabled
-
- //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
-
-
-
- Stop_TIM10();
-
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
- break;
- case TT_CHANGE_CURR_2:
- //Blink laser 2
-//*
- Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- LD_blinker.task_type = 2;
- LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, LD ON now; 3 -- blinking, LD OFF now
- //LD_blinker.param = task.current_param;
- LD_blinker.param = 0;
- LD_blinker.param = 1000; // LD2 current (in unspecified units)
- LD_blinker.signal_port = OUT_9_GPIO_Port;
- LD_blinker.signal_pin = OUT_9_Pin;
-
- TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units).
- //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU to anwser to desktop`s questions)
- st = HAL_TIM_Base_Start_IT(&htim8);
- if (st != HAL_OK)
- while(1);
-// */
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- uint32_t i = 10000; while (--i){}
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- LD_blinker.state = 2;
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- //Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- //LD_blinker.param = task.current_param;
- //++LD_blinker.param;
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
-
-
- }
- }
- HAL_TIM_Base_Stop(&htim10);
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
-
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-
- HAL_TIM_Base_Stop_IT(&htim8);
- TIM8->CNT = 0;
-
- Stop_TIM10();
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
-
-
-//*/
-
- /* // Backup
- Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
-
-
- }
- }
- Stop_TIM10();
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
- */
-
-
- break;
- case TT_CHANGE_TEMP_1:
- // isn't implemented
- break;
- case TT_CHANGE_TEMP_2:
- // isn't implemented
- break;
- }
-
- if (TO7>TO7_before)
- {
- TO7_before = TO7;
-
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-
- Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
-
- //Prepare DATA of internals ADCs
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(0);
- temp16 = Get_ADC(1);
- Long_Data[7] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[8] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[9] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[10] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[11] = temp16;
- temp16 = Get_ADC(2);
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(3);
- temp16 = Get_ADC(4);
- Long_Data[12] = temp16;
- temp16 = Get_ADC(5);
-
- //Put the timer tick to Long_Data:
- TO6_stop = TO6;
- Long_Data[3] = (TO6_stop)&0xffff;
- Long_Data[4] = (TO6_stop>>16)&0xffff;
-
- //Put the average temperature of LD1 to Long_Data:
- Long_Data[5] = LD1_param.LD_CURR_TEMP;
-
- //Put the average temperature of LD2 to Long_Data:
- Long_Data[6] = LD2_param.LD_CURR_TEMP;
- }
- while (!TIM10_coflag);
-
- Stop_TIM10();
-
- if (task.tau > 3)
- {
- htim10.Init.Period = TIM10_period;
- TO10_counter = task.dt / 10;
- }
-
- CPU_state_old = RUN_TASK;
- break;
- }
-
- switch (UART_transmission_request)
- {
- case MESS_01://Default state
- USART_TX(State_Data,2);
- //HAL_UART_Transmit(&huart1, State_Data, 2, 10);
- State_Data[0]=0;
- State_Data[1]=0;//All OK!
- UART_transmission_request = NO_MESS;
- break;
- case MESS_02://Transmith packet
-
- //Find CS and put to Long_Data:
- CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- Long_Data[DL_16-1] = CS_result;
-
- for (uint16_t i = 0; i < DL_16; i++)
- {
- UART_DATA[i*2] = (Long_Data[i])&0xff;
- UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- }
- //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
- //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- //huart1.gState = HAL_UART_STATE_READY;
- //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
- USART_TX_DMA (DL_8);//Send data by USART using DMA
- UART_transmission_request = NO_MESS;
- break;
- case MESS_03://Transmith saved packet
- for (uint16_t i = 0; i < DL_16; i++)
- {
- UART_DATA[i*2] = (Long_Data[i])&0xff;
- UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- }
- //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- //huart1.gState = HAL_UART_STATE_READY;
- //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
- USART_TX_DMA (DL_8);//Send data by USART using DMA
- UART_transmission_request = NO_MESS;
- break;
- }
- if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of command and right now longer than 1 sec.:
- {
- UART_rec_incr = 0;//Reset uart command counter
- State_Data[0] |= UART_ERR;//timeout error!
- UART_transmission_request = MESS_01;//Send status
- flg_tmt = 0;//Reset timeout flag
- }
- /* USER CODE END WHILE */
+ while (1)
+ {
+ app_run_once();
+ /* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
@@ -1658,70 +655,11 @@ static void MX_TIM2_Init(void)
}
-/**
- * @brief TIM4 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM4_Init(void)
-{
-
- /* USER CODE BEGIN TIM4_Init 0 */
-
- /* USER CODE END TIM4_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
- TIM_OC_InitTypeDef sConfigOC = {0};
-
- /* USER CODE BEGIN TIM4_Init 1 */
-
- /* USER CODE END TIM4_Init 1 */
- htim4.Instance = TIM4;
- htim4.Init.Prescaler = 0;
- htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim4.Init.Period = 45;
- htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- sConfigOC.Pulse = 22;
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM4_Init 2 */
-
- /* USER CODE END TIM4_Init 2 */
- HAL_TIM_MspPostInit(&htim4);
-
-}
-
-/**
- * @brief TIM5 Initialization Function
- * @param None
- * @retval None
- */
+/**
+ * @brief TIM5 Initialization Function
+ * @param None
+ * @retval None
+ */
static void MX_TIM5_Init(void)
{
@@ -1830,130 +768,6 @@ static void MX_TIM7_Init(void)
}
-/**
- * @brief TIM8 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM8_Init(void)
-{
-
- /* USER CODE BEGIN TIM8_Init 0 */
-
- /* USER CODE END TIM8_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
-
- /* USER CODE BEGIN TIM8_Init 1 */
-
- /* USER CODE END TIM8_Init 1 */
- htim8.Instance = TIM8;
- htim8.Init.Prescaler = 0;
- htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim8.Init.Period = 91;
- htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim8.Init.RepetitionCounter = 0;
- htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM8_Init 2 */
-
- /* USER CODE END TIM8_Init 2 */
-
-}
-
-/**
- * @brief TIM10 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM10_Init(void)
-{
-
- /* USER CODE BEGIN TIM10_Init 0 */
-
- /* USER CODE END TIM10_Init 0 */
-
- /* USER CODE BEGIN TIM10_Init 1 */
-
- /* USER CODE END TIM10_Init 1 */
- htim10.Instance = TIM10;
- htim10.Init.Prescaler = 183;
- htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim10.Init.Period = 9;
- htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM10_Init 2 */
-
- /* USER CODE END TIM10_Init 2 */
-
-}
-
-/**
- * @brief TIM11 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM11_Init(void)
-{
-
- /* USER CODE BEGIN TIM11_Init 0 */
-
- /* USER CODE END TIM11_Init 0 */
-
- TIM_OC_InitTypeDef sConfigOC = {0};
-
- /* USER CODE BEGIN TIM11_Init 1 */
-
- /* USER CODE END TIM11_Init 1 */
- htim11.Instance = TIM11;
- htim11.Init.Prescaler = 1;
- htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim11.Init.Period = 91;
- htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- {
- Error_Handler();
- }
- if (HAL_TIM_PWM_Init(&htim11) != HAL_OK)
- {
- Error_Handler();
- }
- sConfigOC.OCMode = TIM_OCMODE_PWM1;
- sConfigOC.Pulse = 91;
- sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM11_Init 2 */
-
- /* USER CODE END TIM11_Init 2 */
- HAL_TIM_MspPostInit(&htim11);
-
-}
-
/**
* @brief TIM1 Initialization Function
* @param None
@@ -2329,1624 +1143,9 @@ static void MX_GPIO_Init(void)
/* USER CODE END MX_GPIO_Init_2 */
}
-/* USER CODE BEGIN 4 */
-
-//void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
-
-// UART_transmission_request = NO_MESS;
-
-//}
-
-static void Init_params(void)
-{
- TO6 = 0;
- TO7 = 0;
- TO7_before = 0;
- TO6_before = 0;
- TO6_uart = 0;
- flg_tmt = 0;
- UART_rec_incr = 0;
- fgoto = 0;
- sizeoffile = 0;
- u_tx_flg = 0;
- u_rx_flg = 0;
- //State_Data[0]=0;
- //State_Data[1]=0;//All OK!
- for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-
- temp2++;
- LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- temp2++;
- LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- temp2++;
- temp2++;
- temp2++;
- Curr_setup->AVERAGES = (uint16_t)(*temp2);
- temp2++;
- LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- Long_Data[13] = (uint16_t)(*temp2);//Message ID
- temp2++;
- LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
- temp2++;
- LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
- temp2++;
-
- if (Curr_setup->U5V1_EN)
- {
- HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->U5V2_EN)
- {
- HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->LD1_EN)
- {
- HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET);
- //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
- }
- else
- {
- HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
- //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
- }
-
- if (Curr_setup->LD2_EN)
- {
- HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET);
- //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
- }
- else
- {
- HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
- //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
- }
-
- if (Curr_setup->REF1_EN)
- {
- HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->REF2_EN)
- {
- HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
- }
-
- if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN))
- {
- Set_LTEC(3,32767);
- Set_LTEC(3,32767);
- HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
- }
-
- if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN))
- {
- Set_LTEC(4,32767);
- Set_LTEC(4,32767);
- HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->PI1_RD==0)
- {
- LD1_curr_setup->P_coef_temp = 10;
- LD1_curr_setup->I_coef_temp = 0.01;
- }
-
- if (Curr_setup->PI2_RD==0)
- {
- LD2_curr_setup->P_coef_temp = 10;
- LD2_curr_setup->I_coef_temp = 0.01;
- }
-}
-
-static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup)
-{
- uint16_t *temp2;
-
- temp2 = (uint16_t *)Command;
- Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-
- temp2++;
- task.task_type = (uint8_t)(*temp2); temp2++;
- task.min_param = (float)(*temp2); temp2++;
- task.max_param = (float)(*temp2); temp2++;
- task.delta_param = (float)(*temp2); temp2++;
- task.dt = (float)(*temp2) / 100.0; temp2++;
- task.sec_param = (float)(*temp2); temp2++;
- task.curr = (float)(*temp2); temp2++;
- task.temp = (float)(*temp2); temp2++;
- task.tau = (float)(*temp2); temp2++;
- task.p_coef_1 = (float)(*temp2) * 256.0; temp2++;
- task.i_coef_1 = (float)(*temp2) * 256.0; temp2++;
- task.p_coef_2 = (float)(*temp2) * 256.0; temp2++;
- task.i_coef_2 = (float)(*temp2) * 256.0; temp2++;
-
- TO10_counter = task.dt / 10;
-}
-
-void OUT_trigger(uint8_t out_n)
-{
- switch (out_n)
- {
- case 0:
- HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- break;
-
- case 1:
- HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- break;
-
- case 2:
- HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- break;
-
- case 3:
- HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- break;
-
- case 4:
- HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- break;
-
- case 5:
- HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- break;
-
- case 6:
- HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- break;
-
- case 7:
- HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- break;
-
- case 8:
- HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- break;
-
- case 9:
- HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- break;
- }
-}
-
-static void AD9102_Init(void)
-{
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
- for (volatile uint32_t d = 0; d < 1000; d++) {}
- HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
-
- AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-}
-
-static void SPI2_SetMode(uint32_t polarity, uint32_t phase)
-{
- if (LL_SPI_IsEnabled(SPI2))
- {
- LL_SPI_Disable(SPI2);
- }
- LL_SPI_SetClockPolarity(SPI2, polarity);
- LL_SPI_SetClockPhase(SPI2, phase);
- if (!LL_SPI_IsEnabled(SPI2))
- {
- LL_SPI_Enable(SPI2);
- }
-}
-
-static void AD9833_WriteWord(uint16_t word)
-{
- uint32_t tmp32 = 0;
-
- SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
-
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-
- HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
-
- while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- LL_SPI_TransmitData16(SPI2, word);
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- (void) SPI2->DR;
-
- HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
-}
-
-static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word)
-{
- uint16_t control = 0x2000u; // B28 = 1
- if (triangle)
- {
- control |= 0x0002u; // MODE = 1 (triangle)
- }
- control |= 0x0100u; // RESET = 1 while updating
-
- freq_word &= 0x0FFFFFFFu;
- uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
- uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
-
- AD9833_WriteWord(control);
- AD9833_WriteWord(lsw);
- AD9833_WriteWord(msw);
- AD9833_WriteWord(0xC000u); // PHASE0 = 0
-
- if (enable)
- {
- control &= (uint16_t)(~0x0100u);
- }
- AD9833_WriteWord(control);
-}
-
-static void PA4_DAC_Init(void)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- __HAL_RCC_DAC_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
-
- GPIO_InitStruct.Pin = GPIO_PIN_4;
- GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- // Keep channel disabled until a dedicated serial command enables it.
- DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1);
- DAC->DHR12R1 = 0u;
-}
-
-static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable)
-{
- if (dac_code > STM32_DAC_CODE_MAX)
- {
- dac_code = STM32_DAC_CODE_MAX;
- }
-
- DAC->DHR12R1 = dac_code;
-
- if (enable)
- {
- DAC->CR |= DAC_CR_EN1;
- }
- else
- {
- DAC->CR &= ~DAC_CR_EN1;
- }
-}
-
-static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms)
-{
- for (uint16_t i = 0; i < count; i++)
- {
- if (uc)
- {
- HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
- }
- if (dc)
- {
- HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
- }
- HAL_Delay(pulse_ms);
- if (uc)
- {
- HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
- }
- if (dc)
- {
- HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
- }
- HAL_Delay(pulse_ms);
- }
-}
-
-static void AD9102_WriteReg(uint16_t addr, uint16_t value)
-{
- uint32_t tmp32 = 0;
- uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
-
- SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
-
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-
- if (!LL_SPI_IsEnabled(SPI2))
- {
- LL_SPI_Enable(SPI2);
- }
-
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-
- while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- LL_SPI_TransmitData16(SPI2, cmd);
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- (void) SPI2->DR;
-
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- LL_SPI_TransmitData16(SPI2, value);
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- (void) SPI2->DR;
-
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-}
-
-static uint16_t AD9102_ReadReg(uint16_t addr)
-{
- uint32_t tmp32 = 0;
- uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
- uint16_t value;
-
- SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
-
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-
- if (!LL_SPI_IsEnabled(SPI2))
- {
- LL_SPI_Enable(SPI2);
- }
-
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-
- while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- LL_SPI_TransmitData16(SPI2, cmd);
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- (void) SPI2->DR;
-
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- LL_SPI_TransmitData16(SPI2, 0x0000u);
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- value = LL_SPI_ReceiveData16(SPI2);
-
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- return value;
-}
-
-static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
-{
- for (uint16_t i = 0; i < count; i++)
- {
- AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
- }
-}
-
-static void AD9102_ResetWaveUploadState(void)
-{
- ad9102_wave_upload_active = 0u;
- ad9102_wave_expected_samples = 0u;
- ad9102_wave_written_samples = 0u;
-}
-
-static void AD9102_StopOutput(void)
-{
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-}
-
-static void AD9102_StartOutput(void)
-{
- HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
- AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- for (volatile uint32_t d = 0; d < 1000; d++) {}
- HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
-}
-
-static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold)
-{
- uint16_t pat_timebase;
- uint32_t pat_period;
-
- if (samples < 2u)
- {
- samples = 2u;
- }
- if (samples > AD9102_SRAM_MAX_SAMPLES)
- {
- samples = AD9102_SRAM_MAX_SAMPLES;
- }
- if (hold == 0u)
- {
- hold = AD9102_SRAM_HOLD_DEFAULT;
- }
- if (hold > 0x0Fu)
- {
- hold = 0x0Fu;
- }
-
- pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
- ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
- pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
- if (pat_period == 0u)
- {
- pat_period = samples;
- }
- if (pat_period > 0xFFFFu)
- {
- pat_period = 0xFFFFu;
- }
-
- AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT);
- AD9102_StopOutput();
- AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
- AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
- AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
- AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
- AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
- AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
- AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
- AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-}
-
-static uint8_t AD9102_BeginWaveUpload(uint16_t samples)
-{
- if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES))
- {
- return 0u;
- }
-
- AD9102_StopOutput();
- AD9102_ResetWaveUploadState();
- AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT);
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access
-
- ad9102_wave_expected_samples = samples;
- ad9102_wave_written_samples = 0u;
- ad9102_wave_upload_active = 1u;
- return 1u;
-}
-
-static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count)
-{
- if (ad9102_wave_upload_active == 0u)
- {
- return 0u;
- }
- if ((chunk_count == 0u) || (chunk_count > AD9102_WAVE_MAX_CHUNK_SAMPLES))
- {
- return 0u;
- }
- if (((uint32_t)ad9102_wave_written_samples + (uint32_t)chunk_count) > (uint32_t)ad9102_wave_expected_samples)
- {
- return 0u;
- }
-
- for (uint16_t i = 0; i < chunk_count; i++)
- {
- int16_t sample = (int16_t)samples[i];
- uint16_t sample_u14;
- uint16_t word;
-
- if ((sample < AD9102_SRAM_RAMP_MIN) || (sample > AD9102_SRAM_RAMP_MAX))
- {
- return 0u;
- }
-
- sample_u14 = ((uint16_t)sample) & 0x3FFFu;
- word = (uint16_t)(sample_u14 << 2);
- AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word);
- }
-
- ad9102_wave_written_samples = (uint16_t)(ad9102_wave_written_samples + chunk_count);
- return 1u;
-}
-
-static uint16_t AD9102_CommitWaveUpload(uint8_t *ok)
-{
- uint16_t pat_status;
-
- if (ok != NULL)
- {
- *ok = 0u;
- }
-
- if ((ad9102_wave_upload_active == 0u) ||
- (ad9102_wave_expected_samples < 2u) ||
- (ad9102_wave_written_samples != ad9102_wave_expected_samples))
- {
- AD9102_CancelWaveUpload();
- return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
- }
-
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); // disable SRAM access
- AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4));
- AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- AD9102_StartOutput();
- pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-
- AD9102_ResetWaveUploadState();
- if (ok != NULL)
- {
- *ok = 1u;
- }
-
- return pat_status;
-}
-
-static void AD9102_CancelWaveUpload(void)
-{
- if (ad9102_wave_upload_active != 0u)
- {
- AD9102_StopOutput();
- }
- AD9102_ResetWaveUploadState();
-}
-
-static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
-{
- AD9102_ResetWaveUploadState();
-
- if (enable)
- {
- uint16_t saw_cfg;
- uint16_t pat_timebase;
-
- if (saw_step == 0u)
- {
- saw_step = AD9102_SAW_STEP_DEFAULT;
- }
- if (saw_step > 63u)
- {
- saw_step = 63u;
- }
- saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
- ((uint16_t)(saw_type & 0x3u)));
- pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- ((pat_base & 0x0Fu) << 4) |
- (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-
- AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
- AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
- AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
- AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
-
- AD9102_StartOutput();
- }
- else
- {
- AD9102_StopOutput();
- }
-
- return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-}
-
-static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude)
-{
- if (samples < 2u)
- {
- samples = 2u;
- }
- if (samples > AD9102_SRAM_MAX_SAMPLES)
- {
- samples = AD9102_SRAM_MAX_SAMPLES;
- }
- if (amplitude > AD9102_SRAM_AMP_DEFAULT)
- {
- amplitude = AD9102_SRAM_AMP_DEFAULT;
- }
-
- // Enable SRAM access.
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
-
- for (uint16_t i = 0; i < samples; i++)
- {
- int32_t value;
- int32_t min_val = -(int32_t)amplitude;
- int32_t max_val = (int32_t)amplitude;
- int32_t span = max_val - min_val;
- if (triangle)
- {
- uint16_t half = samples / 2u;
- if (half == 0u)
- {
- half = 1u;
- }
- if (i < half)
- {
- uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
- if (span == 0)
- {
- value = 0;
- }
- else
- {
- value = min_val + (span * (int32_t)i) / (int32_t)denom;
- }
- }
- else
- {
- uint16_t tail = (uint16_t)(samples - half);
- uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
- if (span == 0)
- {
- value = 0;
- }
- else
- {
- value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom;
- }
- }
- }
- else
- {
- uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
- if (span == 0)
- {
- value = 0;
- }
- else
- {
- value = min_val + (span * (int32_t)i) / (int32_t)denom;
- }
- }
-
- if (value < AD9102_SRAM_RAMP_MIN)
- {
- value = AD9102_SRAM_RAMP_MIN;
- }
- else if (value > AD9102_SRAM_RAMP_MAX)
- {
- value = AD9102_SRAM_RAMP_MAX;
- }
-
- uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu;
- uint16_t word = (uint16_t)(sample_u14 << 2);
- AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
- }
-
- // Disable SRAM access.
- AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-}
-
-static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude)
-{
- AD9102_ResetWaveUploadState();
-
- if (samples == 0u)
- {
- samples = AD9102_SRAM_SAMPLES_DEFAULT;
- }
- if (samples < 2u)
- {
- samples = 2u;
- }
- if (samples > AD9102_SRAM_MAX_SAMPLES)
- {
- samples = AD9102_SRAM_MAX_SAMPLES;
- }
- if (hold == 0u)
- {
- hold = AD9102_SRAM_HOLD_DEFAULT;
- }
- if (hold > 0x0Fu)
- {
- hold = 0x0Fu;
- }
-
- if (amplitude > AD9102_SRAM_AMP_DEFAULT)
- {
- amplitude = AD9102_SRAM_AMP_DEFAULT;
- }
-
- AD9102_ConfigureSramPlayback(samples, hold);
- AD9102_LoadSramRamp(samples, triangle, amplitude);
-
- if (enable)
- {
- AD9102_StartOutput();
- }
- else
- {
- AD9102_StopOutput();
- }
-
- return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-}
-
-static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period)
-{
- uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- ((pat_base & 0x0Fu) << 4) |
- (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-
- if (saw_step == 0u)
- {
- saw_step = AD9102_SAW_STEP_DEFAULT;
- }
- if (saw_step > 63u)
- {
- saw_step = 63u;
- }
- if (pat_period == 0u)
- {
- pat_period = AD9102_PAT_PERIOD_DEFAULT;
- }
- uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
- ((uint16_t)(saw_type & 0x3u)));
-
- uint8_t ok = 1u;
-
- // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
- if (spiconfig != 0x0000u)
- {
- ok = 0u;
- }
-
- // Power blocks should not be powered down.
- if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
- {
- ok = 0u;
- }
-
- // Clock receiver must be enabled (cannot directly detect external clock presence).
- if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
- {
- ok = 0u;
- }
-
- // Any configuration error flags indicate a bad setup.
- if (cfg_err & 0x003Fu)
- {
- ok = 0u;
- }
-
- if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
- {
- ok = 0u;
- }
-
- if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
- {
- ok = 0u;
- }
-
- return (ok ? 0u : 1u);
-}
-
-static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold)
-{
- uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
-
- if (samples == 0u)
- {
- samples = AD9102_SRAM_SAMPLES_DEFAULT;
- }
- if (samples < 2u)
- {
- samples = 2u;
- }
- if (samples > AD9102_SRAM_MAX_SAMPLES)
- {
- samples = AD9102_SRAM_MAX_SAMPLES;
- }
- if (hold == 0u)
- {
- hold = AD9102_SRAM_HOLD_DEFAULT;
- }
- if (hold > 0x0Fu)
- {
- hold = 0x0Fu;
- }
-
- uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
- ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
- uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
- if (pat_period == 0u)
- {
- pat_period = samples;
- }
- if (pat_period > 0xFFFFu)
- {
- pat_period = 0xFFFFu;
- }
-
- uint16_t stop_addr = (uint16_t)((samples - 1u) << 4);
-
- uint8_t ok = 1u;
-
- if (spiconfig != 0x0000u)
- {
- ok = 0u;
- }
- if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
- {
- ok = 0u;
- }
- if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
- {
- ok = 0u;
- }
- if (cfg_err & 0x003Fu)
- {
- ok = 0u;
- }
- if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
- {
- ok = 0u;
- }
-
- if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr)
- {
- ok = 0u;
- }
- if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT)
- {
- ok = 0u;
- }
-
- return (ok ? 0u : 1u);
-}
-
-void Set_LTEC(uint8_t num, uint16_t DATA)
-{
- uint32_t tmp32;
-
- if (num == 1 || num == 3)
- {
- SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
- HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- }
-
- switch (num)
- {
- case 1:
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI2->DR;
- break;
- case 2:
- //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes
- HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC2
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI6->DR;
- break;
- case 3:
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with TECDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI2->DR;
- break;
- case 4:
- HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with TECDAC2
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI6->DR;
- break;
- }
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
- HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
-}
-static uint16_t MPhD_T(uint8_t num)
-{
- uint16_t P;
- uint32_t tmp32;
- HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- tmp32=0;
- while(tmp32<500){tmp32++;}
- HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conversion
- HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conversion
- tmp32=0;
- while(tmp32<500){tmp32++;}
- if (num==1)//MPD1
- {
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI4);
- }
- else if (num==2)//MPD2
- {
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI5);
- }
- else if (num==3)//ThrLD1
- {
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI4);
- }
- else if (num==4)//ThrLD2
- {
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI5);
- }
- /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm;
-
- Inorm = (float) (65535) / (float) (100);
- Tnorm1 = (float) (65535) / (float) (50);
- Tnorm2 = 4;
- Pnorm = (float)(65535) / (float)(20);
- I0m = 8.1568;//@4 C - lowest temperature of system
- T0m = 48.6282;
- T_C = (float) (T_LD) / Tnorm1 + Tnorm2;
-
- Ith = I0m * expf(T_C/T0m);
- I_LD = (float) (C_LD) / Inorm;
-
- if (I_LD > Ith)
- {
- A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_C + (float) (0.00157250618257057) * T_C + (float) (0.228565407377466);
- P = A * (I_LD - Ith) * Pnorm;
- }
- else
- {
- P = 0;
- } */
- return P;
-}
-/*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Timer)
-{
- uint16_t Result;
-// uint8_t randf;
-
- randf = 0;
- for (uint8_t i = 0; i < 32; i++)
- {
- randf = ((Timer>>i)&0x0001)^randf;
- }
-
- Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((float)(100))))) + T_LD_before + (float)(randf);
-
- return (uint16_t)(Result);
-}*/
-static uint16_t Get_ADC(uint8_t num)
-{
- uint16_t OUT;
- switch (num)
- {
- case 0:
- HAL_ADC_Start(&hadc1); // Power on
- break;
- case 1:
- HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion
- OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- break;
- case 2:
- HAL_ADC_Stop(&hadc1); // Power off
- break;
- case 3:
- HAL_ADC_Start(&hadc3); // Power on
- break;
- case 4:
- HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion
- OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- break;
- case 5:
- HAL_ADC_Stop(&hadc3); // Power off
- break;
- }
- return OUT;
-}
-
-uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num)
-{
- // Main idea:
- // I is responsible to maintaining constant temperature difference between laser and room temperature.
- // As room temperature can be approximated as constant at current-varying time -- I should be kept constant too.
- // As current through laser diode heats it -- we can estimate excessive power on laser diode and trim peltier current according to it.
- // So, equation should be look like this:
- // x_output = x_output_original + I(laser)*(a + (t - b)c)
- // t -- cycle phase
- // a,b,c -- constants
- //
- // How can we control laser diode temperature?
- // -- We can set laser to fixed current at the time we need to measure.
- // Then we should measure wavelength.
- // Calibration sequence:
- // 1) n
-
-
-
- int e_pid;
- float P_coef_current;//, I_coef_current;
- float e_integral;
- int x_output;
-
- e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-
- e_integral = LDx_results->e_integral;
-
- if((e_pid < 3000) && (e_pid > - 3000)){
- e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100;//100 - timer is too fast
- }
- P_coef_current = LDx_curr_setup->P_coef_temp;
-
- if (e_integral > 32000){
- e_integral = 32000;
- }
- else if (e_integral < - 32000){
- e_integral = -32000;
- }
- LDx_results->e_integral = e_integral;
-
- x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (int)e_integral;//
-
- if(x_output < 1000){
- x_output = 8800;
- }
- else if(x_output > 56800){
- x_output = 56800;
- }
-
- if (num==2)
- TO7_PID = TO7;//Save current time only on 2nd laser
-
- return (uint16_t)x_output;
-}
-
-
-uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num)
-{
- int e_pid;
- float P_coef_current;//, I_coef_current;
- float e_integral;
- int x_output;
-
- e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-
- e_integral = LDx_results->e_integral;
-
- if((e_pid < 3000) && (e_pid > - 3000)){
- e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100;//100 - timer is too fast
- }
- P_coef_current = LDx_curr_setup->P_coef_temp;
-
- if (e_integral > 32000){
- e_integral = 32000;
- }
- else if (e_integral < - 32000){
- e_integral = -32000;
- }
- LDx_results->e_integral = e_integral;
-
- x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (int)e_integral;//
-
- if(x_output < 1000){
- x_output = 8800;
- }
- else if(x_output > 56800){
- x_output = 56800;
- }
-
- if (num==2)
- TO7_PID = TO7;//Save current time only on 2nd laser
-
- return (uint16_t)x_output;
-}
-uint8_t CheckChecksum(uint16_t *pbuff)
-{
- uint16_t cl_ind;
-
- switch (UART_header)
- {
- case 0x7777:
- cl_ind = TSK_16 - 2;
- break;
- case 0x1111:
- cl_ind = CL_16 - 2;
- break;
- default:
- return 0;
- break;
- }
-
- CS_result = CalculateChecksum(pbuff, cl_ind);
-
- return ((CS_result == COMMAND[cl_ind]) ? 1 : 0);
-}
-uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
-{
- short i;
- uint16_t cs = *pbuff;
-
- for(i = 1; i < len; i++)
- {
- cs ^= *(pbuff+i);
- }
- return cs;
-}
-
-/*int SD_Init(void)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Create_File("FILE1.TXT"); // 0 -suc
- //Create_File("FILE2.TXT");
- Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part ?01 (for DFB-1550-14BF lasers). Parameters of plate: Ilaser: 0...66.7 mA; Vlaser: 0...2 V; Itec: -1.27...1.27 A; Vtec: -2.56...2.56 V; IMphD: 0...519 uA; Tint: -1.2...+45.8 C; Text: -25.8...+43.4 C. Place for your advertising:..................................................................................................................................");
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-}*/
-
-int SD_SAVE(uint16_t *pbuff)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8);
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-}
-
-
-
-//uint32_t Get_Length(void)
-//{
-// return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16);
-//}
-
-int SD_READ(uint16_t *pbuff)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes
- fgoto+=DL_8;
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-
-/* for (uint16_t j = 0; j < DL_16; j++)
- {
- *(pbuff+j) = SD_matr[SD_SLIDE][j];
- }
- if (SD_SLIDE
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN PTD */
-
-/* USER CODE END PTD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-ADC_HandleTypeDef hadc1;
-ADC_HandleTypeDef hadc3;
-
-SD_HandleTypeDef hsd1;
-
-TIM_HandleTypeDef htim8;
-TIM_HandleTypeDef htim10;
-
-UART_HandleTypeDef huart8;
-
-/* USER CODE BEGIN PV */
-uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID, TO10, TO10_counter, TIM10_period;//timer 6 ticks & SD FILE COUNTER
-uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_8], flg_tmt, u_tx_flg, u_rx_flg, TIM10_coflag;
-uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_matr[SD_Length][DL_16];
-FRESULT fresult; // result
-int test;
-unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_SIZE_32*FPGA_RECEIVE_WORD_SIZE_8+4+2
-
-LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup;
-Work_SetupTypeDef Curr_setup, Def_setup;
-LDx_ParamTypeDef LD1_param, LD2_param;
-
-LD_Blinker_StateTypeDef LD_blinker;
-
-task_t task;
-uint8_t task_state = 0 ;
-
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-void SystemClock_Config(void);
-static void MX_GPIO_Init(void);
-static void MX_DMA_Init(void);
-static void MX_SPI4_Init(void);
-static void MX_TIM2_Init(void);
-static void MX_TIM5_Init(void);
-static void MX_ADC1_Init(void);
-static void MX_ADC3_Init(void);
-static void MX_SPI2_Init(void);
-static void MX_SPI5_Init(void);
-static void MX_SPI6_Init(void);
-static void MX_USART1_UART_Init(void);
-static void MX_SDMMC1_SD_Init(void);
-static void MX_TIM7_Init(void);
-static void MX_TIM6_Init(void);
-static void MX_TIM10_Init(void);
-static void MX_UART8_Init(void);
-static void MX_TIM8_Init(void);
-/* USER CODE BEGIN PFP */
-static void Init_params(void);
-static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
-static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
-void Set_LTEC(uint8_t num, uint16_t DATA);
-static uint16_t MPhD_T(uint8_t num);
-static uint16_t Get_ADC(uint8_t num);
-static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num);
-uint8_t CheckChecksum(uint16_t *pbuff);
-uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
-//int SD_Init(void);
-int SD_SAVE(uint16_t *pbuff);
-//uint32_t Get_Length(void);
-int SD_READ(uint16_t *pbuff);
-int SD_REMOVE(void);
-void USART_TX (uint8_t* dt, uint16_t sz);
-void USART_TX_DMA (uint16_t sz);
-static void Stop_TIM10();
-static void OUT_trigger(uint8_t);
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/**
- * @brief The application entry point.
- * @retval int
- */
-int main(void)
-{
-
- /* USER CODE BEGIN 1 */
- HAL_StatusTypeDef st;
- /* USER CODE END 1 */
-
- /* MCU Configuration--------------------------------------------------------*/
-
- /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- HAL_Init();
-
- /* USER CODE BEGIN Init */
- /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/
- /* USER CODE END Init */
-
- /* Configure the system clock */
- SystemClock_Config();
-
- /* USER CODE BEGIN SysInit */
-
- /* USER CODE END SysInit */
-
- /* Initialize all configured peripherals */
- MX_GPIO_Init();
- MX_DMA_Init();
- MX_SPI4_Init();
- MX_FATFS_Init();
- MX_TIM2_Init();
- MX_TIM5_Init();
- MX_ADC1_Init();
- MX_ADC3_Init();
- MX_SPI2_Init();
- MX_SPI5_Init();
- MX_SPI6_Init();
- MX_USART1_UART_Init();
- MX_SDMMC1_SD_Init();
- MX_TIM7_Init();
- MX_TIM6_Init();
- MX_TIM10_Init();
- //MX_UART8_Init();
- //MX_TIM8_Init();
- /* USER CODE BEGIN 2 */
- Init_params();
- /* USER CODE END 2 */
-
- /* Infinite loop */
- /* USER CODE BEGIN WHILE */
- while (1)
- {
- if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0))
- {
- //NVIC_DisableIRQ(USART1_IRQn);
- LL_USART_EnableIT_PE(USART1);
- LL_USART_EnableIT_RXNE(USART1);
- LL_USART_EnableIT_ERROR(USART1);
- NVIC_SetPriority(USART1_IRQn, 0);
- NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- u_rx_flg = 1;
- }
-// else
-// {
-// //NVIC_DisableIRQ(USART1_IRQn);
-// u_rx_flg = 0;
-// }
- switch (CPU_state)
- {
- case HALT://0 - Default state
- CPU_state_old = HALT;//Save main current cycle
- task.current_param = task.min_param;
- Stop_TIM10();
- break;
- case DECODE_ENABLE://1 - Decode rec. message
- CS_result = CalculateChecksum(COMMAND, CL_16-2);
- if (CheckChecksum(COMMAND))
- {
- LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1
- LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- TO6_before = TO6;
- //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP;
- CPU_state = WORK_ENABLE;
- CPU_state_old = WORK_ENABLE;//Save main current cycle
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- CPU_state = DEFAULT_ENABLE;
- CPU_state_old = HALT;//Save main current cycle
- }
- UART_transmission_request = MESS_01;
- break;
- case DEFAULT_ENABLE://2 - Go to HALT
- //Set current setup to default
- task.current_param = task.min_param;
- Stop_TIM10();
- Init_params();
- LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- CPU_state = HALT;
- CPU_state_old = HALT;//Save main current cycle
- UART_transmission_request = MESS_01;
- break;
- case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- temp16 = SD_READ(&Long_Data[0]);
- State_Data[0]|=temp16&0xff;
- if (temp16==0)
- {
- UART_transmission_request = MESS_03;
- }
- else
- {
- UART_transmission_request = MESS_01;
- }
- CPU_state_old = HALT;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case TRANS_ENABLE://4 - Transmith current packet
- UART_transmission_request = MESS_02;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case REMOVE_FILE://5 - Remove file from SD
- State_Data[0]|=SD_REMOVE()&0xff;
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;
- break;
- case STATE://6 - Transmith state message
- UART_transmission_request = MESS_01;
- CPU_state = CPU_state_old;//Return to main current cycle
- break;
- case WORK_ENABLE://7 - Main work cycle
- task.current_param = task.min_param;
- Stop_TIM10();
- if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- {
- TO7_before = TO7;
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-
- //Correct temperature in all pulses
- (void) MPhD_T(3);
- LD1_param.LD_CURR_TEMP = MPhD_T(3);
- (void) MPhD_T(4);
- LD2_param.LD_CURR_TEMP = MPhD_T(4);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(3, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(4, temp16);//Drive Laser TEC 2
-
- Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
-
- Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1
- Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
-
- //Prepare DATA of internals ADCs
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(0);
- temp16 = Get_ADC(1);
- Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- temp16 = Get_ADC(2);
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(3);
- temp16 = Get_ADC(4);
- Long_Data[12] = temp16;
- temp16 = Get_ADC(5);
-
- //Put the timer tick to Long_Data:
- TO6_stop = TO6;
- Long_Data[3] = (TO6_stop)&0xffff;
- Long_Data[4] = (TO6_stop>>16)&0xffff;
-
- //Put the average temperature of LD1 to Long_Data:
- Long_Data[5] = LD1_param.LD_CURR_TEMP;
-
- //Put the average temperature of LD2 to Long_Data:
- Long_Data[6] = LD2_param.LD_CURR_TEMP;
-
- if (Curr_setup.SD_EN==1)
- {
- CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- Long_Data[DL_16-1] = CS_result;
- temp16 = SD_SAVE(&Long_Data[0]);
- State_Data[0]|=temp16&0xff;
- }
- CPU_state_old = WORK_ENABLE;//Save main current cycle
- }
- break;
- case DECODE_TASK:
- if (CheckChecksum(COMMAND))
- {
- Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- TO6_before = TO6;
- CPU_state = RUN_TASK;
- CPU_state_old = RUN_TASK;//Save main current cycle
- }
- else
- {
- State_Data[0] |= UART_DECODE_ERR;
- CPU_state = DEFAULT_ENABLE;
- CPU_state_old = HALT;//Save main current cycle
- }
- UART_transmission_request = MESS_01;
- break;
- case RUN_TASK:
- switch (task.task_type)
- {
- case TT_CHANGE_CURR_1:
- Set_LTEC(TT_CHANGE_CURR_2, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
-
- uint16_t step_counter = 0;
- uint16_t trigger_counter = 0;
- uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 10);
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
- //HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- //HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-//*
- if (step_counter % trigger_step == 0){ //trigger at every 60 step
- OUT_trigger(trigger_counter);
- ++trigger_counter;
- }
- ++step_counter;
-//*/
-//*
- //maintain stable temperature of laser 2
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- //maintain stable temperature of laser 1
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
-//*/
- }
- }
-
- Stop_TIM10();
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
- break;
- case TT_CHANGE_CURR_2:
- //Blink laser 2
-/* Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- LD_blinker.task_type = task.curr;
- LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, LD ON now; 3 -- blinking, LD OFF now
- LD_blinker.param = task.current_param;
- LD_blinker.signal_port = OUT_11_GPIO_Port;
- LD_blinker.signal_pin = OUT_11_Pin;
-
- st = HAL_TIM_Base_Start_IT(&htim8);
- if (st != HAL_OK)
- while(1);
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- LD_blinker.state = 2;
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- //Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- LD_blinker.param = task.current_param;
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
-
-
- }
- }
-
- HAL_TIM_Base_Stop_IT(&htim8);
- TIM8->CNT = 0;
-
- Stop_TIM10();
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
-
-
-
-*/
-
- /* // Backup
- Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- (void) MPhD_T(TT_CHANGE_TEMP_1);
- LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- (void) MPhD_T(TT_CHANGE_TEMP_2);
- LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
-
- // Toggle pin for oscilloscope
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
-
- st = HAL_TIM_Base_Start_IT(&htim10);
- if (st != HAL_OK)
- while(1);
- while (task.current_param < task.max_param)
- {
- if (TIM10_coflag)
- {
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- task.current_param += task.delta_param;
- TO10 = 0;
- TIM10_coflag = 0;
-
-
- }
- }
- Stop_TIM10();
- task.current_param = task.min_param;
- Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- if (task.tau > 3)
- {
- TIM10_period = htim10.Init.Period;
- htim10.Init.Period = 9999;
- TO10_counter = (task.tau - 1) * 100;
- }
- HAL_TIM_Base_Start_IT(&htim10);
- */
-
-
- break;
- case TT_CHANGE_TEMP_1:
- // isn't implemented
- break;
- case TT_CHANGE_TEMP_2:
- // isn't implemented
- break;
- }
-
- if (TO7>TO7_before)
- {
- TO7_before = TO7;
-
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-
- Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
-
- //Prepare DATA of internals ADCs
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(0);
- temp16 = Get_ADC(1);
- Long_Data[7] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[8] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[9] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[10] = temp16;
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(1);
- Long_Data[11] = temp16;
- temp16 = Get_ADC(2);
-
- //Put the temperature of LD2 to Long_Data:
- temp16 = Get_ADC(3);
- temp16 = Get_ADC(4);
- Long_Data[12] = temp16;
- temp16 = Get_ADC(5);
-
- //Put the timer tick to Long_Data:
- TO6_stop = TO6;
- Long_Data[3] = (TO6_stop)&0xffff;
- Long_Data[4] = (TO6_stop>>16)&0xffff;
-
- //Put the average temperature of LD1 to Long_Data:
- Long_Data[5] = LD1_param.LD_CURR_TEMP;
-
- //Put the average temperature of LD2 to Long_Data:
- Long_Data[6] = LD2_param.LD_CURR_TEMP;
- }
- while (!TIM10_coflag);
-
- Stop_TIM10();
-
- if (task.tau > 3)
- {
- htim10.Init.Period = TIM10_period;
- TO10_counter = task.dt / 10 - 1;
- }
-
- CPU_state_old = RUN_TASK;
- break;
- }
-
- switch (UART_transmission_request)
- {
- case MESS_01://Default state
- USART_TX(State_Data,2);
- //HAL_UART_Transmit(&huart1, State_Data, 2, 10);
- State_Data[0]=0;
- State_Data[1]=0;//All OK!
- UART_transmission_request = NO_MESS;
- break;
- case MESS_02://Transmith packet
-
- //Find CS and put to Long_Data:
- CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- Long_Data[DL_16-1] = CS_result;
-
- for (uint16_t i = 0; i < DL_16; i++)
- {
- UART_DATA[i*2] = (Long_Data[i])&0xff;
- UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- }
- //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
- //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- //huart1.gState = HAL_UART_STATE_READY;
- //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
-
- //uint8_t dummy_sample_15 = {1,2,3,4,5,6,7,8,9,0,0,0,0,};
- //USART_TX(UART_DATA, DL_8);
-
- USART_TX_DMA (DL_8);//Send data by USART using DMA
- UART_transmission_request = NO_MESS;
- break;
- case MESS_03://Transmith saved packet
- for (uint16_t i = 0; i < DL_16; i++)
- {
- UART_DATA[i*2] = (Long_Data[i])&0xff;
- UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- }
- //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
- //huart1.gState = HAL_UART_STATE_READY;
- //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
- USART_TX_DMA (DL_8);//Send data by USART using DMA
- UART_transmission_request = NO_MESS;
- break;
- }
- if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of command and right now longer than 1 sec.:
- {
- UART_rec_incr = 0;//Reset uart command counter
- State_Data[0] |= UART_ERR;//timeout error!
- UART_transmission_request = MESS_01;//Send status
- flg_tmt = 0;//Reset timeout flag
- }
- /* USER CODE END WHILE */
-
- /* USER CODE BEGIN 3 */
- }
- /* USER CODE END 3 */
-}
-
-/**
- * @brief System Clock Configuration
- * @retval None
- */
-void SystemClock_Config(void)
-{
- RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-
- /** Configure the main internal regulator output voltage
- */
- __HAL_RCC_PWR_CLK_ENABLE();
- __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-
- /** Initializes the RCC Oscillators according to the specified parameters
- * in the RCC_OscInitTypeDef structure.
- */
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
- RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- RCC_OscInitStruct.PLL.PLLM = 25;
- RCC_OscInitStruct.PLL.PLLN = 368;
- RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- RCC_OscInitStruct.PLL.PLLQ = 8;
- RCC_OscInitStruct.PLL.PLLR = 2;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Activate the Over-Drive mode
- */
- if (HAL_PWREx_EnableOverDrive() != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Initializes the CPU, AHB and APB buses clocks
- */
- RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
- |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
- RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-
- if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
- {
- Error_Handler();
- }
-}
-
-/**
- * @brief ADC1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_ADC1_Init(void)
-{
-
- /* USER CODE BEGIN ADC1_Init 0 */
-
- /* USER CODE END ADC1_Init 0 */
-
- ADC_ChannelConfTypeDef sConfig = {0};
-
- /* USER CODE BEGIN ADC1_Init 1 */
-
- /* USER CODE END ADC1_Init 1 */
-
- /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
- */
- hadc1.Instance = ADC1;
- hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- hadc1.Init.ContinuousConvMode = DISABLE;
- hadc1.Init.DiscontinuousConvMode = DISABLE;
- hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- hadc1.Init.NbrOfConversion = 5;
- hadc1.Init.DMAContinuousRequests = DISABLE;
- hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- if (HAL_ADC_Init(&hadc1) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_9;
- sConfig.Rank = ADC_REGULAR_RANK_1;
- sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_8;
- sConfig.Rank = ADC_REGULAR_RANK_2;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_2;
- sConfig.Rank = ADC_REGULAR_RANK_3;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_10;
- sConfig.Rank = ADC_REGULAR_RANK_4;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_11;
- sConfig.Rank = ADC_REGULAR_RANK_5;
- if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN ADC1_Init 2 */
-
- /* USER CODE END ADC1_Init 2 */
-
-}
-
-/**
- * @brief ADC3 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_ADC3_Init(void)
-{
-
- /* USER CODE BEGIN ADC3_Init 0 */
-
- /* USER CODE END ADC3_Init 0 */
-
- ADC_ChannelConfTypeDef sConfig = {0};
-
- /* USER CODE BEGIN ADC3_Init 1 */
-
- /* USER CODE END ADC3_Init 1 */
-
- /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of conversion)
- */
- hadc3.Instance = ADC3;
- hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- hadc3.Init.ContinuousConvMode = DISABLE;
- hadc3.Init.DiscontinuousConvMode = DISABLE;
- hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- hadc3.Init.NbrOfConversion = 1;
- hadc3.Init.DMAContinuousRequests = DISABLE;
- hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- if (HAL_ADC_Init(&hadc3) != HAL_OK)
- {
- Error_Handler();
- }
-
- /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and its sample time.
- */
- sConfig.Channel = ADC_CHANNEL_15;
- sConfig.Rank = ADC_REGULAR_RANK_1;
- sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN ADC3_Init 2 */
-
- /* USER CODE END ADC3_Init 2 */
-
-}
-
-/**
- * @brief SDMMC1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SDMMC1_SD_Init(void)
-{
-
- /* USER CODE BEGIN SDMMC1_Init 0 */
-
- /* USER CODE END SDMMC1_Init 0 */
-
- /* USER CODE BEGIN SDMMC1_Init 1 */
-
- /* USER CODE END SDMMC1_Init 1 */
- hsd1.Instance = SDMMC1;
- hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
- hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
- hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
- hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
- hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
- hsd1.Init.ClockDiv = 20;
- /* USER CODE BEGIN SDMMC1_Init 2 */
-
- /* USER CODE END SDMMC1_Init 2 */
-
-}
-
-/**
- * @brief SPI2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SPI2_Init(void)
-{
-
- /* USER CODE BEGIN SPI2_Init 0 */
-
- /* USER CODE END SPI2_Init 0 */
-
- LL_SPI_InitTypeDef SPI_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
-
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
- /**SPI2 GPIO Configuration
- PB13 ------> SPI2_SCK
- PB15 ------> SPI2_MOSI
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /* USER CODE BEGIN SPI2_Init 1 */
-
- /* USER CODE END SPI2_Init 1 */
- /* SPI2 parameter configuration*/
- SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
- SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
- SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- SPI_InitStruct.CRCPoly = 7;
- LL_SPI_Init(SPI2, &SPI_InitStruct);
- LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
- LL_SPI_DisableNSSPulseMgt(SPI2);
- /* USER CODE BEGIN SPI2_Init 2 */
-
- /* USER CODE END SPI2_Init 2 */
-
-}
-
-/**
- * @brief SPI4 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SPI4_Init(void)
-{
-
- /* USER CODE BEGIN SPI4_Init 0 */
-
- /* USER CODE END SPI4_Init 0 */
-
- LL_SPI_InitTypeDef SPI_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
-
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE);
- /**SPI4 GPIO Configuration
- PE12 ------> SPI4_SCK
- PE13 ------> SPI4_MISO
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-
- /* USER CODE BEGIN SPI4_Init 1 */
-
- /* USER CODE END SPI4_Init 1 */
- /* SPI4 parameter configuration*/
- SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
- SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- SPI_InitStruct.CRCPoly = 7;
- LL_SPI_Init(SPI4, &SPI_InitStruct);
- LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
- LL_SPI_DisableNSSPulseMgt(SPI4);
- /* USER CODE BEGIN SPI4_Init 2 */
-
- /* USER CODE END SPI4_Init 2 */
-
-}
-
-/**
- * @brief SPI5 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SPI5_Init(void)
-{
-
- /* USER CODE BEGIN SPI5_Init 0 */
-
- /* USER CODE END SPI5_Init 0 */
-
- LL_SPI_InitTypeDef SPI_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5);
-
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
- /**SPI5 GPIO Configuration
- PF7 ------> SPI5_SCK
- PF8 ------> SPI5_MISO
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
- /* USER CODE BEGIN SPI5_Init 1 */
-
- /* USER CODE END SPI5_Init 1 */
- /* SPI5 parameter configuration*/
- SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
- SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- SPI_InitStruct.CRCPoly = 7;
- LL_SPI_Init(SPI5, &SPI_InitStruct);
- LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
- LL_SPI_DisableNSSPulseMgt(SPI5);
- /* USER CODE BEGIN SPI5_Init 2 */
-
- /* USER CODE END SPI5_Init 2 */
-
-}
-
-/**
- * @brief SPI6 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_SPI6_Init(void)
-{
-
- /* USER CODE BEGIN SPI6_Init 0 */
-
- /* USER CODE END SPI6_Init 0 */
-
- LL_SPI_InitTypeDef SPI_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6);
-
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
- /**SPI6 GPIO Configuration
- PA5 ------> SPI6_SCK
- PA7 ------> SPI6_MOSI
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /* USER CODE BEGIN SPI6_Init 1 */
-
- /* USER CODE END SPI6_Init 1 */
- /* SPI6 parameter configuration*/
- SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
- SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- SPI_InitStruct.CRCPoly = 7;
- LL_SPI_Init(SPI6, &SPI_InitStruct);
- LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
- LL_SPI_DisableNSSPulseMgt(SPI6);
- /* USER CODE BEGIN SPI6_Init 2 */
-
- /* USER CODE END SPI6_Init 2 */
-
-}
-
-/**
- * @brief TIM2 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM2_Init(void)
-{
-
- /* USER CODE BEGIN TIM2_Init 0 */
-
- /* USER CODE END TIM2_Init 0 */
-
- LL_TIM_InitTypeDef TIM_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
-
- /* TIM2 interrupt Init */
- NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(TIM2_IRQn);
-
- /* USER CODE BEGIN TIM2_Init 1 */
-
- /* USER CODE END TIM2_Init 1 */
- TIM_InitStruct.Prescaler = 1000;
- TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- TIM_InitStruct.Autoreload = 840000;
- TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- LL_TIM_Init(TIM2, &TIM_InitStruct);
- LL_TIM_DisableARRPreload(TIM2);
- LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
- LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
- LL_TIM_DisableMasterSlaveMode(TIM2);
- /* USER CODE BEGIN TIM2_Init 2 */
-
- /* USER CODE END TIM2_Init 2 */
-
-}
-
-/**
- * @brief TIM5 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM5_Init(void)
-{
-
- /* USER CODE BEGIN TIM5_Init 0 */
-
- /* USER CODE END TIM5_Init 0 */
-
- LL_TIM_InitTypeDef TIM_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
-
- /* TIM5 interrupt Init */
- NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(TIM5_IRQn);
-
- /* USER CODE BEGIN TIM5_Init 1 */
-
- /* USER CODE END TIM5_Init 1 */
- TIM_InitStruct.Prescaler = 10000;
- TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- TIM_InitStruct.Autoreload = 560;
- TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- LL_TIM_Init(TIM5, &TIM_InitStruct);
- LL_TIM_DisableARRPreload(TIM5);
- LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
- LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
- LL_TIM_DisableMasterSlaveMode(TIM5);
- /* USER CODE BEGIN TIM5_Init 2 */
-
- /* USER CODE END TIM5_Init 2 */
-
-}
-
-/**
- * @brief TIM6 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM6_Init(void)
-{
-
- /* USER CODE BEGIN TIM6_Init 0 */
-
- /* USER CODE END TIM6_Init 0 */
-
- LL_TIM_InitTypeDef TIM_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
-
- /* TIM6 interrupt Init */
- NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(TIM6_DAC_IRQn);
-
- /* USER CODE BEGIN TIM6_Init 1 */
-
- /* USER CODE END TIM6_Init 1 */
- TIM_InitStruct.Prescaler = 45999;
- TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- TIM_InitStruct.Autoreload = 19;
- LL_TIM_Init(TIM6, &TIM_InitStruct);
- LL_TIM_DisableARRPreload(TIM6);
- LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
- LL_TIM_DisableMasterSlaveMode(TIM6);
- /* USER CODE BEGIN TIM6_Init 2 */
-
- /* USER CODE END TIM6_Init 2 */
-
-}
-
-/**
- * @brief TIM7 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM7_Init(void)
-{
-
- /* USER CODE BEGIN TIM7_Init 0 */
-
- /* USER CODE END TIM7_Init 0 */
-
- LL_TIM_InitTypeDef TIM_InitStruct = {0};
-
- /* Peripheral clock enable */
- LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
-
- /* TIM7 interrupt Init */
- NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(TIM7_IRQn);
-
- /* USER CODE BEGIN TIM7_Init 1 */
-
- /* USER CODE END TIM7_Init 1 */
- TIM_InitStruct.Prescaler = 919;
- TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- TIM_InitStruct.Autoreload = 99;
- LL_TIM_Init(TIM7, &TIM_InitStruct);
- LL_TIM_DisableARRPreload(TIM7);
- LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
- LL_TIM_DisableMasterSlaveMode(TIM7);
- /* USER CODE BEGIN TIM7_Init 2 */
-
- /* USER CODE END TIM7_Init 2 */
-
-}
-
-/**
- * @brief TIM8 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM8_Init(void)
-{
-
- /* USER CODE BEGIN TIM8_Init 0 */
-
- /* USER CODE END TIM8_Init 0 */
-
- TIM_ClockConfigTypeDef sClockSourceConfig = {0};
- TIM_MasterConfigTypeDef sMasterConfig = {0};
-
- /* USER CODE BEGIN TIM8_Init 1 */
-
- /* USER CODE END TIM8_Init 1 */
- htim8.Instance = TIM8;
- htim8.Init.Prescaler = 0;
- htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim8.Init.Period = 91;
- htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim8.Init.RepetitionCounter = 0;
- htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- {
- Error_Handler();
- }
- sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
- if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- {
- Error_Handler();
- }
- sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
- sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM8_Init 2 */
-
- /* USER CODE END TIM8_Init 2 */
-
-}
-
-/**
- * @brief TIM10 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_TIM10_Init(void)
-{
-
- /* USER CODE BEGIN TIM10_Init 0 */
-
- /* USER CODE END TIM10_Init 0 */
-
- /* USER CODE BEGIN TIM10_Init 1 */
-
- /* USER CODE END TIM10_Init 1 */
- htim10.Instance = TIM10;
- htim10.Init.Prescaler = 183;
- htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- htim10.Init.Period = 9;
- htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN TIM10_Init 2 */
-
- /* USER CODE END TIM10_Init 2 */
-
-}
-
-/**
- * @brief UART8 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_UART8_Init(void)
-{
-
- /* USER CODE BEGIN UART8_Init 0 */
-
- /* USER CODE END UART8_Init 0 */
-
- /* USER CODE BEGIN UART8_Init 1 */
-
- /* USER CODE END UART8_Init 1 */
- huart8.Instance = UART8;
- huart8.Init.BaudRate = 115200;
- huart8.Init.WordLength = UART_WORDLENGTH_8B;
- huart8.Init.StopBits = UART_STOPBITS_1;
- huart8.Init.Parity = UART_PARITY_NONE;
- huart8.Init.Mode = UART_MODE_TX_RX;
- huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- if (HAL_UART_Init(&huart8) != HAL_OK)
- {
- Error_Handler();
- }
- /* USER CODE BEGIN UART8_Init 2 */
-
- /* USER CODE END UART8_Init 2 */
-
-}
-
-/**
- * @brief USART1 Initialization Function
- * @param None
- * @retval None
- */
-static void MX_USART1_UART_Init(void)
-{
-
- /* USER CODE BEGIN USART1_Init 0 */
-
- /* USER CODE END USART1_Init 0 */
-
- LL_USART_InitTypeDef USART_InitStruct = {0};
-
- LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
- RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-
- /** Initializes the peripherals clock
- */
- PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
- PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- {
- Error_Handler();
- }
-
- /* Peripheral clock enable */
- LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
-
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
- /**USART1 GPIO Configuration
- PA9 ------> USART1_TX
- PA10 ------> USART1_RX
- */
- GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
- GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /* USART1 DMA Init */
-
- /* USART1_TX Init */
- LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
-
- LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
-
- LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH);
-
- LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
-
- LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
-
- LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
-
- LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
-
- LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
-
- LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
-
- /* USART1 interrupt Init */
- NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(USART1_IRQn);
-
- /* USER CODE BEGIN USART1_Init 1 */
-
- /* USER CODE END USART1_Init 1 */
- USART_InitStruct.BaudRate = 115200;
- USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
- USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- USART_InitStruct.Parity = LL_USART_PARITY_NONE;
- USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- LL_USART_Init(USART1, &USART_InitStruct);
- LL_USART_ConfigAsyncMode(USART1);
- LL_USART_Enable(USART1);
- /* USER CODE BEGIN USART1_Init 2 */
-
- /* USER CODE END USART1_Init 2 */
-
-}
-
-/**
- * Enable DMA controller clock
- */
-static void MX_DMA_Init(void)
-{
-
- /* Init with LL driver */
- /* DMA controller clock enable */
- LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
-
- /* DMA interrupt init */
- /* DMA2_Stream7_IRQn interrupt configuration */
- NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- NVIC_EnableIRQ(DMA2_Stream7_IRQn);
-
-}
-
-/**
- * @brief GPIO Initialization Function
- * @param None
- * @retval None
- */
-static void MX_GPIO_Init(void)
-{
- GPIO_InitTypeDef GPIO_InitStruct = {0};
-/* USER CODE BEGIN MX_GPIO_Init_1 */
-/* USER CODE END MX_GPIO_Init_1 */
-
- /* GPIO Ports Clock Enable */
- __HAL_RCC_GPIOF_CLK_ENABLE();
- __HAL_RCC_GPIOH_CLK_ENABLE();
- __HAL_RCC_GPIOC_CLK_ENABLE();
- __HAL_RCC_GPIOA_CLK_ENABLE();
- __HAL_RCC_GPIOB_CLK_ENABLE();
- __HAL_RCC_GPIOE_CLK_ENABLE();
- __HAL_RCC_GPIOD_CLK_ENABLE();
- __HAL_RCC_GPIOG_CLK_ENABLE();
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin
- |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin|OUT_10_Pin
- |OUT_11_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
-
- /*Configure GPIO pin Output Level */
- HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
- |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
-
- /*Configure GPIO pins : INP_0_Pin INP_1_Pin */
- GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_PULLUP;
- HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
- /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */
- GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
- /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */
- GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-
- /*Configure GPIO pin : EN_5V1_Pin */
- GPIO_InitStruct.Pin = EN_5V1_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin
- DAC_LD2_CS_Pin */
- GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin
- |DAC_LD2_CS_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
- /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */
- GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-
- /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
- GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-
- /*Configure GPIO pin : SPI4_CNV_Pin */
- GPIO_InitStruct.Pin = SPI4_CNV_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
- HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin
- OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin
- OUT_10_Pin OUT_11_Pin */
- GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin
- |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin
- |OUT_10_Pin|OUT_11_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-
- /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */
- GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-
- /*Configure GPIO pin : USB_FLAG_Pin */
- GPIO_InitStruct.Pin = USB_FLAG_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pin : SDMMC1_EN_Pin */
- GPIO_InitStruct.Pin = SDMMC1_EN_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
-
- /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin
- OUT_3_Pin OUT_4_Pin OUT_5_Pin */
- GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
- |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
- GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
- GPIO_InitStruct.Pull = GPIO_NOPULL;
- GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
- HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
-
-/* USER CODE BEGIN MX_GPIO_Init_2 */
-/* USER CODE END MX_GPIO_Init_2 */
-}
-
-/* USER CODE BEGIN 4 */
-
-//void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
-
-// UART_transmission_request = NO_MESS;
-
-//}
-
-static void Init_params(void)
-{
- TO6 = 0;
- TO7 = 0;
- TO7_before = 0;
- TO6_before = 0;
- TO6_uart = 0;
- flg_tmt = 0;
- UART_rec_incr = 0;
- fgoto = 0;
- sizeoffile = 0;
- u_tx_flg = 0;
- u_rx_flg = 0;
- //State_Data[0]=0;
- //State_Data[1]=0;//All OK!
- for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-
- temp2++;
- LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- temp2++;
- LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- temp2++;
- temp2++;
- temp2++;
- Curr_setup->AVERAGES = (uint16_t)(*temp2);
- temp2++;
- LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint16_t)(*temp2))*((float)(10)));
- temp2++;
- Long_Data[13] = (uint16_t)(*temp2);//Message ID
- temp2++;
- LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
- temp2++;
- LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
- temp2++;
-
- if (Curr_setup->U5V1_EN)
- {
- HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->U5V2_EN)
- {
- HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->LD1_EN)
- {
- HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET);
- //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
- }
- else
- {
- HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
- //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
- }
-
- if (Curr_setup->LD2_EN)
- {
- HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET);
- //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
- }
- else
- {
- HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
- //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
- }
-
- if (Curr_setup->REF1_EN)
- {
- HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->REF2_EN)
- {
- HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
- }
-
- if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN))
- {
- Set_LTEC(3,32767);
- Set_LTEC(3,32767);
- HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
- }
-
- if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN))
- {
- Set_LTEC(4,32767);
- Set_LTEC(4,32767);
- HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
- }
- else
- {
- HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
- HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
- }
-
- if (Curr_setup->PI1_RD==0)
- {
- LD1_curr_setup->P_coef_temp = 10;
- LD1_curr_setup->I_coef_temp = 0.01;
- }
-
- if (Curr_setup->PI2_RD==0)
- {
- LD2_curr_setup->P_coef_temp = 10;
- LD2_curr_setup->I_coef_temp = 0.01;
- }
-}
-
-static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup)
-{
- uint16_t *temp2;
-
- temp2 = (uint16_t *)Command;
- Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-
- temp2++;
- task.task_type = (uint8_t)(*temp2); temp2++;
- task.min_param = (float)(*temp2); temp2++;
- task.max_param = (float)(*temp2); temp2++;
- task.delta_param = (float)(*temp2); temp2++;
- task.dt = (float)(*temp2) / 100.0; temp2++;
- task.sec_param = (float)(*temp2); temp2++;
- task.curr = (float)(*temp2); temp2++;
- task.temp = (float)(*temp2); temp2++;
- task.tau = (float)(*temp2); temp2++;
- task.p_coef_1 = (float)(*temp2) * 256.0; temp2++;
- task.i_coef_1 = (float)(*temp2) * 256.0; temp2++;
- task.p_coef_2 = (float)(*temp2) * 256.0; temp2++;
- task.i_coef_2 = (float)(*temp2) * 256.0; temp2++;
-
- TO10_counter = task.dt / 10 - 1;
-}
-
-void OUT_trigger(uint8_t out_n)
-{
- switch (out_n)
- {
- case 0:
- HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- break;
-
- case 1:
- HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- break;
-
- case 2:
- HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- break;
-
- case 3:
- HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- break;
-
- case 4:
- HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- break;
-
- case 5:
- HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- break;
-
- case 6:
- HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- break;
-
- case 7:
- HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- break;
-
- case 8:
- HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- break;
-
- case 9:
- HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- break;
- }
-}
-
-void Set_LTEC(uint8_t num, uint16_t DATA)
-{
- uint32_t tmp32;
- switch (num)
- {
- case 1:
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI2->DR;
- break;
- case 2:
- HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI6->DR;
- break;
- case 3:
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI2->DR;
- break;
- case 4:
- HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
- //tmp32=0;
- //while(tmp32<500){tmp32++;}
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- tmp32 = 0;
- while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle will be end.
- (void) SPI6->DR;
- break;
- }
- HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
- HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
-}
-static uint16_t MPhD_T(uint8_t num)
-{
- uint16_t P;
- uint32_t tmp32;
- HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- tmp32=0;
- while(tmp32<500){tmp32++;}
- HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conversion
- HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conversion
- tmp32=0;
- while(tmp32<500){tmp32++;}
- if (num==1)//MPD1
- {
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI4);
- }
- else if (num==2)//MPD2
- {
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI5);
- }
- else if (num==3)//ThrLD1
- {
- HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI4);
- }
- else if (num==4)//ThrLD2
- {
- HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
- tmp32=0;
- while(tmp32<500){tmp32++;}
- //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We can do that only by transmitting data...
- LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC
- tmp32 = 0;
- while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle will be end.
- LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- while(tmp32<500){tmp32++;}
- //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
- P = LL_SPI_ReceiveData16(SPI5);
- }
- /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm;
-
- Inorm = (float) (65535) / (float) (100);
- Tnorm1 = (float) (65535) / (float) (50);
- Tnorm2 = 4;
- Pnorm = (float)(65535) / (float)(20);
- I0m = 8.1568;//@4 C - lowest temperature of system
- T0m = 48.6282;
- T_C = (float) (T_LD) / Tnorm1 + Tnorm2;
-
- Ith = I0m * expf(T_C/T0m);
- I_LD = (float) (C_LD) / Inorm;
-
- if (I_LD > Ith)
- {
- A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_C + (float) (0.00157250618257057) * T_C + (float) (0.228565407377466);
- P = A * (I_LD - Ith) * Pnorm;
- }
- else
- {
- P = 0;
- } */
- return P;
-}
-/*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Timer)
-{
- uint16_t Result;
-// uint8_t randf;
-
- randf = 0;
- for (uint8_t i = 0; i < 32; i++)
- {
- randf = ((Timer>>i)&0x0001)^randf;
- }
-
- Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((float)(100))))) + T_LD_before + (float)(randf);
-
- return (uint16_t)(Result);
-}*/
-static uint16_t Get_ADC(uint8_t num)
-{
- uint16_t OUT;
- switch (num)
- {
- case 0:
- HAL_ADC_Start(&hadc1); // Power on
- break;
- case 1:
- HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion
- OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- break;
- case 2:
- HAL_ADC_Stop(&hadc1); // Power off
- break;
- case 3:
- HAL_ADC_Start(&hadc3); // Power on
- break;
- case 4:
- HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion
- OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- break;
- case 5:
- HAL_ADC_Stop(&hadc3); // Power off
- break;
- }
- return OUT;
-}
-
-uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num)
-{
- // Main idea:
- // I is responsible to maintaining constant temperature difference between laser and room temperature.
- // As room temperature can be approximated as constant at current-varying time -- I should be kept constant too.
- // As current through laser diode heats it -- we can estimate excessive power on laser diode and trim peltier current according to it.
- // So, equation should be look like this:
- // x_output = x_output_original + I(laser)*(a + (t - b)c)
- // t -- cycle phase
- // a,b,c -- constants
- //
- // How can we control laser diode temperature?
- // -- We can set laser to fixed current at the time we need to measure.
- // Then we should measure wavelength.
- // Calibration sequence:
- // 1) n
-
-
-
- int e_pid;
- float P_coef_current;//, I_coef_current;
- float e_integral;
- int x_output;
-
- e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-
- e_integral = LDx_results->e_integral;
-
- if((e_pid < 3000) && (e_pid > - 3000)){
- e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100;//100 - timer is too fast
- }
- P_coef_current = LDx_curr_setup->P_coef_temp;
-
- if (e_integral > 32000){
- e_integral = 32000;
- }
- else if (e_integral < - 32000){
- e_integral = -32000;
- }
- LDx_results->e_integral = e_integral;
-
- x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (int)e_integral;//
-
- if(x_output < 1000){
- x_output = 8800;
- }
- else if(x_output > 56800){
- x_output = 56800;
- }
-
- if (num==2)
- TO7_PID = TO7;//Save current time only on 2nd laser
-
- return (uint16_t)x_output;
-}
-
-
-uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uint8_t num)
-{
- int e_pid;
- float P_coef_current;//, I_coef_current;
- float e_integral;
- int x_output;
-
- e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-
- e_integral = LDx_results->e_integral;
-
- if((e_pid < 3000) && (e_pid > - 3000)){
- e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100;//100 - timer is too fast
- }
- P_coef_current = LDx_curr_setup->P_coef_temp;
-
- if (e_integral > 32000){
- e_integral = 32000;
- }
- else if (e_integral < - 32000){
- e_integral = -32000;
- }
- LDx_results->e_integral = e_integral;
-
- x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (int)e_integral;//
-
- if(x_output < 1000){
- x_output = 8800;
- }
- else if(x_output > 56800){
- x_output = 56800;
- }
-
- if (num==2)
- TO7_PID = TO7;//Save current time only on 2nd laser
-
- return (uint16_t)x_output;
-}
-uint8_t CheckChecksum(uint16_t *pbuff)
-{
- uint16_t cl_ind;
-
- switch (UART_header)
- {
- case 0x7777:
- cl_ind = TSK_16 - 2;
- break;
- case 0x1111:
- cl_ind = CL_16 - 2;
- break;
- default:
- return 0;
- break;
- }
-
- CS_result = CalculateChecksum(pbuff, cl_ind);
-
- return ((CS_result == COMMAND[cl_ind]) ? 1 : 0);
-}
-uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
-{
- short i;
- uint16_t cs = *pbuff;
-
- for(i = 1; i < len; i++)
- {
- cs ^= *(pbuff+i);
- }
- return cs;
-}
-
-/*int SD_Init(void)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Create_File("FILE1.TXT"); // 0 -suc
- //Create_File("FILE2.TXT");
- Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part ?01 (for DFB-1550-14BF lasers). Parameters of plate: Ilaser: 0...66.7 mA; Vlaser: 0...2 V; Itec: -1.27...1.27 A; Vtec: -2.56...2.56 V; IMphD: 0...519 uA; Tint: -1.2...+45.8 C; Text: -25.8...+43.4 C. Place for your advertising:..................................................................................................................................");
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-}*/
-
-int SD_SAVE(uint16_t *pbuff)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8);
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-}
-
-
-
-//uint32_t Get_Length(void)
-//{
-// return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16);
-//}
-
-int SD_READ(uint16_t *pbuff)
-{
- int test=0;
- if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- {
- test = Mount_SD("/");
- if (test == 0) //0 - suc
- {
- //Format_SD();
- test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes
- fgoto+=DL_8;
- test = Unmount_SD("/"); // 0 - succ
- return test;
- }
- else
- {
- return 1;
- }
- }
- else
- {
- return 1;
- }
-
-/* for (uint16_t j = 0; j < DL_16; j++)
- {
- *(pbuff+j) = SD_matr[SD_SLIDE][j];
- }
- if (SD_SLIDE CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (Mach-Zander)
- TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent (ADC clock)
- TIM11 -> DIER &= ~(1); //disable interrupt
- /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
- HAL_TIM_IRQHandler(&htim11);
- /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */
-
- /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */
+void TIM1_TRG_COM_TIM11_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */
+ /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
+ /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */
+
+ /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */
}
/**
@@ -273,50 +253,53 @@ void TIM2_IRQHandler(void)
/**
* @brief This function handles USART1 global interrupt.
*/
-void USART1_IRQHandler(void)
-{
- /* USER CODE BEGIN USART1_IRQn 0 */
- volatile uint8_t temp;
- if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
- {
- UART_RxCpltCallback();
- }
- else
- {
- if(LL_USART_IsActiveFlag_ORE(USART1))
- {
- //temp = USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_FE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_NE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_PE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else
- {
- if(LL_USART_IsActiveFlag_TC(USART6) && LL_USART_IsEnabledIT_TC(USART6))
- {
- LL_USART_ClearFlag_TC(USART1);
- //test_counter += 1;
- //if(UART_transmission_busy == 1){
- LL_USART_DisableIT_TC(USART1);
- //UART_transmission_busy = 0;
- }
- }
- }
-
- /* USER CODE END USART1_IRQn 0 */
+void USART1_IRQHandler(void)
+{
+ /* USER CODE BEGIN USART1_IRQn 0 */
+ uint8_t discarded_byte = 0u;
+ uint8_t uart_error_detected = 0u;
+
+ if (LL_USART_IsActiveFlag_PE(USART1))
+ {
+ LL_USART_ClearFlag_PE(USART1);
+ uart_error_detected = 1u;
+ }
+ if (LL_USART_IsActiveFlag_FE(USART1))
+ {
+ LL_USART_ClearFlag_FE(USART1);
+ uart_error_detected = 1u;
+ }
+ if (LL_USART_IsActiveFlag_NE(USART1))
+ {
+ LL_USART_ClearFlag_NE(USART1);
+ uart_error_detected = 1u;
+ }
+ if (LL_USART_IsActiveFlag_ORE(USART1))
+ {
+ LL_USART_ClearFlag_ORE(USART1);
+ uart_error_detected = 1u;
+ }
+
+ if (uart_error_detected != 0u)
+ {
+ if (LL_USART_IsActiveFlag_RXNE(USART1))
+ {
+ discarded_byte = LL_USART_ReceiveData8(USART1);
+ (void)discarded_byte;
+ }
+ app_on_uart_error();
+ }
+ else if (LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
+ {
+ app_on_uart_byte(LL_USART_ReceiveData8(USART1));
+ }
+ else if (LL_USART_IsActiveFlag_TC(USART1) && LL_USART_IsEnabledIT_TC(USART1))
+ {
+ LL_USART_ClearFlag_TC(USART1);
+ LL_USART_DisableIT_TC(USART1);
+ }
+
+ /* USER CODE END USART1_IRQn 0 */
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
@@ -325,37 +308,13 @@ void USART1_IRQHandler(void)
/**
* @brief This function handles TIM8 update interrupt and TIM13 global interrupt.
*/
-void TIM8_UP_TIM13_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
-// HAL_GPIO_TogglePin(LD_blinker.signal_port, LD_blinker.signal_pin);
- //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin);
- //*
- switch (LD_blinker.state) {
- case 0: //no LD update required
- break;
- case 1: //LD ON, need update
- //Set_LTEC(LD_blinker.task_type , LD_blinker.param);
- //LD_blinker.state = 0;
- break;
- case 2: //set LD ON, blinking
- //Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- Set_LTEC(2 , LD_blinker.param);
- HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_SET);
- LD_blinker.state = 3;
- break;
- case 3: //set LD OFF, blinking
- Set_LTEC(2 , 0);
- HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET);
- LD_blinker.state = 2;
- break;
- }
- //*/
- /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
- HAL_TIM_IRQHandler(&htim8);
- /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */
-
- /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
+void TIM8_UP_TIM13_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
+ /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
+ /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */
+
+ /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
}
/**
@@ -374,54 +333,49 @@ void TIM5_IRQHandler(void)
/**
* @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
*/
-void TIM6_DAC_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+void TIM6_DAC_IRQHandler(void)
+{
+ /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
/* USER CODE END TIM6_DAC_IRQn 0 */
- /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
- if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
- {
- LL_TIM_ClearFlag_UPDATE(TIM6);
- TO6++;//increment tick
- //10 ms or 100 Hz
- HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- //HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_12);
- }
- /* USER CODE END TIM6_DAC_IRQn 1 */
+ /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+ if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
+ {
+ LL_TIM_ClearFlag_UPDATE(TIM6);
+ app_on_tim6_tick();
+ }
+ /* USER CODE END TIM6_DAC_IRQn 1 */
}
/**
* @brief This function handles TIM7 global interrupt.
*/
-void TIM7_IRQHandler(void)
-{
+void TIM7_IRQHandler(void)
+{
/* USER CODE BEGIN TIM7_IRQn 0 */
/* USER CODE END TIM7_IRQn 0 */
- /* USER CODE BEGIN TIM7_IRQn 1 */
- if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
- {
- LL_TIM_ClearFlag_UPDATE(TIM7);
- TO7++;
- //1 ms or 1000 Hz
- //HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- }
- /* USER CODE END TIM7_IRQn 1 */
+ /* USER CODE BEGIN TIM7_IRQn 1 */
+ if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
+ {
+ LL_TIM_ClearFlag_UPDATE(TIM7);
+ app_on_tim7_tick();
+ }
+ /* USER CODE END TIM7_IRQn 1 */
}
/**
* @brief This function handles DMA2 stream7 global interrupt.
*/
-void DMA2_Stream7_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
- if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
- {
- DMA2_Stream7_TransferComplete();
- u_tx_flg = 0;//indicate that transfer compete
- }
- else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
+void DMA2_Stream7_IRQHandler(void)
+{
+ /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
+ if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
+ {
+ LL_DMA_ClearFlag_TC7(DMA2);
+ app_on_dma_tx_complete();
+ }
+ else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
{
LL_DMA_ClearFlag_TE7(DMA2);
}
@@ -431,212 +385,6 @@ void DMA2_Stream7_IRQHandler(void)
/* USER CODE END DMA2_Stream7_IRQn 1 */
}
-/* USER CODE BEGIN 1 */
-void UART_RxCpltCallback(void)
-{
- uart_buf = LL_USART_ReceiveData8(USART1);
- switch (UART_rec_incr)
- {
- case 0:
- TO6_uart = TO6;//Save the time of start rec. command
- flg_tmt = 1;//Set the timeout flag
- UART_header = uart_buf;
- UART_rec_incr++;
- break;
- case 1:
- UART_header += ((uint16_t)uart_buf<<8);
- switch (UART_header)
- {
- case 0x1111: //received long packet
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case 0x2222: //Back to default
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = DEFAULT_ENABLE;
- break;
- case 0x3333: //Transmith saved DATA
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = TRANS_S_ENABLE;
- break;
- case 0x4444: //Received packet
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = TRANS_ENABLE;
- break;
- case 0x5555: //Erase saved DATA
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = REMOVE_FILE;
- break;
- case 0x6666: //Request state
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = STATE;
- break;
- case 0x7777:
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case AD9102_CMD_HEADER: // AD9102 command
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case AD9833_CMD_HEADER: // AD9833 command
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case STM32_DAC_CMD_HEADER: // STM32 internal DAC command
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- default: //error decoding header
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- //UART_transmission_request = MESS_01;
- //CPU_state = HALT;
- State_Data[0] |= UART_ERR;
- CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- break;
- }
- break;
-
- case (AD9102_CMD_8 - 1):
- if (UART_header == AD9102_CMD_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = AD9102_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else if (UART_header == AD9833_CMD_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = AD9833_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else if (UART_header == DS1809_CMD_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = DS1809_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else if (UART_header == STM32_DAC_CMD_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = STM32_DAC_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else if (UART_header == AD9102_WAVE_CTRL_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = AD9102_WAVE_CTRL_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- }
- break;
-
- case (CL_8 - 1):
- if (UART_header == 0x1111)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = DECODE_ENABLE;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else if (UART_header == AD9102_WAVE_DATA_HEADER)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = AD9102_WAVE_DATA_CMD;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- }
- break;
- case (TSK_8 - 1):
- if (UART_header == 0x7777)
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- CPU_state = DECODE_TASK;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- }
- break;
- default:
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- break;
- }
-// HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
-}
-
-//-----------------------------------------------
-void DMA2_Stream7_TransferComplete(void)
-{
- LL_DMA_ClearFlag_TC7(DMA2);
-}
-//-----------------------------------------------
-/* USER CODE END 1 */
+/* USER CODE BEGIN 1 */
+/* IRQ forwarding lives in app_core.c. */
+/* USER CODE END 1 */
diff --git a/Src/stm32f7xx_it.c_backup b/Src/stm32f7xx_it.c_backup
deleted file mode 100644
index bfb9d19..0000000
--- a/Src/stm32f7xx_it.c_backup
+++ /dev/null
@@ -1,530 +0,0 @@
-/* USER CODE BEGIN Header */
-/**
- ******************************************************************************
- * @file stm32f7xx_it.c
- * @brief Interrupt Service Routines.
- ******************************************************************************
- * @attention
- *
- * Copyright (c) 2023 STMicroelectronics.
- * All rights reserved.
- *
- * This software is licensed under terms that can be found in the LICENSE file
- * in the root directory of this software component.
- * If no LICENSE file comes with this software, it is provided AS-IS.
- *
- ******************************************************************************
- */
-/* USER CODE END Header */
-
-/* Includes ------------------------------------------------------------------*/
-#include "main.h"
-#include "stm32f7xx_it.h"
-/* Private includes ----------------------------------------------------------*/
-/* USER CODE BEGIN Includes */
-/* USER CODE END Includes */
-
-/* Private typedef -----------------------------------------------------------*/
-/* USER CODE BEGIN TD */
-
-/* USER CODE END TD */
-
-/* Private define ------------------------------------------------------------*/
-/* USER CODE BEGIN PD */
-
-/* USER CODE END PD */
-
-/* Private macro -------------------------------------------------------------*/
-/* USER CODE BEGIN PM */
-
-/* USER CODE END PM */
-
-/* Private variables ---------------------------------------------------------*/
-/* USER CODE BEGIN PV */
- extern uint32_t TO6, TO7, TO6_uart, TO10, TO10_counter;
- extern uint16_t UART_rec_incr, UART_header, COMMAND[CL_16];
- extern uint8_t uart_buf, flg_tmt, CPU_state, State_Data[2], UART_transmission_request, u_tx_flg, TIM10_coflag;
- extern task_t task;
- extern task_state;
- extern LD_Blinker_StateTypeDef LD_blinker;
-/* USER CODE END PV */
-
-/* Private function prototypes -----------------------------------------------*/
-/* USER CODE BEGIN PFP */
-void UART_RxCpltCallback(void);
-void DMA2_Stream7_TransferComplete(void);
-/* USER CODE END PFP */
-
-/* Private user code ---------------------------------------------------------*/
-/* USER CODE BEGIN 0 */
-
-/* USER CODE END 0 */
-
-/* External variables --------------------------------------------------------*/
-extern ADC_HandleTypeDef hadc1;
-extern ADC_HandleTypeDef hadc3;
-extern TIM_HandleTypeDef htim8;
-extern TIM_HandleTypeDef htim10;
-/* USER CODE BEGIN EV */
-
-/* USER CODE END EV */
-
-/******************************************************************************/
-/* Cortex-M7 Processor Interruption and Exception Handlers */
-/******************************************************************************/
-/**
- * @brief This function handles Non maskable interrupt.
- */
-void NMI_Handler(void)
-{
- /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
-
- /* USER CODE END NonMaskableInt_IRQn 0 */
- /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
- while (1)
- {
- }
- /* USER CODE END NonMaskableInt_IRQn 1 */
-}
-
-/**
- * @brief This function handles Hard fault interrupt.
- */
-void HardFault_Handler(void)
-{
- /* USER CODE BEGIN HardFault_IRQn 0 */
-
- /* USER CODE END HardFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- /* USER CODE END W1_HardFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Memory management fault.
- */
-void MemManage_Handler(void)
-{
- /* USER CODE BEGIN MemoryManagement_IRQn 0 */
-
- /* USER CODE END MemoryManagement_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- /* USER CODE END W1_MemoryManagement_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Pre-fetch fault, memory access fault.
- */
-void BusFault_Handler(void)
-{
- /* USER CODE BEGIN BusFault_IRQn 0 */
-
- /* USER CODE END BusFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- /* USER CODE END W1_BusFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles Undefined instruction or illegal state.
- */
-void UsageFault_Handler(void)
-{
- /* USER CODE BEGIN UsageFault_IRQn 0 */
-
- /* USER CODE END UsageFault_IRQn 0 */
- while (1)
- {
- /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- /* USER CODE END W1_UsageFault_IRQn 0 */
- }
-}
-
-/**
- * @brief This function handles System service call via SWI instruction.
- */
-void SVC_Handler(void)
-{
- /* USER CODE BEGIN SVCall_IRQn 0 */
-
- /* USER CODE END SVCall_IRQn 0 */
- /* USER CODE BEGIN SVCall_IRQn 1 */
-
- /* USER CODE END SVCall_IRQn 1 */
-}
-
-/**
- * @brief This function handles Debug monitor.
- */
-void DebugMon_Handler(void)
-{
- /* USER CODE BEGIN DebugMonitor_IRQn 0 */
-
- /* USER CODE END DebugMonitor_IRQn 0 */
- /* USER CODE BEGIN DebugMonitor_IRQn 1 */
-
- /* USER CODE END DebugMonitor_IRQn 1 */
-}
-
-/**
- * @brief This function handles Pendable request for system service.
- */
-void PendSV_Handler(void)
-{
- /* USER CODE BEGIN PendSV_IRQn 0 */
-
- /* USER CODE END PendSV_IRQn 0 */
- /* USER CODE BEGIN PendSV_IRQn 1 */
-
- /* USER CODE END PendSV_IRQn 1 */
-}
-
-/**
- * @brief This function handles System tick timer.
- */
-void SysTick_Handler(void)
-{
- /* USER CODE BEGIN SysTick_IRQn 0 */
-
- /* USER CODE END SysTick_IRQn 0 */
- HAL_IncTick();
- /* USER CODE BEGIN SysTick_IRQn 1 */
-
- /* USER CODE END SysTick_IRQn 1 */
-}
-
-/******************************************************************************/
-/* STM32F7xx Peripheral Interrupt Handlers */
-/* Add here the Interrupt Handlers for the used peripherals. */
-/* For the available peripheral interrupt handler names, */
-/* please refer to the startup file (startup_stm32f7xx.s). */
-/******************************************************************************/
-
-/**
- * @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
- */
-void ADC_IRQHandler(void)
-{
- /* USER CODE BEGIN ADC_IRQn 0 */
-
- /* USER CODE END ADC_IRQn 0 */
- HAL_ADC_IRQHandler(&hadc1);
- HAL_ADC_IRQHandler(&hadc3);
- /* USER CODE BEGIN ADC_IRQn 1 */
-
- /* USER CODE END ADC_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
- */
-void TIM1_UP_TIM10_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
- TO10++;
- if (TO10 == TO10_counter)
- TIM10_coflag = 1;
- /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
- HAL_TIM_IRQHandler(&htim10);
- /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
-
- /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM2 global interrupt.
- */
-void TIM2_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM2_IRQn 0 */
-
- /* USER CODE END TIM2_IRQn 0 */
- /* USER CODE BEGIN TIM2_IRQn 1 */
-
- /* USER CODE END TIM2_IRQn 1 */
-}
-
-/**
- * @brief This function handles USART1 global interrupt.
- */
-void USART1_IRQHandler(void)
-{
- /* USER CODE BEGIN USART1_IRQn 0 */
- volatile uint8_t temp;
- if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
- {
- UART_RxCpltCallback();
- }
- else
- {
- if(LL_USART_IsActiveFlag_ORE(USART1))
- {
- //temp = USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_FE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_NE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else if(LL_USART_IsActiveFlag_PE(USART1))
- {
- //(void) USART1->RDR;
- temp+= LL_USART_ReceiveData8(USART1);
- }
- else
- {
- if(LL_USART_IsActiveFlag_TC(USART6) && LL_USART_IsEnabledIT_TC(USART6))
- {
- LL_USART_ClearFlag_TC(USART1);
- //test_counter += 1;
- //if(UART_transmission_busy == 1){
- LL_USART_DisableIT_TC(USART1);
- //UART_transmission_busy = 0;
- }
- }
- }
-
- /* USER CODE END USART1_IRQn 0 */
- /* USER CODE BEGIN USART1_IRQn 1 */
-
- /* USER CODE END USART1_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM8 update interrupt and TIM13 global interrupt.
- */
-void TIM8_UP_TIM13_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
- switch (LD_blinker.state) {
- case 0: //no LD update required
- break;
- case 1: //LD ON, need update
- Set_LTEC(LD_blinker.task_type , LD_blinker.param);
- LD_blinker.state = 0;
- break;
- case 2: //set LD ON, blinking
- Set_LTEC(LD_blinker.task_type , LD_blinker.param);
- HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_SET);
- LD_blinker.state = 3;
- break;
- case 3: //set LD OFF, blinking
- Set_LTEC(LD_blinker.task_type , 0.0);
- HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET);
- LD_blinker.state = 2;
- break;
- }
- /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
- HAL_TIM_IRQHandler(&htim8);
- /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */
-
- /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM5 global interrupt.
- */
-void TIM5_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM5_IRQn 0 */
-
- /* USER CODE END TIM5_IRQn 0 */
- /* USER CODE BEGIN TIM5_IRQn 1 */
-
- /* USER CODE END TIM5_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
- */
-void TIM6_DAC_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
-
- /* USER CODE END TIM6_DAC_IRQn 0 */
-
- /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
- if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
- {
- LL_TIM_ClearFlag_UPDATE(TIM6);
- TO6++;//increment tick
- //10 ms or 100 Hz
- HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- //HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_12);
- }
- /* USER CODE END TIM6_DAC_IRQn 1 */
-}
-
-/**
- * @brief This function handles TIM7 global interrupt.
- */
-void TIM7_IRQHandler(void)
-{
- /* USER CODE BEGIN TIM7_IRQn 0 */
-
- /* USER CODE END TIM7_IRQn 0 */
- /* USER CODE BEGIN TIM7_IRQn 1 */
- if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
- {
- LL_TIM_ClearFlag_UPDATE(TIM7);
- TO7++;
- //1 ms or 1000 Hz
- //HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- }
- /* USER CODE END TIM7_IRQn 1 */
-}
-
-/**
- * @brief This function handles DMA2 stream7 global interrupt.
- */
-void DMA2_Stream7_IRQHandler(void)
-{
- /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
- if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
- {
- DMA2_Stream7_TransferComplete();
- u_tx_flg = 0;//indicate that transfer compete
- }
- else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
- {
- LL_DMA_ClearFlag_TE7(DMA2);
- }
- /* USER CODE END DMA2_Stream7_IRQn 0 */
-
- /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
-
- /* USER CODE END DMA2_Stream7_IRQn 1 */
-}
-
-/* USER CODE BEGIN 1 */
-void UART_RxCpltCallback(void)
-{
- uart_buf = LL_USART_ReceiveData8(USART1);
- switch (UART_rec_incr)
- {
- case 0:
- TO6_uart = TO6;//Save the time of start rec. command
- flg_tmt = 1;//Set the timeout flag
- UART_header = uart_buf;
- UART_rec_incr++;
- break;
- case 1:
- UART_header += ((uint16_t)uart_buf<<8);
- switch (UART_header)
- {
- case 0x1111: //received long packet
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- case 0x2222: //Back to default
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = DEFAULT_ENABLE;
- break;
- case 0x3333: //Transmith saved DATA
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = TRANS_S_ENABLE;
- break;
- case 0x4444: //Received packet
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = TRANS_ENABLE;
- break;
- case 0x5555: //Erase saved DATA
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = REMOVE_FILE;
- break;
- case 0x6666: //Request state
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- CPU_state = STATE;
- break;
- case 0x7777:
- UART_rec_incr = 2;//timeout flag is still setting!
- break;
- default: //error decoding header
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- //UART_transmission_request = MESS_01;
- //CPU_state = HALT;
- State_Data[0] |= UART_ERR;
- CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- break;
- }
- break;
-
- case (CL_8 - 1):
- if (UART_header == 0x1111)
- {
- if ((UART_rec_incr & 0x0001) > 0)
- COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- else
- COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- CPU_state = DECODE_ENABLE;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- }
- break;
- case (TSK_8 - 1):
- if (UART_header == 0x7777)
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- CPU_state = DECODE_TASK;
- UART_rec_incr = 0;
- flg_tmt = 0;//Reset the timeout flag
- }
- else
- {
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- }
- break;
- default:
- if ((UART_rec_incr&0x0001)>0)
- COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- else
- COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- UART_rec_incr++;
- UART_transmission_request = NO_MESS;
- break;
- }
-// HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
-}
-
-//-----------------------------------------------
-void DMA2_Stream7_TransferComplete(void)
-{
- LL_DMA_ClearFlag_TC7(DMA2);
-}
-//-----------------------------------------------
-/* USER CODE END 1 */
diff --git a/build/File_Handling.d b/build/File_Handling.d
deleted file mode 100644
index 08e22b9..0000000
--- a/build/File_Handling.d
+++ /dev/null
@@ -1,108 +0,0 @@
-build/File_Handling.o: Src/File_Handling.c Inc/File_Handling.h \
- Inc/fatfs.h Middlewares/Third_Party/FatFs/src/ff.h \
- Middlewares/Third_Party/FatFs/src/integer.h Inc/ffconf.h Inc/main.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h \
- Inc/stm32f7xx_hal_conf.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h \
- Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h \
- Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h \
- Drivers/CMSIS/Include/core_cm7.h Drivers/CMSIS/Include/cmsis_version.h \
- Drivers/CMSIS/Include/cmsis_compiler.h Drivers/CMSIS/Include/cmsis_gcc.h \
- Drivers/CMSIS/Include/mpu_armv7.h \
- Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h Inc/bsp_driver_sd.h \
- Inc/fatfs_platform.h Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
- Middlewares/Third_Party/FatFs/src/diskio.h \
- Middlewares/Third_Party/FatFs/src/ff.h Inc/sd_diskio.h
-Inc/File_Handling.h:
-Inc/fatfs.h:
-Middlewares/Third_Party/FatFs/src/ff.h:
-Middlewares/Third_Party/FatFs/src/integer.h:
-Inc/ffconf.h:
-Inc/main.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
-Inc/stm32f7xx_hal_conf.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h:
-Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h:
-Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h:
-Drivers/CMSIS/Include/core_cm7.h:
-Drivers/CMSIS/Include/cmsis_version.h:
-Drivers/CMSIS/Include/cmsis_compiler.h:
-Drivers/CMSIS/Include/cmsis_gcc.h:
-Drivers/CMSIS/Include/mpu_armv7.h:
-Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_cortex.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h:
-Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h:
-Inc/bsp_driver_sd.h:
-Inc/fatfs_platform.h:
-Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
-Middlewares/Third_Party/FatFs/src/diskio.h:
-Middlewares/Third_Party/FatFs/src/ff.h:
-Inc/sd_diskio.h:
diff --git a/build/File_Handling.lst b/build/File_Handling.lst
deleted file mode 100644
index e6807a4..0000000
--- a/build/File_Handling.lst
+++ /dev/null
@@ -1,3501 +0,0 @@
-ARM GAS /tmp/ccnfjbri.s page 1
-
-
- 1 .cpu cortex-m7
- 2 .arch armv7e-m
- 3 .fpu fpv5-d16
- 4 .eabi_attribute 28, 1
- 5 .eabi_attribute 20, 1
- 6 .eabi_attribute 21, 1
- 7 .eabi_attribute 23, 3
- 8 .eabi_attribute 24, 1
- 9 .eabi_attribute 25, 1
- 10 .eabi_attribute 26, 1
- 11 .eabi_attribute 30, 1
- 12 .eabi_attribute 34, 1
- 13 .eabi_attribute 18, 4
- 14 .file "File_Handling.c"
- 15 .text
- 16 .Ltext0:
- 17 .cfi_sections .debug_frame
- 18 .file 1 "Src/File_Handling.c"
- 19 .section .text.Send_Uart,"ax",%progbits
- 20 .align 1
- 21 .global Send_Uart
- 22 .syntax unified
- 23 .thumb
- 24 .thumb_func
- 26 Send_Uart:
- 27 .LVL0:
- 28 .LFB1186:
- 1:Src/File_Handling.c **** /*
- 2:Src/File_Handling.c **** * File_Handling_RTOS.c
- 3:Src/File_Handling.c **** *
- 4:Src/File_Handling.c **** * Created on: 14-May-2020
- 5:Src/File_Handling.c **** * Author: Controllerstech
- 6:Src/File_Handling.c **** */
- 7:Src/File_Handling.c ****
- 8:Src/File_Handling.c **** #include
- 9:Src/File_Handling.c **** #include "stm32f7xx_hal.h"
- 10:Src/File_Handling.c ****
- 11:Src/File_Handling.c **** #define UART USART1
- 12:Src/File_Handling.c ****
- 13:Src/File_Handling.c ****
- 14:Src/File_Handling.c ****
- 15:Src/File_Handling.c **** /* =============================>>>>>>>> NO CHANGES AFTER THIS LINE ===============================
- 16:Src/File_Handling.c ****
- 17:Src/File_Handling.c **** FATFS fs; // file system
- 18:Src/File_Handling.c **** FIL fil; // File
- 19:Src/File_Handling.c **** FILINFO fno;
- 20:Src/File_Handling.c **** extern FRESULT fresult; // result
- 21:Src/File_Handling.c **** extern unsigned long sizeoffile;
- 22:Src/File_Handling.c **** UINT br, bw; // File read/write count
- 23:Src/File_Handling.c ****
- 24:Src/File_Handling.c **** /**** capacity related *****/
- 25:Src/File_Handling.c **** FATFS *pfs;
- 26:Src/File_Handling.c **** DWORD fre_clust;
- 27:Src/File_Handling.c **** uint32_t total, free_space;
- 28:Src/File_Handling.c ****
- 29:Src/File_Handling.c ****
- 30:Src/File_Handling.c **** void Send_Uart (char *string)
- ARM GAS /tmp/ccnfjbri.s page 2
-
-
- 31:Src/File_Handling.c **** {
- 29 .loc 1 31 1 view -0
- 30 .cfi_startproc
- 31 @ args = 0, pretend = 0, frame = 0
- 32 @ frame_needed = 0, uses_anonymous_args = 0
- 33 @ link register save eliminated.
- 32:Src/File_Handling.c **** //HAL_UART_Transmit(UART, (uint8_t *)string, strlen (string), HAL_MAX_DELAY);
- 33:Src/File_Handling.c **** }
- 34 .loc 1 33 1 view .LVU1
- 35 0000 7047 bx lr
- 36 .cfi_endproc
- 37 .LFE1186:
- 39 .section .text.Mount_SD,"ax",%progbits
- 40 .align 1
- 41 .global Mount_SD
- 42 .syntax unified
- 43 .thumb
- 44 .thumb_func
- 46 Mount_SD:
- 47 .LVL1:
- 48 .LFB1187:
- 34:Src/File_Handling.c ****
- 35:Src/File_Handling.c ****
- 36:Src/File_Handling.c ****
- 37:Src/File_Handling.c **** int Mount_SD (const TCHAR* path)
- 38:Src/File_Handling.c **** {
- 49 .loc 1 38 1 view -0
- 50 .cfi_startproc
- 51 @ args = 0, pretend = 0, frame = 0
- 52 @ frame_needed = 0, uses_anonymous_args = 0
- 53 .loc 1 38 1 is_stmt 0 view .LVU3
- 54 0000 08B5 push {r3, lr}
- 55 .LCFI0:
- 56 .cfi_def_cfa_offset 8
- 57 .cfi_offset 3, -8
- 58 .cfi_offset 14, -4
- 59 0002 0146 mov r1, r0
- 39:Src/File_Handling.c **** fresult = f_mount(&fs, path, 1);
- 60 .loc 1 39 2 is_stmt 1 view .LVU4
- 61 .loc 1 39 12 is_stmt 0 view .LVU5
- 62 0004 0122 movs r2, #1
- 63 0006 0548 ldr r0, .L6
- 64 .LVL2:
- 65 .loc 1 39 12 view .LVU6
- 66 0008 FFF7FEFF bl f_mount
- 67 .LVL3:
- 68 .loc 1 39 10 discriminator 1 view .LVU7
- 69 000c 044B ldr r3, .L6+4
- 70 000e 1870 strb r0, [r3]
- 40:Src/File_Handling.c **** if (fresult != FR_OK) return 1;
- 71 .loc 1 40 2 is_stmt 1 view .LVU8
- 72 .loc 1 40 5 is_stmt 0 view .LVU9
- 73 0010 08B1 cbz r0, .L4
- 74 .loc 1 40 31 discriminator 1 view .LVU10
- 75 0012 0120 movs r0, #1
- 76 .L2:
- 41:Src/File_Handling.c **** else return 0;
- ARM GAS /tmp/ccnfjbri.s page 3
-
-
- 42:Src/File_Handling.c **** }
- 77 .loc 1 42 1 view .LVU11
- 78 0014 08BD pop {r3, pc}
- 79 .L4:
- 41:Src/File_Handling.c **** else return 0;
- 80 .loc 1 41 14 view .LVU12
- 81 0016 0020 movs r0, #0
- 82 0018 FCE7 b .L2
- 83 .L7:
- 84 001a 00BF .align 2
- 85 .L6:
- 86 001c 00000000 .word fs
- 87 0020 00000000 .word fresult
- 88 .cfi_endproc
- 89 .LFE1187:
- 91 .section .text.Unmount_SD,"ax",%progbits
- 92 .align 1
- 93 .global Unmount_SD
- 94 .syntax unified
- 95 .thumb
- 96 .thumb_func
- 98 Unmount_SD:
- 99 .LVL4:
- 100 .LFB1188:
- 43:Src/File_Handling.c ****
- 44:Src/File_Handling.c **** int Unmount_SD (const TCHAR* path)
- 45:Src/File_Handling.c **** {
- 101 .loc 1 45 1 is_stmt 1 view -0
- 102 .cfi_startproc
- 103 @ args = 0, pretend = 0, frame = 0
- 104 @ frame_needed = 0, uses_anonymous_args = 0
- 105 .loc 1 45 1 is_stmt 0 view .LVU14
- 106 0000 08B5 push {r3, lr}
- 107 .LCFI1:
- 108 .cfi_def_cfa_offset 8
- 109 .cfi_offset 3, -8
- 110 .cfi_offset 14, -4
- 111 0002 0146 mov r1, r0
- 46:Src/File_Handling.c **** fresult = f_mount(NULL, path, 1);
- 112 .loc 1 46 2 is_stmt 1 view .LVU15
- 113 .loc 1 46 12 is_stmt 0 view .LVU16
- 114 0004 0122 movs r2, #1
- 115 0006 0020 movs r0, #0
- 116 .LVL5:
- 117 .loc 1 46 12 view .LVU17
- 118 0008 FFF7FEFF bl f_mount
- 119 .LVL6:
- 120 .loc 1 46 10 discriminator 1 view .LVU18
- 121 000c 034B ldr r3, .L12
- 122 000e 1870 strb r0, [r3]
- 47:Src/File_Handling.c **** if (fresult == FR_OK) return 0;//Send_Uart ("SD CARD UNMOUNTED successfully...\n\n\n");
- 123 .loc 1 47 2 is_stmt 1 view .LVU19
- 124 .loc 1 47 5 is_stmt 0 view .LVU20
- 125 0010 08B1 cbz r0, .L10
- 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n");
- 126 .loc 1 48 9 view .LVU21
- 127 0012 0120 movs r0, #1
- ARM GAS /tmp/ccnfjbri.s page 4
-
-
- 128 .L8:
- 49:Src/File_Handling.c **** }
- 129 .loc 1 49 1 view .LVU22
- 130 0014 08BD pop {r3, pc}
- 131 .L10:
- 47:Src/File_Handling.c **** if (fresult == FR_OK) return 0;//Send_Uart ("SD CARD UNMOUNTED successfully...\n\n\n");
- 132 .loc 1 47 31 discriminator 1 view .LVU23
- 133 0016 0020 movs r0, #0
- 134 0018 FCE7 b .L8
- 135 .L13:
- 136 001a 00BF .align 2
- 137 .L12:
- 138 001c 00000000 .word fresult
- 139 .cfi_endproc
- 140 .LFE1188:
- 142 .section .rodata.Scan_SD.str1.4,"aMS",%progbits,1
- 143 .align 2
- 144 .LC0:
- 145 0000 53595354 .ascii "SYSTEM~1\000"
- 145 454D7E31
- 145 00
- 146 0009 000000 .align 2
- 147 .LC1:
- 148 000c 4469723A .ascii "Dir: %s\015\012\000"
- 148 2025730D
- 148 0A00
- 149 0016 0000 .align 2
- 150 .LC2:
- 151 0018 2F257300 .ascii "/%s\000"
- 152 .align 2
- 153 .LC3:
- 154 001c 46696C65 .ascii "File: %s/%s\012\000"
- 154 3A202573
- 154 2F25730A
- 154 00
- 155 .section .text.Scan_SD,"ax",%progbits
- 156 .align 1
- 157 .global Scan_SD
- 158 .syntax unified
- 159 .thumb
- 160 .thumb_func
- 162 Scan_SD:
- 163 .LVL7:
- 164 .LFB1189:
- 50:Src/File_Handling.c ****
- 51:Src/File_Handling.c **** /* Start node to be scanned (***also used as work area***) */
- 52:Src/File_Handling.c **** FRESULT Scan_SD (char* pat)
- 53:Src/File_Handling.c **** {
- 165 .loc 1 53 1 is_stmt 1 view -0
- 166 .cfi_startproc
- 167 @ args = 0, pretend = 0, frame = 48
- 168 @ frame_needed = 0, uses_anonymous_args = 0
- 169 .loc 1 53 1 is_stmt 0 view .LVU25
- 170 0000 70B5 push {r4, r5, r6, lr}
- 171 .LCFI2:
- 172 .cfi_def_cfa_offset 16
- 173 .cfi_offset 4, -16
- ARM GAS /tmp/ccnfjbri.s page 5
-
-
- 174 .cfi_offset 5, -12
- 175 .cfi_offset 6, -8
- 176 .cfi_offset 14, -4
- 177 0002 8CB0 sub sp, sp, #48
- 178 .LCFI3:
- 179 .cfi_def_cfa_offset 64
- 180 0004 0546 mov r5, r0
- 54:Src/File_Handling.c **** DIR dir;
- 181 .loc 1 54 5 is_stmt 1 view .LVU26
- 55:Src/File_Handling.c **** UINT i;
- 182 .loc 1 55 5 view .LVU27
- 56:Src/File_Handling.c **** char *path = malloc(20*sizeof (char));
- 183 .loc 1 56 5 view .LVU28
- 184 .loc 1 56 18 is_stmt 0 view .LVU29
- 185 0006 1420 movs r0, #20
- 186 .LVL8:
- 187 .loc 1 56 18 view .LVU30
- 188 0008 FFF7FEFF bl malloc
- 189 .LVL9:
- 190 000c 0446 mov r4, r0
- 191 .LVL10:
- 57:Src/File_Handling.c **** sprintf (path, "%s",pat);
- 192 .loc 1 57 5 is_stmt 1 view .LVU31
- 193 000e 2946 mov r1, r5
- 194 0010 FFF7FEFF bl strcpy
- 195 .LVL11:
- 58:Src/File_Handling.c ****
- 59:Src/File_Handling.c **** fresult = f_opendir(&dir, path); /* Open the directory */
- 196 .loc 1 59 5 view .LVU32
- 197 .loc 1 59 15 is_stmt 0 view .LVU33
- 198 0014 2146 mov r1, r4
- 199 0016 6846 mov r0, sp
- 200 0018 FFF7FEFF bl f_opendir
- 201 .LVL12:
- 202 .loc 1 59 13 discriminator 1 view .LVU34
- 203 001c 264B ldr r3, .L21
- 204 001e 1870 strb r0, [r3]
- 60:Src/File_Handling.c **** if (fresult == FR_OK)
- 205 .loc 1 60 5 is_stmt 1 view .LVU35
- 206 .loc 1 60 8 is_stmt 0 view .LVU36
- 207 0020 0028 cmp r0, #0
- 208 0022 42D1 bne .L16
- 209 0024 0BE0 b .L15
- 210 .LVL13:
- 211 .L18:
- 212 .LBB2:
- 61:Src/File_Handling.c **** {
- 62:Src/File_Handling.c **** for (;;)
- 63:Src/File_Handling.c **** {
- 64:Src/File_Handling.c **** fresult = f_readdir(&dir, &fno); /* Read a directory item */
- 65:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 66:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 67:Src/File_Handling.c **** {
- 68:Src/File_Handling.c **** if (!(strcmp ("SYSTEM~1", fno.fname))) continue;
- 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname);
- 71:Src/File_Handling.c **** Send_Uart(buf);
- ARM GAS /tmp/ccnfjbri.s page 6
-
-
- 72:Src/File_Handling.c **** free(buf);
- 73:Src/File_Handling.c **** i = strlen(path);
- 74:Src/File_Handling.c **** sprintf(&path[i], "/%s", fno.fname);
- 75:Src/File_Handling.c **** fresult = Scan_SD(path); /* Enter the directory */
- 76:Src/File_Handling.c **** if (fresult != FR_OK) break;
- 77:Src/File_Handling.c **** path[i] = 0;
- 78:Src/File_Handling.c **** }
- 79:Src/File_Handling.c **** else
- 80:Src/File_Handling.c **** { /* It is a file. */
- 81:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 213 .loc 1 81 16 is_stmt 1 view .LVU37
- 214 .loc 1 81 28 is_stmt 0 view .LVU38
- 215 0026 1E20 movs r0, #30
- 216 0028 FFF7FEFF bl malloc
- 217 .LVL14:
- 218 002c 0546 mov r5, r0
- 219 .LVL15:
- 82:Src/File_Handling.c **** sprintf(buf,"File: %s/%s\n", path, fno.fname);
- 220 .loc 1 82 16 is_stmt 1 view .LVU39
- 221 002e 234B ldr r3, .L21+4
- 222 0030 2246 mov r2, r4
- 223 0032 2349 ldr r1, .L21+8
- 224 0034 FFF7FEFF bl sprintf
- 225 .LVL16:
- 83:Src/File_Handling.c **** Send_Uart(buf);
- 226 .loc 1 83 16 view .LVU40
- 84:Src/File_Handling.c **** free(buf);
- 227 .loc 1 84 16 view .LVU41
- 228 0038 2846 mov r0, r5
- 229 003a FFF7FEFF bl free
- 230 .LVL17:
- 231 .L15:
- 232 .loc 1 84 16 is_stmt 0 view .LVU42
- 233 .LBE2:
- 62:Src/File_Handling.c **** {
- 234 .loc 1 62 9 is_stmt 1 view .LVU43
- 64:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 235 .loc 1 64 13 view .LVU44
- 64:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 236 .loc 1 64 23 is_stmt 0 view .LVU45
- 237 003e 2149 ldr r1, .L21+12
- 238 0040 6846 mov r0, sp
- 239 0042 FFF7FEFF bl f_readdir
- 240 .LVL18:
- 64:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 241 .loc 1 64 21 discriminator 1 view .LVU46
- 242 0046 1C4B ldr r3, .L21
- 243 0048 1870 strb r0, [r3]
- 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 244 .loc 1 65 13 is_stmt 1 view .LVU47
- 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 245 .loc 1 65 16 is_stmt 0 view .LVU48
- 246 004a 58BB cbnz r0, .L17
- 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 247 .loc 1 65 46 discriminator 1 view .LVU49
- 248 004c 1D4B ldr r3, .L21+12
- 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2
- ARM GAS /tmp/ccnfjbri.s page 7
-
-
- 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 250 .loc 1 65 34 discriminator 1 view .LVU50
- 251 0050 43B3 cbz r3, .L17
- 66:Src/File_Handling.c **** {
- 252 .loc 1 66 13 is_stmt 1 view .LVU51
- 66:Src/File_Handling.c **** {
- 253 .loc 1 66 20 is_stmt 0 view .LVU52
- 254 0052 1C4B ldr r3, .L21+12
- 255 0054 1B7A ldrb r3, [r3, #8] @ zero_extendqisi2
- 66:Src/File_Handling.c **** {
- 256 .loc 1 66 16 view .LVU53
- 257 0056 13F0100F tst r3, #16
- 258 005a E4D0 beq .L18
- 259 .LBB3:
- 68:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 260 .loc 1 68 14 is_stmt 1 view .LVU54
- 68:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 261 .loc 1 68 20 is_stmt 0 view .LVU55
- 262 005c 1749 ldr r1, .L21+4
- 263 005e 1A48 ldr r0, .L21+16
- 264 0060 FFF7FEFF bl strcmp
- 265 .LVL19:
- 68:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 266 .loc 1 68 17 discriminator 1 view .LVU56
- 267 0064 0028 cmp r0, #0
- 268 0066 EAD0 beq .L15
- 69:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname);
- 269 .loc 1 69 14 is_stmt 1 view .LVU57
- 69:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname);
- 270 .loc 1 69 26 is_stmt 0 view .LVU58
- 271 0068 1E20 movs r0, #30
- 272 006a FFF7FEFF bl malloc
- 273 .LVL20:
- 274 006e 0546 mov r5, r0
- 275 .LVL21:
- 70:Src/File_Handling.c **** Send_Uart(buf);
- 276 .loc 1 70 14 is_stmt 1 view .LVU59
- 277 0070 124E ldr r6, .L21+4
- 278 0072 3246 mov r2, r6
- 279 0074 1549 ldr r1, .L21+20
- 280 0076 FFF7FEFF bl sprintf
- 281 .LVL22:
- 71:Src/File_Handling.c **** free(buf);
- 282 .loc 1 71 14 view .LVU60
- 72:Src/File_Handling.c **** i = strlen(path);
- 283 .loc 1 72 14 view .LVU61
- 284 007a 2846 mov r0, r5
- 285 007c FFF7FEFF bl free
- 286 .LVL23:
- 73:Src/File_Handling.c **** sprintf(&path[i], "/%s", fno.fname);
- 287 .loc 1 73 17 view .LVU62
- 73:Src/File_Handling.c **** sprintf(&path[i], "/%s", fno.fname);
- 288 .loc 1 73 21 is_stmt 0 view .LVU63
- 289 0080 2046 mov r0, r4
- 290 0082 FFF7FEFF bl strlen
- 291 .LVL24:
- 292 0086 0546 mov r5, r0
- ARM GAS /tmp/ccnfjbri.s page 8
-
-
- 293 .LVL25:
- 74:Src/File_Handling.c **** fresult = Scan_SD(path); /* Enter the directory */
- 294 .loc 1 74 17 is_stmt 1 view .LVU64
- 295 0088 3246 mov r2, r6
- 296 008a 1149 ldr r1, .L21+24
- 297 008c 2018 adds r0, r4, r0
- 298 .LVL26:
- 74:Src/File_Handling.c **** fresult = Scan_SD(path); /* Enter the directory */
- 299 .loc 1 74 17 is_stmt 0 view .LVU65
- 300 008e FFF7FEFF bl sprintf
- 301 .LVL27:
- 75:Src/File_Handling.c **** if (fresult != FR_OK) break;
- 302 .loc 1 75 17 is_stmt 1 view .LVU66
- 75:Src/File_Handling.c **** if (fresult != FR_OK) break;
- 303 .loc 1 75 27 is_stmt 0 view .LVU67
- 304 0092 2046 mov r0, r4
- 305 0094 FFF7FEFF bl Scan_SD
- 306 .LVL28:
- 75:Src/File_Handling.c **** if (fresult != FR_OK) break;
- 307 .loc 1 75 25 discriminator 1 view .LVU68
- 308 0098 074B ldr r3, .L21
- 309 009a 1870 strb r0, [r3]
- 76:Src/File_Handling.c **** path[i] = 0;
- 310 .loc 1 76 17 is_stmt 1 view .LVU69
- 76:Src/File_Handling.c **** path[i] = 0;
- 311 .loc 1 76 20 is_stmt 0 view .LVU70
- 312 009c 10B9 cbnz r0, .L17
- 77:Src/File_Handling.c **** }
- 313 .loc 1 77 17 is_stmt 1 view .LVU71
- 77:Src/File_Handling.c **** }
- 314 .loc 1 77 25 is_stmt 0 view .LVU72
- 315 009e 0023 movs r3, #0
- 316 00a0 6355 strb r3, [r4, r5]
- 317 .LBE3:
- 318 00a2 CCE7 b .L15
- 319 .LVL29:
- 320 .L17:
- 85:Src/File_Handling.c **** }
- 86:Src/File_Handling.c **** }
- 87:Src/File_Handling.c **** f_closedir(&dir);
- 321 .loc 1 87 9 is_stmt 1 view .LVU73
- 322 00a4 6846 mov r0, sp
- 323 00a6 FFF7FEFF bl f_closedir
- 324 .LVL30:
- 325 .L16:
- 88:Src/File_Handling.c **** }
- 89:Src/File_Handling.c **** free(path);
- 326 .loc 1 89 5 view .LVU74
- 327 00aa 2046 mov r0, r4
- 328 00ac FFF7FEFF bl free
- 329 .LVL31:
- 90:Src/File_Handling.c **** return fresult;
- 330 .loc 1 90 5 view .LVU75
- 91:Src/File_Handling.c **** }
- 331 .loc 1 91 1 is_stmt 0 view .LVU76
- 332 00b0 014B ldr r3, .L21
- 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2
- ARM GAS /tmp/ccnfjbri.s page 9
-
-
- 334 00b4 0CB0 add sp, sp, #48
- 335 .LCFI4:
- 336 .cfi_def_cfa_offset 16
- 337 @ sp needed
- 338 00b6 70BD pop {r4, r5, r6, pc}
- 339 .LVL32:
- 340 .L22:
- 341 .loc 1 91 1 view .LVU77
- 342 .align 2
- 343 .L21:
- 344 00b8 00000000 .word fresult
- 345 00bc 09000000 .word fno+9
- 346 00c0 1C000000 .word .LC3
- 347 00c4 00000000 .word fno
- 348 00c8 00000000 .word .LC0
- 349 00cc 0C000000 .word .LC1
- 350 00d0 18000000 .word .LC2
- 351 .cfi_endproc
- 352 .LFE1189:
- 354 .section .rodata.Format_SD.str1.4,"aMS",%progbits,1
- 355 .align 2
- 356 .LC4:
- 357 0000 2F00 .ascii "/\000"
- 358 .section .text.Format_SD,"ax",%progbits
- 359 .align 1
- 360 .global Format_SD
- 361 .syntax unified
- 362 .thumb
- 363 .thumb_func
- 365 Format_SD:
- 366 .LFB1190:
- 92:Src/File_Handling.c ****
- 93:Src/File_Handling.c **** /* Only supports removing files from home directory */
- 94:Src/File_Handling.c **** FRESULT Format_SD (void)
- 95:Src/File_Handling.c **** {
- 367 .loc 1 95 1 is_stmt 1 view -0
- 368 .cfi_startproc
- 369 @ args = 0, pretend = 0, frame = 48
- 370 @ frame_needed = 0, uses_anonymous_args = 0
- 371 0000 10B5 push {r4, lr}
- 372 .LCFI5:
- 373 .cfi_def_cfa_offset 8
- 374 .cfi_offset 4, -8
- 375 .cfi_offset 14, -4
- 376 0002 8CB0 sub sp, sp, #48
- 377 .LCFI6:
- 378 .cfi_def_cfa_offset 56
- 96:Src/File_Handling.c **** DIR dir;
- 379 .loc 1 96 5 view .LVU79
- 97:Src/File_Handling.c **** char *path = malloc(20*sizeof (char));
- 380 .loc 1 97 5 view .LVU80
- 381 .loc 1 97 18 is_stmt 0 view .LVU81
- 382 0004 1420 movs r0, #20
- 383 0006 FFF7FEFF bl malloc
- 384 .LVL33:
- 385 000a 0446 mov r4, r0
- 386 .LVL34:
- ARM GAS /tmp/ccnfjbri.s page 10
-
-
- 98:Src/File_Handling.c **** sprintf (path, "%s","/");
- 387 .loc 1 98 5 is_stmt 1 view .LVU82
- 388 000c 1A4B ldr r3, .L30
- 389 000e 1B88 ldrh r3, [r3] @ unaligned
- 390 0010 0380 strh r3, [r0] @ unaligned
- 99:Src/File_Handling.c ****
- 100:Src/File_Handling.c **** fresult = f_opendir(&dir, path); /* Open the directory */
- 391 .loc 1 100 5 view .LVU83
- 392 .loc 1 100 15 is_stmt 0 view .LVU84
- 393 0012 0146 mov r1, r0
- 394 0014 6846 mov r0, sp
- 395 .LVL35:
- 396 .loc 1 100 15 view .LVU85
- 397 0016 FFF7FEFF bl f_opendir
- 398 .LVL36:
- 399 .loc 1 100 13 discriminator 1 view .LVU86
- 400 001a 184B ldr r3, .L30+4
- 401 001c 1870 strb r0, [r3]
- 101:Src/File_Handling.c **** if (fresult == FR_OK)
- 402 .loc 1 101 5 is_stmt 1 view .LVU87
- 403 .loc 1 101 8 is_stmt 0 view .LVU88
- 404 001e 18BB cbnz r0, .L25
- 405 0020 04E0 b .L24
- 406 .L27:
- 102:Src/File_Handling.c **** {
- 103:Src/File_Handling.c **** for (;;)
- 104:Src/File_Handling.c **** {
- 105:Src/File_Handling.c **** fresult = f_readdir(&dir, &fno); /* Read a directory item */
- 106:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 107:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 108:Src/File_Handling.c **** {
- 109:Src/File_Handling.c **** if (!(strcmp ("SYSTEM~1", fno.fname))) continue;
- 110:Src/File_Handling.c **** fresult = f_unlink(fno.fname);
- 111:Src/File_Handling.c **** if (fresult == FR_DENIED) continue;
- 112:Src/File_Handling.c **** }
- 113:Src/File_Handling.c **** else
- 114:Src/File_Handling.c **** { /* It is a file. */
- 115:Src/File_Handling.c **** fresult = f_unlink(fno.fname);
- 407 .loc 1 115 16 is_stmt 1 view .LVU89
- 408 .loc 1 115 26 is_stmt 0 view .LVU90
- 409 0022 1748 ldr r0, .L30+8
- 410 0024 FFF7FEFF bl f_unlink
- 411 .LVL37:
- 412 .loc 1 115 24 discriminator 1 view .LVU91
- 413 0028 144B ldr r3, .L30+4
- 414 002a 1870 strb r0, [r3]
- 415 .L24:
- 103:Src/File_Handling.c **** {
- 416 .loc 1 103 9 is_stmt 1 view .LVU92
- 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 417 .loc 1 105 13 view .LVU93
- 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 418 .loc 1 105 23 is_stmt 0 view .LVU94
- 419 002c 1549 ldr r1, .L30+12
- 420 002e 6846 mov r0, sp
- 421 0030 FFF7FEFF bl f_readdir
- 422 .LVL38:
- ARM GAS /tmp/ccnfjbri.s page 11
-
-
- 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
- 423 .loc 1 105 21 discriminator 1 view .LVU95
- 424 0034 114B ldr r3, .L30+4
- 425 0036 1870 strb r0, [r3]
- 106:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 426 .loc 1 106 13 is_stmt 1 view .LVU96
- 106:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 427 .loc 1 106 16 is_stmt 0 view .LVU97
- 428 0038 98B9 cbnz r0, .L26
- 106:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 429 .loc 1 106 46 discriminator 1 view .LVU98
- 430 003a 124B ldr r3, .L30+12
- 431 003c 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2
- 106:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
- 432 .loc 1 106 34 discriminator 1 view .LVU99
- 433 003e 83B1 cbz r3, .L26
- 107:Src/File_Handling.c **** {
- 434 .loc 1 107 13 is_stmt 1 view .LVU100
- 107:Src/File_Handling.c **** {
- 435 .loc 1 107 20 is_stmt 0 view .LVU101
- 436 0040 104B ldr r3, .L30+12
- 437 0042 1B7A ldrb r3, [r3, #8] @ zero_extendqisi2
- 107:Src/File_Handling.c **** {
- 438 .loc 1 107 16 view .LVU102
- 439 0044 13F0100F tst r3, #16
- 440 0048 EBD0 beq .L27
- 109:Src/File_Handling.c **** fresult = f_unlink(fno.fname);
- 441 .loc 1 109 14 is_stmt 1 view .LVU103
- 109:Src/File_Handling.c **** fresult = f_unlink(fno.fname);
- 442 .loc 1 109 20 is_stmt 0 view .LVU104
- 443 004a 0D49 ldr r1, .L30+8
- 444 004c 0E48 ldr r0, .L30+16
- 445 004e FFF7FEFF bl strcmp
- 446 .LVL39:
- 109:Src/File_Handling.c **** fresult = f_unlink(fno.fname);
- 447 .loc 1 109 17 discriminator 1 view .LVU105
- 448 0052 0028 cmp r0, #0
- 449 0054 EAD0 beq .L24
- 110:Src/File_Handling.c **** if (fresult == FR_DENIED) continue;
- 450 .loc 1 110 14 is_stmt 1 view .LVU106
- 110:Src/File_Handling.c **** if (fresult == FR_DENIED) continue;
- 451 .loc 1 110 24 is_stmt 0 view .LVU107
- 452 0056 0A48 ldr r0, .L30+8
- 453 0058 FFF7FEFF bl f_unlink
- 454 .LVL40:
- 110:Src/File_Handling.c **** if (fresult == FR_DENIED) continue;
- 455 .loc 1 110 22 discriminator 1 view .LVU108
- 456 005c 074B ldr r3, .L30+4
- 457 005e 1870 strb r0, [r3]
- 111:Src/File_Handling.c **** }
- 458 .loc 1 111 14 is_stmt 1 view .LVU109
- 111:Src/File_Handling.c **** }
- 459 .loc 1 111 40 discriminator 1 view .LVU110
- 460 0060 E4E7 b .L24
- 461 .L26:
- 116:Src/File_Handling.c **** }
- 117:Src/File_Handling.c **** }
- ARM GAS /tmp/ccnfjbri.s page 12
-
-
- 118:Src/File_Handling.c **** f_closedir(&dir);
- 462 .loc 1 118 9 view .LVU111
- 463 0062 6846 mov r0, sp
- 464 0064 FFF7FEFF bl f_closedir
- 465 .LVL41:
- 466 .L25:
- 119:Src/File_Handling.c **** }
- 120:Src/File_Handling.c **** free(path);
- 467 .loc 1 120 5 view .LVU112
- 468 0068 2046 mov r0, r4
- 469 006a FFF7FEFF bl free
- 470 .LVL42:
- 121:Src/File_Handling.c **** return fresult;
- 471 .loc 1 121 5 view .LVU113
- 122:Src/File_Handling.c **** }
- 472 .loc 1 122 1 is_stmt 0 view .LVU114
- 473 006e 034B ldr r3, .L30+4
- 474 0070 1878 ldrb r0, [r3] @ zero_extendqisi2
- 475 0072 0CB0 add sp, sp, #48
- 476 .LCFI7:
- 477 .cfi_def_cfa_offset 8
- 478 @ sp needed
- 479 0074 10BD pop {r4, pc}
- 480 .LVL43:
- 481 .L31:
- 482 .loc 1 122 1 view .LVU115
- 483 0076 00BF .align 2
- 484 .L30:
- 485 0078 00000000 .word .LC4
- 486 007c 00000000 .word fresult
- 487 0080 09000000 .word fno+9
- 488 0084 00000000 .word fno
- 489 0088 00000000 .word .LC0
- 490 .cfi_endproc
- 491 .LFE1190:
- 493 .section .text.Write_File,"ax",%progbits
- 494 .align 1
- 495 .global Write_File
- 496 .syntax unified
- 497 .thumb
- 498 .thumb_func
- 500 Write_File:
- 501 .LVL44:
- 502 .LFB1191:
- 123:Src/File_Handling.c ****
- 124:Src/File_Handling.c ****
- 125:Src/File_Handling.c ****
- 126:Src/File_Handling.c ****
- 127:Src/File_Handling.c **** FRESULT Write_File (char *name, char *data)
- 128:Src/File_Handling.c **** {
- 503 .loc 1 128 1 is_stmt 1 view -0
- 504 .cfi_startproc
- 505 @ args = 0, pretend = 0, frame = 0
- 506 @ frame_needed = 0, uses_anonymous_args = 0
- 507 .loc 1 128 1 is_stmt 0 view .LVU117
- 508 0000 70B5 push {r4, r5, r6, lr}
- 509 .LCFI8:
- ARM GAS /tmp/ccnfjbri.s page 13
-
-
- 510 .cfi_def_cfa_offset 16
- 511 .cfi_offset 4, -16
- 512 .cfi_offset 5, -12
- 513 .cfi_offset 6, -8
- 514 .cfi_offset 14, -4
- 515 0002 0446 mov r4, r0
- 516 0004 0D46 mov r5, r1
- 129:Src/File_Handling.c ****
- 130:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 131:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 517 .loc 1 131 2 is_stmt 1 view .LVU118
- 518 .loc 1 131 12 is_stmt 0 view .LVU119
- 519 0006 1249 ldr r1, .L37
- 520 .LVL45:
- 521 .loc 1 131 12 view .LVU120
- 522 0008 FFF7FEFF bl f_stat
- 523 .LVL46:
- 524 .loc 1 131 10 discriminator 1 view .LVU121
- 525 000c 114B ldr r3, .L37+4
- 526 000e 1870 strb r0, [r3]
- 132:Src/File_Handling.c **** if (fresult != FR_OK)
- 527 .loc 1 132 2 is_stmt 1 view .LVU122
- 528 .loc 1 132 5 is_stmt 0 view .LVU123
- 529 0010 08B1 cbz r0, .L33
- 530 .LBB4:
- 133:Src/File_Handling.c **** {
- 134:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 531 .loc 1 134 3 is_stmt 1 view .LVU124
- 135:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 136:Src/File_Handling.c **** //Send_Uart (buf);
- 137:Src/File_Handling.c **** free(buf);
- 532 .loc 1 137 6 view .LVU125
- 138:Src/File_Handling.c **** return fresult;
- 533 .loc 1 138 6 view .LVU126
- 534 .loc 1 138 13 is_stmt 0 view .LVU127
- 535 0012 C0B2 uxtb r0, r0
- 536 .LVL47:
- 537 .L34:
- 538 .loc 1 138 13 view .LVU128
- 539 .LBE4:
- 139:Src/File_Handling.c **** }
- 140:Src/File_Handling.c ****
- 141:Src/File_Handling.c **** else
- 142:Src/File_Handling.c **** {
- 143:Src/File_Handling.c **** /* Create a file with read write access and open it */
- 144:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_EXISTING | FA_WRITE);
- 145:Src/File_Handling.c **** if (fresult != FR_OK)
- 146:Src/File_Handling.c **** {
- 147:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 148:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 149:Src/File_Handling.c **** //Send_Uart(buf);
- 150:Src/File_Handling.c **** free(buf);
- 151:Src/File_Handling.c **** return fresult;
- 152:Src/File_Handling.c **** }
- 153:Src/File_Handling.c ****
- 154:Src/File_Handling.c **** else
- 155:Src/File_Handling.c **** {
- ARM GAS /tmp/ccnfjbri.s page 14
-
-
- 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw);
- 157:Src/File_Handling.c **** if (fresult != FR_OK)
- 158:Src/File_Handling.c **** {
- 159:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 160:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- 161:Src/File_Handling.c **** //Send_Uart(buf);
- 162:Src/File_Handling.c **** free(buf);
- 163:Src/File_Handling.c **** }
- 164:Src/File_Handling.c ****
- 165:Src/File_Handling.c **** /* Close file */
- 166:Src/File_Handling.c **** fresult = f_close(&fil);
- 167:Src/File_Handling.c **** if (fresult != FR_OK)
- 168:Src/File_Handling.c **** {
- 169:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 170:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s* after writing it\n\n", fresult, name);
- 171:Src/File_Handling.c **** //Send_Uart(buf);
- 172:Src/File_Handling.c **** free(buf);
- 173:Src/File_Handling.c **** }
- 174:Src/File_Handling.c **** else
- 175:Src/File_Handling.c **** {
- 176:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 177:Src/File_Handling.c **** //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- 178:Src/File_Handling.c **** //Send_Uart(buf);
- 179:Src/File_Handling.c **** free(buf);
- 180:Src/File_Handling.c **** }
- 181:Src/File_Handling.c **** }
- 182:Src/File_Handling.c **** return fresult;
- 183:Src/File_Handling.c **** }
- 184:Src/File_Handling.c **** }
- 540 .loc 1 184 1 view .LVU129
- 541 0014 70BD pop {r4, r5, r6, pc}
- 542 .LVL48:
- 543 .L33:
- 144:Src/File_Handling.c **** if (fresult != FR_OK)
- 544 .loc 1 144 6 is_stmt 1 view .LVU130
- 144:Src/File_Handling.c **** if (fresult != FR_OK)
- 545 .loc 1 144 16 is_stmt 0 view .LVU131
- 546 0016 0222 movs r2, #2
- 547 0018 2146 mov r1, r4
- 548 001a 0F48 ldr r0, .L37+8
- 549 001c FFF7FEFF bl f_open
- 550 .LVL49:
- 144:Src/File_Handling.c **** if (fresult != FR_OK)
- 551 .loc 1 144 14 discriminator 1 view .LVU132
- 552 0020 0C4B ldr r3, .L37+4
- 553 0022 1870 strb r0, [r3]
- 145:Src/File_Handling.c **** {
- 554 .loc 1 145 6 is_stmt 1 view .LVU133
- 145:Src/File_Handling.c **** {
- 555 .loc 1 145 9 is_stmt 0 view .LVU134
- 556 0024 08B1 cbz r0, .L35
- 557 .LBB5:
- 147:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 558 .loc 1 147 7 is_stmt 1 view .LVU135
- 150:Src/File_Handling.c **** return fresult;
- 559 .loc 1 150 10 view .LVU136
- 151:Src/File_Handling.c **** }
- ARM GAS /tmp/ccnfjbri.s page 15
-
-
- 560 .loc 1 151 10 view .LVU137
- 151:Src/File_Handling.c **** }
- 561 .loc 1 151 17 is_stmt 0 view .LVU138
- 562 0026 C0B2 uxtb r0, r0
- 563 0028 F4E7 b .L34
- 564 .L35:
- 565 .LBE5:
- 156:Src/File_Handling.c **** if (fresult != FR_OK)
- 566 .loc 1 156 7 is_stmt 1 view .LVU139
- 156:Src/File_Handling.c **** if (fresult != FR_OK)
- 567 .loc 1 156 17 is_stmt 0 view .LVU140
- 568 002a 2846 mov r0, r5
- 569 002c FFF7FEFF bl strlen
- 570 .LVL50:
- 571 0030 0246 mov r2, r0
- 156:Src/File_Handling.c **** if (fresult != FR_OK)
- 572 .loc 1 156 17 discriminator 1 view .LVU141
- 573 0032 094E ldr r6, .L37+8
- 574 0034 094B ldr r3, .L37+12
- 575 0036 2946 mov r1, r5
- 576 0038 3046 mov r0, r6
- 577 003a FFF7FEFF bl f_write
- 578 .LVL51:
- 156:Src/File_Handling.c **** if (fresult != FR_OK)
- 579 .loc 1 156 15 discriminator 2 view .LVU142
- 580 003e 054C ldr r4, .L37+4
- 581 .LVL52:
- 156:Src/File_Handling.c **** if (fresult != FR_OK)
- 582 .loc 1 156 15 discriminator 2 view .LVU143
- 583 0040 2070 strb r0, [r4]
- 157:Src/File_Handling.c **** {
- 584 .loc 1 157 7 is_stmt 1 view .LVU144
- 159:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- 585 .loc 1 159 8 view .LVU145
- 162:Src/File_Handling.c **** }
- 586 .loc 1 162 8 view .LVU146
- 166:Src/File_Handling.c **** if (fresult != FR_OK)
- 587 .loc 1 166 7 view .LVU147
- 166:Src/File_Handling.c **** if (fresult != FR_OK)
- 588 .loc 1 166 17 is_stmt 0 view .LVU148
- 589 0042 3046 mov r0, r6
- 590 0044 FFF7FEFF bl f_close
- 591 .LVL53:
- 166:Src/File_Handling.c **** if (fresult != FR_OK)
- 592 .loc 1 166 15 discriminator 1 view .LVU149
- 593 0048 2070 strb r0, [r4]
- 167:Src/File_Handling.c **** {
- 594 .loc 1 167 7 is_stmt 1 view .LVU150
- 176:Src/File_Handling.c **** //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- 595 .loc 1 176 8 view .LVU151
- 179:Src/File_Handling.c **** }
- 596 .loc 1 179 8 view .LVU152
- 182:Src/File_Handling.c **** }
- 597 .loc 1 182 6 view .LVU153
- 182:Src/File_Handling.c **** }
- 598 .loc 1 182 13 is_stmt 0 view .LVU154
- 599 004a C0B2 uxtb r0, r0
- ARM GAS /tmp/ccnfjbri.s page 16
-
-
- 600 004c E2E7 b .L34
- 601 .L38:
- 602 004e 00BF .align 2
- 603 .L37:
- 604 0050 00000000 .word fno
- 605 0054 00000000 .word fresult
- 606 0058 00000000 .word fil
- 607 005c 00000000 .word bw
- 608 .cfi_endproc
- 609 .LFE1191:
- 611 .section .text.Write_File_byte,"ax",%progbits
- 612 .align 1
- 613 .global Write_File_byte
- 614 .syntax unified
- 615 .thumb
- 616 .thumb_func
- 618 Write_File_byte:
- 619 .LVL54:
- 620 .LFB1192:
- 185:Src/File_Handling.c ****
- 186:Src/File_Handling.c **** FRESULT Write_File_byte (char *name, uint8_t *data, unsigned int bytesize)
- 187:Src/File_Handling.c **** {
- 621 .loc 1 187 1 is_stmt 1 view -0
- 622 .cfi_startproc
- 623 @ args = 0, pretend = 0, frame = 0
- 624 @ frame_needed = 0, uses_anonymous_args = 0
- 625 .loc 1 187 1 is_stmt 0 view .LVU156
- 626 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 627 .LCFI9:
- 628 .cfi_def_cfa_offset 24
- 629 .cfi_offset 3, -24
- 630 .cfi_offset 4, -20
- 631 .cfi_offset 5, -16
- 632 .cfi_offset 6, -12
- 633 .cfi_offset 7, -8
- 634 .cfi_offset 14, -4
- 635 0002 0446 mov r4, r0
- 636 0004 0D46 mov r5, r1
- 637 0006 1646 mov r6, r2
- 188:Src/File_Handling.c ****
- 189:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 190:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 638 .loc 1 190 2 is_stmt 1 view .LVU157
- 639 .loc 1 190 12 is_stmt 0 view .LVU158
- 640 0008 1049 ldr r1, .L44
- 641 .LVL55:
- 642 .loc 1 190 12 view .LVU159
- 643 000a FFF7FEFF bl f_stat
- 644 .LVL56:
- 645 .loc 1 190 10 discriminator 1 view .LVU160
- 646 000e 104B ldr r3, .L44+4
- 647 0010 1870 strb r0, [r3]
- 191:Src/File_Handling.c **** if (fresult != FR_OK)
- 648 .loc 1 191 2 is_stmt 1 view .LVU161
- 649 .loc 1 191 5 is_stmt 0 view .LVU162
- 650 0012 08B1 cbz r0, .L40
- 651 .LBB6:
- ARM GAS /tmp/ccnfjbri.s page 17
-
-
- 192:Src/File_Handling.c **** {
- 193:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 652 .loc 1 193 3 is_stmt 1 view .LVU163
- 194:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 195:Src/File_Handling.c **** //Send_Uart (buf);
- 196:Src/File_Handling.c **** free(buf);
- 653 .loc 1 196 6 view .LVU164
- 197:Src/File_Handling.c **** return fresult;
- 654 .loc 1 197 6 view .LVU165
- 655 .loc 1 197 13 is_stmt 0 view .LVU166
- 656 0014 C0B2 uxtb r0, r0
- 657 .LVL57:
- 658 .L41:
- 659 .loc 1 197 13 view .LVU167
- 660 .LBE6:
- 198:Src/File_Handling.c **** }
- 199:Src/File_Handling.c ****
- 200:Src/File_Handling.c **** else
- 201:Src/File_Handling.c **** {
- 202:Src/File_Handling.c **** /* Create a file with read write access and open it */
- 203:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_EXISTING | FA_WRITE);
- 204:Src/File_Handling.c **** if (fresult != FR_OK)
- 205:Src/File_Handling.c **** {
- 206:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 207:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 208:Src/File_Handling.c **** //Send_Uart(buf);
- 209:Src/File_Handling.c **** free(buf);
- 210:Src/File_Handling.c **** return fresult;
- 211:Src/File_Handling.c **** }
- 212:Src/File_Handling.c ****
- 213:Src/File_Handling.c **** else
- 214:Src/File_Handling.c **** {
- 215:Src/File_Handling.c **** fresult = f_write(&fil, data, bytesize, &bw);
- 216:Src/File_Handling.c **** if (fresult != FR_OK)
- 217:Src/File_Handling.c **** {
- 218:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 219:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- 220:Src/File_Handling.c **** //Send_Uart(buf);
- 221:Src/File_Handling.c **** free(buf);
- 222:Src/File_Handling.c **** }
- 223:Src/File_Handling.c ****
- 224:Src/File_Handling.c **** /* Close file */
- 225:Src/File_Handling.c **** fresult = f_close(&fil);
- 226:Src/File_Handling.c **** if (fresult != FR_OK)
- 227:Src/File_Handling.c **** {
- 228:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 229:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s* after writing it\n\n", fresult, name);
- 230:Src/File_Handling.c **** //Send_Uart(buf);
- 231:Src/File_Handling.c **** free(buf);
- 232:Src/File_Handling.c **** }
- 233:Src/File_Handling.c **** else
- 234:Src/File_Handling.c **** {
- 235:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 236:Src/File_Handling.c **** //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- 237:Src/File_Handling.c **** //Send_Uart(buf);
- 238:Src/File_Handling.c **** free(buf);
- 239:Src/File_Handling.c **** }
- ARM GAS /tmp/ccnfjbri.s page 18
-
-
- 240:Src/File_Handling.c **** }
- 241:Src/File_Handling.c **** return fresult;
- 242:Src/File_Handling.c **** }
- 243:Src/File_Handling.c **** }
- 661 .loc 1 243 1 view .LVU168
- 662 0016 F8BD pop {r3, r4, r5, r6, r7, pc}
- 663 .LVL58:
- 664 .L40:
- 203:Src/File_Handling.c **** if (fresult != FR_OK)
- 665 .loc 1 203 6 is_stmt 1 view .LVU169
- 203:Src/File_Handling.c **** if (fresult != FR_OK)
- 666 .loc 1 203 16 is_stmt 0 view .LVU170
- 667 0018 0222 movs r2, #2
- 668 001a 2146 mov r1, r4
- 669 001c 0D48 ldr r0, .L44+8
- 670 001e FFF7FEFF bl f_open
- 671 .LVL59:
- 203:Src/File_Handling.c **** if (fresult != FR_OK)
- 672 .loc 1 203 14 discriminator 1 view .LVU171
- 673 0022 0B4B ldr r3, .L44+4
- 674 0024 1870 strb r0, [r3]
- 204:Src/File_Handling.c **** {
- 675 .loc 1 204 6 is_stmt 1 view .LVU172
- 204:Src/File_Handling.c **** {
- 676 .loc 1 204 9 is_stmt 0 view .LVU173
- 677 0026 08B1 cbz r0, .L42
- 678 .LBB7:
- 206:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 679 .loc 1 206 7 is_stmt 1 view .LVU174
- 209:Src/File_Handling.c **** return fresult;
- 680 .loc 1 209 10 view .LVU175
- 210:Src/File_Handling.c **** }
- 681 .loc 1 210 10 view .LVU176
- 210:Src/File_Handling.c **** }
- 682 .loc 1 210 17 is_stmt 0 view .LVU177
- 683 0028 C0B2 uxtb r0, r0
- 684 002a F4E7 b .L41
- 685 .L42:
- 686 .LBE7:
- 215:Src/File_Handling.c **** if (fresult != FR_OK)
- 687 .loc 1 215 7 is_stmt 1 view .LVU178
- 215:Src/File_Handling.c **** if (fresult != FR_OK)
- 688 .loc 1 215 17 is_stmt 0 view .LVU179
- 689 002c 094F ldr r7, .L44+8
- 690 002e 0A4B ldr r3, .L44+12
- 691 0030 3246 mov r2, r6
- 692 0032 2946 mov r1, r5
- 693 0034 3846 mov r0, r7
- 694 0036 FFF7FEFF bl f_write
- 695 .LVL60:
- 215:Src/File_Handling.c **** if (fresult != FR_OK)
- 696 .loc 1 215 15 discriminator 1 view .LVU180
- 697 003a 054C ldr r4, .L44+4
- 698 .LVL61:
- 215:Src/File_Handling.c **** if (fresult != FR_OK)
- 699 .loc 1 215 15 discriminator 1 view .LVU181
- 700 003c 2070 strb r0, [r4]
- ARM GAS /tmp/ccnfjbri.s page 19
-
-
- 216:Src/File_Handling.c **** {
- 701 .loc 1 216 7 is_stmt 1 view .LVU182
- 218:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d while writing to the FILE *%s*\n\n", fresult, name);
- 702 .loc 1 218 8 view .LVU183
- 221:Src/File_Handling.c **** }
- 703 .loc 1 221 8 view .LVU184
- 225:Src/File_Handling.c **** if (fresult != FR_OK)
- 704 .loc 1 225 7 view .LVU185
- 225:Src/File_Handling.c **** if (fresult != FR_OK)
- 705 .loc 1 225 17 is_stmt 0 view .LVU186
- 706 003e 3846 mov r0, r7
- 707 0040 FFF7FEFF bl f_close
- 708 .LVL62:
- 225:Src/File_Handling.c **** if (fresult != FR_OK)
- 709 .loc 1 225 15 discriminator 1 view .LVU187
- 710 0044 2070 strb r0, [r4]
- 226:Src/File_Handling.c **** {
- 711 .loc 1 226 7 is_stmt 1 view .LVU188
- 235:Src/File_Handling.c **** //sprintf (buf, "File *%s* is WRITTEN and CLOSED successfully\n", name);
- 712 .loc 1 235 8 view .LVU189
- 238:Src/File_Handling.c **** }
- 713 .loc 1 238 8 view .LVU190
- 241:Src/File_Handling.c **** }
- 714 .loc 1 241 6 view .LVU191
- 241:Src/File_Handling.c **** }
- 715 .loc 1 241 13 is_stmt 0 view .LVU192
- 716 0046 C0B2 uxtb r0, r0
- 717 0048 E5E7 b .L41
- 718 .L45:
- 719 004a 00BF .align 2
- 720 .L44:
- 721 004c 00000000 .word fno
- 722 0050 00000000 .word fresult
- 723 0054 00000000 .word fil
- 724 0058 00000000 .word bw
- 725 .cfi_endproc
- 726 .LFE1192:
- 728 .section .rodata.Read_File.str1.4,"aMS",%progbits,1
- 729 .align 2
- 730 .LC5:
- 731 0000 45525252 .ascii "ERRROR!!! *%s* does not exists\012\012\000"
- 731 4F522121
- 731 21202A25
- 731 732A2064
- 731 6F657320
- 732 0021 000000 .align 2
- 733 .LC6:
- 734 0024 4552524F .ascii "ERROR!!! No. %d in opening file *%s*\012\012\000"
- 734 52212121
- 734 204E6F2E
- 734 20256420
- 734 696E206F
- 735 004b 00 .align 2
- 736 .LC7:
- 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000"
- 737 52212121
- 737 204E6F2E
- ARM GAS /tmp/ccnfjbri.s page 20
-
-
- 737 20256420
- 737 696E2072
- 738 0073 00 .align 2
- 739 .LC8:
- 740 0074 4552524F .ascii "ERROR!!! No. %d in closing file *%s*\012\012\000"
- 740 52212121
- 740 204E6F2E
- 740 20256420
- 740 696E2063
- 741 009b 00 .align 2
- 742 .LC9:
- 743 009c 46696C65 .ascii "File *%s* CLOSED successfully\012\000"
- 743 202A2573
- 743 2A20434C
- 743 4F534544
- 743 20737563
- 744 .section .text.Read_File,"ax",%progbits
- 745 .align 1
- 746 .global Read_File
- 747 .syntax unified
- 748 .thumb
- 749 .thumb_func
- 751 Read_File:
- 752 .LVL63:
- 753 .LFB1193:
- 244:Src/File_Handling.c ****
- 245:Src/File_Handling.c **** FRESULT Read_File (char *name)
- 246:Src/File_Handling.c **** {
- 754 .loc 1 246 1 is_stmt 1 view -0
- 755 .cfi_startproc
- 756 @ args = 0, pretend = 0, frame = 0
- 757 @ frame_needed = 0, uses_anonymous_args = 0
- 758 .loc 1 246 1 is_stmt 0 view .LVU194
- 759 0000 70B5 push {r4, r5, r6, lr}
- 760 .LCFI10:
- 761 .cfi_def_cfa_offset 16
- 762 .cfi_offset 4, -16
- 763 .cfi_offset 5, -12
- 764 .cfi_offset 6, -8
- 765 .cfi_offset 14, -4
- 766 0002 0446 mov r4, r0
- 247:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 248:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 767 .loc 1 248 2 is_stmt 1 view .LVU195
- 768 .loc 1 248 12 is_stmt 0 view .LVU196
- 769 0004 3749 ldr r1, .L55
- 770 0006 FFF7FEFF bl f_stat
- 771 .LVL64:
- 772 .loc 1 248 10 discriminator 1 view .LVU197
- 773 000a 374B ldr r3, .L55+4
- 774 000c 1870 strb r0, [r3]
- 249:Src/File_Handling.c **** if (fresult != FR_OK)
- 775 .loc 1 249 2 is_stmt 1 view .LVU198
- 776 .loc 1 249 5 is_stmt 0 view .LVU199
- 777 000e B8B9 cbnz r0, .L54
- 778 .LBB8:
- 250:Src/File_Handling.c **** {
- ARM GAS /tmp/ccnfjbri.s page 21
-
-
- 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 252:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- 253:Src/File_Handling.c **** Send_Uart (buf);
- 254:Src/File_Handling.c **** free(buf);
- 255:Src/File_Handling.c **** return fresult;
- 256:Src/File_Handling.c **** }
- 257:Src/File_Handling.c ****
- 258:Src/File_Handling.c **** else
- 259:Src/File_Handling.c **** {
- 260:Src/File_Handling.c **** /* Open file to read */
- 261:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_READ);
- 779 .loc 1 261 3 is_stmt 1 view .LVU200
- 780 .loc 1 261 13 is_stmt 0 view .LVU201
- 781 0010 0122 movs r2, #1
- 782 0012 2146 mov r1, r4
- 783 0014 3548 ldr r0, .L55+8
- 784 0016 FFF7FEFF bl f_open
- 785 .LVL65:
- 786 001a 0546 mov r5, r0
- 787 .loc 1 261 11 discriminator 1 view .LVU202
- 788 001c 324B ldr r3, .L55+4
- 789 001e 1870 strb r0, [r3]
- 262:Src/File_Handling.c ****
- 263:Src/File_Handling.c **** if (fresult != FR_OK)
- 790 .loc 1 263 3 is_stmt 1 view .LVU203
- 791 .loc 1 263 6 is_stmt 0 view .LVU204
- 792 0020 E0B1 cbz r0, .L49
- 793 .LBB9:
- 264:Src/File_Handling.c **** {
- 265:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 794 .loc 1 265 4 is_stmt 1 view .LVU205
- 795 .loc 1 265 16 is_stmt 0 view .LVU206
- 796 0022 6420 movs r0, #100
- 797 0024 FFF7FEFF bl malloc
- 798 .LVL66:
- 799 0028 0646 mov r6, r0
- 800 .LVL67:
- 266:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 801 .loc 1 266 4 is_stmt 1 view .LVU207
- 802 002a 2346 mov r3, r4
- 803 002c 2A46 mov r2, r5
- 804 002e 3049 ldr r1, .L55+12
- 805 0030 FFF7FEFF bl sprintf
- 806 .LVL68:
- 267:Src/File_Handling.c **** Send_Uart(buf);
- 807 .loc 1 267 7 view .LVU208
- 268:Src/File_Handling.c **** free(buf);
- 808 .loc 1 268 7 view .LVU209
- 809 0034 3046 mov r0, r6
- 810 0036 FFF7FEFF bl free
- 811 .LVL69:
- 269:Src/File_Handling.c **** return fresult;
- 812 .loc 1 269 7 view .LVU210
- 813 .loc 1 269 14 is_stmt 0 view .LVU211
- 814 003a 2B4B ldr r3, .L55+4
- 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2
- 816 003e 0CE0 b .L48
- ARM GAS /tmp/ccnfjbri.s page 22
-
-
- 817 .LVL70:
- 818 .L54:
- 819 .loc 1 269 14 view .LVU212
- 820 .LBE9:
- 821 .LBE8:
- 822 .LBB13:
- 251:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- 823 .loc 1 251 3 is_stmt 1 view .LVU213
- 251:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- 824 .loc 1 251 15 is_stmt 0 view .LVU214
- 825 0040 6420 movs r0, #100
- 826 0042 FFF7FEFF bl malloc
- 827 .LVL71:
- 828 0046 0546 mov r5, r0
- 829 .LVL72:
- 252:Src/File_Handling.c **** Send_Uart (buf);
- 830 .loc 1 252 3 is_stmt 1 view .LVU215
- 831 0048 2246 mov r2, r4
- 832 004a 2A49 ldr r1, .L55+16
- 833 004c FFF7FEFF bl sprintf
- 834 .LVL73:
- 253:Src/File_Handling.c **** free(buf);
- 835 .loc 1 253 3 view .LVU216
- 254:Src/File_Handling.c **** return fresult;
- 836 .loc 1 254 3 view .LVU217
- 837 0050 2846 mov r0, r5
- 838 0052 FFF7FEFF bl free
- 839 .LVL74:
- 255:Src/File_Handling.c **** }
- 840 .loc 1 255 6 view .LVU218
- 255:Src/File_Handling.c **** }
- 841 .loc 1 255 13 is_stmt 0 view .LVU219
- 842 0056 244B ldr r3, .L55+4
- 843 0058 1878 ldrb r0, [r3] @ zero_extendqisi2
- 844 .LVL75:
- 845 .L48:
- 255:Src/File_Handling.c **** }
- 846 .loc 1 255 13 view .LVU220
- 847 .LBE13:
- 270:Src/File_Handling.c **** }
- 271:Src/File_Handling.c ****
- 272:Src/File_Handling.c **** /* Read data from the file
- 273:Src/File_Handling.c **** * see the function details for the arguments */
- 274:Src/File_Handling.c ****
- 275:Src/File_Handling.c **** char *buffer = malloc(sizeof(f_size(&fil)));
- 276:Src/File_Handling.c **** fresult = f_read (&fil, buffer, f_size(&fil), &br);
- 277:Src/File_Handling.c **** if (fresult != FR_OK)
- 278:Src/File_Handling.c **** {
- 279:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 280:Src/File_Handling.c **** free(buffer);
- 281:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- 282:Src/File_Handling.c **** Send_Uart(buffer);
- 283:Src/File_Handling.c **** free(buf);
- 284:Src/File_Handling.c **** }
- 285:Src/File_Handling.c ****
- 286:Src/File_Handling.c **** else
- 287:Src/File_Handling.c **** {
- ARM GAS /tmp/ccnfjbri.s page 23
-
-
- 288:Src/File_Handling.c **** Send_Uart(buffer);
- 289:Src/File_Handling.c **** free(buffer);
- 290:Src/File_Handling.c ****
- 291:Src/File_Handling.c **** /* Close file */
- 292:Src/File_Handling.c **** fresult = f_close(&fil);
- 293:Src/File_Handling.c **** if (fresult != FR_OK)
- 294:Src/File_Handling.c **** {
- 295:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 296:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 297:Src/File_Handling.c **** Send_Uart(buf);
- 298:Src/File_Handling.c **** free(buf);
- 299:Src/File_Handling.c **** }
- 300:Src/File_Handling.c **** else
- 301:Src/File_Handling.c **** {
- 302:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 303:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 304:Src/File_Handling.c **** Send_Uart(buf);
- 305:Src/File_Handling.c **** free(buf);
- 306:Src/File_Handling.c **** }
- 307:Src/File_Handling.c **** }
- 308:Src/File_Handling.c **** return fresult;
- 309:Src/File_Handling.c **** }
- 310:Src/File_Handling.c **** }
- 848 .loc 1 310 1 view .LVU221
- 849 005a 70BD pop {r4, r5, r6, pc}
- 850 .LVL76:
- 851 .L49:
- 852 .LBB14:
- 275:Src/File_Handling.c **** fresult = f_read (&fil, buffer, f_size(&fil), &br);
- 853 .loc 1 275 3 is_stmt 1 view .LVU222
- 275:Src/File_Handling.c **** fresult = f_read (&fil, buffer, f_size(&fil), &br);
- 854 .loc 1 275 18 is_stmt 0 view .LVU223
- 855 005c 0420 movs r0, #4
- 856 005e FFF7FEFF bl malloc
- 857 .LVL77:
- 858 0062 0546 mov r5, r0
- 859 .LVL78:
- 276:Src/File_Handling.c **** if (fresult != FR_OK)
- 860 .loc 1 276 3 is_stmt 1 view .LVU224
- 276:Src/File_Handling.c **** if (fresult != FR_OK)
- 861 .loc 1 276 35 is_stmt 0 view .LVU225
- 862 0064 2148 ldr r0, .L55+8
- 863 .LVL79:
- 276:Src/File_Handling.c **** if (fresult != FR_OK)
- 864 .loc 1 276 13 view .LVU226
- 865 0066 244B ldr r3, .L55+20
- 866 0068 C268 ldr r2, [r0, #12]
- 867 006a 2946 mov r1, r5
- 868 006c FFF7FEFF bl f_read
- 869 .LVL80:
- 276:Src/File_Handling.c **** if (fresult != FR_OK)
- 870 .loc 1 276 11 discriminator 1 view .LVU227
- 871 0070 1D4B ldr r3, .L55+4
- 872 0072 1870 strb r0, [r3]
- 277:Src/File_Handling.c **** {
- 873 .loc 1 277 3 is_stmt 1 view .LVU228
- 277:Src/File_Handling.c **** {
- ARM GAS /tmp/ccnfjbri.s page 24
-
-
- 874 .loc 1 277 6 is_stmt 0 view .LVU229
- 875 0074 98B1 cbz r0, .L50
- 876 .LBB10:
- 279:Src/File_Handling.c **** free(buffer);
- 877 .loc 1 279 4 is_stmt 1 view .LVU230
- 279:Src/File_Handling.c **** free(buffer);
- 878 .loc 1 279 16 is_stmt 0 view .LVU231
- 879 0076 6420 movs r0, #100
- 880 0078 FFF7FEFF bl malloc
- 881 .LVL81:
- 882 007c 0646 mov r6, r0
- 883 .LVL82:
- 280:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- 884 .loc 1 280 4 is_stmt 1 view .LVU232
- 885 007e 2846 mov r0, r5
- 886 .LVL83:
- 280:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- 887 .loc 1 280 4 is_stmt 0 view .LVU233
- 888 0080 FFF7FEFF bl free
- 889 .LVL84:
- 281:Src/File_Handling.c **** Send_Uart(buffer);
- 890 .loc 1 281 5 is_stmt 1 view .LVU234
- 891 0084 2346 mov r3, r4
- 892 0086 184A ldr r2, .L55+4
- 893 0088 1278 ldrb r2, [r2] @ zero_extendqisi2
- 894 008a 1C49 ldr r1, .L55+24
- 895 008c 3046 mov r0, r6
- 896 008e FFF7FEFF bl sprintf
- 897 .LVL85:
- 282:Src/File_Handling.c **** free(buf);
- 898 .loc 1 282 6 view .LVU235
- 283:Src/File_Handling.c **** }
- 899 .loc 1 283 6 view .LVU236
- 900 0092 3046 mov r0, r6
- 901 0094 FFF7FEFF bl free
- 902 .LVL86:
- 903 .L51:
- 283:Src/File_Handling.c **** }
- 904 .loc 1 283 6 is_stmt 0 view .LVU237
- 905 .LBE10:
- 308:Src/File_Handling.c **** }
- 906 .loc 1 308 6 is_stmt 1 view .LVU238
- 308:Src/File_Handling.c **** }
- 907 .loc 1 308 13 is_stmt 0 view .LVU239
- 908 0098 134B ldr r3, .L55+4
- 909 009a 1878 ldrb r0, [r3] @ zero_extendqisi2
- 910 009c DDE7 b .L48
- 911 .LVL87:
- 912 .L50:
- 288:Src/File_Handling.c **** free(buffer);
- 913 .loc 1 288 4 is_stmt 1 view .LVU240
- 289:Src/File_Handling.c ****
- 914 .loc 1 289 4 view .LVU241
- 915 009e 2846 mov r0, r5
- 916 00a0 FFF7FEFF bl free
- 917 .LVL88:
- 292:Src/File_Handling.c **** if (fresult != FR_OK)
- ARM GAS /tmp/ccnfjbri.s page 25
-
-
- 918 .loc 1 292 4 view .LVU242
- 292:Src/File_Handling.c **** if (fresult != FR_OK)
- 919 .loc 1 292 14 is_stmt 0 view .LVU243
- 920 00a4 1148 ldr r0, .L55+8
- 921 00a6 FFF7FEFF bl f_close
- 922 .LVL89:
- 923 00aa 0546 mov r5, r0
- 924 .LVL90:
- 292:Src/File_Handling.c **** if (fresult != FR_OK)
- 925 .loc 1 292 12 discriminator 1 view .LVU244
- 926 00ac 0E4B ldr r3, .L55+4
- 927 00ae 1870 strb r0, [r3]
- 293:Src/File_Handling.c **** {
- 928 .loc 1 293 4 is_stmt 1 view .LVU245
- 293:Src/File_Handling.c **** {
- 929 .loc 1 293 7 is_stmt 0 view .LVU246
- 930 00b0 60B1 cbz r0, .L52
- 931 .LBB11:
- 295:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 932 .loc 1 295 5 is_stmt 1 view .LVU247
- 295:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 933 .loc 1 295 17 is_stmt 0 view .LVU248
- 934 00b2 6420 movs r0, #100
- 935 00b4 FFF7FEFF bl malloc
- 936 .LVL91:
- 937 00b8 0646 mov r6, r0
- 938 .LVL92:
- 296:Src/File_Handling.c **** Send_Uart(buf);
- 939 .loc 1 296 5 is_stmt 1 view .LVU249
- 940 00ba 2346 mov r3, r4
- 941 00bc 2A46 mov r2, r5
- 942 00be 1049 ldr r1, .L55+28
- 943 00c0 FFF7FEFF bl sprintf
- 944 .LVL93:
- 297:Src/File_Handling.c **** free(buf);
- 945 .loc 1 297 5 view .LVU250
- 298:Src/File_Handling.c **** }
- 946 .loc 1 298 5 view .LVU251
- 947 00c4 3046 mov r0, r6
- 948 00c6 FFF7FEFF bl free
- 949 .LVL94:
- 950 .LBE11:
- 951 00ca E5E7 b .L51
- 952 .LVL95:
- 953 .L52:
- 954 .LBB12:
- 302:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 955 .loc 1 302 5 view .LVU252
- 302:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 956 .loc 1 302 17 is_stmt 0 view .LVU253
- 957 00cc 6420 movs r0, #100
- 958 00ce FFF7FEFF bl malloc
- 959 .LVL96:
- 960 00d2 0546 mov r5, r0
- 961 .LVL97:
- 303:Src/File_Handling.c **** Send_Uart(buf);
- 962 .loc 1 303 5 is_stmt 1 view .LVU254
- ARM GAS /tmp/ccnfjbri.s page 26
-
-
- 963 00d4 2246 mov r2, r4
- 964 00d6 0B49 ldr r1, .L55+32
- 965 00d8 FFF7FEFF bl sprintf
- 966 .LVL98:
- 304:Src/File_Handling.c **** free(buf);
- 967 .loc 1 304 5 view .LVU255
- 305:Src/File_Handling.c **** }
- 968 .loc 1 305 5 view .LVU256
- 969 00dc 2846 mov r0, r5
- 970 00de FFF7FEFF bl free
- 971 .LVL99:
- 972 00e2 D9E7 b .L51
- 973 .L56:
- 974 .align 2
- 975 .L55:
- 976 00e4 00000000 .word fno
- 977 00e8 00000000 .word fresult
- 978 00ec 00000000 .word fil
- 979 00f0 24000000 .word .LC6
- 980 00f4 00000000 .word .LC5
- 981 00f8 00000000 .word br
- 982 00fc 4C000000 .word .LC7
- 983 0100 74000000 .word .LC8
- 984 0104 9C000000 .word .LC9
- 985 .LBE12:
- 986 .LBE14:
- 987 .cfi_endproc
- 988 .LFE1193:
- 990 .section .rodata.Seek_Read_File.str1.4,"aMS",%progbits,1
- 991 .align 2
- 992 .LC10:
- 993 0000 4552524F .ascii "ERROR!!! Can't seek the file: *%s*\012\012\000"
- 993 52212121
- 993 2043616E
- 993 27742073
- 993 65656B20
- 994 .section .text.Seek_Read_File,"ax",%progbits
- 995 .align 1
- 996 .global Seek_Read_File
- 997 .syntax unified
- 998 .thumb
- 999 .thumb_func
- 1001 Seek_Read_File:
- 1002 .LVL100:
- 1003 .LFB1194:
- 311:Src/File_Handling.c ****
- 312:Src/File_Handling.c **** FRESULT Seek_Read_File (char *name, uint8_t *data, unsigned int bytesize, unsigned long goto_label)
- 313:Src/File_Handling.c **** {
- 1004 .loc 1 313 1 view -0
- 1005 .cfi_startproc
- 1006 @ args = 0, pretend = 0, frame = 0
- 1007 @ frame_needed = 0, uses_anonymous_args = 0
- 1008 .loc 1 313 1 is_stmt 0 view .LVU258
- 1009 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 1010 .LCFI11:
- 1011 .cfi_def_cfa_offset 24
- 1012 .cfi_offset 4, -24
- ARM GAS /tmp/ccnfjbri.s page 27
-
-
- 1013 .cfi_offset 5, -20
- 1014 .cfi_offset 6, -16
- 1015 .cfi_offset 7, -12
- 1016 .cfi_offset 8, -8
- 1017 .cfi_offset 14, -4
- 1018 0004 0446 mov r4, r0
- 1019 0006 0F46 mov r7, r1
- 1020 0008 9046 mov r8, r2
- 1021 000a 1D46 mov r5, r3
- 314:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 315:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 1022 .loc 1 315 2 is_stmt 1 view .LVU259
- 1023 .loc 1 315 12 is_stmt 0 view .LVU260
- 1024 000c 4349 ldr r1, .L70
- 1025 .LVL101:
- 1026 .loc 1 315 12 view .LVU261
- 1027 000e FFF7FEFF bl f_stat
- 1028 .LVL102:
- 1029 .loc 1 315 10 discriminator 1 view .LVU262
- 1030 0012 434B ldr r3, .L70+4
- 1031 0014 1870 strb r0, [r3]
- 316:Src/File_Handling.c **** if (fresult != FR_OK)
- 1032 .loc 1 316 2 is_stmt 1 view .LVU263
- 1033 .loc 1 316 5 is_stmt 0 view .LVU264
- 1034 0016 E8B9 cbnz r0, .L67
- 317:Src/File_Handling.c **** {
- 318:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 319:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- 320:Src/File_Handling.c **** //Send_Uart (buf);
- 321:Src/File_Handling.c **** free(buf);
- 322:Src/File_Handling.c **** return fresult;
- 323:Src/File_Handling.c **** }
- 324:Src/File_Handling.c ****
- 325:Src/File_Handling.c **** else
- 326:Src/File_Handling.c **** {
- 327:Src/File_Handling.c **** /* Open file to read */
- 328:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_READ);
- 1035 .loc 1 328 3 is_stmt 1 view .LVU265
- 1036 .loc 1 328 13 is_stmt 0 view .LVU266
- 1037 0018 0122 movs r2, #1
- 1038 001a 2146 mov r1, r4
- 1039 001c 4148 ldr r0, .L70+8
- 1040 001e FFF7FEFF bl f_open
- 1041 .LVL103:
- 1042 0022 0646 mov r6, r0
- 1043 .loc 1 328 11 discriminator 1 view .LVU267
- 1044 0024 3E4B ldr r3, .L70+4
- 1045 0026 1870 strb r0, [r3]
- 329:Src/File_Handling.c ****
- 330:Src/File_Handling.c **** if (fresult != FR_OK)
- 1046 .loc 1 330 3 is_stmt 1 view .LVU268
- 1047 .loc 1 330 6 is_stmt 0 view .LVU269
- 1048 0028 18BB cbnz r0, .L68
- 331:Src/File_Handling.c **** {
- 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 334:Src/File_Handling.c **** //Send_Uart(buf);
- ARM GAS /tmp/ccnfjbri.s page 28
-
-
- 335:Src/File_Handling.c **** free(buf);
- 336:Src/File_Handling.c **** return fresult;
- 337:Src/File_Handling.c **** }
- 338:Src/File_Handling.c ****
- 339:Src/File_Handling.c **** /* Read data from the file
- 340:Src/File_Handling.c **** * see the function details for the arguments */
- 341:Src/File_Handling.c ****
- 342:Src/File_Handling.c **** //char *buffer = malloc(sizeof(f_size(&fil)));
- 343:Src/File_Handling.c **** fresult = f_lseek (&fil, goto_label); /* Move file pointer of the file object */
- 1049 .loc 1 343 3 is_stmt 1 view .LVU270
- 1050 .loc 1 343 14 is_stmt 0 view .LVU271
- 1051 002a 2946 mov r1, r5
- 1052 002c 3D48 ldr r0, .L70+8
- 1053 002e FFF7FEFF bl f_lseek
- 1054 .LVL104:
- 1055 .loc 1 343 11 discriminator 1 view .LVU272
- 1056 0032 3B4B ldr r3, .L70+4
- 1057 0034 1870 strb r0, [r3]
- 344:Src/File_Handling.c **** if (fresult != FR_OK)
- 1058 .loc 1 344 3 is_stmt 1 view .LVU273
- 1059 .loc 1 344 6 is_stmt 0 view .LVU274
- 1060 0036 58B3 cbz r0, .L61
- 1061 .LBB15:
- 345:Src/File_Handling.c **** {
- 346:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1062 .loc 1 346 4 is_stmt 1 view .LVU275
- 1063 .loc 1 346 16 is_stmt 0 view .LVU276
- 1064 0038 6420 movs r0, #100
- 1065 003a FFF7FEFF bl malloc
- 1066 .LVL105:
- 1067 003e 0546 mov r5, r0
- 1068 .LVL106:
- 347:Src/File_Handling.c **** //free(buffer);
- 348:Src/File_Handling.c **** sprintf (buf, "ERROR!!! Can't seek the file: *%s*\n\n", name);
- 1069 .loc 1 348 5 is_stmt 1 view .LVU277
- 1070 0040 2246 mov r2, r4
- 1071 0042 3949 ldr r1, .L70+12
- 1072 0044 FFF7FEFF bl sprintf
- 1073 .LVL107:
- 349:Src/File_Handling.c **** //Send_Uart(buffer);
- 350:Src/File_Handling.c **** free(buf);
- 1074 .loc 1 350 5 view .LVU278
- 1075 0048 2846 mov r0, r5
- 1076 004a FFF7FEFF bl free
- 1077 .LVL108:
- 351:Src/File_Handling.c **** return fresult;
- 1078 .loc 1 351 4 view .LVU279
- 1079 .loc 1 351 11 is_stmt 0 view .LVU280
- 1080 004e 344B ldr r3, .L70+4
- 1081 0050 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1082 0052 0CE0 b .L59
- 1083 .LVL109:
- 1084 .L67:
- 1085 .loc 1 351 11 view .LVU281
- 1086 .LBE15:
- 1087 .LBB16:
- 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- ARM GAS /tmp/ccnfjbri.s page 29
-
-
- 1088 .loc 1 318 3 is_stmt 1 view .LVU282
- 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
- 1089 .loc 1 318 15 is_stmt 0 view .LVU283
- 1090 0054 6420 movs r0, #100
- 1091 0056 FFF7FEFF bl malloc
- 1092 .LVL110:
- 1093 005a 0546 mov r5, r0
- 1094 .LVL111:
- 319:Src/File_Handling.c **** //Send_Uart (buf);
- 1095 .loc 1 319 3 is_stmt 1 view .LVU284
- 1096 005c 2246 mov r2, r4
- 1097 005e 3349 ldr r1, .L70+16
- 1098 0060 FFF7FEFF bl sprintf
- 1099 .LVL112:
- 321:Src/File_Handling.c **** return fresult;
- 1100 .loc 1 321 3 view .LVU285
- 1101 0064 2846 mov r0, r5
- 1102 0066 FFF7FEFF bl free
- 1103 .LVL113:
- 322:Src/File_Handling.c **** }
- 1104 .loc 1 322 6 view .LVU286
- 322:Src/File_Handling.c **** }
- 1105 .loc 1 322 13 is_stmt 0 view .LVU287
- 1106 006a 2D4B ldr r3, .L70+4
- 1107 006c 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1108 .LVL114:
- 1109 .L59:
- 322:Src/File_Handling.c **** }
- 1110 .loc 1 322 13 view .LVU288
- 1111 .LBE16:
- 352:Src/File_Handling.c **** }
- 353:Src/File_Handling.c **** fresult = f_read (&fil, data, bytesize, &br);
- 354:Src/File_Handling.c **** if (fresult != FR_OK)
- 355:Src/File_Handling.c **** {
- 356:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 357:Src/File_Handling.c **** //free(buffer);
- 358:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in reading file *%s*\n\n", fresult, name);
- 359:Src/File_Handling.c **** //Send_Uart(buffer);
- 360:Src/File_Handling.c **** free(buf);
- 361:Src/File_Handling.c ****
- 362:Src/File_Handling.c **** }
- 363:Src/File_Handling.c ****
- 364:Src/File_Handling.c **** else
- 365:Src/File_Handling.c **** {
- 366:Src/File_Handling.c **** //Send_Uart(buffer);
- 367:Src/File_Handling.c **** //free(buffer);
- 368:Src/File_Handling.c **** if (goto_label==0)//Set size of file in first 4 bytes
- 369:Src/File_Handling.c **** {
- 370:Src/File_Handling.c **** sizeoffile = f_size(&fil);
- 371:Src/File_Handling.c **** data[0] = (uint8_t) (sizeoffile&0xff);
- 372:Src/File_Handling.c **** data[1] = (uint8_t) ((sizeoffile>>8)&0xff);
- 373:Src/File_Handling.c **** data[2] = (uint8_t) ((sizeoffile>>16)&0xff);
- 374:Src/File_Handling.c **** data[3] = (uint8_t) ((sizeoffile>>24)&0xff);
- 375:Src/File_Handling.c **** }
- 376:Src/File_Handling.c ****
- 377:Src/File_Handling.c **** /* Close file */
- 378:Src/File_Handling.c **** fresult = f_close(&fil);
- ARM GAS /tmp/ccnfjbri.s page 30
-
-
- 379:Src/File_Handling.c **** if (fresult != FR_OK)
- 380:Src/File_Handling.c **** {
- 381:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 382:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 383:Src/File_Handling.c **** //Send_Uart(buf);
- 384:Src/File_Handling.c **** free(buf);
- 385:Src/File_Handling.c **** }
- 386:Src/File_Handling.c **** else
- 387:Src/File_Handling.c **** {
- 388:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 389:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 390:Src/File_Handling.c **** //Send_Uart(buf);
- 391:Src/File_Handling.c **** free(buf);
- 392:Src/File_Handling.c **** }
- 393:Src/File_Handling.c **** }
- 394:Src/File_Handling.c **** return fresult;
- 395:Src/File_Handling.c **** }
- 396:Src/File_Handling.c **** }
- 1112 .loc 1 396 1 view .LVU289
- 1113 006e BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 1114 .LVL115:
- 1115 .L68:
- 1116 .LBB17:
- 332:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 1117 .loc 1 332 4 is_stmt 1 view .LVU290
- 332:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 1118 .loc 1 332 16 is_stmt 0 view .LVU291
- 1119 0072 6420 movs r0, #100
- 1120 0074 FFF7FEFF bl malloc
- 1121 .LVL116:
- 1122 0078 0546 mov r5, r0
- 1123 .LVL117:
- 333:Src/File_Handling.c **** //Send_Uart(buf);
- 1124 .loc 1 333 4 is_stmt 1 view .LVU292
- 1125 007a 2346 mov r3, r4
- 1126 007c 3246 mov r2, r6
- 1127 007e 2C49 ldr r1, .L70+20
- 1128 0080 FFF7FEFF bl sprintf
- 1129 .LVL118:
- 335:Src/File_Handling.c **** return fresult;
- 1130 .loc 1 335 7 view .LVU293
- 1131 0084 2846 mov r0, r5
- 1132 0086 FFF7FEFF bl free
- 1133 .LVL119:
- 336:Src/File_Handling.c **** }
- 1134 .loc 1 336 7 view .LVU294
- 336:Src/File_Handling.c **** }
- 1135 .loc 1 336 14 is_stmt 0 view .LVU295
- 1136 008a 254B ldr r3, .L70+4
- 1137 008c 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1138 008e EEE7 b .L59
- 1139 .LVL120:
- 1140 .L61:
- 336:Src/File_Handling.c **** }
- 1141 .loc 1 336 14 view .LVU296
- 1142 .LBE17:
- 353:Src/File_Handling.c **** if (fresult != FR_OK)
- ARM GAS /tmp/ccnfjbri.s page 31
-
-
- 1143 .loc 1 353 3 is_stmt 1 view .LVU297
- 353:Src/File_Handling.c **** if (fresult != FR_OK)
- 1144 .loc 1 353 13 is_stmt 0 view .LVU298
- 1145 0090 284B ldr r3, .L70+24
- 1146 0092 4246 mov r2, r8
- 1147 0094 3946 mov r1, r7
- 1148 0096 2348 ldr r0, .L70+8
- 1149 0098 FFF7FEFF bl f_read
- 1150 .LVL121:
- 1151 009c 0646 mov r6, r0
- 353:Src/File_Handling.c **** if (fresult != FR_OK)
- 1152 .loc 1 353 11 discriminator 1 view .LVU299
- 1153 009e 204B ldr r3, .L70+4
- 1154 00a0 1870 strb r0, [r3]
- 354:Src/File_Handling.c **** {
- 1155 .loc 1 354 3 is_stmt 1 view .LVU300
- 354:Src/File_Handling.c **** {
- 1156 .loc 1 354 6 is_stmt 0 view .LVU301
- 1157 00a2 08BB cbnz r0, .L69
- 368:Src/File_Handling.c **** {
- 1158 .loc 1 368 4 is_stmt 1 view .LVU302
- 368:Src/File_Handling.c **** {
- 1159 .loc 1 368 7 is_stmt 0 view .LVU303
- 1160 00a4 55B9 cbnz r5, .L64
- 370:Src/File_Handling.c **** data[0] = (uint8_t) (sizeoffile&0xff);
- 1161 .loc 1 370 5 is_stmt 1 view .LVU304
- 370:Src/File_Handling.c **** data[0] = (uint8_t) (sizeoffile&0xff);
- 1162 .loc 1 370 18 is_stmt 0 view .LVU305
- 1163 00a6 1F4B ldr r3, .L70+8
- 1164 00a8 DA68 ldr r2, [r3, #12]
- 370:Src/File_Handling.c **** data[0] = (uint8_t) (sizeoffile&0xff);
- 1165 .loc 1 370 16 view .LVU306
- 1166 00aa 234B ldr r3, .L70+28
- 1167 00ac 1A60 str r2, [r3]
- 371:Src/File_Handling.c **** data[1] = (uint8_t) ((sizeoffile>>8)&0xff);
- 1168 .loc 1 371 5 is_stmt 1 view .LVU307
- 371:Src/File_Handling.c **** data[1] = (uint8_t) ((sizeoffile>>8)&0xff);
- 1169 .loc 1 371 13 is_stmt 0 view .LVU308
- 1170 00ae 3A70 strb r2, [r7]
- 372:Src/File_Handling.c **** data[2] = (uint8_t) ((sizeoffile>>16)&0xff);
- 1171 .loc 1 372 5 is_stmt 1 view .LVU309
- 372:Src/File_Handling.c **** data[2] = (uint8_t) ((sizeoffile>>16)&0xff);
- 1172 .loc 1 372 15 is_stmt 0 view .LVU310
- 1173 00b0 5A78 ldrb r2, [r3, #1] @ zero_extendqisi2
- 372:Src/File_Handling.c **** data[2] = (uint8_t) ((sizeoffile>>16)&0xff);
- 1174 .loc 1 372 13 view .LVU311
- 1175 00b2 7A70 strb r2, [r7, #1]
- 373:Src/File_Handling.c **** data[3] = (uint8_t) ((sizeoffile>>24)&0xff);
- 1176 .loc 1 373 5 is_stmt 1 view .LVU312
- 373:Src/File_Handling.c **** data[3] = (uint8_t) ((sizeoffile>>24)&0xff);
- 1177 .loc 1 373 15 is_stmt 0 view .LVU313
- 1178 00b4 9A78 ldrb r2, [r3, #2] @ zero_extendqisi2
- 373:Src/File_Handling.c **** data[3] = (uint8_t) ((sizeoffile>>24)&0xff);
- 1179 .loc 1 373 13 view .LVU314
- 1180 00b6 BA70 strb r2, [r7, #2]
- 374:Src/File_Handling.c **** }
- 1181 .loc 1 374 5 is_stmt 1 view .LVU315
- ARM GAS /tmp/ccnfjbri.s page 32
-
-
- 374:Src/File_Handling.c **** }
- 1182 .loc 1 374 15 is_stmt 0 view .LVU316
- 1183 00b8 DB78 ldrb r3, [r3, #3] @ zero_extendqisi2
- 374:Src/File_Handling.c **** }
- 1184 .loc 1 374 13 view .LVU317
- 1185 00ba FB70 strb r3, [r7, #3]
- 1186 .L64:
- 378:Src/File_Handling.c **** if (fresult != FR_OK)
- 1187 .loc 1 378 4 is_stmt 1 view .LVU318
- 378:Src/File_Handling.c **** if (fresult != FR_OK)
- 1188 .loc 1 378 14 is_stmt 0 view .LVU319
- 1189 00bc 1948 ldr r0, .L70+8
- 1190 00be FFF7FEFF bl f_close
- 1191 .LVL122:
- 1192 00c2 0546 mov r5, r0
- 1193 .LVL123:
- 378:Src/File_Handling.c **** if (fresult != FR_OK)
- 1194 .loc 1 378 12 discriminator 1 view .LVU320
- 1195 00c4 164B ldr r3, .L70+4
- 1196 00c6 1870 strb r0, [r3]
- 379:Src/File_Handling.c **** {
- 1197 .loc 1 379 4 is_stmt 1 view .LVU321
- 379:Src/File_Handling.c **** {
- 1198 .loc 1 379 7 is_stmt 0 view .LVU322
- 1199 00c8 D8B1 cbz r0, .L65
- 1200 .LBB18:
- 381:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 1201 .loc 1 381 5 is_stmt 1 view .LVU323
- 381:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 1202 .loc 1 381 17 is_stmt 0 view .LVU324
- 1203 00ca 6420 movs r0, #100
- 1204 00cc FFF7FEFF bl malloc
- 1205 .LVL124:
- 1206 00d0 0646 mov r6, r0
- 1207 .LVL125:
- 382:Src/File_Handling.c **** //Send_Uart(buf);
- 1208 .loc 1 382 5 is_stmt 1 view .LVU325
- 1209 00d2 2346 mov r3, r4
- 1210 00d4 2A46 mov r2, r5
- 1211 00d6 1949 ldr r1, .L70+32
- 1212 00d8 FFF7FEFF bl sprintf
- 1213 .LVL126:
- 384:Src/File_Handling.c **** }
- 1214 .loc 1 384 5 view .LVU326
- 1215 00dc 3046 mov r0, r6
- 1216 00de FFF7FEFF bl free
- 1217 .LVL127:
- 1218 .L63:
- 384:Src/File_Handling.c **** }
- 1219 .loc 1 384 5 is_stmt 0 view .LVU327
- 1220 .LBE18:
- 394:Src/File_Handling.c **** }
- 1221 .loc 1 394 6 is_stmt 1 view .LVU328
- 394:Src/File_Handling.c **** }
- 1222 .loc 1 394 13 is_stmt 0 view .LVU329
- 1223 00e2 0F4B ldr r3, .L70+4
- 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2
- ARM GAS /tmp/ccnfjbri.s page 33
-
-
- 1225 00e6 C2E7 b .L59
- 1226 .LVL128:
- 1227 .L69:
- 1228 .LBB19:
- 356:Src/File_Handling.c **** //free(buffer);
- 1229 .loc 1 356 4 is_stmt 1 view .LVU330
- 356:Src/File_Handling.c **** //free(buffer);
- 1230 .loc 1 356 16 is_stmt 0 view .LVU331
- 1231 00e8 6420 movs r0, #100
- 1232 00ea FFF7FEFF bl malloc
- 1233 .LVL129:
- 1234 00ee 0546 mov r5, r0
- 1235 .LVL130:
- 358:Src/File_Handling.c **** //Send_Uart(buffer);
- 1236 .loc 1 358 5 is_stmt 1 view .LVU332
- 1237 00f0 2346 mov r3, r4
- 1238 00f2 3246 mov r2, r6
- 1239 00f4 1249 ldr r1, .L70+36
- 1240 00f6 FFF7FEFF bl sprintf
- 1241 .LVL131:
- 360:Src/File_Handling.c ****
- 1242 .loc 1 360 5 view .LVU333
- 1243 00fa 2846 mov r0, r5
- 1244 00fc FFF7FEFF bl free
- 1245 .LVL132:
- 1246 .LBE19:
- 1247 0100 EFE7 b .L63
- 1248 .LVL133:
- 1249 .L65:
- 1250 .LBB20:
- 388:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 1251 .loc 1 388 5 view .LVU334
- 388:Src/File_Handling.c **** sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 1252 .loc 1 388 17 is_stmt 0 view .LVU335
- 1253 0102 6420 movs r0, #100
- 1254 0104 FFF7FEFF bl malloc
- 1255 .LVL134:
- 1256 0108 0546 mov r5, r0
- 1257 .LVL135:
- 389:Src/File_Handling.c **** //Send_Uart(buf);
- 1258 .loc 1 389 5 is_stmt 1 view .LVU336
- 1259 010a 2246 mov r2, r4
- 1260 010c 0D49 ldr r1, .L70+40
- 1261 010e FFF7FEFF bl sprintf
- 1262 .LVL136:
- 391:Src/File_Handling.c **** }
- 1263 .loc 1 391 5 view .LVU337
- 1264 0112 2846 mov r0, r5
- 1265 0114 FFF7FEFF bl free
- 1266 .LVL137:
- 1267 0118 E3E7 b .L63
- 1268 .L71:
- 1269 011a 00BF .align 2
- 1270 .L70:
- 1271 011c 00000000 .word fno
- 1272 0120 00000000 .word fresult
- 1273 0124 00000000 .word fil
- ARM GAS /tmp/ccnfjbri.s page 34
-
-
- 1274 0128 00000000 .word .LC10
- 1275 012c 00000000 .word .LC5
- 1276 0130 24000000 .word .LC6
- 1277 0134 00000000 .word br
- 1278 0138 00000000 .word sizeoffile
- 1279 013c 74000000 .word .LC8
- 1280 0140 4C000000 .word .LC7
- 1281 0144 9C000000 .word .LC9
- 1282 .LBE20:
- 1283 .cfi_endproc
- 1284 .LFE1194:
- 1286 .section .text.Create_File,"ax",%progbits
- 1287 .align 1
- 1288 .global Create_File
- 1289 .syntax unified
- 1290 .thumb
- 1291 .thumb_func
- 1293 Create_File:
- 1294 .LVL138:
- 1295 .LFB1195:
- 397:Src/File_Handling.c ****
- 398:Src/File_Handling.c **** FRESULT Create_File (char *name)
- 399:Src/File_Handling.c **** {
- 1296 .loc 1 399 1 view -0
- 1297 .cfi_startproc
- 1298 @ args = 0, pretend = 0, frame = 0
- 1299 @ frame_needed = 0, uses_anonymous_args = 0
- 1300 .loc 1 399 1 is_stmt 0 view .LVU339
- 1301 0000 10B5 push {r4, lr}
- 1302 .LCFI12:
- 1303 .cfi_def_cfa_offset 8
- 1304 .cfi_offset 4, -8
- 1305 .cfi_offset 14, -4
- 1306 0002 0446 mov r4, r0
- 400:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 1307 .loc 1 400 2 is_stmt 1 view .LVU340
- 1308 .loc 1 400 12 is_stmt 0 view .LVU341
- 1309 0004 0C49 ldr r1, .L77
- 1310 0006 FFF7FEFF bl f_stat
- 1311 .LVL139:
- 1312 .loc 1 400 10 discriminator 1 view .LVU342
- 1313 000a 0C4B ldr r3, .L77+4
- 1314 000c 1870 strb r0, [r3]
- 401:Src/File_Handling.c **** if (fresult == FR_OK)
- 1315 .loc 1 401 2 is_stmt 1 view .LVU343
- 1316 .loc 1 401 5 is_stmt 0 view .LVU344
- 1317 000e 08B9 cbnz r0, .L73
- 1318 .LBB21:
- 402:Src/File_Handling.c **** {
- 403:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1319 .loc 1 403 3 is_stmt 1 view .LVU345
- 404:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* already exists!!!!\n use Update_File \n\n",name);
- 405:Src/File_Handling.c **** //Send_Uart(buf);
- 406:Src/File_Handling.c **** free(buf);
- 1320 .loc 1 406 3 view .LVU346
- 407:Src/File_Handling.c **** return fresult;
- 1321 .loc 1 407 6 view .LVU347
- ARM GAS /tmp/ccnfjbri.s page 35
-
-
- 1322 .loc 1 407 13 is_stmt 0 view .LVU348
- 1323 0010 C0B2 uxtb r0, r0
- 1324 .L74:
- 1325 .LBE21:
- 408:Src/File_Handling.c **** }
- 409:Src/File_Handling.c **** else
- 410:Src/File_Handling.c **** {
- 411:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_CREATE_ALWAYS|FA_READ|FA_WRITE);
- 412:Src/File_Handling.c **** if (fresult != FR_OK)
- 413:Src/File_Handling.c **** {
- 414:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 415:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in creating file *%s*\n\n", fresult, name);
- 416:Src/File_Handling.c **** //Send_Uart(buf);
- 417:Src/File_Handling.c **** free(buf);
- 418:Src/File_Handling.c **** return fresult;
- 419:Src/File_Handling.c **** }
- 420:Src/File_Handling.c **** else
- 421:Src/File_Handling.c **** {
- 422:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 423:Src/File_Handling.c **** //sprintf (buf, "*%s* created successfully\n Now use Write_File to write data\n",name);
- 424:Src/File_Handling.c **** //Send_Uart(buf);
- 425:Src/File_Handling.c **** free(buf);
- 426:Src/File_Handling.c **** }
- 427:Src/File_Handling.c ****
- 428:Src/File_Handling.c **** fresult = f_close(&fil);
- 429:Src/File_Handling.c **** if (fresult != FR_OK)
- 430:Src/File_Handling.c **** {
- 431:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 432:Src/File_Handling.c **** //sprintf (buf, "ERROR No. %d in closing file *%s*\n\n", fresult, name);
- 433:Src/File_Handling.c **** //Send_Uart(buf);
- 434:Src/File_Handling.c **** free(buf);
- 435:Src/File_Handling.c **** }
- 436:Src/File_Handling.c **** else
- 437:Src/File_Handling.c **** {
- 438:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 439:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 440:Src/File_Handling.c **** //Send_Uart(buf);
- 441:Src/File_Handling.c **** free(buf);
- 442:Src/File_Handling.c **** }
- 443:Src/File_Handling.c **** }
- 444:Src/File_Handling.c **** return fresult;
- 445:Src/File_Handling.c **** }
- 1326 .loc 1 445 1 view .LVU349
- 1327 0012 10BD pop {r4, pc}
- 1328 .LVL140:
- 1329 .L73:
- 411:Src/File_Handling.c **** if (fresult != FR_OK)
- 1330 .loc 1 411 3 is_stmt 1 view .LVU350
- 411:Src/File_Handling.c **** if (fresult != FR_OK)
- 1331 .loc 1 411 13 is_stmt 0 view .LVU351
- 1332 0014 0B22 movs r2, #11
- 1333 0016 2146 mov r1, r4
- 1334 0018 0948 ldr r0, .L77+8
- 1335 001a FFF7FEFF bl f_open
- 1336 .LVL141:
- 411:Src/File_Handling.c **** if (fresult != FR_OK)
- 1337 .loc 1 411 11 discriminator 1 view .LVU352
- ARM GAS /tmp/ccnfjbri.s page 36
-
-
- 1338 001e 074B ldr r3, .L77+4
- 1339 0020 1870 strb r0, [r3]
- 412:Src/File_Handling.c **** {
- 1340 .loc 1 412 3 is_stmt 1 view .LVU353
- 412:Src/File_Handling.c **** {
- 1341 .loc 1 412 6 is_stmt 0 view .LVU354
- 1342 0022 08B1 cbz r0, .L75
- 1343 .LBB22:
- 414:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in creating file *%s*\n\n", fresult, name);
- 1344 .loc 1 414 4 is_stmt 1 view .LVU355
- 417:Src/File_Handling.c **** return fresult;
- 1345 .loc 1 417 4 view .LVU356
- 418:Src/File_Handling.c **** }
- 1346 .loc 1 418 7 view .LVU357
- 418:Src/File_Handling.c **** }
- 1347 .loc 1 418 14 is_stmt 0 view .LVU358
- 1348 0024 C0B2 uxtb r0, r0
- 1349 0026 F4E7 b .L74
- 1350 .L75:
- 1351 .LBE22:
- 422:Src/File_Handling.c **** //sprintf (buf, "*%s* created successfully\n Now use Write_File to write data\n",name);
- 1352 .loc 1 422 4 is_stmt 1 view .LVU359
- 425:Src/File_Handling.c **** }
- 1353 .loc 1 425 4 view .LVU360
- 428:Src/File_Handling.c **** if (fresult != FR_OK)
- 1354 .loc 1 428 3 view .LVU361
- 428:Src/File_Handling.c **** if (fresult != FR_OK)
- 1355 .loc 1 428 13 is_stmt 0 view .LVU362
- 1356 0028 0548 ldr r0, .L77+8
- 1357 002a FFF7FEFF bl f_close
- 1358 .LVL142:
- 428:Src/File_Handling.c **** if (fresult != FR_OK)
- 1359 .loc 1 428 11 discriminator 1 view .LVU363
- 1360 002e 034B ldr r3, .L77+4
- 1361 0030 1870 strb r0, [r3]
- 429:Src/File_Handling.c **** {
- 1362 .loc 1 429 3 is_stmt 1 view .LVU364
- 438:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 1363 .loc 1 438 4 view .LVU365
- 441:Src/File_Handling.c **** }
- 1364 .loc 1 441 4 view .LVU366
- 444:Src/File_Handling.c **** }
- 1365 .loc 1 444 5 view .LVU367
- 444:Src/File_Handling.c **** }
- 1366 .loc 1 444 12 is_stmt 0 view .LVU368
- 1367 0032 C0B2 uxtb r0, r0
- 1368 0034 EDE7 b .L74
- 1369 .L78:
- 1370 0036 00BF .align 2
- 1371 .L77:
- 1372 0038 00000000 .word fno
- 1373 003c 00000000 .word fresult
- 1374 0040 00000000 .word fil
- 1375 .cfi_endproc
- 1376 .LFE1195:
- 1378 .section .text.Update_File,"ax",%progbits
- 1379 .align 1
- ARM GAS /tmp/ccnfjbri.s page 37
-
-
- 1380 .global Update_File
- 1381 .syntax unified
- 1382 .thumb
- 1383 .thumb_func
- 1385 Update_File:
- 1386 .LVL143:
- 1387 .LFB1196:
- 446:Src/File_Handling.c ****
- 447:Src/File_Handling.c **** FRESULT Update_File (char *name, char *data)
- 448:Src/File_Handling.c **** {
- 1388 .loc 1 448 1 is_stmt 1 view -0
- 1389 .cfi_startproc
- 1390 @ args = 0, pretend = 0, frame = 0
- 1391 @ frame_needed = 0, uses_anonymous_args = 0
- 1392 .loc 1 448 1 is_stmt 0 view .LVU370
- 1393 0000 70B5 push {r4, r5, r6, lr}
- 1394 .LCFI13:
- 1395 .cfi_def_cfa_offset 16
- 1396 .cfi_offset 4, -16
- 1397 .cfi_offset 5, -12
- 1398 .cfi_offset 6, -8
- 1399 .cfi_offset 14, -4
- 1400 0002 0446 mov r4, r0
- 1401 0004 0D46 mov r5, r1
- 449:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 450:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 1402 .loc 1 450 2 is_stmt 1 view .LVU371
- 1403 .loc 1 450 12 is_stmt 0 view .LVU372
- 1404 0006 1249 ldr r1, .L84
- 1405 .LVL144:
- 1406 .loc 1 450 12 view .LVU373
- 1407 0008 FFF7FEFF bl f_stat
- 1408 .LVL145:
- 1409 .loc 1 450 10 discriminator 1 view .LVU374
- 1410 000c 114B ldr r3, .L84+4
- 1411 000e 1870 strb r0, [r3]
- 451:Src/File_Handling.c **** if (fresult != FR_OK)
- 1412 .loc 1 451 2 is_stmt 1 view .LVU375
- 1413 .loc 1 451 5 is_stmt 0 view .LVU376
- 1414 0010 08B1 cbz r0, .L80
- 1415 .LBB23:
- 452:Src/File_Handling.c **** {
- 453:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1416 .loc 1 453 3 is_stmt 1 view .LVU377
- 454:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 455:Src/File_Handling.c **** //Send_Uart (buf);
- 456:Src/File_Handling.c **** free(buf);
- 1417 .loc 1 456 3 view .LVU378
- 457:Src/File_Handling.c **** return fresult;
- 1418 .loc 1 457 6 view .LVU379
- 1419 .loc 1 457 13 is_stmt 0 view .LVU380
- 1420 0012 C0B2 uxtb r0, r0
- 1421 .LVL146:
- 1422 .L81:
- 1423 .loc 1 457 13 view .LVU381
- 1424 .LBE23:
- 458:Src/File_Handling.c **** }
- ARM GAS /tmp/ccnfjbri.s page 38
-
-
- 459:Src/File_Handling.c ****
- 460:Src/File_Handling.c **** else
- 461:Src/File_Handling.c **** {
- 462:Src/File_Handling.c **** /* Create a file with read write access and open it */
- 463:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- 464:Src/File_Handling.c **** if (fresult != FR_OK)
- 465:Src/File_Handling.c **** {
- 466:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 467:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 468:Src/File_Handling.c **** //Send_Uart(buf);
- 469:Src/File_Handling.c **** free(buf);
- 470:Src/File_Handling.c **** return fresult;
- 471:Src/File_Handling.c **** }
- 472:Src/File_Handling.c ****
- 473:Src/File_Handling.c **** /* Writing text */
- 474:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen (data), &bw);
- 475:Src/File_Handling.c **** if (fresult != FR_OK)
- 476:Src/File_Handling.c **** {
- 477:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 478:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- 479:Src/File_Handling.c **** //Send_Uart(buf);
- 480:Src/File_Handling.c **** free(buf);
- 481:Src/File_Handling.c **** }
- 482:Src/File_Handling.c ****
- 483:Src/File_Handling.c **** else
- 484:Src/File_Handling.c **** {
- 485:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 486:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 487:Src/File_Handling.c **** //Send_Uart(buf);
- 488:Src/File_Handling.c **** free(buf);
- 489:Src/File_Handling.c **** }
- 490:Src/File_Handling.c ****
- 491:Src/File_Handling.c **** /* Close file */
- 492:Src/File_Handling.c **** fresult = f_close(&fil);
- 493:Src/File_Handling.c **** if (fresult != FR_OK)
- 494:Src/File_Handling.c **** {
- 495:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 496:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 497:Src/File_Handling.c **** //Send_Uart(buf);
- 498:Src/File_Handling.c **** free(buf);
- 499:Src/File_Handling.c **** }
- 500:Src/File_Handling.c **** else
- 501:Src/File_Handling.c **** {
- 502:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 503:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 504:Src/File_Handling.c **** //Send_Uart(buf);
- 505:Src/File_Handling.c **** free(buf);
- 506:Src/File_Handling.c **** }
- 507:Src/File_Handling.c **** }
- 508:Src/File_Handling.c **** return fresult;
- 509:Src/File_Handling.c **** }
- 1425 .loc 1 509 1 view .LVU382
- 1426 0014 70BD pop {r4, r5, r6, pc}
- 1427 .LVL147:
- 1428 .L80:
- 463:Src/File_Handling.c **** if (fresult != FR_OK)
- 1429 .loc 1 463 6 is_stmt 1 view .LVU383
- ARM GAS /tmp/ccnfjbri.s page 39
-
-
- 463:Src/File_Handling.c **** if (fresult != FR_OK)
- 1430 .loc 1 463 16 is_stmt 0 view .LVU384
- 1431 0016 3222 movs r2, #50
- 1432 0018 2146 mov r1, r4
- 1433 001a 0F48 ldr r0, .L84+8
- 1434 001c FFF7FEFF bl f_open
- 1435 .LVL148:
- 463:Src/File_Handling.c **** if (fresult != FR_OK)
- 1436 .loc 1 463 14 discriminator 1 view .LVU385
- 1437 0020 0C4B ldr r3, .L84+4
- 1438 0022 1870 strb r0, [r3]
- 464:Src/File_Handling.c **** {
- 1439 .loc 1 464 6 is_stmt 1 view .LVU386
- 464:Src/File_Handling.c **** {
- 1440 .loc 1 464 9 is_stmt 0 view .LVU387
- 1441 0024 08B1 cbz r0, .L82
- 1442 .LBB24:
- 466:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 1443 .loc 1 466 7 is_stmt 1 view .LVU388
- 469:Src/File_Handling.c **** return fresult;
- 1444 .loc 1 469 10 view .LVU389
- 470:Src/File_Handling.c **** }
- 1445 .loc 1 470 10 view .LVU390
- 470:Src/File_Handling.c **** }
- 1446 .loc 1 470 17 is_stmt 0 view .LVU391
- 1447 0026 C0B2 uxtb r0, r0
- 1448 0028 F4E7 b .L81
- 1449 .L82:
- 1450 .LBE24:
- 474:Src/File_Handling.c **** if (fresult != FR_OK)
- 1451 .loc 1 474 6 is_stmt 1 view .LVU392
- 474:Src/File_Handling.c **** if (fresult != FR_OK)
- 1452 .loc 1 474 16 is_stmt 0 view .LVU393
- 1453 002a 2846 mov r0, r5
- 1454 002c FFF7FEFF bl strlen
- 1455 .LVL149:
- 1456 0030 0246 mov r2, r0
- 474:Src/File_Handling.c **** if (fresult != FR_OK)
- 1457 .loc 1 474 16 discriminator 1 view .LVU394
- 1458 0032 094E ldr r6, .L84+8
- 1459 0034 094B ldr r3, .L84+12
- 1460 0036 2946 mov r1, r5
- 1461 0038 3046 mov r0, r6
- 1462 003a FFF7FEFF bl f_write
- 1463 .LVL150:
- 474:Src/File_Handling.c **** if (fresult != FR_OK)
- 1464 .loc 1 474 14 discriminator 2 view .LVU395
- 1465 003e 054C ldr r4, .L84+4
- 1466 .LVL151:
- 474:Src/File_Handling.c **** if (fresult != FR_OK)
- 1467 .loc 1 474 14 discriminator 2 view .LVU396
- 1468 0040 2070 strb r0, [r4]
- 475:Src/File_Handling.c **** {
- 1469 .loc 1 475 6 is_stmt 1 view .LVU397
- 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 1470 .loc 1 485 7 view .LVU398
- 488:Src/File_Handling.c **** }
- ARM GAS /tmp/ccnfjbri.s page 40
-
-
- 1471 .loc 1 488 7 view .LVU399
- 492:Src/File_Handling.c **** if (fresult != FR_OK)
- 1472 .loc 1 492 6 view .LVU400
- 492:Src/File_Handling.c **** if (fresult != FR_OK)
- 1473 .loc 1 492 16 is_stmt 0 view .LVU401
- 1474 0042 3046 mov r0, r6
- 1475 0044 FFF7FEFF bl f_close
- 1476 .LVL152:
- 492:Src/File_Handling.c **** if (fresult != FR_OK)
- 1477 .loc 1 492 14 discriminator 1 view .LVU402
- 1478 0048 2070 strb r0, [r4]
- 493:Src/File_Handling.c **** {
- 1479 .loc 1 493 6 is_stmt 1 view .LVU403
- 502:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 1480 .loc 1 502 7 view .LVU404
- 505:Src/File_Handling.c **** }
- 1481 .loc 1 505 7 view .LVU405
- 508:Src/File_Handling.c **** }
- 1482 .loc 1 508 5 view .LVU406
- 508:Src/File_Handling.c **** }
- 1483 .loc 1 508 12 is_stmt 0 view .LVU407
- 1484 004a C0B2 uxtb r0, r0
- 1485 004c E2E7 b .L81
- 1486 .L85:
- 1487 004e 00BF .align 2
- 1488 .L84:
- 1489 0050 00000000 .word fno
- 1490 0054 00000000 .word fresult
- 1491 0058 00000000 .word fil
- 1492 005c 00000000 .word bw
- 1493 .cfi_endproc
- 1494 .LFE1196:
- 1496 .section .rodata.Remove_File.str1.4,"aMS",%progbits,1
- 1497 .align 2
- 1498 .LC11:
- 1499 0000 4552524F .ascii "ERROR!!! *%s* does not exists\012\012\000"
- 1499 52212121
- 1499 202A2573
- 1499 2A20646F
- 1499 6573206E
- 1500 .align 2
- 1501 .LC12:
- 1502 0020 2A25732A .ascii "*%s* has been removed successfully\012\000"
- 1502 20686173
- 1502 20626565
- 1502 6E207265
- 1502 6D6F7665
- 1503 .align 2
- 1504 .LC13:
- 1505 0044 4552524F .ascii "ERROR No. %d in removing *%s*\012\012\000"
- 1505 52204E6F
- 1505 2E202564
- 1505 20696E20
- 1505 72656D6F
- 1506 .section .text.Remove_File,"ax",%progbits
- 1507 .align 1
- 1508 .global Remove_File
- ARM GAS /tmp/ccnfjbri.s page 41
-
-
- 1509 .syntax unified
- 1510 .thumb
- 1511 .thumb_func
- 1513 Remove_File:
- 1514 .LVL153:
- 1515 .LFB1197:
- 510:Src/File_Handling.c ****
- 511:Src/File_Handling.c **** FRESULT Remove_File (char *name)
- 512:Src/File_Handling.c **** {
- 1516 .loc 1 512 1 is_stmt 1 view -0
- 1517 .cfi_startproc
- 1518 @ args = 0, pretend = 0, frame = 0
- 1519 @ frame_needed = 0, uses_anonymous_args = 0
- 1520 .loc 1 512 1 is_stmt 0 view .LVU409
- 1521 0000 70B5 push {r4, r5, r6, lr}
- 1522 .LCFI14:
- 1523 .cfi_def_cfa_offset 16
- 1524 .cfi_offset 4, -16
- 1525 .cfi_offset 5, -12
- 1526 .cfi_offset 6, -8
- 1527 .cfi_offset 14, -4
- 1528 0002 0446 mov r4, r0
- 513:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 514:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 1529 .loc 1 514 2 is_stmt 1 view .LVU410
- 1530 .loc 1 514 12 is_stmt 0 view .LVU411
- 1531 0004 1A49 ldr r1, .L93
- 1532 0006 FFF7FEFF bl f_stat
- 1533 .LVL154:
- 1534 .loc 1 514 10 discriminator 1 view .LVU412
- 1535 000a 1A4B ldr r3, .L93+4
- 1536 000c 1870 strb r0, [r3]
- 515:Src/File_Handling.c **** if (fresult != FR_OK)
- 1537 .loc 1 515 2 is_stmt 1 view .LVU413
- 1538 .loc 1 515 5 is_stmt 0 view .LVU414
- 1539 000e A0B9 cbnz r0, .L92
- 516:Src/File_Handling.c **** {
- 517:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 518:Src/File_Handling.c **** sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 519:Src/File_Handling.c **** Send_Uart (buf);
- 520:Src/File_Handling.c **** free(buf);
- 521:Src/File_Handling.c **** return fresult;
- 522:Src/File_Handling.c **** }
- 523:Src/File_Handling.c ****
- 524:Src/File_Handling.c **** else
- 525:Src/File_Handling.c **** {
- 526:Src/File_Handling.c **** fresult = f_unlink (name);
- 1540 .loc 1 526 3 is_stmt 1 view .LVU415
- 1541 .loc 1 526 13 is_stmt 0 view .LVU416
- 1542 0010 2046 mov r0, r4
- 1543 0012 FFF7FEFF bl f_unlink
- 1544 .LVL155:
- 1545 0016 0546 mov r5, r0
- 1546 .loc 1 526 11 discriminator 1 view .LVU417
- 1547 0018 164B ldr r3, .L93+4
- 1548 001a 1870 strb r0, [r3]
- 527:Src/File_Handling.c **** if (fresult == FR_OK)
- ARM GAS /tmp/ccnfjbri.s page 42
-
-
- 1549 .loc 1 527 3 is_stmt 1 view .LVU418
- 1550 .loc 1 527 6 is_stmt 0 view .LVU419
- 1551 001c D8B9 cbnz r0, .L89
- 1552 .LBB25:
- 528:Src/File_Handling.c **** {
- 529:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1553 .loc 1 529 4 is_stmt 1 view .LVU420
- 1554 .loc 1 529 16 is_stmt 0 view .LVU421
- 1555 001e 6420 movs r0, #100
- 1556 0020 FFF7FEFF bl malloc
- 1557 .LVL156:
- 1558 0024 0546 mov r5, r0
- 1559 .LVL157:
- 530:Src/File_Handling.c **** sprintf (buf, "*%s* has been removed successfully\n", name);
- 1560 .loc 1 530 4 is_stmt 1 view .LVU422
- 1561 0026 2246 mov r2, r4
- 1562 0028 1349 ldr r1, .L93+8
- 1563 002a FFF7FEFF bl sprintf
- 1564 .LVL158:
- 531:Src/File_Handling.c **** Send_Uart (buf);
- 1565 .loc 1 531 4 view .LVU423
- 532:Src/File_Handling.c **** free(buf);
- 1566 .loc 1 532 4 view .LVU424
- 1567 002e 2846 mov r0, r5
- 1568 0030 FFF7FEFF bl free
- 1569 .LVL159:
- 1570 .L90:
- 1571 .loc 1 532 4 is_stmt 0 view .LVU425
- 1572 .LBE25:
- 533:Src/File_Handling.c **** }
- 534:Src/File_Handling.c ****
- 535:Src/File_Handling.c **** else
- 536:Src/File_Handling.c **** {
- 537:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 538:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in removing *%s*\n\n",fresult, name);
- 539:Src/File_Handling.c **** Send_Uart (buf);
- 540:Src/File_Handling.c **** free(buf);
- 541:Src/File_Handling.c **** }
- 542:Src/File_Handling.c **** }
- 543:Src/File_Handling.c **** return fresult;
- 1573 .loc 1 543 2 is_stmt 1 view .LVU426
- 1574 .loc 1 543 9 is_stmt 0 view .LVU427
- 1575 0034 0F4B ldr r3, .L93+4
- 1576 0036 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1577 .L88:
- 544:Src/File_Handling.c **** }
- 1578 .loc 1 544 1 view .LVU428
- 1579 0038 70BD pop {r4, r5, r6, pc}
- 1580 .LVL160:
- 1581 .L92:
- 1582 .LBB26:
- 517:Src/File_Handling.c **** sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 1583 .loc 1 517 3 is_stmt 1 view .LVU429
- 517:Src/File_Handling.c **** sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 1584 .loc 1 517 15 is_stmt 0 view .LVU430
- 1585 003a 6420 movs r0, #100
- 1586 003c FFF7FEFF bl malloc
- ARM GAS /tmp/ccnfjbri.s page 43
-
-
- 1587 .LVL161:
- 1588 0040 0546 mov r5, r0
- 1589 .LVL162:
- 518:Src/File_Handling.c **** Send_Uart (buf);
- 1590 .loc 1 518 3 is_stmt 1 view .LVU431
- 1591 0042 2246 mov r2, r4
- 1592 0044 0D49 ldr r1, .L93+12
- 1593 0046 FFF7FEFF bl sprintf
- 1594 .LVL163:
- 519:Src/File_Handling.c **** free(buf);
- 1595 .loc 1 519 3 view .LVU432
- 520:Src/File_Handling.c **** return fresult;
- 1596 .loc 1 520 3 view .LVU433
- 1597 004a 2846 mov r0, r5
- 1598 004c FFF7FEFF bl free
- 1599 .LVL164:
- 521:Src/File_Handling.c **** }
- 1600 .loc 1 521 3 view .LVU434
- 521:Src/File_Handling.c **** }
- 1601 .loc 1 521 10 is_stmt 0 view .LVU435
- 1602 0050 084B ldr r3, .L93+4
- 1603 0052 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1604 0054 F0E7 b .L88
- 1605 .LVL165:
- 1606 .L89:
- 521:Src/File_Handling.c **** }
- 1607 .loc 1 521 10 view .LVU436
- 1608 .LBE26:
- 1609 .LBB27:
- 537:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in removing *%s*\n\n",fresult, name);
- 1610 .loc 1 537 4 is_stmt 1 view .LVU437
- 537:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in removing *%s*\n\n",fresult, name);
- 1611 .loc 1 537 16 is_stmt 0 view .LVU438
- 1612 0056 6420 movs r0, #100
- 1613 0058 FFF7FEFF bl malloc
- 1614 .LVL166:
- 1615 005c 0646 mov r6, r0
- 1616 .LVL167:
- 538:Src/File_Handling.c **** Send_Uart (buf);
- 1617 .loc 1 538 4 is_stmt 1 view .LVU439
- 1618 005e 2346 mov r3, r4
- 1619 0060 2A46 mov r2, r5
- 1620 0062 0749 ldr r1, .L93+16
- 1621 0064 FFF7FEFF bl sprintf
- 1622 .LVL168:
- 539:Src/File_Handling.c **** free(buf);
- 1623 .loc 1 539 4 view .LVU440
- 540:Src/File_Handling.c **** }
- 1624 .loc 1 540 4 view .LVU441
- 1625 0068 3046 mov r0, r6
- 1626 006a FFF7FEFF bl free
- 1627 .LVL169:
- 1628 006e E1E7 b .L90
- 1629 .L94:
- 1630 .align 2
- 1631 .L93:
- 1632 0070 00000000 .word fno
- ARM GAS /tmp/ccnfjbri.s page 44
-
-
- 1633 0074 00000000 .word fresult
- 1634 0078 20000000 .word .LC12
- 1635 007c 00000000 .word .LC11
- 1636 0080 44000000 .word .LC13
- 1637 .LBE27:
- 1638 .cfi_endproc
- 1639 .LFE1197:
- 1641 .section .rodata.Create_Dir.str1.4,"aMS",%progbits,1
- 1642 .align 2
- 1643 .LC14:
- 1644 0000 2A25732A .ascii "*%s* has been created successfully\012\000"
- 1644 20686173
- 1644 20626565
- 1644 6E206372
- 1644 65617465
- 1645 .align 2
- 1646 .LC15:
- 1647 0024 4552524F .ascii "ERROR No. %d in creating directory *%s*\012\012\000"
- 1647 52204E6F
- 1647 2E202564
- 1647 20696E20
- 1647 63726561
- 1648 .section .text.Create_Dir,"ax",%progbits
- 1649 .align 1
- 1650 .global Create_Dir
- 1651 .syntax unified
- 1652 .thumb
- 1653 .thumb_func
- 1655 Create_Dir:
- 1656 .LVL170:
- 1657 .LFB1198:
- 545:Src/File_Handling.c ****
- 546:Src/File_Handling.c **** FRESULT Create_Dir (char *name)
- 547:Src/File_Handling.c **** {
- 1658 .loc 1 547 1 view -0
- 1659 .cfi_startproc
- 1660 @ args = 0, pretend = 0, frame = 0
- 1661 @ frame_needed = 0, uses_anonymous_args = 0
- 1662 .loc 1 547 1 is_stmt 0 view .LVU443
- 1663 0000 70B5 push {r4, r5, r6, lr}
- 1664 .LCFI15:
- 1665 .cfi_def_cfa_offset 16
- 1666 .cfi_offset 4, -16
- 1667 .cfi_offset 5, -12
- 1668 .cfi_offset 6, -8
- 1669 .cfi_offset 14, -4
- 1670 0002 0546 mov r5, r0
- 548:Src/File_Handling.c **** fresult = f_mkdir(name);
- 1671 .loc 1 548 5 is_stmt 1 view .LVU444
- 1672 .loc 1 548 15 is_stmt 0 view .LVU445
- 1673 0004 FFF7FEFF bl f_mkdir
- 1674 .LVL171:
- 1675 .loc 1 548 13 discriminator 1 view .LVU446
- 1676 0008 0F4B ldr r3, .L99
- 1677 000a 1870 strb r0, [r3]
- 549:Src/File_Handling.c **** if (fresult == FR_OK)
- 1678 .loc 1 549 5 is_stmt 1 view .LVU447
- ARM GAS /tmp/ccnfjbri.s page 45
-
-
- 1679 .loc 1 549 8 is_stmt 0 view .LVU448
- 1680 000c 68B9 cbnz r0, .L96
- 1681 .LBB28:
- 550:Src/File_Handling.c **** {
- 551:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1682 .loc 1 551 6 is_stmt 1 view .LVU449
- 1683 .loc 1 551 18 is_stmt 0 view .LVU450
- 1684 000e 6420 movs r0, #100
- 1685 0010 FFF7FEFF bl malloc
- 1686 .LVL172:
- 1687 0014 0446 mov r4, r0
- 1688 .LVL173:
- 552:Src/File_Handling.c **** sprintf (buf, "*%s* has been created successfully\n", name);
- 1689 .loc 1 552 6 is_stmt 1 view .LVU451
- 1690 0016 2A46 mov r2, r5
- 1691 0018 0C49 ldr r1, .L99+4
- 1692 001a FFF7FEFF bl sprintf
- 1693 .LVL174:
- 553:Src/File_Handling.c **** Send_Uart (buf);
- 1694 .loc 1 553 6 view .LVU452
- 554:Src/File_Handling.c **** free(buf);
- 1695 .loc 1 554 6 view .LVU453
- 1696 001e 2046 mov r0, r4
- 1697 0020 FFF7FEFF bl free
- 1698 .LVL175:
- 1699 .L97:
- 1700 .loc 1 554 6 is_stmt 0 view .LVU454
- 1701 .LBE28:
- 555:Src/File_Handling.c **** }
- 556:Src/File_Handling.c **** else
- 557:Src/File_Handling.c **** {
- 558:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 559:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in creating directory *%s*\n\n", fresult,name);
- 560:Src/File_Handling.c **** Send_Uart(buf);
- 561:Src/File_Handling.c **** free(buf);
- 562:Src/File_Handling.c **** }
- 563:Src/File_Handling.c **** return fresult;
- 1702 .loc 1 563 5 is_stmt 1 view .LVU455
- 564:Src/File_Handling.c **** }
- 1703 .loc 1 564 1 is_stmt 0 view .LVU456
- 1704 0024 084B ldr r3, .L99
- 1705 0026 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1706 0028 70BD pop {r4, r5, r6, pc}
- 1707 .LVL176:
- 1708 .L96:
- 1709 .loc 1 564 1 view .LVU457
- 1710 002a 0446 mov r4, r0
- 1711 .LBB29:
- 558:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in creating directory *%s*\n\n", fresult,name);
- 1712 .loc 1 558 6 is_stmt 1 view .LVU458
- 558:Src/File_Handling.c **** sprintf (buf, "ERROR No. %d in creating directory *%s*\n\n", fresult,name);
- 1713 .loc 1 558 18 is_stmt 0 view .LVU459
- 1714 002c 6420 movs r0, #100
- 1715 002e FFF7FEFF bl malloc
- 1716 .LVL177:
- 1717 0032 0646 mov r6, r0
- 1718 .LVL178:
- ARM GAS /tmp/ccnfjbri.s page 46
-
-
- 559:Src/File_Handling.c **** Send_Uart(buf);
- 1719 .loc 1 559 6 is_stmt 1 view .LVU460
- 1720 0034 2B46 mov r3, r5
- 1721 0036 2246 mov r2, r4
- 1722 0038 0549 ldr r1, .L99+8
- 1723 003a FFF7FEFF bl sprintf
- 1724 .LVL179:
- 560:Src/File_Handling.c **** free(buf);
- 1725 .loc 1 560 6 view .LVU461
- 561:Src/File_Handling.c **** }
- 1726 .loc 1 561 6 view .LVU462
- 1727 003e 3046 mov r0, r6
- 1728 0040 FFF7FEFF bl free
- 1729 .LVL180:
- 1730 0044 EEE7 b .L97
- 1731 .L100:
- 1732 0046 00BF .align 2
- 1733 .L99:
- 1734 0048 00000000 .word fresult
- 1735 004c 00000000 .word .LC14
- 1736 0050 24000000 .word .LC15
- 1737 .LBE29:
- 1738 .cfi_endproc
- 1739 .LFE1198:
- 1741 .section .rodata.Check_SD_Space.str1.4,"aMS",%progbits,1
- 1742 .align 2
- 1743 .LC16:
- 1744 0000 00 .ascii "\000"
- 1745 0001 000000 .align 2
- 1746 .LC17:
- 1747 0004 53442043 .ascii "SD CARD Total Size: \011%lu\012\000"
- 1747 41524420
- 1747 546F7461
- 1747 6C205369
- 1747 7A653A20
- 1748 001e 0000 .align 2
- 1749 .LC18:
- 1750 0020 53442043 .ascii "SD CARD Free Space: \011%lu\012\000"
- 1750 41524420
- 1750 46726565
- 1750 20537061
- 1750 63653A20
- 1751 .section .text.Check_SD_Space,"ax",%progbits
- 1752 .align 1
- 1753 .global Check_SD_Space
- 1754 .syntax unified
- 1755 .thumb
- 1756 .thumb_func
- 1758 Check_SD_Space:
- 1759 .LFB1199:
- 565:Src/File_Handling.c ****
- 566:Src/File_Handling.c **** void Check_SD_Space (void)
- 567:Src/File_Handling.c **** {
- 1760 .loc 1 567 1 view -0
- 1761 .cfi_startproc
- 1762 @ args = 0, pretend = 0, frame = 0
- 1763 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccnfjbri.s page 47
-
-
- 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 1765 .LCFI16:
- 1766 .cfi_def_cfa_offset 24
- 1767 .cfi_offset 3, -24
- 1768 .cfi_offset 4, -20
- 1769 .cfi_offset 5, -16
- 1770 .cfi_offset 6, -12
- 1771 .cfi_offset 7, -8
- 1772 .cfi_offset 14, -4
- 1773 0002 2DED028B vpush.64 {d8}
- 1774 .LCFI17:
- 1775 .cfi_def_cfa_offset 32
- 1776 .cfi_offset 80, -32
- 1777 .cfi_offset 81, -28
- 568:Src/File_Handling.c **** /* Check free space */
- 569:Src/File_Handling.c **** f_getfree("", &fre_clust, &pfs);
- 1778 .loc 1 569 5 view .LVU464
- 1779 0006 234D ldr r5, .L103
- 1780 0008 234F ldr r7, .L103+4
- 1781 000a 2A46 mov r2, r5
- 1782 000c 3946 mov r1, r7
- 1783 000e 2348 ldr r0, .L103+8
- 1784 0010 FFF7FEFF bl f_getfree
- 1785 .LVL181:
- 570:Src/File_Handling.c ****
- 571:Src/File_Handling.c **** total = (uint32_t)((pfs->n_fatent - 2) * pfs->csize * 0.5);
- 1786 .loc 1 571 5 view .LVU465
- 1787 .loc 1 571 28 is_stmt 0 view .LVU466
- 1788 0014 2A68 ldr r2, [r5]
- 1789 0016 9369 ldr r3, [r2, #24]
- 1790 .loc 1 571 39 view .LVU467
- 1791 0018 023B subs r3, r3, #2
- 1792 .loc 1 571 49 view .LVU468
- 1793 001a 5289 ldrh r2, [r2, #10]
- 1794 .loc 1 571 44 view .LVU469
- 1795 001c 02FB03F3 mul r3, r2, r3
- 1796 .loc 1 571 57 view .LVU470
- 1797 0020 07EE903A vmov s15, r3 @ int
- 1798 0024 B8EE677B vcvt.f64.u32 d7, s15
- 1799 0028 B6EE008B vmov.f64 d8, #5.0e-1
- 1800 002c 27EE087B vmul.f64 d7, d7, d8
- 1801 .loc 1 571 13 view .LVU471
- 1802 0030 FCEEC77B vcvt.u32.f64 s15, d7
- 1803 0034 17EE904A vmov r4, s15 @ int
- 1804 .loc 1 571 11 view .LVU472
- 1805 0038 194B ldr r3, .L103+12
- 1806 003a C3ED007A vstr.32 s15, [r3] @ int
- 572:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
- 1807 .loc 1 572 5 is_stmt 1 view .LVU473
- 1808 .loc 1 572 17 is_stmt 0 view .LVU474
- 1809 003e 1E20 movs r0, #30
- 1810 0040 FFF7FEFF bl malloc
- 1811 .LVL182:
- 1812 0044 0646 mov r6, r0
- 1813 .LVL183:
- 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total);
- 1814 .loc 1 573 5 is_stmt 1 view .LVU475
- ARM GAS /tmp/ccnfjbri.s page 48
-
-
- 1815 0046 2246 mov r2, r4
- 1816 0048 1649 ldr r1, .L103+16
- 1817 004a FFF7FEFF bl sprintf
- 1818 .LVL184:
- 574:Src/File_Handling.c **** Send_Uart(buf);
- 1819 .loc 1 574 5 view .LVU476
- 575:Src/File_Handling.c **** free(buf);
- 1820 .loc 1 575 5 view .LVU477
- 1821 004e 3046 mov r0, r6
- 1822 0050 FFF7FEFF bl free
- 1823 .LVL185:
- 576:Src/File_Handling.c **** free_space = (uint32_t)(fre_clust * pfs->csize * 0.5);
- 1824 .loc 1 576 5 view .LVU478
- 1825 .loc 1 576 44 is_stmt 0 view .LVU479
- 1826 0054 2B68 ldr r3, [r5]
- 1827 0056 5B89 ldrh r3, [r3, #10]
- 1828 .loc 1 576 39 view .LVU480
- 1829 0058 3A68 ldr r2, [r7]
- 1830 005a 02FB03F3 mul r3, r2, r3
- 1831 005e 07EE103A vmov s14, r3 @ int
- 1832 .loc 1 576 52 view .LVU481
- 1833 0062 B8EE477B vcvt.f64.u32 d7, s14
- 1834 0066 27EE087B vmul.f64 d7, d7, d8
- 1835 .loc 1 576 18 view .LVU482
- 1836 006a FCEEC77B vcvt.u32.f64 s15, d7
- 1837 006e 17EE904A vmov r4, s15 @ int
- 1838 .loc 1 576 16 view .LVU483
- 1839 0072 0D4B ldr r3, .L103+20
- 1840 0074 C3ED007A vstr.32 s15, [r3] @ int
- 577:Src/File_Handling.c **** buf = malloc(30*sizeof(char));
- 1841 .loc 1 577 5 is_stmt 1 view .LVU484
- 1842 .loc 1 577 11 is_stmt 0 view .LVU485
- 1843 0078 1E20 movs r0, #30
- 1844 007a FFF7FEFF bl malloc
- 1845 .LVL186:
- 1846 007e 0546 mov r5, r0
- 1847 .LVL187:
- 578:Src/File_Handling.c **** sprintf (buf, "SD CARD Free Space: \t%lu\n",free_space);
- 1848 .loc 1 578 5 is_stmt 1 view .LVU486
- 1849 0080 2246 mov r2, r4
- 1850 0082 0A49 ldr r1, .L103+24
- 1851 0084 FFF7FEFF bl sprintf
- 1852 .LVL188:
- 579:Src/File_Handling.c **** Send_Uart(buf);
- 1853 .loc 1 579 5 view .LVU487
- 580:Src/File_Handling.c **** free(buf);
- 1854 .loc 1 580 5 view .LVU488
- 1855 0088 2846 mov r0, r5
- 1856 008a FFF7FEFF bl free
- 1857 .LVL189:
- 581:Src/File_Handling.c **** }
- 1858 .loc 1 581 1 is_stmt 0 view .LVU489
- 1859 008e BDEC028B vldm sp!, {d8}
- 1860 .LCFI18:
- 1861 .cfi_restore 80
- 1862 .cfi_restore 81
- 1863 .cfi_def_cfa_offset 24
- ARM GAS /tmp/ccnfjbri.s page 49
-
-
- 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc}
- 1865 .LVL190:
- 1866 .L104:
- 1867 .loc 1 581 1 view .LVU490
- 1868 .align 2
- 1869 .L103:
- 1870 0094 00000000 .word pfs
- 1871 0098 00000000 .word fre_clust
- 1872 009c 00000000 .word .LC16
- 1873 00a0 00000000 .word total
- 1874 00a4 04000000 .word .LC17
- 1875 00a8 00000000 .word free_space
- 1876 00ac 20000000 .word .LC18
- 1877 .cfi_endproc
- 1878 .LFE1199:
- 1880 .section .text.Update_File_float,"ax",%progbits
- 1881 .align 1
- 1882 .global Update_File_float
- 1883 .syntax unified
- 1884 .thumb
- 1885 .thumb_func
- 1887 Update_File_float:
- 1888 .LVL191:
- 1889 .LFB1200:
- 582:Src/File_Handling.c ****
- 583:Src/File_Handling.c **** FRESULT Update_File_float (char *name, float *data, unsigned int bytesize)
- 584:Src/File_Handling.c **** {
- 1890 .loc 1 584 1 is_stmt 1 view -0
- 1891 .cfi_startproc
- 1892 @ args = 0, pretend = 0, frame = 0
- 1893 @ frame_needed = 0, uses_anonymous_args = 0
- 1894 .loc 1 584 1 is_stmt 0 view .LVU492
- 1895 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 1896 .LCFI19:
- 1897 .cfi_def_cfa_offset 24
- 1898 .cfi_offset 3, -24
- 1899 .cfi_offset 4, -20
- 1900 .cfi_offset 5, -16
- 1901 .cfi_offset 6, -12
- 1902 .cfi_offset 7, -8
- 1903 .cfi_offset 14, -4
- 1904 0002 0446 mov r4, r0
- 1905 0004 0D46 mov r5, r1
- 1906 0006 1646 mov r6, r2
- 585:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 586:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 1907 .loc 1 586 2 is_stmt 1 view .LVU493
- 1908 .loc 1 586 12 is_stmt 0 view .LVU494
- 1909 0008 1049 ldr r1, .L110
- 1910 .LVL192:
- 1911 .loc 1 586 12 view .LVU495
- 1912 000a FFF7FEFF bl f_stat
- 1913 .LVL193:
- 1914 .loc 1 586 10 discriminator 1 view .LVU496
- 1915 000e 104B ldr r3, .L110+4
- 1916 0010 1870 strb r0, [r3]
- 587:Src/File_Handling.c **** if (fresult != FR_OK)
- ARM GAS /tmp/ccnfjbri.s page 50
-
-
- 1917 .loc 1 587 2 is_stmt 1 view .LVU497
- 1918 .loc 1 587 5 is_stmt 0 view .LVU498
- 1919 0012 08B1 cbz r0, .L106
- 1920 .LBB30:
- 588:Src/File_Handling.c **** {
- 589:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 1921 .loc 1 589 3 is_stmt 1 view .LVU499
- 590:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 591:Src/File_Handling.c **** //Send_Uart (buf);
- 592:Src/File_Handling.c **** free(buf);
- 1922 .loc 1 592 3 view .LVU500
- 593:Src/File_Handling.c **** return fresult;
- 1923 .loc 1 593 6 view .LVU501
- 1924 .loc 1 593 13 is_stmt 0 view .LVU502
- 1925 0014 C0B2 uxtb r0, r0
- 1926 .LVL194:
- 1927 .L107:
- 1928 .loc 1 593 13 view .LVU503
- 1929 .LBE30:
- 594:Src/File_Handling.c **** }
- 595:Src/File_Handling.c ****
- 596:Src/File_Handling.c **** else
- 597:Src/File_Handling.c **** {
- 598:Src/File_Handling.c **** /* Create a file with read write access and open it */
- 599:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- 600:Src/File_Handling.c **** if (fresult != FR_OK)
- 601:Src/File_Handling.c **** {
- 602:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 603:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 604:Src/File_Handling.c **** //Send_Uart(buf);
- 605:Src/File_Handling.c **** free(buf);
- 606:Src/File_Handling.c **** return fresult;
- 607:Src/File_Handling.c **** }
- 608:Src/File_Handling.c ****
- 609:Src/File_Handling.c **** /* Writing text */
- 610:Src/File_Handling.c **** fresult = f_write(&fil, data, bytesize, &bw);
- 611:Src/File_Handling.c **** if (fresult != FR_OK)
- 612:Src/File_Handling.c **** {
- 613:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 614:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- 615:Src/File_Handling.c **** //Send_Uart(buf);
- 616:Src/File_Handling.c **** free(buf);
- 617:Src/File_Handling.c **** }
- 618:Src/File_Handling.c ****
- 619:Src/File_Handling.c **** else
- 620:Src/File_Handling.c **** {
- 621:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 622:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 623:Src/File_Handling.c **** //Send_Uart(buf);
- 624:Src/File_Handling.c **** free(buf);
- 625:Src/File_Handling.c **** }
- 626:Src/File_Handling.c ****
- 627:Src/File_Handling.c **** /* Close file */
- 628:Src/File_Handling.c **** fresult = f_close(&fil);
- 629:Src/File_Handling.c **** if (fresult != FR_OK)
- 630:Src/File_Handling.c **** {
- 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- ARM GAS /tmp/ccnfjbri.s page 51
-
-
- 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 633:Src/File_Handling.c **** //Send_Uart(buf);
- 634:Src/File_Handling.c **** free(buf);
- 635:Src/File_Handling.c **** }
- 636:Src/File_Handling.c **** else
- 637:Src/File_Handling.c **** {
- 638:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 639:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 640:Src/File_Handling.c **** //Send_Uart(buf);
- 641:Src/File_Handling.c **** free(buf);
- 642:Src/File_Handling.c **** }
- 643:Src/File_Handling.c **** }
- 644:Src/File_Handling.c **** return fresult;
- 645:Src/File_Handling.c **** }
- 1930 .loc 1 645 1 view .LVU504
- 1931 0016 F8BD pop {r3, r4, r5, r6, r7, pc}
- 1932 .LVL195:
- 1933 .L106:
- 599:Src/File_Handling.c **** if (fresult != FR_OK)
- 1934 .loc 1 599 6 is_stmt 1 view .LVU505
- 599:Src/File_Handling.c **** if (fresult != FR_OK)
- 1935 .loc 1 599 16 is_stmt 0 view .LVU506
- 1936 0018 3222 movs r2, #50
- 1937 001a 2146 mov r1, r4
- 1938 001c 0D48 ldr r0, .L110+8
- 1939 001e FFF7FEFF bl f_open
- 1940 .LVL196:
- 599:Src/File_Handling.c **** if (fresult != FR_OK)
- 1941 .loc 1 599 14 discriminator 1 view .LVU507
- 1942 0022 0B4B ldr r3, .L110+4
- 1943 0024 1870 strb r0, [r3]
- 600:Src/File_Handling.c **** {
- 1944 .loc 1 600 6 is_stmt 1 view .LVU508
- 600:Src/File_Handling.c **** {
- 1945 .loc 1 600 9 is_stmt 0 view .LVU509
- 1946 0026 08B1 cbz r0, .L108
- 1947 .LBB31:
- 602:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 1948 .loc 1 602 7 is_stmt 1 view .LVU510
- 605:Src/File_Handling.c **** return fresult;
- 1949 .loc 1 605 10 view .LVU511
- 606:Src/File_Handling.c **** }
- 1950 .loc 1 606 10 view .LVU512
- 606:Src/File_Handling.c **** }
- 1951 .loc 1 606 17 is_stmt 0 view .LVU513
- 1952 0028 C0B2 uxtb r0, r0
- 1953 002a F4E7 b .L107
- 1954 .L108:
- 1955 .LBE31:
- 610:Src/File_Handling.c **** if (fresult != FR_OK)
- 1956 .loc 1 610 6 is_stmt 1 view .LVU514
- 610:Src/File_Handling.c **** if (fresult != FR_OK)
- 1957 .loc 1 610 16 is_stmt 0 view .LVU515
- 1958 002c 094F ldr r7, .L110+8
- 1959 002e 0A4B ldr r3, .L110+12
- 1960 0030 3246 mov r2, r6
- 1961 0032 2946 mov r1, r5
- ARM GAS /tmp/ccnfjbri.s page 52
-
-
- 1962 0034 3846 mov r0, r7
- 1963 0036 FFF7FEFF bl f_write
- 1964 .LVL197:
- 610:Src/File_Handling.c **** if (fresult != FR_OK)
- 1965 .loc 1 610 14 discriminator 1 view .LVU516
- 1966 003a 054C ldr r4, .L110+4
- 1967 .LVL198:
- 610:Src/File_Handling.c **** if (fresult != FR_OK)
- 1968 .loc 1 610 14 discriminator 1 view .LVU517
- 1969 003c 2070 strb r0, [r4]
- 611:Src/File_Handling.c **** {
- 1970 .loc 1 611 6 is_stmt 1 view .LVU518
- 621:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 1971 .loc 1 621 7 view .LVU519
- 624:Src/File_Handling.c **** }
- 1972 .loc 1 624 7 view .LVU520
- 628:Src/File_Handling.c **** if (fresult != FR_OK)
- 1973 .loc 1 628 6 view .LVU521
- 628:Src/File_Handling.c **** if (fresult != FR_OK)
- 1974 .loc 1 628 16 is_stmt 0 view .LVU522
- 1975 003e 3846 mov r0, r7
- 1976 0040 FFF7FEFF bl f_close
- 1977 .LVL199:
- 628:Src/File_Handling.c **** if (fresult != FR_OK)
- 1978 .loc 1 628 14 discriminator 1 view .LVU523
- 1979 0044 2070 strb r0, [r4]
- 629:Src/File_Handling.c **** {
- 1980 .loc 1 629 6 is_stmt 1 view .LVU524
- 638:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 1981 .loc 1 638 7 view .LVU525
- 641:Src/File_Handling.c **** }
- 1982 .loc 1 641 7 view .LVU526
- 644:Src/File_Handling.c **** }
- 1983 .loc 1 644 5 view .LVU527
- 644:Src/File_Handling.c **** }
- 1984 .loc 1 644 12 is_stmt 0 view .LVU528
- 1985 0046 C0B2 uxtb r0, r0
- 1986 0048 E5E7 b .L107
- 1987 .L111:
- 1988 004a 00BF .align 2
- 1989 .L110:
- 1990 004c 00000000 .word fno
- 1991 0050 00000000 .word fresult
- 1992 0054 00000000 .word fil
- 1993 0058 00000000 .word bw
- 1994 .cfi_endproc
- 1995 .LFE1200:
- 1997 .section .text.Update_File_byte,"ax",%progbits
- 1998 .align 1
- 1999 .global Update_File_byte
- 2000 .syntax unified
- 2001 .thumb
- 2002 .thumb_func
- 2004 Update_File_byte:
- 2005 .LVL200:
- 2006 .LFB1201:
- 646:Src/File_Handling.c ****
- ARM GAS /tmp/ccnfjbri.s page 53
-
-
- 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize)
- 648:Src/File_Handling.c **** {
- 2007 .loc 1 648 1 is_stmt 1 view -0
- 2008 .cfi_startproc
- 2009 @ args = 0, pretend = 0, frame = 0
- 2010 @ frame_needed = 0, uses_anonymous_args = 0
- 2011 .loc 1 648 1 is_stmt 0 view .LVU530
- 2012 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 2013 .LCFI20:
- 2014 .cfi_def_cfa_offset 24
- 2015 .cfi_offset 3, -24
- 2016 .cfi_offset 4, -20
- 2017 .cfi_offset 5, -16
- 2018 .cfi_offset 6, -12
- 2019 .cfi_offset 7, -8
- 2020 .cfi_offset 14, -4
- 2021 0002 0446 mov r4, r0
- 2022 0004 0D46 mov r5, r1
- 2023 0006 1646 mov r6, r2
- 649:Src/File_Handling.c **** /**** check whether the file exists or not ****/
- 650:Src/File_Handling.c **** fresult = f_stat (name, &fno);
- 2024 .loc 1 650 2 is_stmt 1 view .LVU531
- 2025 .loc 1 650 12 is_stmt 0 view .LVU532
- 2026 0008 1049 ldr r1, .L117
- 2027 .LVL201:
- 2028 .loc 1 650 12 view .LVU533
- 2029 000a FFF7FEFF bl f_stat
- 2030 .LVL202:
- 2031 .loc 1 650 10 discriminator 1 view .LVU534
- 2032 000e 104B ldr r3, .L117+4
- 2033 0010 1870 strb r0, [r3]
- 651:Src/File_Handling.c **** if (fresult != FR_OK)
- 2034 .loc 1 651 2 is_stmt 1 view .LVU535
- 2035 .loc 1 651 5 is_stmt 0 view .LVU536
- 2036 0012 08B1 cbz r0, .L113
- 2037 .LBB32:
- 652:Src/File_Handling.c **** {
- 653:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 2038 .loc 1 653 3 is_stmt 1 view .LVU537
- 654:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! *%s* does not exists\n\n", name);
- 655:Src/File_Handling.c **** //Send_Uart (buf);
- 656:Src/File_Handling.c **** free(buf);
- 2039 .loc 1 656 3 view .LVU538
- 657:Src/File_Handling.c **** return fresult;
- 2040 .loc 1 657 6 view .LVU539
- 2041 .loc 1 657 13 is_stmt 0 view .LVU540
- 2042 0014 C0B2 uxtb r0, r0
- 2043 .LVL203:
- 2044 .L114:
- 2045 .loc 1 657 13 view .LVU541
- 2046 .LBE32:
- 658:Src/File_Handling.c **** }
- 659:Src/File_Handling.c ****
- 660:Src/File_Handling.c **** else
- 661:Src/File_Handling.c **** {
- 662:Src/File_Handling.c **** /* Create a file with read write access and open it */
- 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
- ARM GAS /tmp/ccnfjbri.s page 54
-
-
- 664:Src/File_Handling.c **** if (fresult != FR_OK)
- 665:Src/File_Handling.c **** {
- 666:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 667:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 668:Src/File_Handling.c **** //Send_Uart(buf);
- 669:Src/File_Handling.c **** free(buf);
- 670:Src/File_Handling.c **** return fresult;
- 671:Src/File_Handling.c **** }
- 672:Src/File_Handling.c ****
- 673:Src/File_Handling.c **** /* Writing text */
- 674:Src/File_Handling.c **** fresult = f_write(&fil, data, bytesize, &bw);
- 675:Src/File_Handling.c **** if (fresult != FR_OK)
- 676:Src/File_Handling.c **** {
- 677:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 678:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in writing file *%s*\n\n", fresult, name);
- 679:Src/File_Handling.c **** //Send_Uart(buf);
- 680:Src/File_Handling.c **** free(buf);
- 681:Src/File_Handling.c **** }
- 682:Src/File_Handling.c ****
- 683:Src/File_Handling.c **** else
- 684:Src/File_Handling.c **** {
- 685:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 686:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 687:Src/File_Handling.c **** //Send_Uart(buf);
- 688:Src/File_Handling.c **** free(buf);
- 689:Src/File_Handling.c **** }
- 690:Src/File_Handling.c ****
- 691:Src/File_Handling.c **** /* Close file */
- 692:Src/File_Handling.c **** fresult = f_close(&fil);
- 693:Src/File_Handling.c **** if (fresult != FR_OK)
- 694:Src/File_Handling.c **** {
- 695:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 696:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
- 697:Src/File_Handling.c **** //Send_Uart(buf);
- 698:Src/File_Handling.c **** free(buf);
- 699:Src/File_Handling.c **** }
- 700:Src/File_Handling.c **** else
- 701:Src/File_Handling.c **** {
- 702:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
- 703:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 704:Src/File_Handling.c **** //Send_Uart(buf);
- 705:Src/File_Handling.c **** free(buf);
- 706:Src/File_Handling.c **** }
- 707:Src/File_Handling.c **** }
- 708:Src/File_Handling.c **** return fresult;
- 709:Src/File_Handling.c **** }
- 2047 .loc 1 709 1 view .LVU542
- 2048 0016 F8BD pop {r3, r4, r5, r6, r7, pc}
- 2049 .LVL204:
- 2050 .L113:
- 663:Src/File_Handling.c **** if (fresult != FR_OK)
- 2051 .loc 1 663 6 is_stmt 1 view .LVU543
- 663:Src/File_Handling.c **** if (fresult != FR_OK)
- 2052 .loc 1 663 16 is_stmt 0 view .LVU544
- 2053 0018 3222 movs r2, #50
- 2054 001a 2146 mov r1, r4
- 2055 001c 0D48 ldr r0, .L117+8
- ARM GAS /tmp/ccnfjbri.s page 55
-
-
- 2056 001e FFF7FEFF bl f_open
- 2057 .LVL205:
- 663:Src/File_Handling.c **** if (fresult != FR_OK)
- 2058 .loc 1 663 14 discriminator 1 view .LVU545
- 2059 0022 0B4B ldr r3, .L117+4
- 2060 0024 1870 strb r0, [r3]
- 664:Src/File_Handling.c **** {
- 2061 .loc 1 664 6 is_stmt 1 view .LVU546
- 664:Src/File_Handling.c **** {
- 2062 .loc 1 664 9 is_stmt 0 view .LVU547
- 2063 0026 08B1 cbz r0, .L115
- 2064 .LBB33:
- 666:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
- 2065 .loc 1 666 7 is_stmt 1 view .LVU548
- 669:Src/File_Handling.c **** return fresult;
- 2066 .loc 1 669 10 view .LVU549
- 670:Src/File_Handling.c **** }
- 2067 .loc 1 670 10 view .LVU550
- 670:Src/File_Handling.c **** }
- 2068 .loc 1 670 17 is_stmt 0 view .LVU551
- 2069 0028 C0B2 uxtb r0, r0
- 2070 002a F4E7 b .L114
- 2071 .L115:
- 2072 .LBE33:
- 674:Src/File_Handling.c **** if (fresult != FR_OK)
- 2073 .loc 1 674 6 is_stmt 1 view .LVU552
- 674:Src/File_Handling.c **** if (fresult != FR_OK)
- 2074 .loc 1 674 16 is_stmt 0 view .LVU553
- 2075 002c 094F ldr r7, .L117+8
- 2076 002e 0A4B ldr r3, .L117+12
- 2077 0030 3246 mov r2, r6
- 2078 0032 2946 mov r1, r5
- 2079 0034 3846 mov r0, r7
- 2080 0036 FFF7FEFF bl f_write
- 2081 .LVL206:
- 674:Src/File_Handling.c **** if (fresult != FR_OK)
- 2082 .loc 1 674 14 discriminator 1 view .LVU554
- 2083 003a 054C ldr r4, .L117+4
- 2084 .LVL207:
- 674:Src/File_Handling.c **** if (fresult != FR_OK)
- 2085 .loc 1 674 14 discriminator 1 view .LVU555
- 2086 003c 2070 strb r0, [r4]
- 675:Src/File_Handling.c **** {
- 2087 .loc 1 675 6 is_stmt 1 view .LVU556
- 685:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
- 2088 .loc 1 685 7 view .LVU557
- 688:Src/File_Handling.c **** }
- 2089 .loc 1 688 7 view .LVU558
- 692:Src/File_Handling.c **** if (fresult != FR_OK)
- 2090 .loc 1 692 6 view .LVU559
- 692:Src/File_Handling.c **** if (fresult != FR_OK)
- 2091 .loc 1 692 16 is_stmt 0 view .LVU560
- 2092 003e 3846 mov r0, r7
- 2093 0040 FFF7FEFF bl f_close
- 2094 .LVL208:
- 692:Src/File_Handling.c **** if (fresult != FR_OK)
- 2095 .loc 1 692 14 discriminator 1 view .LVU561
- ARM GAS /tmp/ccnfjbri.s page 56
-
-
- 2096 0044 2070 strb r0, [r4]
- 693:Src/File_Handling.c **** {
- 2097 .loc 1 693 6 is_stmt 1 view .LVU562
- 702:Src/File_Handling.c **** //sprintf (buf, "File *%s* CLOSED successfully\n", name);
- 2098 .loc 1 702 7 view .LVU563
- 705:Src/File_Handling.c **** }
- 2099 .loc 1 705 7 view .LVU564
- 708:Src/File_Handling.c **** }
- 2100 .loc 1 708 5 view .LVU565
- 708:Src/File_Handling.c **** }
- 2101 .loc 1 708 12 is_stmt 0 view .LVU566
- 2102 0046 C0B2 uxtb r0, r0
- 2103 0048 E5E7 b .L114
- 2104 .L118:
- 2105 004a 00BF .align 2
- 2106 .L117:
- 2107 004c 00000000 .word fno
- 2108 0050 00000000 .word fresult
- 2109 0054 00000000 .word fil
- 2110 0058 00000000 .word bw
- 2111 .cfi_endproc
- 2112 .LFE1201:
- 2114 .global free_space
- 2115 .section .bss.free_space,"aw",%nobits
- 2116 .align 2
- 2119 free_space:
- 2120 0000 00000000 .space 4
- 2121 .global total
- 2122 .section .bss.total,"aw",%nobits
- 2123 .align 2
- 2126 total:
- 2127 0000 00000000 .space 4
- 2128 .global fre_clust
- 2129 .section .bss.fre_clust,"aw",%nobits
- 2130 .align 2
- 2133 fre_clust:
- 2134 0000 00000000 .space 4
- 2135 .global pfs
- 2136 .section .bss.pfs,"aw",%nobits
- 2137 .align 2
- 2140 pfs:
- 2141 0000 00000000 .space 4
- 2142 .global bw
- 2143 .section .bss.bw,"aw",%nobits
- 2144 .align 2
- 2147 bw:
- 2148 0000 00000000 .space 4
- 2149 .global br
- 2150 .section .bss.br,"aw",%nobits
- 2151 .align 2
- 2154 br:
- 2155 0000 00000000 .space 4
- 2156 .global fno
- 2157 .section .bss.fno,"aw",%nobits
- 2158 .align 2
- 2161 fno:
- 2162 0000 00000000 .space 24
- ARM GAS /tmp/ccnfjbri.s page 57
-
-
- 2162 00000000
- 2162 00000000
- 2162 00000000
- 2162 00000000
- 2163 .global fil
- 2164 .section .bss.fil,"aw",%nobits
- 2165 .align 2
- 2168 fil:
- 2169 0000 00000000 .space 4144
- 2169 00000000
- 2169 00000000
- 2169 00000000
- 2169 00000000
- 2170 .global fs
- 2171 .section .bss.fs,"aw",%nobits
- 2172 .align 2
- 2175 fs:
- 2176 0000 00000000 .space 4148
- 2176 00000000
- 2176 00000000
- 2176 00000000
- 2176 00000000
- 2177 .text
- 2178 .Letext0:
- 2179 .file 2 "Middlewares/Third_Party/FatFs/src/integer.h"
- 2180 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 2181 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stddef.h"
- 2182 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
- 2183 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
- 2184 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 2185 .file 8 "Middlewares/Third_Party/FatFs/src/ff.h"
- 2186 .file 9 "/usr/include/newlib/string.h"
- 2187 .file 10 "/usr/include/newlib/stdio.h"
- 2188 .file 11 "/usr/include/newlib/stdlib.h"
- 2189 .file 12 ""
- ARM GAS /tmp/ccnfjbri.s page 58
-
-
-DEFINED SYMBOLS
- *ABS*:00000000 File_Handling.c
- /tmp/ccnfjbri.s:20 .text.Send_Uart:00000000 $t
- /tmp/ccnfjbri.s:26 .text.Send_Uart:00000000 Send_Uart
- /tmp/ccnfjbri.s:40 .text.Mount_SD:00000000 $t
- /tmp/ccnfjbri.s:46 .text.Mount_SD:00000000 Mount_SD
- /tmp/ccnfjbri.s:86 .text.Mount_SD:0000001c $d
- /tmp/ccnfjbri.s:2175 .bss.fs:00000000 fs
- /tmp/ccnfjbri.s:92 .text.Unmount_SD:00000000 $t
- /tmp/ccnfjbri.s:98 .text.Unmount_SD:00000000 Unmount_SD
- /tmp/ccnfjbri.s:138 .text.Unmount_SD:0000001c $d
- /tmp/ccnfjbri.s:143 .rodata.Scan_SD.str1.4:00000000 $d
- /tmp/ccnfjbri.s:156 .text.Scan_SD:00000000 $t
- /tmp/ccnfjbri.s:162 .text.Scan_SD:00000000 Scan_SD
- /tmp/ccnfjbri.s:344 .text.Scan_SD:000000b8 $d
- /tmp/ccnfjbri.s:2161 .bss.fno:00000000 fno
- /tmp/ccnfjbri.s:355 .rodata.Format_SD.str1.4:00000000 $d
- /tmp/ccnfjbri.s:359 .text.Format_SD:00000000 $t
- /tmp/ccnfjbri.s:365 .text.Format_SD:00000000 Format_SD
- /tmp/ccnfjbri.s:485 .text.Format_SD:00000078 $d
- /tmp/ccnfjbri.s:494 .text.Write_File:00000000 $t
- /tmp/ccnfjbri.s:500 .text.Write_File:00000000 Write_File
- /tmp/ccnfjbri.s:604 .text.Write_File:00000050 $d
- /tmp/ccnfjbri.s:2168 .bss.fil:00000000 fil
- /tmp/ccnfjbri.s:2147 .bss.bw:00000000 bw
- /tmp/ccnfjbri.s:612 .text.Write_File_byte:00000000 $t
- /tmp/ccnfjbri.s:618 .text.Write_File_byte:00000000 Write_File_byte
- /tmp/ccnfjbri.s:721 .text.Write_File_byte:0000004c $d
- /tmp/ccnfjbri.s:729 .rodata.Read_File.str1.4:00000000 $d
- /tmp/ccnfjbri.s:745 .text.Read_File:00000000 $t
- /tmp/ccnfjbri.s:751 .text.Read_File:00000000 Read_File
- /tmp/ccnfjbri.s:976 .text.Read_File:000000e4 $d
- /tmp/ccnfjbri.s:2154 .bss.br:00000000 br
- /tmp/ccnfjbri.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d
- /tmp/ccnfjbri.s:995 .text.Seek_Read_File:00000000 $t
- /tmp/ccnfjbri.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File
- /tmp/ccnfjbri.s:1271 .text.Seek_Read_File:0000011c $d
- /tmp/ccnfjbri.s:1287 .text.Create_File:00000000 $t
- /tmp/ccnfjbri.s:1293 .text.Create_File:00000000 Create_File
- /tmp/ccnfjbri.s:1372 .text.Create_File:00000038 $d
- /tmp/ccnfjbri.s:1379 .text.Update_File:00000000 $t
- /tmp/ccnfjbri.s:1385 .text.Update_File:00000000 Update_File
- /tmp/ccnfjbri.s:1489 .text.Update_File:00000050 $d
- /tmp/ccnfjbri.s:1497 .rodata.Remove_File.str1.4:00000000 $d
- /tmp/ccnfjbri.s:1507 .text.Remove_File:00000000 $t
- /tmp/ccnfjbri.s:1513 .text.Remove_File:00000000 Remove_File
- /tmp/ccnfjbri.s:1632 .text.Remove_File:00000070 $d
- /tmp/ccnfjbri.s:1642 .rodata.Create_Dir.str1.4:00000000 $d
- /tmp/ccnfjbri.s:1649 .text.Create_Dir:00000000 $t
- /tmp/ccnfjbri.s:1655 .text.Create_Dir:00000000 Create_Dir
- /tmp/ccnfjbri.s:1734 .text.Create_Dir:00000048 $d
- /tmp/ccnfjbri.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d
- /tmp/ccnfjbri.s:1752 .text.Check_SD_Space:00000000 $t
- /tmp/ccnfjbri.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space
- /tmp/ccnfjbri.s:1870 .text.Check_SD_Space:00000094 $d
- /tmp/ccnfjbri.s:2140 .bss.pfs:00000000 pfs
- /tmp/ccnfjbri.s:2133 .bss.fre_clust:00000000 fre_clust
- ARM GAS /tmp/ccnfjbri.s page 59
-
-
- /tmp/ccnfjbri.s:2126 .bss.total:00000000 total
- /tmp/ccnfjbri.s:2119 .bss.free_space:00000000 free_space
- /tmp/ccnfjbri.s:1881 .text.Update_File_float:00000000 $t
- /tmp/ccnfjbri.s:1887 .text.Update_File_float:00000000 Update_File_float
- /tmp/ccnfjbri.s:1990 .text.Update_File_float:0000004c $d
- /tmp/ccnfjbri.s:1998 .text.Update_File_byte:00000000 $t
- /tmp/ccnfjbri.s:2004 .text.Update_File_byte:00000000 Update_File_byte
- /tmp/ccnfjbri.s:2107 .text.Update_File_byte:0000004c $d
- /tmp/ccnfjbri.s:2116 .bss.free_space:00000000 $d
- /tmp/ccnfjbri.s:2123 .bss.total:00000000 $d
- /tmp/ccnfjbri.s:2130 .bss.fre_clust:00000000 $d
- /tmp/ccnfjbri.s:2137 .bss.pfs:00000000 $d
- /tmp/ccnfjbri.s:2144 .bss.bw:00000000 $d
- /tmp/ccnfjbri.s:2151 .bss.br:00000000 $d
- /tmp/ccnfjbri.s:2158 .bss.fno:00000000 $d
- /tmp/ccnfjbri.s:2165 .bss.fil:00000000 $d
- /tmp/ccnfjbri.s:2172 .bss.fs:00000000 $d
-
-UNDEFINED SYMBOLS
-f_mount
-fresult
-malloc
-strcpy
-f_opendir
-sprintf
-free
-f_readdir
-strcmp
-strlen
-f_closedir
-f_unlink
-f_stat
-f_open
-f_write
-f_close
-f_read
-f_lseek
-sizeoffile
-f_mkdir
-f_getfree
diff --git a/build/File_Handling.o b/build/File_Handling.o
deleted file mode 100644
index 3541d66..0000000
Binary files a/build/File_Handling.o and /dev/null differ
diff --git a/build/For_stm32.bin b/build/For_stm32.bin
index 5a4c5d7..c1d6641 100755
Binary files a/build/For_stm32.bin and b/build/For_stm32.bin differ
diff --git a/build/For_stm32.elf b/build/For_stm32.elf
index 44553b3..3951cb2 100755
Binary files a/build/For_stm32.elf and b/build/For_stm32.elf differ
diff --git a/build/For_stm32.hex b/build/For_stm32.hex
index 89ec685..3dcff7e 100644
--- a/build/For_stm32.hex
+++ b/build/For_stm32.hex
@@ -1,3102 +1,4423 @@
:020000040800F2
-:1000000000000820BDBC00089D4C00089F4C000863
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diff --git a/build/For_stm32.map b/build/For_stm32.map
index 58addc3..79007bd 100644
--- a/build/For_stm32.map
+++ b/build/For_stm32.map
@@ -1,75 +1,139 @@
Archive member included to satisfy reference by file (symbol)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
- build/File_Handling.o (sprintf)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcpy.o)
- build/File_Handling.o (strcpy)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strchr.o)
+ build/profile_repository.o (strchr)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+ build/profile_repository.o (strtof)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) (_impure_ptr)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) (_svfprintf_r)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (_impure_ptr)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (__gethex)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
+ build/profile_repository.o (strtoul)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
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/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strlen.o)
- build/File_Handling.o (strlen)
+ build/profile_repository.o (strlen)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcasecmp.o)
+ build/profile_repository.o (strcasecmp)
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/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
build/sysmem.o (__errno)
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+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (__global_locale)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+ build/app_core.o (strtol)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncpy.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncmp.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcmp.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
+ build/profile_repository.o (strpbrk)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ build/profile_repository.o (_ctype_)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o) (__assert_func)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (_Balloc)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o) (_svfprintf_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o) (abort)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) (_fflush_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o) (_calloc_r)
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+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) (_fwalk_sglue)
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- build/File_Handling.o (malloc)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o) (malloc)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
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/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) (__malloc_lock)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcmp.o)
- build/File_Handling.o (strcmp)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o (exit)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o (atexit)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o (__libc_fini_array)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o) (_vfprintf_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o) (__swbuf_r)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) (_sbrk_r)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) (_malloc_usable_size_r)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o) (__stdio_exit_handler)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) (_fflush_r)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) (_fwalk_sglue)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o) (__register_exitproc)
-/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) (errno)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) (__sread)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) (_malloc_usable_size_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o) (__sfvwrite_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o) (raise)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o) (_close_r)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o) (__call_exitprocs)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o) (__swsetup_r)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o) (_read_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) (errno)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o) (__smakebuf_r)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o) (_lseek_r)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o) (_write_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o) (_isatty_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o) (_kill_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o) (_fstat_r)
+/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (__aeabi_l2d)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
build/stm32f7xx_hal_rcc.o (__aeabi_uldivmod)
+/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o) (__aeabi_d2lz)
+/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o) (__aeabi_d2ulz)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) (__udivmoddi4)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
@@ -100,12 +164,11 @@ Discarded input sections
.text 0x00000000 0x0 build/main.o
.data 0x00000000 0x0 build/main.o
.bss 0x00000000 0x0 build/main.o
- .text.Advanced_Controller_Temp
- 0x00000000 0xe4 build/main.o
- .bss.temp32 0x00000000 0x4 build/main.o
.text 0x00000000 0x0 build/bsp_driver_sd.o
.data 0x00000000 0x0 build/bsp_driver_sd.o
.bss 0x00000000 0x0 build/bsp_driver_sd.o
+ .text.BSP_SD_GetDebugInfo
+ 0x00000000 0x38 build/bsp_driver_sd.o
.text.BSP_SD_ITConfig
0x00000000 0x4 build/bsp_driver_sd.o
.text.BSP_SD_ReadBlocks_DMA
@@ -129,11 +192,14 @@ Discarded input sections
.text 0x00000000 0x0 build/sd_diskio.o
.data 0x00000000 0x0 build/sd_diskio.o
.bss 0x00000000 0x0 build/sd_diskio.o
+ .text.sd_diskio_debug_get_last_initialize_status
+ 0x00000000 0xc build/sd_diskio.o
+ .text.sd_diskio_debug_get_last_status_result
+ 0x00000000 0xc build/sd_diskio.o
.text 0x00000000 0x0 build/fatfs.o
.data 0x00000000 0x0 build/fatfs.o
.bss 0x00000000 0x0 build/fatfs.o
.bss.SDFile 0x00000000 0x1030 build/fatfs.o
- .bss.SDFatFS 0x00000000 0x1034 build/fatfs.o
.text 0x00000000 0x0 build/fatfs_platform.o
.data 0x00000000 0x0 build/fatfs_platform.o
.bss 0x00000000 0x0 build/fatfs_platform.o
@@ -151,6 +217,63 @@ Discarded input sections
0x00000000 0x90 build/stm32f7xx_hal_msp.o
.text.HAL_UART_MspDeInit
0x00000000 0x2c build/stm32f7xx_hal_msp.o
+ .text 0x00000000 0x0 build/app_core.o
+ .data 0x00000000 0x0 build/app_core.o
+ .bss 0x00000000 0x0 build/app_core.o
+ .text 0x00000000 0x0 build/app_uart_protocol.o
+ .data 0x00000000 0x0 build/app_uart_protocol.o
+ .bss 0x00000000 0x0 build/app_uart_protocol.o
+ .text 0x00000000 0x0 build/board_io.o
+ .data 0x00000000 0x0 build/board_io.o
+ .bss 0x00000000 0x0 build/board_io.o
+ .text.board_io_is_usb_connected
+ 0x00000000 0x1c build/board_io.o
+ .text.board_io_write_signal
+ 0x00000000 0x8 build/board_io.o
+ .text 0x00000000 0x0 build/uart_transport.o
+ .data 0x00000000 0x0 build/uart_transport.o
+ .bss 0x00000000 0x0 build/uart_transport.o
+ .text.uart_transport_is_dma_busy
+ 0x00000000 0x10 build/uart_transport.o
+ .text 0x00000000 0x0 build/laser_dac.o
+ .data 0x00000000 0x0 build/laser_dac.o
+ .bss 0x00000000 0x0 build/laser_dac.o
+ .text 0x00000000 0x0 build/adc_mux.o
+ .data 0x00000000 0x0 build/adc_mux.o
+ .bss 0x00000000 0x0 build/adc_mux.o
+ .text 0x00000000 0x0 build/stm32_dac_output.o
+ .data 0x00000000 0x0 build/stm32_dac_output.o
+ .bss 0x00000000 0x0 build/stm32_dac_output.o
+ .text 0x00000000 0x0 build/ad9833_device.o
+ .data 0x00000000 0x0 build/ad9833_device.o
+ .bss 0x00000000 0x0 build/ad9833_device.o
+ .text 0x00000000 0x0 build/ds1809_device.o
+ .data 0x00000000 0x0 build/ds1809_device.o
+ .bss 0x00000000 0x0 build/ds1809_device.o
+ .text 0x00000000 0x0 build/ad9102_device.o
+ .data 0x00000000 0x0 build/ad9102_device.o
+ .bss 0x00000000 0x0 build/ad9102_device.o
+ .text 0x00000000 0x0 build/lcd1602_display.o
+ .data 0x00000000 0x0 build/lcd1602_display.o
+ .bss 0x00000000 0x0 build/lcd1602_display.o
+ .text 0x00000000 0x0 build/telemetry.o
+ .data 0x00000000 0x0 build/telemetry.o
+ .bss 0x00000000 0x0 build/telemetry.o
+ .text 0x00000000 0x0 build/temperature_control.o
+ .data 0x00000000 0x0 build/temperature_control.o
+ .bss 0x00000000 0x0 build/temperature_control.o
+ .text 0x00000000 0x0 build/storage_sd.o
+ .data 0x00000000 0x0 build/storage_sd.o
+ .bss 0x00000000 0x0 build/storage_sd.o
+ .text 0x00000000 0x0 build/profile_repository.o
+ .data 0x00000000 0x0 build/profile_repository.o
+ .bss 0x00000000 0x0 build/profile_repository.o
+ .text 0x00000000 0x0 build/profile_storage.o
+ .data 0x00000000 0x0 build/profile_storage.o
+ .bss 0x00000000 0x0 build/profile_storage.o
+ .text 0x00000000 0x0 build/ui_status.o
+ .data 0x00000000 0x0 build/ui_status.o
+ .bss 0x00000000 0x0 build/ui_status.o
.text 0x00000000 0x0 build/stm32f7xx_hal_adc.o
.data 0x00000000 0x0 build/stm32f7xx_hal_adc.o
.bss 0x00000000 0x0 build/stm32f7xx_hal_adc.o
@@ -988,6 +1111,10 @@ Discarded input sections
0x00000000 0x30 build/stm32f7xx_ll_sdmmc.o
.text.SDMMC_CmdErase
0x00000000 0x30 build/stm32f7xx_ll_sdmmc.o
+ .text.SDMMC_CmdBusWidth
+ 0x00000000 0x30 build/stm32f7xx_ll_sdmmc.o
+ .text.SDMMC_CmdSendSCR
+ 0x00000000 0x30 build/stm32f7xx_ll_sdmmc.o
.text.SDMMC_CmdSetRelAddMmc
0x00000000 0x32 build/stm32f7xx_ll_sdmmc.o
.text.SDMMC_CmdStatusRegister
@@ -1011,6 +1138,12 @@ Discarded input sections
0x00000000 0x48 build/stm32f7xx_hal_sd.o
.text.SD_SendSDStatus
0x00000000 0x106 build/stm32f7xx_hal_sd.o
+ .text.SD_FindSCR
+ 0x00000000 0x100 build/stm32f7xx_hal_sd.o
+ .text.SD_WideBus_Enable
+ 0x00000000 0x4e build/stm32f7xx_hal_sd.o
+ .text.SD_WideBus_Disable
+ 0x00000000 0x4e build/stm32f7xx_hal_sd.o
.text.HAL_SD_MspInit
0x00000000 0x2 build/stm32f7xx_hal_sd.o
.text.HAL_SD_MspDeInit
@@ -1045,6 +1178,8 @@ Discarded input sections
0x00000000 0x58 build/stm32f7xx_hal_sd.o
.text.HAL_SD_GetCardStatus
0x00000000 0xac build/stm32f7xx_hal_sd.o
+ .text.HAL_SD_ConfigWideBusOperation
+ 0x00000000 0xc0 build/stm32f7xx_hal_sd.o
.text.SD_DMAError
0x00000000 0x68 build/stm32f7xx_hal_sd.o
.text.SD_DMATxAbort
@@ -1089,6 +1224,12 @@ Discarded input sections
0x00000000 0x66 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_Base_Start
0x00000000 0x88 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Stop
+ 0x00000000 0x28 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Start_IT
+ 0x00000000 0x90 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_Base_Stop_IT
+ 0x00000000 0x32 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_Base_Start_DMA
0x00000000 0xdc build/stm32f7xx_hal_tim.o
.text.HAL_TIM_Base_Stop_DMA
@@ -1139,24 +1280,36 @@ Discarded input sections
0x00000000 0x10 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_ReadCapturedValue
0x00000000 0x32 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PeriodElapsedCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMAPeriodElapsedCplt
0x00000000 0x16 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_PeriodElapsedHalfCpltCallback
0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMAPeriodElapsedHalfCplt
0x00000000 0xa build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_OC_DelayElapsedCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IC_CaptureCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMACaptureCplt
0x00000000 0x80 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_IC_CaptureHalfCpltCallback
0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMACaptureHalfCplt
0x00000000 0x3e build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_PulseFinishedCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMADelayPulseCplt
0x00000000 0x70 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback
0x00000000 0x2 build/stm32f7xx_hal_tim.o
.text.TIM_DMADelayPulseHalfCplt
0x00000000 0x3e build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_TriggerCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_IRQHandler
+ 0x00000000 0x17a build/stm32f7xx_hal_tim.o
.text.TIM_DMATriggerCplt
0x00000000 0x16 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_TriggerHalfCpltCallback
@@ -1221,6 +1374,8 @@ Discarded input sections
0x00000000 0x31c build/stm32f7xx_hal_tim.o
.text.HAL_TIM_OC_Stop_DMA
0x00000000 0x118 build/stm32f7xx_hal_tim.o
+ .text.HAL_TIM_PWM_Stop
+ 0x00000000 0xac build/stm32f7xx_hal_tim.o
.text.HAL_TIM_PWM_Start_IT
0x00000000 0x1c4 build/stm32f7xx_hal_tim.o
.text.HAL_TIM_PWM_Stop_IT
@@ -1328,18 +1483,26 @@ Discarded input sections
0x00000000 0x76 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_ConfigCommutEvent_DMA
0x00000000 0x94 build/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_MasterConfigSynchronization
+ 0x00000000 0xa0 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_ConfigBreakInput
0x00000000 0xa4 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_RemapConfig
0x00000000 0x24 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_GroupChannel5
0x00000000 0x3e build/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_CommutCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim_ex.o
.text.TIMEx_DMACommutationCplt
0x00000000 0x10 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_CommutHalfCpltCallback
0x00000000 0x2 build/stm32f7xx_hal_tim_ex.o
.text.TIMEx_DMACommutationHalfCplt
0x00000000 0x10 build/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_BreakCallback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim_ex.o
+ .text.HAL_TIMEx_Break2Callback
+ 0x00000000 0x2 build/stm32f7xx_hal_tim_ex.o
.text.HAL_TIMEx_HallSensor_GetState
0x00000000 0x6 build/stm32f7xx_hal_tim_ex.o
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.text.SystemCoreClockUpdate
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.text.f_rename
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.data 0x00000000 0x0 build/syscall.o
.bss 0x00000000 0x0 build/syscall.o
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.debug_aranges
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.text.initialise_monitor_handles
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.text 0x00000000 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
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@@ -1803,6 +1867,11 @@ Discarded input sections
.debug_frame 0x00000000 0x28 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
.ARM.attributes
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+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
+ .text 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
.text 0x00000000 0xc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
@@ -1818,6 +1887,10 @@ Discarded input sections
.debug_frame 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
.ARM.attributes
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+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
.text 0x00000000 0x28 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
@@ -1833,44 +1906,39 @@ Discarded input sections
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.ARM.attributes
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.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
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.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
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+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
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+ .ARM.extab 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
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+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
.text 0x00000000 0xac /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
.data 0x00000000 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
.bss 0x00000000 0x8c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
@@ -1886,38 +1954,28 @@ Discarded input sections
.debug_frame 0x00000000 0x38 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
.ARM.attributes
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- .text 0x00000000 0xd4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
- .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
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+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
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- .debug_abbrev 0x00000000 0x224 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
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- .debug_aranges
- 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
- .debug_line 0x00000000 0x22b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
- .debug_str 0x00000000 0x52c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
- .comment 0x00000000 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
- .debug_frame 0x00000000 0x8c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
- .ARM.attributes
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- .text 0x00000000 0x24 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_info 0x00000000 0x752 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_abbrev 0x00000000 0x1b0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_loclists
- 0x00000000 0x4b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_aranges
- 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_line 0x00000000 0x193 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_str 0x00000000 0x4b5 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .comment 0x00000000 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .debug_frame 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
- .ARM.attributes
- 0x00000000 0x32 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
.text 0x00000000 0xc4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
.bss 0x00000000 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
@@ -1935,53 +1993,32 @@ Discarded input sections
.debug_frame 0x00000000 0x40 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
.ARM.attributes
0x00000000 0x32 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
- .text 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_info 0x00000000 0x7b5 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_abbrev 0x00000000 0x1b0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_loclists
- 0x00000000 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_aranges
- 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_line 0x00000000 0x198 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_str 0x00000000 0x4c3 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .comment 0x00000000 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .debug_frame 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
- .ARM.attributes
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- .text 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
+ .text 0x00000000 0xd4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_info 0x00000000 0x79e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_abbrev 0x00000000 0x1c4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_loclists
- 0x00000000 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_aranges
- 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_line 0x00000000 0x199 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_str 0x00000000 0x4c3 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .comment 0x00000000 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .debug_frame 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .ARM.attributes
- 0x00000000 0x32 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
- .text 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_info 0x00000000 0x7bb /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_abbrev 0x00000000 0x1b5 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_loclists
- 0x00000000 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_aranges
- 0x00000000 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_line 0x00000000 0x199 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_str 0x00000000 0x4c5 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .comment 0x00000000 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .debug_frame 0x00000000 0x2c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
- .ARM.attributes
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+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+ .data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
+ .bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
.data 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
.bss 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
.ARM.extab 0x00000000 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
@@ -2015,6 +2052,23 @@ LOAD build/fatfs.o
LOAD build/fatfs_platform.o
LOAD build/stm32f7xx_it.o
LOAD build/stm32f7xx_hal_msp.o
+LOAD build/app_core.o
+LOAD build/app_uart_protocol.o
+LOAD build/board_io.o
+LOAD build/uart_transport.o
+LOAD build/laser_dac.o
+LOAD build/adc_mux.o
+LOAD build/stm32_dac_output.o
+LOAD build/ad9833_device.o
+LOAD build/ds1809_device.o
+LOAD build/ad9102_device.o
+LOAD build/lcd1602_display.o
+LOAD build/telemetry.o
+LOAD build/temperature_control.o
+LOAD build/storage_sd.o
+LOAD build/profile_repository.o
+LOAD build/profile_storage.o
+LOAD build/ui_status.o
LOAD build/stm32f7xx_hal_adc.o
LOAD build/stm32f7xx_hal_adc_ex.o
LOAD build/stm32f7xx_hal_rcc.o
@@ -2044,7 +2098,6 @@ LOAD build/stm32f7xx_hal_tim_ex.o
LOAD build/stm32f7xx_ll_tim.o
LOAD build/stm32f7xx_ll_usart.o
LOAD build/system_stm32f7xx.o
-LOAD build/File_Handling.o
LOAD build/diskio.o
LOAD build/ff.o
LOAD build/ff_gen_drv.o
@@ -2078,1289 +2131,1651 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
0x08000000 g_pfnVectors
0x080001f8 . = ALIGN (0x4)
-.text 0x08000200 0xbb28
+.text 0x08000200 0x10534
0x08000200 . = ALIGN (0x4)
*(.text)
.text 0x08000200 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
- .text 0x08000288 0x80 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
- 0x08000288 _siprintf_r
- 0x08000288 _sprintf_r
- 0x080002c4 sprintf
- 0x080002c4 siprintf
- .text 0x08000308 0x400 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
- 0x08000308 __ssputs_r
- 0x080003c8 __ssprint_r
- 0x080004d0 _svfprintf_r
- 0x080004d0 _svfiprintf_r
- .text 0x08000708 0x50 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
- 0x08000708 __libc_init_array
- .text 0x08000758 0xa4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o)
- 0x08000758 memset
- .text 0x080007fc 0xc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
- 0x080007fc __errno
- .text 0x08000808 0x148 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
- 0x08000850 _malloc_r
- .text 0x08000950 0xbc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
- 0x08000950 _free_r
- .text 0x08000a0c 0x100 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o)
- 0x08000a0c memmove
- *fill* 0x08000b0c 0x4
- .text 0x08000b10 0xa0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
- 0x08000b10 memchr
- .text 0x08000bb0 0x134 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
- 0x08000bb0 memcpy
- .text 0x08000ce4 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
- 0x08000ce4 malloc
- 0x08000cf4 free
- .text 0x08000d04 0x64 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
- 0x08000d04 _realloc_r
- .text 0x08000d68 0x3a8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
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.text.SDMMC_Init
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.text.SDMMC_CmdStopTransfer
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.text.SDMMC_CmdSendCID
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.text.SDMMC_CmdSendCSD
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.text.SDMMC_CmdAppOperCommand
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.text.SDMMC_CmdSetRelAdd
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.text.SDMMC_GetCmdResp7
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.text.SD_SendStatus
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.text.HAL_SD_WriteBlocks
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.text.HAL_SD_GetCardCSD
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.text.SD_InitCard
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.text.HAL_SD_InitCard
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.text.HAL_SD_Init
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.text.LL_SPI_Init
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.text.TIM_OC1_SetConfig
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.text.TIM_Base_SetConfig
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.text.HAL_TIM_Base_Init
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.text.HAL_TIM_PWM_Init
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.text.TIM_OC2_SetConfig
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.text.HAL_TIM_PWM_ConfigChannel
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.text.HAL_TIM_ConfigClockSource
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.text.LL_TIM_Init
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- 0x0800b53a f_unlink
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.text.FATFS_LinkDriverEx
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- 0x0800b600 FATFS_LinkDriverEx
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.text.FATFS_LinkDriver
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- 0x0800b654 FATFS_LinkDriver
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- 0x0800b660 _sbrk
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+ *fill* 0x0800fff6 0x2
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+ 0x08010040 _getpid
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+ 0x08010054 _exit
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.text.UART_EndRxTransfer
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- *fill* 0x0800b6fa 0x2
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.text.UART_SetConfig
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- 0x0800b6fc UART_SetConfig
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+ 0x08010108 UART_SetConfig
.text.UART_AdvFeatureConfig
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- 0x0800ba24 UART_AdvFeatureConfig
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+ 0x08010430 UART_AdvFeatureConfig
.text.UART_WaitOnFlagUntilTimeout
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- 0x0800baee UART_WaitOnFlagUntilTimeout
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+ 0x080104fa UART_WaitOnFlagUntilTimeout
.text.UART_CheckIdleState
- 0x0800bb94 0xc6 build/stm32f7xx_hal_uart.o
- 0x0800bb94 UART_CheckIdleState
+ 0x080105a0 0xc6 build/stm32f7xx_hal_uart.o
+ 0x080105a0 UART_CheckIdleState
.text.HAL_UART_Init
- 0x0800bc5a 0x62 build/stm32f7xx_hal_uart.o
- 0x0800bc5a HAL_UART_Init
+ 0x08010666 0x62 build/stm32f7xx_hal_uart.o
+ 0x08010666 HAL_UART_Init
.text.Reset_Handler
- 0x0800bcbc 0x50 build/startup_stm32f767xx.o
- 0x0800bcbc Reset_Handler
+ 0x080106c8 0x50 build/startup_stm32f767xx.o
+ 0x080106c8 Reset_Handler
.text.Default_Handler
- 0x0800bd0c 0x2 build/startup_stm32f767xx.o
- 0x0800bd0c RTC_Alarm_IRQHandler
- 0x0800bd0c EXTI2_IRQHandler
- 0x0800bd0c TIM8_CC_IRQHandler
- 0x0800bd0c UART8_IRQHandler
- 0x0800bd0c SPI4_IRQHandler
- 0x0800bd0c TIM1_CC_IRQHandler
- 0x0800bd0c DMA2_Stream5_IRQHandler
- 0x0800bd0c JPEG_IRQHandler
- 0x0800bd0c DMA1_Stream5_IRQHandler
- 0x0800bd0c CAN3_RX1_IRQHandler
- 0x0800bd0c PVD_IRQHandler
- 0x0800bd0c TAMP_STAMP_IRQHandler
- 0x0800bd0c CAN2_RX1_IRQHandler
- 0x0800bd0c EXTI3_IRQHandler
- 0x0800bd0c TIM8_TRG_COM_TIM14_IRQHandler
- 0x0800bd0c DFSDM1_FLT1_IRQHandler
- 0x0800bd0c I2C3_ER_IRQHandler
- 0x0800bd0c DFSDM1_FLT2_IRQHandler
- 0x0800bd0c EXTI0_IRQHandler
- 0x0800bd0c I2C2_EV_IRQHandler
- 0x0800bd0c DMA1_Stream2_IRQHandler
- 0x0800bd0c CAN1_RX0_IRQHandler
- 0x0800bd0c FPU_IRQHandler
- 0x0800bd0c OTG_HS_WKUP_IRQHandler
- 0x0800bd0c CAN3_SCE_IRQHandler
- 0x0800bd0c LTDC_ER_IRQHandler
- 0x0800bd0c CAN2_SCE_IRQHandler
- 0x0800bd0c DMA2_Stream2_IRQHandler
- 0x0800bd0c SPI1_IRQHandler
- 0x0800bd0c TIM1_BRK_TIM9_IRQHandler
- 0x0800bd0c DCMI_IRQHandler
- 0x0800bd0c CAN2_RX0_IRQHandler
- 0x0800bd0c DMA2_Stream3_IRQHandler
- 0x0800bd0c SAI2_IRQHandler
- 0x0800bd0c DFSDM1_FLT3_IRQHandler
- 0x0800bd0c USART6_IRQHandler
- 0x0800bd0c CAN3_RX0_IRQHandler
- 0x0800bd0c USART3_IRQHandler
- 0x0800bd0c CAN1_RX1_IRQHandler
- 0x0800bd0c UART5_IRQHandler
- 0x0800bd0c DMA2_Stream0_IRQHandler
- 0x0800bd0c TIM4_IRQHandler
- 0x0800bd0c QUADSPI_IRQHandler
- 0x0800bd0c I2C1_EV_IRQHandler
- 0x0800bd0c DMA1_Stream6_IRQHandler
- 0x0800bd0c DMA1_Stream1_IRQHandler
- 0x0800bd0c UART4_IRQHandler
- 0x0800bd0c TIM3_IRQHandler
- 0x0800bd0c RCC_IRQHandler
- 0x0800bd0c TIM8_BRK_TIM12_IRQHandler
- 0x0800bd0c Default_Handler
- 0x0800bd0c CEC_IRQHandler
- 0x0800bd0c EXTI15_10_IRQHandler
- 0x0800bd0c DMA1_Stream7_IRQHandler
- 0x0800bd0c SPI5_IRQHandler
- 0x0800bd0c SDMMC1_IRQHandler
- 0x0800bd0c CAN2_TX_IRQHandler
- 0x0800bd0c I2C3_EV_IRQHandler
- 0x0800bd0c EXTI9_5_IRQHandler
- 0x0800bd0c RTC_WKUP_IRQHandler
- 0x0800bd0c LTDC_IRQHandler
- 0x0800bd0c ETH_WKUP_IRQHandler
- 0x0800bd0c SPDIF_RX_IRQHandler
- 0x0800bd0c SPI2_IRQHandler
- 0x0800bd0c OTG_HS_EP1_IN_IRQHandler
- 0x0800bd0c DMA1_Stream0_IRQHandler
- 0x0800bd0c CAN1_TX_IRQHandler
- 0x0800bd0c EXTI4_IRQHandler
- 0x0800bd0c RNG_IRQHandler
- 0x0800bd0c ETH_IRQHandler
- 0x0800bd0c OTG_HS_EP1_OUT_IRQHandler
- 0x0800bd0c WWDG_IRQHandler
- 0x0800bd0c SPI6_IRQHandler
- 0x0800bd0c MDIOS_IRQHandler
- 0x0800bd0c I2C4_EV_IRQHandler
- 0x0800bd0c CAN3_TX_IRQHandler
- 0x0800bd0c OTG_FS_WKUP_IRQHandler
- 0x0800bd0c OTG_HS_IRQHandler
- 0x0800bd0c DMA2D_IRQHandler
- 0x0800bd0c EXTI1_IRQHandler
- 0x0800bd0c SDMMC2_IRQHandler
- 0x0800bd0c UART7_IRQHandler
- 0x0800bd0c USART2_IRQHandler
- 0x0800bd0c DFSDM1_FLT0_IRQHandler
- 0x0800bd0c I2C2_ER_IRQHandler
- 0x0800bd0c DMA2_Stream1_IRQHandler
- 0x0800bd0c CAN1_SCE_IRQHandler
- 0x0800bd0c FLASH_IRQHandler
- 0x0800bd0c DMA2_Stream4_IRQHandler
- 0x0800bd0c OTG_FS_IRQHandler
- 0x0800bd0c SPI3_IRQHandler
- 0x0800bd0c DMA1_Stream4_IRQHandler
- 0x0800bd0c I2C1_ER_IRQHandler
- 0x0800bd0c FMC_IRQHandler
- 0x0800bd0c LPTIM1_IRQHandler
- 0x0800bd0c I2C4_ER_IRQHandler
- 0x0800bd0c DMA2_Stream6_IRQHandler
- 0x0800bd0c SAI1_IRQHandler
- 0x0800bd0c DMA1_Stream3_IRQHandler
+ 0x08010718 0x2 build/startup_stm32f767xx.o
+ 0x08010718 RTC_Alarm_IRQHandler
+ 0x08010718 EXTI2_IRQHandler
+ 0x08010718 TIM8_CC_IRQHandler
+ 0x08010718 UART8_IRQHandler
+ 0x08010718 SPI4_IRQHandler
+ 0x08010718 TIM1_CC_IRQHandler
+ 0x08010718 DMA2_Stream5_IRQHandler
+ 0x08010718 JPEG_IRQHandler
+ 0x08010718 DMA1_Stream5_IRQHandler
+ 0x08010718 CAN3_RX1_IRQHandler
+ 0x08010718 PVD_IRQHandler
+ 0x08010718 TAMP_STAMP_IRQHandler
+ 0x08010718 CAN2_RX1_IRQHandler
+ 0x08010718 EXTI3_IRQHandler
+ 0x08010718 TIM8_TRG_COM_TIM14_IRQHandler
+ 0x08010718 DFSDM1_FLT1_IRQHandler
+ 0x08010718 I2C3_ER_IRQHandler
+ 0x08010718 DFSDM1_FLT2_IRQHandler
+ 0x08010718 EXTI0_IRQHandler
+ 0x08010718 I2C2_EV_IRQHandler
+ 0x08010718 DMA1_Stream2_IRQHandler
+ 0x08010718 CAN1_RX0_IRQHandler
+ 0x08010718 FPU_IRQHandler
+ 0x08010718 OTG_HS_WKUP_IRQHandler
+ 0x08010718 CAN3_SCE_IRQHandler
+ 0x08010718 LTDC_ER_IRQHandler
+ 0x08010718 CAN2_SCE_IRQHandler
+ 0x08010718 DMA2_Stream2_IRQHandler
+ 0x08010718 SPI1_IRQHandler
+ 0x08010718 TIM1_BRK_TIM9_IRQHandler
+ 0x08010718 DCMI_IRQHandler
+ 0x08010718 CAN2_RX0_IRQHandler
+ 0x08010718 DMA2_Stream3_IRQHandler
+ 0x08010718 SAI2_IRQHandler
+ 0x08010718 DFSDM1_FLT3_IRQHandler
+ 0x08010718 USART6_IRQHandler
+ 0x08010718 CAN3_RX0_IRQHandler
+ 0x08010718 USART3_IRQHandler
+ 0x08010718 CAN1_RX1_IRQHandler
+ 0x08010718 UART5_IRQHandler
+ 0x08010718 DMA2_Stream0_IRQHandler
+ 0x08010718 TIM4_IRQHandler
+ 0x08010718 QUADSPI_IRQHandler
+ 0x08010718 I2C1_EV_IRQHandler
+ 0x08010718 DMA1_Stream6_IRQHandler
+ 0x08010718 DMA1_Stream1_IRQHandler
+ 0x08010718 UART4_IRQHandler
+ 0x08010718 TIM3_IRQHandler
+ 0x08010718 RCC_IRQHandler
+ 0x08010718 TIM8_BRK_TIM12_IRQHandler
+ 0x08010718 Default_Handler
+ 0x08010718 CEC_IRQHandler
+ 0x08010718 EXTI15_10_IRQHandler
+ 0x08010718 DMA1_Stream7_IRQHandler
+ 0x08010718 SPI5_IRQHandler
+ 0x08010718 SDMMC1_IRQHandler
+ 0x08010718 CAN2_TX_IRQHandler
+ 0x08010718 I2C3_EV_IRQHandler
+ 0x08010718 EXTI9_5_IRQHandler
+ 0x08010718 RTC_WKUP_IRQHandler
+ 0x08010718 LTDC_IRQHandler
+ 0x08010718 ETH_WKUP_IRQHandler
+ 0x08010718 SPDIF_RX_IRQHandler
+ 0x08010718 SPI2_IRQHandler
+ 0x08010718 OTG_HS_EP1_IN_IRQHandler
+ 0x08010718 DMA1_Stream0_IRQHandler
+ 0x08010718 CAN1_TX_IRQHandler
+ 0x08010718 EXTI4_IRQHandler
+ 0x08010718 RNG_IRQHandler
+ 0x08010718 ETH_IRQHandler
+ 0x08010718 OTG_HS_EP1_OUT_IRQHandler
+ 0x08010718 WWDG_IRQHandler
+ 0x08010718 SPI6_IRQHandler
+ 0x08010718 MDIOS_IRQHandler
+ 0x08010718 I2C4_EV_IRQHandler
+ 0x08010718 CAN3_TX_IRQHandler
+ 0x08010718 OTG_FS_WKUP_IRQHandler
+ 0x08010718 OTG_HS_IRQHandler
+ 0x08010718 DMA2D_IRQHandler
+ 0x08010718 EXTI1_IRQHandler
+ 0x08010718 SDMMC2_IRQHandler
+ 0x08010718 UART7_IRQHandler
+ 0x08010718 USART2_IRQHandler
+ 0x08010718 DFSDM1_FLT0_IRQHandler
+ 0x08010718 I2C2_ER_IRQHandler
+ 0x08010718 DMA2_Stream1_IRQHandler
+ 0x08010718 CAN1_SCE_IRQHandler
+ 0x08010718 FLASH_IRQHandler
+ 0x08010718 DMA2_Stream4_IRQHandler
+ 0x08010718 OTG_FS_IRQHandler
+ 0x08010718 SPI3_IRQHandler
+ 0x08010718 DMA1_Stream4_IRQHandler
+ 0x08010718 I2C1_ER_IRQHandler
+ 0x08010718 FMC_IRQHandler
+ 0x08010718 LPTIM1_IRQHandler
+ 0x08010718 I2C4_ER_IRQHandler
+ 0x08010718 DMA2_Stream6_IRQHandler
+ 0x08010718 SAI1_IRQHandler
+ 0x08010718 DMA1_Stream3_IRQHandler
*(.glue_7)
- .glue_7 0x0800bd0e 0x0 linker stubs
+ .glue_7 0x0801071a 0x0 linker stubs
*(.glue_7t)
- .glue_7t 0x0800bd0e 0x0 linker stubs
+ .glue_7t 0x0801071a 0x0 linker stubs
*(.eh_frame)
- *fill* 0x0800bd0e 0x2
- .eh_frame 0x0800bd10 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ *fill* 0x0801071a 0x2
+ .eh_frame 0x0801071c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
*(.init)
- .init 0x0800bd10 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
- 0x0800bd10 _init
- .init 0x0800bd14 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
+ .init 0x0801071c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
+ 0x0801071c _init
+ .init 0x08010720 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
*(.fini)
- .fini 0x0800bd1c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
- 0x0800bd1c _fini
- .fini 0x0800bd20 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
- 0x0800bd28 . = ALIGN (0x4)
- 0x0800bd28 _etext = .
+ .fini 0x08010728 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
+ 0x08010728 _fini
+ .fini 0x0801072c 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o
+ 0x08010734 . = ALIGN (0x4)
+ 0x08010734 _etext = .
-.vfp11_veneer 0x0800bd28 0x0
- .vfp11_veneer 0x0800bd28 0x0 linker stubs
+.vfp11_veneer 0x08010734 0x0
+ .vfp11_veneer 0x08010734 0x0 linker stubs
-.v4_bx 0x0800bd28 0x0
- .v4_bx 0x0800bd28 0x0 linker stubs
+.v4_bx 0x08010734 0x0
+ .v4_bx 0x08010734 0x0 linker stubs
-.iplt 0x0800bd28 0x0
- .iplt 0x0800bd28 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+.iplt 0x08010734 0x0
+ .iplt 0x08010734 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
-.rodata 0x0800bd28 0x3e8
- 0x0800bd28 . = ALIGN (0x4)
+.rodata 0x08010738 0xadc
+ 0x08010738 . = ALIGN (0x4)
*(.rodata)
+ .rodata 0x08010738 0x50 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+ .rodata 0x08010788 0x100 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ 0x08010788 __hexdig
+ .rodata 0x08010888 0x101 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ 0x08010888 _ctype_
+ *fill* 0x08010989 0x7
+ .rodata 0x08010990 0x128 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ 0x080109a0 __mprec_tens
+ 0x08010a68 __mprec_tinytens
+ 0x08010a90 __mprec_bigtens
*(.rodata*)
- .rodata.Init_params.str1.4
- 0x0800bd28 0x1ad build/main.o
- 0x10 (size before relaxing)
- .rodata.SD_SAVE.str1.4
- 0x0800bed5 0xa build/main.o
- *fill* 0x0800bed5 0x3
- .rodata.ad9102_example2_regval
- 0x0800bed8 0x84 build/main.o
- .rodata.ad9102_example4_regval
- 0x0800bf5c 0x84 build/main.o
- .rodata.ad9102_reg_addr
- 0x0800bfe0 0x84 build/main.o
.rodata.SD_Driver
- 0x0800c064 0x14 build/sd_diskio.o
- 0x0800c064 SD_Driver
+ 0x08010ab8 0x14 build/sd_diskio.o
+ 0x08010ab8 SD_Driver
+ .rodata.app_handle_profile_boot.str1.4
+ 0x08010acc 0x4d9 build/app_core.o
+ 0xd (size before relaxing)
+ *fill* 0x08010fa5 0x3
+ .rodata.g_packet_descriptors
+ 0x08010fa8 0x48 build/app_uart_protocol.o
+ .rodata.g_ad9102_example2_regval
+ 0x08010ff0 0x84 build/ad9102_device.o
+ .rodata.g_ad9102_example4_regval
+ 0x08011074 0x84 build/ad9102_device.o
+ .rodata.g_ad9102_reg_addr
+ 0x080110f8 0x84 build/ad9102_device.o
+ .rodata.profile_repository_parse_bool.str1.4
+ 0x0801117c 0x1f build/profile_repository.o
+ .rodata.profile_repository_apply_key_value.str1.4
+ 0x0801117c 0x2d9 build/profile_repository.o
+ .rodata.profile_repository_load_ini_file.str1.4
+ 0x0801117c 0x3 build/profile_repository.o
+ .rodata.profile_repository_load_by_valid_line_index.str1.4
+ 0x0801117c 0x11 build/profile_repository.o
+ .rodata.profile_storage_find_free_paths.str1.4
+ 0x0801117c 0x2b build/profile_storage.o
+ .rodata.profile_storage_open_target_files.str1.4
+ 0x0801117c 0x12 build/profile_storage.o
+ .rodata.profile_storage_append_index_entry.str1.4
+ 0x0801117c 0x19 build/profile_storage.o
+ .rodata.ui_status_mode_name.str1.4
+ 0x0801117c 0x15 build/ui_status.o
+ .rodata.ui_status_build_line_1.str1.4
+ 0x0801117c 0x1b build/ui_status.o
+ .rodata.ui_status_build_line_2.str1.4
+ 0x0801117c 0x14 build/ui_status.o
.rodata.APBPrescTable
- 0x0800c078 0x8 build/system_stm32f7xx.o
- 0x0800c078 APBPrescTable
+ 0x0801117c 0x8 build/system_stm32f7xx.o
+ 0x0801117c APBPrescTable
.rodata.AHBPrescTable
- 0x0800c080 0x10 build/system_stm32f7xx.o
- 0x0800c080 AHBPrescTable
- .rodata.Read_File.str1.4
- 0x0800c090 0xbb build/File_Handling.o
- .rodata.Seek_Read_File.str1.4
- 0x0800c090 0x27 build/File_Handling.o
- .rodata.Remove_File.str1.4
- 0x0800c090 0x64 build/File_Handling.o
+ 0x08011184 0x10 build/system_stm32f7xx.o
+ 0x08011184 AHBPrescTable
.rodata.create_name.str1.4
- 0x0800c090 0xf build/ff.o
- .rodata.ExCvt 0x0800c090 0x80 build/ff.o
+ 0x08011194 0xf build/ff.o
+ .rodata.ExCvt 0x08011194 0x80 build/ff.o
.rodata.str1.4
- 0x0800c110 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ 0x08011214 0x15 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
.rodata.str1.4
- 0x0800c110 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
- 0x0800c14c . = ALIGN (0x4)
+ 0x08011214 0x4c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ .rodata.str1.4
+ 0x08011214 0x12 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ .rodata.str1.4
+ 0x08011214 0x43 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ .rodata.str1.4
+ 0x08011214 0x59 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ .rodata.str1.4
+ 0x08011214 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ .rodata.str1.4
+ 0x08011214 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ .rodata.str1.4
+ 0x08011214 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ 0x08011458 . = ALIGN (0x4)
.ARM.extab
*(.ARM.extab* .gnu.linkonce.armextab.*)
-.ARM 0x0800c110 0x8
- 0x0800c110 __exidx_start = .
+.ARM 0x08011214 0x8
+ 0x08011214 __exidx_start = .
*(.ARM.exidx*)
- .ARM.exidx 0x0800c110 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
- .ARM.exidx 0x0800c118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
+ .ARM.exidx 0x08011214 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strlen.o)
+ .ARM.exidx 0x0801121c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
0x8 (size before relaxing)
- .ARM.exidx 0x0800c118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
+ .ARM.exidx 0x0801121c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcmp.o)
0x8 (size before relaxing)
- 0x0800c118 __exidx_end = .
+ .ARM.exidx 0x0801121c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
+ 0x8 (size before relaxing)
+ .ARM.exidx 0x0801121c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
+ 0x8 (size before relaxing)
+ 0x0801121c __exidx_end = .
-.rel.dyn 0x0800c118 0x0
- .rel.iplt 0x0800c118 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+.rel.dyn 0x0801121c 0x0
+ .rel.iplt 0x0801121c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
-.preinit_array 0x0800c118 0x0
- 0x0800c118 PROVIDE (__preinit_array_start = .)
+.preinit_array 0x0801121c 0x0
+ 0x0801121c PROVIDE (__preinit_array_start = .)
*(.preinit_array*)
- 0x0800c118 PROVIDE (__preinit_array_end = .)
+ 0x0801121c PROVIDE (__preinit_array_end = .)
-.init_array 0x0800c118 0x4
- 0x0800c118 PROVIDE (__init_array_start = .)
+.init_array 0x0801121c 0x4
+ 0x0801121c PROVIDE (__init_array_start = .)
*(SORT_BY_NAME(.init_array.*))
*(.init_array*)
- .init_array 0x0800c118 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
- 0x0800c11c PROVIDE (__init_array_end = .)
+ .init_array 0x0801121c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ 0x08011220 PROVIDE (__init_array_end = .)
-.fini_array 0x0800c11c 0x4
- 0x0800c11c PROVIDE (__fini_array_start = .)
+.fini_array 0x08011220 0x4
+ 0x08011220 PROVIDE (__fini_array_start = .)
*(SORT_BY_NAME(.fini_array.*))
*(.fini_array*)
- .fini_array 0x0800c11c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
- 0x0800c120 PROVIDE (__fini_array_end = .)
- 0x0800c120 _sidata = LOADADDR (.data)
+ .fini_array 0x08011220 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ 0x08011224 PROVIDE (__fini_array_end = .)
+ 0x08011224 _sidata = LOADADDR (.data)
-.data 0x20000000 0x5c load address 0x0800c120
+.data 0x20000000 0x1d8 load address 0x08011224
0x20000000 . = ALIGN (0x4)
0x20000000 _sdata = .
*(.data)
.data 0x20000000 0x50 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
0x20000000 _impure_ptr
0x20000004 _impure_data
+ .data 0x20000050 0x16c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ 0x20000050 __global_locale
+ .data 0x200001bc 0xc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ 0x200001bc __sglue
*(.data*)
- .data.Stat 0x20000050 0x1 build/sd_diskio.o
+ .data.g_last_bsp_sd_wide_bus_status
+ 0x200001c8 0x1 build/bsp_driver_sd.o
+ .data.g_last_bsp_sd_hal_init_status
+ 0x200001c9 0x1 build/bsp_driver_sd.o
+ .data.g_last_bsp_sd_init_status
+ 0x200001ca 0x1 build/bsp_driver_sd.o
+ .data.g_last_status_result
+ 0x200001cb 0x1 build/sd_diskio.o
+ .data.g_last_initialize_status
+ 0x200001cc 0x1 build/sd_diskio.o
+ .data.Stat 0x200001cd 0x1 build/sd_diskio.o
.data.uwTickFreq
- 0x20000051 0x1 build/stm32f7xx_hal.o
- 0x20000051 uwTickFreq
- *fill* 0x20000052 0x2
+ 0x200001ce 0x1 build/stm32f7xx_hal.o
+ 0x200001ce uwTickFreq
+ *fill* 0x200001cf 0x1
.data.uwTickPrio
- 0x20000054 0x4 build/stm32f7xx_hal.o
- 0x20000054 uwTickPrio
+ 0x200001d0 0x4 build/stm32f7xx_hal.o
+ 0x200001d0 uwTickPrio
.data.SystemCoreClock
- 0x20000058 0x4 build/system_stm32f7xx.o
- 0x20000058 SystemCoreClock
- 0x2000005c . = ALIGN (0x4)
- 0x2000005c _edata = .
+ 0x200001d4 0x4 build/system_stm32f7xx.o
+ 0x200001d4 SystemCoreClock
+ 0x200001d8 . = ALIGN (0x4)
+ 0x200001d8 _edata = .
.tm_clone_table
- 0x2000005c 0x0 load address 0x0800c17c
+ 0x200001d8 0x0 load address 0x080113fc
.tm_clone_table
- 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ 0x200001d8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
.tm_clone_table
- 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o
+ 0x200001d8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o
-.igot.plt 0x2000005c 0x0 load address 0x0800c17c
- .igot.plt 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
- 0x2000005c . = ALIGN (0x4)
+.igot.plt 0x200001d8 0x0 load address 0x080113fc
+ .igot.plt 0x200001d8 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ 0x200001d8 . = ALIGN (0x4)
-.bss 0x2000005c 0x26c0 load address 0x0800c17c
- 0x2000005c _sbss = .
- 0x2000005c __bss_start__ = _sbss
+.bss 0x200001d8 0x3818 load address 0x080113fc
+ 0x200001d8 _sbss = .
+ 0x200001d8 __bss_start__ = _sbss
*(.bss)
- .bss 0x2000005c 0x1c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
- .bss 0x20000078 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
- 0x20000078 __malloc_sbrk_start
- 0x2000007c __malloc_free_list
- .bss 0x20000080 0x13c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
- 0x20000080 __sf
- 0x200001b8 __stdio_exit_handler
- .bss 0x200001bc 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
- 0x200001bc errno
+ .bss 0x200001d8 0x1c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+ .bss 0x200001f4 0x13c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ 0x200001f4 __sf
+ 0x2000032c __stdio_exit_handler
+ .bss 0x20000330 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
+ 0x20000330 __malloc_sbrk_start
+ 0x20000334 __malloc_free_list
+ .bss 0x20000338 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ 0x20000338 errno
*(.bss*)
- .bss.ad9102_wave_written_samples
- 0x200001c0 0x2 build/main.o
- .bss.ad9102_wave_expected_samples
- 0x200001c2 0x2 build/main.o
- .bss.ad9102_wave_upload_active
- 0x200001c4 0x1 build/main.o
- *fill* 0x200001c5 0x3
- .bss.task 0x200001c8 0x34 build/main.o
- 0x200001c8 task
- .bss.LD_blinker
- 0x200001fc 0xc build/main.o
- 0x200001fc LD_blinker
- .bss.LD2_param
- 0x20000208 0xc build/main.o
- 0x20000208 LD2_param
- .bss.LD1_param
- 0x20000214 0xc build/main.o
- 0x20000214 LD1_param
- .bss.Def_setup
- 0x20000220 0x12 build/main.o
- 0x20000220 Def_setup
- *fill* 0x20000232 0x2
- .bss.Curr_setup
- 0x20000234 0x12 build/main.o
- 0x20000234 Curr_setup
- *fill* 0x20000246 0x2
- .bss.LD2_def_setup
- 0x20000248 0x10 build/main.o
- 0x20000248 LD2_def_setup
- .bss.LD1_def_setup
- 0x20000258 0x10 build/main.o
- 0x20000258 LD1_def_setup
- .bss.LD2_curr_setup
- 0x20000268 0x10 build/main.o
- 0x20000268 LD2_curr_setup
- .bss.LD1_curr_setup
- 0x20000278 0x10 build/main.o
- 0x20000278 LD1_curr_setup
- .bss.sizeoffile
- 0x20000288 0x4 build/main.o
- 0x20000288 sizeoffile
- .bss.fgoto 0x2000028c 0x4 build/main.o
- 0x2000028c fgoto
- .bss.test 0x20000290 0x4 build/main.o
- 0x20000290 test
- .bss.fresult 0x20000294 0x1 build/main.o
- 0x20000294 fresult
- *fill* 0x20000295 0x3
- .bss.COMMAND 0x20000298 0x1e build/main.o
- 0x20000298 COMMAND
- *fill* 0x200002b6 0x2
- .bss.Long_Data
- 0x200002b8 0x1e build/main.o
- 0x200002b8 Long_Data
- .bss.temp16 0x200002d6 0x2 build/main.o
- 0x200002d6 temp16
- .bss.CS_result
- 0x200002d8 0x2 build/main.o
- 0x200002d8 CS_result
- .bss.UART_header
- 0x200002da 0x2 build/main.o
- 0x200002da UART_header
- .bss.UART_rec_incr
- 0x200002dc 0x2 build/main.o
- 0x200002dc UART_rec_incr
- .bss.TIM10_coflag
- 0x200002de 0x1 build/main.o
- 0x200002de TIM10_coflag
- .bss.u_rx_flg 0x200002df 0x1 build/main.o
- 0x200002df u_rx_flg
- .bss.u_tx_flg 0x200002e0 0x1 build/main.o
- 0x200002e0 u_tx_flg
- .bss.flg_tmt 0x200002e1 0x1 build/main.o
- 0x200002e1 flg_tmt
- *fill* 0x200002e2 0x2
- .bss.UART_DATA
- 0x200002e4 0x1e build/main.o
- 0x200002e4 UART_DATA
- *fill* 0x20000302 0x2
- .bss.State_Data
- 0x20000304 0x2 build/main.o
- 0x20000304 State_Data
- .bss.UART_transmission_request
- 0x20000306 0x1 build/main.o
- 0x20000306 UART_transmission_request
- .bss.CPU_state_old
- 0x20000307 0x1 build/main.o
- 0x20000307 CPU_state_old
- .bss.CPU_state
- 0x20000308 0x1 build/main.o
- 0x20000308 CPU_state
- .bss.uart_buf 0x20000309 0x1 build/main.o
- 0x20000309 uart_buf
- *fill* 0x2000030a 0x2
- .bss.TIM10_period
- 0x2000030c 0x4 build/main.o
- 0x2000030c TIM10_period
- .bss.TO10_counter
- 0x20000310 0x4 build/main.o
- 0x20000310 TO10_counter
- .bss.TO10 0x20000314 0x4 build/main.o
- 0x20000314 TO10
- .bss.TO7_PID 0x20000318 0x4 build/main.o
- 0x20000318 TO7_PID
- .bss.TO7_before
- 0x2000031c 0x4 build/main.o
- 0x2000031c TO7_before
- .bss.TO7 0x20000320 0x4 build/main.o
- 0x20000320 TO7
- .bss.SD_SLIDE 0x20000324 0x4 build/main.o
- 0x20000324 SD_SLIDE
- .bss.SD_SEEK 0x20000328 0x4 build/main.o
- 0x20000328 SD_SEEK
- .bss.TO6_uart 0x2000032c 0x4 build/main.o
- 0x2000032c TO6_uart
- .bss.TO6_stop 0x20000330 0x4 build/main.o
- 0x20000330 TO6_stop
- .bss.TO6_before
- 0x20000334 0x4 build/main.o
- 0x20000334 TO6_before
- .bss.TO6 0x20000338 0x4 build/main.o
- 0x20000338 TO6
.bss.huart8 0x2000033c 0x88 build/main.o
0x2000033c huart8
- .bss.htim11 0x200003c4 0x4c build/main.o
- 0x200003c4 htim11
- .bss.htim10 0x20000410 0x4c build/main.o
- 0x20000410 htim10
- .bss.htim1 0x2000045c 0x4c build/main.o
- 0x2000045c htim1
- .bss.htim8 0x200004a8 0x4c build/main.o
- 0x200004a8 htim8
- .bss.htim4 0x200004f4 0x4c build/main.o
- 0x200004f4 htim4
- .bss.hsd1 0x20000540 0x84 build/main.o
- 0x20000540 hsd1
- .bss.hadc3 0x200005c4 0x48 build/main.o
- 0x200005c4 hadc3
- .bss.hadc1 0x2000060c 0x48 build/main.o
- 0x2000060c hadc1
- .bss.SDPath 0x20000654 0x4 build/fatfs.o
- 0x20000654 SDPath
- .bss.retSD 0x20000658 0x1 build/fatfs.o
- 0x20000658 retSD
- *fill* 0x20000659 0x3
- .bss.uwTick 0x2000065c 0x4 build/stm32f7xx_hal.o
- 0x2000065c uwTick
- .bss.bw 0x20000660 0x4 build/File_Handling.o
- 0x20000660 bw
- .bss.br 0x20000664 0x4 build/File_Handling.o
- 0x20000664 br
- .bss.fno 0x20000668 0x18 build/File_Handling.o
- 0x20000668 fno
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- .bss.FatFs 0x20002708 0x4 build/ff.o
- .bss.disk 0x2000270c 0xc build/ff_gen_drv.o
- 0x2000270c disk
+ .bss.htim1 0x200003c4 0x4c build/main.o
+ 0x200003c4 htim1
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+ 0x20000410 hsd1
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+ 0x20000494 hadc3
+ .bss.hadc1 0x200004dc 0x48 build/main.o
+ 0x200004dc hadc1
+ .bss.g_last_bsp_sd_hal_error
+ 0x20000524 0x4 build/bsp_driver_sd.o
+ .bss.g_last_bsp_sd_detect_status
+ 0x20000528 0x1 build/bsp_driver_sd.o
+ *fill* 0x20000529 0x3
+ .bss.SDFatFS 0x2000052c 0x1034 build/fatfs.o
+ 0x2000052c SDFatFS
+ .bss.SDPath 0x20001560 0x4 build/fatfs.o
+ 0x20001560 SDPath
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+ 0x20001564 retSD
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+ .bss.g_ui_lcd_contrast_pwm_timer
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+ .bss.g_dma_busy
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+ .bss.g_cycle_counter_available
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+ .bss.g_storage_mounted
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+ *fill* 0x20001853 0x1
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+ .bss.g_display_dirty
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+ .bss.g_initialised
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+ .bss.g_error_flags
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+ .bss.g_mode 0x2000399f 0x1 build/ui_status.o
+ .bss.g_profile_name
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+ *fill* 0x200039b1 0x3
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+ 0x200039b4 uwTick
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+ *fill* 0x200039da 0x2
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+ 0x200039e0 disk
.bss.__sbrk_heap_end
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+ 0x200039ec 0x4 build/sysmem.o
*(COMMON)
- 0x2000271c . = ALIGN (0x4)
- 0x2000271c _ebss = .
- 0x2000271c __bss_end__ = _ebss
+ 0x200039f0 . = ALIGN (0x4)
+ 0x200039f0 _ebss = .
+ 0x200039f0 __bss_end__ = _ebss
._user_heap_stack
- 0x2000271c 0x6004 load address 0x0800c17c
- 0x20002720 . = ALIGN (0x8)
- *fill* 0x2000271c 0x4
+ 0x200039f0 0x6000 load address 0x080113fc
+ 0x200039f0 . = ALIGN (0x8)
[!provide] PROVIDE (end = .)
- 0x20002720 PROVIDE (_end = .)
- 0x20004720 . = (. + _Min_Heap_Size)
- *fill* 0x20002720 0x2000
- 0x20008720 . = (. + _Min_Stack_Size)
- *fill* 0x20004720 0x4000
- 0x20008720 . = ALIGN (0x8)
+ 0x200039f0 PROVIDE (_end = .)
+ 0x200059f0 . = (. + _Min_Heap_Size)
+ *fill* 0x200039f0 0x2000
+ 0x200099f0 . = (. + _Min_Stack_Size)
+ *fill* 0x200059f0 0x4000
+ 0x200099f0 . = ALIGN (0x8)
/DISCARD/
libc.a(*)
@@ -3393,103 +3808,221 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a
.ARM.attributes
0x0000017e 0x32 build/stm32f7xx_hal_msp.o
.ARM.attributes
- 0x000001b0 0x32 build/stm32f7xx_hal_adc.o
+ 0x000001b0 0x32 build/app_core.o
.ARM.attributes
- 0x000001e2 0x32 build/stm32f7xx_hal_adc_ex.o
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.ARM.attributes
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.ARM.attributes
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+ 0x00000278 0x32 build/laser_dac.o
.ARM.attributes
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+ 0x000002aa 0x32 build/adc_mux.o
.ARM.attributes
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+ 0x000002dc 0x32 build/stm32_dac_output.o
.ARM.attributes
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+ 0x0000030e 0x32 build/ad9833_device.o
.ARM.attributes
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+ 0x00000340 0x32 build/ds1809_device.o
.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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.ARM.attributes
- 0x000004d0 0x32 build/stm32f7xx_ll_usart.o
+ 0x000004d0 0x32 build/ui_status.o
.ARM.attributes
- 0x00000502 0x32 build/system_stm32f7xx.o
+ 0x00000502 0x32 build/stm32f7xx_hal_adc.o
.ARM.attributes
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+ 0x00000534 0x32 build/stm32f7xx_hal_adc_ex.o
.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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.ARM.attributes
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+ 0x0000062e 0x32 build/stm32f7xx_hal_cortex.o
.ARM.attributes
- 0x00000660 0x21 build/startup_stm32f767xx.o
+ 0x00000660 0x32 build/stm32f7xx_hal.o
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+ 0x00000692 0x32 build/stm32f7xx_ll_rcc.o
.ARM.attributes
- 0x000006b3 0x32 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
+ 0x000006c4 0x32 build/stm32f7xx_ll_gpio.o
.ARM.attributes
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- 0x00000a5f 0x20 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
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.ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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+ .ARM.attributes
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.comment 0x00000000 0x26
.comment 0x00000000 0x26 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
@@ -3501,6 +4034,23 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a
.comment 0x00000026 0x27 build/fatfs_platform.o
.comment 0x00000026 0x27 build/stm32f7xx_it.o
.comment 0x00000026 0x27 build/stm32f7xx_hal_msp.o
+ .comment 0x00000026 0x27 build/app_core.o
+ .comment 0x00000026 0x27 build/app_uart_protocol.o
+ .comment 0x00000026 0x27 build/board_io.o
+ .comment 0x00000026 0x27 build/uart_transport.o
+ .comment 0x00000026 0x27 build/laser_dac.o
+ .comment 0x00000026 0x27 build/adc_mux.o
+ .comment 0x00000026 0x27 build/stm32_dac_output.o
+ .comment 0x00000026 0x27 build/ad9833_device.o
+ .comment 0x00000026 0x27 build/ds1809_device.o
+ .comment 0x00000026 0x27 build/ad9102_device.o
+ .comment 0x00000026 0x27 build/lcd1602_display.o
+ .comment 0x00000026 0x27 build/telemetry.o
+ .comment 0x00000026 0x27 build/temperature_control.o
+ .comment 0x00000026 0x27 build/storage_sd.o
+ .comment 0x00000026 0x27 build/profile_repository.o
+ .comment 0x00000026 0x27 build/profile_storage.o
+ .comment 0x00000026 0x27 build/ui_status.o
.comment 0x00000026 0x27 build/stm32f7xx_hal_adc.o
.comment 0x00000026 0x27 build/stm32f7xx_hal_adc_ex.o
.comment 0x00000026 0x27 build/stm32f7xx_hal_rcc.o
@@ -3519,544 +4069,1130 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a
.comment 0x00000026 0x27 build/stm32f7xx_ll_tim.o
.comment 0x00000026 0x27 build/stm32f7xx_ll_usart.o
.comment 0x00000026 0x27 build/system_stm32f7xx.o
- .comment 0x00000026 0x27 build/File_Handling.o
.comment 0x00000026 0x27 build/diskio.o
.comment 0x00000026 0x27 build/ff.o
.comment 0x00000026 0x27 build/ff_gen_drv.o
.comment 0x00000026 0x27 build/sysmem.o
+ .comment 0x00000026 0x27 build/syscalls.o
.comment 0x00000026 0x27 build/stm32f7xx_hal_uart.o
- .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strchr.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
- .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcasecmp.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wctomb_r.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncpy.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncmp.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libm_a-s_nan.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libm_a-sf_nan.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
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+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
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+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
.comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
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+ .comment 0x00000026 0x27 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
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+ 0x000036f3 0x599 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
.debug_loclists
- 0x00000f60 0x44f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ 0x00003c8c 0xd9 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wctomb_r.o)
.debug_loclists
- 0x000013af 0x4b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
+ 0x00003d65 0xf5 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncpy.o)
.debug_loclists
- 0x000013fa 0x59 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ 0x00003e5a 0x139 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncmp.o)
.debug_loclists
- 0x00001453 0x1d0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ 0x00003f93 0x63 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
.debug_loclists
- 0x00001623 0x80 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ 0x00003ff6 0x212 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
.debug_loclists
- 0x000016a3 0x9e4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
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+ .debug_loclists
+ 0x00004822 0xfa /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ .debug_loclists
+ 0x0000491c 0x20e6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ .debug_loclists
+ 0x00006a02 0x56b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ .debug_loclists
+ 0x00006f6d 0x158 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
+ .debug_loclists
+ 0x000070c5 0x1d0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ .debug_loclists
+ 0x00007295 0x2f3 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ .debug_loclists
+ 0x00007588 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
+ .debug_loclists
+ 0x00007610 0x263 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
+ .debug_loclists
+ 0x00007873 0x164 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
+ .debug_loclists
+ 0x000079d7 0x233 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o)
+ .debug_loclists
+ 0x00007c0a 0x87 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
+ .debug_loclists
+ 0x00007c91 0x4a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ .debug_loclists
+ 0x00007cdb 0x6b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
+ .debug_loclists
+ 0x00007d46 0x102 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
+ .debug_loclists
+ 0x00007e48 0x44f /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ .debug_loclists
+ 0x00008297 0x5fd /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ .debug_loclists
+ 0x00008894 0x104 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ .debug_loclists
+ 0x00008998 0x4b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o)
+ .debug_loclists
+ 0x000089e3 0x23b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
+ .debug_loclists
+ 0x00008c1e 0x59 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
+ .debug_loclists
+ 0x00008c77 0x42a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ .debug_loclists
+ 0x000090a1 0x59a /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ .debug_loclists
+ 0x0000963b 0x4b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
+ .debug_loclists
+ 0x00009686 0x61 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ .debug_loclists
+ 0x000096e7 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
+ .debug_loclists
+ 0x00009785 0x80 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ .debug_loclists
+ 0x00009805 0x1b4 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ .debug_loclists
+ 0x000099b9 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
+ .debug_loclists
+ 0x00009a57 0x9e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
+ .debug_loclists
+ 0x00009af5 0x4b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+ .debug_loclists
+ 0x00009b40 0x89 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ .debug_loclists
+ 0x00009bc9 0x71 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ .debug_loclists
+ 0x00009c3a 0x3d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+ .debug_loclists
+ 0x00009c77 0x3b /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
+ .debug_loclists
+ 0x00009cb2 0x9e4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
.debug_rnglists
- 0x00000000 0x1d4
+ 0x00000000 0x50c
.debug_rnglists
- 0x00000000 0x42 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ 0x00000000 0x60 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
.debug_rnglists
- 0x00000042 0x1e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
+ 0x00000060 0x60 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
.debug_rnglists
- 0x00000060 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
+ 0x000000c0 0x2d /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcasecmp.o)
.debug_rnglists
- 0x00000073 0x66 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ 0x000000ed 0x19 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
.debug_rnglists
- 0x000000d9 0x77 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ 0x00000106 0x1b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
.debug_rnglists
- 0x00000150 0x84 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
+ 0x00000121 0xc2 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ .debug_rnglists
+ 0x000001e3 0x42 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ .debug_rnglists
+ 0x00000225 0x77 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ .debug_rnglists
+ 0x0000029c 0x59 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ .debug_rnglists
+ 0x000002f5 0x1e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
+ .debug_rnglists
+ 0x00000313 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
+ .debug_rnglists
+ 0x00000326 0x66 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ .debug_rnglists
+ 0x0000038c 0x1c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ .debug_rnglists
+ 0x000003a8 0x18 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ .debug_rnglists
+ 0x000003c0 0x2b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ .debug_rnglists
+ 0x000003eb 0x65 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ .debug_rnglists
+ 0x00000450 0x1b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ .debug_rnglists
+ 0x0000046b 0x1d /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ .debug_rnglists
+ 0x00000488 0x84 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
.debug_line_str
- 0x00000000 0x145
+ 0x00000000 0x170
.debug_line_str
- 0x00000000 0x145 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
- 0x92 (size before relaxing)
+ 0x00000000 0x170 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strlen.o)
+ 0x98 (size before relaxing)
.debug_line_str
- 0x00000145 0x99 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
+ 0x00000170 0x99 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
.debug_line_str
- 0x00000145 0x97 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+ 0x00000170 0x98 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcmp.o)
.debug_line_str
- 0x00000145 0x9b /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
+ 0x00000170 0x92 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
+ .debug_line_str
+ 0x00000170 0x9c /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+ .debug_line_str
+ 0x00000170 0x97 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+ .debug_line_str
+ 0x00000170 0x9b /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
Cross Reference Table
@@ -4069,7 +5205,6 @@ AHBPrescTable build/system_stm32f7xx.o
APBPrescTable build/system_stm32f7xx.o
build/stm32f7xx_ll_rcc.o
build/stm32f7xx_hal_rcc.o
-Advanced_Controller_Temp build/main.o
BSP_PlatformIsDetected build/fatfs_platform.o
build/bsp_driver_sd.o
BSP_SD_AbortCallback build/bsp_driver_sd.o
@@ -4078,6 +5213,7 @@ BSP_SD_GetCardInfo build/bsp_driver_sd.o
build/sd_diskio.o
BSP_SD_GetCardState build/bsp_driver_sd.o
build/sd_diskio.o
+BSP_SD_GetDebugInfo build/bsp_driver_sd.o
BSP_SD_ITConfig build/bsp_driver_sd.o
BSP_SD_Init build/bsp_driver_sd.o
build/sd_diskio.o
@@ -4104,19 +5240,6 @@ CAN3_RX1_IRQHandler build/startup_stm32f767xx.o
CAN3_SCE_IRQHandler build/startup_stm32f767xx.o
CAN3_TX_IRQHandler build/startup_stm32f767xx.o
CEC_IRQHandler build/startup_stm32f767xx.o
-COMMAND build/main.o
- build/stm32f7xx_it.o
-CPU_state build/main.o
- build/stm32f7xx_it.o
-CPU_state_old build/main.o
-CS_result build/main.o
-CalculateChecksum build/main.o
-CheckChecksum build/main.o
-Check_SD_Space build/File_Handling.o
-Create_Dir build/File_Handling.o
-Create_File build/File_Handling.o
- build/main.o
-Curr_setup build/main.o
DCMI_IRQHandler build/startup_stm32f767xx.o
DFSDM1_FLT0_IRQHandler build/startup_stm32f767xx.o
DFSDM1_FLT1_IRQHandler build/startup_stm32f767xx.o
@@ -4139,9 +5262,7 @@ DMA2_Stream4_IRQHandler build/startup_stm32f767xx.o
DMA2_Stream5_IRQHandler build/startup_stm32f767xx.o
DMA2_Stream6_IRQHandler build/startup_stm32f767xx.o
DMA2_Stream7_IRQHandler build/stm32f7xx_it.o
-DMA2_Stream7_TransferComplete build/stm32f7xx_it.o
DebugMon_Handler build/stm32f7xx_it.o
-Def_setup build/main.o
Default_Handler build/startup_stm32f767xx.o
ETH_IRQHandler build/startup_stm32f767xx.o
ETH_WKUP_IRQHandler build/startup_stm32f767xx.o
@@ -4167,7 +5288,6 @@ FLASH_WaitForLastOperation build/stm32f7xx_hal_flash.o
build/stm32f7xx_hal_flash_ex.o
FMC_IRQHandler build/startup_stm32f767xx.o
FPU_IRQHandler build/startup_stm32f767xx.o
-Format_SD build/File_Handling.o
HAL_ADCEx_InjectedConfigChannel build/stm32f7xx_hal_adc_ex.o
HAL_ADCEx_InjectedConvCpltCallback build/stm32f7xx_hal_adc_ex.o
build/stm32f7xx_hal_adc.o
@@ -4194,7 +5314,7 @@ HAL_ADC_ErrorCallback build/stm32f7xx_hal_adc.o
HAL_ADC_GetError build/stm32f7xx_hal_adc.o
HAL_ADC_GetState build/stm32f7xx_hal_adc.o
HAL_ADC_GetValue build/stm32f7xx_hal_adc.o
- build/main.o
+ build/adc_mux.o
HAL_ADC_IRQHandler build/stm32f7xx_hal_adc.o
build/stm32f7xx_it.o
HAL_ADC_Init build/stm32f7xx_hal_adc.o
@@ -4203,14 +5323,14 @@ HAL_ADC_LevelOutOfWindowCallback build/stm32f7xx_hal_adc.o
HAL_ADC_MspDeInit build/stm32f7xx_hal_msp.o
HAL_ADC_MspInit build/stm32f7xx_hal_msp.o
HAL_ADC_PollForConversion build/stm32f7xx_hal_adc.o
- build/main.o
+ build/adc_mux.o
HAL_ADC_PollForEvent build/stm32f7xx_hal_adc.o
HAL_ADC_Start build/stm32f7xx_hal_adc.o
- build/main.o
+ build/adc_mux.o
HAL_ADC_Start_DMA build/stm32f7xx_hal_adc.o
HAL_ADC_Start_IT build/stm32f7xx_hal_adc.o
HAL_ADC_Stop build/stm32f7xx_hal_adc.o
- build/main.o
+ build/adc_mux.o
HAL_ADC_Stop_DMA build/stm32f7xx_hal_adc.o
HAL_ADC_Stop_IT build/stm32f7xx_hal_adc.o
HAL_DBGMCU_DisableDBGSleepMode build/stm32f7xx_hal.o
@@ -4257,7 +5377,8 @@ HAL_DMA_UnRegisterCallback build/stm32f7xx_hal_dma.o
HAL_DeInit build/stm32f7xx_hal.o
HAL_Delay build/stm32f7xx_hal.o
build/stm32f7xx_hal_sd.o
- build/main.o
+ build/lcd1602_display.o
+ build/ds1809_device.o
HAL_DisableCompensationCell build/stm32f7xx_hal.o
HAL_DisableFMCMemorySwapping build/stm32f7xx_hal.o
HAL_DisableMemorySwappingBank build/stm32f7xx_hal.o
@@ -4294,16 +5415,24 @@ HAL_GPIO_EXTI_Callback build/stm32f7xx_hal_gpio.o
HAL_GPIO_EXTI_IRQHandler build/stm32f7xx_hal_gpio.o
HAL_GPIO_Init build/stm32f7xx_hal_gpio.o
build/stm32f7xx_hal_rcc.o
+ build/stm32_dac_output.o
+ build/board_io.o
build/stm32f7xx_hal_msp.o
build/main.o
HAL_GPIO_LockPin build/stm32f7xx_hal_gpio.o
HAL_GPIO_ReadPin build/stm32f7xx_hal_gpio.o
+ build/board_io.o
build/fatfs_platform.o
- build/main.o
HAL_GPIO_TogglePin build/stm32f7xx_hal_gpio.o
- build/stm32f7xx_it.o
+ build/board_io.o
HAL_GPIO_WritePin build/stm32f7xx_hal_gpio.o
- build/stm32f7xx_it.o
+ build/lcd1602_display.o
+ build/ad9102_device.o
+ build/ds1809_device.o
+ build/ad9833_device.o
+ build/adc_mux.o
+ build/laser_dac.o
+ build/board_io.o
build/main.o
HAL_GetDEVID build/stm32f7xx_hal.o
HAL_GetHalVersion build/stm32f7xx_hal.o
@@ -4468,6 +5597,7 @@ HAL_RCC_GetHCLKFreq build/stm32f7xx_hal_rcc.o
HAL_RCC_GetOscConfig build/stm32f7xx_hal_rcc.o
HAL_RCC_GetPCLK1Freq build/stm32f7xx_hal_rcc.o
build/stm32f7xx_hal_uart.o
+ build/board_io.o
HAL_RCC_GetPCLK2Freq build/stm32f7xx_hal_rcc.o
build/stm32f7xx_hal_uart.o
HAL_RCC_GetSysClockFreq build/stm32f7xx_hal_rcc.o
@@ -4482,7 +5612,6 @@ HAL_SD_Abort build/stm32f7xx_hal_sd.o
HAL_SD_AbortCallback build/bsp_driver_sd.o
HAL_SD_Abort_IT build/stm32f7xx_hal_sd.o
HAL_SD_ConfigWideBusOperation build/stm32f7xx_hal_sd.o
- build/bsp_driver_sd.o
HAL_SD_DeInit build/stm32f7xx_hal_sd.o
HAL_SD_Erase build/stm32f7xx_hal_sd.o
build/bsp_driver_sd.o
@@ -4548,7 +5677,6 @@ HAL_TIMEx_HallSensor_Stop build/stm32f7xx_hal_tim_ex.o
HAL_TIMEx_HallSensor_Stop_DMA build/stm32f7xx_hal_tim_ex.o
HAL_TIMEx_HallSensor_Stop_IT build/stm32f7xx_hal_tim_ex.o
HAL_TIMEx_MasterConfigSynchronization build/stm32f7xx_hal_tim_ex.o
- build/main.o
HAL_TIMEx_OCN_Start build/stm32f7xx_hal_tim_ex.o
HAL_TIMEx_OCN_Start_DMA build/stm32f7xx_hal_tim_ex.o
HAL_TIMEx_OCN_Start_IT build/stm32f7xx_hal_tim_ex.o
@@ -4575,12 +5703,9 @@ HAL_TIM_Base_MspInit build/stm32f7xx_hal_msp.o
HAL_TIM_Base_Start build/stm32f7xx_hal_tim.o
HAL_TIM_Base_Start_DMA build/stm32f7xx_hal_tim.o
HAL_TIM_Base_Start_IT build/stm32f7xx_hal_tim.o
- build/main.o
HAL_TIM_Base_Stop build/stm32f7xx_hal_tim.o
- build/main.o
HAL_TIM_Base_Stop_DMA build/stm32f7xx_hal_tim.o
HAL_TIM_Base_Stop_IT build/stm32f7xx_hal_tim.o
- build/main.o
HAL_TIM_ConfigClockSource build/stm32f7xx_hal_tim.o
build/main.o
HAL_TIM_ConfigOCrefClear build/stm32f7xx_hal_tim.o
@@ -4623,7 +5748,6 @@ HAL_TIM_IC_Stop build/stm32f7xx_hal_tim.o
HAL_TIM_IC_Stop_DMA build/stm32f7xx_hal_tim.o
HAL_TIM_IC_Stop_IT build/stm32f7xx_hal_tim.o
HAL_TIM_IRQHandler build/stm32f7xx_hal_tim.o
- build/stm32f7xx_it.o
HAL_TIM_MspPostInit build/stm32f7xx_hal_msp.o
build/main.o
HAL_TIM_OC_ConfigChannel build/stm32f7xx_hal_tim.o
@@ -4650,10 +5774,12 @@ HAL_TIM_OnePulse_Start_IT build/stm32f7xx_hal_tim.o
HAL_TIM_OnePulse_Stop build/stm32f7xx_hal_tim.o
HAL_TIM_OnePulse_Stop_IT build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_ConfigChannel build/stm32f7xx_hal_tim.o
+ build/board_io.o
build/main.o
HAL_TIM_PWM_DeInit build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_GetState build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_Init build/stm32f7xx_hal_tim.o
+ build/board_io.o
build/main.o
HAL_TIM_PWM_MspDeInit build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_MspInit build/stm32f7xx_hal_tim.o
@@ -4661,11 +5787,11 @@ HAL_TIM_PWM_PulseFinishedCallback build/stm32f7xx_hal_tim.o
build/stm32f7xx_hal_tim_ex.o
HAL_TIM_PWM_PulseFinishedHalfCpltCallback build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_Start build/stm32f7xx_hal_tim.o
- build/main.o
+ build/board_io.o
+ build/app_core.o
HAL_TIM_PWM_Start_DMA build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_Start_IT build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_Stop build/stm32f7xx_hal_tim.o
- build/main.o
HAL_TIM_PWM_Stop_DMA build/stm32f7xx_hal_tim.o
HAL_TIM_PWM_Stop_IT build/stm32f7xx_hal_tim.o
HAL_TIM_PeriodElapsedCallback build/stm32f7xx_hal_tim.o
@@ -4731,14 +5857,6 @@ I2C3_EV_IRQHandler build/startup_stm32f767xx.o
I2C4_ER_IRQHandler build/startup_stm32f767xx.o
I2C4_EV_IRQHandler build/startup_stm32f767xx.o
JPEG_IRQHandler build/startup_stm32f767xx.o
-LD1_curr_setup build/main.o
-LD1_def_setup build/main.o
-LD1_param build/main.o
-LD2_curr_setup build/main.o
-LD2_def_setup build/main.o
-LD2_param build/main.o
-LD_blinker build/main.o
- build/stm32f7xx_it.o
LL_DMA_DeInit build/stm32f7xx_ll_dma.o
LL_DMA_Init build/stm32f7xx_ll_dma.o
LL_DMA_StructInit build/stm32f7xx_ll_dma.o
@@ -4805,13 +5923,10 @@ LL_mDelay build/stm32f7xx_ll_utils.o
LPTIM1_IRQHandler build/startup_stm32f767xx.o
LTDC_ER_IRQHandler build/startup_stm32f767xx.o
LTDC_IRQHandler build/startup_stm32f767xx.o
-Long_Data build/main.o
MDIOS_IRQHandler build/startup_stm32f767xx.o
MX_FATFS_Init build/fatfs.o
build/main.o
MemManage_Handler build/stm32f7xx_it.o
-Mount_SD build/File_Handling.o
- build/main.o
NMI_Handler build/stm32f7xx_it.o
OTG_FS_IRQHandler build/startup_stm32f767xx.o
OTG_FS_WKUP_IRQHandler build/startup_stm32f767xx.o
@@ -4838,13 +5953,11 @@ RCC_PLL_GetFreqDomain_SYS build/stm32f7xx_ll_rcc.o
RNG_IRQHandler build/startup_stm32f767xx.o
RTC_Alarm_IRQHandler build/startup_stm32f767xx.o
RTC_WKUP_IRQHandler build/startup_stm32f767xx.o
-Read_File build/File_Handling.o
-Remove_File build/File_Handling.o
- build/main.o
Reset_Handler build/startup_stm32f767xx.o
SAI1_IRQHandler build/startup_stm32f767xx.o
SAI2_IRQHandler build/startup_stm32f767xx.o
SDFatFS build/fatfs.o
+ build/storage_sd.o
SDFile build/fatfs.o
SDMMC1_IRQHandler build/startup_stm32f767xx.o
SDMMC2_IRQHandler build/startup_stm32f767xx.o
@@ -4923,13 +6036,9 @@ SDMMC_SetSDMMCReadWaitMode build/stm32f7xx_ll_sdmmc.o
SDMMC_WriteFIFO build/stm32f7xx_ll_sdmmc.o
build/stm32f7xx_hal_sd.o
SDPath build/fatfs.o
+ build/storage_sd.o
SD_Driver build/sd_diskio.o
build/fatfs.o
-SD_READ build/main.o
-SD_REMOVE build/main.o
-SD_SAVE build/main.o
-SD_SEEK build/main.o
-SD_SLIDE build/main.o
SD_initialize build/sd_diskio.o
SD_ioctl build/sd_diskio.o
SD_read build/sd_diskio.o
@@ -4943,14 +6052,6 @@ SPI4_IRQHandler build/startup_stm32f767xx.o
SPI5_IRQHandler build/startup_stm32f767xx.o
SPI6_IRQHandler build/startup_stm32f767xx.o
SVC_Handler build/stm32f7xx_it.o
-Scan_SD build/File_Handling.o
-Seek_Read_File build/File_Handling.o
- build/main.o
-Send_Uart build/File_Handling.o
-Set_LTEC build/main.o
- build/stm32f7xx_it.o
-State_Data build/main.o
- build/stm32f7xx_it.o
SysTick_Handler build/stm32f7xx_it.o
SystemClock_Config build/main.o
SystemCoreClock build/system_stm32f7xx.o
@@ -4961,13 +6062,11 @@ SystemCoreClock build/system_stm32f7xx.o
build/stm32f7xx_hal_rcc.o
build/stm32f7xx_hal_adc_ex.o
build/stm32f7xx_hal_adc.o
+ build/lcd1602_display.o
SystemCoreClockUpdate build/system_stm32f7xx.o
SystemInit build/system_stm32f7xx.o
build/startup_stm32f767xx.o
TAMP_STAMP_IRQHandler build/startup_stm32f767xx.o
-TIM10_coflag build/main.o
- build/stm32f7xx_it.o
-TIM10_period build/main.o
TIM1_BRK_TIM9_IRQHandler build/startup_stm32f767xx.o
TIM1_CC_IRQHandler build/startup_stm32f767xx.o
TIM1_TRG_COM_TIM11_IRQHandler build/stm32f7xx_it.o
@@ -5003,20 +6102,6 @@ TIM_OC2_SetConfig build/stm32f7xx_hal_tim.o
build/stm32f7xx_hal_tim_ex.o
TIM_TI1_SetConfig build/stm32f7xx_hal_tim.o
build/stm32f7xx_hal_tim_ex.o
-TO10 build/main.o
- build/stm32f7xx_it.o
-TO10_counter build/main.o
- build/stm32f7xx_it.o
-TO6 build/main.o
- build/stm32f7xx_it.o
-TO6_before build/main.o
-TO6_stop build/main.o
-TO6_uart build/main.o
- build/stm32f7xx_it.o
-TO7 build/main.o
- build/stm32f7xx_it.o
-TO7_PID build/main.o
-TO7_before build/main.o
UART4_IRQHandler build/startup_stm32f767xx.o
UART5_IRQHandler build/startup_stm32f767xx.o
UART7_IRQHandler build/startup_stm32f767xx.o
@@ -5025,8 +6110,6 @@ UART_AdvFeatureConfig build/stm32f7xx_hal_uart.o
build/stm32f7xx_hal_uart_ex.o
UART_CheckIdleState build/stm32f7xx_hal_uart.o
build/stm32f7xx_hal_uart_ex.o
-UART_DATA build/main.o
-UART_RxCpltCallback build/stm32f7xx_it.o
UART_SetConfig build/stm32f7xx_hal_uart.o
build/stm32f7xx_hal_uart_ex.o
UART_Start_Receive_DMA build/stm32f7xx_hal_uart.o
@@ -5035,58 +6118,100 @@ UART_Start_Receive_IT build/stm32f7xx_hal_uart.o
build/stm32f7xx_hal_uart_ex.o
UART_WaitOnFlagUntilTimeout build/stm32f7xx_hal_uart.o
build/stm32f7xx_hal_uart_ex.o
-UART_header build/main.o
- build/stm32f7xx_it.o
-UART_rec_incr build/main.o
- build/stm32f7xx_it.o
-UART_transmission_request build/main.o
- build/stm32f7xx_it.o
USART1_IRQHandler build/stm32f7xx_it.o
USART2_IRQHandler build/startup_stm32f767xx.o
USART3_IRQHandler build/startup_stm32f767xx.o
USART6_IRQHandler build/startup_stm32f767xx.o
-USART_TX build/main.o
-USART_TX_DMA build/main.o
-Unmount_SD build/File_Handling.o
- build/main.o
-Update_File build/File_Handling.o
-Update_File_byte build/File_Handling.o
- build/main.o
-Update_File_float build/File_Handling.o
UsageFault_Handler build/stm32f7xx_it.o
WWDG_IRQHandler build/startup_stm32f767xx.o
-Write_File build/File_Handling.o
-Write_File_byte build/File_Handling.o
- build/main.o
+_Balloc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+_Bfree /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
_ITM_deregisterTMCloneTable /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
_ITM_registerTMCloneTable /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
_Min_Stack_Size build/sysmem.o
+_PathLocale /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
__TMC_END__ /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+__adddf3 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_d2lz /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__aeabi_d2ulz /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+__aeabi_dadd /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_drsub /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_dsub /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_f2d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_i2d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
__aeabi_idiv0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
+__aeabi_l2d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__aeabi_ldiv0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+__aeabi_ui2d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__aeabi_ul2d /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
__aeabi_uldivmod /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
build/stm32f7xx_hal_rcc.o
+__any_on /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+__ascii_mbtowc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+__ascii_wctomb /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wctomb_r.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+__assert /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+__assert_func /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
__atexit /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
__atexit0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
__atexit_dummy /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
+__b2d /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
__bss_end__ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
__bss_start__ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
__call_exitprocs /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__call_atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
+__copybits /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__d2b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__deregister_frame_info /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
__dso_handle /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
__env build/syscalls.o
__errno /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
build/syscalls.o
build/sysmem.o
+__extendsfdf2 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
__fini_array_end /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
__fini_array_start /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
+__fixdfdi /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixdfdi.o)
+__fixunsdfdi /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_fixunsdfdi.o)
+__floatdidf /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__floatsidf /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__floatundidf /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__floatunsidf /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
__fp_lock_all /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
__fp_unlock_all /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+__gethex /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__global_locale /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wctomb_r.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__hexdig /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
+__hexnan /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__hi0bits /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+__i2b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__init_array_end /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
__init_array_start /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
__io_getchar build/syscalls.o
@@ -5096,6 +6221,11 @@ __libc_fini_array /usr/lib/gcc/arm-none-eabi/13.
__libc_init_array /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
build/startup_stm32f767xx.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
+__lo0bits /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+__locale_mb_cur_max /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+__lshift /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__malloc_free_list /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
__malloc_lock /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o)
@@ -5105,12 +6235,32 @@ __malloc_sbrk_start /usr/lib/gcc/arm-none-eabi/13.
__malloc_unlock /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
+__match /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-hexnan.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__mcmp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__mdiff /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__mprec_bigtens /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__mprec_tens /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+__mprec_tinytens /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+__multadd /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+__multiply /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__on_exit_args /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
+__pow5mult /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__preinit_array_end /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
__preinit_array_start /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
+__ratio /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__register_exitproc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
__register_frame_info /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o
+__s2b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
__sclose /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
__seofread /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
@@ -5120,10 +6270,21 @@ __sflush_r /usr/lib/gcc/arm-none-eabi/13.
__sfp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
__sfp_lock_acquire /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
__sfp_lock_release /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+__sfputs_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+__sfvwrite_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
__sglue /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+__sigtramp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+__sigtramp_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
__sinit /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+__smakebuf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+__sprint_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
__sread /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
__sseek /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
@@ -5133,14 +6294,34 @@ __ssputs_r /usr/lib/gcc/arm-none-eabi/13.
__stack /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
__stdio_exit_handler /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
+__subdf3 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_arm_addsubdf3.o)
+__swbuf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+__swbuf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+__swhatbuf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
__swrite /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+__swsetup_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
__udivmoddi4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o)
+__ulp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+_calloc_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
_close build/syscalls.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
_close_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-closer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
+_ctype_ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-ctype_.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcasecmp.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
+ build/profile_storage.o
+ build/profile_repository.o
_ebss build/startup_stm32f767xx.o
_edata build/startup_stm32f767xx.o
_end build/sysmem.o
@@ -5148,36 +6329,66 @@ _estack build/startup_stm32f767xx.o
build/sysmem.o
_execve build/syscalls.o
_exit build/syscalls.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
_fflush_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
_fini /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fini.o)
+_fiprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
_fork build/syscalls.o
+_fprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
_free_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
_fstat build/syscalls.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+_fstat_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
_fwalk_sglue /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fwalk.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
_getpid build/syscalls.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+_getpid_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
_impure_data /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
_impure_ptr /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wsetup.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wbuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
_init /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o)
+_init_signal /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+_init_signal_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
_isatty build/syscalls.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+_isatty_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
_kill build/syscalls.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+_kill_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
_link build/syscalls.o
_lseek build/syscalls.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
@@ -5185,22 +6396,32 @@ _lseek_r /usr/lib/gcc/arm-none-eabi/13.
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
_mainCRTStartup /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
_malloc_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-makebuf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
_malloc_usable_size_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
+_mbtowc_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mbtowc_r.o)
+_mprec_log10 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
_open build/syscalls.o
_printf_common /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
-_printf_float /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
-_printf_i /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+_printf_float /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+_printf_i /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+_raise_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
_read build/syscalls.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
_read_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
_realloc_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
_reclaim_reent /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
_sbrk build/sysmem.o
@@ -5209,26 +6430,110 @@ _sbrk_r /usr/lib/gcc/arm-none-eabi/13.
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o)
_sbss build/startup_stm32f767xx.o
_sdata build/startup_stm32f767xx.o
+_setlocale_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
_sidata build/startup_stm32f767xx.o
-_siprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
-_sprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
+_signal_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+_sniprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+_snprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
_stack_init /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
_start /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
_stat build/syscalls.o
+_strtod_l /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+_strtod_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+_strtol_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+_strtoul_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
_svfiprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
_svfprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
- /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
_times build/syscalls.o
_unlink build/syscalls.o
+_vfiprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+_vfprintf_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
_wait build/syscalls.o
+_wctomb_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-wctomb_r.o)
_write build/syscalls.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
_write_r /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-stdio.o)
+abort /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+ad9102_apply_generated_sram build/ad9102_device.o
+ build/app_core.o
+ad9102_apply_saw build/ad9102_device.o
+ build/app_core.o
+ad9102_begin_custom_upload build/ad9102_device.o
+ build/app_core.o
+ad9102_cancel_custom_upload build/ad9102_device.o
+ build/app_core.o
+ad9102_check_saw_configuration build/ad9102_device.o
+ build/app_core.o
+ad9102_check_sram_configuration build/ad9102_device.o
+ build/app_core.o
+ad9102_commit_custom_upload build/ad9102_device.o
+ build/app_core.o
+ad9102_init build/ad9102_device.o
+ build/app_core.o
+ad9102_stop_output build/ad9102_device.o
+ build/app_core.o
+ad9102_write_custom_chunk build/ad9102_device.o
+ build/app_core.o
+ad9833_apply build/ad9833_device.o
+ build/app_core.o
+adc_mux_process_internal_adc_step build/adc_mux.o
+ build/app_core.o
+adc_mux_read_external_channel build/adc_mux.o
+ build/app_core.o
+app_init build/app_core.o
+ build/main.o
+app_on_dma_tx_complete build/app_core.o
+ build/stm32f7xx_it.o
+app_on_tim6_tick build/app_core.o
+ build/stm32f7xx_it.o
+app_on_tim7_tick build/app_core.o
+ build/stm32f7xx_it.o
+app_on_uart_byte build/app_core.o
+ build/stm32f7xx_it.o
+app_on_uart_error build/app_core.o
+ build/stm32f7xx_it.o
+app_post_event build/app_core.o
+app_protocol_calculate_checksum build/app_uart_protocol.o
+ build/telemetry.o
+app_run_once build/app_core.o
+ build/main.o
+app_uart_protocol_feed_byte build/app_uart_protocol.o
+ build/app_core.o
+app_uart_protocol_init build/app_uart_protocol.o
+app_uart_protocol_reset build/app_uart_protocol.o
+ build/app_core.o
atexit /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-atexit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
-br build/File_Handling.o
-bw build/File_Handling.o
+board_io_configure_spi2_mode build/board_io.o
+ build/ad9102_device.o
+ build/ad9833_device.o
+ build/laser_dac.o
+board_io_enable_uart_rx_irq build/board_io.o
+ build/app_core.o
+board_io_init_standalone_ui build/board_io.o
+ build/ui_status.o
+board_io_is_sd_card_present build/board_io.o
+ build/storage_sd.o
+board_io_is_standalone_ui_button_pressed build/board_io.o
+ build/ui_status.o
+board_io_is_usb_connected build/board_io.o
+board_io_reset_runtime_outputs build/board_io.o
+ build/app_core.o
+board_io_set_laser_enabled build/board_io.o
+ build/app_core.o
+board_io_set_reference_enabled build/board_io.o
+ build/app_core.o
+board_io_set_supply_enabled build/board_io.o
+ build/app_core.o
+board_io_set_tec_channel_enabled build/board_io.o
+ build/app_core.o
+board_io_toggle_debug_pin build/board_io.o
+ build/app_core.o
+board_io_write_signal build/board_io.o
disk build/ff_gen_drv.o
build/diskio.o
disk_initialize build/diskio.o
@@ -5241,8 +6546,15 @@ disk_status build/diskio.o
build/ff.o
disk_write build/diskio.o
build/ff.o
+ds1809_apply_position_from_min build/ds1809_device.o
+ build/app_core.o
+ds1809_pulse build/ds1809_device.o
+ build/app_core.o
environ build/syscalls.o
errno /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fstatr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signalr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-isattyr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-writer.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-lseekr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-readr.o)
@@ -5251,118 +6563,224 @@ errno /usr/lib/gcc/arm-none-eabi/13.
exit /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-exit.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
f_close build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_closedir build/ff.o
- build/File_Handling.o
f_getfree build/ff.o
- build/File_Handling.o
f_gets build/ff.o
f_lseek build/ff.o
- build/File_Handling.o
+ build/profile_storage.o
+ build/storage_sd.o
f_mkdir build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_mkfs build/ff.o
f_mount build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_open build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_opendir build/ff.o
- build/File_Handling.o
f_printf build/ff.o
f_putc build/ff.o
f_puts build/ff.o
f_read build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_readdir build/ff.o
- build/File_Handling.o
f_rename build/ff.o
f_stat build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_sync build/ff.o
+ build/profile_storage.o
f_truncate build/ff.o
f_unlink build/ff.o
- build/File_Handling.o
+ build/storage_sd.o
f_write build/ff.o
- build/File_Handling.o
+ build/profile_storage.o
fflush /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fflush.o)
-fgoto build/main.o
-fil build/File_Handling.o
-flg_tmt build/main.o
- build/stm32f7xx_it.o
-fno build/File_Handling.o
-fre_clust build/File_Handling.o
+fiprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-assert.o)
+fprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fprintf.o)
free /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
- build/File_Handling.o
-free_space build/File_Handling.o
-fresult build/main.o
- build/File_Handling.o
-fs build/File_Handling.o
g_pfnVectors build/startup_stm32f767xx.o
get_fattime build/fatfs.o
build/ff.o
hadc1 build/main.o
+ build/adc_mux.o
build/stm32f7xx_it.o
hadc3 build/main.o
+ build/adc_mux.o
build/stm32f7xx_it.o
hardware_init_hook /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
hsd1 build/main.o
build/bsp_driver_sd.o
htim1 build/main.o
-htim10 build/main.o
- build/stm32f7xx_it.o
-htim11 build/main.o
- build/stm32f7xx_it.o
-htim4 build/main.o
-htim8 build/main.o
- build/stm32f7xx_it.o
+ build/app_core.o
huart8 build/main.o
initialise_monitor_handles build/syscalls.o
+laser_dac_write_channel build/laser_dac.o
+ build/app_core.o
+lcd1602_display_init build/lcd1602_display.o
+ build/ui_status.o
+lcd1602_display_set_lines build/lcd1602_display.o
+ build/ui_status.o
main build/main.o
build/startup_stm32f767xx.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
malloc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-__atexit.o)
- build/File_Handling.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
memchr /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
memcpy /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mprec.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+ build/profile_storage.o
+ build/app_core.o
memmove /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-fvwrite.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o)
memset /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-callocr.o)
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o)
+ build/profile_storage.o
+ build/profile_repository.o
+ build/telemetry.o
+ build/app_uart_protocol.o
+ build/app_core.o
build/stm32f7xx_hal_msp.o
build/main.o
/usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
+nan /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libm_a-s_nan.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+nanf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libm_a-sf_nan.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
pFlash build/stm32f7xx_hal_flash.o
build/stm32f7xx_hal_flash_ex.o
-pfs build/File_Handling.o
+profile_repository_load_first build/profile_repository.o
+ build/app_core.o
+profile_repository_load_next build/profile_repository.o
+ build/app_core.o
+profile_storage_begin build/profile_storage.o
+ build/app_core.o
+profile_storage_cancel build/profile_storage.o
+ build/app_core.o
+profile_storage_commit build/profile_storage.o
+ build/app_core.o
+profile_storage_get_last_status build/profile_storage.o
+ build/app_core.o
+profile_storage_init build/profile_storage.o
+ build/app_core.o
+profile_storage_is_active build/profile_storage.o
+profile_storage_write_chunk build/profile_storage.o
+ build/app_core.o
+raise /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-abort.o)
retSD build/fatfs.o
-siprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
-sizeoffile build/main.o
- build/File_Handling.o
+sd_diskio_debug_get_last_initialize_status build/sd_diskio.o
+sd_diskio_debug_get_last_status_result build/sd_diskio.o
+setlocale /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+signal /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-signal.o)
+sniprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+snprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-snprintf.o)
+ build/ui_status.o
+ build/profile_storage.o
software_init_hook /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/crt0.o
-sprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o)
- build/File_Handling.o
+stm32_dac_output_init build/stm32_dac_output.o
+ build/app_core.o
+stm32_dac_output_set build/stm32_dac_output.o
+ build/app_core.o
+storage_sd_begin build/storage_sd.o
+storage_sd_close_file build/storage_sd.o
+ build/profile_storage.o
+storage_sd_end build/storage_sd.o
+storage_sd_file_exists build/storage_sd.o
+ build/profile_repository.o
+storage_sd_is_available build/storage_sd.o
+ build/profile_storage.o
+ build/app_core.o
+storage_sd_make_directory build/storage_sd.o
+ build/profile_storage.o
+storage_sd_open_file build/storage_sd.o
+ build/profile_storage.o
+storage_sd_read_bytes build/storage_sd.o
+ build/profile_repository.o
+ build/app_core.o
+storage_sd_remove_file build/storage_sd.o
+ build/profile_storage.o
+storage_sd_stat build/storage_sd.o
+ build/profile_storage.o
+ build/app_core.o
+strcasecmp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcasecmp.o)
+ build/profile_repository.o
+strchr /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strchr.o)
+ build/profile_repository.o
strcmp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcmp.o)
- build/File_Handling.o
-strcpy /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strcpy.o)
- build/File_Handling.o
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-locale.o)
+ build/profile_repository.o
strlen /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strlen.o)
- build/File_Handling.o
-task build/main.o
-temp16 build/main.o
-temp32 build/main.o
-test build/main.o
-total build/File_Handling.o
-u_rx_flg build/main.o
-u_tx_flg build/main.o
- build/stm32f7xx_it.o
-uart_buf build/main.o
- build/stm32f7xx_it.o
+ build/profile_storage.o
+ build/profile_repository.o
+strncmp /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncmp.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-gdtoa-gethex.o)
+ /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+ build/ui_status.o
+strncpy /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strncpy.o)
+ build/ui_status.o
+ build/profile_repository.o
+strpbrk /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strpbrk.o)
+ build/profile_repository.o
+strtod /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+strtod_l /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+strtof /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+ build/profile_repository.o
+strtof_l /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtod.o)
+strtol /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+ build/app_core.o
+strtol_l /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtol.o)
+strtoul /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
+ build/profile_repository.o
+strtoul_l /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-strtoul.o)
+telemetry_finalize build/telemetry.o
+ build/app_core.o
+telemetry_reset build/telemetry.o
+ build/app_core.o
+telemetry_set_live_data build/telemetry.o
+ build/app_core.o
+telemetry_set_message_id build/telemetry.o
+ build/app_core.o
+telemetry_to_bytes build/telemetry.o
+ build/app_core.o
+temperature_control_compute_pid build/temperature_control.o
+ build/app_core.o
+uart_transport_init build/uart_transport.o
+ build/app_core.o
+uart_transport_is_dma_busy build/uart_transport.o
+uart_transport_mark_dma_complete build/uart_transport.o
+ build/app_core.o
+uart_transport_reset build/uart_transport.o
+ build/app_core.o
+uart_transport_send_blocking build/uart_transport.o
+ build/app_core.o
+uart_transport_send_dma build/uart_transport.o
+ build/app_core.o
+ui_status_init build/ui_status.o
+ build/app_core.o
+ui_status_poll_event build/ui_status.o
+ build/app_core.o
+ui_status_set_error build/ui_status.o
+ build/app_core.o
+ui_status_set_mode build/ui_status.o
+ build/app_core.o
+ui_status_set_profile_name build/ui_status.o
+ build/app_core.o
uwTick build/stm32f7xx_hal.o
uwTickFreq build/stm32f7xx_hal.o
uwTickPrio build/stm32f7xx_hal.o
build/stm32f7xx_hal_rcc.o
+vfiprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
+vfprintf /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf.o)
diff --git a/build/bsp_driver_sd.lst b/build/bsp_driver_sd.lst
index 5bba144..7988d4e 100644
--- a/build/bsp_driver_sd.lst
+++ b/build/bsp_driver_sd.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccmWzdNV.s page 1
+ARM GAS /tmp/ccVIJNmt.s page 1
1 .cpu cortex-m7
@@ -19,14 +19,15 @@ ARM GAS /tmp/ccmWzdNV.s page 1
16 .Ltext0:
17 .cfi_sections .debug_frame
18 .file 1 "Src/bsp_driver_sd.c"
- 19 .section .text.BSP_SD_ITConfig,"ax",%progbits
+ 19 .section .text.BSP_SD_GetDebugInfo,"ax",%progbits
20 .align 1
- 21 .weak BSP_SD_ITConfig
+ 21 .global BSP_SD_GetDebugInfo
22 .syntax unified
23 .thumb
24 .thumb_func
- 26 BSP_SD_ITConfig:
- 27 .LFB142:
+ 26 BSP_SD_GetDebugInfo:
+ 27 .LVL0:
+ 28 .LFB141:
1:Src/bsp_driver_sd.c **** /* USER CODE BEGIN Header */
2:Src/bsp_driver_sd.c **** /**
3:Src/bsp_driver_sd.c **** ******************************************************************************
@@ -57,10 +58,10 @@ ARM GAS /tmp/ccmWzdNV.s page 1
28:Src/bsp_driver_sd.c ****
29:Src/bsp_driver_sd.c **** /* USER CODE END 0 */
30:Src/bsp_driver_sd.c **** #else
+ ARM GAS /tmp/ccVIJNmt.s page 2
+
+
31:Src/bsp_driver_sd.c **** /* USER CODE BEGIN FirstSection */
- ARM GAS /tmp/ccmWzdNV.s page 2
-
-
32:Src/bsp_driver_sd.c **** /* can be used to modify / undefine following code or add new definitions */
33:Src/bsp_driver_sd.c **** /* USER CODE END FirstSection */
34:Src/bsp_driver_sd.c **** /* Includes ------------------------------------------------------------------*/
@@ -72,996 +73,1172 @@ ARM GAS /tmp/ccmWzdNV.s page 1
40:Src/bsp_driver_sd.c ****
41:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeInitSection */
42:Src/bsp_driver_sd.c **** /* can be used to modify / undefine following code or add code */
- 43:Src/bsp_driver_sd.c **** /* USER CODE END BeforeInitSection */
- 44:Src/bsp_driver_sd.c **** /**
- 45:Src/bsp_driver_sd.c **** * @brief Initializes the SD card device.
- 46:Src/bsp_driver_sd.c **** * @retval SD status
- 47:Src/bsp_driver_sd.c **** */
- 48:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_Init(void)
- 49:Src/bsp_driver_sd.c **** {
- 50:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 51:Src/bsp_driver_sd.c **** /* Check if the SD card is plugged in the slot */
- 52:Src/bsp_driver_sd.c **** if (BSP_SD_IsDetected() != SD_PRESENT)
- 53:Src/bsp_driver_sd.c **** {
- 54:Src/bsp_driver_sd.c **** return MSD_ERROR_SD_NOT_PRESENT;
- 55:Src/bsp_driver_sd.c **** }
- 56:Src/bsp_driver_sd.c **** /* HAL SD initialization */
- 57:Src/bsp_driver_sd.c **** sd_state = HAL_SD_Init(&hsd1);
- 58:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
- 59:Src/bsp_driver_sd.c **** if (sd_state == MSD_OK)
- 60:Src/bsp_driver_sd.c **** {
- 61:Src/bsp_driver_sd.c **** /* Enable wide operation */
- 62:Src/bsp_driver_sd.c **** if (HAL_SD_ConfigWideBusOperation(&hsd1, SDMMC_BUS_WIDE_4B) != HAL_OK)
- 63:Src/bsp_driver_sd.c **** {
- 64:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 65:Src/bsp_driver_sd.c **** }
- 66:Src/bsp_driver_sd.c **** }
- 67:Src/bsp_driver_sd.c ****
- 68:Src/bsp_driver_sd.c **** return sd_state;
- 69:Src/bsp_driver_sd.c **** }
- 70:Src/bsp_driver_sd.c **** /* USER CODE BEGIN AfterInitSection */
- 71:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 72:Src/bsp_driver_sd.c **** /* USER CODE END AfterInitSection */
- 73:Src/bsp_driver_sd.c ****
- 74:Src/bsp_driver_sd.c **** /* USER CODE BEGIN InterruptMode */
- 75:Src/bsp_driver_sd.c **** /**
- 76:Src/bsp_driver_sd.c **** * @brief Configures Interrupt mode for SD detection pin.
- 77:Src/bsp_driver_sd.c **** * @retval Returns 0
- 78:Src/bsp_driver_sd.c **** */
- 79:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ITConfig(void)
- 80:Src/bsp_driver_sd.c **** {
- 28 .loc 1 80 1 view -0
- 29 .cfi_startproc
- 30 @ args = 0, pretend = 0, frame = 0
- 31 @ frame_needed = 0, uses_anonymous_args = 0
- 32 @ link register save eliminated.
- 81:Src/bsp_driver_sd.c **** /* Code to be updated by the user or replaced by one from the FW pack (in a stmxxxx_sd.c file) */
- 82:Src/bsp_driver_sd.c ****
- 83:Src/bsp_driver_sd.c **** return (uint8_t)0;
- ARM GAS /tmp/ccmWzdNV.s page 3
-
-
- 33 .loc 1 83 3 view .LVU1
- 84:Src/bsp_driver_sd.c **** }
- 34 .loc 1 84 1 is_stmt 0 view .LVU2
- 35 0000 0020 movs r0, #0
- 36 0002 7047 bx lr
- 37 .cfi_endproc
- 38 .LFE142:
- 40 .section .text.BSP_SD_ReadBlocks,"ax",%progbits
- 41 .align 1
- 42 .weak BSP_SD_ReadBlocks
- 43 .syntax unified
- 44 .thumb
- 45 .thumb_func
- 47 BSP_SD_ReadBlocks:
- 48 .LVL0:
- 49 .LFB143:
- 85:Src/bsp_driver_sd.c ****
- 86:Src/bsp_driver_sd.c **** /* USER CODE END InterruptMode */
- 87:Src/bsp_driver_sd.c ****
- 88:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeReadBlocksSection */
- 89:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 90:Src/bsp_driver_sd.c **** /* USER CODE END BeforeReadBlocksSection */
- 91:Src/bsp_driver_sd.c **** /**
- 92:Src/bsp_driver_sd.c **** * @brief Reads block(s) from a specified address in an SD card, in polling mode.
- 93:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
- 94:Src/bsp_driver_sd.c **** * @param ReadAddr: Address from where data is to be read
- 95:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to read
- 96:Src/bsp_driver_sd.c **** * @param Timeout: Timeout for read operation
- 97:Src/bsp_driver_sd.c **** * @retval SD status
- 98:Src/bsp_driver_sd.c **** */
- 99:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t
- 100:Src/bsp_driver_sd.c **** {
- 50 .loc 1 100 1 is_stmt 1 view -0
- 51 .cfi_startproc
- 52 @ args = 0, pretend = 0, frame = 0
- 53 @ frame_needed = 0, uses_anonymous_args = 0
- 54 .loc 1 100 1 is_stmt 0 view .LVU4
- 55 0000 00B5 push {lr}
- 56 .LCFI0:
- 57 .cfi_def_cfa_offset 4
- 58 .cfi_offset 14, -4
- 59 0002 83B0 sub sp, sp, #12
- 60 .LCFI1:
- 61 .cfi_def_cfa_offset 16
- 101:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 62 .loc 1 101 3 is_stmt 1 view .LVU5
- 63 .LVL1:
- 102:Src/bsp_driver_sd.c ****
- 103:Src/bsp_driver_sd.c **** if (HAL_SD_ReadBlocks(&hsd1, (uint8_t *)pData, ReadAddr, NumOfBlocks, Timeout) != HAL_OK)
- 64 .loc 1 103 3 view .LVU6
- 65 .loc 1 103 7 is_stmt 0 view .LVU7
- 66 0004 0093 str r3, [sp]
- 67 0006 1346 mov r3, r2
- 68 .LVL2:
- 69 .loc 1 103 7 view .LVU8
- 70 0008 0A46 mov r2, r1
- 71 .LVL3:
- ARM GAS /tmp/ccmWzdNV.s page 4
-
-
- 72 .loc 1 103 7 view .LVU9
- 73 000a 0146 mov r1, r0
- 74 .LVL4:
- 75 .loc 1 103 7 view .LVU10
- 76 000c 0348 ldr r0, .L6
- 77 .LVL5:
- 78 .loc 1 103 7 view .LVU11
- 79 000e FFF7FEFF bl HAL_SD_ReadBlocks
- 80 .LVL6:
- 81 .loc 1 103 6 discriminator 1 view .LVU12
- 82 0012 00B1 cbz r0, .L3
- 104:Src/bsp_driver_sd.c **** {
- 105:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 83 .loc 1 105 14 view .LVU13
- 84 0014 0120 movs r0, #1
- 85 .L3:
- 86 .LVL7:
- 106:Src/bsp_driver_sd.c **** }
- 107:Src/bsp_driver_sd.c ****
- 108:Src/bsp_driver_sd.c **** return sd_state;
- 87 .loc 1 108 3 is_stmt 1 view .LVU14
- 109:Src/bsp_driver_sd.c **** }
- 88 .loc 1 109 1 is_stmt 0 view .LVU15
- 89 0016 03B0 add sp, sp, #12
- 90 .LCFI2:
- 91 .cfi_def_cfa_offset 4
- 92 @ sp needed
- 93 0018 5DF804FB ldr pc, [sp], #4
- 94 .L7:
- 95 .align 2
- 96 .L6:
- 97 001c 00000000 .word hsd1
- 98 .cfi_endproc
- 99 .LFE143:
- 101 .section .text.BSP_SD_WriteBlocks,"ax",%progbits
- 102 .align 1
- 103 .weak BSP_SD_WriteBlocks
- 104 .syntax unified
- 105 .thumb
- 106 .thumb_func
- 108 BSP_SD_WriteBlocks:
- 109 .LVL8:
- 110 .LFB144:
- 110:Src/bsp_driver_sd.c ****
- 111:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeWriteBlocksSection */
- 112:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 113:Src/bsp_driver_sd.c **** /* USER CODE END BeforeWriteBlocksSection */
- 114:Src/bsp_driver_sd.c **** /**
- 115:Src/bsp_driver_sd.c **** * @brief Writes block(s) to a specified address in an SD card, in polling mode.
- 116:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
- 117:Src/bsp_driver_sd.c **** * @param WriteAddr: Address from where data is to be written
- 118:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to write
- 119:Src/bsp_driver_sd.c **** * @param Timeout: Timeout for write operation
- 120:Src/bsp_driver_sd.c **** * @retval SD status
- 121:Src/bsp_driver_sd.c **** */
- 122:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32
- 123:Src/bsp_driver_sd.c **** {
- ARM GAS /tmp/ccmWzdNV.s page 5
-
-
- 111 .loc 1 123 1 is_stmt 1 view -0
- 112 .cfi_startproc
- 113 @ args = 0, pretend = 0, frame = 0
- 114 @ frame_needed = 0, uses_anonymous_args = 0
- 115 .loc 1 123 1 is_stmt 0 view .LVU17
- 116 0000 00B5 push {lr}
- 117 .LCFI3:
- 118 .cfi_def_cfa_offset 4
- 119 .cfi_offset 14, -4
- 120 0002 83B0 sub sp, sp, #12
- 121 .LCFI4:
- 122 .cfi_def_cfa_offset 16
- 124:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 123 .loc 1 124 3 is_stmt 1 view .LVU18
- 124 .LVL9:
- 125:Src/bsp_driver_sd.c ****
- 126:Src/bsp_driver_sd.c **** if (HAL_SD_WriteBlocks(&hsd1, (uint8_t *)pData, WriteAddr, NumOfBlocks, Timeout) != HAL_OK)
- 125 .loc 1 126 3 view .LVU19
- 126 .loc 1 126 7 is_stmt 0 view .LVU20
- 127 0004 0093 str r3, [sp]
- 128 0006 1346 mov r3, r2
- 129 .LVL10:
- 130 .loc 1 126 7 view .LVU21
- 131 0008 0A46 mov r2, r1
- 132 .LVL11:
- 133 .loc 1 126 7 view .LVU22
- 134 000a 0146 mov r1, r0
- 135 .LVL12:
- 136 .loc 1 126 7 view .LVU23
- 137 000c 0348 ldr r0, .L12
- 138 .LVL13:
- 139 .loc 1 126 7 view .LVU24
- 140 000e FFF7FEFF bl HAL_SD_WriteBlocks
- 141 .LVL14:
- 142 .loc 1 126 6 discriminator 1 view .LVU25
- 143 0012 00B1 cbz r0, .L9
- 127:Src/bsp_driver_sd.c **** {
- 128:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 144 .loc 1 128 14 view .LVU26
- 145 0014 0120 movs r0, #1
- 146 .L9:
- 147 .LVL15:
- 129:Src/bsp_driver_sd.c **** }
- 130:Src/bsp_driver_sd.c ****
- 131:Src/bsp_driver_sd.c **** return sd_state;
- 148 .loc 1 131 3 is_stmt 1 view .LVU27
- 132:Src/bsp_driver_sd.c **** }
- 149 .loc 1 132 1 is_stmt 0 view .LVU28
- 150 0016 03B0 add sp, sp, #12
- 151 .LCFI5:
- 152 .cfi_def_cfa_offset 4
- 153 @ sp needed
- 154 0018 5DF804FB ldr pc, [sp], #4
- 155 .L13:
- 156 .align 2
- 157 .L12:
- 158 001c 00000000 .word hsd1
- ARM GAS /tmp/ccmWzdNV.s page 6
-
-
- 159 .cfi_endproc
- 160 .LFE144:
- 162 .section .text.BSP_SD_ReadBlocks_DMA,"ax",%progbits
- 163 .align 1
- 164 .weak BSP_SD_ReadBlocks_DMA
- 165 .syntax unified
- 166 .thumb
- 167 .thumb_func
- 169 BSP_SD_ReadBlocks_DMA:
- 170 .LVL16:
- 171 .LFB145:
- 133:Src/bsp_driver_sd.c ****
- 134:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeReadDMABlocksSection */
- 135:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 136:Src/bsp_driver_sd.c **** /* USER CODE END BeforeReadDMABlocksSection */
- 137:Src/bsp_driver_sd.c **** /**
- 138:Src/bsp_driver_sd.c **** * @brief Reads block(s) from a specified address in an SD card, in DMA mode.
- 139:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
- 140:Src/bsp_driver_sd.c **** * @param ReadAddr: Address from where data is to be read
- 141:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to read
- 142:Src/bsp_driver_sd.c **** * @retval SD status
- 143:Src/bsp_driver_sd.c **** */
- 144:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks)
- 145:Src/bsp_driver_sd.c **** {
- 172 .loc 1 145 1 is_stmt 1 view -0
- 173 .cfi_startproc
- 174 @ args = 0, pretend = 0, frame = 0
- 175 @ frame_needed = 0, uses_anonymous_args = 0
- 176 .loc 1 145 1 is_stmt 0 view .LVU30
- 177 0000 08B5 push {r3, lr}
- 178 .LCFI6:
- 179 .cfi_def_cfa_offset 8
- 180 .cfi_offset 3, -8
- 181 .cfi_offset 14, -4
- 182 0002 1346 mov r3, r2
- 146:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 183 .loc 1 146 3 is_stmt 1 view .LVU31
- 184 .LVL17:
- 147:Src/bsp_driver_sd.c ****
- 148:Src/bsp_driver_sd.c **** /* Read block(s) in DMA transfer mode */
- 149:Src/bsp_driver_sd.c **** if (HAL_SD_ReadBlocks_DMA(&hsd1, (uint8_t *)pData, ReadAddr, NumOfBlocks) != HAL_OK)
- 185 .loc 1 149 3 view .LVU32
- 186 .loc 1 149 7 is_stmt 0 view .LVU33
- 187 0004 0A46 mov r2, r1
- 188 .LVL18:
- 189 .loc 1 149 7 view .LVU34
- 190 0006 0146 mov r1, r0
- 191 .LVL19:
- 192 .loc 1 149 7 view .LVU35
- 193 0008 0248 ldr r0, .L18
- 194 .LVL20:
- 195 .loc 1 149 7 view .LVU36
- 196 000a FFF7FEFF bl HAL_SD_ReadBlocks_DMA
- 197 .LVL21:
- 198 .loc 1 149 6 discriminator 1 view .LVU37
- 199 000e 00B1 cbz r0, .L15
- 150:Src/bsp_driver_sd.c **** {
- ARM GAS /tmp/ccmWzdNV.s page 7
-
-
- 151:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 200 .loc 1 151 14 view .LVU38
- 201 0010 0120 movs r0, #1
- 202 .L15:
- 203 .LVL22:
- 152:Src/bsp_driver_sd.c **** }
- 153:Src/bsp_driver_sd.c ****
- 154:Src/bsp_driver_sd.c **** return sd_state;
- 204 .loc 1 154 3 is_stmt 1 view .LVU39
- 155:Src/bsp_driver_sd.c **** }
- 205 .loc 1 155 1 is_stmt 0 view .LVU40
- 206 0012 08BD pop {r3, pc}
- 207 .L19:
- 208 .align 2
- 209 .L18:
- 210 0014 00000000 .word hsd1
- 211 .cfi_endproc
- 212 .LFE145:
- 214 .section .text.BSP_SD_WriteBlocks_DMA,"ax",%progbits
- 215 .align 1
- 216 .weak BSP_SD_WriteBlocks_DMA
- 217 .syntax unified
- 218 .thumb
- 219 .thumb_func
- 221 BSP_SD_WriteBlocks_DMA:
- 222 .LVL23:
- 223 .LFB146:
- 156:Src/bsp_driver_sd.c ****
- 157:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeWriteDMABlocksSection */
- 158:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 159:Src/bsp_driver_sd.c **** /* USER CODE END BeforeWriteDMABlocksSection */
- 160:Src/bsp_driver_sd.c **** /**
- 161:Src/bsp_driver_sd.c **** * @brief Writes block(s) to a specified address in an SD card, in DMA mode.
- 162:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
- 163:Src/bsp_driver_sd.c **** * @param WriteAddr: Address from where data is to be written
- 164:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to write
- 165:Src/bsp_driver_sd.c **** * @retval SD status
- 166:Src/bsp_driver_sd.c **** */
- 167:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks)
- 168:Src/bsp_driver_sd.c **** {
- 224 .loc 1 168 1 is_stmt 1 view -0
- 225 .cfi_startproc
- 226 @ args = 0, pretend = 0, frame = 0
- 227 @ frame_needed = 0, uses_anonymous_args = 0
- 228 .loc 1 168 1 is_stmt 0 view .LVU42
- 229 0000 08B5 push {r3, lr}
- 230 .LCFI7:
- 231 .cfi_def_cfa_offset 8
- 232 .cfi_offset 3, -8
- 233 .cfi_offset 14, -4
- 234 0002 1346 mov r3, r2
- 169:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 235 .loc 1 169 3 is_stmt 1 view .LVU43
- 236 .LVL24:
- 170:Src/bsp_driver_sd.c ****
- 171:Src/bsp_driver_sd.c **** /* Write block(s) in DMA transfer mode */
- 172:Src/bsp_driver_sd.c **** if (HAL_SD_WriteBlocks_DMA(&hsd1, (uint8_t *)pData, WriteAddr, NumOfBlocks) != HAL_OK)
- ARM GAS /tmp/ccmWzdNV.s page 8
-
-
- 237 .loc 1 172 3 view .LVU44
- 238 .loc 1 172 7 is_stmt 0 view .LVU45
- 239 0004 0A46 mov r2, r1
- 240 .LVL25:
- 241 .loc 1 172 7 view .LVU46
- 242 0006 0146 mov r1, r0
- 243 .LVL26:
- 244 .loc 1 172 7 view .LVU47
- 245 0008 0248 ldr r0, .L24
- 246 .LVL27:
- 247 .loc 1 172 7 view .LVU48
- 248 000a FFF7FEFF bl HAL_SD_WriteBlocks_DMA
- 249 .LVL28:
- 250 .loc 1 172 6 discriminator 1 view .LVU49
- 251 000e 00B1 cbz r0, .L21
- 173:Src/bsp_driver_sd.c **** {
- 174:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 252 .loc 1 174 14 view .LVU50
- 253 0010 0120 movs r0, #1
- 254 .L21:
- 255 .LVL29:
- 175:Src/bsp_driver_sd.c **** }
- 176:Src/bsp_driver_sd.c ****
- 177:Src/bsp_driver_sd.c **** return sd_state;
- 256 .loc 1 177 3 is_stmt 1 view .LVU51
- 178:Src/bsp_driver_sd.c **** }
- 257 .loc 1 178 1 is_stmt 0 view .LVU52
- 258 0012 08BD pop {r3, pc}
- 259 .L25:
- 260 .align 2
- 261 .L24:
- 262 0014 00000000 .word hsd1
- 263 .cfi_endproc
- 264 .LFE146:
- 266 .section .text.BSP_SD_Erase,"ax",%progbits
- 267 .align 1
- 268 .weak BSP_SD_Erase
- 269 .syntax unified
- 270 .thumb
- 271 .thumb_func
- 273 BSP_SD_Erase:
- 274 .LVL30:
- 275 .LFB147:
- 179:Src/bsp_driver_sd.c ****
- 180:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeEraseSection */
- 181:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 182:Src/bsp_driver_sd.c **** /* USER CODE END BeforeEraseSection */
- 183:Src/bsp_driver_sd.c **** /**
- 184:Src/bsp_driver_sd.c **** * @brief Erases the specified memory area of the given SD card.
- 185:Src/bsp_driver_sd.c **** * @param StartAddr: Start byte address
- 186:Src/bsp_driver_sd.c **** * @param EndAddr: End byte address
- 187:Src/bsp_driver_sd.c **** * @retval SD status
- 188:Src/bsp_driver_sd.c **** */
- 189:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_Erase(uint32_t StartAddr, uint32_t EndAddr)
- 190:Src/bsp_driver_sd.c **** {
- 276 .loc 1 190 1 is_stmt 1 view -0
- 277 .cfi_startproc
- ARM GAS /tmp/ccmWzdNV.s page 9
-
-
- 278 @ args = 0, pretend = 0, frame = 0
- 279 @ frame_needed = 0, uses_anonymous_args = 0
- 280 .loc 1 190 1 is_stmt 0 view .LVU54
- 281 0000 08B5 push {r3, lr}
- 282 .LCFI8:
- 283 .cfi_def_cfa_offset 8
- 284 .cfi_offset 3, -8
- 285 .cfi_offset 14, -4
- 286 0002 0A46 mov r2, r1
- 191:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 287 .loc 1 191 3 is_stmt 1 view .LVU55
- 288 .LVL31:
- 192:Src/bsp_driver_sd.c ****
- 193:Src/bsp_driver_sd.c **** if (HAL_SD_Erase(&hsd1, StartAddr, EndAddr) != HAL_OK)
- 289 .loc 1 193 3 view .LVU56
- 290 .loc 1 193 7 is_stmt 0 view .LVU57
- 291 0004 0146 mov r1, r0
- 292 .LVL32:
- 293 .loc 1 193 7 view .LVU58
- 294 0006 0348 ldr r0, .L30
- 295 .LVL33:
- 296 .loc 1 193 7 view .LVU59
- 297 0008 FFF7FEFF bl HAL_SD_Erase
- 298 .LVL34:
- 299 .loc 1 193 6 discriminator 1 view .LVU60
- 300 000c 00B1 cbz r0, .L27
- 194:Src/bsp_driver_sd.c **** {
- 195:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
- 301 .loc 1 195 14 view .LVU61
- 302 000e 0120 movs r0, #1
- 303 .L27:
- 304 .LVL35:
- 196:Src/bsp_driver_sd.c **** }
- 197:Src/bsp_driver_sd.c ****
- 198:Src/bsp_driver_sd.c **** return sd_state;
- 305 .loc 1 198 3 is_stmt 1 view .LVU62
- 199:Src/bsp_driver_sd.c **** }
- 306 .loc 1 199 1 is_stmt 0 view .LVU63
- 307 0010 08BD pop {r3, pc}
- 308 .L31:
- 309 0012 00BF .align 2
- 310 .L30:
- 311 0014 00000000 .word hsd1
- 312 .cfi_endproc
- 313 .LFE147:
- 315 .section .text.BSP_SD_GetCardState,"ax",%progbits
- 316 .align 1
- 317 .weak BSP_SD_GetCardState
- 318 .syntax unified
- 319 .thumb
- 320 .thumb_func
- 322 BSP_SD_GetCardState:
- 323 .LFB148:
- 200:Src/bsp_driver_sd.c ****
- 201:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeGetCardStateSection */
- 202:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 203:Src/bsp_driver_sd.c **** /* USER CODE END BeforeGetCardStateSection */
- ARM GAS /tmp/ccmWzdNV.s page 10
-
-
- 204:Src/bsp_driver_sd.c ****
- 205:Src/bsp_driver_sd.c **** /**
- 206:Src/bsp_driver_sd.c **** * @brief Gets the current SD card data status.
- 207:Src/bsp_driver_sd.c **** * @param None
- 208:Src/bsp_driver_sd.c **** * @retval Data transfer state.
- 209:Src/bsp_driver_sd.c **** * This value can be one of the following values:
- 210:Src/bsp_driver_sd.c **** * @arg SD_TRANSFER_OK: No data transfer is acting
- 211:Src/bsp_driver_sd.c **** * @arg SD_TRANSFER_BUSY: Data transfer is acting
- 212:Src/bsp_driver_sd.c **** */
- 213:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_GetCardState(void)
- 214:Src/bsp_driver_sd.c **** {
- 324 .loc 1 214 1 is_stmt 1 view -0
- 325 .cfi_startproc
- 326 @ args = 0, pretend = 0, frame = 0
- 327 @ frame_needed = 0, uses_anonymous_args = 0
- 328 0000 08B5 push {r3, lr}
- 329 .LCFI9:
- 330 .cfi_def_cfa_offset 8
- 331 .cfi_offset 3, -8
- 332 .cfi_offset 14, -4
- 215:Src/bsp_driver_sd.c **** return ((HAL_SD_GetCardState(&hsd1) == HAL_SD_CARD_TRANSFER ) ? SD_TRANSFER_OK : SD_TRANSFER_BUSY
- 333 .loc 1 215 3 view .LVU65
- 334 .loc 1 215 12 is_stmt 0 view .LVU66
- 335 0002 0348 ldr r0, .L34
- 336 0004 FFF7FEFF bl HAL_SD_GetCardState
- 337 .LVL36:
- 216:Src/bsp_driver_sd.c **** }
- 338 .loc 1 216 1 view .LVU67
- 339 0008 0438 subs r0, r0, #4
- 340 000a 18BF it ne
- 341 000c 0120 movne r0, #1
- 342 000e 08BD pop {r3, pc}
- 343 .L35:
- 344 .align 2
- 345 .L34:
- 346 0010 00000000 .word hsd1
- 347 .cfi_endproc
- 348 .LFE148:
- 350 .section .text.BSP_SD_GetCardInfo,"ax",%progbits
- 351 .align 1
- 352 .weak BSP_SD_GetCardInfo
- 353 .syntax unified
- 354 .thumb
- 355 .thumb_func
- 357 BSP_SD_GetCardInfo:
- 358 .LVL37:
- 359 .LFB149:
- 217:Src/bsp_driver_sd.c ****
- 218:Src/bsp_driver_sd.c **** /**
- 219:Src/bsp_driver_sd.c **** * @brief Get SD information about specific SD card.
- 220:Src/bsp_driver_sd.c **** * @param CardInfo: Pointer to HAL_SD_CardInfoTypedef structure
- 221:Src/bsp_driver_sd.c **** * @retval None
- 222:Src/bsp_driver_sd.c **** */
- 223:Src/bsp_driver_sd.c **** __weak void BSP_SD_GetCardInfo(HAL_SD_CardInfoTypeDef *CardInfo)
- 224:Src/bsp_driver_sd.c **** {
- 360 .loc 1 224 1 is_stmt 1 view -0
- 361 .cfi_startproc
- ARM GAS /tmp/ccmWzdNV.s page 11
-
-
- 362 @ args = 0, pretend = 0, frame = 0
- 363 @ frame_needed = 0, uses_anonymous_args = 0
- 364 .loc 1 224 1 is_stmt 0 view .LVU69
- 365 0000 08B5 push {r3, lr}
- 366 .LCFI10:
- 367 .cfi_def_cfa_offset 8
- 368 .cfi_offset 3, -8
- 369 .cfi_offset 14, -4
- 370 0002 0146 mov r1, r0
- 225:Src/bsp_driver_sd.c **** /* Get SD card Information */
- 226:Src/bsp_driver_sd.c **** HAL_SD_GetCardInfo(&hsd1, CardInfo);
- 371 .loc 1 226 3 is_stmt 1 view .LVU70
- 372 0004 0148 ldr r0, .L38
- 373 .LVL38:
- 374 .loc 1 226 3 is_stmt 0 view .LVU71
- 375 0006 FFF7FEFF bl HAL_SD_GetCardInfo
- 376 .LVL39:
- 227:Src/bsp_driver_sd.c **** }
- 377 .loc 1 227 1 view .LVU72
- 378 000a 08BD pop {r3, pc}
- 379 .L39:
- 380 .align 2
- 381 .L38:
- 382 000c 00000000 .word hsd1
- 383 .cfi_endproc
- 384 .LFE149:
- 386 .section .text.BSP_SD_AbortCallback,"ax",%progbits
- 387 .align 1
- 388 .weak BSP_SD_AbortCallback
- 389 .syntax unified
- 390 .thumb
- 391 .thumb_func
- 393 BSP_SD_AbortCallback:
- 394 .LFB153:
- 228:Src/bsp_driver_sd.c ****
- 229:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeCallBacksSection */
- 230:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
- 231:Src/bsp_driver_sd.c **** /* USER CODE END BeforeCallBacksSection */
- 232:Src/bsp_driver_sd.c **** /**
- 233:Src/bsp_driver_sd.c **** * @brief SD Abort callbacks
- 234:Src/bsp_driver_sd.c **** * @param hsd: SD handle
- 235:Src/bsp_driver_sd.c **** * @retval None
- 236:Src/bsp_driver_sd.c **** */
- 237:Src/bsp_driver_sd.c **** void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd)
- 238:Src/bsp_driver_sd.c **** {
- 239:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
- 240:Src/bsp_driver_sd.c **** }
- 241:Src/bsp_driver_sd.c ****
- 242:Src/bsp_driver_sd.c **** /**
- 243:Src/bsp_driver_sd.c **** * @brief Tx Transfer completed callback
- 244:Src/bsp_driver_sd.c **** * @param hsd: SD handle
- 245:Src/bsp_driver_sd.c **** * @retval None
- 246:Src/bsp_driver_sd.c **** */
- 247:Src/bsp_driver_sd.c **** void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
- 248:Src/bsp_driver_sd.c **** {
- 249:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
- 250:Src/bsp_driver_sd.c **** }
- ARM GAS /tmp/ccmWzdNV.s page 12
-
-
- 251:Src/bsp_driver_sd.c ****
- 252:Src/bsp_driver_sd.c **** /**
- 253:Src/bsp_driver_sd.c **** * @brief Rx Transfer completed callback
- 254:Src/bsp_driver_sd.c **** * @param hsd: SD handle
- 255:Src/bsp_driver_sd.c **** * @retval None
- 256:Src/bsp_driver_sd.c **** */
- 257:Src/bsp_driver_sd.c **** void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
- 258:Src/bsp_driver_sd.c **** {
- 259:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
- 260:Src/bsp_driver_sd.c **** }
- 261:Src/bsp_driver_sd.c ****
- 262:Src/bsp_driver_sd.c **** /* USER CODE BEGIN CallBacksSection_C */
- 263:Src/bsp_driver_sd.c **** /**
- 264:Src/bsp_driver_sd.c **** * @brief BSP SD Abort callback
- 265:Src/bsp_driver_sd.c **** * @retval None
- 266:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
- 267:Src/bsp_driver_sd.c **** */
- 268:Src/bsp_driver_sd.c **** __weak void BSP_SD_AbortCallback(void)
- 269:Src/bsp_driver_sd.c **** {
- 395 .loc 1 269 1 is_stmt 1 view -0
- 396 .cfi_startproc
- 397 @ args = 0, pretend = 0, frame = 0
- 398 @ frame_needed = 0, uses_anonymous_args = 0
- 399 @ link register save eliminated.
- 270:Src/bsp_driver_sd.c ****
- 271:Src/bsp_driver_sd.c **** }
- 400 .loc 1 271 1 view .LVU74
- 401 0000 7047 bx lr
- 402 .cfi_endproc
- 403 .LFE153:
- 405 .section .text.HAL_SD_AbortCallback,"ax",%progbits
- 406 .align 1
- 407 .global HAL_SD_AbortCallback
- 408 .syntax unified
- 409 .thumb
- 410 .thumb_func
- 412 HAL_SD_AbortCallback:
- 413 .LVL40:
- 414 .LFB150:
- 238:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
- 415 .loc 1 238 1 view -0
- 416 .cfi_startproc
- 417 @ args = 0, pretend = 0, frame = 0
- 418 @ frame_needed = 0, uses_anonymous_args = 0
- 238:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
- 419 .loc 1 238 1 is_stmt 0 view .LVU76
- 420 0000 08B5 push {r3, lr}
- 421 .LCFI11:
- 422 .cfi_def_cfa_offset 8
- 423 .cfi_offset 3, -8
- 424 .cfi_offset 14, -4
- 239:Src/bsp_driver_sd.c **** }
- 425 .loc 1 239 3 is_stmt 1 view .LVU77
- 426 0002 FFF7FEFF bl BSP_SD_AbortCallback
- 427 .LVL41:
- 240:Src/bsp_driver_sd.c ****
- 428 .loc 1 240 1 is_stmt 0 view .LVU78
- ARM GAS /tmp/ccmWzdNV.s page 13
-
-
- 429 0006 08BD pop {r3, pc}
- 430 .cfi_endproc
- 431 .LFE150:
- 433 .section .text.BSP_SD_WriteCpltCallback,"ax",%progbits
- 434 .align 1
- 435 .weak BSP_SD_WriteCpltCallback
- 436 .syntax unified
- 437 .thumb
- 438 .thumb_func
- 440 BSP_SD_WriteCpltCallback:
- 441 .LFB154:
- 272:Src/bsp_driver_sd.c ****
- 273:Src/bsp_driver_sd.c **** /**
- 274:Src/bsp_driver_sd.c **** * @brief BSP Tx Transfer completed callback
- 275:Src/bsp_driver_sd.c **** * @retval None
- 276:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
- 277:Src/bsp_driver_sd.c **** */
- 278:Src/bsp_driver_sd.c **** __weak void BSP_SD_WriteCpltCallback(void)
- 279:Src/bsp_driver_sd.c **** {
- 442 .loc 1 279 1 is_stmt 1 view -0
- 443 .cfi_startproc
- 444 @ args = 0, pretend = 0, frame = 0
- 445 @ frame_needed = 0, uses_anonymous_args = 0
- 446 @ link register save eliminated.
- 280:Src/bsp_driver_sd.c ****
- 281:Src/bsp_driver_sd.c **** }
- 447 .loc 1 281 1 view .LVU80
- 448 0000 7047 bx lr
- 449 .cfi_endproc
- 450 .LFE154:
- 452 .section .text.HAL_SD_TxCpltCallback,"ax",%progbits
- 453 .align 1
- 454 .global HAL_SD_TxCpltCallback
- 455 .syntax unified
- 456 .thumb
- 457 .thumb_func
- 459 HAL_SD_TxCpltCallback:
- 460 .LVL42:
- 461 .LFB151:
- 248:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
- 462 .loc 1 248 1 view -0
- 463 .cfi_startproc
- 464 @ args = 0, pretend = 0, frame = 0
- 465 @ frame_needed = 0, uses_anonymous_args = 0
- 248:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
- 466 .loc 1 248 1 is_stmt 0 view .LVU82
- 467 0000 08B5 push {r3, lr}
- 468 .LCFI12:
- 469 .cfi_def_cfa_offset 8
- 470 .cfi_offset 3, -8
- 471 .cfi_offset 14, -4
- 249:Src/bsp_driver_sd.c **** }
- 472 .loc 1 249 3 is_stmt 1 view .LVU83
- 473 0002 FFF7FEFF bl BSP_SD_WriteCpltCallback
- 474 .LVL43:
- 250:Src/bsp_driver_sd.c ****
- 475 .loc 1 250 1 is_stmt 0 view .LVU84
- ARM GAS /tmp/ccmWzdNV.s page 14
-
-
- 476 0006 08BD pop {r3, pc}
- 477 .cfi_endproc
- 478 .LFE151:
- 480 .section .text.BSP_SD_ReadCpltCallback,"ax",%progbits
- 481 .align 1
- 482 .weak BSP_SD_ReadCpltCallback
- 483 .syntax unified
- 484 .thumb
- 485 .thumb_func
- 487 BSP_SD_ReadCpltCallback:
- 488 .LFB155:
- 282:Src/bsp_driver_sd.c ****
- 283:Src/bsp_driver_sd.c **** /**
- 284:Src/bsp_driver_sd.c **** * @brief BSP Rx Transfer completed callback
- 285:Src/bsp_driver_sd.c **** * @retval None
- 286:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
- 287:Src/bsp_driver_sd.c **** */
- 288:Src/bsp_driver_sd.c **** __weak void BSP_SD_ReadCpltCallback(void)
- 289:Src/bsp_driver_sd.c **** {
- 489 .loc 1 289 1 is_stmt 1 view -0
- 490 .cfi_startproc
- 491 @ args = 0, pretend = 0, frame = 0
- 492 @ frame_needed = 0, uses_anonymous_args = 0
- 493 @ link register save eliminated.
- 290:Src/bsp_driver_sd.c ****
- 291:Src/bsp_driver_sd.c **** }
- 494 .loc 1 291 1 view .LVU86
- 495 0000 7047 bx lr
- 496 .cfi_endproc
- 497 .LFE155:
- 499 .section .text.HAL_SD_RxCpltCallback,"ax",%progbits
- 500 .align 1
- 501 .global HAL_SD_RxCpltCallback
- 502 .syntax unified
- 503 .thumb
- 504 .thumb_func
- 506 HAL_SD_RxCpltCallback:
- 507 .LVL44:
- 508 .LFB152:
- 258:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
- 509 .loc 1 258 1 view -0
- 510 .cfi_startproc
- 511 @ args = 0, pretend = 0, frame = 0
- 512 @ frame_needed = 0, uses_anonymous_args = 0
- 258:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
- 513 .loc 1 258 1 is_stmt 0 view .LVU88
- 514 0000 08B5 push {r3, lr}
- 515 .LCFI13:
- 516 .cfi_def_cfa_offset 8
- 517 .cfi_offset 3, -8
- 518 .cfi_offset 14, -4
- 259:Src/bsp_driver_sd.c **** }
- 519 .loc 1 259 3 is_stmt 1 view .LVU89
- 520 0002 FFF7FEFF bl BSP_SD_ReadCpltCallback
- 521 .LVL45:
- 260:Src/bsp_driver_sd.c ****
- 522 .loc 1 260 1 is_stmt 0 view .LVU90
- ARM GAS /tmp/ccmWzdNV.s page 15
-
-
- 523 0006 08BD pop {r3, pc}
- 524 .cfi_endproc
- 525 .LFE152:
- 527 .section .text.BSP_SD_IsDetected,"ax",%progbits
- 528 .align 1
- 529 .weak BSP_SD_IsDetected
- 530 .syntax unified
- 531 .thumb
- 532 .thumb_func
- 534 BSP_SD_IsDetected:
- 535 .LFB156:
- 292:Src/bsp_driver_sd.c **** /* USER CODE END CallBacksSection_C */
- 293:Src/bsp_driver_sd.c **** #endif
- 294:Src/bsp_driver_sd.c ****
- 295:Src/bsp_driver_sd.c **** /**
- 296:Src/bsp_driver_sd.c **** * @brief Detects if SD card is correctly plugged in the memory slot or not.
- 297:Src/bsp_driver_sd.c **** * @param None
- 298:Src/bsp_driver_sd.c **** * @retval Returns if SD is detected or not
- 299:Src/bsp_driver_sd.c **** */
- 300:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_IsDetected(void)
- 301:Src/bsp_driver_sd.c **** {
- 536 .loc 1 301 1 is_stmt 1 view -0
- 537 .cfi_startproc
- 538 @ args = 0, pretend = 0, frame = 8
- 539 @ frame_needed = 0, uses_anonymous_args = 0
- 540 0000 00B5 push {lr}
- 541 .LCFI14:
- 542 .cfi_def_cfa_offset 4
- 543 .cfi_offset 14, -4
- 544 0002 83B0 sub sp, sp, #12
- 545 .LCFI15:
- 546 .cfi_def_cfa_offset 16
- 302:Src/bsp_driver_sd.c **** __IO uint8_t status = SD_PRESENT;
- 547 .loc 1 302 3 view .LVU92
- 548 .loc 1 302 16 is_stmt 0 view .LVU93
- 549 0004 0123 movs r3, #1
- 550 0006 8DF80730 strb r3, [sp, #7]
- 303:Src/bsp_driver_sd.c ****
- 304:Src/bsp_driver_sd.c **** if (BSP_PlatformIsDetected() == 0x0)
- 551 .loc 1 304 3 is_stmt 1 view .LVU94
- 552 .loc 1 304 7 is_stmt 0 view .LVU95
- 553 000a FFF7FEFF bl BSP_PlatformIsDetected
- 554 .LVL46:
- 555 .loc 1 304 6 discriminator 1 view .LVU96
- 556 000e 10B9 cbnz r0, .L50
- 305:Src/bsp_driver_sd.c **** {
- 306:Src/bsp_driver_sd.c **** status = SD_NOT_PRESENT;
- 557 .loc 1 306 5 is_stmt 1 view .LVU97
- 558 .loc 1 306 12 is_stmt 0 view .LVU98
- 559 0010 0023 movs r3, #0
- 560 0012 8DF80730 strb r3, [sp, #7]
- 561 .L50:
- 307:Src/bsp_driver_sd.c **** }
- 308:Src/bsp_driver_sd.c ****
- 309:Src/bsp_driver_sd.c **** return status;
- 562 .loc 1 309 3 is_stmt 1 view .LVU99
- 563 .loc 1 309 10 is_stmt 0 view .LVU100
- ARM GAS /tmp/ccmWzdNV.s page 16
-
-
- 564 0016 9DF80700 ldrb r0, [sp, #7] @ zero_extendqisi2
- 310:Src/bsp_driver_sd.c **** }
- 565 .loc 1 310 1 view .LVU101
- 566 001a 03B0 add sp, sp, #12
- 567 .LCFI16:
- 568 .cfi_def_cfa_offset 4
- 569 @ sp needed
- 570 001c 5DF804FB ldr pc, [sp], #4
- 571 .cfi_endproc
- 572 .LFE156:
- 574 .section .text.BSP_SD_Init,"ax",%progbits
- 575 .align 1
- 576 .weak BSP_SD_Init
- 577 .syntax unified
- 578 .thumb
- 579 .thumb_func
- 581 BSP_SD_Init:
- 582 .LFB141:
- 49:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
- 583 .loc 1 49 1 is_stmt 1 view -0
- 584 .cfi_startproc
- 585 @ args = 0, pretend = 0, frame = 0
- 586 @ frame_needed = 0, uses_anonymous_args = 0
- 587 0000 38B5 push {r3, r4, r5, lr}
- 588 .LCFI17:
- 589 .cfi_def_cfa_offset 16
- 590 .cfi_offset 3, -16
- 591 .cfi_offset 4, -12
- 592 .cfi_offset 5, -8
- 593 .cfi_offset 14, -4
- 50:Src/bsp_driver_sd.c **** /* Check if the SD card is plugged in the slot */
- 594 .loc 1 50 3 view .LVU103
- 595 .LVL47:
+ 43:Src/bsp_driver_sd.c **** static volatile uint8_t g_last_bsp_sd_init_status = MSD_ERROR_SD_NOT_PRESENT;
+ 44:Src/bsp_driver_sd.c **** static volatile uint8_t g_last_bsp_sd_detect_status = SD_NOT_PRESENT;
+ 45:Src/bsp_driver_sd.c **** static volatile uint8_t g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ 46:Src/bsp_driver_sd.c **** static volatile uint8_t g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+ 47:Src/bsp_driver_sd.c **** static volatile uint32_t g_last_bsp_sd_hal_error = 0u;
+ 48:Src/bsp_driver_sd.c ****
+ 49:Src/bsp_driver_sd.c **** void BSP_SD_GetDebugInfo(bsp_sd_debug_info_t *out_info)
+ 50:Src/bsp_driver_sd.c **** {
+ 29 .loc 1 50 1 view -0
+ 30 .cfi_startproc
+ 31 @ args = 0, pretend = 0, frame = 0
+ 32 @ frame_needed = 0, uses_anonymous_args = 0
+ 33 @ link register save eliminated.
+ 51:Src/bsp_driver_sd.c **** if (out_info == NULL)
+ 34 .loc 1 51 3 view .LVU1
+ 35 .loc 1 51 6 is_stmt 0 view .LVU2
+ 36 0000 70B1 cbz r0, .L1
52:Src/bsp_driver_sd.c **** {
- 596 .loc 1 52 3 view .LVU104
- 52:Src/bsp_driver_sd.c **** {
- 597 .loc 1 52 7 is_stmt 0 view .LVU105
- 598 0002 FFF7FEFF bl BSP_SD_IsDetected
- 599 .LVL48:
- 52:Src/bsp_driver_sd.c **** {
- 600 .loc 1 52 6 discriminator 1 view .LVU106
- 601 0006 0128 cmp r0, #1
- 602 0008 02D0 beq .L57
+ 53:Src/bsp_driver_sd.c **** return;
54:Src/bsp_driver_sd.c **** }
- 603 .loc 1 54 12 view .LVU107
- 604 000a 0225 movs r5, #2
- 605 .LVL49:
- 606 .L53:
- 69:Src/bsp_driver_sd.c **** /* USER CODE BEGIN AfterInitSection */
- 607 .loc 1 69 1 view .LVU108
- 608 000c 2846 mov r0, r5
- 609 000e 38BD pop {r3, r4, r5, pc}
- 610 .LVL50:
- 611 .L57:
- 69:Src/bsp_driver_sd.c **** /* USER CODE BEGIN AfterInitSection */
- 612 .loc 1 69 1 view .LVU109
- 613 0010 0446 mov r4, r0
- ARM GAS /tmp/ccmWzdNV.s page 17
+ 55:Src/bsp_driver_sd.c ****
+ 56:Src/bsp_driver_sd.c **** out_info->last_init_status = g_last_bsp_sd_init_status;
+ 37 .loc 1 56 3 is_stmt 1 view .LVU3
+ 38 .loc 1 56 30 is_stmt 0 view .LVU4
+ 39 0002 084A ldr r2, .L3
+ 40 0004 1278 ldrb r2, [r2] @ zero_extendqisi2
+ 41 0006 0270 strb r2, [r0]
+ 57:Src/bsp_driver_sd.c **** out_info->last_detect_status = g_last_bsp_sd_detect_status;
+ 42 .loc 1 57 3 is_stmt 1 view .LVU5
+ 43 .loc 1 57 32 is_stmt 0 view .LVU6
+ 44 0008 074A ldr r2, .L3+4
+ 45 000a 1278 ldrb r2, [r2] @ zero_extendqisi2
+ 46 000c 4270 strb r2, [r0, #1]
+ 58:Src/bsp_driver_sd.c **** out_info->last_hal_init_status = g_last_bsp_sd_hal_init_status;
+ 47 .loc 1 58 3 is_stmt 1 view .LVU7
+ 48 .loc 1 58 34 is_stmt 0 view .LVU8
+ 49 000e 074A ldr r2, .L3+8
+ 50 0010 1278 ldrb r2, [r2] @ zero_extendqisi2
+ 51 0012 8270 strb r2, [r0, #2]
+ 59:Src/bsp_driver_sd.c **** out_info->last_wide_bus_status = g_last_bsp_sd_wide_bus_status;
+ 52 .loc 1 59 3 is_stmt 1 view .LVU9
+ 53 .loc 1 59 34 is_stmt 0 view .LVU10
+ 54 0014 064A ldr r2, .L3+12
+ 55 0016 1278 ldrb r2, [r2] @ zero_extendqisi2
+ 56 0018 C270 strb r2, [r0, #3]
+ ARM GAS /tmp/ccVIJNmt.s page 3
- 57:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
- 614 .loc 1 57 3 is_stmt 1 view .LVU110
- 57:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
- 615 .loc 1 57 14 is_stmt 0 view .LVU111
- 616 0012 0748 ldr r0, .L58
- 617 0014 FFF7FEFF bl HAL_SD_Init
- 618 .LVL51:
- 59:Src/bsp_driver_sd.c **** {
- 619 .loc 1 59 3 is_stmt 1 view .LVU112
- 59:Src/bsp_driver_sd.c **** {
- 620 .loc 1 59 6 is_stmt 0 view .LVU113
- 621 0018 0546 mov r5, r0
- 622 001a 0028 cmp r0, #0
- 623 001c F6D1 bne .L53
- 62:Src/bsp_driver_sd.c **** {
- 624 .loc 1 62 5 is_stmt 1 view .LVU114
- 62:Src/bsp_driver_sd.c **** {
- 625 .loc 1 62 9 is_stmt 0 view .LVU115
- 626 001e 4FF40061 mov r1, #2048
- 627 0022 0348 ldr r0, .L58
- 628 .LVL52:
- 62:Src/bsp_driver_sd.c **** {
- 629 .loc 1 62 9 view .LVU116
- 630 0024 FFF7FEFF bl HAL_SD_ConfigWideBusOperation
- 631 .LVL53:
- 62:Src/bsp_driver_sd.c **** {
- 632 .loc 1 62 8 discriminator 1 view .LVU117
- 633 0028 0028 cmp r0, #0
- 634 002a EFD0 beq .L53
- 64:Src/bsp_driver_sd.c **** }
- 635 .loc 1 64 16 view .LVU118
- 636 002c 2546 mov r5, r4
- 637 .LVL54:
- 64:Src/bsp_driver_sd.c **** }
- 638 .loc 1 64 16 view .LVU119
- 639 002e EDE7 b .L53
- 640 .L59:
- 641 .align 2
- 642 .L58:
- 643 0030 00000000 .word hsd1
- 644 .cfi_endproc
- 645 .LFE141:
- 647 .text
- 648 .Letext0:
- 649 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 650 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- 651 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 652 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 653 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
- 654 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
- 655 .file 8 "Inc/fatfs_platform.h"
- ARM GAS /tmp/ccmWzdNV.s page 18
+ 60:Src/bsp_driver_sd.c **** out_info->last_hal_error = g_last_bsp_sd_hal_error;
+ 57 .loc 1 60 3 is_stmt 1 view .LVU11
+ 58 .loc 1 60 28 is_stmt 0 view .LVU12
+ 59 001a 064A ldr r2, .L3+16
+ 60 001c 1268 ldr r2, [r2]
+ 61 001e 4260 str r2, [r0, #4]
+ 62 .L1:
+ 61:Src/bsp_driver_sd.c **** }
+ 63 .loc 1 61 1 view .LVU13
+ 64 0020 7047 bx lr
+ 65 .L4:
+ 66 0022 00BF .align 2
+ 67 .L3:
+ 68 0024 00000000 .word g_last_bsp_sd_init_status
+ 69 0028 00000000 .word g_last_bsp_sd_detect_status
+ 70 002c 00000000 .word g_last_bsp_sd_hal_init_status
+ 71 0030 00000000 .word g_last_bsp_sd_wide_bus_status
+ 72 0034 00000000 .word g_last_bsp_sd_hal_error
+ 73 .cfi_endproc
+ 74 .LFE141:
+ 76 .section .text.BSP_SD_ITConfig,"ax",%progbits
+ 77 .align 1
+ 78 .weak BSP_SD_ITConfig
+ 79 .syntax unified
+ 80 .thumb
+ 81 .thumb_func
+ 83 BSP_SD_ITConfig:
+ 84 .LFB143:
+ 62:Src/bsp_driver_sd.c **** /* USER CODE END BeforeInitSection */
+ 63:Src/bsp_driver_sd.c **** /**
+ 64:Src/bsp_driver_sd.c **** * @brief Initializes the SD card device.
+ 65:Src/bsp_driver_sd.c **** * @retval SD status
+ 66:Src/bsp_driver_sd.c **** */
+ 67:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_Init(void)
+ 68:Src/bsp_driver_sd.c **** {
+ 69:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 70:Src/bsp_driver_sd.c **** g_last_bsp_sd_detect_status = BSP_SD_IsDetected();
+ 71:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ 72:Src/bsp_driver_sd.c **** g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+ 73:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = 0u;
+ 74:Src/bsp_driver_sd.c **** /* Check if the SD card is plugged in the slot */
+ 75:Src/bsp_driver_sd.c **** if (g_last_bsp_sd_detect_status != SD_PRESENT)
+ 76:Src/bsp_driver_sd.c **** {
+ 77:Src/bsp_driver_sd.c **** g_last_bsp_sd_init_status = MSD_ERROR_SD_NOT_PRESENT;
+ 78:Src/bsp_driver_sd.c **** return MSD_ERROR_SD_NOT_PRESENT;
+ 79:Src/bsp_driver_sd.c **** }
+ 80:Src/bsp_driver_sd.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_1B;
+ 81:Src/bsp_driver_sd.c **** hsd1.Init.ClockDiv = 118u;
+ 82:Src/bsp_driver_sd.c **** /* HAL SD initialization */
+ 83:Src/bsp_driver_sd.c **** sd_state = HAL_SD_Init(&hsd1);
+ 84:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = sd_state;
+ 85:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = hsd1.ErrorCode;
+ 86:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
+ 87:Src/bsp_driver_sd.c **** if (sd_state == MSD_OK)
+ 88:Src/bsp_driver_sd.c **** {
+ 89:Src/bsp_driver_sd.c **** g_last_bsp_sd_wide_bus_status = HAL_OK;
+ 90:Src/bsp_driver_sd.c **** }
+ ARM GAS /tmp/ccVIJNmt.s page 4
+
+
+ 91:Src/bsp_driver_sd.c ****
+ 92:Src/bsp_driver_sd.c **** g_last_bsp_sd_init_status = sd_state;
+ 93:Src/bsp_driver_sd.c **** return sd_state;
+ 94:Src/bsp_driver_sd.c **** }
+ 95:Src/bsp_driver_sd.c **** /* USER CODE BEGIN AfterInitSection */
+ 96:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 97:Src/bsp_driver_sd.c **** /* USER CODE END AfterInitSection */
+ 98:Src/bsp_driver_sd.c ****
+ 99:Src/bsp_driver_sd.c **** /* USER CODE BEGIN InterruptMode */
+ 100:Src/bsp_driver_sd.c **** /**
+ 101:Src/bsp_driver_sd.c **** * @brief Configures Interrupt mode for SD detection pin.
+ 102:Src/bsp_driver_sd.c **** * @retval Returns 0
+ 103:Src/bsp_driver_sd.c **** */
+ 104:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ITConfig(void)
+ 105:Src/bsp_driver_sd.c **** {
+ 85 .loc 1 105 1 is_stmt 1 view -0
+ 86 .cfi_startproc
+ 87 @ args = 0, pretend = 0, frame = 0
+ 88 @ frame_needed = 0, uses_anonymous_args = 0
+ 89 @ link register save eliminated.
+ 106:Src/bsp_driver_sd.c **** /* Code to be updated by the user or replaced by one from the FW pack (in a stmxxxx_sd.c file) */
+ 107:Src/bsp_driver_sd.c ****
+ 108:Src/bsp_driver_sd.c **** return (uint8_t)0;
+ 90 .loc 1 108 3 view .LVU15
+ 109:Src/bsp_driver_sd.c **** }
+ 91 .loc 1 109 1 is_stmt 0 view .LVU16
+ 92 0000 0020 movs r0, #0
+ 93 0002 7047 bx lr
+ 94 .cfi_endproc
+ 95 .LFE143:
+ 97 .section .text.BSP_SD_ReadBlocks,"ax",%progbits
+ 98 .align 1
+ 99 .weak BSP_SD_ReadBlocks
+ 100 .syntax unified
+ 101 .thumb
+ 102 .thumb_func
+ 104 BSP_SD_ReadBlocks:
+ 105 .LVL1:
+ 106 .LFB144:
+ 110:Src/bsp_driver_sd.c ****
+ 111:Src/bsp_driver_sd.c **** /* USER CODE END InterruptMode */
+ 112:Src/bsp_driver_sd.c ****
+ 113:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeReadBlocksSection */
+ 114:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 115:Src/bsp_driver_sd.c **** /* USER CODE END BeforeReadBlocksSection */
+ 116:Src/bsp_driver_sd.c **** /**
+ 117:Src/bsp_driver_sd.c **** * @brief Reads block(s) from a specified address in an SD card, in polling mode.
+ 118:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
+ 119:Src/bsp_driver_sd.c **** * @param ReadAddr: Address from where data is to be read
+ 120:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to read
+ 121:Src/bsp_driver_sd.c **** * @param Timeout: Timeout for read operation
+ 122:Src/bsp_driver_sd.c **** * @retval SD status
+ 123:Src/bsp_driver_sd.c **** */
+ 124:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ReadBlocks(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks, uint32_t
+ 125:Src/bsp_driver_sd.c **** {
+ 107 .loc 1 125 1 is_stmt 1 view -0
+ 108 .cfi_startproc
+ ARM GAS /tmp/ccVIJNmt.s page 5
+
+
+ 109 @ args = 0, pretend = 0, frame = 0
+ 110 @ frame_needed = 0, uses_anonymous_args = 0
+ 111 .loc 1 125 1 is_stmt 0 view .LVU18
+ 112 0000 00B5 push {lr}
+ 113 .LCFI0:
+ 114 .cfi_def_cfa_offset 4
+ 115 .cfi_offset 14, -4
+ 116 0002 83B0 sub sp, sp, #12
+ 117 .LCFI1:
+ 118 .cfi_def_cfa_offset 16
+ 126:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 119 .loc 1 126 3 is_stmt 1 view .LVU19
+ 120 .LVL2:
+ 127:Src/bsp_driver_sd.c ****
+ 128:Src/bsp_driver_sd.c **** if (HAL_SD_ReadBlocks(&hsd1, (uint8_t *)pData, ReadAddr, NumOfBlocks, Timeout) != HAL_OK)
+ 121 .loc 1 128 3 view .LVU20
+ 122 .loc 1 128 7 is_stmt 0 view .LVU21
+ 123 0004 0093 str r3, [sp]
+ 124 0006 1346 mov r3, r2
+ 125 .LVL3:
+ 126 .loc 1 128 7 view .LVU22
+ 127 0008 0A46 mov r2, r1
+ 128 .LVL4:
+ 129 .loc 1 128 7 view .LVU23
+ 130 000a 0146 mov r1, r0
+ 131 .LVL5:
+ 132 .loc 1 128 7 view .LVU24
+ 133 000c 0348 ldr r0, .L10
+ 134 .LVL6:
+ 135 .loc 1 128 7 view .LVU25
+ 136 000e FFF7FEFF bl HAL_SD_ReadBlocks
+ 137 .LVL7:
+ 138 .loc 1 128 6 discriminator 1 view .LVU26
+ 139 0012 00B1 cbz r0, .L7
+ 129:Src/bsp_driver_sd.c **** {
+ 130:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
+ 140 .loc 1 130 14 view .LVU27
+ 141 0014 0120 movs r0, #1
+ 142 .L7:
+ 143 .LVL8:
+ 131:Src/bsp_driver_sd.c **** }
+ 132:Src/bsp_driver_sd.c ****
+ 133:Src/bsp_driver_sd.c **** return sd_state;
+ 144 .loc 1 133 3 is_stmt 1 view .LVU28
+ 134:Src/bsp_driver_sd.c **** }
+ 145 .loc 1 134 1 is_stmt 0 view .LVU29
+ 146 0016 03B0 add sp, sp, #12
+ 147 .LCFI2:
+ 148 .cfi_def_cfa_offset 4
+ 149 @ sp needed
+ 150 0018 5DF804FB ldr pc, [sp], #4
+ 151 .L11:
+ 152 .align 2
+ 153 .L10:
+ 154 001c 00000000 .word hsd1
+ 155 .cfi_endproc
+ 156 .LFE144:
+ ARM GAS /tmp/ccVIJNmt.s page 6
+
+
+ 158 .section .text.BSP_SD_WriteBlocks,"ax",%progbits
+ 159 .align 1
+ 160 .weak BSP_SD_WriteBlocks
+ 161 .syntax unified
+ 162 .thumb
+ 163 .thumb_func
+ 165 BSP_SD_WriteBlocks:
+ 166 .LVL9:
+ 167 .LFB145:
+ 135:Src/bsp_driver_sd.c ****
+ 136:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeWriteBlocksSection */
+ 137:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 138:Src/bsp_driver_sd.c **** /* USER CODE END BeforeWriteBlocksSection */
+ 139:Src/bsp_driver_sd.c **** /**
+ 140:Src/bsp_driver_sd.c **** * @brief Writes block(s) to a specified address in an SD card, in polling mode.
+ 141:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
+ 142:Src/bsp_driver_sd.c **** * @param WriteAddr: Address from where data is to be written
+ 143:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to write
+ 144:Src/bsp_driver_sd.c **** * @param Timeout: Timeout for write operation
+ 145:Src/bsp_driver_sd.c **** * @retval SD status
+ 146:Src/bsp_driver_sd.c **** */
+ 147:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_WriteBlocks(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks, uint32
+ 148:Src/bsp_driver_sd.c **** {
+ 168 .loc 1 148 1 is_stmt 1 view -0
+ 169 .cfi_startproc
+ 170 @ args = 0, pretend = 0, frame = 0
+ 171 @ frame_needed = 0, uses_anonymous_args = 0
+ 172 .loc 1 148 1 is_stmt 0 view .LVU31
+ 173 0000 00B5 push {lr}
+ 174 .LCFI3:
+ 175 .cfi_def_cfa_offset 4
+ 176 .cfi_offset 14, -4
+ 177 0002 83B0 sub sp, sp, #12
+ 178 .LCFI4:
+ 179 .cfi_def_cfa_offset 16
+ 149:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 180 .loc 1 149 3 is_stmt 1 view .LVU32
+ 181 .LVL10:
+ 150:Src/bsp_driver_sd.c ****
+ 151:Src/bsp_driver_sd.c **** if (HAL_SD_WriteBlocks(&hsd1, (uint8_t *)pData, WriteAddr, NumOfBlocks, Timeout) != HAL_OK)
+ 182 .loc 1 151 3 view .LVU33
+ 183 .loc 1 151 7 is_stmt 0 view .LVU34
+ 184 0004 0093 str r3, [sp]
+ 185 0006 1346 mov r3, r2
+ 186 .LVL11:
+ 187 .loc 1 151 7 view .LVU35
+ 188 0008 0A46 mov r2, r1
+ 189 .LVL12:
+ 190 .loc 1 151 7 view .LVU36
+ 191 000a 0146 mov r1, r0
+ 192 .LVL13:
+ 193 .loc 1 151 7 view .LVU37
+ 194 000c 0348 ldr r0, .L16
+ 195 .LVL14:
+ 196 .loc 1 151 7 view .LVU38
+ 197 000e FFF7FEFF bl HAL_SD_WriteBlocks
+ 198 .LVL15:
+ ARM GAS /tmp/ccVIJNmt.s page 7
+
+
+ 199 .loc 1 151 6 discriminator 1 view .LVU39
+ 200 0012 00B1 cbz r0, .L13
+ 152:Src/bsp_driver_sd.c **** {
+ 153:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
+ 201 .loc 1 153 14 view .LVU40
+ 202 0014 0120 movs r0, #1
+ 203 .L13:
+ 204 .LVL16:
+ 154:Src/bsp_driver_sd.c **** }
+ 155:Src/bsp_driver_sd.c ****
+ 156:Src/bsp_driver_sd.c **** return sd_state;
+ 205 .loc 1 156 3 is_stmt 1 view .LVU41
+ 157:Src/bsp_driver_sd.c **** }
+ 206 .loc 1 157 1 is_stmt 0 view .LVU42
+ 207 0016 03B0 add sp, sp, #12
+ 208 .LCFI5:
+ 209 .cfi_def_cfa_offset 4
+ 210 @ sp needed
+ 211 0018 5DF804FB ldr pc, [sp], #4
+ 212 .L17:
+ 213 .align 2
+ 214 .L16:
+ 215 001c 00000000 .word hsd1
+ 216 .cfi_endproc
+ 217 .LFE145:
+ 219 .section .text.BSP_SD_ReadBlocks_DMA,"ax",%progbits
+ 220 .align 1
+ 221 .weak BSP_SD_ReadBlocks_DMA
+ 222 .syntax unified
+ 223 .thumb
+ 224 .thumb_func
+ 226 BSP_SD_ReadBlocks_DMA:
+ 227 .LVL17:
+ 228 .LFB146:
+ 158:Src/bsp_driver_sd.c ****
+ 159:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeReadDMABlocksSection */
+ 160:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 161:Src/bsp_driver_sd.c **** /* USER CODE END BeforeReadDMABlocksSection */
+ 162:Src/bsp_driver_sd.c **** /**
+ 163:Src/bsp_driver_sd.c **** * @brief Reads block(s) from a specified address in an SD card, in DMA mode.
+ 164:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
+ 165:Src/bsp_driver_sd.c **** * @param ReadAddr: Address from where data is to be read
+ 166:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to read
+ 167:Src/bsp_driver_sd.c **** * @retval SD status
+ 168:Src/bsp_driver_sd.c **** */
+ 169:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_ReadBlocks_DMA(uint32_t *pData, uint32_t ReadAddr, uint32_t NumOfBlocks)
+ 170:Src/bsp_driver_sd.c **** {
+ 229 .loc 1 170 1 is_stmt 1 view -0
+ 230 .cfi_startproc
+ 231 @ args = 0, pretend = 0, frame = 0
+ 232 @ frame_needed = 0, uses_anonymous_args = 0
+ 233 .loc 1 170 1 is_stmt 0 view .LVU44
+ 234 0000 08B5 push {r3, lr}
+ 235 .LCFI6:
+ 236 .cfi_def_cfa_offset 8
+ 237 .cfi_offset 3, -8
+ 238 .cfi_offset 14, -4
+ ARM GAS /tmp/ccVIJNmt.s page 8
+
+
+ 239 0002 1346 mov r3, r2
+ 171:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 240 .loc 1 171 3 is_stmt 1 view .LVU45
+ 241 .LVL18:
+ 172:Src/bsp_driver_sd.c ****
+ 173:Src/bsp_driver_sd.c **** /* Read block(s) in DMA transfer mode */
+ 174:Src/bsp_driver_sd.c **** if (HAL_SD_ReadBlocks_DMA(&hsd1, (uint8_t *)pData, ReadAddr, NumOfBlocks) != HAL_OK)
+ 242 .loc 1 174 3 view .LVU46
+ 243 .loc 1 174 7 is_stmt 0 view .LVU47
+ 244 0004 0A46 mov r2, r1
+ 245 .LVL19:
+ 246 .loc 1 174 7 view .LVU48
+ 247 0006 0146 mov r1, r0
+ 248 .LVL20:
+ 249 .loc 1 174 7 view .LVU49
+ 250 0008 0248 ldr r0, .L22
+ 251 .LVL21:
+ 252 .loc 1 174 7 view .LVU50
+ 253 000a FFF7FEFF bl HAL_SD_ReadBlocks_DMA
+ 254 .LVL22:
+ 255 .loc 1 174 6 discriminator 1 view .LVU51
+ 256 000e 00B1 cbz r0, .L19
+ 175:Src/bsp_driver_sd.c **** {
+ 176:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
+ 257 .loc 1 176 14 view .LVU52
+ 258 0010 0120 movs r0, #1
+ 259 .L19:
+ 260 .LVL23:
+ 177:Src/bsp_driver_sd.c **** }
+ 178:Src/bsp_driver_sd.c ****
+ 179:Src/bsp_driver_sd.c **** return sd_state;
+ 261 .loc 1 179 3 is_stmt 1 view .LVU53
+ 180:Src/bsp_driver_sd.c **** }
+ 262 .loc 1 180 1 is_stmt 0 view .LVU54
+ 263 0012 08BD pop {r3, pc}
+ 264 .L23:
+ 265 .align 2
+ 266 .L22:
+ 267 0014 00000000 .word hsd1
+ 268 .cfi_endproc
+ 269 .LFE146:
+ 271 .section .text.BSP_SD_WriteBlocks_DMA,"ax",%progbits
+ 272 .align 1
+ 273 .weak BSP_SD_WriteBlocks_DMA
+ 274 .syntax unified
+ 275 .thumb
+ 276 .thumb_func
+ 278 BSP_SD_WriteBlocks_DMA:
+ 279 .LVL24:
+ 280 .LFB147:
+ 181:Src/bsp_driver_sd.c ****
+ 182:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeWriteDMABlocksSection */
+ 183:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 184:Src/bsp_driver_sd.c **** /* USER CODE END BeforeWriteDMABlocksSection */
+ 185:Src/bsp_driver_sd.c **** /**
+ 186:Src/bsp_driver_sd.c **** * @brief Writes block(s) to a specified address in an SD card, in DMA mode.
+ 187:Src/bsp_driver_sd.c **** * @param pData: Pointer to the buffer that will contain the data to transmit
+ ARM GAS /tmp/ccVIJNmt.s page 9
+
+
+ 188:Src/bsp_driver_sd.c **** * @param WriteAddr: Address from where data is to be written
+ 189:Src/bsp_driver_sd.c **** * @param NumOfBlocks: Number of SD blocks to write
+ 190:Src/bsp_driver_sd.c **** * @retval SD status
+ 191:Src/bsp_driver_sd.c **** */
+ 192:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_WriteBlocks_DMA(uint32_t *pData, uint32_t WriteAddr, uint32_t NumOfBlocks)
+ 193:Src/bsp_driver_sd.c **** {
+ 281 .loc 1 193 1 is_stmt 1 view -0
+ 282 .cfi_startproc
+ 283 @ args = 0, pretend = 0, frame = 0
+ 284 @ frame_needed = 0, uses_anonymous_args = 0
+ 285 .loc 1 193 1 is_stmt 0 view .LVU56
+ 286 0000 08B5 push {r3, lr}
+ 287 .LCFI7:
+ 288 .cfi_def_cfa_offset 8
+ 289 .cfi_offset 3, -8
+ 290 .cfi_offset 14, -4
+ 291 0002 1346 mov r3, r2
+ 194:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 292 .loc 1 194 3 is_stmt 1 view .LVU57
+ 293 .LVL25:
+ 195:Src/bsp_driver_sd.c ****
+ 196:Src/bsp_driver_sd.c **** /* Write block(s) in DMA transfer mode */
+ 197:Src/bsp_driver_sd.c **** if (HAL_SD_WriteBlocks_DMA(&hsd1, (uint8_t *)pData, WriteAddr, NumOfBlocks) != HAL_OK)
+ 294 .loc 1 197 3 view .LVU58
+ 295 .loc 1 197 7 is_stmt 0 view .LVU59
+ 296 0004 0A46 mov r2, r1
+ 297 .LVL26:
+ 298 .loc 1 197 7 view .LVU60
+ 299 0006 0146 mov r1, r0
+ 300 .LVL27:
+ 301 .loc 1 197 7 view .LVU61
+ 302 0008 0248 ldr r0, .L28
+ 303 .LVL28:
+ 304 .loc 1 197 7 view .LVU62
+ 305 000a FFF7FEFF bl HAL_SD_WriteBlocks_DMA
+ 306 .LVL29:
+ 307 .loc 1 197 6 discriminator 1 view .LVU63
+ 308 000e 00B1 cbz r0, .L25
+ 198:Src/bsp_driver_sd.c **** {
+ 199:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
+ 309 .loc 1 199 14 view .LVU64
+ 310 0010 0120 movs r0, #1
+ 311 .L25:
+ 312 .LVL30:
+ 200:Src/bsp_driver_sd.c **** }
+ 201:Src/bsp_driver_sd.c ****
+ 202:Src/bsp_driver_sd.c **** return sd_state;
+ 313 .loc 1 202 3 is_stmt 1 view .LVU65
+ 203:Src/bsp_driver_sd.c **** }
+ 314 .loc 1 203 1 is_stmt 0 view .LVU66
+ 315 0012 08BD pop {r3, pc}
+ 316 .L29:
+ 317 .align 2
+ 318 .L28:
+ 319 0014 00000000 .word hsd1
+ 320 .cfi_endproc
+ 321 .LFE147:
+ ARM GAS /tmp/ccVIJNmt.s page 10
+
+
+ 323 .section .text.BSP_SD_Erase,"ax",%progbits
+ 324 .align 1
+ 325 .weak BSP_SD_Erase
+ 326 .syntax unified
+ 327 .thumb
+ 328 .thumb_func
+ 330 BSP_SD_Erase:
+ 331 .LVL31:
+ 332 .LFB148:
+ 204:Src/bsp_driver_sd.c ****
+ 205:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeEraseSection */
+ 206:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 207:Src/bsp_driver_sd.c **** /* USER CODE END BeforeEraseSection */
+ 208:Src/bsp_driver_sd.c **** /**
+ 209:Src/bsp_driver_sd.c **** * @brief Erases the specified memory area of the given SD card.
+ 210:Src/bsp_driver_sd.c **** * @param StartAddr: Start byte address
+ 211:Src/bsp_driver_sd.c **** * @param EndAddr: End byte address
+ 212:Src/bsp_driver_sd.c **** * @retval SD status
+ 213:Src/bsp_driver_sd.c **** */
+ 214:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_Erase(uint32_t StartAddr, uint32_t EndAddr)
+ 215:Src/bsp_driver_sd.c **** {
+ 333 .loc 1 215 1 is_stmt 1 view -0
+ 334 .cfi_startproc
+ 335 @ args = 0, pretend = 0, frame = 0
+ 336 @ frame_needed = 0, uses_anonymous_args = 0
+ 337 .loc 1 215 1 is_stmt 0 view .LVU68
+ 338 0000 08B5 push {r3, lr}
+ 339 .LCFI8:
+ 340 .cfi_def_cfa_offset 8
+ 341 .cfi_offset 3, -8
+ 342 .cfi_offset 14, -4
+ 343 0002 0A46 mov r2, r1
+ 216:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 344 .loc 1 216 3 is_stmt 1 view .LVU69
+ 345 .LVL32:
+ 217:Src/bsp_driver_sd.c ****
+ 218:Src/bsp_driver_sd.c **** if (HAL_SD_Erase(&hsd1, StartAddr, EndAddr) != HAL_OK)
+ 346 .loc 1 218 3 view .LVU70
+ 347 .loc 1 218 7 is_stmt 0 view .LVU71
+ 348 0004 0146 mov r1, r0
+ 349 .LVL33:
+ 350 .loc 1 218 7 view .LVU72
+ 351 0006 0348 ldr r0, .L34
+ 352 .LVL34:
+ 353 .loc 1 218 7 view .LVU73
+ 354 0008 FFF7FEFF bl HAL_SD_Erase
+ 355 .LVL35:
+ 356 .loc 1 218 6 discriminator 1 view .LVU74
+ 357 000c 00B1 cbz r0, .L31
+ 219:Src/bsp_driver_sd.c **** {
+ 220:Src/bsp_driver_sd.c **** sd_state = MSD_ERROR;
+ 358 .loc 1 220 14 view .LVU75
+ 359 000e 0120 movs r0, #1
+ 360 .L31:
+ 361 .LVL36:
+ 221:Src/bsp_driver_sd.c **** }
+ 222:Src/bsp_driver_sd.c ****
+ ARM GAS /tmp/ccVIJNmt.s page 11
+
+
+ 223:Src/bsp_driver_sd.c **** return sd_state;
+ 362 .loc 1 223 3 is_stmt 1 view .LVU76
+ 224:Src/bsp_driver_sd.c **** }
+ 363 .loc 1 224 1 is_stmt 0 view .LVU77
+ 364 0010 08BD pop {r3, pc}
+ 365 .L35:
+ 366 0012 00BF .align 2
+ 367 .L34:
+ 368 0014 00000000 .word hsd1
+ 369 .cfi_endproc
+ 370 .LFE148:
+ 372 .section .text.BSP_SD_GetCardState,"ax",%progbits
+ 373 .align 1
+ 374 .weak BSP_SD_GetCardState
+ 375 .syntax unified
+ 376 .thumb
+ 377 .thumb_func
+ 379 BSP_SD_GetCardState:
+ 380 .LFB149:
+ 225:Src/bsp_driver_sd.c ****
+ 226:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeGetCardStateSection */
+ 227:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 228:Src/bsp_driver_sd.c **** /* USER CODE END BeforeGetCardStateSection */
+ 229:Src/bsp_driver_sd.c ****
+ 230:Src/bsp_driver_sd.c **** /**
+ 231:Src/bsp_driver_sd.c **** * @brief Gets the current SD card data status.
+ 232:Src/bsp_driver_sd.c **** * @param None
+ 233:Src/bsp_driver_sd.c **** * @retval Data transfer state.
+ 234:Src/bsp_driver_sd.c **** * This value can be one of the following values:
+ 235:Src/bsp_driver_sd.c **** * @arg SD_TRANSFER_OK: No data transfer is acting
+ 236:Src/bsp_driver_sd.c **** * @arg SD_TRANSFER_BUSY: Data transfer is acting
+ 237:Src/bsp_driver_sd.c **** */
+ 238:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_GetCardState(void)
+ 239:Src/bsp_driver_sd.c **** {
+ 381 .loc 1 239 1 is_stmt 1 view -0
+ 382 .cfi_startproc
+ 383 @ args = 0, pretend = 0, frame = 0
+ 384 @ frame_needed = 0, uses_anonymous_args = 0
+ 385 0000 08B5 push {r3, lr}
+ 386 .LCFI9:
+ 387 .cfi_def_cfa_offset 8
+ 388 .cfi_offset 3, -8
+ 389 .cfi_offset 14, -4
+ 240:Src/bsp_driver_sd.c **** return ((HAL_SD_GetCardState(&hsd1) == HAL_SD_CARD_TRANSFER ) ? SD_TRANSFER_OK : SD_TRANSFER_BUSY
+ 390 .loc 1 240 3 view .LVU79
+ 391 .loc 1 240 12 is_stmt 0 view .LVU80
+ 392 0002 0348 ldr r0, .L38
+ 393 0004 FFF7FEFF bl HAL_SD_GetCardState
+ 394 .LVL37:
+ 241:Src/bsp_driver_sd.c **** }
+ 395 .loc 1 241 1 view .LVU81
+ 396 0008 0438 subs r0, r0, #4
+ 397 000a 18BF it ne
+ 398 000c 0120 movne r0, #1
+ 399 000e 08BD pop {r3, pc}
+ 400 .L39:
+ 401 .align 2
+ ARM GAS /tmp/ccVIJNmt.s page 12
+
+
+ 402 .L38:
+ 403 0010 00000000 .word hsd1
+ 404 .cfi_endproc
+ 405 .LFE149:
+ 407 .section .text.BSP_SD_GetCardInfo,"ax",%progbits
+ 408 .align 1
+ 409 .weak BSP_SD_GetCardInfo
+ 410 .syntax unified
+ 411 .thumb
+ 412 .thumb_func
+ 414 BSP_SD_GetCardInfo:
+ 415 .LVL38:
+ 416 .LFB150:
+ 242:Src/bsp_driver_sd.c ****
+ 243:Src/bsp_driver_sd.c **** /**
+ 244:Src/bsp_driver_sd.c **** * @brief Get SD information about specific SD card.
+ 245:Src/bsp_driver_sd.c **** * @param CardInfo: Pointer to HAL_SD_CardInfoTypedef structure
+ 246:Src/bsp_driver_sd.c **** * @retval None
+ 247:Src/bsp_driver_sd.c **** */
+ 248:Src/bsp_driver_sd.c **** __weak void BSP_SD_GetCardInfo(HAL_SD_CardInfoTypeDef *CardInfo)
+ 249:Src/bsp_driver_sd.c **** {
+ 417 .loc 1 249 1 is_stmt 1 view -0
+ 418 .cfi_startproc
+ 419 @ args = 0, pretend = 0, frame = 0
+ 420 @ frame_needed = 0, uses_anonymous_args = 0
+ 421 .loc 1 249 1 is_stmt 0 view .LVU83
+ 422 0000 08B5 push {r3, lr}
+ 423 .LCFI10:
+ 424 .cfi_def_cfa_offset 8
+ 425 .cfi_offset 3, -8
+ 426 .cfi_offset 14, -4
+ 427 0002 0146 mov r1, r0
+ 250:Src/bsp_driver_sd.c **** /* Get SD card Information */
+ 251:Src/bsp_driver_sd.c **** HAL_SD_GetCardInfo(&hsd1, CardInfo);
+ 428 .loc 1 251 3 is_stmt 1 view .LVU84
+ 429 0004 0148 ldr r0, .L42
+ 430 .LVL39:
+ 431 .loc 1 251 3 is_stmt 0 view .LVU85
+ 432 0006 FFF7FEFF bl HAL_SD_GetCardInfo
+ 433 .LVL40:
+ 252:Src/bsp_driver_sd.c **** }
+ 434 .loc 1 252 1 view .LVU86
+ 435 000a 08BD pop {r3, pc}
+ 436 .L43:
+ 437 .align 2
+ 438 .L42:
+ 439 000c 00000000 .word hsd1
+ 440 .cfi_endproc
+ 441 .LFE150:
+ 443 .section .text.BSP_SD_AbortCallback,"ax",%progbits
+ 444 .align 1
+ 445 .weak BSP_SD_AbortCallback
+ 446 .syntax unified
+ 447 .thumb
+ 448 .thumb_func
+ 450 BSP_SD_AbortCallback:
+ 451 .LFB154:
+ ARM GAS /tmp/ccVIJNmt.s page 13
+
+
+ 253:Src/bsp_driver_sd.c ****
+ 254:Src/bsp_driver_sd.c **** /* USER CODE BEGIN BeforeCallBacksSection */
+ 255:Src/bsp_driver_sd.c **** /* can be used to modify previous code / undefine following code / add code */
+ 256:Src/bsp_driver_sd.c **** /* USER CODE END BeforeCallBacksSection */
+ 257:Src/bsp_driver_sd.c **** /**
+ 258:Src/bsp_driver_sd.c **** * @brief SD Abort callbacks
+ 259:Src/bsp_driver_sd.c **** * @param hsd: SD handle
+ 260:Src/bsp_driver_sd.c **** * @retval None
+ 261:Src/bsp_driver_sd.c **** */
+ 262:Src/bsp_driver_sd.c **** void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd)
+ 263:Src/bsp_driver_sd.c **** {
+ 264:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
+ 265:Src/bsp_driver_sd.c **** }
+ 266:Src/bsp_driver_sd.c ****
+ 267:Src/bsp_driver_sd.c **** /**
+ 268:Src/bsp_driver_sd.c **** * @brief Tx Transfer completed callback
+ 269:Src/bsp_driver_sd.c **** * @param hsd: SD handle
+ 270:Src/bsp_driver_sd.c **** * @retval None
+ 271:Src/bsp_driver_sd.c **** */
+ 272:Src/bsp_driver_sd.c **** void HAL_SD_TxCpltCallback(SD_HandleTypeDef *hsd)
+ 273:Src/bsp_driver_sd.c **** {
+ 274:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
+ 275:Src/bsp_driver_sd.c **** }
+ 276:Src/bsp_driver_sd.c ****
+ 277:Src/bsp_driver_sd.c **** /**
+ 278:Src/bsp_driver_sd.c **** * @brief Rx Transfer completed callback
+ 279:Src/bsp_driver_sd.c **** * @param hsd: SD handle
+ 280:Src/bsp_driver_sd.c **** * @retval None
+ 281:Src/bsp_driver_sd.c **** */
+ 282:Src/bsp_driver_sd.c **** void HAL_SD_RxCpltCallback(SD_HandleTypeDef *hsd)
+ 283:Src/bsp_driver_sd.c **** {
+ 284:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
+ 285:Src/bsp_driver_sd.c **** }
+ 286:Src/bsp_driver_sd.c ****
+ 287:Src/bsp_driver_sd.c **** /* USER CODE BEGIN CallBacksSection_C */
+ 288:Src/bsp_driver_sd.c **** /**
+ 289:Src/bsp_driver_sd.c **** * @brief BSP SD Abort callback
+ 290:Src/bsp_driver_sd.c **** * @retval None
+ 291:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
+ 292:Src/bsp_driver_sd.c **** */
+ 293:Src/bsp_driver_sd.c **** __weak void BSP_SD_AbortCallback(void)
+ 294:Src/bsp_driver_sd.c **** {
+ 452 .loc 1 294 1 is_stmt 1 view -0
+ 453 .cfi_startproc
+ 454 @ args = 0, pretend = 0, frame = 0
+ 455 @ frame_needed = 0, uses_anonymous_args = 0
+ 456 @ link register save eliminated.
+ 295:Src/bsp_driver_sd.c ****
+ 296:Src/bsp_driver_sd.c **** }
+ 457 .loc 1 296 1 view .LVU88
+ 458 0000 7047 bx lr
+ 459 .cfi_endproc
+ 460 .LFE154:
+ 462 .section .text.HAL_SD_AbortCallback,"ax",%progbits
+ 463 .align 1
+ 464 .global HAL_SD_AbortCallback
+ 465 .syntax unified
+ ARM GAS /tmp/ccVIJNmt.s page 14
+
+
+ 466 .thumb
+ 467 .thumb_func
+ 469 HAL_SD_AbortCallback:
+ 470 .LVL41:
+ 471 .LFB151:
+ 263:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
+ 472 .loc 1 263 1 view -0
+ 473 .cfi_startproc
+ 474 @ args = 0, pretend = 0, frame = 0
+ 475 @ frame_needed = 0, uses_anonymous_args = 0
+ 263:Src/bsp_driver_sd.c **** BSP_SD_AbortCallback();
+ 476 .loc 1 263 1 is_stmt 0 view .LVU90
+ 477 0000 08B5 push {r3, lr}
+ 478 .LCFI11:
+ 479 .cfi_def_cfa_offset 8
+ 480 .cfi_offset 3, -8
+ 481 .cfi_offset 14, -4
+ 264:Src/bsp_driver_sd.c **** }
+ 482 .loc 1 264 3 is_stmt 1 view .LVU91
+ 483 0002 FFF7FEFF bl BSP_SD_AbortCallback
+ 484 .LVL42:
+ 265:Src/bsp_driver_sd.c ****
+ 485 .loc 1 265 1 is_stmt 0 view .LVU92
+ 486 0006 08BD pop {r3, pc}
+ 487 .cfi_endproc
+ 488 .LFE151:
+ 490 .section .text.BSP_SD_WriteCpltCallback,"ax",%progbits
+ 491 .align 1
+ 492 .weak BSP_SD_WriteCpltCallback
+ 493 .syntax unified
+ 494 .thumb
+ 495 .thumb_func
+ 497 BSP_SD_WriteCpltCallback:
+ 498 .LFB155:
+ 297:Src/bsp_driver_sd.c ****
+ 298:Src/bsp_driver_sd.c **** /**
+ 299:Src/bsp_driver_sd.c **** * @brief BSP Tx Transfer completed callback
+ 300:Src/bsp_driver_sd.c **** * @retval None
+ 301:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
+ 302:Src/bsp_driver_sd.c **** */
+ 303:Src/bsp_driver_sd.c **** __weak void BSP_SD_WriteCpltCallback(void)
+ 304:Src/bsp_driver_sd.c **** {
+ 499 .loc 1 304 1 is_stmt 1 view -0
+ 500 .cfi_startproc
+ 501 @ args = 0, pretend = 0, frame = 0
+ 502 @ frame_needed = 0, uses_anonymous_args = 0
+ 503 @ link register save eliminated.
+ 305:Src/bsp_driver_sd.c ****
+ 306:Src/bsp_driver_sd.c **** }
+ 504 .loc 1 306 1 view .LVU94
+ 505 0000 7047 bx lr
+ 506 .cfi_endproc
+ 507 .LFE155:
+ 509 .section .text.HAL_SD_TxCpltCallback,"ax",%progbits
+ 510 .align 1
+ 511 .global HAL_SD_TxCpltCallback
+ 512 .syntax unified
+ ARM GAS /tmp/ccVIJNmt.s page 15
+
+
+ 513 .thumb
+ 514 .thumb_func
+ 516 HAL_SD_TxCpltCallback:
+ 517 .LVL43:
+ 518 .LFB152:
+ 273:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
+ 519 .loc 1 273 1 view -0
+ 520 .cfi_startproc
+ 521 @ args = 0, pretend = 0, frame = 0
+ 522 @ frame_needed = 0, uses_anonymous_args = 0
+ 273:Src/bsp_driver_sd.c **** BSP_SD_WriteCpltCallback();
+ 523 .loc 1 273 1 is_stmt 0 view .LVU96
+ 524 0000 08B5 push {r3, lr}
+ 525 .LCFI12:
+ 526 .cfi_def_cfa_offset 8
+ 527 .cfi_offset 3, -8
+ 528 .cfi_offset 14, -4
+ 274:Src/bsp_driver_sd.c **** }
+ 529 .loc 1 274 3 is_stmt 1 view .LVU97
+ 530 0002 FFF7FEFF bl BSP_SD_WriteCpltCallback
+ 531 .LVL44:
+ 275:Src/bsp_driver_sd.c ****
+ 532 .loc 1 275 1 is_stmt 0 view .LVU98
+ 533 0006 08BD pop {r3, pc}
+ 534 .cfi_endproc
+ 535 .LFE152:
+ 537 .section .text.BSP_SD_ReadCpltCallback,"ax",%progbits
+ 538 .align 1
+ 539 .weak BSP_SD_ReadCpltCallback
+ 540 .syntax unified
+ 541 .thumb
+ 542 .thumb_func
+ 544 BSP_SD_ReadCpltCallback:
+ 545 .LFB156:
+ 307:Src/bsp_driver_sd.c ****
+ 308:Src/bsp_driver_sd.c **** /**
+ 309:Src/bsp_driver_sd.c **** * @brief BSP Rx Transfer completed callback
+ 310:Src/bsp_driver_sd.c **** * @retval None
+ 311:Src/bsp_driver_sd.c **** * @note empty (up to the user to fill it in or to remove it if useless)
+ 312:Src/bsp_driver_sd.c **** */
+ 313:Src/bsp_driver_sd.c **** __weak void BSP_SD_ReadCpltCallback(void)
+ 314:Src/bsp_driver_sd.c **** {
+ 546 .loc 1 314 1 is_stmt 1 view -0
+ 547 .cfi_startproc
+ 548 @ args = 0, pretend = 0, frame = 0
+ 549 @ frame_needed = 0, uses_anonymous_args = 0
+ 550 @ link register save eliminated.
+ 315:Src/bsp_driver_sd.c ****
+ 316:Src/bsp_driver_sd.c **** }
+ 551 .loc 1 316 1 view .LVU100
+ 552 0000 7047 bx lr
+ 553 .cfi_endproc
+ 554 .LFE156:
+ 556 .section .text.HAL_SD_RxCpltCallback,"ax",%progbits
+ 557 .align 1
+ 558 .global HAL_SD_RxCpltCallback
+ 559 .syntax unified
+ ARM GAS /tmp/ccVIJNmt.s page 16
+
+
+ 560 .thumb
+ 561 .thumb_func
+ 563 HAL_SD_RxCpltCallback:
+ 564 .LVL45:
+ 565 .LFB153:
+ 283:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
+ 566 .loc 1 283 1 view -0
+ 567 .cfi_startproc
+ 568 @ args = 0, pretend = 0, frame = 0
+ 569 @ frame_needed = 0, uses_anonymous_args = 0
+ 283:Src/bsp_driver_sd.c **** BSP_SD_ReadCpltCallback();
+ 570 .loc 1 283 1 is_stmt 0 view .LVU102
+ 571 0000 08B5 push {r3, lr}
+ 572 .LCFI13:
+ 573 .cfi_def_cfa_offset 8
+ 574 .cfi_offset 3, -8
+ 575 .cfi_offset 14, -4
+ 284:Src/bsp_driver_sd.c **** }
+ 576 .loc 1 284 3 is_stmt 1 view .LVU103
+ 577 0002 FFF7FEFF bl BSP_SD_ReadCpltCallback
+ 578 .LVL46:
+ 285:Src/bsp_driver_sd.c ****
+ 579 .loc 1 285 1 is_stmt 0 view .LVU104
+ 580 0006 08BD pop {r3, pc}
+ 581 .cfi_endproc
+ 582 .LFE153:
+ 584 .section .text.BSP_SD_IsDetected,"ax",%progbits
+ 585 .align 1
+ 586 .weak BSP_SD_IsDetected
+ 587 .syntax unified
+ 588 .thumb
+ 589 .thumb_func
+ 591 BSP_SD_IsDetected:
+ 592 .LFB157:
+ 317:Src/bsp_driver_sd.c **** /* USER CODE END CallBacksSection_C */
+ 318:Src/bsp_driver_sd.c **** #endif
+ 319:Src/bsp_driver_sd.c ****
+ 320:Src/bsp_driver_sd.c **** /**
+ 321:Src/bsp_driver_sd.c **** * @brief Detects if SD card is correctly plugged in the memory slot or not.
+ 322:Src/bsp_driver_sd.c **** * @param None
+ 323:Src/bsp_driver_sd.c **** * @retval Returns if SD is detected or not
+ 324:Src/bsp_driver_sd.c **** */
+ 325:Src/bsp_driver_sd.c **** __weak uint8_t BSP_SD_IsDetected(void)
+ 326:Src/bsp_driver_sd.c **** {
+ 593 .loc 1 326 1 is_stmt 1 view -0
+ 594 .cfi_startproc
+ 595 @ args = 0, pretend = 0, frame = 8
+ 596 @ frame_needed = 0, uses_anonymous_args = 0
+ 597 0000 00B5 push {lr}
+ 598 .LCFI14:
+ 599 .cfi_def_cfa_offset 4
+ 600 .cfi_offset 14, -4
+ 601 0002 83B0 sub sp, sp, #12
+ 602 .LCFI15:
+ 603 .cfi_def_cfa_offset 16
+ 327:Src/bsp_driver_sd.c **** __IO uint8_t status = SD_PRESENT;
+ 604 .loc 1 327 3 view .LVU106
+ ARM GAS /tmp/ccVIJNmt.s page 17
+
+
+ 605 .loc 1 327 16 is_stmt 0 view .LVU107
+ 606 0004 0123 movs r3, #1
+ 607 0006 8DF80730 strb r3, [sp, #7]
+ 328:Src/bsp_driver_sd.c ****
+ 329:Src/bsp_driver_sd.c **** if (BSP_PlatformIsDetected() == 0x0)
+ 608 .loc 1 329 3 is_stmt 1 view .LVU108
+ 609 .loc 1 329 7 is_stmt 0 view .LVU109
+ 610 000a FFF7FEFF bl BSP_PlatformIsDetected
+ 611 .LVL47:
+ 612 .loc 1 329 6 discriminator 1 view .LVU110
+ 613 000e 10B9 cbnz r0, .L54
+ 330:Src/bsp_driver_sd.c **** {
+ 331:Src/bsp_driver_sd.c **** status = SD_NOT_PRESENT;
+ 614 .loc 1 331 5 is_stmt 1 view .LVU111
+ 615 .loc 1 331 12 is_stmt 0 view .LVU112
+ 616 0010 0023 movs r3, #0
+ 617 0012 8DF80730 strb r3, [sp, #7]
+ 618 .L54:
+ 332:Src/bsp_driver_sd.c **** }
+ 333:Src/bsp_driver_sd.c ****
+ 334:Src/bsp_driver_sd.c **** return status;
+ 619 .loc 1 334 3 is_stmt 1 view .LVU113
+ 620 .loc 1 334 10 is_stmt 0 view .LVU114
+ 621 0016 9DF80700 ldrb r0, [sp, #7] @ zero_extendqisi2
+ 335:Src/bsp_driver_sd.c **** }
+ 622 .loc 1 335 1 view .LVU115
+ 623 001a 03B0 add sp, sp, #12
+ 624 .LCFI16:
+ 625 .cfi_def_cfa_offset 4
+ 626 @ sp needed
+ 627 001c 5DF804FB ldr pc, [sp], #4
+ 628 .cfi_endproc
+ 629 .LFE157:
+ 631 .section .text.BSP_SD_Init,"ax",%progbits
+ 632 .align 1
+ 633 .weak BSP_SD_Init
+ 634 .syntax unified
+ 635 .thumb
+ 636 .thumb_func
+ 638 BSP_SD_Init:
+ 639 .LFB142:
+ 68:Src/bsp_driver_sd.c **** uint8_t sd_state = MSD_OK;
+ 640 .loc 1 68 1 is_stmt 1 view -0
+ 641 .cfi_startproc
+ 642 @ args = 0, pretend = 0, frame = 0
+ 643 @ frame_needed = 0, uses_anonymous_args = 0
+ 644 0000 10B5 push {r4, lr}
+ 645 .LCFI17:
+ 646 .cfi_def_cfa_offset 8
+ 647 .cfi_offset 4, -8
+ 648 .cfi_offset 14, -4
+ 69:Src/bsp_driver_sd.c **** g_last_bsp_sd_detect_status = BSP_SD_IsDetected();
+ 649 .loc 1 69 3 view .LVU117
+ 650 .LVL48:
+ 70:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ 651 .loc 1 70 3 view .LVU118
+ 70:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ ARM GAS /tmp/ccVIJNmt.s page 18
+
+
+ 652 .loc 1 70 33 is_stmt 0 view .LVU119
+ 653 0002 FFF7FEFF bl BSP_SD_IsDetected
+ 654 .LVL49:
+ 70:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = HAL_ERROR;
+ 655 .loc 1 70 31 discriminator 1 view .LVU120
+ 656 0006 134B ldr r3, .L61
+ 657 0008 1870 strb r0, [r3]
+ 71:Src/bsp_driver_sd.c **** g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+ 658 .loc 1 71 3 is_stmt 1 view .LVU121
+ 71:Src/bsp_driver_sd.c **** g_last_bsp_sd_wide_bus_status = HAL_ERROR;
+ 659 .loc 1 71 33 is_stmt 0 view .LVU122
+ 660 000a 0122 movs r2, #1
+ 661 000c 1249 ldr r1, .L61+4
+ 662 000e 0A70 strb r2, [r1]
+ 72:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = 0u;
+ 663 .loc 1 72 3 is_stmt 1 view .LVU123
+ 72:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = 0u;
+ 664 .loc 1 72 33 is_stmt 0 view .LVU124
+ 665 0010 1249 ldr r1, .L61+8
+ 666 0012 0A70 strb r2, [r1]
+ 73:Src/bsp_driver_sd.c **** /* Check if the SD card is plugged in the slot */
+ 667 .loc 1 73 3 is_stmt 1 view .LVU125
+ 73:Src/bsp_driver_sd.c **** /* Check if the SD card is plugged in the slot */
+ 668 .loc 1 73 27 is_stmt 0 view .LVU126
+ 669 0014 124A ldr r2, .L61+12
+ 670 0016 0021 movs r1, #0
+ 671 0018 1160 str r1, [r2]
+ 75:Src/bsp_driver_sd.c **** {
+ 672 .loc 1 75 3 is_stmt 1 view .LVU127
+ 75:Src/bsp_driver_sd.c **** {
+ 673 .loc 1 75 35 is_stmt 0 view .LVU128
+ 674 001a 1B78 ldrb r3, [r3] @ zero_extendqisi2
+ 675 001c DBB2 uxtb r3, r3
+ 75:Src/bsp_driver_sd.c **** {
+ 676 .loc 1 75 6 view .LVU129
+ 677 001e 012B cmp r3, #1
+ 678 0020 03D0 beq .L57
+ 77:Src/bsp_driver_sd.c **** return MSD_ERROR_SD_NOT_PRESENT;
+ 679 .loc 1 77 5 is_stmt 1 view .LVU130
+ 77:Src/bsp_driver_sd.c **** return MSD_ERROR_SD_NOT_PRESENT;
+ 680 .loc 1 77 31 is_stmt 0 view .LVU131
+ 681 0022 0220 movs r0, #2
+ 682 0024 0F4B ldr r3, .L61+16
+ 683 0026 1870 strb r0, [r3]
+ 78:Src/bsp_driver_sd.c **** }
+ 684 .loc 1 78 5 is_stmt 1 view .LVU132
+ 685 .LVL50:
+ 686 .L58:
+ 94:Src/bsp_driver_sd.c **** /* USER CODE BEGIN AfterInitSection */
+ 687 .loc 1 94 1 is_stmt 0 view .LVU133
+ 688 0028 10BD pop {r4, pc}
+ 689 .LVL51:
+ 690 .L57:
+ 80:Src/bsp_driver_sd.c **** hsd1.Init.ClockDiv = 118u;
+ 691 .loc 1 80 3 is_stmt 1 view .LVU134
+ 80:Src/bsp_driver_sd.c **** hsd1.Init.ClockDiv = 118u;
+ 692 .loc 1 80 21 is_stmt 0 view .LVU135
+ ARM GAS /tmp/ccVIJNmt.s page 19
+
+
+ 693 002a 0F4C ldr r4, .L61+20
+ 694 002c 0023 movs r3, #0
+ 695 002e 2361 str r3, [r4, #16]
+ 81:Src/bsp_driver_sd.c **** /* HAL SD initialization */
+ 696 .loc 1 81 3 is_stmt 1 view .LVU136
+ 81:Src/bsp_driver_sd.c **** /* HAL SD initialization */
+ 697 .loc 1 81 22 is_stmt 0 view .LVU137
+ 698 0030 7623 movs r3, #118
+ 699 0032 A361 str r3, [r4, #24]
+ 83:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = sd_state;
+ 700 .loc 1 83 3 is_stmt 1 view .LVU138
+ 83:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_init_status = sd_state;
+ 701 .loc 1 83 14 is_stmt 0 view .LVU139
+ 702 0034 2046 mov r0, r4
+ 703 0036 FFF7FEFF bl HAL_SD_Init
+ 704 .LVL52:
+ 84:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = hsd1.ErrorCode;
+ 705 .loc 1 84 3 is_stmt 1 view .LVU140
+ 84:Src/bsp_driver_sd.c **** g_last_bsp_sd_hal_error = hsd1.ErrorCode;
+ 706 .loc 1 84 33 is_stmt 0 view .LVU141
+ 707 003a 074B ldr r3, .L61+4
+ 708 003c 1870 strb r0, [r3]
+ 85:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
+ 709 .loc 1 85 3 is_stmt 1 view .LVU142
+ 85:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
+ 710 .loc 1 85 33 is_stmt 0 view .LVU143
+ 711 003e A26B ldr r2, [r4, #56]
+ 85:Src/bsp_driver_sd.c **** /* Configure SD Bus width (4 bits mode selected) */
+ 712 .loc 1 85 27 view .LVU144
+ 713 0040 074B ldr r3, .L61+12
+ 714 0042 1A60 str r2, [r3]
+ 87:Src/bsp_driver_sd.c **** {
+ 715 .loc 1 87 3 is_stmt 1 view .LVU145
+ 87:Src/bsp_driver_sd.c **** {
+ 716 .loc 1 87 6 is_stmt 0 view .LVU146
+ 717 0044 10B9 cbnz r0, .L59
+ 89:Src/bsp_driver_sd.c **** }
+ 718 .loc 1 89 5 is_stmt 1 view .LVU147
+ 89:Src/bsp_driver_sd.c **** }
+ 719 .loc 1 89 35 is_stmt 0 view .LVU148
+ 720 0046 054B ldr r3, .L61+8
+ 721 0048 0022 movs r2, #0
+ 722 004a 1A70 strb r2, [r3]
+ 723 .L59:
+ 92:Src/bsp_driver_sd.c **** return sd_state;
+ 724 .loc 1 92 3 is_stmt 1 view .LVU149
+ 92:Src/bsp_driver_sd.c **** return sd_state;
+ 725 .loc 1 92 29 is_stmt 0 view .LVU150
+ 726 004c 054B ldr r3, .L61+16
+ 727 004e 1870 strb r0, [r3]
+ 93:Src/bsp_driver_sd.c **** }
+ 728 .loc 1 93 3 is_stmt 1 view .LVU151
+ 93:Src/bsp_driver_sd.c **** }
+ 729 .loc 1 93 10 is_stmt 0 view .LVU152
+ 730 0050 EAE7 b .L58
+ 731 .L62:
+ 732 0052 00BF .align 2
+ ARM GAS /tmp/ccVIJNmt.s page 20
+
+
+ 733 .L61:
+ 734 0054 00000000 .word g_last_bsp_sd_detect_status
+ 735 0058 00000000 .word g_last_bsp_sd_hal_init_status
+ 736 005c 00000000 .word g_last_bsp_sd_wide_bus_status
+ 737 0060 00000000 .word g_last_bsp_sd_hal_error
+ 738 0064 00000000 .word g_last_bsp_sd_init_status
+ 739 0068 00000000 .word hsd1
+ 740 .cfi_endproc
+ 741 .LFE142:
+ 743 .section .bss.g_last_bsp_sd_hal_error,"aw",%nobits
+ 744 .align 2
+ 747 g_last_bsp_sd_hal_error:
+ 748 0000 00000000 .space 4
+ 749 .section .data.g_last_bsp_sd_wide_bus_status,"aw"
+ 752 g_last_bsp_sd_wide_bus_status:
+ 753 0000 01 .byte 1
+ 754 .section .data.g_last_bsp_sd_hal_init_status,"aw"
+ 757 g_last_bsp_sd_hal_init_status:
+ 758 0000 01 .byte 1
+ 759 .section .bss.g_last_bsp_sd_detect_status,"aw",%nobits
+ 762 g_last_bsp_sd_detect_status:
+ 763 0000 00 .space 1
+ 764 .section .data.g_last_bsp_sd_init_status,"aw"
+ 767 g_last_bsp_sd_init_status:
+ 768 0000 02 .byte 2
+ 769 .text
+ 770 .Letext0:
+ 771 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 772 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 773 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 774 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 775 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
+ 776 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
+ 777 .file 8 "Inc/bsp_driver_sd.h"
+ 778 .file 9 "Inc/fatfs_platform.h"
+ ARM GAS /tmp/ccVIJNmt.s page 21
DEFINED SYMBOLS
*ABS*:00000000 bsp_driver_sd.c
- /tmp/ccmWzdNV.s:20 .text.BSP_SD_ITConfig:00000000 $t
- /tmp/ccmWzdNV.s:26 .text.BSP_SD_ITConfig:00000000 BSP_SD_ITConfig
- /tmp/ccmWzdNV.s:41 .text.BSP_SD_ReadBlocks:00000000 $t
- /tmp/ccmWzdNV.s:47 .text.BSP_SD_ReadBlocks:00000000 BSP_SD_ReadBlocks
- /tmp/ccmWzdNV.s:97 .text.BSP_SD_ReadBlocks:0000001c $d
- /tmp/ccmWzdNV.s:102 .text.BSP_SD_WriteBlocks:00000000 $t
- /tmp/ccmWzdNV.s:108 .text.BSP_SD_WriteBlocks:00000000 BSP_SD_WriteBlocks
- /tmp/ccmWzdNV.s:158 .text.BSP_SD_WriteBlocks:0000001c $d
- /tmp/ccmWzdNV.s:163 .text.BSP_SD_ReadBlocks_DMA:00000000 $t
- /tmp/ccmWzdNV.s:169 .text.BSP_SD_ReadBlocks_DMA:00000000 BSP_SD_ReadBlocks_DMA
- /tmp/ccmWzdNV.s:210 .text.BSP_SD_ReadBlocks_DMA:00000014 $d
- /tmp/ccmWzdNV.s:215 .text.BSP_SD_WriteBlocks_DMA:00000000 $t
- /tmp/ccmWzdNV.s:221 .text.BSP_SD_WriteBlocks_DMA:00000000 BSP_SD_WriteBlocks_DMA
- /tmp/ccmWzdNV.s:262 .text.BSP_SD_WriteBlocks_DMA:00000014 $d
- /tmp/ccmWzdNV.s:267 .text.BSP_SD_Erase:00000000 $t
- /tmp/ccmWzdNV.s:273 .text.BSP_SD_Erase:00000000 BSP_SD_Erase
- /tmp/ccmWzdNV.s:311 .text.BSP_SD_Erase:00000014 $d
- /tmp/ccmWzdNV.s:316 .text.BSP_SD_GetCardState:00000000 $t
- /tmp/ccmWzdNV.s:322 .text.BSP_SD_GetCardState:00000000 BSP_SD_GetCardState
- /tmp/ccmWzdNV.s:346 .text.BSP_SD_GetCardState:00000010 $d
- /tmp/ccmWzdNV.s:351 .text.BSP_SD_GetCardInfo:00000000 $t
- /tmp/ccmWzdNV.s:357 .text.BSP_SD_GetCardInfo:00000000 BSP_SD_GetCardInfo
- /tmp/ccmWzdNV.s:382 .text.BSP_SD_GetCardInfo:0000000c $d
- /tmp/ccmWzdNV.s:387 .text.BSP_SD_AbortCallback:00000000 $t
- /tmp/ccmWzdNV.s:393 .text.BSP_SD_AbortCallback:00000000 BSP_SD_AbortCallback
- /tmp/ccmWzdNV.s:406 .text.HAL_SD_AbortCallback:00000000 $t
- /tmp/ccmWzdNV.s:412 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback
- /tmp/ccmWzdNV.s:434 .text.BSP_SD_WriteCpltCallback:00000000 $t
- /tmp/ccmWzdNV.s:440 .text.BSP_SD_WriteCpltCallback:00000000 BSP_SD_WriteCpltCallback
- /tmp/ccmWzdNV.s:453 .text.HAL_SD_TxCpltCallback:00000000 $t
- /tmp/ccmWzdNV.s:459 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback
- /tmp/ccmWzdNV.s:481 .text.BSP_SD_ReadCpltCallback:00000000 $t
- /tmp/ccmWzdNV.s:487 .text.BSP_SD_ReadCpltCallback:00000000 BSP_SD_ReadCpltCallback
- /tmp/ccmWzdNV.s:500 .text.HAL_SD_RxCpltCallback:00000000 $t
- /tmp/ccmWzdNV.s:506 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback
- /tmp/ccmWzdNV.s:528 .text.BSP_SD_IsDetected:00000000 $t
- /tmp/ccmWzdNV.s:534 .text.BSP_SD_IsDetected:00000000 BSP_SD_IsDetected
- /tmp/ccmWzdNV.s:575 .text.BSP_SD_Init:00000000 $t
- /tmp/ccmWzdNV.s:581 .text.BSP_SD_Init:00000000 BSP_SD_Init
- /tmp/ccmWzdNV.s:643 .text.BSP_SD_Init:00000030 $d
+ /tmp/ccVIJNmt.s:20 .text.BSP_SD_GetDebugInfo:00000000 $t
+ /tmp/ccVIJNmt.s:26 .text.BSP_SD_GetDebugInfo:00000000 BSP_SD_GetDebugInfo
+ /tmp/ccVIJNmt.s:68 .text.BSP_SD_GetDebugInfo:00000024 $d
+ /tmp/ccVIJNmt.s:767 .data.g_last_bsp_sd_init_status:00000000 g_last_bsp_sd_init_status
+ /tmp/ccVIJNmt.s:762 .bss.g_last_bsp_sd_detect_status:00000000 g_last_bsp_sd_detect_status
+ /tmp/ccVIJNmt.s:757 .data.g_last_bsp_sd_hal_init_status:00000000 g_last_bsp_sd_hal_init_status
+ /tmp/ccVIJNmt.s:752 .data.g_last_bsp_sd_wide_bus_status:00000000 g_last_bsp_sd_wide_bus_status
+ /tmp/ccVIJNmt.s:747 .bss.g_last_bsp_sd_hal_error:00000000 g_last_bsp_sd_hal_error
+ /tmp/ccVIJNmt.s:77 .text.BSP_SD_ITConfig:00000000 $t
+ /tmp/ccVIJNmt.s:83 .text.BSP_SD_ITConfig:00000000 BSP_SD_ITConfig
+ /tmp/ccVIJNmt.s:98 .text.BSP_SD_ReadBlocks:00000000 $t
+ /tmp/ccVIJNmt.s:104 .text.BSP_SD_ReadBlocks:00000000 BSP_SD_ReadBlocks
+ /tmp/ccVIJNmt.s:154 .text.BSP_SD_ReadBlocks:0000001c $d
+ /tmp/ccVIJNmt.s:159 .text.BSP_SD_WriteBlocks:00000000 $t
+ /tmp/ccVIJNmt.s:165 .text.BSP_SD_WriteBlocks:00000000 BSP_SD_WriteBlocks
+ /tmp/ccVIJNmt.s:215 .text.BSP_SD_WriteBlocks:0000001c $d
+ /tmp/ccVIJNmt.s:220 .text.BSP_SD_ReadBlocks_DMA:00000000 $t
+ /tmp/ccVIJNmt.s:226 .text.BSP_SD_ReadBlocks_DMA:00000000 BSP_SD_ReadBlocks_DMA
+ /tmp/ccVIJNmt.s:267 .text.BSP_SD_ReadBlocks_DMA:00000014 $d
+ /tmp/ccVIJNmt.s:272 .text.BSP_SD_WriteBlocks_DMA:00000000 $t
+ /tmp/ccVIJNmt.s:278 .text.BSP_SD_WriteBlocks_DMA:00000000 BSP_SD_WriteBlocks_DMA
+ /tmp/ccVIJNmt.s:319 .text.BSP_SD_WriteBlocks_DMA:00000014 $d
+ /tmp/ccVIJNmt.s:324 .text.BSP_SD_Erase:00000000 $t
+ /tmp/ccVIJNmt.s:330 .text.BSP_SD_Erase:00000000 BSP_SD_Erase
+ /tmp/ccVIJNmt.s:368 .text.BSP_SD_Erase:00000014 $d
+ /tmp/ccVIJNmt.s:373 .text.BSP_SD_GetCardState:00000000 $t
+ /tmp/ccVIJNmt.s:379 .text.BSP_SD_GetCardState:00000000 BSP_SD_GetCardState
+ /tmp/ccVIJNmt.s:403 .text.BSP_SD_GetCardState:00000010 $d
+ /tmp/ccVIJNmt.s:408 .text.BSP_SD_GetCardInfo:00000000 $t
+ /tmp/ccVIJNmt.s:414 .text.BSP_SD_GetCardInfo:00000000 BSP_SD_GetCardInfo
+ /tmp/ccVIJNmt.s:439 .text.BSP_SD_GetCardInfo:0000000c $d
+ /tmp/ccVIJNmt.s:444 .text.BSP_SD_AbortCallback:00000000 $t
+ /tmp/ccVIJNmt.s:450 .text.BSP_SD_AbortCallback:00000000 BSP_SD_AbortCallback
+ /tmp/ccVIJNmt.s:463 .text.HAL_SD_AbortCallback:00000000 $t
+ /tmp/ccVIJNmt.s:469 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback
+ /tmp/ccVIJNmt.s:491 .text.BSP_SD_WriteCpltCallback:00000000 $t
+ /tmp/ccVIJNmt.s:497 .text.BSP_SD_WriteCpltCallback:00000000 BSP_SD_WriteCpltCallback
+ /tmp/ccVIJNmt.s:510 .text.HAL_SD_TxCpltCallback:00000000 $t
+ /tmp/ccVIJNmt.s:516 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback
+ /tmp/ccVIJNmt.s:538 .text.BSP_SD_ReadCpltCallback:00000000 $t
+ /tmp/ccVIJNmt.s:544 .text.BSP_SD_ReadCpltCallback:00000000 BSP_SD_ReadCpltCallback
+ /tmp/ccVIJNmt.s:557 .text.HAL_SD_RxCpltCallback:00000000 $t
+ /tmp/ccVIJNmt.s:563 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback
+ /tmp/ccVIJNmt.s:585 .text.BSP_SD_IsDetected:00000000 $t
+ /tmp/ccVIJNmt.s:591 .text.BSP_SD_IsDetected:00000000 BSP_SD_IsDetected
+ /tmp/ccVIJNmt.s:632 .text.BSP_SD_Init:00000000 $t
+ /tmp/ccVIJNmt.s:638 .text.BSP_SD_Init:00000000 BSP_SD_Init
+ /tmp/ccVIJNmt.s:734 .text.BSP_SD_Init:00000054 $d
+ /tmp/ccVIJNmt.s:744 .bss.g_last_bsp_sd_hal_error:00000000 $d
+ /tmp/ccVIJNmt.s:763 .bss.g_last_bsp_sd_detect_status:00000000 $d
UNDEFINED SYMBOLS
HAL_SD_ReadBlocks
hsd1
HAL_SD_WriteBlocks
+ ARM GAS /tmp/ccVIJNmt.s page 22
+
+
HAL_SD_ReadBlocks_DMA
HAL_SD_WriteBlocks_DMA
HAL_SD_Erase
@@ -1069,4 +1246,3 @@ HAL_SD_GetCardState
HAL_SD_GetCardInfo
BSP_PlatformIsDetected
HAL_SD_Init
-HAL_SD_ConfigWideBusOperation
diff --git a/build/bsp_driver_sd.o b/build/bsp_driver_sd.o
index a3475a7..362f900 100644
Binary files a/build/bsp_driver_sd.o and b/build/bsp_driver_sd.o differ
diff --git a/build/diskio.lst b/build/diskio.lst
index dd26628..0af354b 100644
--- a/build/diskio.lst
+++ b/build/diskio.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccUBbJH7.s page 1
+ARM GAS /tmp/ccoaTSFN.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/
29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/
30:Middlewares/Third_Party/FatFs/src/diskio.c ****
- ARM GAS /tmp/ccUBbJH7.s page 2
+ ARM GAS /tmp/ccoaTSFN.s page 2
31:Middlewares/Third_Party/FatFs/src/diskio.c **** /**
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
71 disk_initialize:
72 .LVL3:
73 .LFB1184:
- ARM GAS /tmp/ccUBbJH7.s page 3
+ ARM GAS /tmp/ccoaTSFN.s page 3
45:Middlewares/Third_Party/FatFs/src/diskio.c ****
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat;
111 .loc 1 62 3 is_stmt 1 view .LVU23
63:Middlewares/Third_Party/FatFs/src/diskio.c **** }
- ARM GAS /tmp/ccUBbJH7.s page 4
+ ARM GAS /tmp/ccoaTSFN.s page 4
112 .loc 1 63 1 is_stmt 0 view .LVU24
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res;
150 .loc 1 80 3 is_stmt 1 view .LVU29
81:Middlewares/Third_Party/FatFs/src/diskio.c ****
- ARM GAS /tmp/ccUBbJH7.s page 5
+ ARM GAS /tmp/ccoaTSFN.s page 5
82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
187 @ args = 0, pretend = 0, frame = 0
188 @ frame_needed = 0, uses_anonymous_args = 0
189 .loc 1 101 1 is_stmt 0 view .LVU38
- ARM GAS /tmp/ccUBbJH7.s page 6
+ ARM GAS /tmp/ccoaTSFN.s page 6
190 0000 38B5 push {r3, r4, r5, lr}
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1
117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl (
118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */
- ARM GAS /tmp/ccUBbJH7.s page 7
+ ARM GAS /tmp/ccoaTSFN.s page 7
119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccUBbJH7.s page 1
131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC
132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None
133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD
- ARM GAS /tmp/ccUBbJH7.s page 8
+ ARM GAS /tmp/ccoaTSFN.s page 8
134:Middlewares/Third_Party/FatFs/src/diskio.c **** */
@@ -446,28 +446,28 @@ ARM GAS /tmp/ccUBbJH7.s page 1
294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
- ARM GAS /tmp/ccUBbJH7.s page 9
+ ARM GAS /tmp/ccoaTSFN.s page 9
DEFINED SYMBOLS
*ABS*:00000000 diskio.c
- /tmp/ccUBbJH7.s:20 .text.disk_status:00000000 $t
- /tmp/ccUBbJH7.s:26 .text.disk_status:00000000 disk_status
- /tmp/ccUBbJH7.s:60 .text.disk_status:00000014 $d
- /tmp/ccUBbJH7.s:65 .text.disk_initialize:00000000 $t
- /tmp/ccUBbJH7.s:71 .text.disk_initialize:00000000 disk_initialize
- /tmp/ccUBbJH7.s:124 .text.disk_initialize:00000024 $d
- /tmp/ccUBbJH7.s:129 .text.disk_read:00000000 $t
- /tmp/ccUBbJH7.s:135 .text.disk_read:00000000 disk_read
- /tmp/ccUBbJH7.s:171 .text.disk_read:00000014 $d
- /tmp/ccUBbJH7.s:176 .text.disk_write:00000000 $t
- /tmp/ccUBbJH7.s:182 .text.disk_write:00000000 disk_write
- /tmp/ccUBbJH7.s:218 .text.disk_write:00000014 $d
- /tmp/ccUBbJH7.s:223 .text.disk_ioctl:00000000 $t
- /tmp/ccUBbJH7.s:229 .text.disk_ioctl:00000000 disk_ioctl
- /tmp/ccUBbJH7.s:263 .text.disk_ioctl:00000014 $d
- /tmp/ccUBbJH7.s:268 .text.get_fattime:00000000 $t
- /tmp/ccUBbJH7.s:274 .text.get_fattime:00000000 get_fattime
+ /tmp/ccoaTSFN.s:20 .text.disk_status:00000000 $t
+ /tmp/ccoaTSFN.s:26 .text.disk_status:00000000 disk_status
+ /tmp/ccoaTSFN.s:60 .text.disk_status:00000014 $d
+ /tmp/ccoaTSFN.s:65 .text.disk_initialize:00000000 $t
+ /tmp/ccoaTSFN.s:71 .text.disk_initialize:00000000 disk_initialize
+ /tmp/ccoaTSFN.s:124 .text.disk_initialize:00000024 $d
+ /tmp/ccoaTSFN.s:129 .text.disk_read:00000000 $t
+ /tmp/ccoaTSFN.s:135 .text.disk_read:00000000 disk_read
+ /tmp/ccoaTSFN.s:171 .text.disk_read:00000014 $d
+ /tmp/ccoaTSFN.s:176 .text.disk_write:00000000 $t
+ /tmp/ccoaTSFN.s:182 .text.disk_write:00000000 disk_write
+ /tmp/ccoaTSFN.s:218 .text.disk_write:00000014 $d
+ /tmp/ccoaTSFN.s:223 .text.disk_ioctl:00000000 $t
+ /tmp/ccoaTSFN.s:229 .text.disk_ioctl:00000000 disk_ioctl
+ /tmp/ccoaTSFN.s:263 .text.disk_ioctl:00000014 $d
+ /tmp/ccoaTSFN.s:268 .text.get_fattime:00000000 $t
+ /tmp/ccoaTSFN.s:274 .text.get_fattime:00000000 get_fattime
UNDEFINED SYMBOLS
disk
diff --git a/build/diskio.o b/build/diskio.o
index a4c4aca..5f989bb 100644
Binary files a/build/diskio.o and b/build/diskio.o differ
diff --git a/build/fatfs.lst b/build/fatfs.lst
index 311fe45..1f40978 100644
--- a/build/fatfs.lst
+++ b/build/fatfs.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccYQrN39.s page 1
+ARM GAS /tmp/ccQ1uJzV.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccYQrN39.s page 1
29:Src/fatfs.c ****
30:Src/fatfs.c **** void MX_FATFS_Init(void)
31:Src/fatfs.c **** {
- ARM GAS /tmp/ccYQrN39.s page 2
+ ARM GAS /tmp/ccQ1uJzV.s page 2
28 .loc 1 31 1 view -0
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccYQrN39.s page 1
69 @ frame_needed = 0, uses_anonymous_args = 0
70 @ link register save eliminated.
47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */
- ARM GAS /tmp/ccYQrN39.s page 3
+ ARM GAS /tmp/ccQ1uJzV.s page 3
48:Src/fatfs.c **** return 0;
@@ -169,24 +169,24 @@ ARM GAS /tmp/ccYQrN39.s page 1
114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
115 .file 10 "Inc/sd_diskio.h"
116 .file 11 "Inc/fatfs.h"
- ARM GAS /tmp/ccYQrN39.s page 4
+ ARM GAS /tmp/ccQ1uJzV.s page 4
DEFINED SYMBOLS
*ABS*:00000000 fatfs.c
- /tmp/ccYQrN39.s:20 .text.MX_FATFS_Init:00000000 $t
- /tmp/ccYQrN39.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init
- /tmp/ccYQrN39.s:51 .text.MX_FATFS_Init:00000010 $d
- /tmp/ccYQrN39.s:97 .bss.SDPath:00000000 SDPath
- /tmp/ccYQrN39.s:103 .bss.retSD:00000000 retSD
- /tmp/ccYQrN39.s:58 .text.get_fattime:00000000 $t
- /tmp/ccYQrN39.s:64 .text.get_fattime:00000000 get_fattime
- /tmp/ccYQrN39.s:83 .bss.SDFile:00000000 SDFile
- /tmp/ccYQrN39.s:80 .bss.SDFile:00000000 $d
- /tmp/ccYQrN39.s:90 .bss.SDFatFS:00000000 SDFatFS
- /tmp/ccYQrN39.s:87 .bss.SDFatFS:00000000 $d
- /tmp/ccYQrN39.s:94 .bss.SDPath:00000000 $d
- /tmp/ccYQrN39.s:104 .bss.retSD:00000000 $d
+ /tmp/ccQ1uJzV.s:20 .text.MX_FATFS_Init:00000000 $t
+ /tmp/ccQ1uJzV.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init
+ /tmp/ccQ1uJzV.s:51 .text.MX_FATFS_Init:00000010 $d
+ /tmp/ccQ1uJzV.s:97 .bss.SDPath:00000000 SDPath
+ /tmp/ccQ1uJzV.s:103 .bss.retSD:00000000 retSD
+ /tmp/ccQ1uJzV.s:58 .text.get_fattime:00000000 $t
+ /tmp/ccQ1uJzV.s:64 .text.get_fattime:00000000 get_fattime
+ /tmp/ccQ1uJzV.s:83 .bss.SDFile:00000000 SDFile
+ /tmp/ccQ1uJzV.s:80 .bss.SDFile:00000000 $d
+ /tmp/ccQ1uJzV.s:90 .bss.SDFatFS:00000000 SDFatFS
+ /tmp/ccQ1uJzV.s:87 .bss.SDFatFS:00000000 $d
+ /tmp/ccQ1uJzV.s:94 .bss.SDPath:00000000 $d
+ /tmp/ccQ1uJzV.s:104 .bss.retSD:00000000 $d
UNDEFINED SYMBOLS
FATFS_LinkDriver
diff --git a/build/fatfs.o b/build/fatfs.o
index d7e9a71..353fbe2 100644
Binary files a/build/fatfs.o and b/build/fatfs.o differ
diff --git a/build/fatfs_platform.lst b/build/fatfs_platform.lst
index 013af23..ad35ce7 100644
--- a/build/fatfs_platform.lst
+++ b/build/fatfs_platform.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccKjaXMq.s page 1
+ARM GAS /tmp/cc0ElFpc.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccKjaXMq.s page 1
35 .cfi_offset 3, -8
36 .cfi_offset 14, -4
22:Src/fatfs_platform.c **** uint8_t status = SD_PRESENT;
- ARM GAS /tmp/ccKjaXMq.s page 2
+ ARM GAS /tmp/cc0ElFpc.s page 2
37 .loc 1 22 5 view .LVU1
@@ -106,14 +106,14 @@ ARM GAS /tmp/ccKjaXMq.s page 1
68 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
69 .file 3 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
70 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- ARM GAS /tmp/ccKjaXMq.s page 3
+ ARM GAS /tmp/cc0ElFpc.s page 3
DEFINED SYMBOLS
*ABS*:00000000 fatfs_platform.c
- /tmp/ccKjaXMq.s:20 .text.BSP_PlatformIsDetected:00000000 $t
- /tmp/ccKjaXMq.s:26 .text.BSP_PlatformIsDetected:00000000 BSP_PlatformIsDetected
- /tmp/ccKjaXMq.s:62 .text.BSP_PlatformIsDetected:00000014 $d
+ /tmp/cc0ElFpc.s:20 .text.BSP_PlatformIsDetected:00000000 $t
+ /tmp/cc0ElFpc.s:26 .text.BSP_PlatformIsDetected:00000000 BSP_PlatformIsDetected
+ /tmp/cc0ElFpc.s:62 .text.BSP_PlatformIsDetected:00000014 $d
UNDEFINED SYMBOLS
HAL_GPIO_ReadPin
diff --git a/build/ff.lst b/build/ff.lst
index 5072641..4174165 100644
--- a/build/ff.lst
+++ b/build/ff.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccOwl4Y6.s page 1
+ARM GAS /tmp/ccRP6lD5.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
29:Middlewares/Third_Party/FatFs/src/ff.c **** ---------------------------------------------------------------------------*/
30:Middlewares/Third_Party/FatFs/src/ff.c ****
31:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FATFS != 68300 /* Revision ID */
- ARM GAS /tmp/ccOwl4Y6.s page 2
+ ARM GAS /tmp/ccRP6lD5.s page 2
32:Middlewares/Third_Party/FatFs/src/ff.c **** #error Wrong include file (ff.h).
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
86:Middlewares/Third_Party/FatFs/src/ff.c **** #define _DF1S 0
87:Middlewares/Third_Party/FatFs/src/ff.c **** #define _EXCVT {0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F, \
88:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F, \
- ARM GAS /tmp/ccOwl4Y6.s page 3
+ ARM GAS /tmp/ccRP6lD5.s page 3
89:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF, \
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
143:Middlewares/Third_Party/FatFs/src/ff.c **** 0x90,0x91,0x91,0xE2,0x99,0x95,0x95,0x97,0x97,0x99,0x9A,0x9B,0x9B,0x9D,0x9E,0xAC, \
144:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB5,0xD6,0xE0,0xE9,0xA4,0xA4,0xA6,0xA6,0xA8,0xA8,0xAA,0x8D,0xAC,0xB8,0xAE,0xAF, \
145:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBD,0xBF, \
- ARM GAS /tmp/ccOwl4Y6.s page 4
+ ARM GAS /tmp/ccRP6lD5.s page 4
146:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC6,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
200:Middlewares/Third_Party/FatFs/src/ff.c **** 0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF, \
201:Middlewares/Third_Party/FatFs/src/ff.c **** 0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF, \
202:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF, \
- ARM GAS /tmp/ccOwl4Y6.s page 5
+ ARM GAS /tmp/ccRP6lD5.s page 5
203:Middlewares/Third_Party/FatFs/src/ff.c **** 0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF, \
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
257:Middlewares/Third_Party/FatFs/src/ff.c **** 0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xA4,0xA5,0xA6,0xD9,0xDA,0xDB,0xDC,0xA7,0xA8,0xDF, \
258:Middlewares/Third_Party/FatFs/src/ff.c **** 0xA9,0xAA,0xAC,0xAD,0xB5,0xB6,0xB7,0xB8,0xBD,0xBE,0xC6,0xC7,0xCF,0xCF,0xD0,0xEF, \
259:Middlewares/Third_Party/FatFs/src/ff.c **** 0xF0,0xF1,0xD1,0xD2,0xD3,0xF5,0xD4,0xF7,0xF8,0xF9,0xD5,0x96,0x95,0x98,0xFE,0xFF}
- ARM GAS /tmp/ccOwl4Y6.s page 6
+ ARM GAS /tmp/ccRP6lD5.s page 6
260:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
314:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LOSS 0x01 /* Out of 8.3 format */
315:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LFN 0x02 /* Force to create LFN entry */
316:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_LAST 0x04 /* Last segment */
- ARM GAS /tmp/ccOwl4Y6.s page 7
+ ARM GAS /tmp/ccRP6lD5.s page 7
317:Middlewares/Third_Party/FatFs/src/ff.c **** #define NS_BODY 0x08 /* Lower case flag (body) */
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
371:Middlewares/Third_Party/FatFs/src/ff.c **** #define BS_BootCode32 90 /* FAT32: Boot code (420-byte) */
372:Middlewares/Third_Party/FatFs/src/ff.c ****
373:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_ZeroedEx 11 /* exFAT: MBZ field (53-byte) */
- ARM GAS /tmp/ccOwl4Y6.s page 8
+ ARM GAS /tmp/ccRP6lD5.s page 8
374:Middlewares/Third_Party/FatFs/src/ff.c **** #define BPB_VolOfsEx 64 /* exFAT: Volume offset from top of the drive [sector] (QWORD) */
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
428:Middlewares/Third_Party/FatFs/src/ff.c **** #define XDIR_FileSize 56 /* exFAT: File/Directory size (QWORD) */
429:Middlewares/Third_Party/FatFs/src/ff.c ****
430:Middlewares/Third_Party/FatFs/src/ff.c **** #define SZDIRE 32 /* Size of a directory entry */
- ARM GAS /tmp/ccOwl4Y6.s page 9
+ ARM GAS /tmp/ccRP6lD5.s page 9
431:Middlewares/Third_Party/FatFs/src/ff.c **** #define DDEM 0xE5 /* Deleted directory entry mark set to DIR_Name[0] */
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
485:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS == _MIN_SS
486:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((UINT)_MAX_SS) /* Fixed sector size */
487:Middlewares/Third_Party/FatFs/src/ff.c **** #else
- ARM GAS /tmp/ccOwl4Y6.s page 10
+ ARM GAS /tmp/ccRP6lD5.s page 10
488:Middlewares/Third_Party/FatFs/src/ff.c **** #define SS(fs) ((fs)->ssize) /* Variable sector size */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
542:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
543:Middlewares/Third_Party/FatFs/src/ff.c ****
544:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 0 /* Non-LFN configuration */
- ARM GAS /tmp/ccOwl4Y6.s page 11
+ ARM GAS /tmp/ccRP6lD5.s page 11
545:Middlewares/Third_Party/FatFs/src/ff.c **** #define DEF_NAMBUF
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
599:Middlewares/Third_Party/FatFs/src/ff.c ****
600:Middlewares/Third_Party/FatFs/src/ff.c ****
601:Middlewares/Third_Party/FatFs/src/ff.c **** /*--------------------------------------------------------------------------
- ARM GAS /tmp/ccOwl4Y6.s page 12
+ ARM GAS /tmp/ccRP6lD5.s page 12
602:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
61 .cfi_startproc
62 @ args = 0, pretend = 0, frame = 0
63 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccOwl4Y6.s page 13
+ ARM GAS /tmp/ccRP6lD5.s page 13
64 @ link register save eliminated.
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
641:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[6];
642:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[5];
643:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[4];
- ARM GAS /tmp/ccOwl4Y6.s page 14
+ ARM GAS /tmp/ccRP6lD5.s page 14
644:Middlewares/Third_Party/FatFs/src/ff.c **** rv = rv << 8 | ptr[3];
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
140 0000 0170 strb r1, [r0]
141 .loc 1 663 22 is_stmt 1 view .LVU35
142 .LVL13:
- ARM GAS /tmp/ccOwl4Y6.s page 15
+ ARM GAS /tmp/ccRP6lD5.s page 15
664:Middlewares/Third_Party/FatFs/src/ff.c **** *ptr++ = (BYTE)val; val >>= 8;
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
686:Middlewares/Third_Party/FatFs/src/ff.c ****
687:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
688:Middlewares/Third_Party/FatFs/src/ff.c **** /* String functions */
- ARM GAS /tmp/ccOwl4Y6.s page 16
+ ARM GAS /tmp/ccRP6lD5.s page 16
689:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
219 mem_set:
220 .LFB1188:
703:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 17
+ ARM GAS /tmp/ccRP6lD5.s page 17
704:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill memory block */
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
718:Middlewares/Third_Party/FatFs/src/ff.c **** int r = 0;
263 .loc 1 718 2 view .LVU72
264 .L12:
- ARM GAS /tmp/ccOwl4Y6.s page 18
+ ARM GAS /tmp/ccRP6lD5.s page 18
719:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
309 .loc 1 730 2 is_stmt 1 view .LVU85
310 .loc 1 730 8 is_stmt 0 view .LVU86
311 0002 00E0 b .L14
- ARM GAS /tmp/ccOwl4Y6.s page 19
+ ARM GAS /tmp/ccRP6lD5.s page 19
312 .LVL33:
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
756:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs && res != FR_NOT_ENABLED && res != FR_INVALID_DRIVE && res != FR_TIMEOUT) {
757:Middlewares/Third_Party/FatFs/src/ff.c **** ff_rel_grant(fs->sobj);
758:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 20
+ ARM GAS /tmp/ccRP6lD5.s page 20
759:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
369 000e 0133 adds r3, r3, #1
370 .LVL39:
371 .L18:
- ARM GAS /tmp/ccOwl4Y6.s page 21
+ ARM GAS /tmp/ccRP6lD5.s page 21
779:Middlewares/Third_Party/FatFs/src/ff.c **** if (Files[i].fs) { /* Existing entry */
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
410 0040 022B cmp r3, #2
411 0042 0BD0 beq .L30
789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec
- ARM GAS /tmp/ccOwl4Y6.s page 22
+ ARM GAS /tmp/ccRP6lD5.s page 22
790:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
455 .loc 1 789 35 discriminator 2 view .LVU131
456 006c 1220 movs r0, #18
457 .LVL46:
- ARM GAS /tmp/ccOwl4Y6.s page 23
+ ARM GAS /tmp/ccRP6lD5.s page 23
789:Middlewares/Third_Party/FatFs/src/ff.c **** return (be || acc == 2) ? FR_OK : FR_TOO_MANY_OPEN_FILES; /* Is there a blank entry for new objec
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
501 .LVL52:
502 .L37:
503 .loc 1 802 44 is_stmt 1 discriminator 4 view .LVU142
- ARM GAS /tmp/ccOwl4Y6.s page 24
+ ARM GAS /tmp/ccRP6lD5.s page 24
504 0004 0130 adds r0, r0, #1
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
550 0000 70B4 push {r4, r5, r6}
551 .LCFI3:
552 .cfi_def_cfa_offset 12
- ARM GAS /tmp/ccOwl4Y6.s page 25
+ ARM GAS /tmp/ccRP6lD5.s page 25
553 .cfi_offset 4, -12
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
598 0030 9442 cmp r4, r2
599 0032 E8D1 bne .L42
600 .L43:
- ARM GAS /tmp/ccOwl4Y6.s page 26
+ ARM GAS /tmp/ccRP6lD5.s page 26
820:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
636 .LVL63:
823:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < _FS_LOCK && Files[i].fs; i++) ;
637 .loc 1 823 45 is_stmt 0 discriminator 4 view .LVU180
- ARM GAS /tmp/ccOwl4Y6.s page 27
+ ARM GAS /tmp/ccRP6lD5.s page 27
638 005a F7E7 b .L45
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
680 0088 01EB0311 add r1, r1, r3, lsl #4
681 008c 8A81 strh r2, [r1, #12] @ movhi
834:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 28
+ ARM GAS /tmp/ccRP6lD5.s page 28
835:Middlewares/Third_Party/FatFs/src/ff.c **** return i + 1;
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
726 @ args = 0, pretend = 0, frame = 0
727 @ frame_needed = 0, uses_anonymous_args = 0
728 @ link register save eliminated.
- ARM GAS /tmp/ccOwl4Y6.s page 29
+ ARM GAS /tmp/ccRP6lD5.s page 29
844:Middlewares/Third_Party/FatFs/src/ff.c **** WORD n;
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
772 0026 33B9 cbnz r3, .L65
773 .L62:
774 .LVL74:
- ARM GAS /tmp/ccOwl4Y6.s page 30
+ ARM GAS /tmp/ccRP6lD5.s page 30
775 .loc 1 853 15 is_stmt 1 discriminator 1 view .LVU224
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
817 @ args = 0, pretend = 0, frame = 0
818 @ frame_needed = 0, uses_anonymous_args = 0
819 @ link register save eliminated.
- ARM GAS /tmp/ccOwl4Y6.s page 31
+ ARM GAS /tmp/ccRP6lD5.s page 31
867:Middlewares/Third_Party/FatFs/src/ff.c **** UINT i;
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
860 .loc 1 870 38 is_stmt 0 discriminator 1 view .LVU245
861 001c 1A01 lsls r2, r3, #4
862 001e 0024 movs r4, #0
- ARM GAS /tmp/ccOwl4Y6.s page 32
+ ARM GAS /tmp/ccRP6lD5.s page 32
863 0020 8C50 str r4, [r1, r2]
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
884:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs /* File system object */
885:Middlewares/Third_Party/FatFs/src/ff.c **** )
886:Middlewares/Third_Party/FatFs/src/ff.c **** {
- ARM GAS /tmp/ccOwl4Y6.s page 33
+ ARM GAS /tmp/ccRP6lD5.s page 33
887:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect;
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
941:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
942:Middlewares/Third_Party/FatFs/src/ff.c ****
943:Middlewares/Third_Party/FatFs/src/ff.c **** static
- ARM GAS /tmp/ccOwl4Y6.s page 34
+ ARM GAS /tmp/ccRP6lD5.s page 34
944:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT sync_fs ( /* FR_OK:succeeded, !=0:error */
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
989:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst >= fs->n_fatent - 2) return 0; /* Invalid cluster# */
911 .loc 1 989 2 is_stmt 1 view .LVU255
912 .loc 1 989 16 is_stmt 0 view .LVU256
- ARM GAS /tmp/ccOwl4Y6.s page 35
+ ARM GAS /tmp/ccRP6lD5.s page 35
913 0002 8369 ldr r3, [r0, #24]
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1011:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst < 2 || clst >= fs->n_fatent) { /* Check if in valid range */
1012:Middlewares/Third_Party/FatFs/src/ff.c **** val = 1; /* Internal error */
1013:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 36
+ ARM GAS /tmp/ccRP6lD5.s page 36
1014:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1068:Middlewares/Third_Party/FatFs/src/ff.c ****
1069:Middlewares/Third_Party/FatFs/src/ff.c **** return val;
1070:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 37
+ ARM GAS /tmp/ccRP6lD5.s page 37
1071:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1125:Middlewares/Third_Party/FatFs/src/ff.c **** break;
1126:Middlewares/Third_Party/FatFs/src/ff.c **** }
1127:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 38
+ ARM GAS /tmp/ccRP6lD5.s page 38
1128:Middlewares/Third_Party/FatFs/src/ff.c **** return res;
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1182:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/
1183:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set/Clear a block of allocation bitmap */
1184:Middlewares/Third_Party/FatFs/src/ff.c **** /*----------------------------------------*/
- ARM GAS /tmp/ccOwl4Y6.s page 39
+ ARM GAS /tmp/ccRP6lD5.s page 39
1185:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1239:Middlewares/Third_Party/FatFs/src/ff.c ****
1240:Middlewares/Third_Party/FatFs/src/ff.c ****
1241:Middlewares/Third_Party/FatFs/src/ff.c **** /*---------------------------------------------*/
- ARM GAS /tmp/ccOwl4Y6.s page 40
+ ARM GAS /tmp/ccRP6lD5.s page 40
1242:Middlewares/Third_Party/FatFs/src/ff.c **** /* Fill the last fragment of the FAT chain */
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1296:Middlewares/Third_Party/FatFs/src/ff.c **** do {
1297:Middlewares/Third_Party/FatFs/src/ff.c **** nxt = get_fat(obj, clst); /* Get cluster status */
1298:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 0) break; /* Empty cluster? */
- ARM GAS /tmp/ccOwl4Y6.s page 41
+ ARM GAS /tmp/ccRP6lD5.s page 41
1299:Middlewares/Third_Party/FatFs/src/ff.c **** if (nxt == 1) return FR_INT_ERR; /* Internal error? */
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1353:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD clst /* Cluster# to stretch, 0:Create a new chain */
1354:Middlewares/Third_Party/FatFs/src/ff.c **** )
1355:Middlewares/Third_Party/FatFs/src/ff.c **** {
- ARM GAS /tmp/ccOwl4Y6.s page 42
+ ARM GAS /tmp/ccRP6lD5.s page 42
1356:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD cs, ncl, scl;
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1410:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */
1411:Middlewares/Third_Party/FatFs/src/ff.c **** }
1412:Middlewares/Third_Party/FatFs/src/ff.c **** res = put_fat(fs, ncl, 0xFFFFFFFF); /* Mark the new cluster 'EOC' */
- ARM GAS /tmp/ccOwl4Y6.s page 43
+ ARM GAS /tmp/ccRP6lD5.s page 43
1413:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) {
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
963 .loc 1 1450 2 is_stmt 1 view .LVU272
964 .loc 1 1450 21 is_stmt 0 view .LVU273
965 0006 9089 ldrh r0, [r2, #12]
- ARM GAS /tmp/ccOwl4Y6.s page 44
+ ARM GAS /tmp/ccRP6lD5.s page 44
966 .LVL92:
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1005 .LVL100:
1006 .loc 1 1457 12 view .LVU292
1007 0022 0844 add r0, r0, r1
- ARM GAS /tmp/ccOwl4Y6.s page 45
+ ARM GAS /tmp/ccRP6lD5.s page 45
1008 .L86:
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1499:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz;
1500:Middlewares/Third_Party/FatFs/src/ff.c **** }
1501:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = clust2sect(fs, clst);
- ARM GAS /tmp/ccOwl4Y6.s page 46
+ ARM GAS /tmp/ccRP6lD5.s page 46
1502:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1556:Middlewares/Third_Party/FatFs/src/ff.c **** if (_FS_EXFAT) dp->obj.stat |= 4; /* The directory needs to be updated */
1557:Middlewares/Third_Party/FatFs/src/ff.c **** if (sync_window(fs) != FR_OK) return FR_DISK_ERR; /* Flush disk access window */
1558:Middlewares/Third_Party/FatFs/src/ff.c **** mem_set(fs->win, 0, SS(fs)); /* Clear window buffer */
- ARM GAS /tmp/ccOwl4Y6.s page 47
+ ARM GAS /tmp/ccRP6lD5.s page 47
1559:Middlewares/Third_Party/FatFs/src/ff.c **** for (n = 0, fs->winsect = clust2sect(fs, clst); n < fs->csize; n++, fs->winsect++) { /* Fill t
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1613:Middlewares/Third_Party/FatFs/src/ff.c **** }
1614:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_next(dp, 1);
1615:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK); /* Next entry with table stretch enabled */
- ARM GAS /tmp/ccOwl4Y6.s page 48
+ ARM GAS /tmp/ccRP6lD5.s page 48
1616:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1052 .L91:
1641:Middlewares/Third_Party/FatFs/src/ff.c **** cl |= (DWORD)ld_word(dir + DIR_FstClusHI) << 16;
1642:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 49
+ ARM GAS /tmp/ccRP6lD5.s page 49
1643:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1090 .LCFI11:
1091 .cfi_def_cfa_offset 16
1092 .cfi_offset 4, -16
- ARM GAS /tmp/ccOwl4Y6.s page 50
+ ARM GAS /tmp/ccRP6lD5.s page 50
1093 .cfi_offset 5, -12
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1666:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/
1667:Middlewares/Third_Party/FatFs/src/ff.c **** /* FAT-LFN: LFN handling */
1668:Middlewares/Third_Party/FatFs/src/ff.c **** /*------------------------------------------------------------------------*/
- ARM GAS /tmp/ccOwl4Y6.s page 51
+ ARM GAS /tmp/ccRP6lD5.s page 51
1669:Middlewares/Third_Party/FatFs/src/ff.c **** static
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1723:Middlewares/Third_Party/FatFs/src/ff.c ****
1724:Middlewares/Third_Party/FatFs/src/ff.c **** i = ((dir[LDIR_Ord] & ~LLEF) - 1) * 13; /* Offset in the LFN buffer */
1725:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 52
+ ARM GAS /tmp/ccRP6lD5.s page 52
1726:Middlewares/Third_Party/FatFs/src/ff.c **** for (wc = 1, s = 0; s < 13; s++) { /* Process all characters in the entry */
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1780:Middlewares/Third_Party/FatFs/src/ff.c ****
1781:Middlewares/Third_Party/FatFs/src/ff.c ****
1782:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 53
+ ARM GAS /tmp/ccRP6lD5.s page 53
1783:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 && !_FS_READONLY
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1837:Middlewares/Third_Party/FatFs/src/ff.c **** }
1838:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_LFN != 0 && !_FS_READONLY */
1839:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 54
+ ARM GAS /tmp/ccRP6lD5.s page 54
1840:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1894:Middlewares/Third_Party/FatFs/src/ff.c **** const WCHAR* name /* File name to be calculated */
1895:Middlewares/Third_Party/FatFs/src/ff.c **** )
1896:Middlewares/Third_Party/FatFs/src/ff.c **** {
- ARM GAS /tmp/ccOwl4Y6.s page 55
+ ARM GAS /tmp/ccRP6lD5.s page 55
1897:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR chr;
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1951:Middlewares/Third_Party/FatFs/src/ff.c **** if ((si % SZDIRE) == 0) si += 2; /* Skip entry type field */
1952:Middlewares/Third_Party/FatFs/src/ff.c **** w = ff_convert(ld_word(dirb + si), 0); /* Get a character and Unicode -> OEM */
1953:Middlewares/Third_Party/FatFs/src/ff.c **** if (_DF1S && w >= 0x100) { /* Is it a double byte char? (always false at SBCS cfg) */
- ARM GAS /tmp/ccOwl4Y6.s page 56
+ ARM GAS /tmp/ccRP6lD5.s page 56
1954:Middlewares/Third_Party/FatFs/src/ff.c **** fno->fname[di++] = (char)(w >> 8); /* Put 1st byte of the DBC */
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2008:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res;
2009:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(dp->obj.fs, dp->sect);
2010:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) return res;
- ARM GAS /tmp/ccOwl4Y6.s page 57
+ ARM GAS /tmp/ccRP6lD5.s page 57
2011:Middlewares/Third_Party/FatFs/src/ff.c **** if (dp->dir[XDIR_Type] != 0xC1) return FR_INT_ERR;
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2065:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(dirb + XDIR_SetSum, xdir_sum(dirb));
2066:Middlewares/Third_Party/FatFs/src/ff.c **** nent = dirb[XDIR_NumSec] + 1;
2067:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 58
+ ARM GAS /tmp/ccRP6lD5.s page 58
2068:Middlewares/Third_Party/FatFs/src/ff.c **** /* Store the set of directory to the volume */
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2122:Middlewares/Third_Party/FatFs/src/ff.c ****
2123:Middlewares/Third_Party/FatFs/src/ff.c ****
2124:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 59
+ ARM GAS /tmp/ccRP6lD5.s page 59
2125:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 1 || _FS_RPATH >= 2 || _USE_LABEL || _FS_EXFAT
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2179:Middlewares/Third_Party/FatFs/src/ff.c **** ord = (c == ord && sum == dp->dir[LDIR_Chksum] && pick_lfn(fs->lfnbuf, dp->dir)) ? ord - 1 : 0
2180:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* An SFN entry is found */
2181:Middlewares/Third_Party/FatFs/src/ff.c **** if (ord || sum != sum_sfn(dp->dir)) { /* Is there a valid LFN? */
- ARM GAS /tmp/ccOwl4Y6.s page 60
+ ARM GAS /tmp/ccRP6lD5.s page 60
2182:Middlewares/Third_Party/FatFs/src/ff.c **** dp->blk_ofs = 0xFFFFFFFF; /* It has no LFN. */
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2236:Middlewares/Third_Party/FatFs/src/ff.c **** if (ff_wtoupper(ld_word(fs->dirbuf + di)) != ff_wtoupper(fs->lfnbuf[ni])) break;
2237:Middlewares/Third_Party/FatFs/src/ff.c **** }
2238:Middlewares/Third_Party/FatFs/src/ff.c **** if (nc == 0 && !fs->lfnbuf[ni]) break; /* Name matched? */
- ARM GAS /tmp/ccOwl4Y6.s page 61
+ ARM GAS /tmp/ccRP6lD5.s page 61
2239:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2293:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp /* Target directory with object name to be created */
2294:Middlewares/Third_Party/FatFs/src/ff.c **** )
2295:Middlewares/Third_Party/FatFs/src/ff.c **** {
- ARM GAS /tmp/ccOwl4Y6.s page 62
+ ARM GAS /tmp/ccRP6lD5.s page 62
2296:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT res;
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2350:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_alloc(dp, nent); /* Allocate entries */
2351:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && --nent) { /* Set LFN entry if needed */
2352:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(dp, dp->dptr - nent * SZDIRE);
- ARM GAS /tmp/ccOwl4Y6.s page 63
+ ARM GAS /tmp/ccRP6lD5.s page 63
2353:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2407:Middlewares/Third_Party/FatFs/src/ff.c **** do {
2408:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect);
2409:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
- ARM GAS /tmp/ccOwl4Y6.s page 64
+ ARM GAS /tmp/ccRP6lD5.s page 64
2410:Middlewares/Third_Party/FatFs/src/ff.c **** /* Mark an entry 'deleted' */
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1151 .loc 1 2450 2 view .LVU325
2451:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm;
1152 .loc 1 2451 2 view .LVU326
- ARM GAS /tmp/ccOwl4Y6.s page 65
+ ARM GAS /tmp/ccRP6lD5.s page 65
2452:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2495:Middlewares/Third_Party/FatFs/src/ff.c **** }
2496:Middlewares/Third_Party/FatFs/src/ff.c **** #if _LFN_UNICODE
2497:Middlewares/Third_Party/FatFs/src/ff.c **** if (IsDBCS1(c) && i != 8 && i != 11 && IsDBCS2(dp->dir[i])) {
- ARM GAS /tmp/ccOwl4Y6.s page 66
+ ARM GAS /tmp/ccRP6lD5.s page 66
2498:Middlewares/Third_Party/FatFs/src/ff.c **** c = c << 8 | dp->dir[i++];
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1189 .loc 1 2520 11 is_stmt 1 view .LVU340
1190 0022 0A2B cmp r3, #10
1191 0024 0ED8 bhi .L109
- ARM GAS /tmp/ccOwl4Y6.s page 67
+ ARM GAS /tmp/ccRP6lD5.s page 67
2521:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == ' ') continue; /* Skip padding spaces */
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1231 .loc 1 2527 16 view .LVU356
1232 0046 0023 movs r3, #0
1233 .LVL127:
- ARM GAS /tmp/ccOwl4Y6.s page 68
+ ARM GAS /tmp/ccRP6lD5.s page 68
1234 .loc 1 2527 16 view .LVU357
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1279 .align 1
1280 .syntax unified
1281 .thumb
- ARM GAS /tmp/ccOwl4Y6.s page 69
+ ARM GAS /tmp/ccRP6lD5.s page 69
1282 .thumb_func
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2585:Middlewares/Third_Party/FatFs/src/ff.c **** if (!*pat && inf) return 1; /* (short circuit) */
2586:Middlewares/Third_Party/FatFs/src/ff.c ****
2587:Middlewares/Third_Party/FatFs/src/ff.c **** do {
- ARM GAS /tmp/ccOwl4Y6.s page 70
+ ARM GAS /tmp/ccRP6lD5.s page 70
2588:Middlewares/Third_Party/FatFs/src/ff.c **** pp = pat; np = nam; /* Top of pattern and name to match */
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1306 0006 8A46 mov r10, r1
2623:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN != 0 /* LFN configuration */
2624:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE b, cf;
- ARM GAS /tmp/ccOwl4Y6.s page 71
+ ARM GAS /tmp/ccRP6lD5.s page 71
2625:Middlewares/Third_Party/FatFs/src/ff.c **** WCHAR w, *lfn;
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2679:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) {
2680:Middlewares/Third_Party/FatFs/src/ff.c **** w = lfn[si++]; /* Get an LFN character */
2681:Middlewares/Third_Party/FatFs/src/ff.c **** if (!w) break; /* Break on end of the LFN */
- ARM GAS /tmp/ccOwl4Y6.s page 72
+ ARM GAS /tmp/ccRP6lD5.s page 72
2682:Middlewares/Third_Party/FatFs/src/ff.c **** if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2736:Middlewares/Third_Party/FatFs/src/ff.c **** dp->fn[NSFLAG] = cf; /* SFN is created */
2737:Middlewares/Third_Party/FatFs/src/ff.c ****
2738:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK;
- ARM GAS /tmp/ccOwl4Y6.s page 73
+ ARM GAS /tmp/ccRP6lD5.s page 73
2739:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2761:Middlewares/Third_Party/FatFs/src/ff.c **** }
2762:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
2763:Middlewares/Third_Party/FatFs/src/ff.c **** for (;;) {
- ARM GAS /tmp/ccOwl4Y6.s page 74
+ ARM GAS /tmp/ccRP6lD5.s page 74
2764:Middlewares/Third_Party/FatFs/src/ff.c **** c = (BYTE)p[si++];
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1360 .loc 1 2796 2 is_stmt 1 view .LVU400
1361 .loc 1 2796 5 is_stmt 0 view .LVU401
1362 0036 002D cmp r5, #0
- ARM GAS /tmp/ccOwl4Y6.s page 75
+ ARM GAS /tmp/ccRP6lD5.s page 75
1363 0038 44D0 beq .L125
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2791:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[i++] = c;
1404 .loc 1 2791 7 view .LVU419
1405 0066 192B cmp r3, #25
- ARM GAS /tmp/ccOwl4Y6.s page 76
+ ARM GAS /tmp/ccRP6lD5.s page 76
1406 0068 01D8 bhi .L120
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1444 .loc 1 2770 3 is_stmt 1 view .LVU435
2770:Middlewares/Third_Party/FatFs/src/ff.c **** if (ni == 11 || c != '.') return FR_INVALID_NAME; /* Over size or invalid dot */
1445 .loc 1 2770 6 is_stmt 0 view .LVU436
- ARM GAS /tmp/ccOwl4Y6.s page 77
+ ARM GAS /tmp/ccRP6lD5.s page 77
1446 0088 2E2C cmp r4, #46
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2798:Middlewares/Third_Party/FatFs/src/ff.c **** sfn[NSFLAG] = (c <= ' ') ? NS_LAST : 0; /* Set last segment flag if end of the path */
1487 .loc 1 2798 29 is_stmt 0 discriminator 1 view .LVU450
1488 00ae 0523 movs r3, #5
- ARM GAS /tmp/ccOwl4Y6.s page 78
+ ARM GAS /tmp/ccRP6lD5.s page 78
1489 00b0 89F82430 strb r3, [r9, #36]
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2813:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */
2814:Middlewares/Third_Party/FatFs/src/ff.c **** DIR* dp, /* Directory object to return last directory and found object */
2815:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path /* Full-path string to find a file or directory */
- ARM GAS /tmp/ccOwl4Y6.s page 79
+ ARM GAS /tmp/ccRP6lD5.s page 79
2816:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2870:Middlewares/Third_Party/FatFs/src/ff.c **** break;
2871:Middlewares/Third_Party/FatFs/src/ff.c **** }
2872:Middlewares/Third_Party/FatFs/src/ff.c **** if (ns & NS_LAST) break; /* Last segment matched. Function completed. */
- ARM GAS /tmp/ccOwl4Y6.s page 80
+ ARM GAS /tmp/ccRP6lD5.s page 80
2873:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get into the sub-directory */
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2916:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
2917:Middlewares/Third_Party/FatFs/src/ff.c ****
2918:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 81
+ ARM GAS /tmp/ccRP6lD5.s page 81
2919:Middlewares/Third_Party/FatFs/src/ff.c **** if (*path) { /* If the pointer is not a null */
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2940:Middlewares/Third_Party/FatFs/src/ff.c **** if (i < _VOLUMES) { /* If a drive id is found, get the value and strip it */
2941:Middlewares/Third_Party/FatFs/src/ff.c **** vol = (int)i;
2942:Middlewares/Third_Party/FatFs/src/ff.c **** *path = tt;
- ARM GAS /tmp/ccOwl4Y6.s page 82
+ ARM GAS /tmp/ccRP6lD5.s page 82
2943:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2927:Middlewares/Third_Party/FatFs/src/ff.c **** }
1603 .loc 1 2927 12 is_stmt 0 view .LVU485
1604 0036 0132 adds r2, r2, #1
- ARM GAS /tmp/ccOwl4Y6.s page 83
+ ARM GAS /tmp/ccRP6lD5.s page 83
1605 .LVL172:
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2975:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->win[BS_JmpBoot] == 0xE9 || (fs->win[BS_JmpBoot] == 0xEB && fs->win[BS_JmpBoot + 2] == 0x90
2976:Middlewares/Third_Party/FatFs/src/ff.c **** if ((ld_dword(fs->win + BS_FilSysType) & 0xFFFFFF) == 0x544146) return 0; /* Check "FAT" string *
2977:Middlewares/Third_Party/FatFs/src/ff.c **** if (ld_dword(fs->win + BS_FilSysType32) == 0x33544146) return 0; /* Check "FAT3" string */
- ARM GAS /tmp/ccOwl4Y6.s page 84
+ ARM GAS /tmp/ccRP6lD5.s page 84
2978:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3032:Middlewares/Third_Party/FatFs/src/ff.c **** /* Following code attempts to mount the volume. (analyze BPB and initialize the fs object) */
3033:Middlewares/Third_Party/FatFs/src/ff.c ****
3034:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fs_type = 0; /* Clear the file system object */
- ARM GAS /tmp/ccOwl4Y6.s page 85
+ ARM GAS /tmp/ccRP6lD5.s page 85
3035:Middlewares/Third_Party/FatFs/src/ff.c **** fs->drv = LD2PD(vol); /* Bind the logical drive and a physical drive */
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3089:Middlewares/Third_Party/FatFs/src/ff.c **** fs->csize = 1 << fs->win[BPB_SecPerClusEx]; /* Cluster size */
3090:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->csize == 0) return FR_NO_FILESYSTEM; /* (Must be 1..32768) */
3091:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 86
+ ARM GAS /tmp/ccRP6lD5.s page 86
3092:Middlewares/Third_Party/FatFs/src/ff.c **** nclst = ld_dword(fs->win + BPB_NumClusEx); /* Number of clusters */
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3146:Middlewares/Third_Party/FatFs/src/ff.c ****
3147:Middlewares/Third_Party/FatFs/src/ff.c **** /* Boundaries and Limits */
3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->n_fatent = nclst + 2; /* Number of FAT entries */
- ARM GAS /tmp/ccOwl4Y6.s page 87
+ ARM GAS /tmp/ccRP6lD5.s page 87
3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3203:Middlewares/Third_Party/FatFs/src/ff.c **** clear_lock(fs);
3204:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
3205:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_OK;
- ARM GAS /tmp/ccOwl4Y6.s page 88
+ ARM GAS /tmp/ccRP6lD5.s page 88
3206:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3260:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_mount (
3261:Middlewares/Third_Party/FatFs/src/ff.c **** FATFS* fs, /* Pointer to the file system object (NULL:unmount)*/
3262:Middlewares/Third_Party/FatFs/src/ff.c **** const TCHAR* path, /* Logical drive number to be mounted/unmounted */
- ARM GAS /tmp/ccOwl4Y6.s page 89
+ ARM GAS /tmp/ccRP6lD5.s page 89
3263:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Mode option 0:Do not mount (delayed mount), 1:Mount immediately */
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3317:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
3318:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dw, cl, bcs, clst, sc;
3319:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs;
- ARM GAS /tmp/ccOwl4Y6.s page 90
+ ARM GAS /tmp/ccRP6lD5.s page 90
3320:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3374:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_CrtTime, dw); /* Set created time */
3375:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_CrtTime10] = 0;
3376:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_ModTime, dw); /* Set modified time */
- ARM GAS /tmp/ccOwl4Y6.s page 91
+ ARM GAS /tmp/ccRP6lD5.s page 91
3377:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_ModTime10] = 0;
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3431:Middlewares/Third_Party/FatFs/src/ff.c **** }
3432:Middlewares/Third_Party/FatFs/src/ff.c **** #else /* R/O configuration */
3433:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
- ARM GAS /tmp/ccOwl4Y6.s page 92
+ ARM GAS /tmp/ccRP6lD5.s page 92
3434:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.fn[NSFLAG] & NS_NONAME) { /* Origin directory itself? */
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3488:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_read(fs->drv, fp->buf, fp->sect, 1) != RES_OK) res = FR_DISK_ERR;
3489:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
3490:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 93
+ ARM GAS /tmp/ccRP6lD5.s page 93
3491:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3545:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
3546:Middlewares/Third_Party/FatFs/src/ff.c **** {
3547:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, fp->clust); /* Follow cluster chain on the FAT */
- ARM GAS /tmp/ccOwl4Y6.s page 94
+ ARM GAS /tmp/ccRP6lD5.s page 94
3548:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3602:Middlewares/Third_Party/FatFs/src/ff.c ****
3603:Middlewares/Third_Party/FatFs/src/ff.c ****
3604:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 95
+ ARM GAS /tmp/ccRP6lD5.s page 95
3605:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3659:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->obj.sclust == 0) fp->obj.sclust = clst; /* Set start cluster if the first write */
3660:Middlewares/Third_Party/FatFs/src/ff.c **** }
3661:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_TINY
- ARM GAS /tmp/ccOwl4Y6.s page 96
+ ARM GAS /tmp/ccRP6lD5.s page 96
3662:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->winsect == fp->sect && sync_window(fs) != FR_OK) ABORT(fs, FR_DISK_ERR); /* Write-back s
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3716:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_DIRTY;
3717:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
3718:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 97
+ ARM GAS /tmp/ccRP6lD5.s page 97
3719:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3773:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(fs->dirbuf + XDIR_AccTime, 0);
3774:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj); /* Restore it to the directory */
3775:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
- ARM GAS /tmp/ccOwl4Y6.s page 98
+ ARM GAS /tmp/ccRP6lD5.s page 98
3776:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs);
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3830:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
3831:Middlewares/Third_Party/FatFs/src/ff.c **** {
3832:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.fs = 0; /* Invalidate file object */
- ARM GAS /tmp/ccOwl4Y6.s page 99
+ ARM GAS /tmp/ccRP6lD5.s page 99
3833:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3887:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT
3888:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) {
3889:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_scl = dj.obj.c_scl;
- ARM GAS /tmp/ccOwl4Y6.s page 100
+ ARM GAS /tmp/ccRP6lD5.s page 100
3890:Middlewares/Third_Party/FatFs/src/ff.c **** fs->cdc_size = dj.obj.c_size;
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3944:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = fs->cdir; /* Start to follow upper directory from current directory */
3945:Middlewares/Third_Party/FatFs/src/ff.c **** while ((ccl = dj.obj.sclust) != 0) { /* Repeat while current directory is a sub-directory */
3946:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_sdi(&dj, 1 * SZDIRE); /* Get parent directory */
- ARM GAS /tmp/ccOwl4Y6.s page 101
+ ARM GAS /tmp/ccRP6lD5.s page 101
3947:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4001:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_lseek (
4002:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */
4003:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t ofs /* File pointer from top of file */
- ARM GAS /tmp/ccOwl4Y6.s page 102
+ ARM GAS /tmp/ccRP6lD5.s page 102
4004:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4058:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */
4059:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
4060:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
- ARM GAS /tmp/ccOwl4Y6.s page 103
+ ARM GAS /tmp/ccRP6lD5.s page 103
4061:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->flag & FA_DIRTY) { /* Write-back dirty sector cache */
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4115:Middlewares/Third_Party/FatFs/src/ff.c **** ofs = 0; break;
4116:Middlewares/Third_Party/FatFs/src/ff.c **** }
4117:Middlewares/Third_Party/FatFs/src/ff.c **** } else
- ARM GAS /tmp/ccOwl4Y6.s page 104
+ ARM GAS /tmp/ccRP6lD5.s page 104
4118:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4172:Middlewares/Third_Party/FatFs/src/ff.c ****
4173:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dp) return FR_INVALID_OBJECT;
4174:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 105
+ ARM GAS /tmp/ccRP6lD5.s page 105
4175:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4229:Middlewares/Third_Party/FatFs/src/ff.c **** /* Close Directory */
4230:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
4231:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 106
+ ARM GAS /tmp/ccRP6lD5.s page 106
4232:Middlewares/Third_Party/FatFs/src/ff.c **** FRESULT f_closedir (
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4286:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_NO_FILE) res = FR_OK; /* Ignore end of directory now */
4287:Middlewares/Third_Party/FatFs/src/ff.c **** }
4288:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF();
- ARM GAS /tmp/ccOwl4Y6.s page 107
+ ARM GAS /tmp/ccRP6lD5.s page 107
4289:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4343:Middlewares/Third_Party/FatFs/src/ff.c ****
4344:Middlewares/Third_Party/FatFs/src/ff.c **** #endif /* _USE_FIND */
4345:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 108
+ ARM GAS /tmp/ccRP6lD5.s page 108
4346:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4400:Middlewares/Third_Party/FatFs/src/ff.c ****
4401:Middlewares/Third_Party/FatFs/src/ff.c ****
4402:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get logical drive */
- ARM GAS /tmp/ccOwl4Y6.s page 109
+ ARM GAS /tmp/ccRP6lD5.s page 109
4403:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&path, &fs, 0);
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4457:Middlewares/Third_Party/FatFs/src/ff.c **** }
4458:Middlewares/Third_Party/FatFs/src/ff.c **** }
4459:Middlewares/Third_Party/FatFs/src/ff.c **** *nclst = nfree; /* Return the free clusters */
- ARM GAS /tmp/ccOwl4Y6.s page 110
+ ARM GAS /tmp/ccRP6lD5.s page 110
4460:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst = nfree; /* Now free_clst is valid */
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4514:Middlewares/Third_Party/FatFs/src/ff.c ****
4515:Middlewares/Third_Party/FatFs/src/ff.c **** LEAVE_FF(fs, res);
4516:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 111
+ ARM GAS /tmp/ccRP6lD5.s page 111
4517:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4571:Middlewares/Third_Party/FatFs/src/ff.c **** if (dj.obj.attr & AM_DIR) { /* Is it a sub-directory? */
4572:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_RPATH != 0
4573:Middlewares/Third_Party/FatFs/src/ff.c **** if (dclst == fs->cdir) { /* Is it the current directory? */
- ARM GAS /tmp/ccOwl4Y6.s page 112
+ ARM GAS /tmp/ccRP6lD5.s page 112
4574:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED;
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4628:Middlewares/Third_Party/FatFs/src/ff.c **** UINT n;
4629:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD dsc, dcl, pcl, tm;
4630:Middlewares/Third_Party/FatFs/src/ff.c **** DEF_NAMBUF
- ARM GAS /tmp/ccOwl4Y6.s page 113
+ ARM GAS /tmp/ccRP6lD5.s page 113
4631:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4685:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_GenFlags] = 3; /* Initialize the object flag (contiguous) */
4686:Middlewares/Third_Party/FatFs/src/ff.c **** fs->dirbuf[XDIR_Attr] = AM_DIR; /* Attribute */
4687:Middlewares/Third_Party/FatFs/src/ff.c **** res = store_xdir(&dj);
- ARM GAS /tmp/ccOwl4Y6.s page 114
+ ARM GAS /tmp/ccRP6lD5.s page 114
4688:Middlewares/Third_Party/FatFs/src/ff.c **** } else
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4742:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) { /* Object to be renamed is found */
4743:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_EXFAT
4744:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type == FS_EXFAT) { /* At exFAT */
- ARM GAS /tmp/ccOwl4Y6.s page 115
+ ARM GAS /tmp/ccRP6lD5.s page 115
4745:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE nf, nn;
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4799:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
4800:Middlewares/Third_Party/FatFs/src/ff.c **** res = dir_remove(&djo); /* Remove old entry */
4801:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
- ARM GAS /tmp/ccOwl4Y6.s page 116
+ ARM GAS /tmp/ccRP6lD5.s page 116
4802:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs);
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4856:Middlewares/Third_Party/FatFs/src/ff.c **** res = sync_fs(fs);
4857:Middlewares/Third_Party/FatFs/src/ff.c **** }
4858:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 117
+ ARM GAS /tmp/ccRP6lD5.s page 117
4859:Middlewares/Third_Party/FatFs/src/ff.c **** FREE_NAMBUF();
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4913:Middlewares/Third_Party/FatFs/src/ff.c ****
4914:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LABEL
4915:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
- ARM GAS /tmp/ccOwl4Y6.s page 118
+ ARM GAS /tmp/ccRP6lD5.s page 118
4916:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get Volume Label */
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4970:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
4971:Middlewares/Third_Party/FatFs/src/ff.c **** } while (di < 11);
4972:Middlewares/Third_Party/FatFs/src/ff.c **** do { /* Truncate trailing spaces */
- ARM GAS /tmp/ccOwl4Y6.s page 119
+ ARM GAS /tmp/ccRP6lD5.s page 119
4973:Middlewares/Third_Party/FatFs/src/ff.c **** label[di] = 0;
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5027:Middlewares/Third_Party/FatFs/src/ff.c **** res = find_volume(&label, &fs, FA_WRITE);
5028:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) LEAVE_FF(fs, res);
5029:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.fs = fs;
- ARM GAS /tmp/ccOwl4Y6.s page 120
+ ARM GAS /tmp/ccRP6lD5.s page 120
5030:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5084:Middlewares/Third_Party/FatFs/src/ff.c **** }
5085:Middlewares/Third_Party/FatFs/src/ff.c ****
5086:Middlewares/Third_Party/FatFs/src/ff.c **** /* Set volume label */
- ARM GAS /tmp/ccOwl4Y6.s page 121
+ ARM GAS /tmp/ccRP6lD5.s page 121
5087:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.sclust = 0; /* Open root directory */
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5141:Middlewares/Third_Party/FatFs/src/ff.c **** FIL* fp, /* Pointer to the file object */
5142:Middlewares/Third_Party/FatFs/src/ff.c **** FSIZE_t fsz, /* File size to be expanded to */
5143:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE opt /* Operation mode 0:Find and prepare or 1:Find and allocate */
- ARM GAS /tmp/ccOwl4Y6.s page 122
+ ARM GAS /tmp/ccRP6lD5.s page 122
5144:Middlewares/Third_Party/FatFs/src/ff.c **** )
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5198:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Set it as suggested point for next allocation */
5199:Middlewares/Third_Party/FatFs/src/ff.c **** lclst = scl - 1;
5200:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 123
+ ARM GAS /tmp/ccRP6lD5.s page 123
5201:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5255:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs) & (fs->csize - 1)); /* Sector offset in the cluster */
5256:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
5257:Middlewares/Third_Party/FatFs/src/ff.c **** if (csect == 0) { /* On the cluster boundary? */
- ARM GAS /tmp/ccOwl4Y6.s page 124
+ ARM GAS /tmp/ccRP6lD5.s page 124
5258:Middlewares/Third_Party/FatFs/src/ff.c **** clst = (fp->fptr == 0) ? /* On the top of the file? */
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5312:Middlewares/Third_Party/FatFs/src/ff.c **** static const WORD cst32[] = {1, 2, 4, 8, 16, 32, 0}; /* Cluster size boundary for FAT32 volume (12
5313:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE fmt, sys, *buf, *pte, pdrv, part;
5314:Middlewares/Third_Party/FatFs/src/ff.c **** WORD ss;
- ARM GAS /tmp/ccOwl4Y6.s page 125
+ ARM GAS /tmp/ccRP6lD5.s page 125
5315:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD szb_buf, sz_buf, sz_blk, n_clst, pau, sect, nsect, n;
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5369:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 128) return FR_MKFS_ABORTED; /* Check if volume size is >=128s */
5370:Middlewares/Third_Party/FatFs/src/ff.c ****
5371:Middlewares/Third_Party/FatFs/src/ff.c **** /* Pre-determine the FAT type */
- ARM GAS /tmp/ccOwl4Y6.s page 126
+ ARM GAS /tmp/ccRP6lD5.s page 126
5372:Middlewares/Third_Party/FatFs/src/ff.c **** do {
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5426:Middlewares/Third_Party/FatFs/src/ff.c **** si++; break; /* Store the up-case char if exist */
5427:Middlewares/Third_Party/FatFs/src/ff.c **** }
5428:Middlewares/Third_Party/FatFs/src/ff.c **** for (j = 1; (WCHAR)(si + j) && (WCHAR)(si + j) == ff_wtoupper((WCHAR)(si + j)); j++) ; /* Get r
- ARM GAS /tmp/ccOwl4Y6.s page 127
+ ARM GAS /tmp/ccRP6lD5.s page 127
5429:Middlewares/Third_Party/FatFs/src/ff.c **** if (j >= 128) {
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5483:Middlewares/Third_Party/FatFs/src/ff.c **** n = (nsect > sz_buf) ? sz_buf : nsect; /* Write the buffered data */
5484:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect, n) != RES_OK) return FR_DISK_ERR;
5485:Middlewares/Third_Party/FatFs/src/ff.c **** sect += n; nsect -= n;
- ARM GAS /tmp/ccOwl4Y6.s page 128
+ ARM GAS /tmp/ccRP6lD5.s page 128
5486:Middlewares/Third_Party/FatFs/src/ff.c **** } while (nsect);
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5540:Middlewares/Third_Party/FatFs/src/ff.c **** for ( ; j < 11; j++) {
5541:Middlewares/Third_Party/FatFs/src/ff.c **** for (i = 0; i < ss; sum = xsum32(buf[i++], sum)) ; /* VBR checksum */
5542:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_write(pdrv, buf, sect++, 1) != RES_OK) return FR_DISK_ERR;
- ARM GAS /tmp/ccOwl4Y6.s page 129
+ ARM GAS /tmp/ccRP6lD5.s page 129
5543:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5597:Middlewares/Third_Party/FatFs/src/ff.c **** if (!au && (au = pau / 2) != 0) continue; /* Adjust cluster size and retry */
5598:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED;
5599:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 130
+ ARM GAS /tmp/ccRP6lD5.s page 130
5600:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(buf + BS_VolID, GET_FATTIME()); /* VSN */
5655:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */
5656:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_DrvNum] = 0x80; /* Drive number (for int13) */
- ARM GAS /tmp/ccOwl4Y6.s page 131
+ ARM GAS /tmp/ccRP6lD5.s page 131
5657:Middlewares/Third_Party/FatFs/src/ff.c **** buf[BS_BootSig] = 0x29; /* Extended boot signature */
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5711:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
5712:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol >= 0x10000) {
5713:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x06; /* FAT12/16 (>=64KS) */
- ARM GAS /tmp/ccOwl4Y6.s page 132
+ ARM GAS /tmp/ccRP6lD5.s page 132
5714:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5768:Middlewares/Third_Party/FatFs/src/ff.c ****
5769:Middlewares/Third_Party/FatFs/src/ff.c ****
5770:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(pdrv);
- ARM GAS /tmp/ccOwl4Y6.s page 133
+ ARM GAS /tmp/ccRP6lD5.s page 133
5771:Middlewares/Third_Party/FatFs/src/ff.c **** if (stat & STA_NOINIT) return FR_NOT_READY;
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5825:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_STRFUNC
5826:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
5827:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get a string from the file */
- ARM GAS /tmp/ccOwl4Y6.s page 134
+ ARM GAS /tmp/ccRP6lD5.s page 134
5828:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5882:Middlewares/Third_Party/FatFs/src/ff.c **** }
5883:Middlewares/Third_Party/FatFs/src/ff.c **** c = ff_convert(c, 1); /* OEM -> Unicode */
5884:Middlewares/Third_Party/FatFs/src/ff.c **** if (!c) c = '?';
- ARM GAS /tmp/ccOwl4Y6.s page 135
+ ARM GAS /tmp/ccRP6lD5.s page 135
5885:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5939:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xC0 | c >> 6);
5940:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* 16-bit */
5941:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0xE0 | c >> 12);
- ARM GAS /tmp/ccOwl4Y6.s page 136
+ ARM GAS /tmp/ccRP6lD5.s page 136
5942:Middlewares/Third_Party/FatFs/src/ff.c **** pb->buf[i++] = (BYTE)(0x80 | (c >> 6 & 0x3F));
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1640 @ link register save eliminated.
5992:Middlewares/Third_Party/FatFs/src/ff.c **** pb->fp = fp;
1641 .loc 1 5992 2 view .LVU493
- ARM GAS /tmp/ccOwl4Y6.s page 137
+ ARM GAS /tmp/ccRP6lD5.s page 137
1642 .loc 1 5992 9 is_stmt 0 view .LVU494
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1688 000c 1A78 ldrb r2, [r3] @ zero_extendqisi2
3224:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_REENTRANT
1689 .loc 1 3224 21 discriminator 2 view .LVU507
- ARM GAS /tmp/ccOwl4Y6.s page 138
+ ARM GAS /tmp/ccRP6lD5.s page 138
1690 000e A2B1 cbz r2, .L151
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3241:Middlewares/Third_Party/FatFs/src/ff.c **** return res;
1729 .loc 1 3241 33 discriminator 1 view .LVU523
1730 002e F5E7 b .L148
- ARM GAS /tmp/ccOwl4Y6.s page 139
+ ARM GAS /tmp/ccRP6lD5.s page 139
1731 .LVL188:
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1776 .LVL197:
1777 .LFB1196:
886:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD wsect;
- ARM GAS /tmp/ccOwl4Y6.s page 140
+ ARM GAS /tmp/ccRP6lD5.s page 140
1778 .loc 1 886 1 is_stmt 1 view -0
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
894:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DISK_ERR;
1818 .loc 1 894 7 view .LVU550
1819 0016 0123 movs r3, #1
- ARM GAS /tmp/ccOwl4Y6.s page 141
+ ARM GAS /tmp/ccRP6lD5.s page 141
1820 0018 3A46 mov r2, r7
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1858 003c 0123 movs r3, #1
1859 003e 3A46 mov r2, r7
1860 0040 4146 mov r1, r8
- ARM GAS /tmp/ccOwl4Y6.s page 142
+ ARM GAS /tmp/ccRP6lD5.s page 142
1861 0042 6078 ldrb r0, [r4, #1] @ zero_extendqisi2
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1907 .loc 1 920 5 view .LVU576
1908 0004 8B42 cmp r3, r1
1909 0006 02D1 bne .L169
- ARM GAS /tmp/ccOwl4Y6.s page 143
+ ARM GAS /tmp/ccRP6lD5.s page 143
917:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1950 .L165:
929:Middlewares/Third_Party/FatFs/src/ff.c **** }
1951 .loc 1 929 4 is_stmt 1 view .LVU591
- ARM GAS /tmp/ccOwl4Y6.s page 144
+ ARM GAS /tmp/ccRP6lD5.s page 144
929:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1996 .loc 1 2973 6 is_stmt 0 view .LVU603
1997 0016 04F23220 addw r0, r4, #562
1998 001a FFF7FEFF bl ld_word
- ARM GAS /tmp/ccOwl4Y6.s page 145
+ ARM GAS /tmp/ccRP6lD5.s page 145
1999 .LVL220:
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2039 005a 9842 cmp r0, r3
2040 005c 04D0 beq .L171
2982:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 146
+ ARM GAS /tmp/ccRP6lD5.s page 146
2041 .loc 1 2982 9 view .LVU618
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2091 .cfi_offset 14, -4
2092 0004 87B0 sub sp, sp, #28
2093 .LCFI19:
- ARM GAS /tmp/ccOwl4Y6.s page 147
+ ARM GAS /tmp/ccRP6lD5.s page 147
2094 .cfi_def_cfa_offset 64
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2128 0024 2C60 str r4, [r5]
3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */
2129 .loc 1 3020 2 is_stmt 1 view .LVU645
- ARM GAS /tmp/ccOwl4Y6.s page 148
+ ARM GAS /tmp/ccRP6lD5.s page 148
3020:Middlewares/Third_Party/FatFs/src/ff.c **** if (fs->fs_type) { /* If the volume has been mounted */
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2167 .loc 1 3035 2 is_stmt 1 view .LVU662
3035:Middlewares/Third_Party/FatFs/src/ff.c **** stat = disk_initialize(fs->drv); /* Initialize the physical drive */
2168 .loc 1 3035 12 is_stmt 0 view .LVU663
- ARM GAS /tmp/ccOwl4Y6.s page 149
+ ARM GAS /tmp/ccRP6lD5.s page 149
2169 0050 F8B2 uxtb r0, r7
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2207 0086 B3F5606F cmp r3, #3584
2208 008a 00F23981 bhi .L202
3045:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
- ARM GAS /tmp/ccOwl4Y6.s page 150
+ ARM GAS /tmp/ccRP6lD5.s page 150
2209 .loc 1 3045 64 discriminator 2 view .LVU680
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2248 .LVL239:
3116:Middlewares/Third_Party/FatFs/src/ff.c ****
2249 .loc 1 3116 44 discriminator 1 view .LVU696
- ARM GAS /tmp/ccOwl4Y6.s page 151
+ ARM GAS /tmp/ccRP6lD5.s page 151
2250 00bc B4F80C80 ldrh r8, [r4, #12]
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2287 .loc 1 3123 6 view .LVU713
2288 00e8 012B cmp r3, #1
2289 00ea 00F21181 bhi .L210
- ARM GAS /tmp/ccOwl4Y6.s page 152
+ ARM GAS /tmp/ccRP6lD5.s page 152
3124:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3132:Middlewares/Third_Party/FatFs/src/ff.c **** if (tsect == 0) tsect = ld_dword(fs->win + BPB_TotSec32);
2328 .loc 1 3132 11 is_stmt 0 view .LVU730
2329 0130 04F14700 add r0, r4, #71
- ARM GAS /tmp/ccOwl4Y6.s page 153
+ ARM GAS /tmp/ccRP6lD5.s page 153
2330 0134 FFF7FEFF bl ld_word
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2368 .loc 1 3140 6 is_stmt 0 view .LVU746
2369 0160 019A ldr r2, [sp, #4]
2370 0162 9A42 cmp r2, r3
- ARM GAS /tmp/ccOwl4Y6.s page 154
+ ARM GAS /tmp/ccRP6lD5.s page 154
2371 0164 C0F0E680 bcc .L215
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2411 .L183:
3052:Middlewares/Third_Party/FatFs/src/ff.c **** pt = fs->win + (MBR_Table + i * SZ_PTE);
2412 .loc 1 3052 17 discriminator 1 view .LVU761
- ARM GAS /tmp/ccOwl4Y6.s page 155
+ ARM GAS /tmp/ccRP6lD5.s page 155
2413 0198 032E cmp r6, #3
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2452 01bc 0AE0 b .L188
2453 .LVL268:
2454 .L226:
- ARM GAS /tmp/ccOwl4Y6.s page 156
+ ARM GAS /tmp/ccRP6lD5.s page 156
3060:Middlewares/Third_Party/FatFs/src/ff.c **** } while (LD2PT(vol) == 0 && fmt >= 2 && ++i < 4);
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3148:Middlewares/Third_Party/FatFs/src/ff.c **** fs->volbase = bsect; /* Volume start sector */
2496 .loc 1 3148 16 view .LVU790
2497 01ee C4F81890 str r9, [r4, #24]
- ARM GAS /tmp/ccOwl4Y6.s page 157
+ ARM GAS /tmp/ccRP6lD5.s page 157
3149:Middlewares/Third_Party/FatFs/src/ff.c **** fs->fatbase = bsect + nrsv; /* FAT start sector */
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2533 021a 09F00103 and r3, r9, #1
3161:Middlewares/Third_Party/FatFs/src/ff.c **** }
2534 .loc 1 3161 22 discriminator 2 view .LVU810
- ARM GAS /tmp/ccOwl4Y6.s page 158
+ ARM GAS /tmp/ccRP6lD5.s page 158
2535 021e 03EB5203 add r3, r3, r2, lsr #1
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3192:Middlewares/Third_Party/FatFs/src/ff.c **** #if _USE_LFN == 1
2573 .loc 1 3192 9 view .LVU827
2574 024e 1380 strh r3, [r2] @ movhi
- ARM GAS /tmp/ccOwl4Y6.s page 159
+ ARM GAS /tmp/ccRP6lD5.s page 159
2575 0250 E380 strh r3, [r4, #6] @ movhi
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2614 .LVL285:
3156:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
2615 .loc 1 3156 11 view .LVU843
- ARM GAS /tmp/ccOwl4Y6.s page 160
+ ARM GAS /tmp/ccRP6lD5.s page 160
2616 0280 CFE7 b .L193
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2658 02be 9842 cmp r0, r3
2659 02c0 BFD1 bne .L195
3177:Middlewares/Third_Party/FatFs/src/ff.c **** {
- ARM GAS /tmp/ccOwl4Y6.s page 161
+ ARM GAS /tmp/ccRP6lD5.s page 161
2660 .loc 1 3177 8 view .LVU856
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3015:Middlewares/Third_Party/FatFs/src/ff.c ****
2704 .loc 1 3015 18 discriminator 1 view .LVU867
2705 02f2 F9E7 b .L180
- ARM GAS /tmp/ccOwl4Y6.s page 162
+ ARM GAS /tmp/ccRP6lD5.s page 162
2706 .LVL299:
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3127:Middlewares/Third_Party/FatFs/src/ff.c ****
2752 .loc 1 3127 63 discriminator 3 view .LVU876
2753 0324 0D25 movs r5, #13
- ARM GAS /tmp/ccOwl4Y6.s page 163
+ ARM GAS /tmp/ccRP6lD5.s page 163
2754 0326 DFE7 b .L180
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2799 .LFE1219:
2801 .section .text.put_fat,"ax",%progbits
2802 .align 1
- ARM GAS /tmp/ccOwl4Y6.s page 164
+ ARM GAS /tmp/ccRP6lD5.s page 164
2803 .syntax unified
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2846 001a 022B cmp r3, #2
2847 001c 49D0 beq .L234
2848 001e 032B cmp r3, #3
- ARM GAS /tmp/ccOwl4Y6.s page 165
+ ARM GAS /tmp/ccRP6lD5.s page 165
2849 0020 60D0 beq .L235
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2887 .loc 1 1098 4 is_stmt 1 view .LVU913
1098:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
2888 .loc 1 1098 7 is_stmt 0 view .LVU914
- ARM GAS /tmp/ccOwl4Y6.s page 166
+ ARM GAS /tmp/ccRP6lD5.s page 166
2889 0052 15F00105 ands r5, r5, #1
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2927 0084 A389 ldrh r3, [r4, #12]
1102:Middlewares/Third_Party/FatFs/src/ff.c **** *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F));
2928 .loc 1 1102 21 view .LVU931
- ARM GAS /tmp/ccOwl4Y6.s page 167
+ ARM GAS /tmp/ccRP6lD5.s page 167
2929 0086 B9FBF3F2 udiv r2, r9, r3
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
2969 .loc 1 1108 56 view .LVU946
2970 00b6 5B08 lsrs r3, r3, #1
- ARM GAS /tmp/ccOwl4Y6.s page 168
+ ARM GAS /tmp/ccRP6lD5.s page 168
1108:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
3010 .loc 1 1118 49 view .LVU962
3011 00e6 8389 ldrh r3, [r0, #12]
- ARM GAS /tmp/ccOwl4Y6.s page 169
+ ARM GAS /tmp/ccRP6lD5.s page 169
1118:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3050 0118 3943 orrs r1, r1, r7
3051 .LVL340:
1123:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
- ARM GAS /tmp/ccOwl4Y6.s page 170
+ ARM GAS /tmp/ccRP6lD5.s page 170
3052 .loc 1 1123 4 is_stmt 0 view .LVU979
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3098 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
3099 .LCFI23:
3100 .cfi_def_cfa_offset 24
- ARM GAS /tmp/ccOwl4Y6.s page 171
+ ARM GAS /tmp/ccRP6lD5.s page 171
3101 .cfi_offset 3, -24
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3140 .LVL349:
1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)];
3141 .loc 1 1020 4 is_stmt 1 view .LVU1005
- ARM GAS /tmp/ccOwl4Y6.s page 172
+ ARM GAS /tmp/ccRP6lD5.s page 172
1020:Middlewares/Third_Party/FatFs/src/ff.c **** wc = fs->win[bc++ % SS(fs)];
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3180 .loc 1 1022 8 view .LVU1021
3181 0052 1944 add r1, r1, r3
3182 0054 2846 mov r0, r5
- ARM GAS /tmp/ccOwl4Y6.s page 173
+ ARM GAS /tmp/ccRP6lD5.s page 173
3183 0056 FFF7FEFF bl move_window
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs));
3223 .loc 1 1028 47 view .LVU1036
3224 0084 AB89 ldrh r3, [r5, #12]
- ARM GAS /tmp/ccOwl4Y6.s page 174
+ ARM GAS /tmp/ccRP6lD5.s page 174
1028:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_word(fs->win + clst * 2 % SS(fs));
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3263 .loc 1 1033 54 view .LVU1052
3264 00b2 9B08 lsrs r3, r3, #2
1033:Middlewares/Third_Party/FatFs/src/ff.c **** val = ld_dword(fs->win + clst * 4 % SS(fs)) & 0x0FFFFFFF;
- ARM GAS /tmp/ccOwl4Y6.s page 175
+ ARM GAS /tmp/ccRP6lD5.s page 175
3265 .loc 1 1033 44 view .LVU1053
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1012:Middlewares/Third_Party/FatFs/src/ff.c ****
3306 .loc 1 1012 7 view .LVU1067
3307 00e2 0120 movs r0, #1
- ARM GAS /tmp/ccOwl4Y6.s page 176
+ ARM GAS /tmp/ccRP6lD5.s page 176
3308 .LVL377:
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3354 .cfi_offset 4, -24
3355 .cfi_offset 5, -20
3356 .cfi_offset 6, -16
- ARM GAS /tmp/ccOwl4Y6.s page 177
+ ARM GAS /tmp/ccRP6lD5.s page 177
3357 .cfi_offset 7, -12
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3394 .L261:
1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */
3395 .loc 1 1489 2 view .LVU1095
- ARM GAS /tmp/ccOwl4Y6.s page 178
+ ARM GAS /tmp/ccRP6lD5.s page 178
1489:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs / SZDIRE >= fs->n_rootdir) return FR_INT_ERR; /* Is index out of range? */
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3431 0052 B8F80C20 ldrh r2, [r8, #12]
1506:Middlewares/Third_Party/FatFs/src/ff.c ****
3432 .loc 1 1506 27 view .LVU1115
- ARM GAS /tmp/ccOwl4Y6.s page 179
+ ARM GAS /tmp/ccRP6lD5.s page 179
3433 0056 B6FBF2F1 udiv r1, r6, r2
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3471 .loc 1 1498 7 is_stmt 0 view .LVU1131
3472 0086 0128 cmp r0, #1
3473 0088 14D9 bls .L269
- ARM GAS /tmp/ccOwl4Y6.s page 180
+ ARM GAS /tmp/ccRP6lD5.s page 180
1498:Middlewares/Third_Party/FatFs/src/ff.c **** ofs -= csz;
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3515 .LVL399:
1490:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = fs->dirbase;
3516 .loc 1 1490 45 discriminator 1 view .LVU1145
- ARM GAS /tmp/ccOwl4Y6.s page 181
+ ARM GAS /tmp/ccRP6lD5.s page 181
3517 00ae F9E7 b .L259
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3564 .cfi_offset 4, -24
3565 .cfi_offset 5, -20
3566 .cfi_offset 6, -16
- ARM GAS /tmp/ccOwl4Y6.s page 182
+ ARM GAS /tmp/ccRP6lD5.s page 182
3567 .cfi_offset 7, -12
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1366:Middlewares/Third_Party/FatFs/src/ff.c **** if (cs < 2) return 1; /* Invalid FAT value */
3605 .loc 1 1366 8 view .LVU1171
3606 0026 0346 mov r3, r0
- ARM GAS /tmp/ccOwl4Y6.s page 183
+ ARM GAS /tmp/ccRP6lD5.s page 183
3607 .LVL413:
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3646 004e 78B1 cbz r0, .L279
1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */
3647 .loc 1 1409 4 is_stmt 1 view .LVU1187
- ARM GAS /tmp/ccOwl4Y6.s page 184
+ ARM GAS /tmp/ccRP6lD5.s page 184
1409:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == scl) return 0; /* No free cluster */
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1412:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK && clst != 0) {
3687 .loc 1 1412 9 view .LVU1203
3688 0078 FFF7FEFF bl put_fat
- ARM GAS /tmp/ccOwl4Y6.s page 185
+ ARM GAS /tmp/ccRP6lD5.s page 185
3689 .LVL423:
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
3727 .loc 1 1421 3 is_stmt 1 view .LVU1220
1421:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
- ARM GAS /tmp/ccOwl4Y6.s page 186
+ ARM GAS /tmp/ccRP6lD5.s page 186
3728 .loc 1 1421 5 is_stmt 0 view .LVU1221
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3771 .L287:
1405:Middlewares/Third_Party/FatFs/src/ff.c **** }
3772 .loc 1 1405 27 discriminator 1 view .LVU1233
- ARM GAS /tmp/ccOwl4Y6.s page 187
+ ARM GAS /tmp/ccRP6lD5.s page 187
3773 00ca 0023 movs r3, #0
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3819 .loc 1 1287 2 is_stmt 1 view .LVU1243
1287:Middlewares/Third_Party/FatFs/src/ff.c ****
3820 .loc 1 1287 5 is_stmt 0 view .LVU1244
- ARM GAS /tmp/ccOwl4Y6.s page 188
+ ARM GAS /tmp/ccRP6lD5.s page 188
3821 0006 0129 cmp r1, #1
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3860 .loc 1 1297 9 is_stmt 0 view .LVU1259
3861 002c 2146 mov r1, r4
3862 002e 3046 mov r0, r6
- ARM GAS /tmp/ccOwl4Y6.s page 189
+ ARM GAS /tmp/ccRP6lD5.s page 189
3863 0030 FFF7FEFF bl get_fat
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++;
3900 .loc 1 1305 36 view .LVU1277
3901 0054 911E subs r1, r2, #2
- ARM GAS /tmp/ccOwl4Y6.s page 190
+ ARM GAS /tmp/ccRP6lD5.s page 190
1305:Middlewares/Third_Party/FatFs/src/ff.c **** fs->free_clst++;
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3943 0078 F9E7 b .L295
3944 .LVL458:
3945 .L303:
- ARM GAS /tmp/ccOwl4Y6.s page 191
+ ARM GAS /tmp/ccRP6lD5.s page 191
1300:Middlewares/Third_Party/FatFs/src/ff.c **** if (!_FS_EXFAT || fs->fs_type != FS_EXFAT) {
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3990 .loc 1 2425 5 is_stmt 0 view .LVU1302
3991 000e 20B9 cbnz r0, .L306
2426:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
- ARM GAS /tmp/ccOwl4Y6.s page 192
+ ARM GAS /tmp/ccRP6lD5.s page 192
3992 .loc 1 2426 3 is_stmt 1 view .LVU1303
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1525:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
4037 .loc 1 1525 9 is_stmt 0 view .LVU1315
4038 0004 0668 ldr r6, [r0]
- ARM GAS /tmp/ccOwl4Y6.s page 193
+ ARM GAS /tmp/ccRP6lD5.s page 193
4039 .LVL465:
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4076 .loc 1 1537 4 is_stmt 1 view .LVU1332
1537:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE;
4077 .loc 1 1537 26 is_stmt 0 view .LVU1333
- ARM GAS /tmp/ccOwl4Y6.s page 194
+ ARM GAS /tmp/ccRP6lD5.s page 194
4078 002e 3389 ldrh r3, [r6, #8]
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4116 .LVL473:
1538:Middlewares/Third_Party/FatFs/src/ff.c **** }
4117 .loc 1 1538 26 view .LVU1350
- ARM GAS /tmp/ccOwl4Y6.s page 195
+ ARM GAS /tmp/ccRP6lD5.s page 195
4118 0056 F9E7 b .L309
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1548:Middlewares/Third_Party/FatFs/src/ff.c **** dp->sect = 0; return FR_NO_FILE;
4155 .loc 1 1548 9 is_stmt 0 view .LVU1368
4156 007e 8FB1 cbz r7, .L327
- ARM GAS /tmp/ccOwl4Y6.s page 196
+ ARM GAS /tmp/ccRP6lD5.s page 196
1551:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 0) return FR_DENIED; /* No free cluster */
@@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4194 .loc 1 1549 16 is_stmt 0 view .LVU1385
4195 00a4 0023 movs r3, #0
4196 00a6 EB61 str r3, [r5, #28]
- ARM GAS /tmp/ccOwl4Y6.s page 197
+ ARM GAS /tmp/ccRP6lD5.s page 197
1549:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4236 00d2 F8B9 cbnz r0, .L324
1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
4237 .loc 1 1559 72 is_stmt 1 discriminator 2 view .LVU1401
- ARM GAS /tmp/ccOwl4Y6.s page 198
+ ARM GAS /tmp/ccRP6lD5.s page 198
1559:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
@@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4278 00fc 0420 movs r0, #4
4279 .LVL493:
1531:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 199
+ ARM GAS /tmp/ccRP6lD5.s page 199
4280 .loc 1 1531 105 discriminator 3 view .LVU1416
@@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4323 .LFE1206:
4325 .section .text.dir_find,"ax",%progbits
4326 .align 1
- ARM GAS /tmp/ccOwl4Y6.s page 200
+ ARM GAS /tmp/ccRP6lD5.s page 200
4327 .syntax unified
@@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2277:Middlewares/Third_Party/FatFs/src/ff.c **** } while (res == FR_OK);
4370 .loc 1 2277 9 is_stmt 0 view .LVU1440
4371 0014 0021 movs r1, #0
- ARM GAS /tmp/ccOwl4Y6.s page 201
+ ARM GAS /tmp/ccRP6lD5.s page 201
4372 0016 2046 mov r0, r4
@@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4410 .loc 1 2274 16 view .LVU1456
4411 003c A371 strb r3, [r4, #6]
4412 .LVL516:
- ARM GAS /tmp/ccOwl4Y6.s page 202
+ ARM GAS /tmp/ccRP6lD5.s page 202
2275:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
@@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4460 .cfi_def_cfa_offset 24
4461 0004 0446 mov r4, r0
4462 0006 0191 str r1, [sp, #4]
- ARM GAS /tmp/ccOwl4Y6.s page 203
+ ARM GAS /tmp/ccRP6lD5.s page 203
2818:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE ns;
@@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4500 .L339:
2855:Middlewares/Third_Party/FatFs/src/ff.c **** res = create_name(dp, &path); /* Get a segment name of the path */
4501 .loc 1 2855 3 is_stmt 1 view .LVU1483
- ARM GAS /tmp/ccOwl4Y6.s page 204
+ ARM GAS /tmp/ccRP6lD5.s page 204
2856:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK) break;
@@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4538 .loc 1 2888 32 is_stmt 0 view .LVU1501
4539 004e 05F13401 add r1, r5, #52
2888:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 205
+ ARM GAS /tmp/ccRP6lD5.s page 205
4540 .loc 1 2888 44 view .LVU1502
@@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2894:Middlewares/Third_Party/FatFs/src/ff.c ****
4580 .loc 1 2894 1 is_stmt 0 view .LVU1517
4581 007a 1846 mov r0, r3
- ARM GAS /tmp/ccOwl4Y6.s page 206
+ ARM GAS /tmp/ccRP6lD5.s page 206
4582 007c 03B0 add sp, sp, #12
@@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4629 .cfi_offset 4, -20
4630 .cfi_offset 5, -16
4631 .cfi_offset 6, -12
- ARM GAS /tmp/ccOwl4Y6.s page 207
+ ARM GAS /tmp/ccRP6lD5.s page 207
4632 .cfi_offset 7, -8
@@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4671 0020 0246 mov r2, r0
4672 0022 70B9 cbnz r0, .L348
4673 .LVL545:
- ARM GAS /tmp/ccOwl4Y6.s page 208
+ ARM GAS /tmp/ccRP6lD5.s page 208
4674 .L350:
@@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
1619:Middlewares/Third_Party/FatFs/src/ff.c **** }
4713 .loc 1 1619 2 is_stmt 1 view .LVU1557
1620:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 209
+ ARM GAS /tmp/ccRP6lD5.s page 209
4714 .loc 1 1620 1 is_stmt 0 view .LVU1558
@@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2371:Middlewares/Third_Party/FatFs/src/ff.c **** res = move_window(fs, dp->sect);
4760 .loc 1 2371 5 is_stmt 0 view .LVU1569
4761 000c 0546 mov r5, r0
- ARM GAS /tmp/ccOwl4Y6.s page 210
+ ARM GAS /tmp/ccRP6lD5.s page 210
4762 000e 08B1 cbz r0, .L359
@@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4804 .LFE1212:
4806 .section .text.dir_read,"ax",%progbits
4807 .align 1
- ARM GAS /tmp/ccOwl4Y6.s page 211
+ ARM GAS /tmp/ccRP6lD5.s page 211
4808 .syntax unified
@@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4851 0010 FFF7FEFF bl dir_next
4852 .LVL568:
2194:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 212
+ ARM GAS /tmp/ccRP6lD5.s page 212
4853 .loc 1 2194 3 is_stmt 1 view .LVU1594
@@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
2188:Middlewares/Third_Party/FatFs/src/ff.c **** break;
4890 .loc 1 2188 4 is_stmt 1 view .LVU1612
2188:Middlewares/Third_Party/FatFs/src/ff.c **** break;
- ARM GAS /tmp/ccOwl4Y6.s page 213
+ ARM GAS /tmp/ccRP6lD5.s page 213
4891 .loc 1 2188 7 is_stmt 0 view .LVU1613
@@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4934 .align 1
4935 .syntax unified
4936 .thumb
- ARM GAS /tmp/ccOwl4Y6.s page 214
+ ARM GAS /tmp/ccRP6lD5.s page 214
4937 .thumb_func
@@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4979 .loc 1 968 6 discriminator 1 view .LVU1638
4980 001c 00B1 cbz r0, .L369
968:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 215
+ ARM GAS /tmp/ccRP6lD5.s page 215
4981 .loc 1 968 56 discriminator 1 view .LVU1639
@@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5023 0056 6169 ldr r1, [r4, #20]
5024 0058 04F50770 add r0, r4, #540
5025 005c FFF7FEFF bl st_dword
- ARM GAS /tmp/ccOwl4Y6.s page 216
+ ARM GAS /tmp/ccRP6lD5.s page 216
5026 .LVL587:
@@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5072 .loc 1 3265 1 is_stmt 0 view .LVU1661
5073 0000 70B5 push {r4, r5, r6, lr}
5074 .LCFI38:
- ARM GAS /tmp/ccOwl4Y6.s page 217
+ ARM GAS /tmp/ccRP6lD5.s page 217
5075 .cfi_def_cfa_offset 16
@@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3279:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
5114 .loc 1 3279 3 is_stmt 0 view .LVU1677
5115 0020 FFF7FEFF bl clear_lock
- ARM GAS /tmp/ccOwl4Y6.s page 218
+ ARM GAS /tmp/ccRP6lD5.s page 218
5116 .LVL595:
@@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5155 .cfi_remember_state
5156 .cfi_def_cfa_offset 16
5157 @ sp needed
- ARM GAS /tmp/ccOwl4Y6.s page 219
+ ARM GAS /tmp/ccRP6lD5.s page 219
5158 004c 70BD pop {r4, r5, r6, pc}
@@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5207 .cfi_offset 8, -12
5208 .cfi_offset 9, -8
5209 .cfi_offset 14, -4
- ARM GAS /tmp/ccOwl4Y6.s page 220
+ ARM GAS /tmp/ccRP6lD5.s page 220
5210 0004 91B0 sub sp, sp, #68
@@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5247 .loc 1 3499 31 is_stmt 0 discriminator 1 view .LVU1716
5248 0024 0023 movs r3, #0
5249 0026 3360 str r3, [r6]
- ARM GAS /tmp/ccOwl4Y6.s page 221
+ ARM GAS /tmp/ccRP6lD5.s page 221
5250 .LVL607:
@@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5290 004c 14BF ite ne
5291 004e 0121 movne r1, #1
5292 0050 0021 moveq r1, #0
- ARM GAS /tmp/ccOwl4Y6.s page 222
+ ARM GAS /tmp/ccRP6lD5.s page 222
5293 0052 04A8 add r0, sp, #16
@@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3392:Middlewares/Third_Party/FatFs/src/ff.c **** st_dword(dj.dir + DIR_ModTime, dw); /* Set modified time */
5333 .loc 1 3392 6 is_stmt 1 view .LVU1745
5334 007c 0146 mov r1, r0
- ARM GAS /tmp/ccOwl4Y6.s page 223
+ ARM GAS /tmp/ccRP6lD5.s page 223
5335 007e 0C98 ldr r0, [sp, #48]
@@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3398:Middlewares/Third_Party/FatFs/src/ff.c ****
5378 .loc 1 3398 6 view .LVU1757
3398:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 224
+ ARM GAS /tmp/ccRP6lD5.s page 224
5379 .loc 1 3398 16 is_stmt 0 view .LVU1758
@@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3405:Middlewares/Third_Party/FatFs/src/ff.c **** }
5419 .loc 1 3405 22 view .LVU1773
5420 00e8 039B ldr r3, [sp, #12]
- ARM GAS /tmp/ccOwl4Y6.s page 225
+ ARM GAS /tmp/ccRP6lD5.s page 225
5421 00ea 1C61 str r4, [r3, #16]
@@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5462 0114 AAD0 beq .L393
3360:Middlewares/Third_Party/FatFs/src/ff.c **** }
5463 .loc 1 3360 36 discriminator 1 view .LVU1787
- ARM GAS /tmp/ccOwl4Y6.s page 226
+ ARM GAS /tmp/ccRP6lD5.s page 226
5464 0116 0825 movs r5, #8
@@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3423:Middlewares/Third_Party/FatFs/src/ff.c **** mode |= FA_MODIFIED;
5503 .loc 1 3423 7 is_stmt 0 view .LVU1803
5504 0140 17F0080F tst r7, #8
- ARM GAS /tmp/ccOwl4Y6.s page 227
+ ARM GAS /tmp/ccRP6lD5.s page 227
5505 0144 01D0 beq .L395
@@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5543 .loc 1 3444 3 is_stmt 1 view .LVU1819
3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
5544 .loc 1 3456 5 view .LVU1820
- ARM GAS /tmp/ccOwl4Y6.s page 228
+ ARM GAS /tmp/ccRP6lD5.s page 228
3456:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.objsize = ld_dword(dj.dir + DIR_FileSize);
@@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */
5581 .loc 1 3466 4 is_stmt 1 view .LVU1839
3466:Middlewares/Third_Party/FatFs/src/ff.c **** fp->fptr = 0; /* Set file pointer top of the file */
- ARM GAS /tmp/ccOwl4Y6.s page 229
+ ARM GAS /tmp/ccRP6lD5.s page 229
5582 .loc 1 3466 13 is_stmt 0 view .LVU1840
@@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5619 01bc B168 ldr r1, [r6, #8]
5620 .LVL654:
3476:Middlewares/Third_Party/FatFs/src/ff.c **** clst = get_fat(&fp->obj, clst);
- ARM GAS /tmp/ccOwl4Y6.s page 230
+ ARM GAS /tmp/ccRP6lD5.s page 230
5621 .loc 1 3476 5 is_stmt 1 view .LVU1858
@@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5660 .loc 1 3479 34 discriminator 1 view .LVU1873
5661 01e2 0125 movs r5, #1
5662 .LVL660:
- ARM GAS /tmp/ccOwl4Y6.s page 231
+ ARM GAS /tmp/ccRP6lD5.s page 231
3479:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
5701 .loc 1 3486 21 view .LVU1890
5702 020e 0244 add r2, r2, r0
- ARM GAS /tmp/ccOwl4Y6.s page 232
+ ARM GAS /tmp/ccRP6lD5.s page 232
3486:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
@@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5743 0230 FAE6 b .L387
5744 .cfi_endproc
5745 .LFE1222:
- ARM GAS /tmp/ccOwl4Y6.s page 233
+ ARM GAS /tmp/ccRP6lD5.s page 233
5747 .section .text.f_read,"ax",%progbits
@@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3526:Middlewares/Third_Party/FatFs/src/ff.c **** res = validate(&fp->obj, &fs); /* Check validity of the file object */
5792 .loc 1 3526 6 view .LVU1915
5793 0010 C8F80030 str r3, [r8]
- ARM GAS /tmp/ccOwl4Y6.s page 234
+ ARM GAS /tmp/ccRP6lD5.s page 234
3527:Middlewares/Third_Party/FatFs/src/ff.c **** if (res != FR_OK || (res = (FRESULT)fp->err) != FR_OK) LEAVE_FF(fs, res); /* Check validity */
@@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5832 0040 2E46 mov r6, r5
5833 .LVL682:
3531:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 235
+ ARM GAS /tmp/ccRP6lD5.s page 235
5834 .loc 1 3531 5 view .LVU1932
@@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5874 .loc 1 3551 29 discriminator 1 view .LVU1946
5875 0070 CDF804A0 str r10, [sp, #4]
5876 .LVL689:
- ARM GAS /tmp/ccOwl4Y6.s page 236
+ ARM GAS /tmp/ccRP6lD5.s page 236
3551:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */
@@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5916 009c 5345 cmp r3, r10
5917 009e F5D2 bcs .L437
3570:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 237
+ ARM GAS /tmp/ccRP6lD5.s page 237
5918 .loc 1 3570 6 is_stmt 1 view .LVU1962
@@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5958 00d4 C4F82090 str r9, [r4, #32]
5959 .LVL698:
5960 .L426:
- ARM GAS /tmp/ccOwl4Y6.s page 238
+ ARM GAS /tmp/ccRP6lD5.s page 238
3590:Middlewares/Third_Party/FatFs/src/ff.c **** if (rcnt > btr) rcnt = btr; /* Clip it by btr if needed */
@@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
6000 .loc 1 3534 36 view .LVU1992
6001 0104 D8F80030 ldr r3, [r8]
- ARM GAS /tmp/ccOwl4Y6.s page 239
+ ARM GAS /tmp/ccRP6lD5.s page 239
3534:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) == 0) { /* On the sector boundary? */
@@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6039 .loc 1 3538 8 is_stmt 0 view .LVU2009
6040 0132 0029 cmp r1, #0
6041 0134 86D1 bne .L428
- ARM GAS /tmp/ccOwl4Y6.s page 240
+ ARM GAS /tmp/ccRP6lD5.s page 240
3539:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* Middle or end of the file */
@@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */
6079 .loc 1 3557 4 is_stmt 1 view .LVU2027
3557:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Read maximum contiguous sectors directly */
- ARM GAS /tmp/ccOwl4Y6.s page 241
+ ARM GAS /tmp/ccRP6lD5.s page 241
6080 .loc 1 3557 15 is_stmt 0 view .LVU2028
@@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6119 0190 CDF804A0 str r10, [sp, #4]
6120 .LVL714:
6121 .L423:
- ARM GAS /tmp/ccOwl4Y6.s page 242
+ ARM GAS /tmp/ccRP6lD5.s page 242
3601:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3585:Middlewares/Third_Party/FatFs/src/ff.c **** }
6164 .loc 1 3585 57 is_stmt 1 discriminator 1 view .LVU2056
6165 01c4 4FF0010A mov r10, #1
- ARM GAS /tmp/ccOwl4Y6.s page 243
+ ARM GAS /tmp/ccRP6lD5.s page 243
6166 .LVL720:
@@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6215 0006 0446 mov r4, r0
6216 0008 0F46 mov r7, r1
6217 000a 1546 mov r5, r2
- ARM GAS /tmp/ccOwl4Y6.s page 244
+ ARM GAS /tmp/ccRP6lD5.s page 244
6218 000c 9846 mov r8, r3
@@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6254 .loc 1 3628 5 view .LVU2081
6255 002a 13F0020F tst r3, #2
6256 002e 00F0EC80 beq .L482
- ARM GAS /tmp/ccOwl4Y6.s page 245
+ ARM GAS /tmp/ccRP6lD5.s page 245
3631:Middlewares/Third_Party/FatFs/src/ff.c **** btw = (UINT)(0xFFFFFFFF - (DWORD)fp->fptr);
@@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6294 .loc 1 3657 5 view .LVU2098
3657:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst; /* Update current cluster */
6295 .loc 1 3657 8 is_stmt 0 view .LVU2099
- ARM GAS /tmp/ccOwl4Y6.s page 246
+ ARM GAS /tmp/ccRP6lD5.s page 246
6296 0054 B0F1FF3F cmp r0, #-1
@@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6332 .loc 1 3671 9 is_stmt 0 view .LVU2117
6333 007c B144 add r9, r9, r6
6334 .LVL736:
- ARM GAS /tmp/ccOwl4Y6.s page 247
+ ARM GAS /tmp/ccRP6lD5.s page 247
3672:Middlewares/Third_Party/FatFs/src/ff.c **** if (cc) { /* Write maximum contiguous sectors directly */
@@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3677:Middlewares/Third_Party/FatFs/src/ff.c **** #if _FS_MINIMIZE <= 2
6373 .loc 1 3677 57 is_stmt 1 discriminator 1 view .LVU2134
6374 00b2 CDF804A0 str r10, [sp, #4]
- ARM GAS /tmp/ccOwl4Y6.s page 248
+ ARM GAS /tmp/ccRP6lD5.s page 248
6375 .LVL741:
@@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY;
6419 .loc 1 3665 5 is_stmt 1 view .LVU2145
3665:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY;
- ARM GAS /tmp/ccOwl4Y6.s page 249
+ ARM GAS /tmp/ccRP6lD5.s page 249
6420 .loc 1 3665 9 is_stmt 0 view .LVU2146
@@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
6461 .loc 1 3685 11 is_stmt 0 view .LVU2160
6462 011c 236A ldr r3, [r4, #32]
- ARM GAS /tmp/ccOwl4Y6.s page 250
+ ARM GAS /tmp/ccRP6lD5.s page 250
3685:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(fp->buf, wbuff + ((fp->sect - sect) * SS(fs)), SS(fs));
@@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6502 014c 4B45 cmp r3, r9
6503 014e 03D0 beq .L478
3701:Middlewares/Third_Party/FatFs/src/ff.c **** disk_read(fs->drv, fp->buf, sect, 1) != RES_OK) {
- ARM GAS /tmp/ccOwl4Y6.s page 251
+ ARM GAS /tmp/ccRP6lD5.s page 251
6504 .loc 1 3701 7 view .LVU2176
@@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6542 0176 3246 mov r2, r6
6543 0178 3946 mov r1, r7
6544 017a 1844 add r0, r0, r3
- ARM GAS /tmp/ccOwl4Y6.s page 252
+ ARM GAS /tmp/ccRP6lD5.s page 252
6545 017c FFF7FEFF bl mem_cpy
@@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6583 .loc 1 3637 9 is_stmt 0 view .LVU2208
6584 01a8 A169 ldr r1, [r4, #24]
3637:Middlewares/Third_Party/FatFs/src/ff.c **** csect = (UINT)(fp->fptr / SS(fs)) & (fs->csize - 1); /* Sector offset in the cluster */
- ARM GAS /tmp/ccOwl4Y6.s page 253
+ ARM GAS /tmp/ccRP6lD5.s page 253
6585 .loc 1 3637 18 view .LVU2209
@@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6622 01d6 2046 mov r0, r4
6623 .LVL767:
3643:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 254
+ ARM GAS /tmp/ccRP6lD5.s page 254
6624 .loc 1 3643 14 view .LVU2227
@@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6666 .LVL775:
3628:Middlewares/Third_Party/FatFs/src/ff.c ****
6667 .loc 1 3628 30 discriminator 1 view .LVU2240
- ARM GAS /tmp/ccOwl4Y6.s page 255
+ ARM GAS /tmp/ccRP6lD5.s page 255
6668 020e 52E7 b .L459
@@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
6714 .loc 1 5960 2 is_stmt 1 view .LVU2251
5960:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
- ARM GAS /tmp/ccOwl4Y6.s page 256
+ ARM GAS /tmp/ccRP6lD5.s page 256
6715 .loc 1 5960 11 is_stmt 0 view .LVU2252
@@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6757 .LVL785:
6758 .L500:
5964:Middlewares/Third_Party/FatFs/src/ff.c **** i = (bw == (UINT)i) ? 0 : -1;
- ARM GAS /tmp/ccOwl4Y6.s page 257
+ ARM GAS /tmp/ccRP6lD5.s page 257
6759 .loc 1 5964 3 is_stmt 1 view .LVU2265
@@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6803 .loc 1 5979 2 view .LVU2277
5979:Middlewares/Third_Party/FatFs/src/ff.c **** && f_write(pb->fp, pb->buf, (UINT)pb->idx, &nw) == FR_OK
6804 .loc 1 5979 11 is_stmt 0 view .LVU2278
- ARM GAS /tmp/ccOwl4Y6.s page 258
+ ARM GAS /tmp/ccRP6lD5.s page 258
6805 0000 4268 ldr r2, [r0, #4]
@@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6847 .LVL793:
6848 .L504:
6849 .LCFI61:
- ARM GAS /tmp/ccOwl4Y6.s page 259
+ ARM GAS /tmp/ccRP6lD5.s page 259
6850 .cfi_def_cfa_offset 0
@@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
3737:Middlewares/Third_Party/FatFs/src/ff.c **** DWORD tm;
6900 .loc 1 3737 2 view .LVU2297
3738:Middlewares/Third_Party/FatFs/src/ff.c **** BYTE *dir;
- ARM GAS /tmp/ccOwl4Y6.s page 260
+ ARM GAS /tmp/ccRP6lD5.s page 260
6901 .loc 1 3738 2 view .LVU2298
@@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6938 002a 78B1 cbz r0, .L517
6939 .LVL802:
6940 .L512:
- ARM GAS /tmp/ccOwl4Y6.s page 261
+ ARM GAS /tmp/ccRP6lD5.s page 261
3802:Middlewares/Third_Party/FatFs/src/ff.c ****
@@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6982 .loc 1 3789 6 is_stmt 1 view .LVU2328
6983 0056 A268 ldr r2, [r4, #8]
6984 0058 3146 mov r1, r6
- ARM GAS /tmp/ccOwl4Y6.s page 262
+ ARM GAS /tmp/ccRP6lD5.s page 262
6985 005a 2068 ldr r0, [r4]
@@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7027 .cfi_endproc
7028 .LFE1225:
7030 .section .text.f_close,"ax",%progbits
- ARM GAS /tmp/ccOwl4Y6.s page 263
+ ARM GAS /tmp/ccRP6lD5.s page 263
7031 .align 1
@@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7076 .cfi_restore_state
3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
7077 .loc 1 3825 3 is_stmt 1 view .LVU2351
- ARM GAS /tmp/ccOwl4Y6.s page 264
+ ARM GAS /tmp/ccRP6lD5.s page 264
3825:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
@@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7122 .cfi_def_cfa_offset 36
7123 .cfi_offset 4, -36
7124 .cfi_offset 5, -32
- ARM GAS /tmp/ccOwl4Y6.s page 265
+ ARM GAS /tmp/ccRP6lD5.s page 265
7125 .cfi_offset 6, -28
@@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4024:Middlewares/Third_Party/FatFs/src/ff.c **** if (ofs == CREATE_LINKMAP) { /* Create CLMT */
7163 .loc 1 4024 5 view .LVU2380
7164 001a 002B cmp r3, #0
- ARM GAS /tmp/ccOwl4Y6.s page 266
+ ARM GAS /tmp/ccRP6lD5.s page 266
7165 001c 00F08E80 beq .L526
@@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7205 .loc 1 4027 9 view .LVU2394
7206 003e 58F804BB ldr fp, [r8], #4
7207 .LVL829:
- ARM GAS /tmp/ccOwl4Y6.s page 267
+ ARM GAS /tmp/ccRP6lD5.s page 267
4027:Middlewares/Third_Party/FatFs/src/ff.c **** cl = fp->obj.sclust; /* Origin of the chain */
@@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7243 005c 2046 mov r0, r4
7244 005e FFF7FEFF bl get_fat
7245 .LVL835:
- ARM GAS /tmp/ccOwl4Y6.s page 268
+ ARM GAS /tmp/ccRP6lD5.s page 268
4035:Middlewares/Third_Party/FatFs/src/ff.c **** if (cl <= 1) ABORT(fs, FR_INT_ERR);
@@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4042:Middlewares/Third_Party/FatFs/src/ff.c **** }
7283 .loc 1 4042 17 is_stmt 1 view .LVU2431
4042:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 269
+ ARM GAS /tmp/ccRP6lD5.s page 269
7284 .loc 1 4042 21 is_stmt 0 view .LVU2432
@@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4044:Middlewares/Third_Party/FatFs/src/ff.c **** if (ulen <= tlen) {
7324 .loc 1 4044 15 view .LVU2447
7325 00a2 C3F80090 str r9, [r3]
- ARM GAS /tmp/ccOwl4Y6.s page 270
+ ARM GAS /tmp/ccRP6lD5.s page 270
4045:Middlewares/Third_Party/FatFs/src/ff.c **** *tbl = 0; /* Terminate table */
@@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */
7364 .loc 1 4057 53 view .LVU2464
7365 00da 013A subs r2, r2, #1
- ARM GAS /tmp/ccOwl4Y6.s page 271
+ ARM GAS /tmp/ccRP6lD5.s page 271
4057:Middlewares/Third_Party/FatFs/src/ff.c **** if (fp->fptr % SS(fs) && dsc != fp->sect) { /* Refill sector cache if needed */
@@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7404 .loc 1 4068 15 is_stmt 0 view .LVU2480
7405 010c 2562 str r5, [r4, #32]
7406 010e 91E7 b .L525
- ARM GAS /tmp/ccOwl4Y6.s page 272
+ ARM GAS /tmp/ccRP6lD5.s page 272
7407 .LVL854:
@@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7446 .L572:
4066:Middlewares/Third_Party/FatFs/src/ff.c **** #endif
7447 .loc 1 4066 57 is_stmt 1 discriminator 1 view .LVU2496
- ARM GAS /tmp/ccOwl4Y6.s page 273
+ ARM GAS /tmp/ccRP6lD5.s page 273
7448 0136 0126 movs r6, #1
@@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7485 0154 019A ldr r2, [sp, #4]
7486 0156 B2F80A80 ldrh r8, [r2, #10]
4086:Middlewares/Third_Party/FatFs/src/ff.c **** if (ifptr > 0 &&
- ARM GAS /tmp/ccOwl4Y6.s page 274
+ ARM GAS /tmp/ccRP6lD5.s page 274
7487 .loc 1 4086 29 view .LVU2514
@@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7524 017e 04E0 b .L542
7525 .LVL869:
7526 .L541:
- ARM GAS /tmp/ccOwl4Y6.s page 275
+ ARM GAS /tmp/ccRP6lD5.s page 275
4093:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
@@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7564 019e 2275 strb r2, [r4, #20]
7565 .L555:
4138:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_TINY
- ARM GAS /tmp/ccOwl4Y6.s page 276
+ ARM GAS /tmp/ccRP6lD5.s page 276
7566 .loc 1 4138 3 is_stmt 1 view .LVU2549
@@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7606 .L574:
4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR);
7607 .loc 1 4096 6 is_stmt 1 view .LVU2564
- ARM GAS /tmp/ccOwl4Y6.s page 277
+ ARM GAS /tmp/ccRP6lD5.s page 277
4096:Middlewares/Third_Party/FatFs/src/ff.c **** if (clst == 1) ABORT(fs, FR_INT_ERR);
@@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7645 .loc 1 4098 30 is_stmt 1 discriminator 1 view .LVU2581
4098:Middlewares/Third_Party/FatFs/src/ff.c **** fp->obj.sclust = clst;
7646 .loc 1 4098 30 is_stmt 0 view .LVU2582
- ARM GAS /tmp/ccOwl4Y6.s page 278
+ ARM GAS /tmp/ccRP6lD5.s page 278
7647 01fa 1BE7 b .L525
@@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7686 .LVL884:
4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
7687 .loc 1 4106 18 is_stmt 1 view .LVU2598
- ARM GAS /tmp/ccOwl4Y6.s page 279
+ ARM GAS /tmp/ccRP6lD5.s page 279
4106:Middlewares/Third_Party/FatFs/src/ff.c **** #if !_FS_READONLY
@@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4127:Middlewares/Third_Party/FatFs/src/ff.c **** nsect = clust2sect(fs, clst); /* Current sector */
7726 .loc 1 4127 13 view .LVU2615
7727 024c B7FBF8F3 udiv r3, r7, r8
- ARM GAS /tmp/ccOwl4Y6.s page 280
+ ARM GAS /tmp/ccRP6lD5.s page 280
7728 0250 08FB1373 mls r3, r8, r3, r7
@@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7766 .LVL895:
4123:Middlewares/Third_Party/FatFs/src/ff.c **** fp->clust = clst;
7767 .loc 1 4123 45 is_stmt 0 discriminator 3 view .LVU2632
- ARM GAS /tmp/ccOwl4Y6.s page 281
+ ARM GAS /tmp/ccRP6lD5.s page 281
7768 0270 6675 strb r6, [r4, #21]
@@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7807 0294 95E7 b .L556
7808 .L581:
4142:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag &= (BYTE)~FA_DIRTY;
- ARM GAS /tmp/ccOwl4Y6.s page 282
+ ARM GAS /tmp/ccRP6lD5.s page 282
7809 .loc 1 4142 62 is_stmt 1 discriminator 1 view .LVU2648
@@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7854 .cfi_def_cfa_offset 12
7855 .cfi_offset 4, -12
7856 .cfi_offset 5, -8
- ARM GAS /tmp/ccOwl4Y6.s page 283
+ ARM GAS /tmp/ccRP6lD5.s page 283
7857 .cfi_offset 14, -4
@@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7896 001e 2046 mov r0, r4
7897 0020 05B0 add sp, sp, #20
7898 .LCFI77:
- ARM GAS /tmp/ccOwl4Y6.s page 284
+ ARM GAS /tmp/ccRP6lD5.s page 284
7899 .cfi_remember_state
@@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7937 .loc 1 4196 21 is_stmt 0 view .LVU2690
7938 0044 296A ldr r1, [r5, #32]
7939 0046 0398 ldr r0, [sp, #12]
- ARM GAS /tmp/ccOwl4Y6.s page 285
+ ARM GAS /tmp/ccRP6lD5.s page 285
7940 .LVL917:
@@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
7977 006a 0021 movs r1, #0
7978 006c 2846 mov r0, r5
7979 .LVL920:
- ARM GAS /tmp/ccOwl4Y6.s page 286
+ ARM GAS /tmp/ccRP6lD5.s page 286
4208:Middlewares/Third_Party/FatFs/src/ff.c **** if (!obj->lockid) res = FR_TOO_MANY_OPEN_FILES;
@@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8021 .LFE1228:
8023 .section .text.f_closedir,"ax",%progbits
8024 .align 1
- ARM GAS /tmp/ccOwl4Y6.s page 287
+ ARM GAS /tmp/ccRP6lD5.s page 287
8025 .global f_closedir
@@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4249:Middlewares/Third_Party/FatFs/src/ff.c **** }
8067 .loc 1 4249 4 is_stmt 1 view .LVU2734
4249:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 288
+ ARM GAS /tmp/ccRP6lD5.s page 288
8068 .loc 1 4249 15 is_stmt 0 view .LVU2735
@@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8117 0002 82B0 sub sp, sp, #8
8118 .LCFI84:
8119 .cfi_def_cfa_offset 24
- ARM GAS /tmp/ccOwl4Y6.s page 289
+ ARM GAS /tmp/ccRP6lD5.s page 289
8120 0004 0446 mov r4, r0
@@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8156 .loc 1 4284 5 is_stmt 1 view .LVU2760
8157 0022 2946 mov r1, r5
8158 0024 2046 mov r0, r4
- ARM GAS /tmp/ccOwl4Y6.s page 290
+ ARM GAS /tmp/ccRP6lD5.s page 290
8159 0026 FFF7FEFF bl get_fileinfo
@@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8201 004a 0646 mov r6, r0
8202 004c FAE7 b .L603
8203 .cfi_endproc
- ARM GAS /tmp/ccOwl4Y6.s page 291
+ ARM GAS /tmp/ccRP6lD5.s page 291
8204 .LFE1230:
@@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8250 .L610:
4375:Middlewares/Third_Party/FatFs/src/ff.c **** }
8251 .loc 1 4375 16 is_stmt 1 view .LVU2783
- ARM GAS /tmp/ccOwl4Y6.s page 292
+ ARM GAS /tmp/ccRP6lD5.s page 292
4378:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8292 .LVL954:
4372:Middlewares/Third_Party/FatFs/src/ff.c **** }
8293 .loc 1 4372 14 is_stmt 0 discriminator 1 view .LVU2798
- ARM GAS /tmp/ccOwl4Y6.s page 293
+ ARM GAS /tmp/ccRP6lD5.s page 293
8294 003a FFF7FEFF bl get_fileinfo
@@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8342 .loc 1 4398 2 view .LVU2806
4399:Middlewares/Third_Party/FatFs/src/ff.c ****
8343 .loc 1 4399 2 view .LVU2807
- ARM GAS /tmp/ccOwl4Y6.s page 294
+ ARM GAS /tmp/ccRP6lD5.s page 294
4403:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) {
@@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8381 .loc 1 4411 4 is_stmt 1 view .LVU2824
8382 .LVL962:
4412:Middlewares/Third_Party/FatFs/src/ff.c **** clst = 2; obj.fs = fs;
- ARM GAS /tmp/ccOwl4Y6.s page 295
+ ARM GAS /tmp/ccRP6lD5.s page 295
8383 .loc 1 4412 4 view .LVU2825
@@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8421 .LVL969:
4419:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
8422 .loc 1 4419 25 is_stmt 0 view .LVU2842
- ARM GAS /tmp/ccOwl4Y6.s page 296
+ ARM GAS /tmp/ccRP6lD5.s page 296
8423 004c 079B ldr r3, [sp, #28]
@@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8461 .loc 1 4444 14 view .LVU2858
8462 0072 5146 mov r1, r10
8463 0074 0798 ldr r0, [sp, #28]
- ARM GAS /tmp/ccOwl4Y6.s page 297
+ ARM GAS /tmp/ccRP6lD5.s page 297
8464 0076 FFF7FEFF bl move_window
@@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4451:Middlewares/Third_Party/FatFs/src/ff.c **** } else {
8502 .loc 1 4451 18 is_stmt 0 view .LVU2875
8503 0096 023E subs r6, r6, #2
- ARM GAS /tmp/ccOwl4Y6.s page 298
+ ARM GAS /tmp/ccRP6lD5.s page 298
8504 .LVL982:
@@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8542 00b0 FFF7FEFF bl ld_dword
8543 .LVL988:
4453:Middlewares/Third_Party/FatFs/src/ff.c **** p += 4; i -= 4;
- ARM GAS /tmp/ccOwl4Y6.s page 299
+ ARM GAS /tmp/ccRP6lD5.s page 299
8544 .loc 1 4453 11 discriminator 1 view .LVU2892
@@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8584 .LVL993:
8585 .L628:
8586 .LCFI94:
- ARM GAS /tmp/ccOwl4Y6.s page 300
+ ARM GAS /tmp/ccRP6lD5.s page 300
8587 .cfi_restore_state
@@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8632 000e 0028 cmp r0, #0
8633 0010 49D1 bne .L636
4485:Middlewares/Third_Party/FatFs/src/ff.c **** if (!(fp->flag & FA_WRITE)) LEAVE_FF(fs, FR_DENIED); /* Check access mode */
- ARM GAS /tmp/ccOwl4Y6.s page 301
+ ARM GAS /tmp/ccRP6lD5.s page 301
8634 .loc 1 4485 27 discriminator 2 view .LVU2918
@@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED;
8673 .loc 1 4501 23 is_stmt 0 view .LVU2934
8674 003a A369 ldr r3, [r4, #24]
- ARM GAS /tmp/ccOwl4Y6.s page 302
+ ARM GAS /tmp/ccRP6lD5.s page 302
4501:Middlewares/Third_Party/FatFs/src/ff.c **** fp->flag |= FA_MODIFIED;
@@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4494:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR;
8714 .loc 1 4494 4 is_stmt 1 view .LVU2950
4495:Middlewares/Third_Party/FatFs/src/ff.c **** if (ncl == 1) res = FR_INT_ERR;
- ARM GAS /tmp/ccOwl4Y6.s page 303
+ ARM GAS /tmp/ccRP6lD5.s page 303
8715 .loc 1 4495 4 view .LVU2951
@@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8755 .loc 1 4496 22 discriminator 1 view .LVU2965
8756 009a 0225 movs r5, #2
8757 009c CDE7 b .L638
- ARM GAS /tmp/ccOwl4Y6.s page 304
+ ARM GAS /tmp/ccRP6lD5.s page 304
8758 .LVL1008:
@@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8805 .cfi_offset 5, -16
8806 .cfi_offset 6, -12
8807 .cfi_offset 7, -8
- ARM GAS /tmp/ccOwl4Y6.s page 305
+ ARM GAS /tmp/ccRP6lD5.s page 305
8808 .cfi_offset 14, -4
@@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8848 .L656:
8849 .LCFI101:
8850 .cfi_restore_state
- ARM GAS /tmp/ccOwl4Y6.s page 306
+ ARM GAS /tmp/ccRP6lD5.s page 306
4543:Middlewares/Third_Party/FatFs/src/ff.c **** res = follow_path(&dj, path); /* Follow the file path */
@@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4555:Middlewares/Third_Party/FatFs/src/ff.c **** res = FR_DENIED; /* Cannot remove R/O object */
8888 .loc 1 4555 8 view .LVU3006
8889 0046 15F0010F tst r5, #1
- ARM GAS /tmp/ccOwl4Y6.s page 307
+ ARM GAS /tmp/ccRP6lD5.s page 307
8890 004a 39D1 bne .L653
@@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8930 .loc 1 4597 8 view .LVU3020
8931 0076 D0B9 cbnz r0, .L658
8932 .LVL1029:
- ARM GAS /tmp/ccOwl4Y6.s page 308
+ ARM GAS /tmp/ccRP6lD5.s page 308
8933 .L651:
@@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
8971 009a 04A8 add r0, sp, #16
8972 .LVL1035:
4588:Middlewares/Third_Party/FatFs/src/ff.c **** if (res == FR_OK) res = FR_DENIED; /* Not empty? */
- ARM GAS /tmp/ccOwl4Y6.s page 309
+ ARM GAS /tmp/ccRP6lD5.s page 309
8973 .loc 1 4588 14 view .LVU3037
@@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9018 .thumb
9019 .thumb_func
9021 f_mkdir:
- ARM GAS /tmp/ccOwl4Y6.s page 310
+ ARM GAS /tmp/ccRP6lD5.s page 310
9022 .LVL1041:
@@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9063 0014 0493 str r3, [sp, #16]
4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs);
9064 .loc 1 4636 2 is_stmt 1 view .LVU3061
- ARM GAS /tmp/ccOwl4Y6.s page 311
+ ARM GAS /tmp/ccRP6lD5.s page 311
4636:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs);
@@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9105 .loc 1 4644 4 is_stmt 1 view .LVU3075
4644:Middlewares/Third_Party/FatFs/src/ff.c **** dj.obj.objsize = (DWORD)fs->csize * SS(fs);
9106 .loc 1 4644 10 is_stmt 0 view .LVU3076
- ARM GAS /tmp/ccOwl4Y6.s page 312
+ ARM GAS /tmp/ccRP6lD5.s page 312
9107 0038 0021 movs r1, #0
@@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9146 .L662:
4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME();
9147 .loc 1 4650 4 is_stmt 1 view .LVU3092
- ARM GAS /tmp/ccOwl4Y6.s page 313
+ ARM GAS /tmp/ccRP6lD5.s page 313
4650:Middlewares/Third_Party/FatFs/src/ff.c **** tm = GET_FATTIME();
@@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9188 0088 0B22 movs r2, #11
9189 008a 2021 movs r1, #32
9190 008c 4046 mov r0, r8
- ARM GAS /tmp/ccOwl4Y6.s page 314
+ ARM GAS /tmp/ccRP6lD5.s page 314
9191 008e FFF7FEFF bl mem_set
@@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9230 00c8 0398 ldr r0, [sp, #12]
9231 00ca 0378 ldrb r3, [r0] @ zero_extendqisi2
4664:Middlewares/Third_Party/FatFs/src/ff.c **** st_clust(fs, dir + SZDIRE, pcl);
- ARM GAS /tmp/ccOwl4Y6.s page 315
+ ARM GAS /tmp/ccRP6lD5.s page 315
9232 .loc 1 4664 9 view .LVU3122
@@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9271 00f0 039B ldr r3, [sp, #12]
9272 00f2 9A89 ldrh r2, [r3, #12]
9273 00f4 0021 movs r1, #0
- ARM GAS /tmp/ccOwl4Y6.s page 316
+ ARM GAS /tmp/ccRP6lD5.s page 316
9274 00f6 4046 mov r0, r8
@@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9315 .loc 1 4664 61 discriminator 2 view .LVU3150
9316 0118 DAE7 b .L665
9317 .LVL1083:
- ARM GAS /tmp/ccOwl4Y6.s page 317
+ ARM GAS /tmp/ccRP6lD5.s page 317
9318 .L667:
@@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
9360 .loc 1 4694 6 view .LVU3163
4694:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
- ARM GAS /tmp/ccOwl4Y6.s page 318
+ ARM GAS /tmp/ccRP6lD5.s page 318
9361 .loc 1 4694 20 is_stmt 0 view .LVU3164
@@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9408 0002 A3B0 sub sp, sp, #140
9409 .LCFI107:
9410 .cfi_def_cfa_offset 152
- ARM GAS /tmp/ccOwl4Y6.s page 319
+ ARM GAS /tmp/ccRP6lD5.s page 319
9411 0004 0190 str r0, [sp, #4]
@@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs);
9451 .loc 1 4733 3 is_stmt 1 view .LVU3188
4733:Middlewares/Third_Party/FatFs/src/ff.c **** INIT_NAMBUF(fs);
- ARM GAS /tmp/ccOwl4Y6.s page 320
+ ARM GAS /tmp/ccRP6lD5.s page 320
9452 .loc 1 4733 14 is_stmt 0 view .LVU3189
@@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9491 004c 1E99 ldr r1, [sp, #120]
9492 004e 0B31 adds r1, r1, #11
9493 0050 03A8 add r0, sp, #12
- ARM GAS /tmp/ccOwl4Y6.s page 321
+ ARM GAS /tmp/ccRP6lD5.s page 321
9494 0052 FFF7FEFF bl mem_cpy
@@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9536 .loc 1 4775 8 is_stmt 0 view .LVU3216
9537 0084 0428 cmp r0, #4
9538 0086 0CD0 beq .L687
- ARM GAS /tmp/ccOwl4Y6.s page 322
+ ARM GAS /tmp/ccRP6lD5.s page 322
9539 .LVL1113:
@@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9578 .loc 1 4778 7 is_stmt 1 view .LVU3231
4778:Middlewares/Third_Party/FatFs/src/ff.c **** mem_cpy(dir + 13, buf + 2, 19);
9579 .loc 1 4778 11 is_stmt 0 view .LVU3232
- ARM GAS /tmp/ccOwl4Y6.s page 323
+ ARM GAS /tmp/ccRP6lD5.s page 323
9580 00ae 129D ldr r5, [sp, #72]
@@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9620 .LVL1124:
9621 00e8 0146 mov r1, r0
4783:Middlewares/Third_Party/FatFs/src/ff.c **** if (!dw) {
- ARM GAS /tmp/ccOwl4Y6.s page 324
+ ARM GAS /tmp/ccRP6lD5.s page 324
9622 .loc 1 4783 13 discriminator 1 view .LVU3247
@@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9662 .LVL1131:
4791:Middlewares/Third_Party/FatFs/src/ff.c **** fs->wflag = 1;
9663 .loc 1 4791 10 is_stmt 0 view .LVU3262
- ARM GAS /tmp/ccOwl4Y6.s page 325
+ ARM GAS /tmp/ccRP6lD5.s page 325
9664 0116 FFF7FEFF bl st_clust
@@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9705 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
9706 .LCFI110:
9707 .cfi_def_cfa_offset 36
- ARM GAS /tmp/ccOwl4Y6.s page 326
+ ARM GAS /tmp/ccRP6lD5.s page 326
9708 .cfi_offset 4, -36
@@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9745 .loc 1 5328 5 is_stmt 0 view .LVU3284
9746 0014 0028 cmp r0, #0
5328:Middlewares/Third_Party/FatFs/src/ff.c **** if (FatFs[vol]) FatFs[vol]->fs_type = 0; /* Clear the volume */
- ARM GAS /tmp/ccOwl4Y6.s page 327
+ ARM GAS /tmp/ccRP6lD5.s page 327
9747 .loc 1 5328 5 view .LVU3285
@@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9784 0042 2046 mov r0, r4
9785 .LVL1141:
5337:Middlewares/Third_Party/FatFs/src/ff.c **** #if _MAX_SS != _MIN_SS /* Get sector size of the medium if variable sector size cfg. */
- ARM GAS /tmp/ccOwl4Y6.s page 328
+ ARM GAS /tmp/ccRP6lD5.s page 328
9786 .loc 1 5337 6 view .LVU3303
@@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9826 007e 00F2D082 bhi .L742
5340:Middlewares/Third_Party/FatFs/src/ff.c **** #else
9827 .loc 1 5340 48 discriminator 2 view .LVU3318
- ARM GAS /tmp/ccOwl4Y6.s page 329
+ ARM GAS /tmp/ccRP6lD5.s page 329
9828 0082 5A1E subs r2, r3, #1
@@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9866 00b6 00F0BE82 beq .L747
5354:Middlewares/Third_Party/FatFs/src/ff.c **** /* Get partition information from partition table in the MBR */
9867 .loc 1 5354 2 is_stmt 1 view .LVU3335
- ARM GAS /tmp/ccOwl4Y6.s page 330
+ ARM GAS /tmp/ccRP6lD5.s page 330
5364:Middlewares/Third_Party/FatFs/src/ff.c **** b_vol = (opt & FM_SFD) ? 0 : 63; /* Volume start sector */
@@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9905 00ea 802D cmp r5, #128
9906 00ec 00F2B882 bhi .L752
5379:Middlewares/Third_Party/FatFs/src/ff.c **** if ((opt & FM_ANY) == FM_FAT32 || !(opt & FM_FAT)) { /* FAT32 only or no-FAT? */
- ARM GAS /tmp/ccOwl4Y6.s page 331
+ ARM GAS /tmp/ccRP6lD5.s page 331
9907 .loc 1 5379 3 is_stmt 1 view .LVU3353
@@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9950 0136 1D46 mov r5, r3
9951 .LVL1152:
5604:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 332
+ ARM GAS /tmp/ccRP6lD5.s page 332
9952 .loc 1 5604 10 view .LVU3365
@@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
9990 015a 0444 add r4, r4, r0
5564:Middlewares/Third_Party/FatFs/src/ff.c **** } else { /* FAT12/16 volume */
9991 .loc 1 5564 8 view .LVU3382
- ARM GAS /tmp/ccOwl4Y6.s page 333
+ ARM GAS /tmp/ccRP6lD5.s page 333
9992 015c 5248 ldr r0, .L793+8
@@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10031 0186 DDD0 beq .L706
5558:Middlewares/Third_Party/FatFs/src/ff.c **** }
10032 .loc 1 5558 36 discriminator 3 view .LVU3398
- ARM GAS /tmp/ccOwl4Y6.s page 334
+ ARM GAS /tmp/ccRP6lD5.s page 334
10033 0188 A342 cmp r3, r4
@@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10072 .loc 1 5575 6 view .LVU3413
5575:Middlewares/Third_Party/FatFs/src/ff.c **** }
10073 .loc 1 5575 18 is_stmt 0 view .LVU3414
- ARM GAS /tmp/ccOwl4Y6.s page 335
+ ARM GAS /tmp/ccRP6lD5.s page 335
10074 01ac 03EB4303 add r3, r3, r3, lsl #1
@@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10113 .LVL1178:
5597:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED;
10114 .loc 1 5597 14 discriminator 1 view .LVU3430
- ARM GAS /tmp/ccOwl4Y6.s page 336
+ ARM GAS /tmp/ccRP6lD5.s page 336
10115 01d4 B8F1010F cmp r8, #1
@@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10153 01fe A846 mov r8, r5
10154 .LVL1183:
10155 .L710:
- ARM GAS /tmp/ccOwl4Y6.s page 337
+ ARM GAS /tmp/ccRP6lD5.s page 337
5570:Middlewares/Third_Party/FatFs/src/ff.c **** if (n_clst > MAX_FAT12) {
@@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5581:Middlewares/Third_Party/FatFs/src/ff.c **** b_data = b_fat + sz_fat * n_fats + sz_dir; /* Data base */
10194 .loc 1 5581 10 is_stmt 0 view .LVU3463
10195 0228 0EEB0B09 add r9, lr, fp
- ARM GAS /tmp/ccOwl4Y6.s page 338
+ ARM GAS /tmp/ccRP6lD5.s page 338
10196 .LVL1191:
@@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10233 0250 C0F00C82 bcc .L759
5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) {
10234 .loc 1 5594 4 is_stmt 1 view .LVU3481
- ARM GAS /tmp/ccOwl4Y6.s page 339
+ ARM GAS /tmp/ccRP6lD5.s page 339
5594:Middlewares/Third_Party/FatFs/src/ff.c **** if (fmt == FS_FAT32) {
@@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED;
10273 .loc 1 5609 6 is_stmt 1 view .LVU3498
5609:Middlewares/Third_Party/FatFs/src/ff.c **** return FR_MKFS_ABORTED;
- ARM GAS /tmp/ccOwl4Y6.s page 340
+ ARM GAS /tmp/ccRP6lD5.s page 340
10274 .loc 1 5609 9 is_stmt 0 view .LVU3499
@@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10318 02c8 40F6F572 movw r2, #4085
10319 02cc BAF1010F cmp r10, #1
10320 02d0 14BF ite ne
- ARM GAS /tmp/ccOwl4Y6.s page 341
+ ARM GAS /tmp/ccRP6lD5.s page 341
10321 02d2 0023 movne r3, #0
@@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10363 0314 3374 strb r3, [r6, #16]
5634:Middlewares/Third_Party/FatFs/src/ff.c **** if (sz_vol < 0x10000) {
10364 .loc 1 5634 3 is_stmt 1 view .LVU3522
- ARM GAS /tmp/ccOwl4Y6.s page 342
+ ARM GAS /tmp/ccRP6lD5.s page 342
10365 0316 06F11100 add r0, r6, #17
@@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10406 .loc 1 5644 6 is_stmt 0 view .LVU3535
10407 035e BAF1030F cmp r10, #3
10408 0362 6BD0 beq .L787
- ARM GAS /tmp/ccOwl4Y6.s page 343
+ ARM GAS /tmp/ccRP6lD5.s page 343
5654:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FATSz16, (WORD)sz_fat); /* FAT size [sector] */
@@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10451 03ac FFF7FEFF bl disk_write
10452 .LVL1224:
5661:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 344
+ ARM GAS /tmp/ccRP6lD5.s page 344
10453 .loc 1 5661 6 discriminator 1 view .LVU3548
@@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5697:Middlewares/Third_Party/FatFs/src/ff.c **** do {
10494 .loc 1 5697 35 view .LVU3562
10495 03e2 DDF82080 ldr r8, [sp, #32]
- ARM GAS /tmp/ccOwl4Y6.s page 345
+ ARM GAS /tmp/ccRP6lD5.s page 345
10496 03e6 0197 str r7, [sp, #4]
@@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10535 .loc 1 5709 3 view .LVU3577
5709:Middlewares/Third_Party/FatFs/src/ff.c **** sys = 0x0C; /* FAT32X */
10536 .loc 1 5709 6 is_stmt 0 view .LVU3578
- ARM GAS /tmp/ccOwl4Y6.s page 346
+ ARM GAS /tmp/ccRP6lD5.s page 346
10537 040e BAF1030F cmp r10, #3
@@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5647:Middlewares/Third_Party/FatFs/src/ff.c **** st_word(buf + BPB_FSInfo32, 1); /* Offset of FSINFO sector (VBR + 1) */
10579 .loc 1 5647 4 view .LVU3591
10580 0454 0221 movs r1, #2
- ARM GAS /tmp/ccOwl4Y6.s page 347
+ ARM GAS /tmp/ccRP6lD5.s page 347
10581 0456 06F12C00 add r0, r6, #44
@@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10625 04a6 6A49 ldr r1, .L795+12
10626 04a8 3046 mov r0, r6
10627 04aa FFF7FEFF bl st_dword
- ARM GAS /tmp/ccOwl4Y6.s page 348
+ ARM GAS /tmp/ccRP6lD5.s page 348
10628 .LVL1251:
@@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5685:Middlewares/Third_Party/FatFs/src/ff.c **** }
10673 .loc 1 5685 5 is_stmt 0 discriminator 2 view .LVU3611
10674 0500 6FF00701 mvn r1, #7
- ARM GAS /tmp/ccOwl4Y6.s page 349
+ ARM GAS /tmp/ccRP6lD5.s page 349
10675 .L731:
@@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10716 .loc 1 5693 13 view .LVU3624
10717 053a B8EB0A08 subs r8, r8, r10
10718 .LVL1265:
- ARM GAS /tmp/ccOwl4Y6.s page 350
+ ARM GAS /tmp/ccRP6lD5.s page 350
5693:Middlewares/Third_Party/FatFs/src/ff.c **** }
@@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10763 0578 4FF00408 mov r8, #4
10764 .LVL1275:
5715:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 351
+ ARM GAS /tmp/ccRP6lD5.s page 351
10765 .loc 1 5715 9 discriminator 1 view .LVU3635
@@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5734:Middlewares/Third_Party/FatFs/src/ff.c **** pte[PTE_System] = sys; /* System type */
10804 .loc 1 5734 19 is_stmt 0 view .LVU3651
10805 05ac 86F8C151 strb r5, [r6, #449]
- ARM GAS /tmp/ccOwl4Y6.s page 352
+ ARM GAS /tmp/ccRP6lD5.s page 352
5735:Middlewares/Third_Party/FatFs/src/ff.c **** n = (b_vol + sz_vol) / (63 * 255); /* (End CHS may be invalid) */
@@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10843 05e8 3B46 mov r3, r7
10844 05ea 2A46 mov r2, r5
10845 05ec 3146 mov r1, r6
- ARM GAS /tmp/ccOwl4Y6.s page 353
+ ARM GAS /tmp/ccRP6lD5.s page 353
10846 05ee 2046 mov r0, r4
@@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
5336:Middlewares/Third_Party/FatFs/src/ff.c **** if (disk_ioctl(pdrv, GET_BLOCK_SIZE, &sz_blk) != RES_OK || !sz_blk || sz_blk > 32768 || (sz_blk &
10889 .loc 1 5336 33 discriminator 1 view .LVU3680
10890 0616 0A20 movs r0, #10
- ARM GAS /tmp/ccOwl4Y6.s page 354
+ ARM GAS /tmp/ccRP6lD5.s page 354
10891 .LVL1294:
@@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10937 .loc 1 5366 30 discriminator 1 view .LVU3688
10938 063e 0E20 movs r0, #14
10939 0640 EAE7 b .L696
- ARM GAS /tmp/ccOwl4Y6.s page 355
+ ARM GAS /tmp/ccRP6lD5.s page 355
10940 .L796:
@@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
10985 .LVL1305:
10986 .L764:
5614:Middlewares/Third_Party/FatFs/src/ff.c **** }
- ARM GAS /tmp/ccOwl4Y6.s page 356
+ ARM GAS /tmp/ccRP6lD5.s page 356
10987 .loc 1 5614 13 view .LVU3698
@@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11035 @ frame_needed = 0, uses_anonymous_args = 0
5835:Middlewares/Third_Party/FatFs/src/ff.c **** int n = 0;
11036 .loc 1 5835 1 is_stmt 0 view .LVU3707
- ARM GAS /tmp/ccOwl4Y6.s page 357
+ ARM GAS /tmp/ccRP6lD5.s page 357
11037 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
@@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11078 0018 AB42 cmp r3, r5
11079 001a 13DD ble .L799
5887:Middlewares/Third_Party/FatFs/src/ff.c **** if (rc != 1) break;
- ARM GAS /tmp/ccOwl4Y6.s page 358
+ ARM GAS /tmp/ccRP6lD5.s page 358
11080 .loc 1 5887 3 is_stmt 1 view .LVU3721
@@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11119 .L799:
5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */
11120 .loc 1 5896 2 is_stmt 1 view .LVU3737
- ARM GAS /tmp/ccOwl4Y6.s page 359
+ ARM GAS /tmp/ccRP6lD5.s page 359
5896:Middlewares/Third_Party/FatFs/src/ff.c **** return n ? buff : 0; /* When no data read (eof or error), return with error. */
@@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11162 .loc 1 6002 1 is_stmt 0 view .LVU3746
11163 0000 10B5 push {r4, lr}
11164 .LCFI118:
- ARM GAS /tmp/ccOwl4Y6.s page 360
+ ARM GAS /tmp/ccRP6lD5.s page 360
11165 .cfi_def_cfa_offset 8
@@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6015:Middlewares/Third_Party/FatFs/src/ff.c **** /* Put a string to the file */
6016:Middlewares/Third_Party/FatFs/src/ff.c **** /*-----------------------------------------------------------------------*/
6017:Middlewares/Third_Party/FatFs/src/ff.c ****
- ARM GAS /tmp/ccOwl4Y6.s page 361
+ ARM GAS /tmp/ccRP6lD5.s page 361
6018:Middlewares/Third_Party/FatFs/src/ff.c **** int f_puts (
@@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6029:Middlewares/Third_Party/FatFs/src/ff.c **** }
11252 .loc 1 6029 1 view .LVU3768
11253 0022 14B0 add sp, sp, #80
- ARM GAS /tmp/ccOwl4Y6.s page 362
+ ARM GAS /tmp/ccRP6lD5.s page 362
11254 .LCFI123:
@@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11296 .cfi_def_cfa_offset 160
11297 0008 0146 mov r1, r0
11298 000a 25AC add r4, sp, #148
- ARM GAS /tmp/ccOwl4Y6.s page 363
+ ARM GAS /tmp/ccRP6lD5.s page 363
11299 000c 54F8045B ldr r5, [r4], #4
@@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6061:Middlewares/Third_Party/FatFs/src/ff.c **** continue;
11336 .loc 1 6061 4 view .LVU3790
6057:Middlewares/Third_Party/FatFs/src/ff.c **** if (c == 0) break; /* End of string */
- ARM GAS /tmp/ccOwl4Y6.s page 364
+ ARM GAS /tmp/ccRP6lD5.s page 364
11337 .loc 1 6057 11 is_stmt 0 view .LVU3791
@@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11377 .LVL1349:
6066:Middlewares/Third_Party/FatFs/src/ff.c **** f = 1; c = *fmt++;
11378 .loc 1 6066 6 view .LVU3808
- ARM GAS /tmp/ccOwl4Y6.s page 365
+ ARM GAS /tmp/ccRP6lD5.s page 365
11379 004a 0126 movs r6, #1
@@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11423 0076 46F00406 orr r6, r6, #4
11424 .LVL1357:
11425 .loc 1 6077 12 is_stmt 1 view .LVU3825
- ARM GAS /tmp/ccOwl4Y6.s page 366
+ ARM GAS /tmp/ccRP6lD5.s page 366
11426 .loc 1 6077 14 is_stmt 0 view .LVU3826
@@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11475 00b4 5C .byte (.L824-.L826)/2
11476 00b5 5C .byte (.L824-.L826)/2
11477 00b6 5A .byte (.L825-.L826)/2
- ARM GAS /tmp/ccOwl4Y6.s page 367
+ ARM GAS /tmp/ccRP6lD5.s page 367
11478 .LVL1361:
@@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11526 .loc 1 6087 13 is_stmt 0 discriminator 1 view .LVU3851
11527 00e6 3746 mov r7, r6
11528 .LVL1370:
- ARM GAS /tmp/ccOwl4Y6.s page 368
+ ARM GAS /tmp/ccRP6lD5.s page 368
11529 .L834:
@@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
6093:Middlewares/Third_Party/FatFs/src/ff.c **** case 'C' : /* Character */
6094:Middlewares/Third_Party/FatFs/src/ff.c **** putc_bfd(&pb, (TCHAR)va_arg(arp, int)); continue;
11578 .loc 1 6094 4 is_stmt 1 view .LVU3866
- ARM GAS /tmp/ccOwl4Y6.s page 369
+ ARM GAS /tmp/ccRP6lD5.s page 369
11579 .loc 1 6094 25 is_stmt 0 view .LVU3867
@@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11613 0138 1268 ldr r2, [r2]
11614 .L842:
11615 .LVL1386:
- ARM GAS /tmp/ccOwl4Y6.s page 370
+ ARM GAS /tmp/ccRP6lD5.s page 370
6115:Middlewares/Third_Party/FatFs/src/ff.c **** if (d == 'D' && (v & 0x80000000)) {
@@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11657 .loc 1 6082 3 view .LVU3896
11658 0160 0220 movs r0, #2
11659 0162 E3E7 b .L829
- ARM GAS /tmp/ccOwl4Y6.s page 371
+ ARM GAS /tmp/ccRP6lD5.s page 371
11660 .L859:
@@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11705 .loc 1 6124 14 is_stmt 1 view .LVU3908
11706 .loc 1 6124 19 is_stmt 0 view .LVU3909
11707 0196 1F2F cmp r7, #31
- ARM GAS /tmp/ccOwl4Y6.s page 372
+ ARM GAS /tmp/ccRP6lD5.s page 372
11708 0198 8CBF ite hi
@@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11749 .loc 1 6125 6 is_stmt 0 view .LVU3925
11750 01c2 16F0080F tst r6, #8
11751 01c6 08D0 beq .L849
- ARM GAS /tmp/ccOwl4Y6.s page 373
+ ARM GAS /tmp/ccRP6lD5.s page 373
11752 .loc 1 6125 14 is_stmt 1 discriminator 1 view .LVU3926
@@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11802 .loc 1 6127 23 discriminator 2 view .LVU3942
11803 0206 C846 mov r8, r9
11804 .LVL1412:
- ARM GAS /tmp/ccOwl4Y6.s page 374
+ ARM GAS /tmp/ccRP6lD5.s page 374
11805 .L854:
@@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11849 @ sp needed
11850 023c BDE8F047 pop {r4, r5, r6, r7, r8, r9, r10, lr}
11851 .LCFI128:
- ARM GAS /tmp/ccOwl4Y6.s page 375
+ ARM GAS /tmp/ccRP6lD5.s page 375
11852 .cfi_restore 14
@@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11903 0040 C0C1C2C3 .ascii "\300\301\302\303\304\305AA\310\311\312\313\314\315\316"
11903 C4C54141
11903 C8C9CACB
- ARM GAS /tmp/ccOwl4Y6.s page 376
+ ARM GAS /tmp/ccRP6lD5.s page 376
11903 CCCDCE
@@ -22542,173 +22542,173 @@ ARM GAS /tmp/ccOwl4Y6.s page 1
11933 .file 8 "Middlewares/Third_Party/FatFs/src/diskio.h"
11934 .file 9 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdarg.h"
11935 .file 10 ""
- ARM GAS /tmp/ccOwl4Y6.s page 377
+ ARM GAS /tmp/ccRP6lD5.s page 377
DEFINED SYMBOLS
*ABS*:00000000 ff.c
- /tmp/ccOwl4Y6.s:20 .text.ld_word:00000000 $t
- /tmp/ccOwl4Y6.s:25 .text.ld_word:00000000 ld_word
- /tmp/ccOwl4Y6.s:52 .text.ld_dword:00000000 $t
- /tmp/ccOwl4Y6.s:57 .text.ld_dword:00000000 ld_dword
- /tmp/ccOwl4Y6.s:96 .text.st_word:00000000 $t
- /tmp/ccOwl4Y6.s:101 .text.st_word:00000000 st_word
- /tmp/ccOwl4Y6.s:125 .text.st_dword:00000000 $t
- /tmp/ccOwl4Y6.s:130 .text.st_dword:00000000 st_dword
- /tmp/ccOwl4Y6.s:169 .text.mem_cpy:00000000 $t
- /tmp/ccOwl4Y6.s:174 .text.mem_cpy:00000000 mem_cpy
- /tmp/ccOwl4Y6.s:214 .text.mem_set:00000000 $t
- /tmp/ccOwl4Y6.s:219 .text.mem_set:00000000 mem_set
- /tmp/ccOwl4Y6.s:246 .text.mem_cmp:00000000 $t
- /tmp/ccOwl4Y6.s:251 .text.mem_cmp:00000000 mem_cmp
- /tmp/ccOwl4Y6.s:294 .text.chk_chr:00000000 $t
- /tmp/ccOwl4Y6.s:299 .text.chk_chr:00000000 chk_chr
- /tmp/ccOwl4Y6.s:335 .text.chk_lock:00000000 $t
- /tmp/ccOwl4Y6.s:340 .text.chk_lock:00000000 chk_lock
- /tmp/ccOwl4Y6.s:477 .text.chk_lock:00000078 $d
- /tmp/ccOwl4Y6.s:11911 .bss.Files:00000000 Files
- /tmp/ccOwl4Y6.s:482 .text.enq_lock:00000000 $t
- /tmp/ccOwl4Y6.s:487 .text.enq_lock:00000000 enq_lock
- /tmp/ccOwl4Y6.s:531 .text.enq_lock:0000001c $d
- /tmp/ccOwl4Y6.s:536 .text.inc_lock:00000000 $t
- /tmp/ccOwl4Y6.s:541 .text.inc_lock:00000000 inc_lock
- /tmp/ccOwl4Y6.s:711 .text.inc_lock:0000009c $d
- /tmp/ccOwl4Y6.s:716 .text.dec_lock:00000000 $t
- /tmp/ccOwl4Y6.s:721 .text.dec_lock:00000000 dec_lock
- /tmp/ccOwl4Y6.s:802 .text.dec_lock:0000003c $d
- /tmp/ccOwl4Y6.s:807 .text.clear_lock:00000000 $t
- /tmp/ccOwl4Y6.s:812 .text.clear_lock:00000000 clear_lock
- /tmp/ccOwl4Y6.s:889 .text.clear_lock:00000038 $d
- /tmp/ccOwl4Y6.s:894 .text.clust2sect:00000000 $t
- /tmp/ccOwl4Y6.s:899 .text.clust2sect:00000000 clust2sect
- /tmp/ccOwl4Y6.s:939 .text.clmt_clust:00000000 $t
- /tmp/ccOwl4Y6.s:944 .text.clmt_clust:00000000 clmt_clust
- /tmp/ccOwl4Y6.s:1015 .text.ld_clust:00000000 $t
- /tmp/ccOwl4Y6.s:1020 .text.ld_clust:00000000 ld_clust
- /tmp/ccOwl4Y6.s:1076 .text.st_clust:00000000 $t
- /tmp/ccOwl4Y6.s:1081 .text.st_clust:00000000 st_clust
- /tmp/ccOwl4Y6.s:1130 .text.get_fileinfo:00000000 $t
- /tmp/ccOwl4Y6.s:1135 .text.get_fileinfo:00000000 get_fileinfo
- /tmp/ccOwl4Y6.s:1275 .rodata.create_name.str1.4:00000000 $d
- /tmp/ccOwl4Y6.s:1279 .text.create_name:00000000 $t
- /tmp/ccOwl4Y6.s:1284 .text.create_name:00000000 create_name
- /tmp/ccOwl4Y6.s:1516 .text.create_name:000000c8 $d
- /tmp/ccOwl4Y6.s:11899 .rodata.ExCvt:00000000 ExCvt
- /tmp/ccOwl4Y6.s:1522 .text.get_ldnumber:00000000 $t
- /tmp/ccOwl4Y6.s:1527 .text.get_ldnumber:00000000 get_ldnumber
- /tmp/ccOwl4Y6.s:1628 .text.putc_init:00000000 $t
- /tmp/ccOwl4Y6.s:1633 .text.putc_init:00000000 putc_init
- /tmp/ccOwl4Y6.s:1656 .text.validate:00000000 $t
- /tmp/ccOwl4Y6.s:1661 .text.validate:00000000 validate
- /tmp/ccOwl4Y6.s:1770 .text.sync_window:00000000 $t
- /tmp/ccOwl4Y6.s:1775 .text.sync_window:00000000 sync_window
- ARM GAS /tmp/ccOwl4Y6.s page 378
+ /tmp/ccRP6lD5.s:20 .text.ld_word:00000000 $t
+ /tmp/ccRP6lD5.s:25 .text.ld_word:00000000 ld_word
+ /tmp/ccRP6lD5.s:52 .text.ld_dword:00000000 $t
+ /tmp/ccRP6lD5.s:57 .text.ld_dword:00000000 ld_dword
+ /tmp/ccRP6lD5.s:96 .text.st_word:00000000 $t
+ /tmp/ccRP6lD5.s:101 .text.st_word:00000000 st_word
+ /tmp/ccRP6lD5.s:125 .text.st_dword:00000000 $t
+ /tmp/ccRP6lD5.s:130 .text.st_dword:00000000 st_dword
+ /tmp/ccRP6lD5.s:169 .text.mem_cpy:00000000 $t
+ /tmp/ccRP6lD5.s:174 .text.mem_cpy:00000000 mem_cpy
+ /tmp/ccRP6lD5.s:214 .text.mem_set:00000000 $t
+ /tmp/ccRP6lD5.s:219 .text.mem_set:00000000 mem_set
+ /tmp/ccRP6lD5.s:246 .text.mem_cmp:00000000 $t
+ /tmp/ccRP6lD5.s:251 .text.mem_cmp:00000000 mem_cmp
+ /tmp/ccRP6lD5.s:294 .text.chk_chr:00000000 $t
+ /tmp/ccRP6lD5.s:299 .text.chk_chr:00000000 chk_chr
+ /tmp/ccRP6lD5.s:335 .text.chk_lock:00000000 $t
+ /tmp/ccRP6lD5.s:340 .text.chk_lock:00000000 chk_lock
+ /tmp/ccRP6lD5.s:477 .text.chk_lock:00000078 $d
+ /tmp/ccRP6lD5.s:11911 .bss.Files:00000000 Files
+ /tmp/ccRP6lD5.s:482 .text.enq_lock:00000000 $t
+ /tmp/ccRP6lD5.s:487 .text.enq_lock:00000000 enq_lock
+ /tmp/ccRP6lD5.s:531 .text.enq_lock:0000001c $d
+ /tmp/ccRP6lD5.s:536 .text.inc_lock:00000000 $t
+ /tmp/ccRP6lD5.s:541 .text.inc_lock:00000000 inc_lock
+ /tmp/ccRP6lD5.s:711 .text.inc_lock:0000009c $d
+ /tmp/ccRP6lD5.s:716 .text.dec_lock:00000000 $t
+ /tmp/ccRP6lD5.s:721 .text.dec_lock:00000000 dec_lock
+ /tmp/ccRP6lD5.s:802 .text.dec_lock:0000003c $d
+ /tmp/ccRP6lD5.s:807 .text.clear_lock:00000000 $t
+ /tmp/ccRP6lD5.s:812 .text.clear_lock:00000000 clear_lock
+ /tmp/ccRP6lD5.s:889 .text.clear_lock:00000038 $d
+ /tmp/ccRP6lD5.s:894 .text.clust2sect:00000000 $t
+ /tmp/ccRP6lD5.s:899 .text.clust2sect:00000000 clust2sect
+ /tmp/ccRP6lD5.s:939 .text.clmt_clust:00000000 $t
+ /tmp/ccRP6lD5.s:944 .text.clmt_clust:00000000 clmt_clust
+ /tmp/ccRP6lD5.s:1015 .text.ld_clust:00000000 $t
+ /tmp/ccRP6lD5.s:1020 .text.ld_clust:00000000 ld_clust
+ /tmp/ccRP6lD5.s:1076 .text.st_clust:00000000 $t
+ /tmp/ccRP6lD5.s:1081 .text.st_clust:00000000 st_clust
+ /tmp/ccRP6lD5.s:1130 .text.get_fileinfo:00000000 $t
+ /tmp/ccRP6lD5.s:1135 .text.get_fileinfo:00000000 get_fileinfo
+ /tmp/ccRP6lD5.s:1275 .rodata.create_name.str1.4:00000000 $d
+ /tmp/ccRP6lD5.s:1279 .text.create_name:00000000 $t
+ /tmp/ccRP6lD5.s:1284 .text.create_name:00000000 create_name
+ /tmp/ccRP6lD5.s:1516 .text.create_name:000000c8 $d
+ /tmp/ccRP6lD5.s:11899 .rodata.ExCvt:00000000 ExCvt
+ /tmp/ccRP6lD5.s:1522 .text.get_ldnumber:00000000 $t
+ /tmp/ccRP6lD5.s:1527 .text.get_ldnumber:00000000 get_ldnumber
+ /tmp/ccRP6lD5.s:1628 .text.putc_init:00000000 $t
+ /tmp/ccRP6lD5.s:1633 .text.putc_init:00000000 putc_init
+ /tmp/ccRP6lD5.s:1656 .text.validate:00000000 $t
+ /tmp/ccRP6lD5.s:1661 .text.validate:00000000 validate
+ /tmp/ccRP6lD5.s:1770 .text.sync_window:00000000 $t
+ /tmp/ccRP6lD5.s:1775 .text.sync_window:00000000 sync_window
+ ARM GAS /tmp/ccRP6lD5.s page 378
- /tmp/ccOwl4Y6.s:1882 .text.move_window:00000000 $t
- /tmp/ccOwl4Y6.s:1887 .text.move_window:00000000 move_window
- /tmp/ccOwl4Y6.s:1959 .text.check_fs:00000000 $t
- /tmp/ccOwl4Y6.s:1964 .text.check_fs:00000000 check_fs
- /tmp/ccOwl4Y6.s:2060 .text.check_fs:0000006c $d
- /tmp/ccOwl4Y6.s:2067 .text.find_volume:00000000 $t
- /tmp/ccOwl4Y6.s:2072 .text.find_volume:00000000 find_volume
- /tmp/ccOwl4Y6.s:2746 .text.find_volume:00000314 $d
- /tmp/ccOwl4Y6.s:11923 .bss.FatFs:00000000 FatFs
- /tmp/ccOwl4Y6.s:11917 .bss.Fsid:00000000 Fsid
- /tmp/ccOwl4Y6.s:2753 .text.find_volume:00000324 $t
- /tmp/ccOwl4Y6.s:2802 .text.put_fat:00000000 $t
- /tmp/ccOwl4Y6.s:2807 .text.put_fat:00000000 put_fat
- /tmp/ccOwl4Y6.s:3085 .text.get_fat:00000000 $t
- /tmp/ccOwl4Y6.s:3090 .text.get_fat:00000000 get_fat
- /tmp/ccOwl4Y6.s:3338 .text.dir_sdi:00000000 $t
- /tmp/ccOwl4Y6.s:3343 .text.dir_sdi:00000000 dir_sdi
- /tmp/ccOwl4Y6.s:3548 .text.create_chain:00000000 $t
- /tmp/ccOwl4Y6.s:3553 .text.create_chain:00000000 create_chain
- /tmp/ccOwl4Y6.s:3789 .text.remove_chain:00000000 $t
- /tmp/ccOwl4Y6.s:3794 .text.remove_chain:00000000 remove_chain
- /tmp/ccOwl4Y6.s:3955 .text.dir_remove:00000000 $t
- /tmp/ccOwl4Y6.s:3960 .text.dir_remove:00000000 dir_remove
- /tmp/ccOwl4Y6.s:4011 .text.dir_next:00000000 $t
- /tmp/ccOwl4Y6.s:4016 .text.dir_next:00000000 dir_next
- /tmp/ccOwl4Y6.s:4326 .text.dir_find:00000000 $t
- /tmp/ccOwl4Y6.s:4331 .text.dir_find:00000000 dir_find
- /tmp/ccOwl4Y6.s:4439 .text.follow_path:00000000 $t
- /tmp/ccOwl4Y6.s:4444 .text.follow_path:00000000 follow_path
- /tmp/ccOwl4Y6.s:4612 .text.dir_alloc:00000000 $t
- /tmp/ccOwl4Y6.s:4617 .text.dir_alloc:00000000 dir_alloc
- /tmp/ccOwl4Y6.s:4728 .text.dir_register:00000000 $t
- /tmp/ccOwl4Y6.s:4733 .text.dir_register:00000000 dir_register
- /tmp/ccOwl4Y6.s:4807 .text.dir_read:00000000 $t
- /tmp/ccOwl4Y6.s:4812 .text.dir_read:00000000 dir_read
- /tmp/ccOwl4Y6.s:4934 .text.sync_fs:00000000 $t
- /tmp/ccOwl4Y6.s:4939 .text.sync_fs:00000000 sync_fs
- /tmp/ccOwl4Y6.s:5053 .text.sync_fs:00000080 $d
- /tmp/ccOwl4Y6.s:5059 .text.f_mount:00000000 $t
- /tmp/ccOwl4Y6.s:5065 .text.f_mount:00000000 f_mount
- /tmp/ccOwl4Y6.s:5181 .text.f_mount:0000005c $d
- /tmp/ccOwl4Y6.s:5186 .text.f_open:00000000 $t
- /tmp/ccOwl4Y6.s:5192 .text.f_open:00000000 f_open
- /tmp/ccOwl4Y6.s:5748 .text.f_read:00000000 $t
- /tmp/ccOwl4Y6.s:5754 .text.f_read:00000000 f_read
- /tmp/ccOwl4Y6.s:6186 .text.f_write:00000000 $t
- /tmp/ccOwl4Y6.s:6192 .text.f_write:00000000 f_write
- /tmp/ccOwl4Y6.s:6673 .text.putc_bfd:00000000 $t
- /tmp/ccOwl4Y6.s:6678 .text.putc_bfd:00000000 putc_bfd
- /tmp/ccOwl4Y6.s:6790 .text.putc_flush:00000000 $t
- /tmp/ccOwl4Y6.s:6795 .text.putc_flush:00000000 putc_flush
- /tmp/ccOwl4Y6.s:6874 .text.f_sync:00000000 $t
- /tmp/ccOwl4Y6.s:6880 .text.f_sync:00000000 f_sync
- /tmp/ccOwl4Y6.s:7031 .text.f_close:00000000 $t
- /tmp/ccOwl4Y6.s:7037 .text.f_close:00000000 f_close
- /tmp/ccOwl4Y6.s:7106 .text.f_lseek:00000000 $t
- /tmp/ccOwl4Y6.s:7112 .text.f_lseek:00000000 f_lseek
- ARM GAS /tmp/ccOwl4Y6.s page 379
+ /tmp/ccRP6lD5.s:1882 .text.move_window:00000000 $t
+ /tmp/ccRP6lD5.s:1887 .text.move_window:00000000 move_window
+ /tmp/ccRP6lD5.s:1959 .text.check_fs:00000000 $t
+ /tmp/ccRP6lD5.s:1964 .text.check_fs:00000000 check_fs
+ /tmp/ccRP6lD5.s:2060 .text.check_fs:0000006c $d
+ /tmp/ccRP6lD5.s:2067 .text.find_volume:00000000 $t
+ /tmp/ccRP6lD5.s:2072 .text.find_volume:00000000 find_volume
+ /tmp/ccRP6lD5.s:2746 .text.find_volume:00000314 $d
+ /tmp/ccRP6lD5.s:11923 .bss.FatFs:00000000 FatFs
+ /tmp/ccRP6lD5.s:11917 .bss.Fsid:00000000 Fsid
+ /tmp/ccRP6lD5.s:2753 .text.find_volume:00000324 $t
+ /tmp/ccRP6lD5.s:2802 .text.put_fat:00000000 $t
+ /tmp/ccRP6lD5.s:2807 .text.put_fat:00000000 put_fat
+ /tmp/ccRP6lD5.s:3085 .text.get_fat:00000000 $t
+ /tmp/ccRP6lD5.s:3090 .text.get_fat:00000000 get_fat
+ /tmp/ccRP6lD5.s:3338 .text.dir_sdi:00000000 $t
+ /tmp/ccRP6lD5.s:3343 .text.dir_sdi:00000000 dir_sdi
+ /tmp/ccRP6lD5.s:3548 .text.create_chain:00000000 $t
+ /tmp/ccRP6lD5.s:3553 .text.create_chain:00000000 create_chain
+ /tmp/ccRP6lD5.s:3789 .text.remove_chain:00000000 $t
+ /tmp/ccRP6lD5.s:3794 .text.remove_chain:00000000 remove_chain
+ /tmp/ccRP6lD5.s:3955 .text.dir_remove:00000000 $t
+ /tmp/ccRP6lD5.s:3960 .text.dir_remove:00000000 dir_remove
+ /tmp/ccRP6lD5.s:4011 .text.dir_next:00000000 $t
+ /tmp/ccRP6lD5.s:4016 .text.dir_next:00000000 dir_next
+ /tmp/ccRP6lD5.s:4326 .text.dir_find:00000000 $t
+ /tmp/ccRP6lD5.s:4331 .text.dir_find:00000000 dir_find
+ /tmp/ccRP6lD5.s:4439 .text.follow_path:00000000 $t
+ /tmp/ccRP6lD5.s:4444 .text.follow_path:00000000 follow_path
+ /tmp/ccRP6lD5.s:4612 .text.dir_alloc:00000000 $t
+ /tmp/ccRP6lD5.s:4617 .text.dir_alloc:00000000 dir_alloc
+ /tmp/ccRP6lD5.s:4728 .text.dir_register:00000000 $t
+ /tmp/ccRP6lD5.s:4733 .text.dir_register:00000000 dir_register
+ /tmp/ccRP6lD5.s:4807 .text.dir_read:00000000 $t
+ /tmp/ccRP6lD5.s:4812 .text.dir_read:00000000 dir_read
+ /tmp/ccRP6lD5.s:4934 .text.sync_fs:00000000 $t
+ /tmp/ccRP6lD5.s:4939 .text.sync_fs:00000000 sync_fs
+ /tmp/ccRP6lD5.s:5053 .text.sync_fs:00000080 $d
+ /tmp/ccRP6lD5.s:5059 .text.f_mount:00000000 $t
+ /tmp/ccRP6lD5.s:5065 .text.f_mount:00000000 f_mount
+ /tmp/ccRP6lD5.s:5181 .text.f_mount:0000005c $d
+ /tmp/ccRP6lD5.s:5186 .text.f_open:00000000 $t
+ /tmp/ccRP6lD5.s:5192 .text.f_open:00000000 f_open
+ /tmp/ccRP6lD5.s:5748 .text.f_read:00000000 $t
+ /tmp/ccRP6lD5.s:5754 .text.f_read:00000000 f_read
+ /tmp/ccRP6lD5.s:6186 .text.f_write:00000000 $t
+ /tmp/ccRP6lD5.s:6192 .text.f_write:00000000 f_write
+ /tmp/ccRP6lD5.s:6673 .text.putc_bfd:00000000 $t
+ /tmp/ccRP6lD5.s:6678 .text.putc_bfd:00000000 putc_bfd
+ /tmp/ccRP6lD5.s:6790 .text.putc_flush:00000000 $t
+ /tmp/ccRP6lD5.s:6795 .text.putc_flush:00000000 putc_flush
+ /tmp/ccRP6lD5.s:6874 .text.f_sync:00000000 $t
+ /tmp/ccRP6lD5.s:6880 .text.f_sync:00000000 f_sync
+ /tmp/ccRP6lD5.s:7031 .text.f_close:00000000 $t
+ /tmp/ccRP6lD5.s:7037 .text.f_close:00000000 f_close
+ /tmp/ccRP6lD5.s:7106 .text.f_lseek:00000000 $t
+ /tmp/ccRP6lD5.s:7112 .text.f_lseek:00000000 f_lseek
+ ARM GAS /tmp/ccRP6lD5.s page 379
- /tmp/ccOwl4Y6.s:7838 .text.f_opendir:00000000 $t
- /tmp/ccOwl4Y6.s:7844 .text.f_opendir:00000000 f_opendir
- /tmp/ccOwl4Y6.s:8024 .text.f_closedir:00000000 $t
- /tmp/ccOwl4Y6.s:8030 .text.f_closedir:00000000 f_closedir
- /tmp/ccOwl4Y6.s:8096 .text.f_readdir:00000000 $t
- /tmp/ccOwl4Y6.s:8102 .text.f_readdir:00000000 f_readdir
- /tmp/ccOwl4Y6.s:8207 .text.f_stat:00000000 $t
- /tmp/ccOwl4Y6.s:8213 .text.f_stat:00000000 f_stat
- /tmp/ccOwl4Y6.s:8306 .text.f_getfree:00000000 $t
- /tmp/ccOwl4Y6.s:8312 .text.f_getfree:00000000 f_getfree
- /tmp/ccOwl4Y6.s:8597 .text.f_truncate:00000000 $t
- /tmp/ccOwl4Y6.s:8603 .text.f_truncate:00000000 f_truncate
- /tmp/ccOwl4Y6.s:8787 .text.f_unlink:00000000 $t
- /tmp/ccOwl4Y6.s:8793 .text.f_unlink:00000000 f_unlink
- /tmp/ccOwl4Y6.s:9015 .text.f_mkdir:00000000 $t
- /tmp/ccOwl4Y6.s:9021 .text.f_mkdir:00000000 f_mkdir
- /tmp/ccOwl4Y6.s:9388 .text.f_rename:00000000 $t
- /tmp/ccOwl4Y6.s:9394 .text.f_rename:00000000 f_rename
- /tmp/ccOwl4Y6.s:9681 .rodata.f_mkfs.str1.4:00000000 $d
- /tmp/ccOwl4Y6.s:9691 .text.f_mkfs:00000000 $t
- /tmp/ccOwl4Y6.s:9697 .text.f_mkfs:00000000 f_mkfs
- /tmp/ccOwl4Y6.s:10298 .text.f_mkfs:000002a0 $d
- /tmp/ccOwl4Y6.s:11887 .rodata.cst32.1:00000000 cst32.1
- /tmp/ccOwl4Y6.s:11875 .rodata.cst.0:00000000 cst.0
- /tmp/ccOwl4Y6.s:10306 .text.f_mkfs:000002b4 $t
- /tmp/ccOwl4Y6.s:10943 .text.f_mkfs:00000644 $d
- /tmp/ccOwl4Y6.s:10951 .text.f_mkfs:0000065c $t
- /tmp/ccOwl4Y6.s:11023 .text.f_gets:00000000 $t
- /tmp/ccOwl4Y6.s:11029 .text.f_gets:00000000 f_gets
- /tmp/ccOwl4Y6.s:11149 .text.f_putc:00000000 $t
- /tmp/ccOwl4Y6.s:11155 .text.f_putc:00000000 f_putc
- /tmp/ccOwl4Y6.s:11200 .text.f_puts:00000000 $t
- /tmp/ccOwl4Y6.s:11206 .text.f_puts:00000000 f_puts
- /tmp/ccOwl4Y6.s:11263 .text.f_printf:00000000 $t
- /tmp/ccOwl4Y6.s:11269 .text.f_printf:00000000 f_printf
- /tmp/ccOwl4Y6.s:11455 .text.f_printf:000000a0 $d
- /tmp/ccOwl4Y6.s:11872 .rodata.cst.0:00000000 $d
- /tmp/ccOwl4Y6.s:11884 .rodata.cst32.1:00000000 $d
- /tmp/ccOwl4Y6.s:11896 .rodata.ExCvt:00000000 $d
- /tmp/ccOwl4Y6.s:11908 .bss.Files:00000000 $d
- /tmp/ccOwl4Y6.s:11914 .bss.Fsid:00000000 $d
- /tmp/ccOwl4Y6.s:11920 .bss.FatFs:00000000 $d
- /tmp/ccOwl4Y6.s:11479 .text.f_printf:000000b7 $d
- /tmp/ccOwl4Y6.s:11479 .text.f_printf:000000b8 $t
+ /tmp/ccRP6lD5.s:7838 .text.f_opendir:00000000 $t
+ /tmp/ccRP6lD5.s:7844 .text.f_opendir:00000000 f_opendir
+ /tmp/ccRP6lD5.s:8024 .text.f_closedir:00000000 $t
+ /tmp/ccRP6lD5.s:8030 .text.f_closedir:00000000 f_closedir
+ /tmp/ccRP6lD5.s:8096 .text.f_readdir:00000000 $t
+ /tmp/ccRP6lD5.s:8102 .text.f_readdir:00000000 f_readdir
+ /tmp/ccRP6lD5.s:8207 .text.f_stat:00000000 $t
+ /tmp/ccRP6lD5.s:8213 .text.f_stat:00000000 f_stat
+ /tmp/ccRP6lD5.s:8306 .text.f_getfree:00000000 $t
+ /tmp/ccRP6lD5.s:8312 .text.f_getfree:00000000 f_getfree
+ /tmp/ccRP6lD5.s:8597 .text.f_truncate:00000000 $t
+ /tmp/ccRP6lD5.s:8603 .text.f_truncate:00000000 f_truncate
+ /tmp/ccRP6lD5.s:8787 .text.f_unlink:00000000 $t
+ /tmp/ccRP6lD5.s:8793 .text.f_unlink:00000000 f_unlink
+ /tmp/ccRP6lD5.s:9015 .text.f_mkdir:00000000 $t
+ /tmp/ccRP6lD5.s:9021 .text.f_mkdir:00000000 f_mkdir
+ /tmp/ccRP6lD5.s:9388 .text.f_rename:00000000 $t
+ /tmp/ccRP6lD5.s:9394 .text.f_rename:00000000 f_rename
+ /tmp/ccRP6lD5.s:9681 .rodata.f_mkfs.str1.4:00000000 $d
+ /tmp/ccRP6lD5.s:9691 .text.f_mkfs:00000000 $t
+ /tmp/ccRP6lD5.s:9697 .text.f_mkfs:00000000 f_mkfs
+ /tmp/ccRP6lD5.s:10298 .text.f_mkfs:000002a0 $d
+ /tmp/ccRP6lD5.s:11887 .rodata.cst32.1:00000000 cst32.1
+ /tmp/ccRP6lD5.s:11875 .rodata.cst.0:00000000 cst.0
+ /tmp/ccRP6lD5.s:10306 .text.f_mkfs:000002b4 $t
+ /tmp/ccRP6lD5.s:10943 .text.f_mkfs:00000644 $d
+ /tmp/ccRP6lD5.s:10951 .text.f_mkfs:0000065c $t
+ /tmp/ccRP6lD5.s:11023 .text.f_gets:00000000 $t
+ /tmp/ccRP6lD5.s:11029 .text.f_gets:00000000 f_gets
+ /tmp/ccRP6lD5.s:11149 .text.f_putc:00000000 $t
+ /tmp/ccRP6lD5.s:11155 .text.f_putc:00000000 f_putc
+ /tmp/ccRP6lD5.s:11200 .text.f_puts:00000000 $t
+ /tmp/ccRP6lD5.s:11206 .text.f_puts:00000000 f_puts
+ /tmp/ccRP6lD5.s:11263 .text.f_printf:00000000 $t
+ /tmp/ccRP6lD5.s:11269 .text.f_printf:00000000 f_printf
+ /tmp/ccRP6lD5.s:11455 .text.f_printf:000000a0 $d
+ /tmp/ccRP6lD5.s:11872 .rodata.cst.0:00000000 $d
+ /tmp/ccRP6lD5.s:11884 .rodata.cst32.1:00000000 $d
+ /tmp/ccRP6lD5.s:11896 .rodata.ExCvt:00000000 $d
+ /tmp/ccRP6lD5.s:11908 .bss.Files:00000000 $d
+ /tmp/ccRP6lD5.s:11914 .bss.Fsid:00000000 $d
+ /tmp/ccRP6lD5.s:11920 .bss.FatFs:00000000 $d
+ /tmp/ccRP6lD5.s:11479 .text.f_printf:000000b7 $d
+ /tmp/ccRP6lD5.s:11479 .text.f_printf:000000b8 $t
UNDEFINED SYMBOLS
disk_status
diff --git a/build/ff.o b/build/ff.o
index 511f973..012161a 100644
Binary files a/build/ff.o and b/build/ff.o differ
diff --git a/build/ff_gen_drv.lst b/build/ff_gen_drv.lst
index d3197d0..033eca8 100644
--- a/build/ff_gen_drv.lst
+++ b/build/ff_gen_drv.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccmSANvY.s page 1
+ARM GAS /tmp/ccR9MFxz.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****
29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /**
30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active
- ARM GAS /tmp/ccmSANvY.s page 2
+ ARM GAS /tmp/ccR9MFxz.s page 2
31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers.
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
64 .loc 1 48 5 is_stmt 1 view .LVU13
65 .loc 1 48 18 is_stmt 0 view .LVU14
66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2
- ARM GAS /tmp/ccmSANvY.s page 3
+ ARM GAS /tmp/ccR9MFxz.s page 3
67 .LVL2:
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0;
111 .loc 1 41 11 view .LVU32
112 004c 0120 movs r0, #1
- ARM GAS /tmp/ccmSANvY.s page 4
+ ARM GAS /tmp/ccR9MFxz.s page 4
113 .LVL10:
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
156 .global FATFS_UnLinkDriverEx
157 .syntax unified
158 .thumb
- ARM GAS /tmp/ccmSANvY.s page 5
+ ARM GAS /tmp/ccR9MFxz.s page 5
159 .thumb_func
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
195 .LVL15:
196 .loc 1 90 25 view .LVU54
197 001c 0020 movs r0, #0
- ARM GAS /tmp/ccmSANvY.s page 6
+ ARM GAS /tmp/ccR9MFxz.s page 6
198 .LVL16:
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
242 .align 1
243 .global FATFS_UnLinkDriver
244 .syntax unified
- ARM GAS /tmp/ccmSANvY.s page 7
+ ARM GAS /tmp/ccR9MFxz.s page 7
245 .thumb
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccmSANvY.s page 1
283 @ frame_needed = 0, uses_anonymous_args = 0
284 @ link register save eliminated.
118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr;
- ARM GAS /tmp/ccmSANvY.s page 8
+ ARM GAS /tmp/ccR9MFxz.s page 8
285 .loc 1 118 3 view .LVU75
@@ -450,25 +450,25 @@ ARM GAS /tmp/ccmSANvY.s page 1
311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
- ARM GAS /tmp/ccmSANvY.s page 9
+ ARM GAS /tmp/ccR9MFxz.s page 9
DEFINED SYMBOLS
*ABS*:00000000 ff_gen_drv.c
- /tmp/ccmSANvY.s:20 .text.FATFS_LinkDriverEx:00000000 $t
- /tmp/ccmSANvY.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
- /tmp/ccmSANvY.s:120 .text.FATFS_LinkDriverEx:00000050 $d
- /tmp/ccmSANvY.s:303 .bss.disk:00000000 disk
- /tmp/ccmSANvY.s:125 .text.FATFS_LinkDriver:00000000 $t
- /tmp/ccmSANvY.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
- /tmp/ccmSANvY.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t
- /tmp/ccmSANvY.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
- /tmp/ccmSANvY.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d
- /tmp/ccmSANvY.s:242 .text.FATFS_UnLinkDriver:00000000 $t
- /tmp/ccmSANvY.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
- /tmp/ccmSANvY.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t
- /tmp/ccmSANvY.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
- /tmp/ccmSANvY.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d
- /tmp/ccmSANvY.s:300 .bss.disk:00000000 $d
+ /tmp/ccR9MFxz.s:20 .text.FATFS_LinkDriverEx:00000000 $t
+ /tmp/ccR9MFxz.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
+ /tmp/ccR9MFxz.s:120 .text.FATFS_LinkDriverEx:00000050 $d
+ /tmp/ccR9MFxz.s:303 .bss.disk:00000000 disk
+ /tmp/ccR9MFxz.s:125 .text.FATFS_LinkDriver:00000000 $t
+ /tmp/ccR9MFxz.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
+ /tmp/ccR9MFxz.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t
+ /tmp/ccR9MFxz.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
+ /tmp/ccR9MFxz.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d
+ /tmp/ccR9MFxz.s:242 .text.FATFS_UnLinkDriver:00000000 $t
+ /tmp/ccR9MFxz.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
+ /tmp/ccR9MFxz.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t
+ /tmp/ccR9MFxz.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
+ /tmp/ccR9MFxz.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d
+ /tmp/ccR9MFxz.s:300 .bss.disk:00000000 $d
NO UNDEFINED SYMBOLS
diff --git a/build/ff_gen_drv.o b/build/ff_gen_drv.o
index 4d0c450..786db42 100644
Binary files a/build/ff_gen_drv.o and b/build/ff_gen_drv.o differ
diff --git a/build/main.d b/build/main.d
index 48e0675..d4d3ac7 100644
--- a/build/main.d
+++ b/build/main.d
@@ -49,7 +49,7 @@ build/main.o: Src/main.c Inc/main.h \
Middlewares/Third_Party/FatFs/src/ff_gen_drv.h \
Middlewares/Third_Party/FatFs/src/diskio.h \
Middlewares/Third_Party/FatFs/src/ff.h Inc/sd_diskio.h \
- Inc/File_Handling.h Inc/fatfs.h
+ App/Core/app_core.h App/Models/app_types.h
Inc/main.h:
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
Inc/stm32f7xx_hal_conf.h:
@@ -108,5 +108,5 @@ Middlewares/Third_Party/FatFs/src/ff_gen_drv.h:
Middlewares/Third_Party/FatFs/src/diskio.h:
Middlewares/Third_Party/FatFs/src/ff.h:
Inc/sd_diskio.h:
-Inc/File_Handling.h:
-Inc/fatfs.h:
+App/Core/app_core.h:
+App/Models/app_types.h:
diff --git a/build/main.lst b/build/main.lst
index 074a6a8..ac46cc5 100644
--- a/build/main.lst
+++ b/build/main.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccLSPxIe.s page 1
+ARM GAS /tmp/ccDGOsZt.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */
29:Drivers/CMSIS/Include/core_cm7.h **** #endif
30:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 2
+ ARM GAS /tmp/ccDGOsZt.s page 2
31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
86:Drivers/CMSIS/Include/core_cm7.h **** #endif
87:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 3
+ ARM GAS /tmp/ccDGOsZt.s page 3
88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
143:Drivers/CMSIS/Include/core_cm7.h **** #endif
144:Drivers/CMSIS/Include/core_cm7.h **** #else
- ARM GAS /tmp/ccLSPxIe.s page 4
+ ARM GAS /tmp/ccDGOsZt.s page 4
145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!"
200:Drivers/CMSIS/Include/core_cm7.h **** #endif
201:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 5
+ ARM GAS /tmp/ccDGOsZt.s page 5
202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register
257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register
258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/
- ARM GAS /tmp/ccLSPxIe.s page 6
+ ARM GAS /tmp/ccDGOsZt.s page 6
259:Drivers/CMSIS/Include/core_cm7.h **** /**
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
313:Drivers/CMSIS/Include/core_cm7.h **** typedef union
314:Drivers/CMSIS/Include/core_cm7.h **** {
315:Drivers/CMSIS/Include/core_cm7.h **** struct
- ARM GAS /tmp/ccLSPxIe.s page 7
+ ARM GAS /tmp/ccDGOsZt.s page 7
316:Drivers/CMSIS/Include/core_cm7.h **** {
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR
371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR
372:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 8
+ ARM GAS /tmp/ccDGOsZt.s page 8
373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register *
428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U];
429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register
- ARM GAS /tmp/ccLSPxIe.s page 9
+ ARM GAS /tmp/ccDGOsZt.s page 9
430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U];
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U];
485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0
486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1
- ARM GAS /tmp/ccLSPxIe.s page 10
+ ARM GAS /tmp/ccDGOsZt.s page 10
487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB
542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB
543:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 11
+ ARM GAS /tmp/ccDGOsZt.s page 11
544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
598:Drivers/CMSIS/Include/core_cm7.h ****
599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB
600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB
- ARM GAS /tmp/ccLSPxIe.s page 12
+ ARM GAS /tmp/ccDGOsZt.s page 12
601:Drivers/CMSIS/Include/core_cm7.h ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB
656:Drivers/CMSIS/Include/core_cm7.h ****
657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB
- ARM GAS /tmp/ccLSPxIe.s page 13
+ ARM GAS /tmp/ccDGOsZt.s page 13
658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB
713:Drivers/CMSIS/Include/core_cm7.h ****
714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
- ARM GAS /tmp/ccLSPxIe.s page 14
+ ARM GAS /tmp/ccDGOsZt.s page 14
715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
769:Drivers/CMSIS/Include/core_cm7.h ****
770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB
771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB
- ARM GAS /tmp/ccLSPxIe.s page 15
+ ARM GAS /tmp/ccDGOsZt.s page 15
772:Drivers/CMSIS/Include/core_cm7.h ****
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB
827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB
828:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 16
+ ARM GAS /tmp/ccDGOsZt.s page 16
829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB
884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB
885:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 17
+ ARM GAS /tmp/ccDGOsZt.s page 17
886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR:
941:Drivers/CMSIS/Include/core_cm7.h ****
942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR:
- ARM GAS /tmp/ccLSPxIe.s page 18
+ ARM GAS /tmp/ccDGOsZt.s page 18
943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR:
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT
998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT
999:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 19
+ ARM GAS /tmp/ccDGOsZt.s page 19
1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM
1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM
1056:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 20
+ ARM GAS /tmp/ccDGOsZt.s page 20
1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1111:Drivers/CMSIS/Include/core_cm7.h **** */
1112:Drivers/CMSIS/Include/core_cm7.h ****
1113:Drivers/CMSIS/Include/core_cm7.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 21
+ ARM GAS /tmp/ccDGOsZt.s page 21
1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR
1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR
1170:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 22
+ ARM GAS /tmp/ccDGOsZt.s page 22
1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */
1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN
1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN
- ARM GAS /tmp/ccLSPxIe.s page 23
+ ARM GAS /tmp/ccDGOsZt.s page 23
1228:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U];
1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- ARM GAS /tmp/ccLSPxIe.s page 24
+ ARM GAS /tmp/ccDGOsZt.s page 24
1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF
1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF
1341:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 25
+ ARM GAS /tmp/ccDGOsZt.s page 25
1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV
1397:Drivers/CMSIS/Include/core_cm7.h ****
1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV
- ARM GAS /tmp/ccLSPxIe.s page 26
+ ARM GAS /tmp/ccDGOsZt.s page 26
1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU
1454:Drivers/CMSIS/Include/core_cm7.h ****
1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */
- ARM GAS /tmp/ccLSPxIe.s page 27
+ ARM GAS /tmp/ccDGOsZt.s page 27
1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */
1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
1512:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 28
+ ARM GAS /tmp/ccDGOsZt.s page 28
1513:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */
1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS
1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS
- ARM GAS /tmp/ccLSPxIe.s page 29
+ ARM GAS /tmp/ccDGOsZt.s page 29
1570:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register
1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers
- ARM GAS /tmp/ccLSPxIe.s page 30
+ ARM GAS /tmp/ccDGOsZt.s page 30
1627:Drivers/CMSIS/Include/core_cm7.h **** @{
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1681:Drivers/CMSIS/Include/core_cm7.h ****
1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core
1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core
- ARM GAS /tmp/ccLSPxIe.s page 31
+ ARM GAS /tmp/ccDGOsZt.s page 31
1684:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value.
1740:Drivers/CMSIS/Include/core_cm7.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 32
+ ARM GAS /tmp/ccDGOsZt.s page 32
1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions
1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions
1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions
- ARM GAS /tmp/ccLSPxIe.s page 33
+ ARM GAS /tmp/ccDGOsZt.s page 33
1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu
1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu
1854:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccLSPxIe.s page 34
+ ARM GAS /tmp/ccDGOsZt.s page 34
1855:Drivers/CMSIS/Include/core_cm7.h ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled.
1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled.
1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative.
- ARM GAS /tmp/ccLSPxIe.s page 35
+ ARM GAS /tmp/ccDGOsZt.s page 35
1912:Drivers/CMSIS/Include/core_cm7.h **** */
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number.
1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative.
- ARM GAS /tmp/ccLSPxIe.s page 36
+ ARM GAS /tmp/ccDGOsZt.s page 36
1969:Drivers/CMSIS/Include/core_cm7.h **** */
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2023:Drivers/CMSIS/Include/core_cm7.h **** */
2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
2025:Drivers/CMSIS/Include/core_cm7.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 37
+ ARM GAS /tmp/ccDGOsZt.s page 37
2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0)
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
36 .cfi_def_cfa_offset 4
37 .cfi_offset 14, -4
2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used
- ARM GAS /tmp/ccLSPxIe.s page 38
+ ARM GAS /tmp/ccDGOsZt.s page 38
38 .loc 2 2073 3 is_stmt 1 view .LVU2
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2078:Drivers/CMSIS/Include/core_cm7.h ****
81 .loc 2 2078 109 discriminator 2 view .LVU19
82 003a 0023 movs r3, #0
- ARM GAS /tmp/ccLSPxIe.s page 39
+ ARM GAS /tmp/ccDGOsZt.s page 39
83 003c EEE7 b .L2
@@ -2290,7 +2290,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
90 .thumb
91 .thumb_func
93 MX_SDMMC1_SD_Init:
- 94 .LFB1190:
+ 94 .LFB1187:
1:Src/main.c **** /* USER CODE BEGIN Header */
2:Src/main.c **** /**
3:Src/main.c **** ******************************************************************************
@@ -2315,2324 +2315,1075 @@ ARM GAS /tmp/ccLSPxIe.s page 1
22:Src/main.c ****
23:Src/main.c **** /* Private includes ----------------------------------------------------------*/
24:Src/main.c **** /* USER CODE BEGIN Includes */
- 25:Src/main.c **** // #include "math.h"
- 26:Src/main.c **** #include "File_Handling.h"
- 27:Src/main.c **** #include
- 28:Src/main.c **** /* USER CODE END Includes */
- 29:Src/main.c ****
- 30:Src/main.c **** /* Private typedef -----------------------------------------------------------*/
- 31:Src/main.c **** /* USER CODE BEGIN PTD */
+ 25:Src/main.c **** #include "app_core.h"
+ 26:Src/main.c **** /* USER CODE END Includes */
+ 27:Src/main.c ****
+ 28:Src/main.c **** /* Private typedef -----------------------------------------------------------*/
+ 29:Src/main.c **** /* USER CODE BEGIN PTD */
+ 30:Src/main.c ****
+ 31:Src/main.c **** /* USER CODE END PTD */
32:Src/main.c ****
- 33:Src/main.c **** /* USER CODE END PTD */
- 34:Src/main.c ****
- 35:Src/main.c **** /* Private define ------------------------------------------------------------*/
- 36:Src/main.c **** /* USER CODE BEGIN PD */
- 37:Src/main.c **** // AD9102 register addresses and bit fields (see ad9102.pdf)
- 38:Src/main.c **** #define AD9102_REG_RAMUPDATE 0x001Du
- 39:Src/main.c **** #define AD9102_REG_PAT_STATUS 0x001Eu
- 40:Src/main.c **** #define AD9102_REG_PAT_TYPE 0x001Fu
- 41:Src/main.c **** #define AD9102_REG_SPICONFIG 0x0000u
- 42:Src/main.c **** #define AD9102_REG_POWERCONFIG 0x0001u
- 43:Src/main.c **** #define AD9102_REG_CLOCKCONFIG 0x0002u
- 44:Src/main.c **** #define AD9102_REG_WAV_CONFIG 0x0027u
- 45:Src/main.c **** #define AD9102_REG_PAT_TIMEBASE 0x0028u
- 46:Src/main.c **** #define AD9102_REG_PAT_PERIOD 0x0029u
- 47:Src/main.c **** #define AD9102_REG_DAC_PAT 0x002Bu
- ARM GAS /tmp/ccLSPxIe.s page 40
+ 33:Src/main.c **** /* Private define ------------------------------------------------------------*/
+ 34:Src/main.c **** /* USER CODE BEGIN PD */
+ 35:Src/main.c **** /* USER CODE END PD */
+ 36:Src/main.c ****
+ 37:Src/main.c **** /* Private macro -------------------------------------------------------------*/
+ 38:Src/main.c **** /* USER CODE BEGIN PM */
+ 39:Src/main.c ****
+ 40:Src/main.c **** /* USER CODE END PM */
+ 41:Src/main.c ****
+ 42:Src/main.c **** /* Private variables ---------------------------------------------------------*/
+ 43:Src/main.c **** ADC_HandleTypeDef hadc1;
+ 44:Src/main.c **** ADC_HandleTypeDef hadc3;
+ 45:Src/main.c ****
+ 46:Src/main.c **** SD_HandleTypeDef hsd1;
+ 47:Src/main.c ****
+ ARM GAS /tmp/ccDGOsZt.s page 40
- 48:Src/main.c **** #define AD9102_REG_SAW_CONFIG 0x0037u
- 49:Src/main.c **** #define AD9102_REG_START_DLY 0x005Cu
- 50:Src/main.c **** #define AD9102_REG_START_ADDR 0x005Du
- 51:Src/main.c **** #define AD9102_REG_STOP_ADDR 0x005Eu
- 52:Src/main.c **** #define AD9102_REG_SRAM_DATA_BASE 0x6000u
- 53:Src/main.c **** #define AD9102_REG_CFG_ERROR 0x0060u
+ 48:Src/main.c **** TIM_HandleTypeDef htim1;
+ 49:Src/main.c ****
+ 50:Src/main.c **** UART_HandleTypeDef huart8;
+ 51:Src/main.c ****
+ 52:Src/main.c **** /* USER CODE BEGIN PV */
+ 53:Src/main.c **** /* USER CODE END PV */
54:Src/main.c ****
- 55:Src/main.c **** #define AD9102_PAT_STATUS_RUN (1u << 0)
- 56:Src/main.c ****
- 57:Src/main.c **** #define AD9102_WAV_PRESTORE_SEL_SHIFT 4
- 58:Src/main.c **** #define AD9102_WAV_WAVE_SEL_SHIFT 0
- 59:Src/main.c **** #define AD9102_WAV_PRESTORE_SAW 1u
- 60:Src/main.c **** #define AD9102_WAV_WAVE_SEL_PRESTORE 1u
- 61:Src/main.c ****
- 62:Src/main.c **** #define AD9102_SAW_STEP_SHIFT 2
- 63:Src/main.c **** #define AD9102_SAW_TYPE_SHIFT 0
- 64:Src/main.c **** #define AD9102_SAW_TYPE_UP 0u
- 65:Src/main.c **** #define AD9102_SAW_TYPE_DOWN 1u
- 66:Src/main.c **** #define AD9102_SAW_TYPE_TRI 2u
- 67:Src/main.c **** #define AD9102_SAW_TYPE_ZERO 3u
- 68:Src/main.c ****
- 69:Src/main.c **** #define AD9102_REG_COUNT 66u
- 70:Src/main.c ****
- 71:Src/main.c **** #define AD9102_EX4_WAV_CONFIG 0x3212u
- 72:Src/main.c **** #define AD9102_EX4_PAT_TIMEBASE 0x0121u
- 73:Src/main.c **** #define AD9102_EX4_PAT_PERIOD 0xFFFFu
- 74:Src/main.c **** #define AD9102_EX4_SAW_CONFIG 0x0606u
+ 55:Src/main.c **** /* Private function prototypes -----------------------------------------------*/
+ 56:Src/main.c **** void SystemClock_Config(void);
+ 57:Src/main.c **** static void MX_GPIO_Init(void);
+ 58:Src/main.c **** static void MX_DMA_Init(void);
+ 59:Src/main.c **** static void MX_SPI4_Init(void);
+ 60:Src/main.c **** static void MX_TIM2_Init(void);
+ 61:Src/main.c **** static void MX_TIM5_Init(void);
+ 62:Src/main.c **** static void MX_ADC1_Init(void);
+ 63:Src/main.c **** static void MX_ADC3_Init(void);
+ 64:Src/main.c **** static void MX_SPI2_Init(void);
+ 65:Src/main.c **** static void MX_SPI5_Init(void);
+ 66:Src/main.c **** static void MX_SPI6_Init(void);
+ 67:Src/main.c **** static void MX_USART1_UART_Init(void);
+ 68:Src/main.c **** static void MX_SDMMC1_SD_Init(void);
+ 69:Src/main.c **** static void MX_TIM7_Init(void);
+ 70:Src/main.c **** static void MX_TIM6_Init(void);
+ 71:Src/main.c **** static void MX_UART8_Init(void);
+ 72:Src/main.c **** static void MX_TIM1_Init(void);
+ 73:Src/main.c **** /* USER CODE BEGIN PFP */
+ 74:Src/main.c **** /* USER CODE END PFP */
75:Src/main.c ****
- 76:Src/main.c **** #define AD9102_EX2_WAV_CONFIG 0x3030u
- 77:Src/main.c **** #define AD9102_EX2_DAC_PAT 0x0101u
- 78:Src/main.c **** #define AD9102_EX2_SAW_CONFIG 0x0200u
- 79:Src/main.c **** #define AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT 0x1u
- 80:Src/main.c **** #define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
- 81:Src/main.c **** #define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
- 82:Src/main.c **** #define AD9102_SRAM_HOLD_DEFAULT 0x1u
- 83:Src/main.c **** #define AD9102_SRAM_AMP_DEFAULT 8191u
- 84:Src/main.c **** #define AD9102_SRAM_SAMPLES_DEFAULT 16u
- 85:Src/main.c **** #define AD9102_SRAM_MAX_SAMPLES 4096u
- 86:Src/main.c **** #define AD9102_SRAM_RAMP_MIN (-8192)
- 87:Src/main.c **** #define AD9102_SRAM_RAMP_MAX (8191)
- 88:Src/main.c **** #define AD9102_SRAM_RAMP_SPAN (AD9102_SRAM_RAMP_MAX - AD9102_SRAM_RAMP_MIN)
- 89:Src/main.c ****
- 90:Src/main.c **** #define AD9102_SAW_STEP_DEFAULT 1u
- 91:Src/main.c **** #define AD9102_PAT_PERIOD_BASE_DEFAULT 0x2u
- 92:Src/main.c **** #define AD9102_START_DELAY_BASE_DEFAULT 0x1u
- 93:Src/main.c **** #define AD9102_PAT_TIMEBASE_HOLD_DEFAULT 0x1u
- 94:Src/main.c **** #define AD9102_PAT_PERIOD_DEFAULT 0xFFFFu
+ 76:Src/main.c **** /* Private user code ---------------------------------------------------------*/
+ 77:Src/main.c **** /* USER CODE BEGIN 0 */
+ 78:Src/main.c ****
+ 79:Src/main.c **** /* USER CODE END 0 */
+ 80:Src/main.c ****
+ 81:Src/main.c **** /**
+ 82:Src/main.c **** * @brief The application entry point.
+ 83:Src/main.c **** * @retval int
+ 84:Src/main.c **** */
+ 85:Src/main.c **** int main(void)
+ 86:Src/main.c **** {
+ 87:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
+ 88:Src/main.c ****
+ 89:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
+ 90:Src/main.c **** HAL_Init();
+ 91:Src/main.c ****
+ 92:Src/main.c **** /* USER CODE BEGIN Init */
+ 93:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/
+ 94:Src/main.c **** /* USER CODE END Init */
95:Src/main.c ****
- 96:Src/main.c **** #define AD9102_FLAG_ENABLE 0x0001u
- 97:Src/main.c **** #define AD9102_FLAG_TRIANGLE 0x0002u
- 98:Src/main.c **** #define AD9102_FLAG_SRAM 0x0004u
- 99:Src/main.c **** #define AD9102_FLAG_SRAM_FMT 0x0008u
- 100:Src/main.c **** #define AD9102_WAVE_OPCODE_BEGIN 0x0001u
- 101:Src/main.c **** #define AD9102_WAVE_OPCODE_COMMIT 0x0002u
- 102:Src/main.c **** #define AD9102_WAVE_OPCODE_CANCEL 0x0003u
- 103:Src/main.c **** #define AD9102_WAVE_MAX_CHUNK_SAMPLES 12u
- 104:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 41
+ 96:Src/main.c **** /* Configure the system clock */
+ 97:Src/main.c **** SystemClock_Config();
+ 98:Src/main.c ****
+ 99:Src/main.c **** /* USER CODE BEGIN SysInit */
+ 100:Src/main.c ****
+ 101:Src/main.c **** /* USER CODE END SysInit */
+ 102:Src/main.c ****
+ 103:Src/main.c **** /* Initialize all configured peripherals */
+ 104:Src/main.c **** MX_GPIO_Init();
+ ARM GAS /tmp/ccDGOsZt.s page 41
- 105:Src/main.c **** #define AD9833_FLAG_ENABLE 0x0001u
- 106:Src/main.c **** #define AD9833_FLAG_TRIANGLE 0x0002u
- 107:Src/main.c **** #define DS1809_FLAG_UC 0x0001u
- 108:Src/main.c **** #define DS1809_FLAG_DC 0x0002u
- 109:Src/main.c **** #define DS1809_PULSE_MS_DEFAULT 2u
- 110:Src/main.c **** #define STM32_DAC_FLAG_ENABLE 0x0001u
- 111:Src/main.c **** #define STM32_DAC_CODE_MAX 4095u
- 112:Src/main.c **** /* USER CODE END PD */
- 113:Src/main.c ****
- 114:Src/main.c **** /* Private macro -------------------------------------------------------------*/
- 115:Src/main.c **** /* USER CODE BEGIN PM */
- 116:Src/main.c ****
- 117:Src/main.c **** /* USER CODE END PM */
- 118:Src/main.c ****
- 119:Src/main.c **** /* Private variables ---------------------------------------------------------*/
- 120:Src/main.c **** ADC_HandleTypeDef hadc1;
- 121:Src/main.c **** ADC_HandleTypeDef hadc3;
- 122:Src/main.c ****
- 123:Src/main.c **** SD_HandleTypeDef hsd1;
+ 105:Src/main.c **** MX_DMA_Init();
+ 106:Src/main.c **** MX_SPI4_Init();
+ 107:Src/main.c **** MX_FATFS_Init();
+ 108:Src/main.c **** MX_TIM2_Init();
+ 109:Src/main.c **** MX_TIM5_Init();
+ 110:Src/main.c **** MX_ADC1_Init();
+ 111:Src/main.c **** MX_ADC3_Init();
+ 112:Src/main.c **** MX_SPI2_Init();
+ 113:Src/main.c **** MX_SPI5_Init();
+ 114:Src/main.c **** MX_SPI6_Init();
+ 115:Src/main.c **** MX_USART1_UART_Init();
+ 116:Src/main.c **** MX_SDMMC1_SD_Init();
+ 117:Src/main.c **** MX_TIM7_Init();
+ 118:Src/main.c **** MX_TIM6_Init();
+ 119:Src/main.c **** MX_UART8_Init();
+ 120:Src/main.c **** MX_TIM1_Init();
+ 121:Src/main.c **** /* USER CODE BEGIN 2 */
+ 122:Src/main.c **** app_init();
+ 123:Src/main.c **** /* USER CODE END 2 */
124:Src/main.c ****
- 125:Src/main.c **** TIM_HandleTypeDef htim4;
- 126:Src/main.c **** TIM_HandleTypeDef htim8;
- 127:Src/main.c **** TIM_HandleTypeDef htim1;
- 128:Src/main.c **** TIM_HandleTypeDef htim10;
- 129:Src/main.c **** TIM_HandleTypeDef htim11;
- 130:Src/main.c ****
- 131:Src/main.c **** UART_HandleTypeDef huart8;
- 132:Src/main.c ****
- 133:Src/main.c **** /* USER CODE BEGIN PV */
- 134:Src/main.c **** uint32_t TO6, TO6_before, TO6_stop, TO6_uart, SD_SEEK, SD_SLIDE, temp32, TO7, TO7_before, TO7_PID,
- 135:Src/main.c **** uint8_t uart_buf, CPU_state, CPU_state_old, UART_transmission_request, State_Data[2], UART_DATA[DL_
- 136:Src/main.c **** uint16_t UART_rec_incr, UART_header, CS_result, temp16, Long_Data[DL_16], COMMAND[CL_16];//, SD_mat
- 137:Src/main.c **** FRESULT fresult; // result
- 138:Src/main.c **** int test;
- 139:Src/main.c **** unsigned long fgoto, sizeoffile;//file pointer of the file object & size of file FPGA_RECEIVE_DATA_
- 140:Src/main.c ****
- 141:Src/main.c **** LDx_SetupTypeDef LD1_curr_setup, LD2_curr_setup, LD1_def_setup, LD2_def_setup;
- 142:Src/main.c **** Work_SetupTypeDef Curr_setup, Def_setup;
- 143:Src/main.c **** LDx_ParamTypeDef LD1_param, LD2_param;
- 144:Src/main.c ****
- 145:Src/main.c **** LD_Blinker_StateTypeDef LD_blinker;
- 146:Src/main.c ****
- 147:Src/main.c **** task_t task;
- 148:Src/main.c ****
- 149:Src/main.c **** static const uint16_t ad9102_reg_addr[AD9102_REG_COUNT] = {
- 150:Src/main.c **** 0x0000u, 0x0001u, 0x0002u, 0x0003u, 0x0004u, 0x0005u, 0x0006u, 0x0007u,
- 151:Src/main.c **** 0x0008u, 0x0009u, 0x000au, 0x000bu, 0x000cu, 0x000du, 0x000eu, 0x001fu,
- 152:Src/main.c **** 0x0020u, 0x0022u, 0x0023u, 0x0024u, 0x0025u, 0x0026u, 0x0027u, 0x0028u,
- 153:Src/main.c **** 0x0029u, 0x002au, 0x002bu, 0x002cu, 0x002du, 0x002eu, 0x002fu, 0x0030u,
- 154:Src/main.c **** 0x0031u, 0x0032u, 0x0033u, 0x0034u, 0x0035u, 0x0036u, 0x0037u, 0x003eu,
- 155:Src/main.c **** 0x003fu, 0x0040u, 0x0041u, 0x0042u, 0x0043u, 0x0044u, 0x0045u, 0x0047u,
- 156:Src/main.c **** 0x0050u, 0x0051u, 0x0052u, 0x0053u, 0x0054u, 0x0055u, 0x0056u, 0x0057u,
- 157:Src/main.c **** 0x0058u, 0x0059u, 0x005au, 0x005bu, 0x005cu, 0x005du, 0x005eu, 0x005fu,
- 158:Src/main.c **** 0x001eu, 0x001du
- 159:Src/main.c **** };
- 160:Src/main.c ****
- 161:Src/main.c **** static const uint16_t ad9102_example4_regval[AD9102_REG_COUNT] = {
- ARM GAS /tmp/ccLSPxIe.s page 42
+ 125:Src/main.c **** /* Infinite loop */
+ 126:Src/main.c **** /* USER CODE BEGIN WHILE */
+ 127:Src/main.c **** while (1)
+ 128:Src/main.c **** {
+ 129:Src/main.c **** app_run_once();
+ 130:Src/main.c **** /* USER CODE END WHILE */
+ 131:Src/main.c ****
+ 132:Src/main.c **** /* USER CODE BEGIN 3 */
+ 133:Src/main.c **** }
+ 134:Src/main.c **** /* USER CODE END 3 */
+ 135:Src/main.c **** }
+ 136:Src/main.c ****
+ 137:Src/main.c **** /**
+ 138:Src/main.c **** * @brief System Clock Configuration
+ 139:Src/main.c **** * @retval None
+ 140:Src/main.c **** */
+ 141:Src/main.c **** void SystemClock_Config(void)
+ 142:Src/main.c **** {
+ 143:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 144:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 145:Src/main.c ****
+ 146:Src/main.c **** /** Configure the main internal regulator output voltage
+ 147:Src/main.c **** */
+ 148:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE();
+ 149:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 150:Src/main.c ****
+ 151:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
+ 152:Src/main.c **** * in the RCC_OscInitTypeDef structure.
+ 153:Src/main.c **** */
+ 154:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+ 155:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 156:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 157:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 158:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
+ 159:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
+ 160:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 161:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
+ ARM GAS /tmp/ccDGOsZt.s page 42
- 162:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 163:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 164:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3212u, 0x0121u,
- 165:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 166:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0606u, 0x1999u,
- 167:Src/main.c **** 0x9a00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 168:Src/main.c **** 0x0fa0u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 169:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x16ffu,
- 170:Src/main.c **** 0x0001u, 0x0001u
- 171:Src/main.c **** };
- 172:Src/main.c ****
- 173:Src/main.c **** static const uint16_t ad9102_example2_regval[AD9102_REG_COUNT] = {
- 174:Src/main.c **** 0x0000u, 0x0e00u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u,
- 175:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x1f00u, 0x0000u, 0x0000u, 0x0000u,
- 176:Src/main.c **** 0x000eu, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x3030u, 0x0111u,
- 177:Src/main.c **** 0xffffu, 0x0000u, 0x0101u, 0x0003u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 178:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x4000u, 0x0000u, 0x0200u, 0x0000u,
- 179:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 180:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0000u,
- 181:Src/main.c **** 0x0000u, 0x0000u, 0x0000u, 0x0000u, 0x0fa0u, 0x0000u, 0x3ff0u, 0x0100u,
- 182:Src/main.c **** 0x0001u, 0x0001u
- 183:Src/main.c **** };
- 184:Src/main.c ****
- 185:Src/main.c **** static uint8_t ad9102_wave_upload_active = 0u;
- 186:Src/main.c **** static uint16_t ad9102_wave_expected_samples = 0u;
- 187:Src/main.c **** static uint16_t ad9102_wave_written_samples = 0u;
- 188:Src/main.c ****
+ 162:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
+ 163:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 164:Src/main.c **** {
+ 165:Src/main.c **** Error_Handler();
+ 166:Src/main.c **** }
+ 167:Src/main.c ****
+ 168:Src/main.c **** /** Activate the Over-Drive mode
+ 169:Src/main.c **** */
+ 170:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK)
+ 171:Src/main.c **** {
+ 172:Src/main.c **** Error_Handler();
+ 173:Src/main.c **** }
+ 174:Src/main.c ****
+ 175:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
+ 176:Src/main.c **** */
+ 177:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+ 178:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 179:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ 180:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 181:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 182:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 183:Src/main.c ****
+ 184:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
+ 185:Src/main.c **** {
+ 186:Src/main.c **** Error_Handler();
+ 187:Src/main.c **** }
+ 188:Src/main.c **** }
189:Src/main.c ****
- 190:Src/main.c ****
- 191:Src/main.c ****
- 192:Src/main.c **** /* USER CODE END PV */
- 193:Src/main.c ****
- 194:Src/main.c **** /* Private function prototypes -----------------------------------------------*/
- 195:Src/main.c **** void SystemClock_Config(void);
- 196:Src/main.c **** static void MX_GPIO_Init(void);
- 197:Src/main.c **** static void MX_DMA_Init(void);
- 198:Src/main.c **** static void MX_SPI4_Init(void);
- 199:Src/main.c **** static void MX_TIM2_Init(void);
- 200:Src/main.c **** static void MX_TIM5_Init(void);
- 201:Src/main.c **** static void MX_ADC1_Init(void);
- 202:Src/main.c **** static void MX_ADC3_Init(void);
- 203:Src/main.c **** static void MX_SPI2_Init(void);
- 204:Src/main.c **** static void MX_SPI5_Init(void);
- 205:Src/main.c **** static void MX_SPI6_Init(void);
- 206:Src/main.c **** static void MX_USART1_UART_Init(void);
- 207:Src/main.c **** static void MX_SDMMC1_SD_Init(void);
- 208:Src/main.c **** static void MX_TIM7_Init(void);
- 209:Src/main.c **** static void MX_TIM6_Init(void);
- 210:Src/main.c **** static void MX_TIM10_Init(void);
- 211:Src/main.c **** static void MX_UART8_Init(void);
- 212:Src/main.c **** static void MX_TIM8_Init(void);
- 213:Src/main.c **** static void MX_TIM11_Init(void);
- 214:Src/main.c **** static void MX_TIM4_Init(void);
- 215:Src/main.c **** static void MX_TIM1_Init(void);
- 216:Src/main.c **** /* USER CODE BEGIN PFP */
- 217:Src/main.c **** static void Init_params(void);
- 218:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- ARM GAS /tmp/ccLSPxIe.s page 43
+ 190:Src/main.c **** /**
+ 191:Src/main.c **** * @brief ADC1 Initialization Function
+ 192:Src/main.c **** * @param None
+ 193:Src/main.c **** * @retval None
+ 194:Src/main.c **** */
+ 195:Src/main.c **** static void MX_ADC1_Init(void)
+ 196:Src/main.c **** {
+ 197:Src/main.c ****
+ 198:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
+ 199:Src/main.c ****
+ 200:Src/main.c **** /* USER CODE END ADC1_Init 0 */
+ 201:Src/main.c ****
+ 202:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
+ 203:Src/main.c ****
+ 204:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
+ 205:Src/main.c ****
+ 206:Src/main.c **** /* USER CODE END ADC1_Init 1 */
+ 207:Src/main.c ****
+ 208:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
+ 209:Src/main.c **** */
+ 210:Src/main.c **** hadc1.Instance = ADC1;
+ 211:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 212:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 213:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+ 214:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
+ 215:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 216:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 217:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 218:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ ARM GAS /tmp/ccDGOsZt.s page 43
- 219:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- 220:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA);
- 221:Src/main.c **** static uint16_t MPhD_T(uint8_t num);
- 222:Src/main.c **** static uint16_t Get_ADC(uint8_t num);
- 223:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul
- 224:Src/main.c **** static void AD9102_Init(void);
- 225:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value);
- 226:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr);
- 227:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
- 228:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base,
- 229:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle,
- 230:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude);
- 231:Src/main.c **** static void AD9102_ResetWaveUploadState(void);
- 232:Src/main.c **** static void AD9102_StopOutput(void);
- 233:Src/main.c **** static void AD9102_StartOutput(void);
- 234:Src/main.c **** static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold);
- 235:Src/main.c **** static uint8_t AD9102_BeginWaveUpload(uint16_t samples);
- 236:Src/main.c **** static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count);
- 237:Src/main.c **** static uint16_t AD9102_CommitWaveUpload(uint8_t *ok);
- 238:Src/main.c **** static void AD9102_CancelWaveUpload(void);
- 239:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
- 240:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
- 241:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase);
- 242:Src/main.c **** static void AD9833_WriteWord(uint16_t word);
- 243:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word);
- 244:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms);
- 245:Src/main.c **** static void PA4_DAC_Init(void);
- 246:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable);
- 247:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff);
- 248:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
- 249:Src/main.c **** //int SD_Init(void);
- 250:Src/main.c **** int SD_SAVE(uint16_t *pbuff);
- 251:Src/main.c **** //uint32_t Get_Length(void);
- 252:Src/main.c **** int SD_READ(uint16_t *pbuff);
- 253:Src/main.c **** int SD_REMOVE(void);
- 254:Src/main.c **** void USART_TX (uint8_t* dt, uint16_t sz);
- 255:Src/main.c **** void USART_TX_DMA (uint16_t sz);
- 256:Src/main.c **** static void Stop_TIM10();
- 257:Src/main.c **** static void OUT_trigger(uint8_t);
- 258:Src/main.c **** /* USER CODE END PFP */
- 259:Src/main.c ****
- 260:Src/main.c **** /* Private user code ---------------------------------------------------------*/
- 261:Src/main.c **** /* USER CODE BEGIN 0 */
- 262:Src/main.c ****
- 263:Src/main.c **** /* USER CODE END 0 */
- 264:Src/main.c ****
- 265:Src/main.c **** /**
- 266:Src/main.c **** * @brief The application entry point.
- 267:Src/main.c **** * @retval int
- 268:Src/main.c **** */
- 269:Src/main.c **** int main(void)
- 270:Src/main.c **** {
- 271:Src/main.c ****
- 272:Src/main.c **** /* USER CODE BEGIN 1 */
- 273:Src/main.c **** HAL_StatusTypeDef st;
- 274:Src/main.c **** /* USER CODE END 1 */
+ 219:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
+ 220:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
+ 221:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 222:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 223:Src/main.c **** {
+ 224:Src/main.c **** Error_Handler();
+ 225:Src/main.c **** }
+ 226:Src/main.c ****
+ 227:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 228:Src/main.c **** */
+ 229:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9;
+ 230:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 231:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 232:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 233:Src/main.c **** {
+ 234:Src/main.c **** Error_Handler();
+ 235:Src/main.c **** }
+ 236:Src/main.c ****
+ 237:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 238:Src/main.c **** */
+ 239:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8;
+ 240:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
+ 241:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 242:Src/main.c **** {
+ 243:Src/main.c **** Error_Handler();
+ 244:Src/main.c **** }
+ 245:Src/main.c ****
+ 246:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 247:Src/main.c **** */
+ 248:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2;
+ 249:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
+ 250:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 251:Src/main.c **** {
+ 252:Src/main.c **** Error_Handler();
+ 253:Src/main.c **** }
+ 254:Src/main.c ****
+ 255:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 256:Src/main.c **** */
+ 257:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10;
+ 258:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
+ 259:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 260:Src/main.c **** {
+ 261:Src/main.c **** Error_Handler();
+ 262:Src/main.c **** }
+ 263:Src/main.c ****
+ 264:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 265:Src/main.c **** */
+ 266:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11;
+ 267:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
+ 268:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 269:Src/main.c **** {
+ 270:Src/main.c **** Error_Handler();
+ 271:Src/main.c **** }
+ 272:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
+ 273:Src/main.c ****
+ 274:Src/main.c **** /* USER CODE END ADC1_Init 2 */
275:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 44
+ ARM GAS /tmp/ccDGOsZt.s page 44
- 276:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
+ 276:Src/main.c **** }
277:Src/main.c ****
- 278:Src/main.c **** /* Reset of all peripherals, Initializes the Flash interface and the Systick. */
- 279:Src/main.c **** HAL_Init();
- 280:Src/main.c ****
- 281:Src/main.c **** /* USER CODE BEGIN Init */
- 282:Src/main.c **** /*I hope you don't forget that first - MX_DMA_Init(); and than - MX_USART1_UART_Init();*/
- 283:Src/main.c **** /* USER CODE END Init */
- 284:Src/main.c ****
- 285:Src/main.c **** /* Configure the system clock */
- 286:Src/main.c **** SystemClock_Config();
+ 278:Src/main.c **** /**
+ 279:Src/main.c **** * @brief ADC3 Initialization Function
+ 280:Src/main.c **** * @param None
+ 281:Src/main.c **** * @retval None
+ 282:Src/main.c **** */
+ 283:Src/main.c **** static void MX_ADC3_Init(void)
+ 284:Src/main.c **** {
+ 285:Src/main.c ****
+ 286:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */
287:Src/main.c ****
- 288:Src/main.c **** /* USER CODE BEGIN SysInit */
- 289:Src/main.c ****
- 290:Src/main.c **** /* USER CODE END SysInit */
+ 288:Src/main.c **** /* USER CODE END ADC3_Init 0 */
+ 289:Src/main.c ****
+ 290:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
291:Src/main.c ****
- 292:Src/main.c **** /* Initialize all configured peripherals */
- 293:Src/main.c **** MX_GPIO_Init();
- 294:Src/main.c **** MX_DMA_Init();
- 295:Src/main.c **** MX_SPI4_Init();
- 296:Src/main.c **** MX_FATFS_Init();
- 297:Src/main.c **** MX_TIM2_Init();
- 298:Src/main.c **** MX_TIM5_Init();
- 299:Src/main.c **** MX_ADC1_Init();
- 300:Src/main.c **** MX_ADC3_Init();
- 301:Src/main.c **** MX_SPI2_Init();
- 302:Src/main.c **** MX_SPI5_Init();
- 303:Src/main.c **** MX_SPI6_Init();
- 304:Src/main.c **** MX_USART1_UART_Init();
- 305:Src/main.c **** MX_SDMMC1_SD_Init();
- 306:Src/main.c **** MX_TIM7_Init();
- 307:Src/main.c **** MX_TIM6_Init();
- 308:Src/main.c **** MX_TIM10_Init();
- 309:Src/main.c **** MX_UART8_Init();
- 310:Src/main.c **** MX_TIM8_Init();
- 311:Src/main.c **** MX_TIM11_Init();
- 312:Src/main.c **** MX_TIM4_Init();
- 313:Src/main.c **** MX_TIM1_Init();
- 314:Src/main.c **** PA4_DAC_Init();
- 315:Src/main.c **** /* USER CODE BEGIN 2 */
- 316:Src/main.c **** Init_params();
- 317:Src/main.c **** //HAL_TIM_Base_Start(&htim11);
- 318:Src/main.c **** //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 319:Src/main.c ****
- 320:Src/main.c ****
- 321:Src/main.c **** //TIM4,11 clocks = 92 MHz
- 322:Src/main.c ****
- 323:Src/main.c **** //ADC clock
- 324:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz
- 325:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz
- 326:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz
- 327:Src/main.c **** TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fre
- 328:Src/main.c ****
- 329:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
- 330:Src/main.c ****
- 331:Src/main.c ****
- 332:Src/main.c **** //Mach-Zander clock (should be 1/4 of ADC clock freq)
- ARM GAS /tmp/ccLSPxIe.s page 45
+ 292:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */
+ 293:Src/main.c ****
+ 294:Src/main.c **** /* USER CODE END ADC3_Init 1 */
+ 295:Src/main.c ****
+ 296:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
+ 297:Src/main.c **** */
+ 298:Src/main.c **** hadc3.Instance = ADC3;
+ 299:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 300:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 301:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 302:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
+ 303:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 304:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 305:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 306:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 307:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
+ 308:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
+ 309:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 310:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 311:Src/main.c **** {
+ 312:Src/main.c **** Error_Handler();
+ 313:Src/main.c **** }
+ 314:Src/main.c ****
+ 315:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
+ 316:Src/main.c **** */
+ 317:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15;
+ 318:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 319:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 320:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 321:Src/main.c **** {
+ 322:Src/main.c **** Error_Handler();
+ 323:Src/main.c **** }
+ 324:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */
+ 325:Src/main.c ****
+ 326:Src/main.c **** /* USER CODE END ADC3_Init 2 */
+ 327:Src/main.c ****
+ 328:Src/main.c **** }
+ 329:Src/main.c ****
+ 330:Src/main.c **** /**
+ 331:Src/main.c **** * @brief SDMMC1 Initialization Function
+ 332:Src/main.c **** * @param None
+ ARM GAS /tmp/ccDGOsZt.s page 45
- 333:Src/main.c ****
- 334:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
- 335:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 336:Src/main.c ****
- 337:Src/main.c **** // AD9833 MCLK output on PE9 (TIM1_CH1)
- 338:Src/main.c **** // TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output
- 339:Src/main.c **** HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
- 340:Src/main.c ****
- 341:Src/main.c **** /*
- 342:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
- 343:Src/main.c ****
- 344:Src/main.c **** CPU_state = DECODE_ENABLE;
- 345:Src/main.c **** }
- 346:Src/main.c **** */
- 347:Src/main.c **** /* USER CODE END 2 */
- 348:Src/main.c ****
- 349:Src/main.c **** /* Infinite loop */
- 350:Src/main.c **** /* USER CODE BEGIN WHILE */
- 351:Src/main.c **** while (1)
- 352:Src/main.c **** {
- 353:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0))
- 354:Src/main.c **** {
- 355:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn);
- 356:Src/main.c **** LL_USART_EnableIT_PE(USART1);
- 357:Src/main.c **** LL_USART_EnableIT_RXNE(USART1);
- 358:Src/main.c **** LL_USART_EnableIT_ERROR(USART1);
- 359:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0);
- 360:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- 361:Src/main.c **** u_rx_flg = 1;
- 362:Src/main.c **** }
- 363:Src/main.c **** // else
- 364:Src/main.c **** // {
- 365:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn);
- 366:Src/main.c **** // u_rx_flg = 0;
- 367:Src/main.c **** // }
- 368:Src/main.c **** switch (CPU_state)
- 369:Src/main.c **** {
- 370:Src/main.c **** case HALT://0 - Default state
- 371:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 372:Src/main.c **** task.current_param = task.min_param;
- 373:Src/main.c **** Stop_TIM10();
- 374:Src/main.c **** break;
- 375:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message
- 376:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2);
- 377:Src/main.c **** if (CheckChecksum(COMMAND))
- 378:Src/main.c **** {
- 379:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1
- 380:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- 381:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 382:Src/main.c **** TO6_before = TO6;
- 383:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 384:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP;
- 385:Src/main.c **** CPU_state = WORK_ENABLE;
- 386:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle
- 387:Src/main.c **** }
- 388:Src/main.c **** else
- 389:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 46
-
-
- 390:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 391:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 392:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 393:Src/main.c **** }
- 394:Src/main.c **** UART_transmission_request = MESS_01;
- 395:Src/main.c **** break;
- 396:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT
- 397:Src/main.c **** //Set current setup to default
- 398:Src/main.c **** task.current_param = task.min_param;
- 399:Src/main.c **** Stop_TIM10();
- 400:Src/main.c **** Init_params();
- 401:Src/main.c **** AD9102_CancelWaveUpload();
- 402:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- 403:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- 404:Src/main.c **** CPU_state = HALT;
- 405:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 406:Src/main.c **** UART_transmission_request = MESS_01;
- 407:Src/main.c **** break;
- 408:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- 409:Src/main.c **** temp16 = SD_READ(&Long_Data[0]);
- 410:Src/main.c **** State_Data[0]|=temp16&0xff;
- 411:Src/main.c **** if (temp16==0)
- 412:Src/main.c **** {
- 413:Src/main.c **** UART_transmission_request = MESS_03;
- 414:Src/main.c **** }
- 415:Src/main.c **** else
- 416:Src/main.c **** {
- 417:Src/main.c **** UART_transmission_request = MESS_01;
- 418:Src/main.c **** }
- 419:Src/main.c **** CPU_state_old = HALT;
- 420:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 421:Src/main.c **** break;
- 422:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet
- 423:Src/main.c **** UART_transmission_request = MESS_02;
- 424:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 425:Src/main.c **** break;
- 426:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD
- 427:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff;
- 428:Src/main.c **** UART_transmission_request = MESS_01;
- 429:Src/main.c **** CPU_state = CPU_state_old;
- 430:Src/main.c **** break;
- 431:Src/main.c **** case STATE://6 - Transmith state message
- 432:Src/main.c **** UART_transmission_request = MESS_01;
- 433:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 434:Src/main.c **** break;
- 435:Src/main.c **** case WORK_ENABLE://7 - Main work cycle
- 436:Src/main.c **** task.current_param = task.min_param;
- 437:Src/main.c **** Stop_TIM10();
- 438:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- 439:Src/main.c **** {
- 440:Src/main.c **** TO7_before = TO7;
- 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 442:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 444:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 445:Src/main.c ****
- 446:Src/main.c **** //Correct temperature in all pulses
- ARM GAS /tmp/ccLSPxIe.s page 47
-
-
- 447:Src/main.c **** (void) MPhD_T(3);
- 448:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 449:Src/main.c **** (void) MPhD_T(4);
- 450:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 451:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 452:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1
- 453:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 454:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2
- 455:Src/main.c ****
- 456:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
- 457:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 458:Src/main.c ****
- 459:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1
- 460:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
- 461:Src/main.c ****
- 462:Src/main.c **** //Prepare DATA of internals ADCs
- 463:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 464:Src/main.c **** temp16 = Get_ADC(0);
- 465:Src/main.c **** temp16 = Get_ADC(1);
- 466:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 467:Src/main.c ****
- 468:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 469:Src/main.c **** temp16 = Get_ADC(1);
- 470:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 471:Src/main.c ****
- 472:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 473:Src/main.c **** temp16 = Get_ADC(1);
- 474:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 475:Src/main.c ****
- 476:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 477:Src/main.c **** temp16 = Get_ADC(1);
- 478:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 479:Src/main.c ****
- 480:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 481:Src/main.c **** temp16 = Get_ADC(1);
- 482:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 483:Src/main.c **** temp16 = Get_ADC(2);
- 484:Src/main.c ****
- 485:Src/main.c **** //Put the temperature of LD2 to Long_Data:
- 486:Src/main.c **** temp16 = Get_ADC(3);
- 487:Src/main.c **** temp16 = Get_ADC(4);
- 488:Src/main.c **** Long_Data[12] = temp16;
- 489:Src/main.c **** temp16 = Get_ADC(5);
- 490:Src/main.c ****
- 491:Src/main.c **** //Put the timer tick to Long_Data:
- 492:Src/main.c **** TO6_stop = TO6;
- 493:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
- 494:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
- 495:Src/main.c ****
- 496:Src/main.c **** //Put the average temperature of LD1 to Long_Data:
- 497:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP;
- 498:Src/main.c ****
- 499:Src/main.c **** //Put the average temperature of LD2 to Long_Data:
- 500:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP;
- 501:Src/main.c ****
- 502:Src/main.c **** if (Curr_setup.SD_EN==1)
- 503:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 48
-
-
- 504:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
- 505:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 506:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]);
- 507:Src/main.c **** State_Data[0]|=temp16&0xff;
- 508:Src/main.c **** }
- 509:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle
- 510:Src/main.c **** }
- 511:Src/main.c **** break;
- 512:Src/main.c **** case AD9102_CMD://10 - Configure AD9102 sawtooth output
- 513:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
- 514:Src/main.c **** {
- 515:Src/main.c **** uint16_t flags = COMMAND[0];
- 516:Src/main.c **** uint16_t param0 = COMMAND[1];
- 517:Src/main.c **** uint16_t param1 = COMMAND[2];
- 518:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 519:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 520:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 521:Src/main.c ****
- 522:Src/main.c **** if (sram_mode)
- 523:Src/main.c **** {
- 524:Src/main.c **** uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u;
- 525:Src/main.c **** uint16_t samples;
- 526:Src/main.c **** uint8_t hold;
- 527:Src/main.c **** uint16_t amplitude;
- 528:Src/main.c ****
- 529:Src/main.c **** if (sram_fmt)
- 530:Src/main.c **** {
- 531:Src/main.c **** amplitude = param0;
- 532:Src/main.c **** samples = param1;
- 533:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT;
- 534:Src/main.c **** }
- 535:Src/main.c **** else
- 536:Src/main.c **** {
- 537:Src/main.c **** samples = param0;
- 538:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu);
- 539:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT;
- 540:Src/main.c **** }
- 541:Src/main.c ****
- 542:Src/main.c **** uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude);
- 543:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 544:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 545:Src/main.c **** {
- 546:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 547:Src/main.c **** }
- 548:Src/main.c **** }
- 549:Src/main.c **** else
- 550:Src/main.c **** {
- 551:Src/main.c **** uint8_t saw_type = triangle ? AD9102_SAW_TYPE_TRI : AD9102_SAW_TYPE_UP;
- 552:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 553:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 554:Src/main.c **** uint16_t pat_period = param1;
- 555:Src/main.c ****
- 556:Src/main.c **** if (param0 == 0u && param1 == 0u)
- 557:Src/main.c **** {
- 558:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT;
- 559:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
- 560:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT;
- ARM GAS /tmp/ccLSPxIe.s page 49
-
-
- 561:Src/main.c **** }
- 562:Src/main.c **** else
- 563:Src/main.c **** {
- 564:Src/main.c **** if (saw_step == 0u)
- 565:Src/main.c **** {
- 566:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT;
- 567:Src/main.c **** }
- 568:Src/main.c **** else if (saw_step > 63u)
- 569:Src/main.c **** {
- 570:Src/main.c **** saw_step = 63u;
- 571:Src/main.c **** }
- 572:Src/main.c **** if (pat_period == 0u)
- 573:Src/main.c **** {
- 574:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT;
- 575:Src/main.c **** }
- 576:Src/main.c **** }
- 577:Src/main.c ****
- 578:Src/main.c **** uint16_t pat_status = AD9102_Apply(saw_type, enable, saw_step, pat_base, pat_period);
- 579:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 580:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- 581:Src/main.c **** {
- 582:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 583:Src/main.c **** }
- 584:Src/main.c **** }
- 585:Src/main.c **** }
- 586:Src/main.c **** else
- 587:Src/main.c **** {
- 588:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 589:Src/main.c **** }
- 590:Src/main.c **** UART_transmission_request = MESS_01;
- 591:Src/main.c **** CPU_state = CPU_state_old;
- 592:Src/main.c **** break;
- 593:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output
- 594:Src/main.c **** State_Data[1] = 0u;
- 595:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
- 596:Src/main.c **** {
- 597:Src/main.c **** uint16_t flags = COMMAND[0];
- 598:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
- 599:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
- 600:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
- 601:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
- 602:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
- 603:Src/main.c ****
- 604:Src/main.c **** AD9833_Apply(enable, triangle, freq_word);
- 605:Src/main.c **** }
- 606:Src/main.c **** else
- 607:Src/main.c **** {
- 608:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 609:Src/main.c **** }
- 610:Src/main.c **** UART_transmission_request = MESS_01;
- 611:Src/main.c **** CPU_state = CPU_state_old;
- 612:Src/main.c **** break;
- 613:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
- 614:Src/main.c **** if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1])
- 615:Src/main.c **** {
- 616:Src/main.c **** uint16_t flags = COMMAND[0];
- 617:Src/main.c **** uint16_t count = COMMAND[1];
- ARM GAS /tmp/ccLSPxIe.s page 50
-
-
- 618:Src/main.c **** uint16_t pulse_ms = COMMAND[2];
- 619:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
- 620:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
- 621:Src/main.c ****
- 622:Src/main.c **** if (uc && dc)
- 623:Src/main.c **** {
- 624:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 625:Src/main.c **** }
- 626:Src/main.c **** else
- 627:Src/main.c **** {
- 628:Src/main.c **** if (count == 0u)
- 629:Src/main.c **** {
- 630:Src/main.c **** count = 1u;
- 631:Src/main.c **** }
- 632:Src/main.c **** if (count > 64u)
- 633:Src/main.c **** {
- 634:Src/main.c **** count = 64u;
- 635:Src/main.c **** }
- 636:Src/main.c **** if (pulse_ms == 0u)
- 637:Src/main.c **** {
- 638:Src/main.c **** pulse_ms = DS1809_PULSE_MS_DEFAULT;
- 639:Src/main.c **** }
- 640:Src/main.c **** if (pulse_ms > 500u)
- 641:Src/main.c **** {
- 642:Src/main.c **** pulse_ms = 500u;
- 643:Src/main.c **** }
- 644:Src/main.c **** DS1809_Pulse(uc, dc, count, pulse_ms);
- 645:Src/main.c **** }
- 646:Src/main.c **** }
- 647:Src/main.c **** else
- 648:Src/main.c **** {
- 649:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 650:Src/main.c **** }
- 651:Src/main.c **** UART_transmission_request = MESS_01;
- 652:Src/main.c **** CPU_state = CPU_state_old;
- 653:Src/main.c **** break;
- 654:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4)
- 655:Src/main.c **** if (CalculateChecksum(COMMAND, STM32_DAC_CMD_WORDS - 1) == COMMAND[STM32_DAC_CMD_WORDS - 1])
- 656:Src/main.c **** {
- 657:Src/main.c **** uint16_t flags = COMMAND[0];
- 658:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu);
- 659:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u;
- 660:Src/main.c **** PA4_DAC_Set(dac_code, enable);
- 661:Src/main.c **** }
- 662:Src/main.c **** else
- 663:Src/main.c **** {
- 664:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 665:Src/main.c **** }
- 666:Src/main.c **** UART_transmission_request = MESS_01;
- 667:Src/main.c **** CPU_state = CPU_state_old;
- 668:Src/main.c **** break;
- 669:Src/main.c **** case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload
- 670:Src/main.c **** State_Data[1] = 0u;
- 671:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS -
- 672:Src/main.c **** {
- 673:Src/main.c **** uint16_t opcode = COMMAND[0];
- 674:Src/main.c **** uint16_t param0 = COMMAND[1];
- ARM GAS /tmp/ccLSPxIe.s page 51
-
-
- 675:Src/main.c **** uint16_t param1 = COMMAND[2];
- 676:Src/main.c ****
- 677:Src/main.c **** switch (opcode)
- 678:Src/main.c **** {
- 679:Src/main.c **** case AD9102_WAVE_OPCODE_BEGIN:
- 680:Src/main.c **** if ((param1 != 0u) || !AD9102_BeginWaveUpload(param0))
- 681:Src/main.c **** {
- 682:Src/main.c **** AD9102_CancelWaveUpload();
- 683:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 684:Src/main.c **** }
- 685:Src/main.c **** break;
- 686:Src/main.c **** case AD9102_WAVE_OPCODE_COMMIT:
- 687:Src/main.c **** {
- 688:Src/main.c **** uint16_t samples = ad9102_wave_expected_samples;
- 689:Src/main.c **** uint8_t ok = 0u;
- 690:Src/main.c **** uint16_t pat_status;
- 691:Src/main.c ****
- 692:Src/main.c **** if ((param0 != 0u) || (param1 != 0u))
- 693:Src/main.c **** {
- 694:Src/main.c **** AD9102_CancelWaveUpload();
- 695:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 696:Src/main.c **** break;
- 697:Src/main.c **** }
- 698:Src/main.c ****
- 699:Src/main.c **** pat_status = AD9102_CommitWaveUpload(&ok);
- 700:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 701:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT))
- 702:Src/main.c **** {
- 703:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 704:Src/main.c **** }
- 705:Src/main.c **** }
- 706:Src/main.c **** break;
- 707:Src/main.c **** case AD9102_WAVE_OPCODE_CANCEL:
- 708:Src/main.c **** if ((param0 != 0u) || (param1 != 0u))
- 709:Src/main.c **** {
- 710:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 711:Src/main.c **** }
- 712:Src/main.c **** AD9102_CancelWaveUpload();
- 713:Src/main.c **** break;
- 714:Src/main.c **** default:
- 715:Src/main.c **** AD9102_CancelWaveUpload();
- 716:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 717:Src/main.c **** break;
- 718:Src/main.c **** }
- 719:Src/main.c **** }
- 720:Src/main.c **** else
- 721:Src/main.c **** {
- 722:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 723:Src/main.c **** }
- 724:Src/main.c **** UART_transmission_request = MESS_01;
- 725:Src/main.c **** CPU_state = CPU_state_old;
- 726:Src/main.c **** break;
- 727:Src/main.c **** case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples
- 728:Src/main.c **** State_Data[1] = 0u;
- 729:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS -
- 730:Src/main.c **** {
- 731:Src/main.c **** uint16_t chunk_count = COMMAND[0];
- ARM GAS /tmp/ccLSPxIe.s page 52
-
-
- 732:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count))
- 733:Src/main.c **** {
- 734:Src/main.c **** AD9102_CancelWaveUpload();
- 735:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 736:Src/main.c **** }
- 737:Src/main.c **** }
- 738:Src/main.c **** else
- 739:Src/main.c **** {
- 740:Src/main.c **** AD9102_CancelWaveUpload();
- 741:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 742:Src/main.c **** }
- 743:Src/main.c **** UART_transmission_request = MESS_01;
- 744:Src/main.c **** CPU_state = CPU_state_old;
- 745:Src/main.c **** break;
- 746:Src/main.c **** case DECODE_TASK:
- 747:Src/main.c **** if (CheckChecksum(COMMAND))
- 748:Src/main.c **** {
- 749:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 750:Src/main.c **** TO6_before = TO6;
- 751:Src/main.c **** CPU_state = RUN_TASK;
- 752:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle
- 753:Src/main.c **** }
- 754:Src/main.c **** else
- 755:Src/main.c **** {
- 756:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 757:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 758:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 759:Src/main.c **** }
- 760:Src/main.c **** UART_transmission_request = MESS_01;
- 761:Src/main.c **** break;
- 762:Src/main.c **** case RUN_TASK:
- 763:Src/main.c **** switch (task.task_type)
- 764:Src/main.c **** {
- 765:Src/main.c **** case TT_CHANGE_CURR_1:
- 766:Src/main.c ****
- 767:Src/main.c ****
- 768:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator
- 769:Src/main.c **** //ADC clock
- 770:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz
- 771:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz
- 772:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz
- 773:Src/main.c ****
- 774:Src/main.c **** //online calculation for debug purposes:
- 775:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running
- 776:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
- 777:Src/main.c ****
- 778:Src/main.c ****
- 779:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq)
- 780:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1;
- 781:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 782:Src/main.c ****
- 783:Src/main.c ****
- 784:Src/main.c ****
- 785:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr);
- 786:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 787:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 788:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- ARM GAS /tmp/ccLSPxIe.s page 53
-
-
- 789:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 790:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 791:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 792:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 793:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 794:Src/main.c ****
- 795:Src/main.c **** // Toggle pin for oscilloscope
- 796:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc
- 797:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 798:Src/main.c ****
- 799:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10);
- 800:Src/main.c **** if (st != HAL_OK)
- 801:Src/main.c **** while(1);
- 802:Src/main.c ****
- 803:Src/main.c **** uint16_t step_counter = 0;
- 804:Src/main.c **** uint16_t trigger_counter = 0;
- 805:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 806:Src/main.c **** uint16_t task_sheduler = 0;
- 807:Src/main.c ****
- 808:Src/main.c ****
- 809:Src/main.c ****
- 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 811:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 812:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 813:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 814:Src/main.c ****
- 815:Src/main.c ****
- 816:Src/main.c ****
- 817:Src/main.c **** TIM11 -> CNT = 0;
- 818:Src/main.c **** TIM4 -> CNT = 0;
- 819:Src/main.c ****
- 820:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 821:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
- 822:Src/main.c **** //TIM4 -> CNT = 0;
- 823:Src/main.c ****
- 824:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de
- 825:Src/main.c **** TIM11 -> CNT = 0;
- 826:Src/main.c ****
- 827:Src/main.c ****
- 828:Src/main.c **** while (task.current_param < task.max_param)
- 829:Src/main.c **** {
- 830:Src/main.c **** if (TIM10_coflag)
- 831:Src/main.c **** {
- 832:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 833:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase
- 834:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase
- 835:Src/main.c **** task.current_param += task.delta_param;
- 836:Src/main.c **** TO10 = 0;
- 837:Src/main.c **** TIM10_coflag = 0;
- 838:Src/main.c ****
- 839:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current t
- 840:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
- 841:Src/main.c **** //*
- 842:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step
- 843:Src/main.c **** OUT_trigger(trigger_counter);
- 844:Src/main.c **** ++trigger_counter;
- 845:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 54
-
-
- 846:Src/main.c **** ++step_counter;
- 847:Src/main.c **** //*/
- 848:Src/main.c **** /*
- 849:Src/main.c **** ++task_sheduler;
- 850:Src/main.c **** if (task_sheduler >= 10){
- 851:Src/main.c **** task_sheduler = 0;
- 852:Src/main.c **** }
- 853:Src/main.c **** //maintain stable temperature of laser 2
- 854:Src/main.c **** if (task_sheduler == 0){
- 855:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 856:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 857:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 858:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 859:Src/main.c **** }
- 860:Src/main.c **** //maintain stable temperature of laser 1
- 861:Src/main.c **** //*
- 862:Src/main.c **** if (task_sheduler == 5){
- 863:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 864:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 865:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 866:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 867:Src/main.c **** }
- 868:Src/main.c **** //*/
- 869:Src/main.c **** }
- 870:Src/main.c **** }
- 871:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o
- 872:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 873:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda
- 874:Src/main.c **** //but one-pulse mode should be disabled
- 875:Src/main.c ****
- 876:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
- 877:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 878:Src/main.c ****
- 879:Src/main.c ****
- 880:Src/main.c ****
- 881:Src/main.c **** Stop_TIM10();
- 882:Src/main.c ****
- 883:Src/main.c **** task.current_param = task.min_param;
- 884:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 885:Src/main.c **** if (task.tau > 3)
- 886:Src/main.c **** {
- 887:Src/main.c **** TIM10_period = htim10.Init.Period;
- 888:Src/main.c **** htim10.Init.Period = 9999;
- 889:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- 890:Src/main.c **** }
- 891:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10);
- 892:Src/main.c **** break;
- 893:Src/main.c **** case TT_CHANGE_CURR_2:
- 894:Src/main.c **** //Blink laser 2
- 895:Src/main.c **** //*
- 896:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- 897:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 898:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 899:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 900:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 901:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 902:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- ARM GAS /tmp/ccLSPxIe.s page 55
-
-
- 903:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 904:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 905:Src/main.c ****
- 906:Src/main.c **** LD_blinker.task_type = 2;
- 907:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 908:Src/main.c **** //LD_blinker.param = task.current_param;
- 909:Src/main.c **** LD_blinker.param = 0;
- 910:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 911:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port;
- 912:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin;
- 913:Src/main.c ****
- 914:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units).
- 915:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 916:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8);
- 917:Src/main.c **** if (st != HAL_OK)
- 918:Src/main.c **** while(1);
- 919:Src/main.c **** // */
- 920:Src/main.c ****
- 921:Src/main.c **** // Toggle pin for oscilloscope
- 922:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 923:Src/main.c **** uint32_t i = 10000; while (--i){}
- 924:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 925:Src/main.c **** LD_blinker.state = 2;
- 926:Src/main.c ****
- 927:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10);
- 928:Src/main.c **** if (st != HAL_OK)
- 929:Src/main.c **** while(1);
- 930:Src/main.c **** while (task.current_param < task.max_param)
- 931:Src/main.c **** {
- 932:Src/main.c **** if (TIM10_coflag)
- 933:Src/main.c **** {
- 934:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 935:Src/main.c **** //LD_blinker.param = task.current_param;
- 936:Src/main.c **** //++LD_blinker.param;
- 937:Src/main.c **** task.current_param += task.delta_param;
- 938:Src/main.c **** TO10 = 0;
- 939:Src/main.c **** TIM10_coflag = 0;
- 940:Src/main.c ****
- 941:Src/main.c ****
- 942:Src/main.c **** }
- 943:Src/main.c **** }
- 944:Src/main.c **** HAL_TIM_Base_Stop(&htim10);
- 945:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 946:Src/main.c ****
- 947:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 948:Src/main.c ****
- 949:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8);
- 950:Src/main.c **** TIM8->CNT = 0;
- 951:Src/main.c ****
- 952:Src/main.c **** Stop_TIM10();
- 953:Src/main.c **** task.current_param = task.min_param;
- 954:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 955:Src/main.c **** if (task.tau > 3)
- 956:Src/main.c **** {
- 957:Src/main.c **** TIM10_period = htim10.Init.Period;
- 958:Src/main.c **** htim10.Init.Period = 9999;
- 959:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- ARM GAS /tmp/ccLSPxIe.s page 56
-
-
- 960:Src/main.c **** }
- 961:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10);
- 962:Src/main.c ****
- 963:Src/main.c ****
- 964:Src/main.c **** //*/
- 965:Src/main.c ****
- 966:Src/main.c **** /* // Backup
- 967:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr);
- 968:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 969:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 970:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 971:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 972:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 973:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 974:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 975:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 976:Src/main.c ****
- 977:Src/main.c **** // Toggle pin for oscilloscope
- 978:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 979:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 980:Src/main.c ****
- 981:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10);
- 982:Src/main.c **** if (st != HAL_OK)
- 983:Src/main.c **** while(1);
- 984:Src/main.c **** while (task.current_param < task.max_param)
- 985:Src/main.c **** {
- 986:Src/main.c **** if (TIM10_coflag)
- 987:Src/main.c **** {
- 988:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 989:Src/main.c **** task.current_param += task.delta_param;
- 990:Src/main.c **** TO10 = 0;
- 991:Src/main.c **** TIM10_coflag = 0;
- 992:Src/main.c ****
- 993:Src/main.c ****
- 994:Src/main.c **** }
- 995:Src/main.c **** }
- 996:Src/main.c **** Stop_TIM10();
- 997:Src/main.c **** task.current_param = task.min_param;
- 998:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 999:Src/main.c **** if (task.tau > 3)
-1000:Src/main.c **** {
-1001:Src/main.c **** TIM10_period = htim10.Init.Period;
-1002:Src/main.c **** htim10.Init.Period = 9999;
-1003:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
-1004:Src/main.c **** }
-1005:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10);
-1006:Src/main.c **** */
-1007:Src/main.c ****
-1008:Src/main.c ****
-1009:Src/main.c **** break;
-1010:Src/main.c **** case TT_CHANGE_TEMP_1:
-1011:Src/main.c **** // isn't implemented
-1012:Src/main.c **** break;
-1013:Src/main.c **** case TT_CHANGE_TEMP_2:
-1014:Src/main.c **** // isn't implemented
-1015:Src/main.c **** break;
-1016:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 57
-
-
-1017:Src/main.c ****
-1018:Src/main.c **** if (TO7>TO7_before)
-1019:Src/main.c **** {
-1020:Src/main.c **** TO7_before = TO7;
-1021:Src/main.c ****
-1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
-1023:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
-1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-1025:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
-1026:Src/main.c ****
-1027:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data
-1028:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
-1029:Src/main.c ****
-1030:Src/main.c **** //Prepare DATA of internals ADCs
-1031:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1032:Src/main.c **** temp16 = Get_ADC(0);
-1033:Src/main.c **** temp16 = Get_ADC(1);
-1034:Src/main.c **** Long_Data[7] = temp16;
-1035:Src/main.c ****
-1036:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1037:Src/main.c **** temp16 = Get_ADC(1);
-1038:Src/main.c **** Long_Data[8] = temp16;
-1039:Src/main.c ****
-1040:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1041:Src/main.c **** temp16 = Get_ADC(1);
-1042:Src/main.c **** Long_Data[9] = temp16;
-1043:Src/main.c ****
-1044:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1045:Src/main.c **** temp16 = Get_ADC(1);
-1046:Src/main.c **** Long_Data[10] = temp16;
-1047:Src/main.c ****
-1048:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1049:Src/main.c **** temp16 = Get_ADC(1);
-1050:Src/main.c **** Long_Data[11] = temp16;
-1051:Src/main.c **** temp16 = Get_ADC(2);
-1052:Src/main.c ****
-1053:Src/main.c **** //Put the temperature of LD2 to Long_Data:
-1054:Src/main.c **** temp16 = Get_ADC(3);
-1055:Src/main.c **** temp16 = Get_ADC(4);
-1056:Src/main.c **** Long_Data[12] = temp16;
-1057:Src/main.c **** temp16 = Get_ADC(5);
-1058:Src/main.c ****
-1059:Src/main.c **** //Put the timer tick to Long_Data:
-1060:Src/main.c **** TO6_stop = TO6;
-1061:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
-1062:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
-1063:Src/main.c ****
-1064:Src/main.c **** //Put the average temperature of LD1 to Long_Data:
-1065:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP;
-1066:Src/main.c ****
-1067:Src/main.c **** //Put the average temperature of LD2 to Long_Data:
-1068:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP;
-1069:Src/main.c **** }
-1070:Src/main.c **** while (!TIM10_coflag);
-1071:Src/main.c ****
-1072:Src/main.c **** Stop_TIM10();
-1073:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 58
-
-
-1074:Src/main.c **** if (task.tau > 3)
-1075:Src/main.c **** {
-1076:Src/main.c **** htim10.Init.Period = TIM10_period;
-1077:Src/main.c **** TO10_counter = task.dt / 10;
-1078:Src/main.c **** }
-1079:Src/main.c ****
-1080:Src/main.c **** CPU_state_old = RUN_TASK;
-1081:Src/main.c **** break;
-1082:Src/main.c **** }
-1083:Src/main.c ****
-1084:Src/main.c **** switch (UART_transmission_request)
-1085:Src/main.c **** {
-1086:Src/main.c **** case MESS_01://Default state
-1087:Src/main.c **** USART_TX(State_Data,2);
-1088:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10);
-1089:Src/main.c **** State_Data[0]=0;
-1090:Src/main.c **** State_Data[1]=0;//All OK!
-1091:Src/main.c **** UART_transmission_request = NO_MESS;
-1092:Src/main.c **** break;
-1093:Src/main.c **** case MESS_02://Transmith packet
-1094:Src/main.c ****
-1095:Src/main.c **** //Find CS and put to Long_Data:
-1096:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2);
-1097:Src/main.c **** Long_Data[DL_16-1] = CS_result;
-1098:Src/main.c ****
-1099:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++)
-1100:Src/main.c **** {
-1101:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff;
-1102:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
-1103:Src/main.c **** }
-1104:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0);
-1105:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
-1106:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
-1107:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY;
-1108:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
-1109:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA
-1110:Src/main.c **** UART_transmission_request = NO_MESS;
-1111:Src/main.c **** break;
-1112:Src/main.c **** case MESS_03://Transmith saved packet
-1113:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++)
-1114:Src/main.c **** {
-1115:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff;
-1116:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
-1117:Src/main.c **** }
-1118:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn);
-1119:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8);
-1120:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY;
-1121:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY;
-1122:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA
-1123:Src/main.c **** UART_transmission_request = NO_MESS;
-1124:Src/main.c **** break;
-1125:Src/main.c **** }
-1126:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of
-1127:Src/main.c **** {
-1128:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter
-1129:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error!
-1130:Src/main.c **** UART_transmission_request = MESS_01;//Send status
- ARM GAS /tmp/ccLSPxIe.s page 59
-
-
-1131:Src/main.c **** flg_tmt = 0;//Reset timeout flag
-1132:Src/main.c **** }
-1133:Src/main.c **** /* USER CODE END WHILE */
-1134:Src/main.c ****
-1135:Src/main.c **** /* USER CODE BEGIN 3 */
-1136:Src/main.c **** }
-1137:Src/main.c **** /* USER CODE END 3 */
-1138:Src/main.c **** }
-1139:Src/main.c ****
-1140:Src/main.c **** /**
-1141:Src/main.c **** * @brief System Clock Configuration
-1142:Src/main.c **** * @retval None
-1143:Src/main.c **** */
-1144:Src/main.c **** void SystemClock_Config(void)
-1145:Src/main.c **** {
-1146:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-1147:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-1148:Src/main.c ****
-1149:Src/main.c **** /** Configure the main internal regulator output voltage
-1150:Src/main.c **** */
-1151:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE();
-1152:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
-1153:Src/main.c ****
-1154:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters
-1155:Src/main.c **** * in the RCC_OscInitTypeDef structure.
-1156:Src/main.c **** */
-1157:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-1158:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
-1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
-1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
-1165:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
-1166:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-1167:Src/main.c **** {
-1168:Src/main.c **** Error_Handler();
-1169:Src/main.c **** }
-1170:Src/main.c ****
-1171:Src/main.c **** /** Activate the Over-Drive mode
-1172:Src/main.c **** */
-1173:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK)
-1174:Src/main.c **** {
-1175:Src/main.c **** Error_Handler();
-1176:Src/main.c **** }
-1177:Src/main.c ****
-1178:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks
-1179:Src/main.c **** */
-1180:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-1181:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-1182:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-1183:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-1184:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
-1185:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
-1186:Src/main.c ****
-1187:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK)
- ARM GAS /tmp/ccLSPxIe.s page 60
-
-
-1188:Src/main.c **** {
-1189:Src/main.c **** Error_Handler();
-1190:Src/main.c **** }
-1191:Src/main.c **** }
-1192:Src/main.c ****
-1193:Src/main.c **** /**
-1194:Src/main.c **** * @brief ADC1 Initialization Function
-1195:Src/main.c **** * @param None
-1196:Src/main.c **** * @retval None
-1197:Src/main.c **** */
-1198:Src/main.c **** static void MX_ADC1_Init(void)
-1199:Src/main.c **** {
-1200:Src/main.c ****
-1201:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */
-1202:Src/main.c ****
-1203:Src/main.c **** /* USER CODE END ADC1_Init 0 */
-1204:Src/main.c ****
-1205:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
-1206:Src/main.c ****
-1207:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */
-1208:Src/main.c ****
-1209:Src/main.c **** /* USER CODE END ADC1_Init 1 */
-1210:Src/main.c ****
-1211:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
-1212:Src/main.c **** */
-1213:Src/main.c **** hadc1.Instance = ADC1;
-1214:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
-1215:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
-1216:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
-1217:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
-1218:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
-1219:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-1220:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-1221:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-1222:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
-1223:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
-1224:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-1225:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
-1226:Src/main.c **** {
-1227:Src/main.c **** Error_Handler();
-1228:Src/main.c **** }
-1229:Src/main.c ****
-1230:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1231:Src/main.c **** */
-1232:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9;
-1233:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
-1234:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
-1235:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1236:Src/main.c **** {
-1237:Src/main.c **** Error_Handler();
-1238:Src/main.c **** }
-1239:Src/main.c ****
-1240:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1241:Src/main.c **** */
-1242:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8;
-1243:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
-1244:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- ARM GAS /tmp/ccLSPxIe.s page 61
-
-
-1245:Src/main.c **** {
-1246:Src/main.c **** Error_Handler();
-1247:Src/main.c **** }
-1248:Src/main.c ****
-1249:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1250:Src/main.c **** */
-1251:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2;
-1252:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
-1253:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1254:Src/main.c **** {
-1255:Src/main.c **** Error_Handler();
-1256:Src/main.c **** }
-1257:Src/main.c ****
-1258:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1259:Src/main.c **** */
-1260:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10;
-1261:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
-1262:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1263:Src/main.c **** {
-1264:Src/main.c **** Error_Handler();
-1265:Src/main.c **** }
-1266:Src/main.c ****
-1267:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1268:Src/main.c **** */
-1269:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11;
-1270:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
-1271:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
-1272:Src/main.c **** {
-1273:Src/main.c **** Error_Handler();
-1274:Src/main.c **** }
-1275:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */
-1276:Src/main.c ****
-1277:Src/main.c **** /* USER CODE END ADC1_Init 2 */
-1278:Src/main.c ****
-1279:Src/main.c **** }
-1280:Src/main.c ****
-1281:Src/main.c **** /**
-1282:Src/main.c **** * @brief ADC3 Initialization Function
-1283:Src/main.c **** * @param None
-1284:Src/main.c **** * @retval None
-1285:Src/main.c **** */
-1286:Src/main.c **** static void MX_ADC3_Init(void)
-1287:Src/main.c **** {
-1288:Src/main.c ****
-1289:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */
-1290:Src/main.c ****
-1291:Src/main.c **** /* USER CODE END ADC3_Init 0 */
-1292:Src/main.c ****
-1293:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0};
-1294:Src/main.c ****
-1295:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */
-1296:Src/main.c ****
-1297:Src/main.c **** /* USER CODE END ADC3_Init 1 */
-1298:Src/main.c ****
-1299:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con
-1300:Src/main.c **** */
-1301:Src/main.c **** hadc3.Instance = ADC3;
- ARM GAS /tmp/ccLSPxIe.s page 62
-
-
-1302:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
-1303:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
-1304:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
-1305:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
-1306:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
-1307:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
-1308:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
-1309:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
-1310:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
-1311:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
-1312:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
-1313:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
-1314:Src/main.c **** {
-1315:Src/main.c **** Error_Handler();
-1316:Src/main.c **** }
-1317:Src/main.c ****
-1318:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it
-1319:Src/main.c **** */
-1320:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15;
-1321:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
-1322:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
-1323:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
-1324:Src/main.c **** {
-1325:Src/main.c **** Error_Handler();
-1326:Src/main.c **** }
-1327:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */
-1328:Src/main.c ****
-1329:Src/main.c **** /* USER CODE END ADC3_Init 2 */
-1330:Src/main.c ****
-1331:Src/main.c **** }
-1332:Src/main.c ****
-1333:Src/main.c **** /**
-1334:Src/main.c **** * @brief SDMMC1 Initialization Function
-1335:Src/main.c **** * @param None
-1336:Src/main.c **** * @retval None
-1337:Src/main.c **** */
-1338:Src/main.c **** static void MX_SDMMC1_SD_Init(void)
-1339:Src/main.c **** {
- 95 .loc 1 1339 1 is_stmt 1 view -0
+ 333:Src/main.c **** * @retval None
+ 334:Src/main.c **** */
+ 335:Src/main.c **** static void MX_SDMMC1_SD_Init(void)
+ 336:Src/main.c **** {
+ 95 .loc 1 336 1 is_stmt 1 view -0
96 .cfi_startproc
97 @ args = 0, pretend = 0, frame = 0
98 @ frame_needed = 0, uses_anonymous_args = 0
99 @ link register save eliminated.
-1340:Src/main.c ****
-1341:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */
-1342:Src/main.c ****
-1343:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */
-1344:Src/main.c ****
-1345:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */
-1346:Src/main.c ****
-1347:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */
-1348:Src/main.c **** hsd1.Instance = SDMMC1;
- 100 .loc 1 1348 3 view .LVU21
- 101 .loc 1 1348 17 is_stmt 0 view .LVU22
+ 337:Src/main.c ****
+ 338:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */
+ 339:Src/main.c ****
+ 340:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */
+ 341:Src/main.c ****
+ 342:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */
+ 343:Src/main.c ****
+ 344:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */
+ 345:Src/main.c **** hsd1.Instance = SDMMC1;
+ 100 .loc 1 345 3 view .LVU21
+ 101 .loc 1 345 17 is_stmt 0 view .LVU22
102 0000 064B ldr r3, .L6
103 0002 074A ldr r2, .L6+4
104 0004 1A60 str r2, [r3]
- ARM GAS /tmp/ccLSPxIe.s page 63
-
-
-1349:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
- 105 .loc 1 1349 3 is_stmt 1 view .LVU23
- 106 .loc 1 1349 23 is_stmt 0 view .LVU24
+ 346:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING;
+ 105 .loc 1 346 3 is_stmt 1 view .LVU23
+ 106 .loc 1 346 23 is_stmt 0 view .LVU24
107 0006 0022 movs r2, #0
108 0008 5A60 str r2, [r3, #4]
-1350:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
- 109 .loc 1 1350 3 is_stmt 1 view .LVU25
- 110 .loc 1 1350 25 is_stmt 0 view .LVU26
+ 347:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE;
+ 109 .loc 1 347 3 is_stmt 1 view .LVU25
+ 110 .loc 1 347 25 is_stmt 0 view .LVU26
111 000a 9A60 str r2, [r3, #8]
-1351:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
- 112 .loc 1 1351 3 is_stmt 1 view .LVU27
- 113 .loc 1 1351 28 is_stmt 0 view .LVU28
+ 348:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE;
+ 112 .loc 1 348 3 is_stmt 1 view .LVU27
+ 113 .loc 1 348 28 is_stmt 0 view .LVU28
114 000c DA60 str r2, [r3, #12]
-1352:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
- 115 .loc 1 1352 3 is_stmt 1 view .LVU29
- 116 .loc 1 1352 21 is_stmt 0 view .LVU30
+ 349:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B;
+ 115 .loc 1 349 3 is_stmt 1 view .LVU29
+ 116 .loc 1 349 21 is_stmt 0 view .LVU30
117 000e 4FF40061 mov r1, #2048
118 0012 1961 str r1, [r3, #16]
-1353:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
- 119 .loc 1 1353 3 is_stmt 1 view .LVU31
- 120 .loc 1 1353 33 is_stmt 0 view .LVU32
+ 350:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE;
+ 119 .loc 1 350 3 is_stmt 1 view .LVU31
+ 120 .loc 1 350 33 is_stmt 0 view .LVU32
121 0014 5A61 str r2, [r3, #20]
-1354:Src/main.c **** hsd1.Init.ClockDiv = 20;
- 122 .loc 1 1354 3 is_stmt 1 view .LVU33
- 123 .loc 1 1354 22 is_stmt 0 view .LVU34
+ 351:Src/main.c **** hsd1.Init.ClockDiv = 20;
+ 122 .loc 1 351 3 is_stmt 1 view .LVU33
+ 123 .loc 1 351 22 is_stmt 0 view .LVU34
124 0016 1422 movs r2, #20
125 0018 9A61 str r2, [r3, #24]
-1355:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */
-1356:Src/main.c ****
-1357:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */
-1358:Src/main.c ****
-1359:Src/main.c **** }
- 126 .loc 1 1359 1 view .LVU35
+ 352:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */
+ 353:Src/main.c ****
+ 354:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */
+ 355:Src/main.c ****
+ 356:Src/main.c **** }
+ 126 .loc 1 356 1 view .LVU35
127 001a 7047 bx lr
+ ARM GAS /tmp/ccDGOsZt.s page 46
+
+
128 .L7:
129 .align 2
130 .L6:
131 001c 00000000 .word hsd1
132 0020 002C0140 .word 1073818624
133 .cfi_endproc
- 134 .LFE1190:
+ 134 .LFE1187:
136 .section .text.MX_DMA_Init,"ax",%progbits
137 .align 1
138 .syntax unified
139 .thumb
140 .thumb_func
142 MX_DMA_Init:
- 143 .LFB1206:
-1360:Src/main.c ****
-1361:Src/main.c **** /**
-1362:Src/main.c **** * @brief SPI2 Initialization Function
-1363:Src/main.c **** * @param None
-1364:Src/main.c **** * @retval None
-1365:Src/main.c **** */
-1366:Src/main.c **** static void MX_SPI2_Init(void)
-1367:Src/main.c **** {
-1368:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 64
+ 143 .LFB1199:
+ 357:Src/main.c ****
+ 358:Src/main.c **** /**
+ 359:Src/main.c **** * @brief SPI2 Initialization Function
+ 360:Src/main.c **** * @param None
+ 361:Src/main.c **** * @retval None
+ 362:Src/main.c **** */
+ 363:Src/main.c **** static void MX_SPI2_Init(void)
+ 364:Src/main.c **** {
+ 365:Src/main.c ****
+ 366:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */
+ 367:Src/main.c ****
+ 368:Src/main.c **** /* USER CODE END SPI2_Init 0 */
+ 369:Src/main.c ****
+ 370:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
+ 371:Src/main.c ****
+ 372:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 373:Src/main.c ****
+ 374:Src/main.c **** /* Peripheral clock enable */
+ 375:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
+ 376:Src/main.c ****
+ 377:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
+ 378:Src/main.c **** /**SPI2 GPIO Configuration
+ 379:Src/main.c **** PB13 ------> SPI2_SCK
+ 380:Src/main.c **** PB14 ------> SPI2_MISO
+ 381:Src/main.c **** PB15 ------> SPI2_MOSI
+ 382:Src/main.c **** */
+ 383:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
+ 384:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 385:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 386:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 387:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 388:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 389:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 390:Src/main.c ****
+ 391:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
+ 392:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 393:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 394:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 395:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 396:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 397:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 398:Src/main.c ****
+ 399:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
+ ARM GAS /tmp/ccDGOsZt.s page 47
-1369:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */
-1370:Src/main.c ****
-1371:Src/main.c **** /* USER CODE END SPI2_Init 0 */
-1372:Src/main.c ****
-1373:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1374:Src/main.c ****
-1375:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1376:Src/main.c ****
-1377:Src/main.c **** /* Peripheral clock enable */
-1378:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2);
-1379:Src/main.c ****
-1380:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB);
-1381:Src/main.c **** /**SPI2 GPIO Configuration
-1382:Src/main.c **** PB13 ------> SPI2_SCK
-1383:Src/main.c **** PB14 ------> SPI2_MISO
-1384:Src/main.c **** PB15 ------> SPI2_MOSI
-1385:Src/main.c **** */
-1386:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
-1387:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1388:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1389:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1390:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1391:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1392:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1393:Src/main.c ****
-1394:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_14;
-1395:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1396:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1397:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1398:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1399:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1400:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1401:Src/main.c ****
-1402:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15;
-1403:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1404:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1405:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1406:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1407:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1408:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-1409:Src/main.c ****
-1410:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */
-1411:Src/main.c ****
-1412:Src/main.c **** /* USER CODE END SPI2_Init 1 */
-1413:Src/main.c **** /* SPI2 parameter configuration*/
-1414:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
-1415:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1416:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1417:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
-1418:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1419:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1420:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
-1421:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1422:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1423:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
-1424:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
-1425:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
- ARM GAS /tmp/ccLSPxIe.s page 65
+ 400:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 401:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 402:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 403:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 404:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 405:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 406:Src/main.c ****
+ 407:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */
+ 408:Src/main.c ****
+ 409:Src/main.c **** /* USER CODE END SPI2_Init 1 */
+ 410:Src/main.c **** /* SPI2 parameter configuration*/
+ 411:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+ 412:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 413:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 414:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+ 415:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 416:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 417:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+ 418:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 419:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 420:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 421:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
+ 422:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
+ 423:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2);
+ 424:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */
+ 425:Src/main.c ****
+ 426:Src/main.c **** /* USER CODE END SPI2_Init 2 */
+ 427:Src/main.c ****
+ 428:Src/main.c **** }
+ 429:Src/main.c ****
+ 430:Src/main.c **** /**
+ 431:Src/main.c **** * @brief SPI4 Initialization Function
+ 432:Src/main.c **** * @param None
+ 433:Src/main.c **** * @retval None
+ 434:Src/main.c **** */
+ 435:Src/main.c **** static void MX_SPI4_Init(void)
+ 436:Src/main.c **** {
+ 437:Src/main.c ****
+ 438:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */
+ 439:Src/main.c ****
+ 440:Src/main.c **** /* USER CODE END SPI4_Init 0 */
+ 441:Src/main.c ****
+ 442:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
+ 443:Src/main.c ****
+ 444:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 445:Src/main.c ****
+ 446:Src/main.c **** /* Peripheral clock enable */
+ 447:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
+ 448:Src/main.c ****
+ 449:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE);
+ 450:Src/main.c **** /**SPI4 GPIO Configuration
+ 451:Src/main.c **** PE12 ------> SPI4_SCK
+ 452:Src/main.c **** PE13 ------> SPI4_MISO
+ 453:Src/main.c **** */
+ 454:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
+ 455:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 456:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ ARM GAS /tmp/ccDGOsZt.s page 48
-1426:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2);
-1427:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */
-1428:Src/main.c ****
-1429:Src/main.c **** /* USER CODE END SPI2_Init 2 */
-1430:Src/main.c ****
-1431:Src/main.c **** }
-1432:Src/main.c ****
-1433:Src/main.c **** /**
-1434:Src/main.c **** * @brief SPI4 Initialization Function
-1435:Src/main.c **** * @param None
-1436:Src/main.c **** * @retval None
-1437:Src/main.c **** */
-1438:Src/main.c **** static void MX_SPI4_Init(void)
-1439:Src/main.c **** {
-1440:Src/main.c ****
-1441:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */
-1442:Src/main.c ****
-1443:Src/main.c **** /* USER CODE END SPI4_Init 0 */
-1444:Src/main.c ****
-1445:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1446:Src/main.c ****
-1447:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1448:Src/main.c ****
-1449:Src/main.c **** /* Peripheral clock enable */
-1450:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4);
-1451:Src/main.c ****
-1452:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE);
-1453:Src/main.c **** /**SPI4 GPIO Configuration
-1454:Src/main.c **** PE12 ------> SPI4_SCK
-1455:Src/main.c **** PE13 ------> SPI4_MISO
-1456:Src/main.c **** */
-1457:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12;
-1458:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1459:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1460:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1461:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1462:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1463:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-1464:Src/main.c ****
-1465:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
-1466:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1467:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1468:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1469:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1470:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1471:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-1472:Src/main.c ****
-1473:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */
-1474:Src/main.c ****
-1475:Src/main.c **** /* USER CODE END SPI4_Init 1 */
-1476:Src/main.c **** /* SPI4 parameter configuration*/
-1477:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
-1478:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1479:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1480:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1481:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1482:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- ARM GAS /tmp/ccLSPxIe.s page 66
+ 457:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 458:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 459:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 460:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 461:Src/main.c ****
+ 462:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13;
+ 463:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 464:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 465:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 466:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 467:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 468:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 469:Src/main.c ****
+ 470:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */
+ 471:Src/main.c ****
+ 472:Src/main.c **** /* USER CODE END SPI4_Init 1 */
+ 473:Src/main.c **** /* SPI4 parameter configuration*/
+ 474:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
+ 475:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 476:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 477:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 478:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 479:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 480:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 481:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 482:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 483:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 484:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
+ 485:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
+ 486:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4);
+ 487:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */
+ 488:Src/main.c ****
+ 489:Src/main.c **** /* USER CODE END SPI4_Init 2 */
+ 490:Src/main.c ****
+ 491:Src/main.c **** }
+ 492:Src/main.c ****
+ 493:Src/main.c **** /**
+ 494:Src/main.c **** * @brief SPI5 Initialization Function
+ 495:Src/main.c **** * @param None
+ 496:Src/main.c **** * @retval None
+ 497:Src/main.c **** */
+ 498:Src/main.c **** static void MX_SPI5_Init(void)
+ 499:Src/main.c **** {
+ 500:Src/main.c ****
+ 501:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */
+ 502:Src/main.c ****
+ 503:Src/main.c **** /* USER CODE END SPI5_Init 0 */
+ 504:Src/main.c ****
+ 505:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
+ 506:Src/main.c ****
+ 507:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 508:Src/main.c ****
+ 509:Src/main.c **** /* Peripheral clock enable */
+ 510:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5);
+ 511:Src/main.c ****
+ 512:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
+ 513:Src/main.c **** /**SPI5 GPIO Configuration
+ ARM GAS /tmp/ccDGOsZt.s page 49
-1483:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1484:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1485:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1486:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
-1487:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
-1488:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
-1489:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4);
-1490:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */
-1491:Src/main.c ****
-1492:Src/main.c **** /* USER CODE END SPI4_Init 2 */
-1493:Src/main.c ****
-1494:Src/main.c **** }
-1495:Src/main.c ****
-1496:Src/main.c **** /**
-1497:Src/main.c **** * @brief SPI5 Initialization Function
-1498:Src/main.c **** * @param None
-1499:Src/main.c **** * @retval None
-1500:Src/main.c **** */
-1501:Src/main.c **** static void MX_SPI5_Init(void)
-1502:Src/main.c **** {
-1503:Src/main.c ****
-1504:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */
-1505:Src/main.c ****
-1506:Src/main.c **** /* USER CODE END SPI5_Init 0 */
-1507:Src/main.c ****
-1508:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1509:Src/main.c ****
-1510:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1511:Src/main.c ****
-1512:Src/main.c **** /* Peripheral clock enable */
-1513:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5);
-1514:Src/main.c ****
-1515:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);
-1516:Src/main.c **** /**SPI5 GPIO Configuration
-1517:Src/main.c **** PF7 ------> SPI5_SCK
-1518:Src/main.c **** PF8 ------> SPI5_MISO
-1519:Src/main.c **** */
-1520:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
-1521:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1522:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1523:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1524:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1525:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1526:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1527:Src/main.c ****
-1528:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
-1529:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1530:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1531:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1532:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1533:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
-1534:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-1535:Src/main.c ****
-1536:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */
-1537:Src/main.c ****
-1538:Src/main.c **** /* USER CODE END SPI5_Init 1 */
-1539:Src/main.c **** /* SPI5 parameter configuration*/
- ARM GAS /tmp/ccLSPxIe.s page 67
+ 514:Src/main.c **** PF7 ------> SPI5_SCK
+ 515:Src/main.c **** PF8 ------> SPI5_MISO
+ 516:Src/main.c **** */
+ 517:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
+ 518:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 519:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 520:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 521:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 522:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 523:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 524:Src/main.c ****
+ 525:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8;
+ 526:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 527:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 528:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 529:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 530:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 531:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 532:Src/main.c ****
+ 533:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */
+ 534:Src/main.c ****
+ 535:Src/main.c **** /* USER CODE END SPI5_Init 1 */
+ 536:Src/main.c **** /* SPI5 parameter configuration*/
+ 537:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
+ 538:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 539:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 540:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 541:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 542:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 543:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 544:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 545:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 546:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 547:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
+ 548:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
+ 549:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5);
+ 550:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */
+ 551:Src/main.c ****
+ 552:Src/main.c **** /* USER CODE END SPI5_Init 2 */
+ 553:Src/main.c ****
+ 554:Src/main.c **** }
+ 555:Src/main.c ****
+ 556:Src/main.c **** /**
+ 557:Src/main.c **** * @brief SPI6 Initialization Function
+ 558:Src/main.c **** * @param None
+ 559:Src/main.c **** * @retval None
+ 560:Src/main.c **** */
+ 561:Src/main.c **** static void MX_SPI6_Init(void)
+ 562:Src/main.c **** {
+ 563:Src/main.c ****
+ 564:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */
+ 565:Src/main.c ****
+ 566:Src/main.c **** /* USER CODE END SPI6_Init 0 */
+ 567:Src/main.c ****
+ 568:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
+ 569:Src/main.c ****
+ 570:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ ARM GAS /tmp/ccDGOsZt.s page 50
-1540:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX;
-1541:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1542:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1543:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1544:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
-1545:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1546:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1547:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1548:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1549:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
-1550:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
-1551:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
-1552:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5);
-1553:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */
-1554:Src/main.c ****
-1555:Src/main.c **** /* USER CODE END SPI5_Init 2 */
-1556:Src/main.c ****
-1557:Src/main.c **** }
-1558:Src/main.c ****
-1559:Src/main.c **** /**
-1560:Src/main.c **** * @brief SPI6 Initialization Function
-1561:Src/main.c **** * @param None
-1562:Src/main.c **** * @retval None
-1563:Src/main.c **** */
-1564:Src/main.c **** static void MX_SPI6_Init(void)
-1565:Src/main.c **** {
-1566:Src/main.c ****
-1567:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */
-1568:Src/main.c ****
-1569:Src/main.c **** /* USER CODE END SPI6_Init 0 */
-1570:Src/main.c ****
-1571:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0};
-1572:Src/main.c ****
-1573:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-1574:Src/main.c ****
-1575:Src/main.c **** /* Peripheral clock enable */
-1576:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6);
-1577:Src/main.c ****
-1578:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-1579:Src/main.c **** /**SPI6 GPIO Configuration
-1580:Src/main.c **** PA5 ------> SPI6_SCK
-1581:Src/main.c **** PA7 ------> SPI6_MOSI
-1582:Src/main.c **** */
-1583:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
-1584:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1585:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1586:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1587:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1588:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
-1589:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1590:Src/main.c ****
-1591:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
-1592:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-1593:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-1594:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-1595:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-1596:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- ARM GAS /tmp/ccLSPxIe.s page 68
+ 571:Src/main.c ****
+ 572:Src/main.c **** /* Peripheral clock enable */
+ 573:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6);
+ 574:Src/main.c ****
+ 575:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+ 576:Src/main.c **** /**SPI6 GPIO Configuration
+ 577:Src/main.c **** PA5 ------> SPI6_SCK
+ 578:Src/main.c **** PA7 ------> SPI6_MOSI
+ 579:Src/main.c **** */
+ 580:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5;
+ 581:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 582:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 583:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 584:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 585:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 586:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 587:Src/main.c ****
+ 588:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7;
+ 589:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 590:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 591:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 592:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 593:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 594:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 595:Src/main.c ****
+ 596:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */
+ 597:Src/main.c ****
+ 598:Src/main.c **** /* USER CODE END SPI6_Init 1 */
+ 599:Src/main.c **** /* SPI6 parameter configuration*/
+ 600:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
+ 601:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 602:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 603:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 604:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+ 605:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 606:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 607:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 608:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 609:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 610:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
+ 611:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
+ 612:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6);
+ 613:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */
+ 614:Src/main.c ****
+ 615:Src/main.c **** /* USER CODE END SPI6_Init 2 */
+ 616:Src/main.c ****
+ 617:Src/main.c **** }
+ 618:Src/main.c ****
+ 619:Src/main.c **** /**
+ 620:Src/main.c **** * @brief TIM2 Initialization Function
+ 621:Src/main.c **** * @param None
+ 622:Src/main.c **** * @retval None
+ 623:Src/main.c **** */
+ 624:Src/main.c **** static void MX_TIM2_Init(void)
+ 625:Src/main.c **** {
+ 626:Src/main.c ****
+ 627:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */
+ ARM GAS /tmp/ccDGOsZt.s page 51
-1597:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-1598:Src/main.c ****
-1599:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */
-1600:Src/main.c ****
-1601:Src/main.c **** /* USER CODE END SPI6_Init 1 */
-1602:Src/main.c **** /* SPI6 parameter configuration*/
-1603:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX;
-1604:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
-1605:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
-1606:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
-1607:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
-1608:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
-1609:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
-1610:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
-1611:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
-1612:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
-1613:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
-1614:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
-1615:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6);
-1616:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */
-1617:Src/main.c ****
-1618:Src/main.c **** /* USER CODE END SPI6_Init 2 */
-1619:Src/main.c ****
-1620:Src/main.c **** }
-1621:Src/main.c ****
-1622:Src/main.c **** /**
-1623:Src/main.c **** * @brief TIM2 Initialization Function
-1624:Src/main.c **** * @param None
-1625:Src/main.c **** * @retval None
-1626:Src/main.c **** */
-1627:Src/main.c **** static void MX_TIM2_Init(void)
-1628:Src/main.c **** {
-1629:Src/main.c ****
-1630:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */
-1631:Src/main.c ****
-1632:Src/main.c **** /* USER CODE END TIM2_Init 0 */
-1633:Src/main.c ****
-1634:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1635:Src/main.c ****
-1636:Src/main.c **** /* Peripheral clock enable */
-1637:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
-1638:Src/main.c ****
-1639:Src/main.c **** /* TIM2 interrupt Init */
-1640:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1641:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
-1642:Src/main.c ****
-1643:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */
-1644:Src/main.c ****
-1645:Src/main.c **** /* USER CODE END TIM2_Init 1 */
-1646:Src/main.c **** TIM_InitStruct.Prescaler = 1000;
-1647:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1648:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
-1649:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
-1650:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
-1651:Src/main.c **** LL_TIM_DisableARRPreload(TIM2);
-1652:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
-1653:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
- ARM GAS /tmp/ccLSPxIe.s page 69
+ 628:Src/main.c ****
+ 629:Src/main.c **** /* USER CODE END TIM2_Init 0 */
+ 630:Src/main.c ****
+ 631:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
+ 632:Src/main.c ****
+ 633:Src/main.c **** /* Peripheral clock enable */
+ 634:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2);
+ 635:Src/main.c ****
+ 636:Src/main.c **** /* TIM2 interrupt Init */
+ 637:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 638:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
+ 639:Src/main.c ****
+ 640:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */
+ 641:Src/main.c ****
+ 642:Src/main.c **** /* USER CODE END TIM2_Init 1 */
+ 643:Src/main.c **** TIM_InitStruct.Prescaler = 1000;
+ 644:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 645:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
+ 646:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 647:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
+ 648:Src/main.c **** LL_TIM_DisableARRPreload(TIM2);
+ 649:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 650:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
+ 651:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2);
+ 652:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
+ 653:Src/main.c ****
+ 654:Src/main.c **** /* USER CODE END TIM2_Init 2 */
+ 655:Src/main.c ****
+ 656:Src/main.c **** }
+ 657:Src/main.c ****
+ 658:Src/main.c **** /**
+ 659:Src/main.c **** * @brief TIM5 Initialization Function
+ 660:Src/main.c **** * @param None
+ 661:Src/main.c **** * @retval None
+ 662:Src/main.c **** */
+ 663:Src/main.c **** static void MX_TIM5_Init(void)
+ 664:Src/main.c **** {
+ 665:Src/main.c ****
+ 666:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */
+ 667:Src/main.c ****
+ 668:Src/main.c **** /* USER CODE END TIM5_Init 0 */
+ 669:Src/main.c ****
+ 670:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
+ 671:Src/main.c ****
+ 672:Src/main.c **** /* Peripheral clock enable */
+ 673:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
+ 674:Src/main.c ****
+ 675:Src/main.c **** /* TIM5 interrupt Init */
+ 676:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 677:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
+ 678:Src/main.c ****
+ 679:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */
+ 680:Src/main.c ****
+ 681:Src/main.c **** /* USER CODE END TIM5_Init 1 */
+ 682:Src/main.c **** TIM_InitStruct.Prescaler = 10000;
+ 683:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 684:Src/main.c **** TIM_InitStruct.Autoreload = 560;
+ ARM GAS /tmp/ccDGOsZt.s page 52
-1654:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2);
-1655:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
-1656:Src/main.c ****
-1657:Src/main.c **** /* USER CODE END TIM2_Init 2 */
-1658:Src/main.c ****
-1659:Src/main.c **** }
-1660:Src/main.c ****
-1661:Src/main.c **** /**
-1662:Src/main.c **** * @brief TIM4 Initialization Function
-1663:Src/main.c **** * @param None
-1664:Src/main.c **** * @retval None
-1665:Src/main.c **** */
-1666:Src/main.c **** static void MX_TIM4_Init(void)
-1667:Src/main.c **** {
-1668:Src/main.c ****
-1669:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */
-1670:Src/main.c ****
-1671:Src/main.c **** /* USER CODE END TIM4_Init 0 */
-1672:Src/main.c ****
-1673:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
-1674:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
-1675:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
-1676:Src/main.c ****
-1677:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */
-1678:Src/main.c ****
-1679:Src/main.c **** /* USER CODE END TIM4_Init 1 */
-1680:Src/main.c **** htim4.Instance = TIM4;
-1681:Src/main.c **** htim4.Init.Prescaler = 0;
-1682:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
-1683:Src/main.c **** htim4.Init.Period = 45;
-1684:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1685:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1686:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
-1687:Src/main.c **** {
-1688:Src/main.c **** Error_Handler();
-1689:Src/main.c **** }
-1690:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
-1691:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
-1692:Src/main.c **** {
-1693:Src/main.c **** Error_Handler();
-1694:Src/main.c **** }
-1695:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
-1696:Src/main.c **** {
-1697:Src/main.c **** Error_Handler();
-1698:Src/main.c **** }
-1699:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
-1700:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-1701:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
-1702:Src/main.c **** {
-1703:Src/main.c **** Error_Handler();
-1704:Src/main.c **** }
-1705:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
-1706:Src/main.c **** sConfigOC.Pulse = 22;
-1707:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
-1708:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
-1709:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
-1710:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 70
+ 685:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 686:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
+ 687:Src/main.c **** LL_TIM_DisableARRPreload(TIM5);
+ 688:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 689:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
+ 690:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5);
+ 691:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */
+ 692:Src/main.c ****
+ 693:Src/main.c **** /* USER CODE END TIM5_Init 2 */
+ 694:Src/main.c ****
+ 695:Src/main.c **** }
+ 696:Src/main.c ****
+ 697:Src/main.c **** /**
+ 698:Src/main.c **** * @brief TIM6 Initialization Function
+ 699:Src/main.c **** * @param None
+ 700:Src/main.c **** * @retval None
+ 701:Src/main.c **** */
+ 702:Src/main.c **** static void MX_TIM6_Init(void)
+ 703:Src/main.c **** {
+ 704:Src/main.c ****
+ 705:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */
+ 706:Src/main.c ****
+ 707:Src/main.c **** /* USER CODE END TIM6_Init 0 */
+ 708:Src/main.c ****
+ 709:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
+ 710:Src/main.c ****
+ 711:Src/main.c **** /* Peripheral clock enable */
+ 712:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
+ 713:Src/main.c ****
+ 714:Src/main.c **** /* TIM6 interrupt Init */
+ 715:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 716:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 717:Src/main.c ****
+ 718:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */
+ 719:Src/main.c ****
+ 720:Src/main.c **** /* USER CODE END TIM6_Init 1 */
+ 721:Src/main.c **** TIM_InitStruct.Prescaler = 45999;
+ 722:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 723:Src/main.c **** TIM_InitStruct.Autoreload = 19;
+ 724:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
+ 725:Src/main.c **** LL_TIM_DisableARRPreload(TIM6);
+ 726:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
+ 727:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6);
+ 728:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
+ 729:Src/main.c ****
+ 730:Src/main.c **** /* USER CODE END TIM6_Init 2 */
+ 731:Src/main.c ****
+ 732:Src/main.c **** }
+ 733:Src/main.c ****
+ 734:Src/main.c **** /**
+ 735:Src/main.c **** * @brief TIM7 Initialization Function
+ 736:Src/main.c **** * @param None
+ 737:Src/main.c **** * @retval None
+ 738:Src/main.c **** */
+ 739:Src/main.c **** static void MX_TIM7_Init(void)
+ 740:Src/main.c **** {
+ 741:Src/main.c ****
+ ARM GAS /tmp/ccDGOsZt.s page 53
-1711:Src/main.c **** Error_Handler();
-1712:Src/main.c **** }
-1713:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */
-1714:Src/main.c ****
-1715:Src/main.c **** /* USER CODE END TIM4_Init 2 */
-1716:Src/main.c **** HAL_TIM_MspPostInit(&htim4);
-1717:Src/main.c ****
-1718:Src/main.c **** }
-1719:Src/main.c ****
-1720:Src/main.c **** /**
-1721:Src/main.c **** * @brief TIM5 Initialization Function
-1722:Src/main.c **** * @param None
-1723:Src/main.c **** * @retval None
-1724:Src/main.c **** */
-1725:Src/main.c **** static void MX_TIM5_Init(void)
-1726:Src/main.c **** {
-1727:Src/main.c ****
-1728:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */
-1729:Src/main.c ****
-1730:Src/main.c **** /* USER CODE END TIM5_Init 0 */
-1731:Src/main.c ****
-1732:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1733:Src/main.c ****
-1734:Src/main.c **** /* Peripheral clock enable */
-1735:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5);
-1736:Src/main.c ****
-1737:Src/main.c **** /* TIM5 interrupt Init */
-1738:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1739:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
-1740:Src/main.c ****
-1741:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */
-1742:Src/main.c ****
-1743:Src/main.c **** /* USER CODE END TIM5_Init 1 */
-1744:Src/main.c **** TIM_InitStruct.Prescaler = 10000;
-1745:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1746:Src/main.c **** TIM_InitStruct.Autoreload = 560;
-1747:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
-1748:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
-1749:Src/main.c **** LL_TIM_DisableARRPreload(TIM5);
-1750:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
-1751:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
-1752:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5);
-1753:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */
-1754:Src/main.c ****
-1755:Src/main.c **** /* USER CODE END TIM5_Init 2 */
-1756:Src/main.c ****
-1757:Src/main.c **** }
-1758:Src/main.c ****
-1759:Src/main.c **** /**
-1760:Src/main.c **** * @brief TIM6 Initialization Function
-1761:Src/main.c **** * @param None
-1762:Src/main.c **** * @retval None
-1763:Src/main.c **** */
-1764:Src/main.c **** static void MX_TIM6_Init(void)
-1765:Src/main.c **** {
-1766:Src/main.c ****
-1767:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */
- ARM GAS /tmp/ccLSPxIe.s page 71
+ 742:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */
+ 743:Src/main.c ****
+ 744:Src/main.c **** /* USER CODE END TIM7_Init 0 */
+ 745:Src/main.c ****
+ 746:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
+ 747:Src/main.c ****
+ 748:Src/main.c **** /* Peripheral clock enable */
+ 749:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
+ 750:Src/main.c ****
+ 751:Src/main.c **** /* TIM7 interrupt Init */
+ 752:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 753:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
+ 754:Src/main.c ****
+ 755:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */
+ 756:Src/main.c ****
+ 757:Src/main.c **** /* USER CODE END TIM7_Init 1 */
+ 758:Src/main.c **** TIM_InitStruct.Prescaler = 919;
+ 759:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 760:Src/main.c **** TIM_InitStruct.Autoreload = 99;
+ 761:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
+ 762:Src/main.c **** LL_TIM_DisableARRPreload(TIM7);
+ 763:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
+ 764:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7);
+ 765:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
+ 766:Src/main.c ****
+ 767:Src/main.c **** /* USER CODE END TIM7_Init 2 */
+ 768:Src/main.c ****
+ 769:Src/main.c **** }
+ 770:Src/main.c ****
+ 771:Src/main.c **** /**
+ 772:Src/main.c **** * @brief TIM1 Initialization Function
+ 773:Src/main.c **** * @param None
+ 774:Src/main.c **** * @retval None
+ 775:Src/main.c **** */
+ 776:Src/main.c **** static void MX_TIM1_Init(void)
+ 777:Src/main.c **** {
+ 778:Src/main.c ****
+ 779:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */
+ 780:Src/main.c ****
+ 781:Src/main.c **** /* USER CODE END TIM1_Init 0 */
+ 782:Src/main.c ****
+ 783:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+ 784:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
+ 785:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 786:Src/main.c ****
+ 787:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */
+ 788:Src/main.c ****
+ 789:Src/main.c **** /* USER CODE END TIM1_Init 1 */
+ 790:Src/main.c **** htim1.Instance = TIM1;
+ 791:Src/main.c **** htim1.Init.Prescaler = 0;
+ 792:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 793:Src/main.c **** htim1.Init.Period = 8;
+ 794:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 795:Src/main.c **** htim1.Init.RepetitionCounter = 0;
+ 796:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 797:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 798:Src/main.c **** {
+ ARM GAS /tmp/ccDGOsZt.s page 54
-1768:Src/main.c ****
-1769:Src/main.c **** /* USER CODE END TIM6_Init 0 */
-1770:Src/main.c ****
-1771:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1772:Src/main.c ****
-1773:Src/main.c **** /* Peripheral clock enable */
-1774:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6);
-1775:Src/main.c ****
-1776:Src/main.c **** /* TIM6 interrupt Init */
-1777:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1778:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
-1779:Src/main.c ****
-1780:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */
-1781:Src/main.c ****
-1782:Src/main.c **** /* USER CODE END TIM6_Init 1 */
-1783:Src/main.c **** TIM_InitStruct.Prescaler = 45999;
-1784:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1785:Src/main.c **** TIM_InitStruct.Autoreload = 19;
-1786:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
-1787:Src/main.c **** LL_TIM_DisableARRPreload(TIM6);
-1788:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
-1789:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6);
-1790:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
-1791:Src/main.c ****
-1792:Src/main.c **** /* USER CODE END TIM6_Init 2 */
-1793:Src/main.c ****
-1794:Src/main.c **** }
-1795:Src/main.c ****
-1796:Src/main.c **** /**
-1797:Src/main.c **** * @brief TIM7 Initialization Function
-1798:Src/main.c **** * @param None
-1799:Src/main.c **** * @retval None
-1800:Src/main.c **** */
-1801:Src/main.c **** static void MX_TIM7_Init(void)
-1802:Src/main.c **** {
-1803:Src/main.c ****
-1804:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */
-1805:Src/main.c ****
-1806:Src/main.c **** /* USER CODE END TIM7_Init 0 */
-1807:Src/main.c ****
-1808:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0};
-1809:Src/main.c ****
-1810:Src/main.c **** /* Peripheral clock enable */
-1811:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7);
-1812:Src/main.c ****
-1813:Src/main.c **** /* TIM7 interrupt Init */
-1814:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-1815:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
-1816:Src/main.c ****
-1817:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */
-1818:Src/main.c ****
-1819:Src/main.c **** /* USER CODE END TIM7_Init 1 */
-1820:Src/main.c **** TIM_InitStruct.Prescaler = 919;
-1821:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
-1822:Src/main.c **** TIM_InitStruct.Autoreload = 99;
-1823:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
-1824:Src/main.c **** LL_TIM_DisableARRPreload(TIM7);
- ARM GAS /tmp/ccLSPxIe.s page 72
+ 799:Src/main.c **** Error_Handler();
+ 800:Src/main.c **** }
+ 801:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+ 802:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 803:Src/main.c **** {
+ 804:Src/main.c **** Error_Handler();
+ 805:Src/main.c **** }
+ 806:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
+ 807:Src/main.c **** {
+ 808:Src/main.c **** Error_Handler();
+ 809:Src/main.c **** }
+ 810:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
+ 811:Src/main.c **** sConfigOC.Pulse = 4;
+ 812:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 813:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 814:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 815:Src/main.c **** {
+ 816:Src/main.c **** Error_Handler();
+ 817:Src/main.c **** }
+ 818:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
+ 819:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 820:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 821:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
+ 822:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 823:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ 824:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
+ 825:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 826:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 827:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
+ 828:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 829:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+ 830:Src/main.c **** {
+ 831:Src/main.c **** Error_Handler();
+ 832:Src/main.c **** }
+ 833:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */
+ 834:Src/main.c ****
+ 835:Src/main.c **** /* USER CODE END TIM1_Init 2 */
+ 836:Src/main.c **** HAL_TIM_MspPostInit(&htim1);
+ 837:Src/main.c ****
+ 838:Src/main.c **** }
+ 839:Src/main.c ****
+ 840:Src/main.c **** /**
+ 841:Src/main.c **** * @brief UART8 Initialization Function
+ 842:Src/main.c **** * @param None
+ 843:Src/main.c **** * @retval None
+ 844:Src/main.c **** */
+ 845:Src/main.c **** static void MX_UART8_Init(void)
+ 846:Src/main.c **** {
+ 847:Src/main.c ****
+ 848:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */
+ 849:Src/main.c ****
+ 850:Src/main.c **** /* USER CODE END UART8_Init 0 */
+ 851:Src/main.c ****
+ 852:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */
+ 853:Src/main.c ****
+ 854:Src/main.c **** /* USER CODE END UART8_Init 1 */
+ 855:Src/main.c **** huart8.Instance = UART8;
+ ARM GAS /tmp/ccDGOsZt.s page 55
-1825:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
-1826:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7);
-1827:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
-1828:Src/main.c ****
-1829:Src/main.c **** /* USER CODE END TIM7_Init 2 */
-1830:Src/main.c ****
-1831:Src/main.c **** }
-1832:Src/main.c ****
-1833:Src/main.c **** /**
-1834:Src/main.c **** * @brief TIM8 Initialization Function
-1835:Src/main.c **** * @param None
-1836:Src/main.c **** * @retval None
-1837:Src/main.c **** */
-1838:Src/main.c **** static void MX_TIM8_Init(void)
-1839:Src/main.c **** {
-1840:Src/main.c ****
-1841:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */
-1842:Src/main.c ****
-1843:Src/main.c **** /* USER CODE END TIM8_Init 0 */
-1844:Src/main.c ****
-1845:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
-1846:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
-1847:Src/main.c ****
-1848:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */
-1849:Src/main.c ****
-1850:Src/main.c **** /* USER CODE END TIM8_Init 1 */
-1851:Src/main.c **** htim8.Instance = TIM8;
-1852:Src/main.c **** htim8.Init.Prescaler = 0;
-1853:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
-1854:Src/main.c **** htim8.Init.Period = 91;
-1855:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1856:Src/main.c **** htim8.Init.RepetitionCounter = 0;
-1857:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1858:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
-1859:Src/main.c **** {
-1860:Src/main.c **** Error_Handler();
-1861:Src/main.c **** }
-1862:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
-1863:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
-1864:Src/main.c **** {
-1865:Src/main.c **** Error_Handler();
-1866:Src/main.c **** }
-1867:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
-1868:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
-1869:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
-1870:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
-1871:Src/main.c **** {
-1872:Src/main.c **** Error_Handler();
-1873:Src/main.c **** }
-1874:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */
-1875:Src/main.c ****
-1876:Src/main.c **** /* USER CODE END TIM8_Init 2 */
-1877:Src/main.c ****
-1878:Src/main.c **** }
-1879:Src/main.c ****
-1880:Src/main.c **** /**
-1881:Src/main.c **** * @brief TIM10 Initialization Function
- ARM GAS /tmp/ccLSPxIe.s page 73
+ 856:Src/main.c **** huart8.Init.BaudRate = 115200;
+ 857:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
+ 858:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
+ 859:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
+ 860:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
+ 861:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 862:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+ 863:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 864:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 865:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
+ 866:Src/main.c **** {
+ 867:Src/main.c **** Error_Handler();
+ 868:Src/main.c **** }
+ 869:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */
+ 870:Src/main.c ****
+ 871:Src/main.c **** /* USER CODE END UART8_Init 2 */
+ 872:Src/main.c ****
+ 873:Src/main.c **** }
+ 874:Src/main.c ****
+ 875:Src/main.c **** /**
+ 876:Src/main.c **** * @brief USART1 Initialization Function
+ 877:Src/main.c **** * @param None
+ 878:Src/main.c **** * @retval None
+ 879:Src/main.c **** */
+ 880:Src/main.c **** static void MX_USART1_UART_Init(void)
+ 881:Src/main.c **** {
+ 882:Src/main.c ****
+ 883:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
+ 884:Src/main.c ****
+ 885:Src/main.c **** /* USER CODE END USART1_Init 0 */
+ 886:Src/main.c ****
+ 887:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0};
+ 888:Src/main.c ****
+ 889:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 890:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 891:Src/main.c ****
+ 892:Src/main.c **** /** Initializes the peripherals clock
+ 893:Src/main.c **** */
+ 894:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+ 895:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ 896:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 897:Src/main.c **** {
+ 898:Src/main.c **** Error_Handler();
+ 899:Src/main.c **** }
+ 900:Src/main.c ****
+ 901:Src/main.c **** /* Peripheral clock enable */
+ 902:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
+ 903:Src/main.c ****
+ 904:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
+ 905:Src/main.c **** /**USART1 GPIO Configuration
+ 906:Src/main.c **** PA9 ------> USART1_TX
+ 907:Src/main.c **** PA10 ------> USART1_RX
+ 908:Src/main.c **** */
+ 909:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
+ 910:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 911:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 912:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ ARM GAS /tmp/ccDGOsZt.s page 56
-1882:Src/main.c **** * @param None
-1883:Src/main.c **** * @retval None
-1884:Src/main.c **** */
-1885:Src/main.c **** static void MX_TIM10_Init(void)
-1886:Src/main.c **** {
-1887:Src/main.c ****
-1888:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */
-1889:Src/main.c ****
-1890:Src/main.c **** /* USER CODE END TIM10_Init 0 */
-1891:Src/main.c ****
-1892:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */
-1893:Src/main.c ****
-1894:Src/main.c **** /* USER CODE END TIM10_Init 1 */
-1895:Src/main.c **** htim10.Instance = TIM10;
-1896:Src/main.c **** htim10.Init.Prescaler = 183;
-1897:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
-1898:Src/main.c **** htim10.Init.Period = 9;
-1899:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1900:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1901:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
-1902:Src/main.c **** {
-1903:Src/main.c **** Error_Handler();
-1904:Src/main.c **** }
-1905:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */
-1906:Src/main.c ****
-1907:Src/main.c **** /* USER CODE END TIM10_Init 2 */
-1908:Src/main.c ****
-1909:Src/main.c **** }
-1910:Src/main.c ****
-1911:Src/main.c **** /**
-1912:Src/main.c **** * @brief TIM11 Initialization Function
-1913:Src/main.c **** * @param None
-1914:Src/main.c **** * @retval None
-1915:Src/main.c **** */
-1916:Src/main.c **** static void MX_TIM11_Init(void)
-1917:Src/main.c **** {
-1918:Src/main.c ****
-1919:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */
-1920:Src/main.c ****
-1921:Src/main.c **** /* USER CODE END TIM11_Init 0 */
-1922:Src/main.c ****
-1923:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
-1924:Src/main.c ****
-1925:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */
-1926:Src/main.c ****
-1927:Src/main.c **** /* USER CODE END TIM11_Init 1 */
-1928:Src/main.c **** htim11.Instance = TIM11;
-1929:Src/main.c **** htim11.Init.Prescaler = 1;
-1930:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
-1931:Src/main.c **** htim11.Init.Period = 91;
-1932:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1933:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
-1934:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
-1935:Src/main.c **** {
-1936:Src/main.c **** Error_Handler();
-1937:Src/main.c **** }
-1938:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK)
- ARM GAS /tmp/ccLSPxIe.s page 74
+ 913:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 914:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 915:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 916:Src/main.c ****
+ 917:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
+ 918:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 919:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 920:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 921:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 922:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 923:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 924:Src/main.c ****
+ 925:Src/main.c **** /* USART1 DMA Init */
+ 926:Src/main.c ****
+ 927:Src/main.c **** /* USART1_TX Init */
+ 928:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
+ 929:Src/main.c ****
+ 930:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
+ 931:Src/main.c ****
+ 932:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH);
+ 933:Src/main.c ****
+ 934:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
+ 935:Src/main.c ****
+ 936:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
+ 937:Src/main.c ****
+ 938:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
+ 939:Src/main.c ****
+ 940:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
+ 941:Src/main.c ****
+ 942:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
+ 943:Src/main.c ****
+ 944:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
+ 945:Src/main.c ****
+ 946:Src/main.c **** /* USART1 interrupt Init */
+ 947:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 948:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
+ 949:Src/main.c ****
+ 950:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
+ 951:Src/main.c ****
+ 952:Src/main.c **** /* USER CODE END USART1_Init 1 */
+ 953:Src/main.c **** USART_InitStruct.BaudRate = 115200;
+ 954:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ 955:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ 956:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ 957:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ 958:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ 959:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ 960:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
+ 961:Src/main.c **** LL_USART_ConfigAsyncMode(USART1);
+ 962:Src/main.c **** LL_USART_Enable(USART1);
+ 963:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
+ 964:Src/main.c ****
+ 965:Src/main.c **** /* USER CODE END USART1_Init 2 */
+ 966:Src/main.c ****
+ 967:Src/main.c **** }
+ 968:Src/main.c ****
+ 969:Src/main.c **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 57
-1939:Src/main.c **** {
-1940:Src/main.c **** Error_Handler();
-1941:Src/main.c **** }
-1942:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
-1943:Src/main.c **** sConfigOC.Pulse = 91;
-1944:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
-1945:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
-1946:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
-1947:Src/main.c **** {
-1948:Src/main.c **** Error_Handler();
-1949:Src/main.c **** }
-1950:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */
-1951:Src/main.c ****
-1952:Src/main.c **** /* USER CODE END TIM11_Init 2 */
-1953:Src/main.c **** HAL_TIM_MspPostInit(&htim11);
-1954:Src/main.c ****
-1955:Src/main.c **** }
-1956:Src/main.c ****
-1957:Src/main.c **** /**
-1958:Src/main.c **** * @brief TIM1 Initialization Function
-1959:Src/main.c **** * @param None
-1960:Src/main.c **** * @retval None
-1961:Src/main.c **** */
-1962:Src/main.c **** static void MX_TIM1_Init(void)
-1963:Src/main.c **** {
-1964:Src/main.c ****
-1965:Src/main.c **** /* USER CODE BEGIN TIM1_Init 0 */
-1966:Src/main.c ****
-1967:Src/main.c **** /* USER CODE END TIM1_Init 0 */
-1968:Src/main.c ****
-1969:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0};
-1970:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
-1971:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
-1972:Src/main.c ****
-1973:Src/main.c **** /* USER CODE BEGIN TIM1_Init 1 */
-1974:Src/main.c ****
-1975:Src/main.c **** /* USER CODE END TIM1_Init 1 */
-1976:Src/main.c **** htim1.Instance = TIM1;
-1977:Src/main.c **** htim1.Init.Prescaler = 0;
-1978:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
-1979:Src/main.c **** htim1.Init.Period = 8;
-1980:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
-1981:Src/main.c **** htim1.Init.RepetitionCounter = 0;
-1982:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
-1983:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
-1984:Src/main.c **** {
-1985:Src/main.c **** Error_Handler();
-1986:Src/main.c **** }
-1987:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
-1988:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
-1989:Src/main.c **** {
-1990:Src/main.c **** Error_Handler();
-1991:Src/main.c **** }
-1992:Src/main.c **** if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
-1993:Src/main.c **** {
-1994:Src/main.c **** Error_Handler();
-1995:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 75
-
-
-1996:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1;
-1997:Src/main.c **** sConfigOC.Pulse = 4;
-1998:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
-1999:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
-2000:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
-2001:Src/main.c **** {
-2002:Src/main.c **** Error_Handler();
-2003:Src/main.c **** }
-2004:Src/main.c **** sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
-2005:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
-2006:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
-2007:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
-2008:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
-2009:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
-2010:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
-2011:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
-2012:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
-2013:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
-2014:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
-2015:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
-2016:Src/main.c **** {
-2017:Src/main.c **** Error_Handler();
-2018:Src/main.c **** }
-2019:Src/main.c **** /* USER CODE BEGIN TIM1_Init 2 */
-2020:Src/main.c ****
-2021:Src/main.c **** /* USER CODE END TIM1_Init 2 */
-2022:Src/main.c **** HAL_TIM_MspPostInit(&htim1);
-2023:Src/main.c ****
-2024:Src/main.c **** }
-2025:Src/main.c ****
-2026:Src/main.c **** /**
-2027:Src/main.c **** * @brief UART8 Initialization Function
-2028:Src/main.c **** * @param None
-2029:Src/main.c **** * @retval None
-2030:Src/main.c **** */
-2031:Src/main.c **** static void MX_UART8_Init(void)
-2032:Src/main.c **** {
-2033:Src/main.c ****
-2034:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */
-2035:Src/main.c ****
-2036:Src/main.c **** /* USER CODE END UART8_Init 0 */
-2037:Src/main.c ****
-2038:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */
-2039:Src/main.c ****
-2040:Src/main.c **** /* USER CODE END UART8_Init 1 */
-2041:Src/main.c **** huart8.Instance = UART8;
-2042:Src/main.c **** huart8.Init.BaudRate = 115200;
-2043:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
-2044:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
-2045:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
-2046:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
-2047:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-2048:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
-2049:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
-2050:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
-2051:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
-2052:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 76
-
-
-2053:Src/main.c **** Error_Handler();
-2054:Src/main.c **** }
-2055:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */
-2056:Src/main.c ****
-2057:Src/main.c **** /* USER CODE END UART8_Init 2 */
-2058:Src/main.c ****
-2059:Src/main.c **** }
-2060:Src/main.c ****
-2061:Src/main.c **** /**
-2062:Src/main.c **** * @brief USART1 Initialization Function
-2063:Src/main.c **** * @param None
-2064:Src/main.c **** * @retval None
-2065:Src/main.c **** */
-2066:Src/main.c **** static void MX_USART1_UART_Init(void)
-2067:Src/main.c **** {
-2068:Src/main.c ****
-2069:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */
-2070:Src/main.c ****
-2071:Src/main.c **** /* USER CODE END USART1_Init 0 */
-2072:Src/main.c ****
-2073:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0};
-2074:Src/main.c ****
-2075:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0};
-2076:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-2077:Src/main.c ****
-2078:Src/main.c **** /** Initializes the peripherals clock
-2079:Src/main.c **** */
-2080:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1;
-2081:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
-2082:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
-2083:Src/main.c **** {
-2084:Src/main.c **** Error_Handler();
-2085:Src/main.c **** }
-2086:Src/main.c ****
-2087:Src/main.c **** /* Peripheral clock enable */
-2088:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1);
-2089:Src/main.c ****
-2090:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);
-2091:Src/main.c **** /**USART1 GPIO Configuration
-2092:Src/main.c **** PA9 ------> USART1_TX
-2093:Src/main.c **** PA10 ------> USART1_RX
-2094:Src/main.c **** */
-2095:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9;
-2096:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-2097:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-2098:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-2099:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-2100:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
-2101:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-2102:Src/main.c ****
-2103:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10;
-2104:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
-2105:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
-2106:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
-2107:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
-2108:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
-2109:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- ARM GAS /tmp/ccLSPxIe.s page 77
-
-
-2110:Src/main.c ****
-2111:Src/main.c **** /* USART1 DMA Init */
-2112:Src/main.c ****
-2113:Src/main.c **** /* USART1_TX Init */
-2114:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4);
-2115:Src/main.c ****
-2116:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
-2117:Src/main.c ****
-2118:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH);
-2119:Src/main.c ****
-2120:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL);
-2121:Src/main.c ****
-2122:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT);
-2123:Src/main.c ****
-2124:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT);
-2125:Src/main.c ****
-2126:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE);
-2127:Src/main.c ****
-2128:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE);
-2129:Src/main.c ****
-2130:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7);
-2131:Src/main.c ****
-2132:Src/main.c **** /* USART1 interrupt Init */
-2133:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
-2134:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
-2135:Src/main.c ****
-2136:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */
-2137:Src/main.c ****
-2138:Src/main.c **** /* USER CODE END USART1_Init 1 */
-2139:Src/main.c **** USART_InitStruct.BaudRate = 115200;
-2140:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
-2141:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
-2142:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
-2143:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
-2144:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
-2145:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
-2146:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
-2147:Src/main.c **** LL_USART_ConfigAsyncMode(USART1);
-2148:Src/main.c **** LL_USART_Enable(USART1);
-2149:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
-2150:Src/main.c ****
-2151:Src/main.c **** /* USER CODE END USART1_Init 2 */
-2152:Src/main.c ****
-2153:Src/main.c **** }
-2154:Src/main.c ****
-2155:Src/main.c **** /**
-2156:Src/main.c **** * Enable DMA controller clock
-2157:Src/main.c **** */
-2158:Src/main.c **** static void MX_DMA_Init(void)
-2159:Src/main.c **** {
- 144 .loc 1 2159 1 is_stmt 1 view -0
+ 970:Src/main.c **** * Enable DMA controller clock
+ 971:Src/main.c **** */
+ 972:Src/main.c **** static void MX_DMA_Init(void)
+ 973:Src/main.c **** {
+ 144 .loc 1 973 1 is_stmt 1 view -0
145 .cfi_startproc
146 @ args = 0, pretend = 0, frame = 8
147 @ frame_needed = 0, uses_anonymous_args = 0
148 0000 00B5 push {lr}
149 .LCFI1:
150 .cfi_def_cfa_offset 4
- ARM GAS /tmp/ccLSPxIe.s page 78
-
-
151 .cfi_offset 14, -4
152 0002 83B0 sub sp, sp, #12
153 .LCFI2:
154 .cfi_def_cfa_offset 16
-2160:Src/main.c ****
-2161:Src/main.c **** /* Init with LL driver */
-2162:Src/main.c **** /* DMA controller clock enable */
-2163:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
- 155 .loc 1 2163 3 view .LVU37
+ 974:Src/main.c ****
+ 975:Src/main.c **** /* Init with LL driver */
+ 976:Src/main.c **** /* DMA controller clock enable */
+ 977:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2);
+ 155 .loc 1 977 3 view .LVU37
156 .LVL8:
- 157 .LBB355:
- 158 .LBI355:
+ 157 .LBB136:
+ 158 .LBI136:
159 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ******************************************************************************
@@ -4667,6 +3418,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * If no LICENSE file comes with this software, it is provided AS-IS.
32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ******************************************************************************
33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 58
+
+
34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H
@@ -4678,9 +3432,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h"
- ARM GAS /tmp/ccLSPxIe.s page 79
-
-
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver
47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
@@ -4727,6 +3478,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA1 RCC_AHB1ENR_DMA1EN
89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN
90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(DMA2D)
+ ARM GAS /tmp/ccDGOsZt.s page 59
+
+
91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN
92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* DMA2D */
93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH)
@@ -4738,9 +3492,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHS RCC_AHB1ENR_OTGHSEN
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN
101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI RCC_AHB1LPENR_AXILPEN
- ARM GAS /tmp/ccLSPxIe.s page 80
-
-
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN
103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN
104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN
@@ -4787,6 +3538,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU
+ ARM GAS /tmp/ccDGOsZt.s page 60
+
+
148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN
149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN
150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN
@@ -4798,9 +3552,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM14 RCC_APB1ENR_TIM14EN
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN
158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN
- ARM GAS /tmp/ccLSPxIe.s page 81
-
-
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN
160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN
161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX)
@@ -4847,6 +3598,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_USART6 RCC_APB2ENR_USART6EN
203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC1 RCC_APB2ENR_ADC1EN
204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN
+ ARM GAS /tmp/ccDGOsZt.s page 61
+
+
205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN
206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC1 RCC_APB2ENR_SDMMC1EN
207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2)
@@ -4858,9 +3612,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM9 RCC_APB2ENR_TIM9EN
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN
215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN
- ARM GAS /tmp/ccLSPxIe.s page 82
-
-
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN
217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6)
218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN
@@ -4907,6 +3658,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_EnableClock\n
260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_EnableClock\n
261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n
+ ARM GAS /tmp/ccDGOsZt.s page 62
+
+
262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n
263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n
264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n
@@ -4918,9 +3672,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_EnableClock\n
271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_EnableClock\n
272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccLSPxIe.s page 83
-
-
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n
274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n
275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n
@@ -4959,7 +3710,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClock(uint32_t Periphs)
160 .loc 3 309 22 view .LVU38
- 161 .LBB356:
+ 161 .LBB137:
310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
162 .loc 3 311 3 view .LVU39
@@ -4967,6 +3718,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
163 .loc 3 312 3 view .LVU40
164 0004 0D4B ldr r3, .L10
165 0006 1A6B ldr r2, [r3, #48]
+ ARM GAS /tmp/ccDGOsZt.s page 63
+
+
166 0008 42F48002 orr r2, r2, #4194304
167 000c 1A63 str r2, [r3, #48]
313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
@@ -4978,44 +3732,41 @@ ARM GAS /tmp/ccLSPxIe.s page 1
172 .loc 3 314 10 view .LVU43
173 0014 0193 str r3, [sp, #4]
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- ARM GAS /tmp/ccLSPxIe.s page 84
-
-
174 .loc 3 315 3 is_stmt 1 view .LVU44
175 0016 019B ldr r3, [sp, #4]
176 .LVL9:
177 .loc 3 315 3 is_stmt 0 view .LVU45
- 178 .LBE356:
- 179 .LBE355:
-2164:Src/main.c ****
-2165:Src/main.c **** /* DMA interrupt init */
-2166:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */
-2167:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
- 180 .loc 1 2167 3 is_stmt 1 view .LVU46
- 181 .LBB357:
- 182 .LBI357:
+ 178 .LBE137:
+ 179 .LBE136:
+ 978:Src/main.c ****
+ 979:Src/main.c **** /* DMA interrupt init */
+ 980:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */
+ 981:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0));
+ 180 .loc 1 981 3 is_stmt 1 view .LVU46
+ 181 .LBB138:
+ 182 .LBI138:
1884:Drivers/CMSIS/Include/core_cm7.h **** {
183 .loc 2 1884 26 view .LVU47
- 184 .LBB358:
+ 184 .LBB139:
1886:Drivers/CMSIS/Include/core_cm7.h **** }
185 .loc 2 1886 3 view .LVU48
1886:Drivers/CMSIS/Include/core_cm7.h **** }
186 .loc 2 1886 26 is_stmt 0 view .LVU49
187 0018 094B ldr r3, .L10+4
188 001a D868 ldr r0, [r3, #12]
- 189 .LBE358:
- 190 .LBE357:
- 191 .loc 1 2167 3 discriminator 1 view .LVU50
+ 189 .LBE139:
+ 190 .LBE138:
+ 191 .loc 1 981 3 discriminator 1 view .LVU50
192 001c 0022 movs r2, #0
193 001e 1146 mov r1, r2
194 0020 C0F30220 ubfx r0, r0, #8, #3
195 0024 FFF7FEFF bl NVIC_EncodePriority
196 .LVL10:
- 197 .LBB359:
- 198 .LBI359:
+ 197 .LBB140:
+ 198 .LBI140:
2024:Drivers/CMSIS/Include/core_cm7.h **** {
199 .loc 2 2024 22 is_stmt 1 view .LVU51
- 200 .LBB360:
+ 200 .LBB141:
2026:Drivers/CMSIS/Include/core_cm7.h **** {
201 .loc 2 2026 3 view .LVU52
2028:Drivers/CMSIS/Include/core_cm7.h **** }
@@ -5027,6 +3778,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2028:Drivers/CMSIS/Include/core_cm7.h **** }
206 .loc 2 2028 49 view .LVU55
207 002a C0B2 uxtb r0, r0
+ ARM GAS /tmp/ccDGOsZt.s page 64
+
+
2028:Drivers/CMSIS/Include/core_cm7.h **** }
208 .loc 2 2028 47 view .LVU56
209 002c 054B ldr r3, .L10+8
@@ -5034,18 +3788,15 @@ ARM GAS /tmp/ccLSPxIe.s page 1
211 .LVL12:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
212 .loc 2 2028 47 view .LVU57
- 213 .LBE360:
- 214 .LBE359:
-2168:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn);
- 215 .loc 1 2168 3 is_stmt 1 view .LVU58
- ARM GAS /tmp/ccLSPxIe.s page 85
-
-
- 216 .LBB361:
- 217 .LBI361:
+ 213 .LBE141:
+ 214 .LBE140:
+ 982:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn);
+ 215 .loc 1 982 3 is_stmt 1 view .LVU58
+ 216 .LBB142:
+ 217 .LBI142:
1896:Drivers/CMSIS/Include/core_cm7.h **** {
218 .loc 2 1896 22 view .LVU59
- 219 .LBB362:
+ 219 .LBB143:
1898:Drivers/CMSIS/Include/core_cm7.h **** {
220 .loc 2 1898 3 view .LVU60
1900:Drivers/CMSIS/Include/core_cm7.h **** }
@@ -5057,11 +3808,11 @@ ARM GAS /tmp/ccLSPxIe.s page 1
225 .LVL13:
1900:Drivers/CMSIS/Include/core_cm7.h **** }
226 .loc 2 1900 43 view .LVU63
- 227 .LBE362:
- 228 .LBE361:
-2169:Src/main.c ****
-2170:Src/main.c **** }
- 229 .loc 1 2170 1 view .LVU64
+ 227 .LBE143:
+ 228 .LBE142:
+ 983:Src/main.c ****
+ 984:Src/main.c **** }
+ 229 .loc 1 984 1 view .LVU64
230 0036 03B0 add sp, sp, #12
231 .LCFI3:
232 .cfi_def_cfa_offset 4
@@ -5074,946 +3825,2315 @@ ARM GAS /tmp/ccLSPxIe.s page 1
239 0040 00ED00E0 .word -536810240
240 0044 00E100E0 .word -536813312
241 .cfi_endproc
- 242 .LFE1206:
- 244 .section .text.Decode_task,"ax",%progbits
+ 242 .LFE1199:
+ 244 .section .text.MX_GPIO_Init,"ax",%progbits
245 .align 1
246 .syntax unified
247 .thumb
248 .thumb_func
- 250 Decode_task:
- 251 .LVL14:
- 252 .LFB1210:
-2171:Src/main.c ****
-2172:Src/main.c **** /**
-2173:Src/main.c **** * @brief GPIO Initialization Function
-2174:Src/main.c **** * @param None
-2175:Src/main.c **** * @retval None
-2176:Src/main.c **** */
-2177:Src/main.c **** static void MX_GPIO_Init(void)
-2178:Src/main.c **** {
-2179:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
-2180:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */
-2181:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */
-2182:Src/main.c ****
-2183:Src/main.c **** /* GPIO Ports Clock Enable */
-2184:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
-2185:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE();
- ARM GAS /tmp/ccLSPxIe.s page 86
+ 250 MX_GPIO_Init:
+ 251 .LFB1200:
+ 985:Src/main.c ****
+ 986:Src/main.c **** /**
+ 987:Src/main.c **** * @brief GPIO Initialization Function
+ 988:Src/main.c **** * @param None
+ 989:Src/main.c **** * @retval None
+ ARM GAS /tmp/ccDGOsZt.s page 65
-2186:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
-2187:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
-2188:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
-2189:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE();
-2190:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
-2191:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE();
-2192:Src/main.c ****
-2193:Src/main.c **** /*Configure GPIO pin Output Level */
-2194:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
-2195:Src/main.c ****
-2196:Src/main.c **** /*Configure GPIO pin Output Level */
-2197:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET);
-2198:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
-2199:Src/main.c ****
-2200:Src/main.c **** /*Configure GPIO pin Output Level */
-2201:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET);
-2202:Src/main.c ****
-2203:Src/main.c **** /*Configure GPIO pin Output Level */
-2204:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
-2205:Src/main.c ****
-2206:Src/main.c **** /*Configure GPIO pin Output Level */
-2207:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
-2208:Src/main.c **** HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET);
-2209:Src/main.c ****
-2210:Src/main.c **** /*Configure GPIO pin Output Level */
-2211:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
-2212:Src/main.c ****
-2213:Src/main.c **** /*Configure GPIO pin Output Level */
-2214:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
-2215:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
-2216:Src/main.c ****
-2217:Src/main.c **** /*Configure GPIO pin Output Level */
-2218:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-2219:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2220:Src/main.c ****
-2221:Src/main.c **** /*Configure GPIO pin Output Level */
-2222:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
-2223:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2224:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
-2225:Src/main.c ****
-2226:Src/main.c **** /*Configure GPIO pin Output Level */
-2227:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
-2228:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
-2229:Src/main.c ****
-2230:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */
-2231:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin;
-2232:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2233:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
-2234:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-2235:Src/main.c ****
-2236:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */
-2237:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin;
-2238:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2239:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2240:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2241:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-2242:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 87
+ 990:Src/main.c **** */
+ 991:Src/main.c **** static void MX_GPIO_Init(void)
+ 992:Src/main.c **** {
+ 252 .loc 1 992 1 is_stmt 1 view -0
+ 253 .cfi_startproc
+ 254 @ args = 0, pretend = 0, frame = 56
+ 255 @ frame_needed = 0, uses_anonymous_args = 0
+ 256 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+ 257 .LCFI4:
+ 258 .cfi_def_cfa_offset 36
+ 259 .cfi_offset 4, -36
+ 260 .cfi_offset 5, -32
+ 261 .cfi_offset 6, -28
+ 262 .cfi_offset 7, -24
+ 263 .cfi_offset 8, -20
+ 264 .cfi_offset 9, -16
+ 265 .cfi_offset 10, -12
+ 266 .cfi_offset 11, -8
+ 267 .cfi_offset 14, -4
+ 268 0004 8FB0 sub sp, sp, #60
+ 269 .LCFI5:
+ 270 .cfi_def_cfa_offset 96
+ 993:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
+ 271 .loc 1 993 3 view .LVU66
+ 272 .loc 1 993 20 is_stmt 0 view .LVU67
+ 273 0006 0024 movs r4, #0
+ 274 0008 0994 str r4, [sp, #36]
+ 275 000a 0A94 str r4, [sp, #40]
+ 276 000c 0B94 str r4, [sp, #44]
+ 277 000e 0C94 str r4, [sp, #48]
+ 278 0010 0D94 str r4, [sp, #52]
+ 994:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */
+ 995:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */
+ 996:Src/main.c ****
+ 997:Src/main.c **** /* GPIO Ports Clock Enable */
+ 998:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE();
+ 279 .loc 1 998 3 is_stmt 1 view .LVU68
+ 280 .LBB144:
+ 281 .loc 1 998 3 view .LVU69
+ 282 .loc 1 998 3 view .LVU70
+ 283 0012 984B ldr r3, .L14
+ 284 0014 1A6B ldr r2, [r3, #48]
+ 285 0016 42F02002 orr r2, r2, #32
+ 286 001a 1A63 str r2, [r3, #48]
+ 287 .loc 1 998 3 view .LVU71
+ 288 001c 1A6B ldr r2, [r3, #48]
+ 289 001e 02F02002 and r2, r2, #32
+ 290 0022 0192 str r2, [sp, #4]
+ 291 .loc 1 998 3 view .LVU72
+ 292 0024 019A ldr r2, [sp, #4]
+ 293 .LBE144:
+ 294 .loc 1 998 3 view .LVU73
+ 999:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE();
+ 295 .loc 1 999 3 view .LVU74
+ 296 .LBB145:
+ 297 .loc 1 999 3 view .LVU75
+ 298 .loc 1 999 3 view .LVU76
+ ARM GAS /tmp/ccDGOsZt.s page 66
-2243:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
-2244:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
-2245:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2246:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2247:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2248:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
-2249:Src/main.c ****
-2250:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */
-2251:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin;
-2252:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2253:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2254:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-2255:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
-2256:Src/main.c ****
-2257:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_LD2_CS_Pin */
-2258:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin;
-2259:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2260:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2261:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2262:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-2263:Src/main.c ****
-2264:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */
-2265:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin;
-2266:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2267:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2268:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
-2269:Src/main.c ****
-2270:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin DAC_TEC2_CS_Pin */
-2271:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin|DAC_TEC2_CS_Pin;
-2272:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2273:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2274:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2275:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-2276:Src/main.c ****
-2277:Src/main.c **** /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */
-2278:Src/main.c **** GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin;
-2279:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
-2280:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2281:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2282:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
-2283:Src/main.c ****
-2284:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */
-2285:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin;
-2286:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2287:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2288:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
-2289:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
-2290:Src/main.c ****
-2291:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin
-2292:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
-2293:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin
-2294:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
-2295:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2296:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2297:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2298:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
-2299:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 88
+ 299 0026 1A6B ldr r2, [r3, #48]
+ 300 0028 42F08002 orr r2, r2, #128
+ 301 002c 1A63 str r2, [r3, #48]
+ 302 .loc 1 999 3 view .LVU77
+ 303 002e 1A6B ldr r2, [r3, #48]
+ 304 0030 02F08002 and r2, r2, #128
+ 305 0034 0292 str r2, [sp, #8]
+ 306 .loc 1 999 3 view .LVU78
+ 307 0036 029A ldr r2, [sp, #8]
+ 308 .LBE145:
+ 309 .loc 1 999 3 view .LVU79
+1000:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE();
+ 310 .loc 1 1000 3 view .LVU80
+ 311 .LBB146:
+ 312 .loc 1 1000 3 view .LVU81
+ 313 .loc 1 1000 3 view .LVU82
+ 314 0038 1A6B ldr r2, [r3, #48]
+ 315 003a 42F00402 orr r2, r2, #4
+ 316 003e 1A63 str r2, [r3, #48]
+ 317 .loc 1 1000 3 view .LVU83
+ 318 0040 1A6B ldr r2, [r3, #48]
+ 319 0042 02F00402 and r2, r2, #4
+ 320 0046 0392 str r2, [sp, #12]
+ 321 .loc 1 1000 3 view .LVU84
+ 322 0048 039A ldr r2, [sp, #12]
+ 323 .LBE146:
+ 324 .loc 1 1000 3 view .LVU85
+1001:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
+ 325 .loc 1 1001 3 view .LVU86
+ 326 .LBB147:
+ 327 .loc 1 1001 3 view .LVU87
+ 328 .loc 1 1001 3 view .LVU88
+ 329 004a 1A6B ldr r2, [r3, #48]
+ 330 004c 42F00102 orr r2, r2, #1
+ 331 0050 1A63 str r2, [r3, #48]
+ 332 .loc 1 1001 3 view .LVU89
+ 333 0052 1A6B ldr r2, [r3, #48]
+ 334 0054 02F00102 and r2, r2, #1
+ 335 0058 0492 str r2, [sp, #16]
+ 336 .loc 1 1001 3 view .LVU90
+ 337 005a 049A ldr r2, [sp, #16]
+ 338 .LBE147:
+ 339 .loc 1 1001 3 view .LVU91
+1002:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
+ 340 .loc 1 1002 3 view .LVU92
+ 341 .LBB148:
+ 342 .loc 1 1002 3 view .LVU93
+ 343 .loc 1 1002 3 view .LVU94
+ 344 005c 1A6B ldr r2, [r3, #48]
+ 345 005e 42F00202 orr r2, r2, #2
+ 346 0062 1A63 str r2, [r3, #48]
+ 347 .loc 1 1002 3 view .LVU95
+ 348 0064 1A6B ldr r2, [r3, #48]
+ 349 0066 02F00202 and r2, r2, #2
+ 350 006a 0592 str r2, [sp, #20]
+ 351 .loc 1 1002 3 view .LVU96
+ 352 006c 059A ldr r2, [sp, #20]
+ ARM GAS /tmp/ccDGOsZt.s page 67
-2300:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin
-2301:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS
-2302:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2303:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2304:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2305:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
-2306:Src/main.c ****
-2307:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */
-2308:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin;
-2309:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2310:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2311:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
-2312:Src/main.c ****
-2313:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */
-2314:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin;
-2315:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-2316:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2317:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
-2318:Src/main.c ****
-2319:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin
-2320:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */
-2321:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
-2322:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
-2323:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-2324:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2325:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
-2326:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
-2327:Src/main.c ****
-2328:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */
-2329:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */
-2330:Src/main.c **** }
-2331:Src/main.c ****
-2332:Src/main.c **** /* USER CODE BEGIN 4 */
-2333:Src/main.c ****
-2334:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) {
-2335:Src/main.c ****
-2336:Src/main.c **** // UART_transmission_request = NO_MESS;
-2337:Src/main.c ****
-2338:Src/main.c **** //}
-2339:Src/main.c ****
-2340:Src/main.c **** static void Init_params(void)
-2341:Src/main.c **** {
-2342:Src/main.c **** TO6 = 0;
-2343:Src/main.c **** TO7 = 0;
-2344:Src/main.c **** TO7_before = 0;
-2345:Src/main.c **** TO6_before = 0;
-2346:Src/main.c **** TO6_uart = 0;
-2347:Src/main.c **** flg_tmt = 0;
-2348:Src/main.c **** UART_rec_incr = 0;
-2349:Src/main.c **** fgoto = 0;
-2350:Src/main.c **** sizeoffile = 0;
-2351:Src/main.c **** u_tx_flg = 0;
-2352:Src/main.c **** u_rx_flg = 0;
-2353:Src/main.c **** //State_Data[0]=0;
-2354:Src/main.c **** //State_Data[1]=0;//All OK!
-2355:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
-2510:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
-2511:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
-2512:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
-2513:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
-2514:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
-2515:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
-2516:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
-2517:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
-2518:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
-2519:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
-2520:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
-2521:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
-2522:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
-2523:Src/main.c ****
-2524:Src/main.c **** temp2++;
-2525:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
-2526:Src/main.c **** temp2++;
-2527:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- ARM GAS /tmp/ccLSPxIe.s page 92
+ 488 0154 FFF7FEFF bl HAL_GPIO_WritePin
+ 489 .LVL27:
+1039:Src/main.c ****
+1040:Src/main.c **** /*Configure GPIO pin Output Level */
+1041:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
+ 490 .loc 1 1041 3 view .LVU130
+ 491 0158 2246 mov r2, r4
+ 492 015a 4FF47E41 mov r1, #65024
+ 493 015e 4848 ldr r0, .L14+12
+ 494 0160 FFF7FEFF bl HAL_GPIO_WritePin
+ 495 .LVL28:
+1042:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET);
+1043:Src/main.c ****
+1044:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */
+1045:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin;
+ 496 .loc 1 1045 3 view .LVU131
+ 497 .loc 1 1045 23 is_stmt 0 view .LVU132
+ 498 0164 1823 movs r3, #24
+ 499 0166 0993 str r3, [sp, #36]
+1046:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 500 .loc 1 1046 3 is_stmt 1 view .LVU133
+ 501 .loc 1 1046 24 is_stmt 0 view .LVU134
+ 502 0168 0A94 str r4, [sp, #40]
+1047:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP;
+ 503 .loc 1 1047 3 is_stmt 1 view .LVU135
+ 504 .loc 1 1047 24 is_stmt 0 view .LVU136
+ 505 016a 0125 movs r5, #1
+ 506 016c 0B95 str r5, [sp, #44]
+1048:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 507 .loc 1 1048 3 is_stmt 1 view .LVU137
+ 508 016e 09A9 add r1, sp, #36
+ 509 0170 4046 mov r0, r8
+ 510 0172 FFF7FEFF bl HAL_GPIO_Init
+ 511 .LVL29:
+1049:Src/main.c ****
+1050:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */
+1051:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin;
+ 512 .loc 1 1051 3 view .LVU138
+ 513 .loc 1 1051 23 is_stmt 0 view .LVU139
+ 514 0176 4FF4C863 mov r3, #1600
+ 515 017a 0993 str r3, [sp, #36]
+1052:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 516 .loc 1 1052 3 is_stmt 1 view .LVU140
+ 517 .loc 1 1052 24 is_stmt 0 view .LVU141
+ 518 017c 0A95 str r5, [sp, #40]
+1053:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 519 .loc 1 1053 3 is_stmt 1 view .LVU142
+ 520 .loc 1 1053 24 is_stmt 0 view .LVU143
+ 521 017e 0B94 str r4, [sp, #44]
+1054:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 522 .loc 1 1054 3 is_stmt 1 view .LVU144
+ 523 .loc 1 1054 25 is_stmt 0 view .LVU145
+ 524 0180 0C94 str r4, [sp, #48]
+1055:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 525 .loc 1 1055 3 is_stmt 1 view .LVU146
+ 526 0182 09A9 add r1, sp, #36
+ 527 0184 4046 mov r0, r8
+ ARM GAS /tmp/ccDGOsZt.s page 71
-2528:Src/main.c **** temp2++;
-2529:Src/main.c **** temp2++;
-2530:Src/main.c **** temp2++;
-2531:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2);
-2532:Src/main.c **** temp2++;
-2533:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2534:Src/main.c **** temp2++;
-2535:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2536:Src/main.c **** temp2++;
-2537:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2538:Src/main.c **** temp2++;
-2539:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
-2540:Src/main.c **** temp2++;
-2541:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID
-2542:Src/main.c **** temp2++;
-2543:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
-2544:Src/main.c **** temp2++;
-2545:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
-2546:Src/main.c **** temp2++;
-2547:Src/main.c ****
-2548:Src/main.c **** if (Curr_setup->U5V1_EN)
-2549:Src/main.c **** {
-2550:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET);
-2551:Src/main.c **** }
-2552:Src/main.c **** else
-2553:Src/main.c **** {
-2554:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET);
-2555:Src/main.c **** }
-2556:Src/main.c ****
-2557:Src/main.c **** if (Curr_setup->U5V2_EN)
-2558:Src/main.c **** {
-2559:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET);
-2560:Src/main.c **** }
-2561:Src/main.c **** else
-2562:Src/main.c **** {
-2563:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
-2564:Src/main.c **** }
-2565:Src/main.c ****
-2566:Src/main.c **** if (Curr_setup->LD1_EN)
-2567:Src/main.c **** {
-2568:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET);
-2569:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
-2570:Src/main.c **** }
-2571:Src/main.c **** else
-2572:Src/main.c **** {
-2573:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
-2574:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
-2575:Src/main.c **** }
-2576:Src/main.c ****
-2577:Src/main.c **** if (Curr_setup->LD2_EN)
-2578:Src/main.c **** {
-2579:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET);
-2580:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
-2581:Src/main.c **** }
-2582:Src/main.c **** else
-2583:Src/main.c **** {
-2584:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
- ARM GAS /tmp/ccLSPxIe.s page 93
+ 528 0186 FFF7FEFF bl HAL_GPIO_Init
+ 529 .LVL30:
+1056:Src/main.c ****
+1057:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin AD9102_RESET_Pin */
+1058:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin|AD9102_RESET_Pin;
+ 530 .loc 1 1058 3 view .LVU147
+ 531 .loc 1 1058 23 is_stmt 0 view .LVU148
+ 532 018a F023 movs r3, #240
+ 533 018c 0993 str r3, [sp, #36]
+1059:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 534 .loc 1 1059 3 is_stmt 1 view .LVU149
+ 535 .loc 1 1059 24 is_stmt 0 view .LVU150
+ 536 018e 0A95 str r5, [sp, #40]
+1060:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 537 .loc 1 1060 3 is_stmt 1 view .LVU151
+ 538 .loc 1 1060 24 is_stmt 0 view .LVU152
+ 539 0190 0B94 str r4, [sp, #44]
+1061:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 540 .loc 1 1061 3 is_stmt 1 view .LVU153
+ 541 .loc 1 1061 25 is_stmt 0 view .LVU154
+ 542 0192 0C94 str r4, [sp, #48]
+1062:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+ 543 .loc 1 1062 3 is_stmt 1 view .LVU155
+ 544 0194 09A9 add r1, sp, #36
+ 545 0196 4846 mov r0, r9
+ 546 0198 FFF7FEFF bl HAL_GPIO_Init
+ 547 .LVL31:
+1063:Src/main.c ****
+1064:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */
+1065:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin;
+ 548 .loc 1 1065 3 view .LVU156
+ 549 .loc 1 1065 23 is_stmt 0 view .LVU157
+ 550 019c 0823 movs r3, #8
+ 551 019e 0993 str r3, [sp, #36]
+1066:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 552 .loc 1 1066 3 is_stmt 1 view .LVU158
+ 553 .loc 1 1066 24 is_stmt 0 view .LVU159
+ 554 01a0 0A95 str r5, [sp, #40]
+1067:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 555 .loc 1 1067 3 is_stmt 1 view .LVU160
+ 556 .loc 1 1067 24 is_stmt 0 view .LVU161
+ 557 01a2 0B94 str r4, [sp, #44]
+1068:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 558 .loc 1 1068 3 is_stmt 1 view .LVU162
+ 559 .loc 1 1068 25 is_stmt 0 view .LVU163
+ 560 01a4 0323 movs r3, #3
+ 561 01a6 0C93 str r3, [sp, #48]
+1069:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct);
+ 562 .loc 1 1069 3 is_stmt 1 view .LVU164
+ 563 01a8 09A9 add r1, sp, #36
+ 564 01aa 4846 mov r0, r9
+ 565 01ac FFF7FEFF bl HAL_GPIO_Init
+ 566 .LVL32:
+1070:Src/main.c ****
+1071:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_LD2_CS_Pin */
+1072:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin;
+ 567 .loc 1 1072 3 view .LVU165
+ ARM GAS /tmp/ccDGOsZt.s page 72
-2585:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
-2586:Src/main.c **** }
-2587:Src/main.c ****
-2588:Src/main.c **** if (Curr_setup->REF1_EN)
-2589:Src/main.c **** {
-2590:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET);
-2591:Src/main.c **** }
-2592:Src/main.c **** else
-2593:Src/main.c **** {
-2594:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
-2595:Src/main.c **** }
-2596:Src/main.c ****
-2597:Src/main.c **** if (Curr_setup->REF2_EN)
-2598:Src/main.c **** {
-2599:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET);
-2600:Src/main.c **** }
-2601:Src/main.c **** else
-2602:Src/main.c **** {
-2603:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
-2604:Src/main.c **** }
-2605:Src/main.c ****
-2606:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN))
-2607:Src/main.c **** {
-2608:Src/main.c **** Set_LTEC(3,32767);
-2609:Src/main.c **** Set_LTEC(3,32767);
-2610:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
-2611:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
-2612:Src/main.c **** }
-2613:Src/main.c **** else
-2614:Src/main.c **** {
-2615:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
-2616:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
-2617:Src/main.c **** }
-2618:Src/main.c ****
-2619:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN))
-2620:Src/main.c **** {
-2621:Src/main.c **** Set_LTEC(4,32767);
-2622:Src/main.c **** Set_LTEC(4,32767);
-2623:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
-2624:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
-2625:Src/main.c **** }
-2626:Src/main.c **** else
-2627:Src/main.c **** {
-2628:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
-2629:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
-2630:Src/main.c **** }
-2631:Src/main.c ****
-2632:Src/main.c **** if (Curr_setup->PI1_RD==0)
-2633:Src/main.c **** {
-2634:Src/main.c **** LD1_curr_setup->P_coef_temp = 10;
-2635:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01;
-2636:Src/main.c **** }
-2637:Src/main.c ****
-2638:Src/main.c **** if (Curr_setup->PI2_RD==0)
-2639:Src/main.c **** {
-2640:Src/main.c **** LD2_curr_setup->P_coef_temp = 10;
-2641:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01;
- ARM GAS /tmp/ccLSPxIe.s page 94
+ 568 .loc 1 1072 23 is_stmt 0 view .LVU166
+ 569 01b0 4B23 movs r3, #75
+ 570 01b2 0993 str r3, [sp, #36]
+1073:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 571 .loc 1 1073 3 is_stmt 1 view .LVU167
+ 572 .loc 1 1073 24 is_stmt 0 view .LVU168
+ 573 01b4 0A95 str r5, [sp, #40]
+1074:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 574 .loc 1 1074 3 is_stmt 1 view .LVU169
+ 575 .loc 1 1074 24 is_stmt 0 view .LVU170
+ 576 01b6 0B94 str r4, [sp, #44]
+1075:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 577 .loc 1 1075 3 is_stmt 1 view .LVU171
+ 578 .loc 1 1075 25 is_stmt 0 view .LVU172
+ 579 01b8 0C94 str r4, [sp, #48]
+1076:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 580 .loc 1 1076 3 is_stmt 1 view .LVU173
+ 581 01ba 09A9 add r1, sp, #36
+ 582 01bc 5046 mov r0, r10
+ 583 01be FFF7FEFF bl HAL_GPIO_Init
+ 584 .LVL33:
+1077:Src/main.c ****
+1078:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */
+1079:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin;
+ 585 .loc 1 1079 3 view .LVU174
+ 586 .loc 1 1079 23 is_stmt 0 view .LVU175
+ 587 01c2 4FF4F043 mov r3, #30720
+ 588 01c6 0993 str r3, [sp, #36]
+1080:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 589 .loc 1 1080 3 is_stmt 1 view .LVU176
+ 590 .loc 1 1080 24 is_stmt 0 view .LVU177
+ 591 01c8 0A94 str r4, [sp, #40]
+1081:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 592 .loc 1 1081 3 is_stmt 1 view .LVU178
+ 593 .loc 1 1081 24 is_stmt 0 view .LVU179
+ 594 01ca 0B94 str r4, [sp, #44]
+1082:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 595 .loc 1 1082 3 is_stmt 1 view .LVU180
+ 596 01cc 09A9 add r1, sp, #36
+ 597 01ce 4046 mov r0, r8
+ 598 01d0 FFF7FEFF bl HAL_GPIO_Init
+ 599 .LVL34:
+1083:Src/main.c ****
+1084:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin DAC_TEC2_CS_Pin */
+1085:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin|DAC_TEC2_CS_Pin;
+ 600 .loc 1 1085 3 view .LVU181
+ 601 .loc 1 1085 23 is_stmt 0 view .LVU182
+ 602 01d4 4FF45063 mov r3, #3328
+ 603 01d8 0993 str r3, [sp, #36]
+1086:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 604 .loc 1 1086 3 is_stmt 1 view .LVU183
+ 605 .loc 1 1086 24 is_stmt 0 view .LVU184
+ 606 01da 0A95 str r5, [sp, #40]
+1087:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 607 .loc 1 1087 3 is_stmt 1 view .LVU185
+ 608 .loc 1 1087 24 is_stmt 0 view .LVU186
+ 609 01dc 0B94 str r4, [sp, #44]
+ ARM GAS /tmp/ccDGOsZt.s page 73
-2642:Src/main.c **** }
-2643:Src/main.c **** }
-2644:Src/main.c ****
-2645:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
-2646:Src/main.c **** {
- 253 .loc 1 2646 1 is_stmt 1 view -0
- 254 .cfi_startproc
- 255 @ args = 0, pretend = 0, frame = 8
- 256 @ frame_needed = 0, uses_anonymous_args = 0
- 257 @ link register save eliminated.
- 258 .loc 1 2646 1 is_stmt 0 view .LVU66
- 259 0000 82B0 sub sp, sp, #8
- 260 .LCFI4:
- 261 .cfi_def_cfa_offset 8
-2647:Src/main.c **** uint16_t *temp2;
- 262 .loc 1 2647 2 is_stmt 1 view .LVU67
-2648:Src/main.c ****
-2649:Src/main.c **** temp2 = (uint16_t *)Command;
- 263 .loc 1 2649 2 view .LVU68
- 264 .LVL15:
-2650:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- 265 .loc 1 2650 2 view .LVU69
- 266 .loc 1 2650 36 is_stmt 0 view .LVU70
- 267 0002 0288 ldrh r2, [r0]
- 268 .LVL16:
- 269 .loc 1 2650 48 view .LVU71
- 270 0004 02F00102 and r2, r2, #1
- 271 .loc 1 2650 22 view .LVU72
- 272 0008 1A70 strb r2, [r3]
-2651:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 273 .loc 1 2651 2 is_stmt 1 view .LVU73
- 274 .loc 1 2651 36 is_stmt 0 view .LVU74
- 275 000a 0288 ldrh r2, [r0]
- 276 .loc 1 2651 48 view .LVU75
- 277 000c C2F34002 ubfx r2, r2, #1, #1
- 278 .loc 1 2651 22 view .LVU76
- 279 0010 5A70 strb r2, [r3, #1]
-2652:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 280 .loc 1 2652 2 is_stmt 1 view .LVU77
- 281 .loc 1 2652 36 is_stmt 0 view .LVU78
- 282 0012 0288 ldrh r2, [r0]
- 283 .loc 1 2652 48 view .LVU79
- 284 0014 C2F38002 ubfx r2, r2, #2, #1
- 285 .loc 1 2652 22 view .LVU80
- 286 0018 9A70 strb r2, [r3, #2]
-2653:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 287 .loc 1 2653 2 is_stmt 1 view .LVU81
- 288 .loc 1 2653 35 is_stmt 0 view .LVU82
- 289 001a 0288 ldrh r2, [r0]
- 290 .loc 1 2653 47 view .LVU83
- 291 001c C2F3C002 ubfx r2, r2, #3, #1
- 292 .loc 1 2653 21 view .LVU84
- 293 0020 DA70 strb r2, [r3, #3]
-2654:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 294 .loc 1 2654 2 is_stmt 1 view .LVU85
- 295 .loc 1 2654 35 is_stmt 0 view .LVU86
- 296 0022 0288 ldrh r2, [r0]
- ARM GAS /tmp/ccLSPxIe.s page 95
+1088:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 610 .loc 1 1088 3 is_stmt 1 view .LVU187
+ 611 .loc 1 1088 25 is_stmt 0 view .LVU188
+ 612 01de 0C94 str r4, [sp, #48]
+1089:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 613 .loc 1 1089 3 is_stmt 1 view .LVU189
+ 614 01e0 09A9 add r1, sp, #36
+ 615 01e2 3046 mov r0, r6
+ 616 01e4 FFF7FEFF bl HAL_GPIO_Init
+ 617 .LVL35:
+1090:Src/main.c ****
+1091:Src/main.c **** /*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */
+1092:Src/main.c **** GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin;
+ 618 .loc 1 1092 3 view .LVU190
+ 619 .loc 1 1092 23 is_stmt 0 view .LVU191
+ 620 01e8 0C23 movs r3, #12
+ 621 01ea 0993 str r3, [sp, #36]
+1093:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
+ 622 .loc 1 1093 3 is_stmt 1 view .LVU192
+ 623 .loc 1 1093 24 is_stmt 0 view .LVU193
+ 624 01ec 1123 movs r3, #17
+ 625 01ee 0A93 str r3, [sp, #40]
+1094:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 626 .loc 1 1094 3 is_stmt 1 view .LVU194
+ 627 .loc 1 1094 24 is_stmt 0 view .LVU195
+ 628 01f0 0B94 str r4, [sp, #44]
+1095:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 629 .loc 1 1095 3 is_stmt 1 view .LVU196
+ 630 .loc 1 1095 25 is_stmt 0 view .LVU197
+ 631 01f2 0C94 str r4, [sp, #48]
+1096:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 632 .loc 1 1096 3 is_stmt 1 view .LVU198
+ 633 01f4 09A9 add r1, sp, #36
+ 634 01f6 3046 mov r0, r6
+ 635 01f8 FFF7FEFF bl HAL_GPIO_Init
+ 636 .LVL36:
+1097:Src/main.c ****
+1098:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */
+1099:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin;
+ 637 .loc 1 1099 3 view .LVU199
+ 638 .loc 1 1099 23 is_stmt 0 view .LVU200
+ 639 01fc 4FF48043 mov r3, #16384
+ 640 0200 0993 str r3, [sp, #36]
+1100:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 641 .loc 1 1100 3 is_stmt 1 view .LVU201
+ 642 .loc 1 1100 24 is_stmt 0 view .LVU202
+ 643 0202 0A95 str r5, [sp, #40]
+1101:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 644 .loc 1 1101 3 is_stmt 1 view .LVU203
+ 645 .loc 1 1101 24 is_stmt 0 view .LVU204
+ 646 0204 0B94 str r4, [sp, #44]
+1102:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+ 647 .loc 1 1102 3 is_stmt 1 view .LVU205
+ 648 .loc 1 1102 25 is_stmt 0 view .LVU206
+ 649 0206 0323 movs r3, #3
+ 650 0208 0C93 str r3, [sp, #48]
+1103:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
+ ARM GAS /tmp/ccDGOsZt.s page 74
- 297 .loc 1 2654 47 view .LVU87
- 298 0024 C2F30012 ubfx r2, r2, #4, #1
- 299 .loc 1 2654 21 view .LVU88
- 300 0028 1A71 strb r2, [r3, #4]
-2655:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 301 .loc 1 2655 2 is_stmt 1 view .LVU89
- 302 .loc 1 2655 36 is_stmt 0 view .LVU90
- 303 002a 0288 ldrh r2, [r0]
- 304 .loc 1 2655 48 view .LVU91
- 305 002c C2F34012 ubfx r2, r2, #5, #1
- 306 .loc 1 2655 22 view .LVU92
- 307 0030 5A71 strb r2, [r3, #5]
-2656:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 308 .loc 1 2656 2 is_stmt 1 view .LVU93
- 309 .loc 1 2656 36 is_stmt 0 view .LVU94
- 310 0032 0288 ldrh r2, [r0]
- 311 .loc 1 2656 48 view .LVU95
- 312 0034 C2F38012 ubfx r2, r2, #6, #1
- 313 .loc 1 2656 22 view .LVU96
- 314 0038 9A71 strb r2, [r3, #6]
-2657:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 315 .loc 1 2657 2 is_stmt 1 view .LVU97
- 316 .loc 1 2657 36 is_stmt 0 view .LVU98
- 317 003a 0288 ldrh r2, [r0]
- 318 .loc 1 2657 48 view .LVU99
- 319 003c C2F3C012 ubfx r2, r2, #7, #1
- 320 .loc 1 2657 22 view .LVU100
- 321 0040 DA71 strb r2, [r3, #7]
-2658:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 322 .loc 1 2658 2 is_stmt 1 view .LVU101
- 323 .loc 1 2658 36 is_stmt 0 view .LVU102
- 324 0042 0288 ldrh r2, [r0]
- 325 .loc 1 2658 48 view .LVU103
- 326 0044 C2F30022 ubfx r2, r2, #8, #1
- 327 .loc 1 2658 22 view .LVU104
- 328 0048 1A72 strb r2, [r3, #8]
-2659:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 329 .loc 1 2659 2 is_stmt 1 view .LVU105
- 330 .loc 1 2659 35 is_stmt 0 view .LVU106
- 331 004a 0288 ldrh r2, [r0]
- 332 .loc 1 2659 47 view .LVU107
- 333 004c C2F34022 ubfx r2, r2, #9, #1
- 334 .loc 1 2659 21 view .LVU108
- 335 0050 5A72 strb r2, [r3, #9]
-2660:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 336 .loc 1 2660 2 is_stmt 1 view .LVU109
- 337 .loc 1 2660 35 is_stmt 0 view .LVU110
- 338 0052 0288 ldrh r2, [r0]
- 339 .loc 1 2660 48 view .LVU111
- 340 0054 C2F38022 ubfx r2, r2, #10, #1
- 341 .loc 1 2660 21 view .LVU112
- 342 0058 9A72 strb r2, [r3, #10]
-2661:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 343 .loc 1 2661 2 is_stmt 1 view .LVU113
- 344 .loc 1 2661 34 is_stmt 0 view .LVU114
- 345 005a 0288 ldrh r2, [r0]
- 346 .loc 1 2661 47 view .LVU115
- ARM GAS /tmp/ccLSPxIe.s page 96
+ 651 .loc 1 1103 3 is_stmt 1 view .LVU207
+ 652 020a 09A9 add r1, sp, #36
+ 653 020c 3046 mov r0, r6
+ 654 020e FFF7FEFF bl HAL_GPIO_Init
+ 655 .LVL37:
+1104:Src/main.c ****
+1105:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin
+1106:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
+1107:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin
+ 656 .loc 1 1107 3 view .LVU208
+ 657 .loc 1 1107 23 is_stmt 0 view .LVU209
+ 658 0212 41F6F043 movw r3, #7408
+ 659 0216 0993 str r3, [sp, #36]
+1108:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
+1109:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 660 .loc 1 1109 3 is_stmt 1 view .LVU210
+ 661 .loc 1 1109 24 is_stmt 0 view .LVU211
+ 662 0218 0A95 str r5, [sp, #40]
+1110:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 663 .loc 1 1110 3 is_stmt 1 view .LVU212
+ 664 .loc 1 1110 24 is_stmt 0 view .LVU213
+ 665 021a 0B94 str r4, [sp, #44]
+1111:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 666 .loc 1 1111 3 is_stmt 1 view .LVU214
+ 667 .loc 1 1111 25 is_stmt 0 view .LVU215
+ 668 021c 0C94 str r4, [sp, #48]
+1112:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 669 .loc 1 1112 3 is_stmt 1 view .LVU216
+ 670 021e 09A9 add r1, sp, #36
+ 671 0220 5846 mov r0, fp
+ 672 0222 FFF7FEFF bl HAL_GPIO_Init
+ 673 .LVL38:
+1113:Src/main.c ****
+1114:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin
+1115:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS
+ 674 .loc 1 1115 3 view .LVU217
+ 675 .loc 1 1115 23 is_stmt 0 view .LVU218
+ 676 0226 43F68213 movw r3, #14722
+ 677 022a 0993 str r3, [sp, #36]
+1116:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 678 .loc 1 1116 3 is_stmt 1 view .LVU219
+ 679 .loc 1 1116 24 is_stmt 0 view .LVU220
+ 680 022c 0A95 str r5, [sp, #40]
+1117:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 681 .loc 1 1117 3 is_stmt 1 view .LVU221
+ 682 .loc 1 1117 24 is_stmt 0 view .LVU222
+ 683 022e 0B94 str r4, [sp, #44]
+1118:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 684 .loc 1 1118 3 is_stmt 1 view .LVU223
+ 685 .loc 1 1118 25 is_stmt 0 view .LVU224
+ 686 0230 0C94 str r4, [sp, #48]
+1119:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+ 687 .loc 1 1119 3 is_stmt 1 view .LVU225
+ 688 0232 09A9 add r1, sp, #36
+ 689 0234 3846 mov r0, r7
+ 690 0236 FFF7FEFF bl HAL_GPIO_Init
+ 691 .LVL39:
+ ARM GAS /tmp/ccDGOsZt.s page 75
- 347 005c C2F3C022 ubfx r2, r2, #11, #1
- 348 .loc 1 2661 20 view .LVU116
- 349 0060 DA72 strb r2, [r3, #11]
-2662:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 350 .loc 1 2662 2 is_stmt 1 view .LVU117
- 351 .loc 1 2662 35 is_stmt 0 view .LVU118
- 352 0062 0288 ldrh r2, [r0]
- 353 .loc 1 2662 48 view .LVU119
- 354 0064 C2F30032 ubfx r2, r2, #12, #1
- 355 .loc 1 2662 21 view .LVU120
- 356 0068 1A73 strb r2, [r3, #12]
-2663:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 357 .loc 1 2663 2 is_stmt 1 view .LVU121
- 358 .loc 1 2663 35 is_stmt 0 view .LVU122
- 359 006a 0288 ldrh r2, [r0]
- 360 .loc 1 2663 48 view .LVU123
- 361 006c C2F34032 ubfx r2, r2, #13, #1
- 362 .loc 1 2663 21 view .LVU124
- 363 0070 5A73 strb r2, [r3, #13]
-2664:Src/main.c ****
-2665:Src/main.c **** temp2++;
- 364 .loc 1 2665 2 is_stmt 1 view .LVU125
- 365 .LVL17:
-2666:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++;
- 366 .loc 1 2666 2 view .LVU126
- 367 .loc 1 2666 21 is_stmt 0 view .LVU127
- 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2
- 369 .loc 1 2666 19 view .LVU128
- 370 0074 384B ldr r3, .L14+8
- 371 .LVL18:
- 372 .loc 1 2666 19 view .LVU129
- 373 0076 1A70 strb r2, [r3]
- 374 .loc 1 2666 40 is_stmt 1 view .LVU130
- 375 .LVL19:
-2667:Src/main.c **** task.min_param = (float)(*temp2); temp2++;
- 376 .loc 1 2667 2 view .LVU131
- 377 .loc 1 2667 29 is_stmt 0 view .LVU132
- 378 0078 8288 ldrh r2, [r0, #4]
- 379 007a 07EE902A vmov s15, r2 @ int
- 380 .loc 1 2667 21 view .LVU133
- 381 007e F8EE677A vcvt.f32.u32 s15, s15
- 382 .loc 1 2667 19 view .LVU134
- 383 0082 C3ED017A vstr.32 s15, [r3, #4]
- 384 .loc 1 2667 38 is_stmt 1 view .LVU135
- 385 .LVL20:
-2668:Src/main.c **** task.max_param = (float)(*temp2); temp2++;
- 386 .loc 1 2668 2 view .LVU136
- 387 .loc 1 2668 29 is_stmt 0 view .LVU137
- 388 0086 C288 ldrh r2, [r0, #6]
- 389 0088 07EE902A vmov s15, r2 @ int
- 390 .loc 1 2668 21 view .LVU138
- 391 008c F8EE677A vcvt.f32.u32 s15, s15
- 392 .loc 1 2668 19 view .LVU139
- 393 0090 C3ED027A vstr.32 s15, [r3, #8]
- 394 .loc 1 2668 38 is_stmt 1 view .LVU140
- 395 .LVL21:
-2669:Src/main.c **** task.delta_param = (float)(*temp2); temp2++;
- ARM GAS /tmp/ccLSPxIe.s page 97
+1120:Src/main.c ****
+1121:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */
+1122:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin;
+ 692 .loc 1 1122 3 view .LVU226
+ 693 .loc 1 1122 23 is_stmt 0 view .LVU227
+ 694 023a 4FF48073 mov r3, #256
+ 695 023e 0993 str r3, [sp, #36]
+1123:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 696 .loc 1 1123 3 is_stmt 1 view .LVU228
+ 697 .loc 1 1123 24 is_stmt 0 view .LVU229
+ 698 0240 0A94 str r4, [sp, #40]
+1124:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 699 .loc 1 1124 3 is_stmt 1 view .LVU230
+ 700 .loc 1 1124 24 is_stmt 0 view .LVU231
+ 701 0242 0B94 str r4, [sp, #44]
+1125:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct);
+ 702 .loc 1 1125 3 is_stmt 1 view .LVU232
+ 703 0244 09A9 add r1, sp, #36
+ 704 0246 5046 mov r0, r10
+ 705 0248 FFF7FEFF bl HAL_GPIO_Init
+ 706 .LVL40:
+1126:Src/main.c ****
+1127:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */
+1128:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin;
+ 707 .loc 1 1128 3 view .LVU233
+ 708 .loc 1 1128 23 is_stmt 0 view .LVU234
+ 709 024c 0995 str r5, [sp, #36]
+1129:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ 710 .loc 1 1129 3 is_stmt 1 view .LVU235
+ 711 .loc 1 1129 24 is_stmt 0 view .LVU236
+ 712 024e 0A94 str r4, [sp, #40]
+1130:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 713 .loc 1 1130 3 is_stmt 1 view .LVU237
+ 714 .loc 1 1130 24 is_stmt 0 view .LVU238
+ 715 0250 0B94 str r4, [sp, #44]
+1131:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct);
+ 716 .loc 1 1131 3 is_stmt 1 view .LVU239
+ 717 0252 09A9 add r1, sp, #36
+ 718 0254 3846 mov r0, r7
+ 719 0256 FFF7FEFF bl HAL_GPIO_Init
+ 720 .LVL41:
+1132:Src/main.c ****
+1133:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin
+1134:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */
+1135:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
+ 721 .loc 1 1135 3 view .LVU240
+ 722 .loc 1 1135 23 is_stmt 0 view .LVU241
+ 723 025a 4FF47E43 mov r3, #65024
+ 724 025e 0993 str r3, [sp, #36]
+1136:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin;
+1137:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ 725 .loc 1 1137 3 is_stmt 1 view .LVU242
+ 726 .loc 1 1137 24 is_stmt 0 view .LVU243
+ 727 0260 0A95 str r5, [sp, #40]
+1138:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
+ 728 .loc 1 1138 3 is_stmt 1 view .LVU244
+ 729 .loc 1 1138 24 is_stmt 0 view .LVU245
+ ARM GAS /tmp/ccDGOsZt.s page 76
- 396 .loc 1 2669 2 view .LVU141
- 397 .loc 1 2669 29 is_stmt 0 view .LVU142
- 398 0094 0289 ldrh r2, [r0, #8]
- 399 0096 07EE902A vmov s15, r2 @ int
- 400 .loc 1 2669 21 view .LVU143
- 401 009a F8EE677A vcvt.f32.u32 s15, s15
- 402 .loc 1 2669 19 view .LVU144
- 403 009e C3ED037A vstr.32 s15, [r3, #12]
- 404 .loc 1 2669 38 is_stmt 1 view .LVU145
- 405 .LVL22:
-2670:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++;
- 406 .loc 1 2670 2 view .LVU146
- 407 .loc 1 2670 29 is_stmt 0 view .LVU147
- 408 00a2 4289 ldrh r2, [r0, #10]
- 409 00a4 07EE102A vmov s14, r2 @ int
- 410 .loc 1 2670 21 view .LVU148
- 411 00a8 B8EE477B vcvt.f64.u32 d7, s14
- 412 .loc 1 2670 37 view .LVU149
- 413 00ac 9FED285B vldr.64 d5, .L14
- 414 00b0 87EE056B vdiv.f64 d6, d7, d5
- 415 .loc 1 2670 19 view .LVU150
- 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6
- 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int
- 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2
- 419 00c0 1A75 strb r2, [r3, #20]
- 420 .loc 1 2670 46 is_stmt 1 view .LVU151
- 421 .LVL23:
-2671:Src/main.c **** task.sec_param = (float)(*temp2); temp2++;
- 422 .loc 1 2671 2 view .LVU152
- 423 .loc 1 2671 29 is_stmt 0 view .LVU153
- 424 00c2 8189 ldrh r1, [r0, #12]
- 425 .LVL24:
- 426 .loc 1 2671 29 view .LVU154
- 427 00c4 07EE901A vmov s15, r1 @ int
- 428 .loc 1 2671 21 view .LVU155
- 429 00c8 F8EE677A vcvt.f32.u32 s15, s15
- 430 .loc 1 2671 19 view .LVU156
- 431 00cc C3ED067A vstr.32 s15, [r3, #24]
- 432 .loc 1 2671 38 is_stmt 1 view .LVU157
- 433 .LVL25:
-2672:Src/main.c **** task.curr = (float)(*temp2); temp2++;
- 434 .loc 1 2672 2 view .LVU158
- 435 .loc 1 2672 29 is_stmt 0 view .LVU159
- 436 00d0 C189 ldrh r1, [r0, #14]
- 437 00d2 07EE901A vmov s15, r1 @ int
- 438 .loc 1 2672 21 view .LVU160
- 439 00d6 F8EE677A vcvt.f32.u32 s15, s15
- 440 .loc 1 2672 19 view .LVU161
- 441 00da C3ED077A vstr.32 s15, [r3, #28]
- 442 .loc 1 2672 38 is_stmt 1 view .LVU162
- 443 .LVL26:
-2673:Src/main.c **** task.temp = (float)(*temp2); temp2++;
- 444 .loc 1 2673 2 view .LVU163
- 445 .loc 1 2673 29 is_stmt 0 view .LVU164
- 446 00de 018A ldrh r1, [r0, #16]
- 447 00e0 07EE901A vmov s15, r1 @ int
- 448 .loc 1 2673 21 view .LVU165
- ARM GAS /tmp/ccLSPxIe.s page 98
+ 730 0262 0B94 str r4, [sp, #44]
+1139:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+ 731 .loc 1 1139 3 is_stmt 1 view .LVU246
+ 732 .loc 1 1139 25 is_stmt 0 view .LVU247
+ 733 0264 0C94 str r4, [sp, #48]
+1140:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+ 734 .loc 1 1140 3 is_stmt 1 view .LVU248
+ 735 0266 09A9 add r1, sp, #36
+ 736 0268 0548 ldr r0, .L14+12
+ 737 026a FFF7FEFF bl HAL_GPIO_Init
+ 738 .LVL42:
+1141:Src/main.c ****
+1142:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */
+1143:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */
+1144:Src/main.c **** }
+ 739 .loc 1 1144 1 is_stmt 0 view .LVU249
+ 740 026e 0FB0 add sp, sp, #60
+ 741 .LCFI6:
+ 742 .cfi_def_cfa_offset 36
+ 743 @ sp needed
+ 744 0270 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
+ 745 .L15:
+ 746 .align 2
+ 747 .L14:
+ 748 0274 00380240 .word 1073887232
+ 749 0278 00100240 .word 1073876992
+ 750 027c 000C0240 .word 1073875968
+ 751 0280 00180240 .word 1073879040
+ 752 0284 00140240 .word 1073878016
+ 753 0288 00080240 .word 1073874944
+ 754 028c 00000240 .word 1073872896
+ 755 0290 00040240 .word 1073873920
+ 756 .cfi_endproc
+ 757 .LFE1200:
+ 759 .section .text.MX_SPI4_Init,"ax",%progbits
+ 760 .align 1
+ 761 .syntax unified
+ 762 .thumb
+ 763 .thumb_func
+ 765 MX_SPI4_Init:
+ 766 .LFB1189:
+ 436:Src/main.c ****
+ 767 .loc 1 436 1 is_stmt 1 view -0
+ 768 .cfi_startproc
+ 769 @ args = 0, pretend = 0, frame = 72
+ 770 @ frame_needed = 0, uses_anonymous_args = 0
+ 771 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
+ 772 .LCFI7:
+ 773 .cfi_def_cfa_offset 24
+ 774 .cfi_offset 4, -24
+ 775 .cfi_offset 5, -20
+ 776 .cfi_offset 6, -16
+ 777 .cfi_offset 7, -12
+ 778 .cfi_offset 8, -8
+ 779 .cfi_offset 14, -4
+ 780 0004 92B0 sub sp, sp, #72
+ 781 .LCFI8:
+ ARM GAS /tmp/ccDGOsZt.s page 77
- 449 00e4 F8EE677A vcvt.f32.u32 s15, s15
- 450 .loc 1 2673 19 view .LVU166
- 451 00e8 C3ED087A vstr.32 s15, [r3, #32]
- 452 .loc 1 2673 38 is_stmt 1 view .LVU167
- 453 .LVL27:
-2674:Src/main.c **** task.tau = (float)(*temp2); temp2++;
- 454 .loc 1 2674 2 view .LVU168
- 455 .loc 1 2674 29 is_stmt 0 view .LVU169
- 456 00ec 418A ldrh r1, [r0, #18]
- 457 .loc 1 2674 19 view .LVU170
- 458 00ee D982 strh r1, [r3, #22] @ movhi
- 459 .loc 1 2674 38 is_stmt 1 view .LVU171
- 460 .LVL28:
-2675:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++;
- 461 .loc 1 2675 2 view .LVU172
- 462 .loc 1 2675 29 is_stmt 0 view .LVU173
- 463 00f0 818A ldrh r1, [r0, #20]
- 464 00f2 07EE901A vmov s15, r1 @ int
- 465 .loc 1 2675 21 view .LVU174
- 466 00f6 F8EE677A vcvt.f32.u32 s15, s15
- 467 .loc 1 2675 37 view .LVU175
- 468 00fa 9FED187A vldr.32 s14, .L14+12
- 469 00fe 67EE877A vmul.f32 s15, s15, s14
- 470 .loc 1 2675 19 view .LVU176
- 471 0102 C3ED0A7A vstr.32 s15, [r3, #40]
- 472 .loc 1 2675 46 is_stmt 1 view .LVU177
- 473 .LVL29:
-2676:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++;
- 474 .loc 1 2676 2 view .LVU178
- 475 .loc 1 2676 29 is_stmt 0 view .LVU179
- 476 0106 C18A ldrh r1, [r0, #22]
- 477 0108 07EE901A vmov s15, r1 @ int
- 478 .loc 1 2676 21 view .LVU180
- 479 010c F8EE677A vcvt.f32.u32 s15, s15
- 480 .loc 1 2676 37 view .LVU181
- 481 0110 67EE877A vmul.f32 s15, s15, s14
- 482 .loc 1 2676 19 view .LVU182
- 483 0114 C3ED097A vstr.32 s15, [r3, #36]
- 484 .loc 1 2676 46 is_stmt 1 view .LVU183
- 485 .LVL30:
-2677:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++;
- 486 .loc 1 2677 2 view .LVU184
- 487 .loc 1 2677 29 is_stmt 0 view .LVU185
- 488 0118 018B ldrh r1, [r0, #24]
- 489 011a 07EE901A vmov s15, r1 @ int
- 490 .loc 1 2677 21 view .LVU186
- 491 011e F8EE677A vcvt.f32.u32 s15, s15
- 492 .loc 1 2677 37 view .LVU187
- 493 0122 67EE877A vmul.f32 s15, s15, s14
- 494 .loc 1 2677 19 view .LVU188
- 495 0126 C3ED0C7A vstr.32 s15, [r3, #48]
- 496 .loc 1 2677 46 is_stmt 1 view .LVU189
- 497 .LVL31:
-2678:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++;
- 498 .loc 1 2678 2 view .LVU190
- 499 .loc 1 2678 29 is_stmt 0 view .LVU191
- 500 012a 418B ldrh r1, [r0, #26]
- ARM GAS /tmp/ccLSPxIe.s page 99
+ 782 .cfi_def_cfa_offset 96
+ 442:Src/main.c ****
+ 783 .loc 1 442 3 view .LVU251
+ 442:Src/main.c ****
+ 784 .loc 1 442 22 is_stmt 0 view .LVU252
+ 785 0006 2822 movs r2, #40
+ 786 0008 0021 movs r1, #0
+ 787 000a 08A8 add r0, sp, #32
+ 788 000c FFF7FEFF bl memset
+ 789 .LVL43:
+ 444:Src/main.c ****
+ 790 .loc 1 444 3 is_stmt 1 view .LVU253
+ 444:Src/main.c ****
+ 791 .loc 1 444 23 is_stmt 0 view .LVU254
+ 792 0010 0024 movs r4, #0
+ 793 0012 0294 str r4, [sp, #8]
+ 794 0014 0394 str r4, [sp, #12]
+ 795 0016 0494 str r4, [sp, #16]
+ 796 0018 0594 str r4, [sp, #20]
+ 797 001a 0694 str r4, [sp, #24]
+ 798 001c 0794 str r4, [sp, #28]
+ 447:Src/main.c ****
+ 799 .loc 1 447 3 is_stmt 1 view .LVU255
+ 800 .LVL44:
+ 801 .LBB152:
+ 802 .LBI152:
+ 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not
+ 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n
+ 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n
+ 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_IsEnabledClock\n
+ 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_IsEnabledClock\n
+ 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_IsEnabledClock\n
+ 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_IsEnabledClock\n
+ 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_IsEnabledClock\n
+ 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_IsEnabledClock\n
+ 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n
+ 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n
+ 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n
+ 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
+ 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n
+ 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_IsEnabledClock\n
+ 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n
+ 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n
+ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_IsEnabledClock\n
+ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n
+ 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n
+ 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n
+ 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n
+ 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n
+ 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_IsEnabledClock
+ 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ ARM GAS /tmp/ccDGOsZt.s page 78
- 501 012c 07EE901A vmov s15, r1 @ int
- 502 .loc 1 2678 21 view .LVU192
- 503 0130 F8EE677A vcvt.f32.u32 s15, s15
- 504 .loc 1 2678 37 view .LVU193
- 505 0134 67EE877A vmul.f32 s15, s15, s14
- 506 .loc 1 2678 19 view .LVU194
- 507 0138 C3ED0B7A vstr.32 s15, [r3, #44]
- 508 .loc 1 2678 46 is_stmt 1 view .LVU195
- 509 .LVL32:
-2679:Src/main.c ****
-2680:Src/main.c **** TO10_counter = task.dt / 10;
- 510 .loc 1 2680 2 view .LVU196
- 511 .loc 1 2680 25 is_stmt 0 view .LVU197
- 512 013c 084B ldr r3, .L14+16
- 513 013e A3FB0232 umull r3, r2, r3, r2
- 514 0142 D208 lsrs r2, r2, #3
- 515 .loc 1 2680 15 view .LVU198
- 516 0144 074B ldr r3, .L14+20
- 517 0146 1A60 str r2, [r3]
-2681:Src/main.c **** }
- 518 .loc 1 2681 1 view .LVU199
- 519 0148 02B0 add sp, sp, #8
- 520 .LCFI5:
- 521 .cfi_def_cfa_offset 0
- 522 @ sp needed
- 523 014a 7047 bx lr
- 524 .L15:
- 525 014c AFF30080 .align 3
- 526 .L14:
- 527 0150 00000000 .word 0
- 528 0154 00005940 .word 1079574528
- 529 0158 00000000 .word task
- 530 015c 00008043 .word 1132462080
- 531 0160 CDCCCCCC .word -858993459
- 532 0164 00000000 .word TO10_counter
- 533 .cfi_endproc
- 534 .LFE1210:
- 536 .section .text.SPI2_SetMode,"ax",%progbits
- 537 .align 1
- 538 .syntax unified
- 539 .thumb
- 540 .thumb_func
- 542 SPI2_SetMode:
- 543 .LVL33:
- 544 .LFB1213:
-2682:Src/main.c ****
-2683:Src/main.c **** void OUT_trigger(uint8_t out_n)
-2684:Src/main.c **** {
-2685:Src/main.c **** switch (out_n)
-2686:Src/main.c **** {
-2687:Src/main.c **** case 0:
-2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET);
-2689:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
-2690:Src/main.c **** break;
-2691:Src/main.c ****
-2692:Src/main.c **** case 1:
-2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET);
- ARM GAS /tmp/ccLSPxIe.s page 100
+ 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
+ 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+ 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+ 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
+ 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
+ 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
+ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs);
+ 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock.
+ 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n
+ 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_DisableClock\n
+ 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_DisableClock\n
+ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_DisableClock\n
+ 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_DisableClock\n
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_DisableClock\n
+ 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_DisableClock\n
+ 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n
+ 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n
+ 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n
+ 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n
+ 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n
+ 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n
+ 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_DisableClock\n
+ 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n
+ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock\n
+ 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n
+ 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n
+ 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n
+ 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n
+ 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n
+ 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n
+ 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_DisableClock
+ 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ ARM GAS /tmp/ccDGOsZt.s page 79
-2694:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
-2695:Src/main.c **** break;
-2696:Src/main.c ****
-2697:Src/main.c **** case 2:
-2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET);
-2699:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
-2700:Src/main.c **** break;
-2701:Src/main.c ****
-2702:Src/main.c **** case 3:
-2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET);
-2704:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
-2705:Src/main.c **** break;
-2706:Src/main.c ****
-2707:Src/main.c **** case 4:
-2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET);
-2709:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
-2710:Src/main.c **** break;
-2711:Src/main.c ****
-2712:Src/main.c **** case 5:
-2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET);
-2714:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
-2715:Src/main.c **** break;
-2716:Src/main.c ****
-2717:Src/main.c **** case 6:
-2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET);
-2719:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
-2720:Src/main.c **** break;
-2721:Src/main.c ****
-2722:Src/main.c **** case 7:
-2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);
-2724:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
-2725:Src/main.c **** break;
-2726:Src/main.c ****
-2727:Src/main.c **** case 8:
-2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET);
-2729:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
-2730:Src/main.c **** break;
-2731:Src/main.c ****
-2732:Src/main.c **** case 9:
-2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET);
-2734:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
-2735:Src/main.c **** break;
-2736:Src/main.c **** }
-2737:Src/main.c **** }
-2738:Src/main.c ****
-2739:Src/main.c **** static void AD9102_Init(void)
-2740:Src/main.c **** {
-2741:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2742:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
-2743:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {}
-2744:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
-2745:Src/main.c ****
-2746:Src/main.c **** AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
-2747:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-2748:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2749:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2750:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 101
+ 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
+ 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
+ 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+ 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+ 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
+ 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
+ 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
+ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1ENR, Periphs);
+ 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB1 peripherals reset.
+ 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ForceReset\n
+ 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ForceReset\n
+ 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ForceReset\n
+ 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ForceReset\n
+ 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ForceReset\n
+ 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ForceReset\n
+ 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n
+ 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n
+ 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n
+ 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n
+ 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n
+ 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n
+ 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n
+ 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n
+ 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ForceReset\n
+ 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n
+ 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset
+ 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
+ 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ ARM GAS /tmp/ccDGOsZt.s page 80
-2751:Src/main.c ****
-2752:Src/main.c **** static void SPI2_SetMode(uint32_t polarity, uint32_t phase)
-2753:Src/main.c **** {
- 545 .loc 1 2753 1 is_stmt 1 view -0
- 546 .cfi_startproc
- 547 @ args = 0, pretend = 0, frame = 0
- 548 @ frame_needed = 0, uses_anonymous_args = 0
- 549 @ link register save eliminated.
-2754:Src/main.c **** if (LL_SPI_IsEnabled(SPI2))
- 550 .loc 1 2754 2 view .LVU201
- 551 .LBB363:
- 552 .LBI363:
- 553 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h"
+ 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
+ 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1RSTR, Periphs);
+ 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB1 peripherals reset.
+ 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ReleaseReset\n
+ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ReleaseReset\n
+ 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ReleaseReset\n
+ 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n
+ 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n
+ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n
+ 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n
+ 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n
+ 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n
+ 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n
+ 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ReleaseReset\n
+ 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n
+ 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset\n
+ 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset\n
+ 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ReleaseReset\n
+ 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n
+ 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset
+ 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
+ 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ ARM GAS /tmp/ccDGOsZt.s page 81
+
+
+ 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
+ 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1RSTR, Periphs);
+ 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB1 peripheral clocks in low-power mode
+ 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR CRCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR AXILPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_EnableClockLowPower\n
+ 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower
+ 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI
+ 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
+ 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
+ 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2
+ 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
+ ARM GAS /tmp/ccDGOsZt.s page 82
+
+
+ 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
+ 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+ 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+ 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
+ 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
+ 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs)
+ 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1LPENR, Periphs);
+ 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs);
+ 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripheral clocks in low-power mode
+ 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR CRCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR AXILPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n
+ 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower
+ 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
+ 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
+ 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
+ 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
+ ARM GAS /tmp/ccDGOsZt.s page 83
+
+
+ 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
+ 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
+ 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
+ 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
+ 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
+ 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
+ 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
+ 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
+ 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI
+ 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
+ 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
+ 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2
+ 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
+ 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
+ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
+ 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
+ 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
+ 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
+ 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
+ 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
+ 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
+ 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
+ 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
+ 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs)
+ 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1LPENR, Periphs);
+ 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
+ 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB2 AHB2
+ 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
+ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock.
+ 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n
+ 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_EnableClock\n
+ 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock\n
+ 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n
+ 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock\n
+ 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n
+ 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock
+ 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ ARM GAS /tmp/ccDGOsZt.s page 84
+
+
+ 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
+ 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2ENR, Periphs);
+ 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
+ 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB2 peripheral clock is enabled or not
+ 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n
+ 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_IsEnabledClock\n
+ 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n
+ 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n
+ 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n
+ 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock\n
+ 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock
+ 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
+ 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)
+ 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs);
+ 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock.
+ 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n
+ 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_DisableClock\n
+ 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock\n
+ 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n
+ 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n
+ 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock\n
+ 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock
+ 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ ARM GAS /tmp/ccDGOsZt.s page 85
+
+
+ 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)
+ 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2ENR, Periphs);
+ 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB2 peripherals reset.
+ 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset\n
+ 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ForceReset\n
+ 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset\n
+ 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset\n
+ 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n
+ 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n
+ 762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset
+ 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
+ 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)
+ 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2RSTR, Periphs);
+ 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB2 peripherals reset.
+ 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset\n
+ 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ReleaseReset\n
+ 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n
+ 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n
+ 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n
+ 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n
+ 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset
+ 790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
+ 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 86
+
+
+ 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)
+ 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2RSTR, Periphs);
+ 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripheral clocks in low-power mode
+ 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower\n
+ 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower
+ 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs)
+ 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs);
+ 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);
+ 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripheral clocks in low-power mode
+ 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
+ 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower
+ 847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
+ 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
+ 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
+ 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
+ 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
+ 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
+ 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
+ 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)
+ ARM GAS /tmp/ccDGOsZt.s page 87
+
+
+ 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2LPENR, Periphs);
+ 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
+ 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB3 AHB3
+ 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
+ 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripherals clock.
+ 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n
+ 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
+ 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)
+ 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3ENR, Periphs);
+ 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);
+ 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB3 peripheral clock is enabled or not
+ 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock\n
+ 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
+ 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
+ 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)
+ 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs);
+ 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock.
+ 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n
+ 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
+ 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ ARM GAS /tmp/ccDGOsZt.s page 88
+
+
+ 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)
+ 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3ENR, Periphs);
+ 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB3 peripherals reset.
+ 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n
+ 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
+ 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_ALL
+ 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)
+ 937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3RSTR, Periphs);
+ 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB3 peripherals reset.
+ 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset\n
+ 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
+ 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
+ 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)
+ 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3RSTR, Periphs);
+ 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripheral clocks in low-power mode
+ 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n
+ 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockLowPower
+ 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)
+ 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3LPENR, Periphs);
+ 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ ARM GAS /tmp/ccDGOsZt.s page 89
+
+
+ 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs);
+ 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripheral clocks in low-power mode
+ 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n
+ 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockLowPower
+ 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+ 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
+ 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
+ 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+ 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+ 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+ 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs)
+ 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3LPENR, Periphs);
+ 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ 995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
+ 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+ 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+ 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1
+ 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
+1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock.
+1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
+1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
+1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n
+1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_EnableClock\n
+1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n
+1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n
+1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_EnableClock\n
+1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n
+1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n
+1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n
+1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n
+1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n
+1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n
+1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_EnableClock\n
+1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n
+1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n
+1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n
+1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n
+1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n
+1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n
+1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n
+1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_EnableClock\n
+1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n
+1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n
+1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_EnableClock\n
+1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n
+1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n
+ ARM GAS /tmp/ccDGOsZt.s page 90
+
+
+1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n
+1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_EnableClock\n
+1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_EnableClock\n
+1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_EnableClock
+1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
+1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
+1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
+1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not
+1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n
+1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n
+1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n
+1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n
+1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n
+1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n
+ ARM GAS /tmp/ccDGOsZt.s page 91
+
+
+1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_IsEnabledClock\n
+1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_IsEnabledClock\n
+1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_IsEnabledClock\n
+1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock\n
+1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n
+1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n
+1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n
+1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_IsEnabledClock\n
+1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n
+1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n
+1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n
+1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n
+1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n
+1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n
+1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n
+1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_IsEnabledClock\n
+1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n
+1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n
+1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n
+1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n
+1108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n
+1109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n
+1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_IsEnabledClock\n
+1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_IsEnabledClock\n
+1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_IsEnabledClock
+1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
+ ARM GAS /tmp/ccDGOsZt.s page 92
+
+
+1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
+1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
+1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
+1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable APB1 peripherals clock.
+1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n
+1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n
+1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_DisableClock\n
+1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n
+1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n
+1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n
+1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n
+1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n
+1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n
+1165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock\n
+1166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n
+1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n
+1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_DisableClock\n
+1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_DisableClock\n
+1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n
+1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_DisableClock\n
+1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_DisableClock\n
+1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n
+1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
+1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
+1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
+1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_DisableClock\n
+1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_DisableClock\n
+1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_DisableClock\n
+1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_DisableClock\n
+1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_DisableClock\n
+1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n
+1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n
+1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n
+1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n
+1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock
+1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+ ARM GAS /tmp/ccDGOsZt.s page 93
+
+
+1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
+1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
+1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1ENR, Periphs);
+1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force APB1 peripherals reset.
+1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n
+1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
+1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n
+1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n
+1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n
+1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n
+1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ForceReset\n
+1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ForceReset\n
+1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ForceReset\n
+1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset\n
+1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n
+1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n
+1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n
+1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n
+1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n
+1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n
+1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n
+1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n
+1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n
+1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n
+1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n
+1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n
+1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n
+1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n
+1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n
+1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n
+1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n
+1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n
+1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ForceReset\n
+ ARM GAS /tmp/ccDGOsZt.s page 94
+
+
+1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ForceReset
+1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
+1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs);
+1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release APB1 peripherals reset.
+1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n
+1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n
+1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n
+1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n
+1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n
+1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n
+1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n
+1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n
+1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n
+1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n
+1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n
+1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n
+1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n
+1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ReleaseReset\n
+ ARM GAS /tmp/ccDGOsZt.s page 95
+
+
+1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n
+1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ReleaseReset\n
+1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ReleaseReset\n
+1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ReleaseReset\n
+1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n
+1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n
+1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n
+1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ReleaseReset\n
+1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n
+1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n
+1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ReleaseReset\n
+1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n
+1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n
+1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n
+1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n
+1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset
+1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
+1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs);
+1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 96
+
+
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripheral clocks in low-power mode
+1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM3LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM4LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM5LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM6LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM7LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_EnableClockLowPower\n
+1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI2LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI3LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n
+1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C4LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN1LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_EnableClockLowPower\n
+1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_EnableClockLowPower\n
+1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n
+1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n
+1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower
+1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+ ARM GAS /tmp/ccDGOsZt.s page 97
+
+
+1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
+1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs)
+1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1LPENR, Periphs);
+1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1LPENR, Periphs);
+1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable APB1 peripheral clocks in low-power mode
+1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM3LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM4LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM5LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM6LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM7LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n
+1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI2LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI3LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_DisableClockLowPower\n
+1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C4LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN1LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n
+1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n
+1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n
+1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n
+1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_DisableClockLowPower
+1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
+1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
+1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
+ ARM GAS /tmp/ccDGOsZt.s page 98
+
+
+1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
+1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
+1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
+1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
+1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
+1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
+1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
+1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
+1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
+1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
+1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
+1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
+1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
+1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
+1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
+1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
+1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
+1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
+1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
+1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
+1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
+1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
+1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
+1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
+1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
+1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
+1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
+1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)
+1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1LPENR, Periphs);
+1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
+1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
+1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
+1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
+1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
+1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB2 peripherals clock.
+1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n
+1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n
+1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n
+1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n
+1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n
+1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n
+1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n
+1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC1EN LL_APB2_GRP1_EnableClock\n
+1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC2EN LL_APB2_GRP1_EnableClock\n
+1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n
+ ARM GAS /tmp/ccDGOsZt.s page 99
+
+
+1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI4EN LL_APB2_GRP1_EnableClock\n
+1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n
+1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM9EN LL_APB2_GRP1_EnableClock\n
+1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM10EN LL_APB2_GRP1_EnableClock\n
+1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n
+1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI5EN LL_APB2_GRP1_EnableClock\n
+1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI6EN LL_APB2_GRP1_EnableClock\n
+1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n
+1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI2EN LL_APB2_GRP1_EnableClock\n
+1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR LTDCEN LL_APB2_GRP1_EnableClock\n
+1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DSIEN LL_APB2_GRP1_EnableClock\n
+1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock\n
+1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR MDIOEN LL_APB2_GRP1_EnableClock\n
+1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR OTGPHYCEN LL_APB2_GRP1_EnableClock
+1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
+1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
+1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8
+1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1
+1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6
+1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
+1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2
+1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3
+1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
+1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*)
+1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
+1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI4
+1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
+1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
+1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10
+1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
+1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
+1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
+1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1
+1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI2
+1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
+1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
+1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
+1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_MDIO (*)
+1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*)
+1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
+1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
+1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
+1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
+1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
+ 803 .loc 3 1587 22 view .LVU256
+ 804 .LBB153:
+1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
+ 805 .loc 3 1589 3 view .LVU257
+1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
+ 806 .loc 3 1590 3 view .LVU258
+ 807 001e 2A4B ldr r3, .L18
+ 808 0020 5A6C ldr r2, [r3, #68]
+ 809 0022 42F40052 orr r2, r2, #8192
+ 810 0026 5A64 str r2, [r3, #68]
+1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
+ ARM GAS /tmp/ccDGOsZt.s page 100
+
+
+ 811 .loc 3 1592 3 view .LVU259
+ 812 .loc 3 1592 12 is_stmt 0 view .LVU260
+ 813 0028 5A6C ldr r2, [r3, #68]
+ 814 002a 02F40052 and r2, r2, #8192
+ 815 .loc 3 1592 10 view .LVU261
+ 816 002e 0192 str r2, [sp, #4]
+1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 817 .loc 3 1593 3 is_stmt 1 view .LVU262
+ 818 0030 019A ldr r2, [sp, #4]
+ 819 .LVL45:
+ 820 .loc 3 1593 3 is_stmt 0 view .LVU263
+ 821 .LBE153:
+ 822 .LBE152:
+ 449:Src/main.c **** /**SPI4 GPIO Configuration
+ 823 .loc 1 449 3 is_stmt 1 view .LVU264
+ 824 .LBB154:
+ 825 .LBI154:
+ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 826 .loc 3 309 22 view .LVU265
+ 827 .LBB155:
+ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
+ 828 .loc 3 311 3 view .LVU266
+ 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 829 .loc 3 312 3 view .LVU267
+ 830 0032 1A6B ldr r2, [r3, #48]
+ 831 0034 42F01002 orr r2, r2, #16
+ 832 0038 1A63 str r2, [r3, #48]
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 833 .loc 3 314 3 view .LVU268
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 834 .loc 3 314 12 is_stmt 0 view .LVU269
+ 835 003a 1B6B ldr r3, [r3, #48]
+ 836 003c 03F01003 and r3, r3, #16
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 837 .loc 3 314 10 view .LVU270
+ 838 0040 0093 str r3, [sp]
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 839 .loc 3 315 3 is_stmt 1 view .LVU271
+ 840 0042 009B ldr r3, [sp]
+ 841 .LVL46:
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 842 .loc 3 315 3 is_stmt 0 view .LVU272
+ 843 .LBE155:
+ 844 .LBE154:
+ 454:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 845 .loc 1 454 3 is_stmt 1 view .LVU273
+ 454:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 846 .loc 1 454 23 is_stmt 0 view .LVU274
+ 847 0044 4FF48053 mov r3, #4096
+ 848 0048 0293 str r3, [sp, #8]
+ 455:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 849 .loc 1 455 3 is_stmt 1 view .LVU275
+ 455:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 850 .loc 1 455 24 is_stmt 0 view .LVU276
+ 851 004a 0225 movs r5, #2
+ 852 004c 0395 str r5, [sp, #12]
+ 456:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ ARM GAS /tmp/ccDGOsZt.s page 101
+
+
+ 853 .loc 1 456 3 is_stmt 1 view .LVU277
+ 456:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 854 .loc 1 456 25 is_stmt 0 view .LVU278
+ 855 004e 4FF00308 mov r8, #3
+ 856 0052 CDF81080 str r8, [sp, #16]
+ 457:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 857 .loc 1 457 3 is_stmt 1 view .LVU279
+ 458:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 858 .loc 1 458 3 view .LVU280
+ 459:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 859 .loc 1 459 3 view .LVU281
+ 459:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 860 .loc 1 459 29 is_stmt 0 view .LVU282
+ 861 0056 0527 movs r7, #5
+ 862 0058 0797 str r7, [sp, #28]
+ 460:Src/main.c ****
+ 863 .loc 1 460 3 is_stmt 1 view .LVU283
+ 864 005a 1C4E ldr r6, .L18+4
+ 865 005c 02A9 add r1, sp, #8
+ 866 005e 3046 mov r0, r6
+ 867 0060 FFF7FEFF bl LL_GPIO_Init
+ 868 .LVL47:
+ 462:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 869 .loc 1 462 3 view .LVU284
+ 462:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 870 .loc 1 462 23 is_stmt 0 view .LVU285
+ 871 0064 4FF40053 mov r3, #8192
+ 872 0068 0293 str r3, [sp, #8]
+ 463:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 873 .loc 1 463 3 is_stmt 1 view .LVU286
+ 463:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 874 .loc 1 463 24 is_stmt 0 view .LVU287
+ 875 006a 0395 str r5, [sp, #12]
+ 464:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 876 .loc 1 464 3 is_stmt 1 view .LVU288
+ 464:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 877 .loc 1 464 25 is_stmt 0 view .LVU289
+ 878 006c CDF81080 str r8, [sp, #16]
+ 465:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 879 .loc 1 465 3 is_stmt 1 view .LVU290
+ 465:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 880 .loc 1 465 30 is_stmt 0 view .LVU291
+ 881 0070 0594 str r4, [sp, #20]
+ 466:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 882 .loc 1 466 3 is_stmt 1 view .LVU292
+ 466:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 883 .loc 1 466 24 is_stmt 0 view .LVU293
+ 884 0072 0694 str r4, [sp, #24]
+ 467:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 885 .loc 1 467 3 is_stmt 1 view .LVU294
+ 467:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+ 886 .loc 1 467 29 is_stmt 0 view .LVU295
+ 887 0074 0797 str r7, [sp, #28]
+ 468:Src/main.c ****
+ 888 .loc 1 468 3 is_stmt 1 view .LVU296
+ 889 0076 02A9 add r1, sp, #8
+ 890 0078 3046 mov r0, r6
+ ARM GAS /tmp/ccDGOsZt.s page 102
+
+
+ 891 007a FFF7FEFF bl LL_GPIO_Init
+ 892 .LVL48:
+ 474:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 893 .loc 1 474 3 view .LVU297
+ 474:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 894 .loc 1 474 36 is_stmt 0 view .LVU298
+ 895 007e 4FF48063 mov r3, #1024
+ 896 0082 0893 str r3, [sp, #32]
+ 475:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 897 .loc 1 475 3 is_stmt 1 view .LVU299
+ 475:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 898 .loc 1 475 23 is_stmt 0 view .LVU300
+ 899 0084 4FF48273 mov r3, #260
+ 900 0088 0993 str r3, [sp, #36]
+ 476:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 901 .loc 1 476 3 is_stmt 1 view .LVU301
+ 476:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 902 .loc 1 476 28 is_stmt 0 view .LVU302
+ 903 008a 4FF47063 mov r3, #3840
+ 904 008e 0A93 str r3, [sp, #40]
+ 477:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 905 .loc 1 477 3 is_stmt 1 view .LVU303
+ 477:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 906 .loc 1 477 32 is_stmt 0 view .LVU304
+ 907 0090 0B95 str r5, [sp, #44]
+ 478:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 908 .loc 1 478 3 is_stmt 1 view .LVU305
+ 478:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 909 .loc 1 478 29 is_stmt 0 view .LVU306
+ 910 0092 0C94 str r4, [sp, #48]
+ 479:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 911 .loc 1 479 3 is_stmt 1 view .LVU307
+ 479:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 912 .loc 1 479 22 is_stmt 0 view .LVU308
+ 913 0094 4FF40073 mov r3, #512
+ 914 0098 0D93 str r3, [sp, #52]
+ 480:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 915 .loc 1 480 3 is_stmt 1 view .LVU309
+ 480:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 916 .loc 1 480 27 is_stmt 0 view .LVU310
+ 917 009a 1823 movs r3, #24
+ 918 009c 0E93 str r3, [sp, #56]
+ 481:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 919 .loc 1 481 3 is_stmt 1 view .LVU311
+ 481:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 920 .loc 1 481 27 is_stmt 0 view .LVU312
+ 921 009e 0F94 str r4, [sp, #60]
+ 482:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 922 .loc 1 482 3 is_stmt 1 view .LVU313
+ 482:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 923 .loc 1 482 33 is_stmt 0 view .LVU314
+ 924 00a0 1094 str r4, [sp, #64]
+ 483:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
+ 925 .loc 1 483 3 is_stmt 1 view .LVU315
+ 483:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
+ 926 .loc 1 483 26 is_stmt 0 view .LVU316
+ 927 00a2 0723 movs r3, #7
+ ARM GAS /tmp/ccDGOsZt.s page 103
+
+
+ 928 00a4 1193 str r3, [sp, #68]
+ 484:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
+ 929 .loc 1 484 3 is_stmt 1 view .LVU317
+ 930 00a6 0A4C ldr r4, .L18+8
+ 931 00a8 08A9 add r1, sp, #32
+ 932 00aa 2046 mov r0, r4
+ 933 00ac FFF7FEFF bl LL_SPI_Init
+ 934 .LVL49:
+ 485:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4);
+ 935 .loc 1 485 3 view .LVU318
+ 936 .LBB156:
+ 937 .LBI156:
+ 938 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @file stm32f7xx_ll_spi.h
@@ -6058,7 +6178,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private macros ------------------------------------------------------------*/
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported types ------------------------------------------------------------*/
- ARM GAS /tmp/ccLSPxIe.s page 102
+ ARM GAS /tmp/ccDGOsZt.s page 104
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined(USE_FULL_LL_DRIVER)
@@ -6118,7 +6238,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t CRCPoly; /*!< Specifies the polynomial used for the CRC calculation.
- ARM GAS /tmp/ccLSPxIe.s page 103
+ ARM GAS /tmp/ccDGOsZt.s page 105
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter must be a number between Min_Data = 0x00 an
@@ -6178,7 +6298,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as de
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_TI (SPI_CR2_FRF) /*!< TI mode
158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 104
+ ARM GAS /tmp/ccDGOsZt.s page 106
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
@@ -6238,7 +6358,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_NSS_MODE Slave Select Pin Mode
- ARM GAS /tmp/ccLSPxIe.s page 105
+ ARM GAS /tmp/ccDGOsZt.s page 107
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
@@ -6298,7 +6418,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 106
+ ARM GAS /tmp/ccDGOsZt.s page 108
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
@@ -6358,7 +6478,7 @@ ARM GAS /tmp/ccLSPxIe.s page 1
327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read a value in SPI register
- ARM GAS /tmp/ccLSPxIe.s page 107
+ ARM GAS /tmp/ccDGOsZt.s page 109
330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __INSTANCE__ SPI Instance
@@ -6413,52 +6533,14 @@ ARM GAS /tmp/ccLSPxIe.s page 1
379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabled(SPI_TypeDef *SPIx)
- 554 .loc 4 381 26 view .LVU202
- 555 .LBB364:
382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR1, SPI_CR1_SPE) == (SPI_CR1_SPE)) ? 1UL : 0UL);
- 556 .loc 4 383 3 view .LVU203
- ARM GAS /tmp/ccLSPxIe.s page 108
-
-
- 557 .loc 4 383 12 is_stmt 0 view .LVU204
- 558 0000 0F4B ldr r3, .L19
- 559 0002 1B68 ldr r3, [r3]
- 560 .loc 4 383 69 view .LVU205
- 561 0004 13F0400F tst r3, #64
- 562 0008 04D0 beq .L17
- 563 .LVL34:
- 564 .loc 4 383 69 view .LVU206
- 565 .LBE364:
- 566 .LBE363:
-2755:Src/main.c **** {
-2756:Src/main.c **** LL_SPI_Disable(SPI2);
- 567 .loc 1 2756 3 is_stmt 1 view .LVU207
- 568 .LBB365:
- 569 .LBI365:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 570 .loc 4 370 22 view .LVU208
- 571 .LBB366:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 572 .loc 4 372 3 view .LVU209
- 573 000a 0D4A ldr r2, .L19
- 574 000c 1368 ldr r3, [r2]
- 575 000e 23F04003 bic r3, r3, #64
- 576 0012 1360 str r3, [r2]
- 577 .LVL35:
- 578 .L17:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 579 .loc 4 372 3 is_stmt 0 view .LVU210
- 580 .LBE366:
- 581 .LBE365:
-2757:Src/main.c **** }
-2758:Src/main.c **** LL_SPI_SetClockPolarity(SPI2, polarity);
- 582 .loc 1 2758 2 is_stmt 1 view .LVU211
- 583 .LBB367:
- 584 .LBI367:
384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 110
+
+
387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set SPI operation mode to Master or Slave
388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing.
389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 MSTR LL_SPI_SetMode\n
@@ -6478,9 +6560,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get SPI operation mode (Master or Slave)
404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 MSTR LL_SPI_GetMode\n
405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 SSI LL_SPI_GetMode
- ARM GAS /tmp/ccLSPxIe.s page 109
-
-
406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_MASTER
@@ -6502,9 +6581,26 @@ ARM GAS /tmp/ccLSPxIe.s page 1
424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetStandard(SPI_TypeDef *SPIx, uint32_t Standard)
+ 939 .loc 4 426 22 view .LVU319
+ 940 .LBB157:
427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_FRF, Standard);
+ 941 .loc 4 428 3 view .LVU320
+ 942 00b0 6368 ldr r3, [r4, #4]
+ 943 00b2 23F01003 bic r3, r3, #16
+ 944 00b6 6360 str r3, [r4, #4]
+ 945 .LVL50:
+ 946 .loc 4 428 3 is_stmt 0 view .LVU321
+ 947 .LBE157:
+ 948 .LBE156:
+ 486:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */
+ 949 .loc 1 486 3 is_stmt 1 view .LVU322
+ 950 .LBB158:
+ 951 .LBI158:
429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 111
+
+
430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get serial protocol used
@@ -6538,9 +6634,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get clock phase
462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPHA LL_SPI_GetClockPhase
- ARM GAS /tmp/ccLSPxIe.s page 110
-
-
463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_1EDGE
@@ -6563,1567 +6656,11 @@ ARM GAS /tmp/ccLSPxIe.s page 1
482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity)
- 585 .loc 4 484 22 view .LVU212
- 586 .LBB368:
485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity);
- 587 .loc 4 486 3 view .LVU213
- 588 0014 0A4B ldr r3, .L19
- 589 0016 1A68 ldr r2, [r3]
- 590 0018 22F00202 bic r2, r2, #2
- 591 001c 1043 orrs r0, r0, r2
- 592 .LVL36:
- 593 .loc 4 486 3 is_stmt 0 view .LVU214
- 594 001e 1860 str r0, [r3]
- 595 .LVL37:
- 596 .loc 4 486 3 view .LVU215
- 597 .LBE368:
- 598 .LBE367:
-2759:Src/main.c **** LL_SPI_SetClockPhase(SPI2, phase);
- 599 .loc 1 2759 2 is_stmt 1 view .LVU216
- 600 .LBB369:
- 601 .LBI369:
- 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 602 .loc 4 455 22 view .LVU217
- 603 .LBB370:
- 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 604 .loc 4 457 3 view .LVU218
- 605 0020 1A68 ldr r2, [r3]
- 606 0022 22F00102 bic r2, r2, #1
- 607 0026 1143 orrs r1, r1, r2
- 608 .LVL38:
- 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 609 .loc 4 457 3 is_stmt 0 view .LVU219
- 610 0028 1960 str r1, [r3]
- 611 .LVL39:
- 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 612 .loc 4 457 3 view .LVU220
- ARM GAS /tmp/ccLSPxIe.s page 111
+ ARM GAS /tmp/ccDGOsZt.s page 112
- 613 .LBE370:
- 614 .LBE369:
-2760:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2))
- 615 .loc 1 2760 2 is_stmt 1 view .LVU221
- 616 .LBB371:
- 617 .LBI371:
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 618 .loc 4 381 26 view .LVU222
- 619 .LBB372:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 620 .loc 4 383 3 view .LVU223
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 621 .loc 4 383 12 is_stmt 0 view .LVU224
- 622 002a 1B68 ldr r3, [r3]
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 623 .loc 4 383 69 view .LVU225
- 624 002c 13F0400F tst r3, #64
- 625 0030 04D1 bne .L16
- 626 .LVL40:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 627 .loc 4 383 69 view .LVU226
- 628 .LBE372:
- 629 .LBE371:
-2761:Src/main.c **** {
-2762:Src/main.c **** LL_SPI_Enable(SPI2);
- 630 .loc 1 2762 3 is_stmt 1 view .LVU227
- 631 .LBB373:
- 632 .LBI373:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 633 .loc 4 358 22 view .LVU228
- 634 .LBB374:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 635 .loc 4 360 3 view .LVU229
- 636 0032 034A ldr r2, .L19
- 637 0034 1368 ldr r3, [r2]
- 638 0036 43F04003 orr r3, r3, #64
- 639 003a 1360 str r3, [r2]
- 640 .LVL41:
- 641 .L16:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 642 .loc 4 360 3 is_stmt 0 view .LVU230
- 643 .LBE374:
- 644 .LBE373:
-2763:Src/main.c **** }
-2764:Src/main.c **** }
- 645 .loc 1 2764 1 view .LVU231
- 646 003c 7047 bx lr
- 647 .L20:
- 648 003e 00BF .align 2
- 649 .L19:
- 650 0040 00380040 .word 1073756160
- 651 .cfi_endproc
- 652 .LFE1213:
- 654 .section .text.PA4_DAC_Set,"ax",%progbits
- 655 .align 1
- 656 .syntax unified
- 657 .thumb
- ARM GAS /tmp/ccLSPxIe.s page 112
-
-
- 658 .thumb_func
- 660 PA4_DAC_Set:
- 661 .LVL42:
- 662 .LFB1217:
-2765:Src/main.c ****
-2766:Src/main.c **** static void AD9833_WriteWord(uint16_t word)
-2767:Src/main.c **** {
-2768:Src/main.c **** uint32_t tmp32 = 0;
-2769:Src/main.c ****
-2770:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
-2771:Src/main.c ****
-2772:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2773:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
-2774:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-2775:Src/main.c ****
-2776:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
-2777:Src/main.c ****
-2778:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2779:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
-2780:Src/main.c **** tmp32 = 0;
-2781:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2782:Src/main.c **** (void) SPI2->DR;
-2783:Src/main.c ****
-2784:Src/main.c **** HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
-2785:Src/main.c **** }
-2786:Src/main.c ****
-2787:Src/main.c **** static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word)
-2788:Src/main.c **** {
-2789:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1
-2790:Src/main.c **** if (triangle)
-2791:Src/main.c **** {
-2792:Src/main.c **** control |= 0x0002u; // MODE = 1 (triangle)
-2793:Src/main.c **** }
-2794:Src/main.c **** control |= 0x0100u; // RESET = 1 while updating
-2795:Src/main.c ****
-2796:Src/main.c **** freq_word &= 0x0FFFFFFFu;
-2797:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
-2798:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
-2799:Src/main.c ****
-2800:Src/main.c **** AD9833_WriteWord(control);
-2801:Src/main.c **** AD9833_WriteWord(lsw);
-2802:Src/main.c **** AD9833_WriteWord(msw);
-2803:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0
-2804:Src/main.c ****
-2805:Src/main.c **** if (enable)
-2806:Src/main.c **** {
-2807:Src/main.c **** control &= (uint16_t)(~0x0100u);
-2808:Src/main.c **** }
-2809:Src/main.c **** AD9833_WriteWord(control);
-2810:Src/main.c **** }
-2811:Src/main.c ****
-2812:Src/main.c **** static void PA4_DAC_Init(void)
-2813:Src/main.c **** {
-2814:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0};
-2815:Src/main.c ****
-2816:Src/main.c **** __HAL_RCC_DAC_CLK_ENABLE();
-2817:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE();
- ARM GAS /tmp/ccLSPxIe.s page 113
-
-
-2818:Src/main.c ****
-2819:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_4;
-2820:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
-2821:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
-2822:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-2823:Src/main.c ****
-2824:Src/main.c **** // Keep channel disabled until a dedicated serial command enables it.
-2825:Src/main.c **** DAC->CR &= ~(DAC_CR_EN1 | DAC_CR_TEN1 | DAC_CR_DMAEN1);
-2826:Src/main.c **** DAC->DHR12R1 = 0u;
-2827:Src/main.c **** }
-2828:Src/main.c ****
-2829:Src/main.c **** static void PA4_DAC_Set(uint16_t dac_code, uint8_t enable)
-2830:Src/main.c **** {
- 663 .loc 1 2830 1 is_stmt 1 view -0
- 664 .cfi_startproc
- 665 @ args = 0, pretend = 0, frame = 0
- 666 @ frame_needed = 0, uses_anonymous_args = 0
- 667 @ link register save eliminated.
-2831:Src/main.c **** if (dac_code > STM32_DAC_CODE_MAX)
- 668 .loc 1 2831 2 view .LVU233
- 669 .loc 1 2831 5 is_stmt 0 view .LVU234
- 670 0000 B0F5805F cmp r0, #4096
- 671 0004 01D3 bcc .L22
-2832:Src/main.c **** {
-2833:Src/main.c **** dac_code = STM32_DAC_CODE_MAX;
- 672 .loc 1 2833 12 view .LVU235
- 673 0006 40F6FF70 movw r0, #4095
- 674 .LVL43:
- 675 .L22:
-2834:Src/main.c **** }
-2835:Src/main.c ****
-2836:Src/main.c **** DAC->DHR12R1 = dac_code;
- 676 .loc 1 2836 2 is_stmt 1 view .LVU236
- 677 .loc 1 2836 15 is_stmt 0 view .LVU237
- 678 000a 074B ldr r3, .L26
- 679 000c 9860 str r0, [r3, #8]
-2837:Src/main.c ****
-2838:Src/main.c **** if (enable)
- 680 .loc 1 2838 2 is_stmt 1 view .LVU238
- 681 .loc 1 2838 5 is_stmt 0 view .LVU239
- 682 000e 29B1 cbz r1, .L23
-2839:Src/main.c **** {
-2840:Src/main.c **** DAC->CR |= DAC_CR_EN1;
- 683 .loc 1 2840 3 is_stmt 1 view .LVU240
- 684 .loc 1 2840 6 is_stmt 0 view .LVU241
- 685 0010 1A46 mov r2, r3
- 686 0012 1B68 ldr r3, [r3]
- 687 .loc 1 2840 11 view .LVU242
- 688 0014 43F00103 orr r3, r3, #1
- 689 0018 1360 str r3, [r2]
- 690 001a 7047 bx lr
- 691 .L23:
-2841:Src/main.c **** }
-2842:Src/main.c **** else
-2843:Src/main.c **** {
-2844:Src/main.c **** DAC->CR &= ~DAC_CR_EN1;
- 692 .loc 1 2844 3 is_stmt 1 view .LVU243
- ARM GAS /tmp/ccLSPxIe.s page 114
-
-
- 693 .loc 1 2844 6 is_stmt 0 view .LVU244
- 694 001c 024A ldr r2, .L26
- 695 001e 1368 ldr r3, [r2]
- 696 .loc 1 2844 11 view .LVU245
- 697 0020 23F00103 bic r3, r3, #1
- 698 0024 1360 str r3, [r2]
-2845:Src/main.c **** }
-2846:Src/main.c **** }
- 699 .loc 1 2846 1 view .LVU246
- 700 0026 7047 bx lr
- 701 .L27:
- 702 .align 2
- 703 .L26:
- 704 0028 00740040 .word 1073771520
- 705 .cfi_endproc
- 706 .LFE1217:
- 708 .section .text.AD9102_ResetWaveUploadState,"ax",%progbits
- 709 .align 1
- 710 .syntax unified
- 711 .thumb
- 712 .thumb_func
- 714 AD9102_ResetWaveUploadState:
- 715 .LFB1222:
-2847:Src/main.c ****
-2848:Src/main.c **** static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms)
-2849:Src/main.c **** {
-2850:Src/main.c **** for (uint16_t i = 0; i < count; i++)
-2851:Src/main.c **** {
-2852:Src/main.c **** if (uc)
-2853:Src/main.c **** {
-2854:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
-2855:Src/main.c **** }
-2856:Src/main.c **** if (dc)
-2857:Src/main.c **** {
-2858:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
-2859:Src/main.c **** }
-2860:Src/main.c **** HAL_Delay(pulse_ms);
-2861:Src/main.c **** if (uc)
-2862:Src/main.c **** {
-2863:Src/main.c **** HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
-2864:Src/main.c **** }
-2865:Src/main.c **** if (dc)
-2866:Src/main.c **** {
-2867:Src/main.c **** HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
-2868:Src/main.c **** }
-2869:Src/main.c **** HAL_Delay(pulse_ms);
-2870:Src/main.c **** }
-2871:Src/main.c **** }
-2872:Src/main.c ****
-2873:Src/main.c **** static void AD9102_WriteReg(uint16_t addr, uint16_t value)
-2874:Src/main.c **** {
-2875:Src/main.c **** uint32_t tmp32 = 0;
-2876:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
-2877:Src/main.c ****
-2878:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
-2879:Src/main.c ****
-2880:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
- ARM GAS /tmp/ccLSPxIe.s page 115
-
-
-2881:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-2882:Src/main.c ****
-2883:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2))
-2884:Src/main.c **** {
-2885:Src/main.c **** LL_SPI_Enable(SPI2);
-2886:Src/main.c **** }
-2887:Src/main.c ****
-2888:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-2889:Src/main.c ****
-2890:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2891:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
-2892:Src/main.c **** tmp32 = 0;
-2893:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2894:Src/main.c **** (void) SPI2->DR;
-2895:Src/main.c ****
-2896:Src/main.c **** tmp32 = 0;
-2897:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2898:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
-2899:Src/main.c **** tmp32 = 0;
-2900:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2901:Src/main.c **** (void) SPI2->DR;
-2902:Src/main.c ****
-2903:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-2904:Src/main.c **** }
-2905:Src/main.c ****
-2906:Src/main.c **** static uint16_t AD9102_ReadReg(uint16_t addr)
-2907:Src/main.c **** {
-2908:Src/main.c **** uint32_t tmp32 = 0;
-2909:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
-2910:Src/main.c **** uint16_t value;
-2911:Src/main.c ****
-2912:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
-2913:Src/main.c ****
-2914:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
-2915:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
-2916:Src/main.c ****
-2917:Src/main.c **** if (!LL_SPI_IsEnabled(SPI2))
-2918:Src/main.c **** {
-2919:Src/main.c **** LL_SPI_Enable(SPI2);
-2920:Src/main.c **** }
-2921:Src/main.c ****
-2922:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_RESET);
-2923:Src/main.c ****
-2924:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2925:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
-2926:Src/main.c **** tmp32 = 0;
-2927:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2928:Src/main.c **** (void) SPI2->DR;
-2929:Src/main.c ****
-2930:Src/main.c **** tmp32 = 0;
-2931:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
-2932:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
-2933:Src/main.c **** tmp32 = 0;
-2934:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
-2935:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
-2936:Src/main.c ****
-2937:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- ARM GAS /tmp/ccLSPxIe.s page 116
-
-
-2938:Src/main.c **** return value;
-2939:Src/main.c **** }
-2940:Src/main.c ****
-2941:Src/main.c **** static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count)
-2942:Src/main.c **** {
-2943:Src/main.c **** for (uint16_t i = 0; i < count; i++)
-2944:Src/main.c **** {
-2945:Src/main.c **** AD9102_WriteReg(ad9102_reg_addr[i], values[i]);
-2946:Src/main.c **** }
-2947:Src/main.c **** }
-2948:Src/main.c ****
-2949:Src/main.c **** static void AD9102_ResetWaveUploadState(void)
-2950:Src/main.c **** {
- 716 .loc 1 2950 1 is_stmt 1 view -0
- 717 .cfi_startproc
- 718 @ args = 0, pretend = 0, frame = 0
- 719 @ frame_needed = 0, uses_anonymous_args = 0
- 720 @ link register save eliminated.
-2951:Src/main.c **** ad9102_wave_upload_active = 0u;
- 721 .loc 1 2951 2 view .LVU248
- 722 .loc 1 2951 28 is_stmt 0 view .LVU249
- 723 0000 0023 movs r3, #0
- 724 0002 034A ldr r2, .L29
- 725 0004 1370 strb r3, [r2]
-2952:Src/main.c **** ad9102_wave_expected_samples = 0u;
- 726 .loc 1 2952 2 is_stmt 1 view .LVU250
- 727 .loc 1 2952 31 is_stmt 0 view .LVU251
- 728 0006 034A ldr r2, .L29+4
- 729 0008 1380 strh r3, [r2] @ movhi
-2953:Src/main.c **** ad9102_wave_written_samples = 0u;
- 730 .loc 1 2953 2 is_stmt 1 view .LVU252
- 731 .loc 1 2953 30 is_stmt 0 view .LVU253
- 732 000a 034A ldr r2, .L29+8
- 733 000c 1380 strh r3, [r2] @ movhi
-2954:Src/main.c **** }
- 734 .loc 1 2954 1 view .LVU254
- 735 000e 7047 bx lr
- 736 .L30:
- 737 .align 2
- 738 .L29:
- 739 0010 00000000 .word ad9102_wave_upload_active
- 740 0014 00000000 .word ad9102_wave_expected_samples
- 741 0018 00000000 .word ad9102_wave_written_samples
- 742 .cfi_endproc
- 743 .LFE1222:
- 745 .section .text.PID_Controller_Temp,"ax",%progbits
- 746 .align 1
- 747 .syntax unified
- 748 .thumb
- 749 .thumb_func
- 751 PID_Controller_Temp:
- 752 .LVL44:
- 753 .LFB1239:
-2955:Src/main.c ****
-2956:Src/main.c **** static void AD9102_StopOutput(void)
-2957:Src/main.c **** {
-2958:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- ARM GAS /tmp/ccLSPxIe.s page 117
-
-
-2959:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2960:Src/main.c **** }
-2961:Src/main.c ****
-2962:Src/main.c **** static void AD9102_StartOutput(void)
-2963:Src/main.c **** {
-2964:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
-2965:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
-2966:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-2967:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {}
-2968:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
-2969:Src/main.c **** }
-2970:Src/main.c ****
-2971:Src/main.c **** static void AD9102_ConfigureSramPlayback(uint16_t samples, uint8_t hold)
-2972:Src/main.c **** {
-2973:Src/main.c **** uint16_t pat_timebase;
-2974:Src/main.c **** uint32_t pat_period;
-2975:Src/main.c ****
-2976:Src/main.c **** if (samples < 2u)
-2977:Src/main.c **** {
-2978:Src/main.c **** samples = 2u;
-2979:Src/main.c **** }
-2980:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES)
-2981:Src/main.c **** {
-2982:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES;
-2983:Src/main.c **** }
-2984:Src/main.c **** if (hold == 0u)
-2985:Src/main.c **** {
-2986:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT;
-2987:Src/main.c **** }
-2988:Src/main.c **** if (hold > 0x0Fu)
-2989:Src/main.c **** {
-2990:Src/main.c **** hold = 0x0Fu;
-2991:Src/main.c **** }
-2992:Src/main.c ****
-2993:Src/main.c **** pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
-2994:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
-2995:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
-2996:Src/main.c **** pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
-2997:Src/main.c **** if (pat_period == 0u)
-2998:Src/main.c **** {
-2999:Src/main.c **** pat_period = samples;
-3000:Src/main.c **** }
-3001:Src/main.c **** if (pat_period > 0xFFFFu)
-3002:Src/main.c **** {
-3003:Src/main.c **** pat_period = 0xFFFFu;
-3004:Src/main.c **** }
-3005:Src/main.c ****
-3006:Src/main.c **** AD9102_WriteRegTable(ad9102_example2_regval, AD9102_REG_COUNT);
-3007:Src/main.c **** AD9102_StopOutput();
-3008:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
-3009:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
-3010:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
-3011:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
-3012:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
-3013:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
-3014:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
-3015:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- ARM GAS /tmp/ccLSPxIe.s page 118
-
-
-3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
-3017:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-3018:Src/main.c **** }
-3019:Src/main.c ****
-3020:Src/main.c **** static uint8_t AD9102_BeginWaveUpload(uint16_t samples)
-3021:Src/main.c **** {
-3022:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES))
-3023:Src/main.c **** {
-3024:Src/main.c **** return 0u;
-3025:Src/main.c **** }
-3026:Src/main.c ****
-3027:Src/main.c **** AD9102_StopOutput();
-3028:Src/main.c **** AD9102_ResetWaveUploadState();
-3029:Src/main.c **** AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT);
-3030:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access
-3031:Src/main.c ****
-3032:Src/main.c **** ad9102_wave_expected_samples = samples;
-3033:Src/main.c **** ad9102_wave_written_samples = 0u;
-3034:Src/main.c **** ad9102_wave_upload_active = 1u;
-3035:Src/main.c **** return 1u;
-3036:Src/main.c **** }
-3037:Src/main.c ****
-3038:Src/main.c **** static uint8_t AD9102_WriteWaveUploadChunk(const uint16_t *samples, uint16_t chunk_count)
-3039:Src/main.c **** {
-3040:Src/main.c **** if (ad9102_wave_upload_active == 0u)
-3041:Src/main.c **** {
-3042:Src/main.c **** return 0u;
-3043:Src/main.c **** }
-3044:Src/main.c **** if ((chunk_count == 0u) || (chunk_count > AD9102_WAVE_MAX_CHUNK_SAMPLES))
-3045:Src/main.c **** {
-3046:Src/main.c **** return 0u;
-3047:Src/main.c **** }
-3048:Src/main.c **** if (((uint32_t)ad9102_wave_written_samples + (uint32_t)chunk_count) > (uint32_t)ad9102_wave_expect
-3049:Src/main.c **** {
-3050:Src/main.c **** return 0u;
-3051:Src/main.c **** }
-3052:Src/main.c ****
-3053:Src/main.c **** for (uint16_t i = 0; i < chunk_count; i++)
-3054:Src/main.c **** {
-3055:Src/main.c **** int16_t sample = (int16_t)samples[i];
-3056:Src/main.c **** uint16_t sample_u14;
-3057:Src/main.c **** uint16_t word;
-3058:Src/main.c ****
-3059:Src/main.c **** if ((sample < AD9102_SRAM_RAMP_MIN) || (sample > AD9102_SRAM_RAMP_MAX))
-3060:Src/main.c **** {
-3061:Src/main.c **** return 0u;
-3062:Src/main.c **** }
-3063:Src/main.c ****
-3064:Src/main.c **** sample_u14 = ((uint16_t)sample) & 0x3FFFu;
-3065:Src/main.c **** word = (uint16_t)(sample_u14 << 2);
-3066:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word);
-3067:Src/main.c **** }
-3068:Src/main.c ****
-3069:Src/main.c **** ad9102_wave_written_samples = (uint16_t)(ad9102_wave_written_samples + chunk_count);
-3070:Src/main.c **** return 1u;
-3071:Src/main.c **** }
-3072:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 119
-
-
-3073:Src/main.c **** static uint16_t AD9102_CommitWaveUpload(uint8_t *ok)
-3074:Src/main.c **** {
-3075:Src/main.c **** uint16_t pat_status;
-3076:Src/main.c ****
-3077:Src/main.c **** if (ok != NULL)
-3078:Src/main.c **** {
-3079:Src/main.c **** *ok = 0u;
-3080:Src/main.c **** }
-3081:Src/main.c ****
-3082:Src/main.c **** if ((ad9102_wave_upload_active == 0u) ||
-3083:Src/main.c **** (ad9102_wave_expected_samples < 2u) ||
-3084:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples))
-3085:Src/main.c **** {
-3086:Src/main.c **** AD9102_CancelWaveUpload();
-3087:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-3088:Src/main.c **** }
-3089:Src/main.c ****
-3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); // disable SRAM access
-3091:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
-3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4));
-3093:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
-3094:Src/main.c **** AD9102_StartOutput();
-3095:Src/main.c **** pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-3096:Src/main.c ****
-3097:Src/main.c **** AD9102_ResetWaveUploadState();
-3098:Src/main.c **** if (ok != NULL)
-3099:Src/main.c **** {
-3100:Src/main.c **** *ok = 1u;
-3101:Src/main.c **** }
-3102:Src/main.c ****
-3103:Src/main.c **** return pat_status;
-3104:Src/main.c **** }
-3105:Src/main.c ****
-3106:Src/main.c **** static void AD9102_CancelWaveUpload(void)
-3107:Src/main.c **** {
-3108:Src/main.c **** if (ad9102_wave_upload_active != 0u)
-3109:Src/main.c **** {
-3110:Src/main.c **** AD9102_StopOutput();
-3111:Src/main.c **** }
-3112:Src/main.c **** AD9102_ResetWaveUploadState();
-3113:Src/main.c **** }
-3114:Src/main.c ****
-3115:Src/main.c **** static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base,
-3116:Src/main.c **** {
-3117:Src/main.c **** AD9102_ResetWaveUploadState();
-3118:Src/main.c ****
-3119:Src/main.c **** if (enable)
-3120:Src/main.c **** {
-3121:Src/main.c **** uint16_t saw_cfg;
-3122:Src/main.c **** uint16_t pat_timebase;
-3123:Src/main.c ****
-3124:Src/main.c **** if (saw_step == 0u)
-3125:Src/main.c **** {
-3126:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT;
-3127:Src/main.c **** }
-3128:Src/main.c **** if (saw_step > 63u)
-3129:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 120
-
-
-3130:Src/main.c **** saw_step = 63u;
-3131:Src/main.c **** }
-3132:Src/main.c **** saw_cfg = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
-3133:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
-3134:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
-3135:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
-3136:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-3137:Src/main.c ****
-3138:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX4_WAV_CONFIG);
-3139:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
-3140:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
-3141:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
-3142:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
-3143:Src/main.c ****
-3144:Src/main.c **** AD9102_StartOutput();
-3145:Src/main.c **** }
-3146:Src/main.c **** else
-3147:Src/main.c **** {
-3148:Src/main.c **** AD9102_StopOutput();
-3149:Src/main.c **** }
-3150:Src/main.c ****
-3151:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-3152:Src/main.c **** }
-3153:Src/main.c ****
-3154:Src/main.c **** static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude)
-3155:Src/main.c **** {
-3156:Src/main.c **** if (samples < 2u)
-3157:Src/main.c **** {
-3158:Src/main.c **** samples = 2u;
-3159:Src/main.c **** }
-3160:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES)
-3161:Src/main.c **** {
-3162:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES;
-3163:Src/main.c **** }
-3164:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT)
-3165:Src/main.c **** {
-3166:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT;
-3167:Src/main.c **** }
-3168:Src/main.c ****
-3169:Src/main.c **** // Enable SRAM access.
-3170:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
-3171:Src/main.c ****
-3172:Src/main.c **** for (uint16_t i = 0; i < samples; i++)
-3173:Src/main.c **** {
-3174:Src/main.c **** int32_t value;
-3175:Src/main.c **** int32_t min_val = -(int32_t)amplitude;
-3176:Src/main.c **** int32_t max_val = (int32_t)amplitude;
-3177:Src/main.c **** int32_t span = max_val - min_val;
-3178:Src/main.c **** if (triangle)
-3179:Src/main.c **** {
-3180:Src/main.c **** uint16_t half = samples / 2u;
-3181:Src/main.c **** if (half == 0u)
-3182:Src/main.c **** {
-3183:Src/main.c **** half = 1u;
-3184:Src/main.c **** }
-3185:Src/main.c **** if (i < half)
-3186:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 121
-
-
-3187:Src/main.c **** uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
-3188:Src/main.c **** if (span == 0)
-3189:Src/main.c **** {
-3190:Src/main.c **** value = 0;
-3191:Src/main.c **** }
-3192:Src/main.c **** else
-3193:Src/main.c **** {
-3194:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom;
-3195:Src/main.c **** }
-3196:Src/main.c **** }
-3197:Src/main.c **** else
-3198:Src/main.c **** {
-3199:Src/main.c **** uint16_t tail = (uint16_t)(samples - half);
-3200:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
-3201:Src/main.c **** if (span == 0)
-3202:Src/main.c **** {
-3203:Src/main.c **** value = 0;
-3204:Src/main.c **** }
-3205:Src/main.c **** else
-3206:Src/main.c **** {
-3207:Src/main.c **** value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom;
-3208:Src/main.c **** }
-3209:Src/main.c **** }
-3210:Src/main.c **** }
-3211:Src/main.c **** else
-3212:Src/main.c **** {
-3213:Src/main.c **** uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
-3214:Src/main.c **** if (span == 0)
-3215:Src/main.c **** {
-3216:Src/main.c **** value = 0;
-3217:Src/main.c **** }
-3218:Src/main.c **** else
-3219:Src/main.c **** {
-3220:Src/main.c **** value = min_val + (span * (int32_t)i) / (int32_t)denom;
-3221:Src/main.c **** }
-3222:Src/main.c **** }
-3223:Src/main.c ****
-3224:Src/main.c **** if (value < AD9102_SRAM_RAMP_MIN)
-3225:Src/main.c **** {
-3226:Src/main.c **** value = AD9102_SRAM_RAMP_MIN;
-3227:Src/main.c **** }
-3228:Src/main.c **** else if (value > AD9102_SRAM_RAMP_MAX)
-3229:Src/main.c **** {
-3230:Src/main.c **** value = AD9102_SRAM_RAMP_MAX;
-3231:Src/main.c **** }
-3232:Src/main.c ****
-3233:Src/main.c **** uint16_t sample_u14 = (uint16_t)((int16_t)value) & 0x3FFFu;
-3234:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2);
-3235:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
-3236:Src/main.c **** }
-3237:Src/main.c ****
-3238:Src/main.c **** // Disable SRAM access.
-3239:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
-3240:Src/main.c **** }
-3241:Src/main.c ****
-3242:Src/main.c **** static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle,
-3243:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 122
-
-
-3244:Src/main.c **** AD9102_ResetWaveUploadState();
-3245:Src/main.c ****
-3246:Src/main.c **** if (samples == 0u)
-3247:Src/main.c **** {
-3248:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT;
-3249:Src/main.c **** }
-3250:Src/main.c **** if (samples < 2u)
-3251:Src/main.c **** {
-3252:Src/main.c **** samples = 2u;
-3253:Src/main.c **** }
-3254:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES)
-3255:Src/main.c **** {
-3256:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES;
-3257:Src/main.c **** }
-3258:Src/main.c **** if (hold == 0u)
-3259:Src/main.c **** {
-3260:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT;
-3261:Src/main.c **** }
-3262:Src/main.c **** if (hold > 0x0Fu)
-3263:Src/main.c **** {
-3264:Src/main.c **** hold = 0x0Fu;
-3265:Src/main.c **** }
-3266:Src/main.c ****
-3267:Src/main.c **** if (amplitude > AD9102_SRAM_AMP_DEFAULT)
-3268:Src/main.c **** {
-3269:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT;
-3270:Src/main.c **** }
-3271:Src/main.c ****
-3272:Src/main.c **** AD9102_ConfigureSramPlayback(samples, hold);
-3273:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude);
-3274:Src/main.c ****
-3275:Src/main.c **** if (enable)
-3276:Src/main.c **** {
-3277:Src/main.c **** AD9102_StartOutput();
-3278:Src/main.c **** }
-3279:Src/main.c **** else
-3280:Src/main.c **** {
-3281:Src/main.c **** AD9102_StopOutput();
-3282:Src/main.c **** }
-3283:Src/main.c ****
-3284:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
-3285:Src/main.c **** }
-3286:Src/main.c ****
-3287:Src/main.c **** static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t
-3288:Src/main.c **** {
-3289:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
-3290:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
-3291:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
-3292:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
-3293:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
-3294:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
-3295:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
-3296:Src/main.c ****
-3297:Src/main.c **** if (saw_step == 0u)
-3298:Src/main.c **** {
-3299:Src/main.c **** saw_step = AD9102_SAW_STEP_DEFAULT;
-3300:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 123
-
-
-3301:Src/main.c **** if (saw_step > 63u)
-3302:Src/main.c **** {
-3303:Src/main.c **** saw_step = 63u;
-3304:Src/main.c **** }
-3305:Src/main.c **** if (pat_period == 0u)
-3306:Src/main.c **** {
-3307:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT;
-3308:Src/main.c **** }
-3309:Src/main.c **** uint16_t expect_saw = (uint16_t)(((uint16_t)(saw_step & 0x3Fu) << 2) |
-3310:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
-3311:Src/main.c ****
-3312:Src/main.c **** uint8_t ok = 1u;
-3313:Src/main.c ****
-3314:Src/main.c **** // Expect default SPI config: MSB-first, 4-wire, no double SPI, no reset.
-3315:Src/main.c **** if (spiconfig != 0x0000u)
-3316:Src/main.c **** {
-3317:Src/main.c **** ok = 0u;
-3318:Src/main.c **** }
-3319:Src/main.c ****
-3320:Src/main.c **** // Power blocks should not be powered down.
-3321:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
-3322:Src/main.c **** {
-3323:Src/main.c **** ok = 0u;
-3324:Src/main.c **** }
-3325:Src/main.c ****
-3326:Src/main.c **** // Clock receiver must be enabled (cannot directly detect external clock presence).
-3327:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
-3328:Src/main.c **** {
-3329:Src/main.c **** ok = 0u;
-3330:Src/main.c **** }
-3331:Src/main.c ****
-3332:Src/main.c **** // Any configuration error flags indicate a bad setup.
-3333:Src/main.c **** if (cfg_err & 0x003Fu)
-3334:Src/main.c **** {
-3335:Src/main.c **** ok = 0u;
-3336:Src/main.c **** }
-3337:Src/main.c ****
-3338:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
-3339:Src/main.c **** {
-3340:Src/main.c **** ok = 0u;
-3341:Src/main.c **** }
-3342:Src/main.c ****
-3343:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX4_WAV_CONFIG)
-3344:Src/main.c **** {
-3345:Src/main.c **** ok = 0u;
-3346:Src/main.c **** }
-3347:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
-3348:Src/main.c **** {
-3349:Src/main.c **** ok = 0u;
-3350:Src/main.c **** }
-3351:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != pat_period)
-3352:Src/main.c **** {
-3353:Src/main.c **** ok = 0u;
-3354:Src/main.c **** }
-3355:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
-3356:Src/main.c **** {
-3357:Src/main.c **** ok = 0u;
- ARM GAS /tmp/ccLSPxIe.s page 124
-
-
-3358:Src/main.c **** }
-3359:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_SAW_CONFIG) != expect_saw)
-3360:Src/main.c **** {
-3361:Src/main.c **** ok = 0u;
-3362:Src/main.c **** }
-3363:Src/main.c ****
-3364:Src/main.c **** return (ok ? 0u : 1u);
-3365:Src/main.c **** }
-3366:Src/main.c ****
-3367:Src/main.c **** static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uin
-3368:Src/main.c **** {
-3369:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
-3370:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
-3371:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
-3372:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
-3373:Src/main.c ****
-3374:Src/main.c **** if (samples == 0u)
-3375:Src/main.c **** {
-3376:Src/main.c **** samples = AD9102_SRAM_SAMPLES_DEFAULT;
-3377:Src/main.c **** }
-3378:Src/main.c **** if (samples < 2u)
-3379:Src/main.c **** {
-3380:Src/main.c **** samples = 2u;
-3381:Src/main.c **** }
-3382:Src/main.c **** if (samples > AD9102_SRAM_MAX_SAMPLES)
-3383:Src/main.c **** {
-3384:Src/main.c **** samples = AD9102_SRAM_MAX_SAMPLES;
-3385:Src/main.c **** }
-3386:Src/main.c **** if (hold == 0u)
-3387:Src/main.c **** {
-3388:Src/main.c **** hold = AD9102_SRAM_HOLD_DEFAULT;
-3389:Src/main.c **** }
-3390:Src/main.c **** if (hold > 0x0Fu)
-3391:Src/main.c **** {
-3392:Src/main.c **** hold = 0x0Fu;
-3393:Src/main.c **** }
-3394:Src/main.c ****
-3395:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
-3396:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
-3397:Src/main.c **** (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
-3398:Src/main.c **** uint32_t pat_period = (uint32_t)samples * (uint32_t)(hold & 0x0Fu);
-3399:Src/main.c **** if (pat_period == 0u)
-3400:Src/main.c **** {
-3401:Src/main.c **** pat_period = samples;
-3402:Src/main.c **** }
-3403:Src/main.c **** if (pat_period > 0xFFFFu)
-3404:Src/main.c **** {
-3405:Src/main.c **** pat_period = 0xFFFFu;
-3406:Src/main.c **** }
-3407:Src/main.c ****
-3408:Src/main.c **** uint16_t stop_addr = (uint16_t)((samples - 1u) << 4);
-3409:Src/main.c ****
-3410:Src/main.c **** uint8_t ok = 1u;
-3411:Src/main.c ****
-3412:Src/main.c **** if (spiconfig != 0x0000u)
-3413:Src/main.c **** {
-3414:Src/main.c **** ok = 0u;
- ARM GAS /tmp/ccLSPxIe.s page 125
-
-
-3415:Src/main.c **** }
-3416:Src/main.c **** if (powercfg & ((1u << 8) | (1u << 7) | (1u << 6) | (1u << 5) | (1u << 3)))
-3417:Src/main.c **** {
-3418:Src/main.c **** ok = 0u;
-3419:Src/main.c **** }
-3420:Src/main.c **** if (clockcfg & ((1u << 11) | (1u << 7) | (1u << 6) | (1u << 5)))
-3421:Src/main.c **** {
-3422:Src/main.c **** ok = 0u;
-3423:Src/main.c **** }
-3424:Src/main.c **** if (cfg_err & 0x003Fu)
-3425:Src/main.c **** {
-3426:Src/main.c **** ok = 0u;
-3427:Src/main.c **** }
-3428:Src/main.c **** if (expect_run && ((pat_status & AD9102_PAT_STATUS_RUN) == 0u))
-3429:Src/main.c **** {
-3430:Src/main.c **** ok = 0u;
-3431:Src/main.c **** }
-3432:Src/main.c ****
-3433:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_WAV_CONFIG) != AD9102_EX2_WAV_CONFIG)
-3434:Src/main.c **** {
-3435:Src/main.c **** ok = 0u;
-3436:Src/main.c **** }
-3437:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TIMEBASE) != pat_timebase)
-3438:Src/main.c **** {
-3439:Src/main.c **** ok = 0u;
-3440:Src/main.c **** }
-3441:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_PERIOD) != (uint16_t)pat_period)
-3442:Src/main.c **** {
-3443:Src/main.c **** ok = 0u;
-3444:Src/main.c **** }
-3445:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_PAT_TYPE) != 0x0000u)
-3446:Src/main.c **** {
-3447:Src/main.c **** ok = 0u;
-3448:Src/main.c **** }
-3449:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_START_ADDR) != 0x0000u)
-3450:Src/main.c **** {
-3451:Src/main.c **** ok = 0u;
-3452:Src/main.c **** }
-3453:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_STOP_ADDR) != stop_addr)
-3454:Src/main.c **** {
-3455:Src/main.c **** ok = 0u;
-3456:Src/main.c **** }
-3457:Src/main.c **** if (AD9102_ReadReg(AD9102_REG_DAC_PAT) != AD9102_EX2_DAC_PAT)
-3458:Src/main.c **** {
-3459:Src/main.c **** ok = 0u;
-3460:Src/main.c **** }
-3461:Src/main.c ****
-3462:Src/main.c **** return (ok ? 0u : 1u);
-3463:Src/main.c **** }
-3464:Src/main.c ****
-3465:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA)
-3466:Src/main.c **** {
-3467:Src/main.c **** uint32_t tmp32;
-3468:Src/main.c ****
-3469:Src/main.c **** if (num == 1 || num == 3)
-3470:Src/main.c **** {
-3471:Src/main.c **** SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
- ARM GAS /tmp/ccLSPxIe.s page 126
-
-
-3472:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
-3473:Src/main.c **** }
-3474:Src/main.c ****
-3475:Src/main.c **** switch (num)
-3476:Src/main.c **** {
-3477:Src/main.c **** case 1:
-3478:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L
-3479:Src/main.c **** //tmp32=0;
-3480:Src/main.c **** //while(tmp32<500){tmp32++;}
-3481:Src/main.c **** tmp32 = 0;
-3482:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-3483:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
-3484:Src/main.c **** tmp32 = 0;
-3485:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-3486:Src/main.c **** (void) SPI2->DR;
-3487:Src/main.c **** break;
-3488:Src/main.c **** case 2:
-3489:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes
-3490:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L
-3491:Src/main.c **** //tmp32=0;
-3492:Src/main.c **** //while(tmp32<500){tmp32++;}
-3493:Src/main.c **** tmp32 = 0;
-3494:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-3495:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
-3496:Src/main.c **** tmp32 = 0;
-3497:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-3498:Src/main.c **** (void) SPI6->DR;
-3499:Src/main.c **** break;
-3500:Src/main.c **** case 3:
-3501:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with
-3502:Src/main.c **** //tmp32=0;
-3503:Src/main.c **** //while(tmp32<500){tmp32++;}
-3504:Src/main.c **** tmp32 = 0;
-3505:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-3506:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
-3507:Src/main.c **** tmp32 = 0;
-3508:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-3509:Src/main.c **** (void) SPI2->DR;
-3510:Src/main.c **** break;
-3511:Src/main.c **** case 4:
-3512:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with
-3513:Src/main.c **** //tmp32=0;
-3514:Src/main.c **** //while(tmp32<500){tmp32++;}
-3515:Src/main.c **** tmp32 = 0;
-3516:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
-3517:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
-3518:Src/main.c **** tmp32 = 0;
-3519:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
-3520:Src/main.c **** (void) SPI6->DR;
-3521:Src/main.c **** break;
-3522:Src/main.c **** }
-3523:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
-3524:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
-3525:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
-3526:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
-3527:Src/main.c **** }
-3528:Src/main.c **** static uint16_t MPhD_T(uint8_t num)
- ARM GAS /tmp/ccLSPxIe.s page 127
-
-
-3529:Src/main.c **** {
-3530:Src/main.c **** uint16_t P;
-3531:Src/main.c **** uint32_t tmp32;
-3532:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
-3533:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
-3534:Src/main.c **** tmp32=0;
-3535:Src/main.c **** while(tmp32<500){tmp32++;}
-3536:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
-3537:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
-3538:Src/main.c **** tmp32=0;
-3539:Src/main.c **** while(tmp32<500){tmp32++;}
-3540:Src/main.c **** if (num==1)//MPD1
-3541:Src/main.c **** {
-3542:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
-3543:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
-3544:Src/main.c **** tmp32=0;
-3545:Src/main.c **** while(tmp32<500){tmp32++;}
-3546:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-3547:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC
-3548:Src/main.c **** tmp32 = 0;
-3549:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3550:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
-3551:Src/main.c **** while(tmp32<500){tmp32++;}
-3552:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3553:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
-3554:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4);
-3555:Src/main.c **** }
-3556:Src/main.c **** else if (num==2)//MPD2
-3557:Src/main.c **** {
-3558:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
-3559:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
-3560:Src/main.c **** tmp32=0;
-3561:Src/main.c **** while(tmp32<500){tmp32++;}
-3562:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-3563:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC
-3564:Src/main.c **** tmp32 = 0;
-3565:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3566:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
-3567:Src/main.c **** while(tmp32<500){tmp32++;}
-3568:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3569:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
-3570:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5);
-3571:Src/main.c **** }
-3572:Src/main.c **** else if (num==3)//ThrLD1
-3573:Src/main.c **** {
-3574:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET);
-3575:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
-3576:Src/main.c **** tmp32=0;
-3577:Src/main.c **** while(tmp32<500){tmp32++;}
-3578:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-3579:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC
-3580:Src/main.c **** tmp32 = 0;
-3581:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3582:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
-3583:Src/main.c **** while(tmp32<500){tmp32++;}
-3584:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3585:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET);
- ARM GAS /tmp/ccLSPxIe.s page 128
-
-
-3586:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4);
-3587:Src/main.c **** }
-3588:Src/main.c **** else if (num==4)//ThrLD2
-3589:Src/main.c **** {
-3590:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);
-3591:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
-3592:Src/main.c **** tmp32=0;
-3593:Src/main.c **** while(tmp32<500){tmp32++;}
-3594:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
-3595:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC
-3596:Src/main.c **** tmp32 = 0;
-3597:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
-3598:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
-3599:Src/main.c **** while(tmp32<500){tmp32++;}
-3600:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
-3601:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET);
-3602:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5);
-3603:Src/main.c **** }
-3604:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm;
-3605:Src/main.c ****
-3606:Src/main.c **** Inorm = (float) (65535) / (float) (100);
-3607:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50);
-3608:Src/main.c **** Tnorm2 = 4;
-3609:Src/main.c **** Pnorm = (float)(65535) / (float)(20);
-3610:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system
-3611:Src/main.c **** T0m = 48.6282;
-3612:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2;
-3613:Src/main.c ****
-3614:Src/main.c **** Ith = I0m * expf(T_C/T0m);
-3615:Src/main.c **** I_LD = (float) (C_LD) / Inorm;
-3616:Src/main.c ****
-3617:Src/main.c **** if (I_LD > Ith)
-3618:Src/main.c **** {
-3619:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_
-3620:Src/main.c **** P = A * (I_LD - Ith) * Pnorm;
-3621:Src/main.c **** }
-3622:Src/main.c **** else
-3623:Src/main.c **** {
-3624:Src/main.c **** P = 0;
-3625:Src/main.c **** } */
-3626:Src/main.c **** return P;
-3627:Src/main.c **** }
-3628:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
-3629:Src/main.c **** {
-3630:Src/main.c **** uint16_t Result;
-3631:Src/main.c **** // uint8_t randf;
-3632:Src/main.c ****
-3633:Src/main.c **** randf = 0;
-3634:Src/main.c **** for (uint8_t i = 0; i < 32; i++)
-3635:Src/main.c **** {
-3636:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf;
-3637:Src/main.c **** }
-3638:Src/main.c ****
-3639:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl
-3640:Src/main.c ****
-3641:Src/main.c **** return (uint16_t)(Result);
-3642:Src/main.c **** }*/
- ARM GAS /tmp/ccLSPxIe.s page 129
-
-
-3643:Src/main.c **** static uint16_t Get_ADC(uint8_t num)
-3644:Src/main.c **** {
-3645:Src/main.c **** uint16_t OUT;
-3646:Src/main.c **** switch (num)
-3647:Src/main.c **** {
-3648:Src/main.c **** case 0:
-3649:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on
-3650:Src/main.c **** break;
-3651:Src/main.c **** case 1:
-3652:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion
-3653:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
-3654:Src/main.c **** break;
-3655:Src/main.c **** case 2:
-3656:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off
-3657:Src/main.c **** break;
-3658:Src/main.c **** case 3:
-3659:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on
-3660:Src/main.c **** break;
-3661:Src/main.c **** case 4:
-3662:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion
-3663:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
-3664:Src/main.c **** break;
-3665:Src/main.c **** case 5:
-3666:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off
-3667:Src/main.c **** break;
-3668:Src/main.c **** }
-3669:Src/main.c **** return OUT;
-3670:Src/main.c **** }
-3671:Src/main.c ****
-3672:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results
-3673:Src/main.c **** {
-3674:Src/main.c **** // Main idea:
-3675:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat
-3676:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept
-3677:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t
-3678:Src/main.c **** // So, equation should be look like this:
-3679:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c)
-3680:Src/main.c **** // t -- cycle phase
-3681:Src/main.c **** // a,b,c -- constants
-3682:Src/main.c **** //
-3683:Src/main.c **** // How can we control laser diode temperature?
-3684:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure.
-3685:Src/main.c **** // Then we should measure wavelength.
-3686:Src/main.c **** // Calibration sequence:
-3687:Src/main.c **** // 1) n
-3688:Src/main.c ****
-3689:Src/main.c ****
-3690:Src/main.c ****
-3691:Src/main.c **** int e_pid;
-3692:Src/main.c **** float P_coef_current;//, I_coef_current;
-3693:Src/main.c **** float e_integral;
-3694:Src/main.c **** int x_output;
-3695:Src/main.c ****
-3696:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
-3697:Src/main.c ****
-3698:Src/main.c **** e_integral = LDx_results->e_integral;
-3699:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 130
-
-
-3700:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){
-3701:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
-3702:Src/main.c **** }
-3703:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp;
-3704:Src/main.c ****
-3705:Src/main.c **** if (e_integral > 32000){
-3706:Src/main.c **** e_integral = 32000;
-3707:Src/main.c **** }
-3708:Src/main.c **** else if (e_integral < - 32000){
-3709:Src/main.c **** e_integral = -32000;
-3710:Src/main.c **** }
-3711:Src/main.c **** LDx_results->e_integral = e_integral;
-3712:Src/main.c ****
-3713:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
-3714:Src/main.c ****
-3715:Src/main.c **** if(x_output < 1000){
-3716:Src/main.c **** x_output = 8800;
-3717:Src/main.c **** }
-3718:Src/main.c **** else if(x_output > 56800){
-3719:Src/main.c **** x_output = 56800;
-3720:Src/main.c **** }
-3721:Src/main.c ****
-3722:Src/main.c **** if (num==2)
-3723:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
-3724:Src/main.c ****
-3725:Src/main.c **** return (uint16_t)x_output;
-3726:Src/main.c **** }
-3727:Src/main.c ****
-3728:Src/main.c ****
-3729:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin
-3730:Src/main.c **** {
- 754 .loc 1 3730 1 is_stmt 1 view -0
- 755 .cfi_startproc
- 756 @ args = 0, pretend = 0, frame = 0
- 757 @ frame_needed = 0, uses_anonymous_args = 0
- 758 @ link register save eliminated.
- 759 .loc 1 3730 1 is_stmt 0 view .LVU256
- 760 0000 30B4 push {r4, r5}
- 761 .LCFI6:
- 762 .cfi_def_cfa_offset 8
- 763 .cfi_offset 4, -8
- 764 .cfi_offset 5, -4
-3731:Src/main.c **** int e_pid;
- 765 .loc 1 3731 2 is_stmt 1 view .LVU257
-3732:Src/main.c **** float P_coef_current;//, I_coef_current;
- 766 .loc 1 3732 2 view .LVU258
-3733:Src/main.c **** float e_integral;
- 767 .loc 1 3733 2 view .LVU259
-3734:Src/main.c **** int x_output;
- 768 .loc 1 3734 2 view .LVU260
-3735:Src/main.c ****
-3736:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP;
- 769 .loc 1 3736 2 view .LVU261
- 770 .loc 1 3736 28 is_stmt 0 view .LVU262
- 771 0002 0B88 ldrh r3, [r1]
- 772 .loc 1 3736 65 view .LVU263
- 773 0004 0488 ldrh r4, [r0]
- ARM GAS /tmp/ccLSPxIe.s page 131
-
-
- 774 .loc 1 3736 8 view .LVU264
- 775 0006 1B1B subs r3, r3, r4
- 776 .LVL45:
-3737:Src/main.c ****
-3738:Src/main.c **** e_integral = LDx_results->e_integral;
- 777 .loc 1 3738 2 is_stmt 1 view .LVU265
- 778 .loc 1 3738 13 is_stmt 0 view .LVU266
- 779 0008 D1ED017A vldr.32 s15, [r1, #4]
- 780 .LVL46:
-3739:Src/main.c ****
-3740:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){
- 781 .loc 1 3740 2 is_stmt 1 view .LVU267
- 782 .loc 1 3740 20 is_stmt 0 view .LVU268
- 783 000c 03F6B73C addw ip, r3, #2999
- 784 .loc 1 3740 4 view .LVU269
- 785 0010 41F26E74 movw r4, #5998
- 786 0014 A445 cmp ip, r4
- 787 0016 18D8 bhi .L32
-3741:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 788 .loc 1 3741 3 is_stmt 1 view .LVU270
- 789 .loc 1 3741 31 is_stmt 0 view .LVU271
- 790 0018 90ED027A vldr.32 s14, [r0, #8]
- 791 .loc 1 3741 47 view .LVU272
- 792 001c 06EE903A vmov s13, r3 @ int
- 793 0020 F8EEE66A vcvt.f32.s32 s13, s13
- 794 .loc 1 3741 45 view .LVU273
- 795 0024 27EE267A vmul.f32 s14, s14, s13
- 796 .loc 1 3741 76 view .LVU274
- 797 0028 284C ldr r4, .L42
- 798 002a 2468 ldr r4, [r4]
- 799 002c 284D ldr r5, .L42+4
- 800 002e 2D68 ldr r5, [r5]
- 801 0030 641B subs r4, r4, r5
- 802 .loc 1 3741 64 view .LVU275
- 803 0032 06EE904A vmov s13, r4 @ int
- 804 0036 F8EE666A vcvt.f32.u32 s13, s13
- 805 .loc 1 3741 62 view .LVU276
- 806 003a 27EE267A vmul.f32 s14, s14, s13
- 807 .loc 1 3741 87 view .LVU277
- 808 003e 9FED256A vldr.32 s12, .L42+8
- 809 0042 C7EE066A vdiv.f32 s13, s14, s12
- 810 .loc 1 3741 14 view .LVU278
- 811 0046 77EEA67A vadd.f32 s15, s15, s13
- 812 .LVL47:
- 813 .L32:
-3742:Src/main.c **** }
-3743:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp;
- 814 .loc 1 3743 2 is_stmt 1 view .LVU279
- 815 .loc 1 3743 17 is_stmt 0 view .LVU280
- 816 004a D0ED016A vldr.32 s13, [r0, #4]
- 817 .LVL48:
-3744:Src/main.c ****
-3745:Src/main.c **** if (e_integral > 32000){
- 818 .loc 1 3745 2 is_stmt 1 view .LVU281
- 819 .loc 1 3745 5 is_stmt 0 view .LVU282
- 820 004e 9FED227A vldr.32 s14, .L42+12
- 821 0052 F4EEC77A vcmpe.f32 s15, s14
- ARM GAS /tmp/ccLSPxIe.s page 132
-
-
- 822 0056 F1EE10FA vmrs APSR_nzcv, FPSCR
- 823 005a 09DC bgt .L36
-3746:Src/main.c **** e_integral = 32000;
-3747:Src/main.c **** }
-3748:Src/main.c **** else if (e_integral < - 32000){
- 824 .loc 1 3748 7 is_stmt 1 view .LVU283
- 825 .loc 1 3748 10 is_stmt 0 view .LVU284
- 826 005c 9FED1F7A vldr.32 s14, .L42+16
- 827 0060 F4EEC77A vcmpe.f32 s15, s14
- 828 0064 F1EE10FA vmrs APSR_nzcv, FPSCR
- 829 0068 04D5 bpl .L33
-3749:Src/main.c **** e_integral = -32000;
- 830 .loc 1 3749 15 view .LVU285
- 831 006a DFED1C7A vldr.32 s15, .L42+16
- 832 .LVL49:
- 833 .loc 1 3749 15 view .LVU286
- 834 006e 01E0 b .L33
- 835 .LVL50:
- 836 .L36:
-3746:Src/main.c **** e_integral = 32000;
- 837 .loc 1 3746 15 view .LVU287
- 838 0070 DFED197A vldr.32 s15, .L42+12
- 839 .LVL51:
- 840 .L33:
-3750:Src/main.c **** }
-3751:Src/main.c **** LDx_results->e_integral = e_integral;
- 841 .loc 1 3751 2 is_stmt 1 view .LVU288
- 842 .loc 1 3751 26 is_stmt 0 view .LVU289
- 843 0074 C1ED017A vstr.32 s15, [r1, #4]
-3752:Src/main.c ****
-3753:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in
- 844 .loc 1 3753 2 is_stmt 1 view .LVU290
- 845 .loc 1 3753 36 is_stmt 0 view .LVU291
- 846 0078 07EE103A vmov s14, r3 @ int
- 847 007c B8EEC77A vcvt.f32.s32 s14, s14
- 848 0080 27EE267A vmul.f32 s14, s14, s13
- 849 .loc 1 3753 19 view .LVU292
- 850 0084 DFED166A vldr.32 s13, .L42+20
- 851 .LVL52:
- 852 .loc 1 3753 19 view .LVU293
- 853 0088 37EE267A vadd.f32 s14, s14, s13
- 854 .loc 1 3753 46 view .LVU294
- 855 008c FDEEE77A vcvt.s32.f32 s15, s15
- 856 .LVL53:
- 857 .loc 1 3753 44 view .LVU295
- 858 0090 F8EEE77A vcvt.f32.s32 s15, s15
- 859 0094 77EE877A vadd.f32 s15, s15, s14
- 860 .loc 1 3753 11 view .LVU296
- 861 0098 FDEEE77A vcvt.s32.f32 s15, s15
- 862 009c 17EE900A vmov r0, s15 @ int
- 863 .LVL54:
-3754:Src/main.c ****
-3755:Src/main.c **** if(x_output < 1000){
- 864 .loc 1 3755 2 is_stmt 1 view .LVU297
- 865 .loc 1 3755 4 is_stmt 0 view .LVU298
- 866 00a0 B0F57A7F cmp r0, #1000
- 867 00a4 06DB blt .L38
- ARM GAS /tmp/ccLSPxIe.s page 133
-
-
-3756:Src/main.c **** x_output = 8800;
-3757:Src/main.c **** }
-3758:Src/main.c **** else if(x_output > 56800){
- 868 .loc 1 3758 7 is_stmt 1 view .LVU299
- 869 .loc 1 3758 9 is_stmt 0 view .LVU300
- 870 00a6 4DF6E053 movw r3, #56800
- 871 .LVL55:
- 872 .loc 1 3758 9 view .LVU301
- 873 00aa 9842 cmp r0, r3
- 874 00ac 04DD ble .L34
-3759:Src/main.c **** x_output = 56800;
- 875 .loc 1 3759 12 view .LVU302
- 876 00ae 4DF6E050 movw r0, #56800
- 877 .LVL56:
- 878 .loc 1 3759 12 view .LVU303
- 879 00b2 01E0 b .L34
- 880 .LVL57:
- 881 .L38:
-3756:Src/main.c **** x_output = 8800;
- 882 .loc 1 3756 12 view .LVU304
- 883 00b4 42F26020 movw r0, #8800
- 884 .LVL58:
- 885 .L34:
-3760:Src/main.c **** }
-3761:Src/main.c ****
-3762:Src/main.c **** if (num==2)
- 886 .loc 1 3762 2 is_stmt 1 view .LVU305
- 887 .loc 1 3762 5 is_stmt 0 view .LVU306
- 888 00b8 022A cmp r2, #2
- 889 00ba 02D0 beq .L41
- 890 .LVL59:
- 891 .L35:
-3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
-3764:Src/main.c ****
-3765:Src/main.c **** return (uint16_t)x_output;
- 892 .loc 1 3765 2 is_stmt 1 view .LVU307
-3766:Src/main.c **** }
- 893 .loc 1 3766 1 is_stmt 0 view .LVU308
- 894 00bc 80B2 uxth r0, r0
- 895 .LVL60:
- 896 .loc 1 3766 1 view .LVU309
- 897 00be 30BC pop {r4, r5}
- 898 .LCFI7:
- 899 .cfi_remember_state
- 900 .cfi_restore 5
- 901 .cfi_restore 4
- 902 .cfi_def_cfa_offset 0
- 903 00c0 7047 bx lr
- 904 .LVL61:
- 905 .L41:
- 906 .LCFI8:
- 907 .cfi_restore_state
-3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
- 908 .loc 1 3763 3 is_stmt 1 view .LVU310
-3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
- 909 .loc 1 3763 11 is_stmt 0 view .LVU311
- 910 00c2 024B ldr r3, .L42
- ARM GAS /tmp/ccLSPxIe.s page 134
-
-
- 911 00c4 1A68 ldr r2, [r3]
- 912 .LVL62:
-3763:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
- 913 .loc 1 3763 11 view .LVU312
- 914 00c6 024B ldr r3, .L42+4
- 915 00c8 1A60 str r2, [r3]
- 916 00ca F7E7 b .L35
- 917 .L43:
- 918 .align 2
- 919 .L42:
- 920 00cc 00000000 .word TO7
- 921 00d0 00000000 .word TO7_PID
- 922 00d4 0000C842 .word 1120403456
- 923 00d8 0000FA46 .word 1190789120
- 924 00dc 0000FAC6 .word -956694528
- 925 00e0 00000047 .word 1191182336
- 926 .cfi_endproc
- 927 .LFE1239:
- 929 .section .text.AD9102_WriteReg,"ax",%progbits
- 930 .align 1
- 931 .syntax unified
- 932 .thumb
- 933 .thumb_func
- 935 AD9102_WriteReg:
- 936 .LVL63:
- 937 .LFB1219:
-2874:Src/main.c **** uint32_t tmp32 = 0;
- 938 .loc 1 2874 1 is_stmt 1 view -0
- 939 .cfi_startproc
- 940 @ args = 0, pretend = 0, frame = 0
- 941 @ frame_needed = 0, uses_anonymous_args = 0
-2874:Src/main.c **** uint32_t tmp32 = 0;
- 942 .loc 1 2874 1 is_stmt 0 view .LVU314
- 943 0000 38B5 push {r3, r4, r5, lr}
- 944 .LCFI9:
- 945 .cfi_def_cfa_offset 16
- 946 .cfi_offset 3, -16
- 947 .cfi_offset 4, -12
- 948 .cfi_offset 5, -8
- 949 .cfi_offset 14, -4
- 950 0002 0C46 mov r4, r1
-2875:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
- 951 .loc 1 2875 2 is_stmt 1 view .LVU315
- 952 .LVL64:
-2876:Src/main.c ****
- 953 .loc 1 2876 2 view .LVU316
-2876:Src/main.c ****
- 954 .loc 1 2876 11 is_stmt 0 view .LVU317
- 955 0004 C0F30E05 ubfx r5, r0, #0, #15
- 956 .LVL65:
-2878:Src/main.c ****
- 957 .loc 1 2878 2 is_stmt 1 view .LVU318
- 958 0008 0021 movs r1, #0
- 959 .LVL66:
-2878:Src/main.c ****
- 960 .loc 1 2878 2 is_stmt 0 view .LVU319
- 961 000a 0846 mov r0, r1
- ARM GAS /tmp/ccLSPxIe.s page 135
-
-
- 962 .LVL67:
-2878:Src/main.c ****
- 963 .loc 1 2878 2 view .LVU320
- 964 000c FFF7FEFF bl SPI2_SetMode
- 965 .LVL68:
-2880:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
- 966 .loc 1 2880 2 is_stmt 1 view .LVU321
- 967 0010 0122 movs r2, #1
- 968 0012 4FF48041 mov r1, #16384
- 969 0016 2C48 ldr r0, .L59
- 970 0018 FFF7FEFF bl HAL_GPIO_WritePin
- 971 .LVL69:
-2881:Src/main.c ****
- 972 .loc 1 2881 2 view .LVU322
- 973 001c 0122 movs r2, #1
- 974 001e 4FF48051 mov r1, #4096
- 975 0022 2A48 ldr r0, .L59+4
- 976 0024 FFF7FEFF bl HAL_GPIO_WritePin
- 977 .LVL70:
-2883:Src/main.c **** {
- 978 .loc 1 2883 2 view .LVU323
- 979 .LBB375:
- 980 .LBI375:
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 981 .loc 4 381 26 view .LVU324
- 982 .LBB376:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 983 .loc 4 383 3 view .LVU325
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 984 .loc 4 383 12 is_stmt 0 view .LVU326
- 985 0028 294B ldr r3, .L59+8
- 986 002a 1B68 ldr r3, [r3]
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 987 .loc 4 383 69 view .LVU327
- 988 002c 13F0400F tst r3, #64
- 989 0030 04D1 bne .L45
- 990 .LVL71:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 991 .loc 4 383 69 view .LVU328
- 992 .LBE376:
- 993 .LBE375:
-2885:Src/main.c **** }
- 994 .loc 1 2885 3 is_stmt 1 view .LVU329
- 995 .LBB377:
- 996 .LBI377:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 997 .loc 4 358 22 view .LVU330
- 998 .LBB378:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 999 .loc 4 360 3 view .LVU331
- 1000 0032 274A ldr r2, .L59+8
- 1001 0034 1368 ldr r3, [r2]
- 1002 0036 43F04003 orr r3, r3, #64
- 1003 003a 1360 str r3, [r2]
- 1004 .LVL72:
- 1005 .L45:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 136
-
-
- 1006 .loc 4 360 3 is_stmt 0 view .LVU332
- 1007 .LBE378:
- 1008 .LBE377:
-2888:Src/main.c ****
- 1009 .loc 1 2888 2 is_stmt 1 view .LVU333
- 1010 003c 0022 movs r2, #0
- 1011 003e 4FF48051 mov r1, #4096
- 1012 0042 2148 ldr r0, .L59
- 1013 0044 FFF7FEFF bl HAL_GPIO_WritePin
- 1014 .LVL73:
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1015 .loc 1 2890 2 view .LVU334
-2875:Src/main.c **** uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
- 1016 .loc 1 2875 11 is_stmt 0 view .LVU335
- 1017 0048 0023 movs r3, #0
- 1018 .LVL74:
- 1019 .L47:
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1020 .loc 1 2890 63 is_stmt 1 discriminator 2 view .LVU336
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1021 .loc 1 2890 41 discriminator 2 view .LVU337
- 1022 .LBB379:
- 1023 .LBI379:
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -8158,9 +6695,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetBaudRatePrescaler(SPI_TypeDef *SPIx, uint32_t BaudRate)
519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR1, SPI_CR1_BR, BaudRate);
- ARM GAS /tmp/ccLSPxIe.s page 137
-
-
521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -8184,6 +6718,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set transfer bit order
+ ARM GAS /tmp/ccDGOsZt.s page 113
+
+
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S
545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 LSBFIRST LL_SPI_SetTransferBitOrder
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
@@ -8218,9 +6755,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_SetTransferDirection\n
576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_SetTransferDirection
577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- ARM GAS /tmp/ccLSPxIe.s page 138
-
-
578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TransferDirection This parameter can be one of the following values:
579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_FULL_DUPLEX
580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX
@@ -8244,6 +6778,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX
599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_RX
600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_TX
+ ARM GAS /tmp/ccDGOsZt.s page 114
+
+
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTransferDirection(SPI_TypeDef *SPIx)
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
@@ -8278,9 +6815,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get frame data width
634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 DS LL_SPI_GetDataWidth
- ARM GAS /tmp/ccLSPxIe.s page 139
-
-
635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_4BIT
@@ -8304,6 +6838,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set threshold of RXFIFO that triggers an RXNE event
+ ARM GAS /tmp/ccDGOsZt.s page 115
+
+
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 FRXTH LL_SPI_SetRxFIFOThreshold
659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Threshold This parameter can be one of the following values:
@@ -8338,9 +6875,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 140
-
-
692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable CRC
693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCEN LL_SPI_EnableCRC
@@ -8364,6 +6898,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_CRCEN);
713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 116
+
+
715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if CRC is enabled
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation.
@@ -8398,9 +6935,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_8BIT
748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_CRC_16BIT
- ARM GAS /tmp/ccLSPxIe.s page 141
-
-
749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx)
751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
@@ -8424,6 +6958,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CRCPR CRCPOLY LL_SPI_SetCRCPolynomial
770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param CRCPoly This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFFFF
+ ARM GAS /tmp/ccDGOsZt.s page 117
+
+
772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetCRCPolynomial(SPI_TypeDef *SPIx, uint32_t CRCPoly)
@@ -8458,9 +6995,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll TXCRCR TXCRC LL_SPI_GetTxCRC
804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
- ARM GAS /tmp/ccLSPxIe.s page 142
-
-
806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx)
808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
@@ -8484,6 +7018,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param NSS This parameter can be one of the following values:
827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_SOFT
828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_HARD_INPUT
+ ARM GAS /tmp/ccDGOsZt.s page 118
+
+
829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_NSS_HARD_OUTPUT
830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
@@ -8518,9 +7055,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableNSSPulseMgt(SPI_TypeDef *SPIx)
- ARM GAS /tmp/ccLSPxIe.s page 143
-
-
863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_NSSP);
865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
@@ -8533,9058 +7067,1160 @@ ARM GAS /tmp/ccLSPxIe.s page 1
872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableNSSPulseMgt(SPI_TypeDef *SPIx)
+ 952 .loc 4 874 22 view .LVU323
+ 953 .LBB159:
875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_NSSP);
- 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if NSS pulse is enabled
- 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S
- 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 NSSP LL_SPI_IsEnabledNSSPulse
- 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledNSSPulse(SPI_TypeDef *SPIx)
- 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_NSSP) == (SPI_CR2_NSSP)) ? 1UL : 0UL);
- 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
- 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_FLAG_Management FLAG Management
- 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
- 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Rx buffer is not empty
- 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR RXNE LL_SPI_IsActiveFlag_RXNE
- 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_RXNE(SPI_TypeDef *SPIx)
- 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_RXNE) == (SPI_SR_RXNE)) ? 1UL : 0UL);
- 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer is empty
- 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR TXE LL_SPI_IsActiveFlag_TXE
- 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_TXE(SPI_TypeDef *SPIx)
- 1024 .loc 4 916 26 view .LVU338
- 1025 .LBB380:
- 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 144
-
-
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_TXE) == (SPI_SR_TXE)) ? 1UL : 0UL);
- 1026 .loc 4 918 3 view .LVU339
- 1027 .loc 4 918 12 is_stmt 0 view .LVU340
- 1028 004a 214A ldr r2, .L59+8
- 1029 004c 9268 ldr r2, [r2, #8]
- 1030 .loc 4 918 66 view .LVU341
- 1031 004e 12F0020F tst r2, #2
- 1032 0052 05D1 bne .L46
- 1033 .LVL75:
- 1034 .loc 4 918 66 view .LVU342
- 1035 .LBE380:
- 1036 .LBE379:
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1037 .loc 1 2890 50 discriminator 1 view .LVU343
- 1038 0054 5A1C adds r2, r3, #1
- 1039 .LVL76:
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1040 .loc 1 2890 41 discriminator 1 view .LVU344
- 1041 0056 B3F57A7F cmp r3, #1000
- 1042 005a 01D2 bcs .L46
-2890:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 1043 .loc 1 2890 50 discriminator 1 view .LVU345
- 1044 005c 1346 mov r3, r2
- 1045 005e F4E7 b .L47
- 1046 .LVL77:
- 1047 .L46:
-2891:Src/main.c **** tmp32 = 0;
- 1048 .loc 1 2891 2 is_stmt 1 view .LVU346
- 1049 .LBB381:
- 1050 .LBI381:
- 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get CRC error flag
- 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR CRCERR LL_SPI_IsActiveFlag_CRCERR
- 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_CRCERR(SPI_TypeDef *SPIx)
- 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_CRCERR) == (SPI_SR_CRCERR)) ? 1UL : 0UL);
- 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get mode fault error flag
- 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR MODF LL_SPI_IsActiveFlag_MODF
- 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_MODF(SPI_TypeDef *SPIx)
- 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_MODF) == (SPI_SR_MODF)) ? 1UL : 0UL);
- 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get overrun error flag
- 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR OVR LL_SPI_IsActiveFlag_OVR
- ARM GAS /tmp/ccLSPxIe.s page 145
-
-
- 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_OVR(SPI_TypeDef *SPIx)
- 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_OVR) == (SPI_SR_OVR)) ? 1UL : 0UL);
- 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get busy flag
- 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note The BSY flag is cleared under any one of the following conditions:
- 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -When the SPI is correctly disabled
- 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -When a fault is detected in Master mode (MODF bit set to 1)
- 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Master mode, when it finishes a data transmission and no new data is ready to be
- 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * sent
- 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between
- 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * each data transfer.
- 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR BSY LL_SPI_IsActiveFlag_BSY
- 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
- 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_BSY) == (SPI_SR_BSY)) ? 1UL : 0UL);
- 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get frame format error flag
- 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FRE LL_SPI_IsActiveFlag_FRE
- 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_FRE(SPI_TypeDef *SPIx)
- 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->SR, SPI_SR_FRE) == (SPI_SR_FRE)) ? 1UL : 0UL);
- 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get FIFO reception Level
- 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FRLVL LL_SPI_GetRxFIFOLevel
- 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
- 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
- 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_EMPTY
- 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_QUARTER_FULL
- 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_HALF_FULL
- 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_RX_FIFO_FULL
- 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxFIFOLevel(SPI_TypeDef *SPIx)
- 994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FRLVL));
- 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get FIFO Transmission Level
-1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FTLVL LL_SPI_GetTxFIFOLevel
-1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 146
-
-
-1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_EMPTY
-1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_QUARTER_FULL
-1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_HALF_FULL
-1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_TX_FIFO_FULL
-1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTxFIFOLevel(SPI_TypeDef *SPIx)
-1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->SR, SPI_SR_FTLVL));
-1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear CRC error flag
-1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR
-1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx)
-1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->SR, SPI_SR_CRCERR);
-1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear mode fault error flag
-1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by a read access to the SPIx_SR
-1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * register followed by a write access to the SPIx_CR1 register
-1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR MODF LL_SPI_ClearFlag_MODF
-1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_MODF(SPI_TypeDef *SPIx)
-1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint32_t tmpreg_sr;
-1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg_sr = SPIx->SR;
-1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg_sr;
-1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR1, SPI_CR1_SPE);
-1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear overrun error flag
-1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by a read access to the SPIx_DR
-1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * register followed by a read access to the SPIx_SR register
-1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR OVR LL_SPI_ClearFlag_OVR
-1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_OVR(SPI_TypeDef *SPIx)
-1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint32_t tmpreg;
-1051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg = SPIx->DR;
-1052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg;
-1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg = SPIx->SR;
-1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg;
-1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear frame format error flag
-1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note Clearing this flag is done by reading SPIx_SR register
- ARM GAS /tmp/ccLSPxIe.s page 147
-
-
-1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR FRE LL_SPI_ClearFlag_FRE
-1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_FRE(SPI_TypeDef *SPIx)
-1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint32_t tmpreg;
-1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** tmpreg = SPIx->SR;
-1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** (void) tmpreg;
-1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
-1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_IT_Management Interrupt Management
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable error interrupt
-1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR
-1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR
-1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_ERR(SPI_TypeDef *SPIx)
-1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_ERRIE);
-1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable Rx buffer not empty interrupt
-1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_EnableIT_RXNE
-1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_RXNE(SPI_TypeDef *SPIx)
-1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
-1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable Tx buffer empty interrupt
-1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_EnableIT_TXE
-1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableIT_TXE(SPI_TypeDef *SPIx)
-1109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXEIE);
-1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable error interrupt
-1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR
-1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_DisableIT_ERR
- ARM GAS /tmp/ccLSPxIe.s page 148
-
-
-1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_ERR(SPI_TypeDef *SPIx)
-1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_ERRIE);
-1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Rx buffer not empty interrupt
-1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE
-1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx)
-1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE);
-1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Tx buffer empty interrupt
-1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE
-1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_TXE(SPI_TypeDef *SPIx)
-1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_TXEIE);
-1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if error interrupt is enabled
-1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_IsEnabledIT_ERR
-1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
-1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_ERR(SPI_TypeDef *SPIx)
-1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_ERRIE) == (SPI_CR2_ERRIE)) ? 1UL : 0UL);
-1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Rx buffer not empty interrupt is enabled
-1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_IsEnabledIT_RXNE
-1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
-1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_RXNE(SPI_TypeDef *SPIx)
-1165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_RXNEIE) == (SPI_CR2_RXNEIE)) ? 1UL : 0UL);
-1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer empty interrupt
-1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_IsEnabledIT_TXE
-1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccLSPxIe.s page 149
-
-
-1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledIT_TXE(SPI_TypeDef *SPIx)
-1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXEIE) == (SPI_CR2_TXEIE)) ? 1UL : 0UL);
-1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
-1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_DMA_Management DMA Management
-1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
-1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable DMA Rx
-1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX
-1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
-1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
-1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable DMA Rx
-1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_DisableDMAReq_RX
-1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableDMAReq_RX(SPI_TypeDef *SPIx)
-1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
-1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if DMA Rx is enabled
-1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_IsEnabledDMAReq_RX
-1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
-1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_RX(SPI_TypeDef *SPIx)
-1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_RXDMAEN) == (SPI_CR2_RXDMAEN)) ? 1UL : 0UL);
-1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable DMA Tx
-1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXDMAEN LL_SPI_EnableDMAReq_TX
-1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_TX(SPI_TypeDef *SPIx)
-1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
-1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 150
-
-
-1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable DMA Tx
-1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXDMAEN LL_SPI_DisableDMAReq_TX
-1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableDMAReq_TX(SPI_TypeDef *SPIx)
-1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN);
-1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if DMA Tx is enabled
-1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX
-1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
-1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsEnabledDMAReq_TX(SPI_TypeDef *SPIx)
-1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);
-1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA reception
-1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMARX LL_SPI_SetDMAParity_RX
-1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values:
-1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD
-1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN
-1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetDMAParity_RX(SPI_TypeDef *SPIx, uint32_t Parity)
-1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_LDMARX, (Parity << SPI_CR2_LDMARX_Pos));
-1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get parity configuration for Last DMA reception
-1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMARX LL_SPI_GetDMAParity_RX
-1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
-1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD
-1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN
-1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_RX(SPI_TypeDef *SPIx)
-1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMARX) >> SPI_CR2_LDMARX_Pos);
-1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set parity of Last DMA transmission
-1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMATX LL_SPI_SetDMAParity_TX
-1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Parity This parameter can be one of the following values:
-1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD
-1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN
- ARM GAS /tmp/ccLSPxIe.s page 151
-
-
-1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetDMAParity_TX(SPI_TypeDef *SPIx, uint32_t Parity)
-1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** MODIFY_REG(SPIx->CR2, SPI_CR2_LDMATX, (Parity << SPI_CR2_LDMATX_Pos));
-1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get parity configuration for Last DMA transmission
-1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMATX LL_SPI_GetDMAParity_TX
-1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values:
-1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD
-1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN
-1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx)
-1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR2, SPI_CR2_LDMATX) >> SPI_CR2_LDMATX_Pos);
-1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get the data register address used for DMA transfer
-1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_DMA_GetRegAddr
-1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Address of data register
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_DMA_GetRegAddr(SPI_TypeDef *SPIx)
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t) &(SPIx->DR);
-1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
-1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_DATA_Management DATA Management
-1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
-1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read 8-Bits in the data register
-1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_ReceiveData8
-1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFF
-1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint8_t LL_SPI_ReceiveData8(SPI_TypeDef *SPIx)
-1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (*((__IO uint8_t *)&SPIx->DR));
-1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Read 16-Bits in the data register
-1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_ReceiveData16
-1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval RxData Value between Min_Data=0x00 and Max_Data=0xFFFF
-1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint16_t LL_SPI_ReceiveData16(SPI_TypeDef *SPIx)
- ARM GAS /tmp/ccLSPxIe.s page 152
-
-
-1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint16_t)(READ_REG(SPIx->DR));
-1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 8-Bits in the data register
-1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData8
-1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFF
-1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData)
-1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__)
-1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint8_t *spidr = ((__IO uint8_t *)&SPIx->DR);
-1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
-1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #else
-1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *((__IO uint8_t *)&SPIx->DR) = TxData;
-1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #endif /* __GNUC__ */
-1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
-1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
-1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
-1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register
-1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_TransmitData16
-1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
-1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param TxData Value between Min_Data=0x00 and Max_Data=0xFFFF
-1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
-1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData16(SPI_TypeDef *SPIx, uint16_t TxData)
- 1051 .loc 4 1373 22 view .LVU347
- 1052 .LBB382:
-1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
-1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__)
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint16_t *spidr = ((__IO uint16_t *)&SPIx->DR);
- 1053 .loc 4 1376 3 view .LVU348
-1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 1054 .loc 4 1377 3 view .LVU349
- 1055 .loc 4 1377 10 is_stmt 0 view .LVU350
- 1056 0060 1B4B ldr r3, .L59+8
- 1057 0062 9D81 strh r5, [r3, #12] @ movhi
- 1058 .LVL78:
- 1059 .loc 4 1377 10 view .LVU351
- 1060 .LBE382:
- 1061 .LBE381:
-2892:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1062 .loc 1 2892 2 is_stmt 1 view .LVU352
-2893:Src/main.c **** (void) SPI2->DR;
- 1063 .loc 1 2893 2 view .LVU353
-2892:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1064 .loc 1 2892 8 is_stmt 0 view .LVU354
- 1065 0064 0023 movs r3, #0
- 1066 .LVL79:
- 1067 .L49:
-2893:Src/main.c **** (void) SPI2->DR;
- 1068 .loc 1 2893 64 is_stmt 1 discriminator 2 view .LVU355
-2893:Src/main.c **** (void) SPI2->DR;
- 1069 .loc 1 2893 42 discriminator 2 view .LVU356
- ARM GAS /tmp/ccLSPxIe.s page 153
-
-
- 1070 .LBB383:
- 1071 .LBI383:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1072 .loc 4 905 26 view .LVU357
- 1073 .LBB384:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1074 .loc 4 907 3 view .LVU358
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1075 .loc 4 907 12 is_stmt 0 view .LVU359
- 1076 0066 1A4A ldr r2, .L59+8
- 1077 0068 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1078 .loc 4 907 68 view .LVU360
- 1079 006a 12F0010F tst r2, #1
- 1080 006e 05D1 bne .L48
- 1081 .LVL80:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1082 .loc 4 907 68 view .LVU361
- 1083 .LBE384:
- 1084 .LBE383:
-2893:Src/main.c **** (void) SPI2->DR;
- 1085 .loc 1 2893 51 discriminator 1 view .LVU362
- 1086 0070 5A1C adds r2, r3, #1
- 1087 .LVL81:
-2893:Src/main.c **** (void) SPI2->DR;
- 1088 .loc 1 2893 42 discriminator 1 view .LVU363
- 1089 0072 B3F57A7F cmp r3, #1000
- 1090 0076 01D2 bcs .L48
-2893:Src/main.c **** (void) SPI2->DR;
- 1091 .loc 1 2893 51 discriminator 1 view .LVU364
- 1092 0078 1346 mov r3, r2
- 1093 007a F4E7 b .L49
- 1094 .LVL82:
- 1095 .L48:
-2894:Src/main.c ****
- 1096 .loc 1 2894 2 is_stmt 1 view .LVU365
- 1097 007c 144B ldr r3, .L59+8
- 1098 007e DB68 ldr r3, [r3, #12]
-2896:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 1099 .loc 1 2896 2 view .LVU366
- 1100 .LVL83:
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1101 .loc 1 2897 2 view .LVU367
-2896:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 1102 .loc 1 2896 8 is_stmt 0 view .LVU368
- 1103 0080 0023 movs r3, #0
- 1104 .LVL84:
- 1105 .L51:
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1106 .loc 1 2897 63 is_stmt 1 discriminator 2 view .LVU369
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1107 .loc 1 2897 41 discriminator 2 view .LVU370
- 1108 .LBB385:
- 1109 .LBI385:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1110 .loc 4 916 26 view .LVU371
- 1111 .LBB386:
- ARM GAS /tmp/ccLSPxIe.s page 154
-
-
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1112 .loc 4 918 3 view .LVU372
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1113 .loc 4 918 12 is_stmt 0 view .LVU373
- 1114 0082 134A ldr r2, .L59+8
- 1115 0084 9268 ldr r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1116 .loc 4 918 66 view .LVU374
- 1117 0086 12F0020F tst r2, #2
- 1118 008a 05D1 bne .L50
- 1119 .LVL85:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1120 .loc 4 918 66 view .LVU375
- 1121 .LBE386:
- 1122 .LBE385:
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1123 .loc 1 2897 50 discriminator 1 view .LVU376
- 1124 008c 5A1C adds r2, r3, #1
- 1125 .LVL86:
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1126 .loc 1 2897 41 discriminator 1 view .LVU377
- 1127 008e B3F57A7F cmp r3, #1000
- 1128 0092 01D2 bcs .L50
-2897:Src/main.c **** LL_SPI_TransmitData16(SPI2, value);
- 1129 .loc 1 2897 50 discriminator 1 view .LVU378
- 1130 0094 1346 mov r3, r2
- 1131 0096 F4E7 b .L51
- 1132 .LVL87:
- 1133 .L50:
-2898:Src/main.c **** tmp32 = 0;
- 1134 .loc 1 2898 2 is_stmt 1 view .LVU379
- 1135 .LBB387:
- 1136 .LBI387:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1137 .loc 4 1373 22 view .LVU380
- 1138 .LBB388:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 1139 .loc 4 1376 3 view .LVU381
- 1140 .loc 4 1377 3 view .LVU382
- 1141 .loc 4 1377 10 is_stmt 0 view .LVU383
- 1142 0098 0D4B ldr r3, .L59+8
- 1143 009a 9C81 strh r4, [r3, #12] @ movhi
- 1144 .LVL88:
- 1145 .loc 4 1377 10 view .LVU384
- 1146 .LBE388:
- 1147 .LBE387:
-2899:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1148 .loc 1 2899 2 is_stmt 1 view .LVU385
-2900:Src/main.c **** (void) SPI2->DR;
- 1149 .loc 1 2900 2 view .LVU386
-2899:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 1150 .loc 1 2899 8 is_stmt 0 view .LVU387
- 1151 009c 0023 movs r3, #0
- 1152 .LVL89:
- 1153 .L53:
-2900:Src/main.c **** (void) SPI2->DR;
- 1154 .loc 1 2900 64 is_stmt 1 discriminator 2 view .LVU388
- ARM GAS /tmp/ccLSPxIe.s page 155
-
-
-2900:Src/main.c **** (void) SPI2->DR;
- 1155 .loc 1 2900 42 discriminator 2 view .LVU389
- 1156 .LBB389:
- 1157 .LBI389:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 1158 .loc 4 905 26 view .LVU390
- 1159 .LBB390:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1160 .loc 4 907 3 view .LVU391
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1161 .loc 4 907 12 is_stmt 0 view .LVU392
- 1162 009e 0C4A ldr r2, .L59+8
- 1163 00a0 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1164 .loc 4 907 68 view .LVU393
- 1165 00a2 12F0010F tst r2, #1
- 1166 00a6 05D1 bne .L52
- 1167 .LVL90:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 1168 .loc 4 907 68 view .LVU394
- 1169 .LBE390:
- 1170 .LBE389:
-2900:Src/main.c **** (void) SPI2->DR;
- 1171 .loc 1 2900 51 discriminator 1 view .LVU395
- 1172 00a8 5A1C adds r2, r3, #1
- 1173 .LVL91:
-2900:Src/main.c **** (void) SPI2->DR;
- 1174 .loc 1 2900 42 discriminator 1 view .LVU396
- 1175 00aa B3F57A7F cmp r3, #1000
- 1176 00ae 01D2 bcs .L52
-2900:Src/main.c **** (void) SPI2->DR;
- 1177 .loc 1 2900 51 discriminator 1 view .LVU397
- 1178 00b0 1346 mov r3, r2
- 1179 00b2 F4E7 b .L53
- 1180 .LVL92:
- 1181 .L52:
-2901:Src/main.c ****
- 1182 .loc 1 2901 2 is_stmt 1 view .LVU398
- 1183 00b4 064B ldr r3, .L59+8
- 1184 00b6 DB68 ldr r3, [r3, #12]
-2903:Src/main.c **** }
- 1185 .loc 1 2903 2 view .LVU399
- 1186 00b8 0122 movs r2, #1
- 1187 00ba 4FF48051 mov r1, #4096
- 1188 00be 0248 ldr r0, .L59
- 1189 00c0 FFF7FEFF bl HAL_GPIO_WritePin
- 1190 .LVL93:
-2904:Src/main.c ****
- 1191 .loc 1 2904 1 is_stmt 0 view .LVU400
- 1192 00c4 38BD pop {r3, r4, r5, pc}
- 1193 .LVL94:
- 1194 .L60:
-2904:Src/main.c ****
- 1195 .loc 1 2904 1 view .LVU401
- 1196 00c6 00BF .align 2
- 1197 .L59:
- 1198 00c8 00040240 .word 1073873920
- ARM GAS /tmp/ccLSPxIe.s page 156
-
-
- 1199 00cc 000C0240 .word 1073875968
- 1200 00d0 00380040 .word 1073756160
- 1201 .cfi_endproc
- 1202 .LFE1219:
- 1204 .section .text.AD9102_WriteRegTable,"ax",%progbits
- 1205 .align 1
- 1206 .syntax unified
- 1207 .thumb
- 1208 .thumb_func
- 1210 AD9102_WriteRegTable:
- 1211 .LVL95:
- 1212 .LFB1221:
-2942:Src/main.c **** for (uint16_t i = 0; i < count; i++)
- 1213 .loc 1 2942 1 is_stmt 1 view -0
- 1214 .cfi_startproc
- 1215 @ args = 0, pretend = 0, frame = 0
- 1216 @ frame_needed = 0, uses_anonymous_args = 0
-2942:Src/main.c **** for (uint16_t i = 0; i < count; i++)
- 1217 .loc 1 2942 1 is_stmt 0 view .LVU403
- 1218 0000 70B5 push {r4, r5, r6, lr}
- 1219 .LCFI10:
- 1220 .cfi_def_cfa_offset 16
- 1221 .cfi_offset 4, -16
- 1222 .cfi_offset 5, -12
- 1223 .cfi_offset 6, -8
- 1224 .cfi_offset 14, -4
- 1225 0002 0646 mov r6, r0
- 1226 0004 0D46 mov r5, r1
-2943:Src/main.c **** {
- 1227 .loc 1 2943 2 is_stmt 1 view .LVU404
- 1228 .LBB391:
-2943:Src/main.c **** {
- 1229 .loc 1 2943 7 view .LVU405
- 1230 .LVL96:
-2943:Src/main.c **** {
- 1231 .loc 1 2943 16 is_stmt 0 view .LVU406
- 1232 0006 0024 movs r4, #0
-2943:Src/main.c **** {
- 1233 .loc 1 2943 2 view .LVU407
- 1234 0008 08E0 b .L62
- 1235 .LVL97:
- 1236 .L63:
-2945:Src/main.c **** }
- 1237 .loc 1 2945 3 is_stmt 1 view .LVU408
- 1238 000a 36F81410 ldrh r1, [r6, r4, lsl #1]
- 1239 000e 054B ldr r3, .L65
- 1240 0010 33F81400 ldrh r0, [r3, r4, lsl #1]
- 1241 0014 FFF7FEFF bl AD9102_WriteReg
- 1242 .LVL98:
-2943:Src/main.c **** {
- 1243 .loc 1 2943 35 discriminator 3 view .LVU409
- 1244 0018 0134 adds r4, r4, #1
- 1245 .LVL99:
-2943:Src/main.c **** {
- 1246 .loc 1 2943 35 is_stmt 0 discriminator 3 view .LVU410
- 1247 001a A4B2 uxth r4, r4
- 1248 .LVL100:
- ARM GAS /tmp/ccLSPxIe.s page 157
-
-
- 1249 .L62:
-2943:Src/main.c **** {
- 1250 .loc 1 2943 25 is_stmt 1 discriminator 1 view .LVU411
- 1251 001c AC42 cmp r4, r5
- 1252 001e F4D3 bcc .L63
- 1253 .LBE391:
-2947:Src/main.c ****
- 1254 .loc 1 2947 1 is_stmt 0 view .LVU412
- 1255 0020 70BD pop {r4, r5, r6, pc}
- 1256 .LVL101:
- 1257 .L66:
-2947:Src/main.c ****
- 1258 .loc 1 2947 1 view .LVU413
- 1259 0022 00BF .align 2
- 1260 .L65:
- 1261 0024 00000000 .word ad9102_reg_addr
- 1262 .cfi_endproc
- 1263 .LFE1221:
- 1265 .section .text.AD9102_LoadSramRamp,"ax",%progbits
- 1266 .align 1
- 1267 .syntax unified
- 1268 .thumb
- 1269 .thumb_func
- 1271 AD9102_LoadSramRamp:
- 1272 .LVL102:
- 1273 .LFB1231:
-3155:Src/main.c **** if (samples < 2u)
- 1274 .loc 1 3155 1 is_stmt 1 view -0
- 1275 .cfi_startproc
- 1276 @ args = 0, pretend = 0, frame = 0
- 1277 @ frame_needed = 0, uses_anonymous_args = 0
-3155:Src/main.c **** if (samples < 2u)
- 1278 .loc 1 3155 1 is_stmt 0 view .LVU415
- 1279 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 1280 .LCFI11:
- 1281 .cfi_def_cfa_offset 24
- 1282 .cfi_offset 3, -24
- 1283 .cfi_offset 4, -20
- 1284 .cfi_offset 5, -16
- 1285 .cfi_offset 6, -12
- 1286 .cfi_offset 7, -8
- 1287 .cfi_offset 14, -4
- 1288 0002 0F46 mov r7, r1
- 1289 0004 1646 mov r6, r2
-3156:Src/main.c **** {
- 1290 .loc 1 3156 2 is_stmt 1 view .LVU416
-3156:Src/main.c **** {
- 1291 .loc 1 3156 5 is_stmt 0 view .LVU417
- 1292 0006 0128 cmp r0, #1
- 1293 0008 06D9 bls .L81
- 1294 000a 0546 mov r5, r0
-3160:Src/main.c **** {
- 1295 .loc 1 3160 2 is_stmt 1 view .LVU418
-3160:Src/main.c **** {
- 1296 .loc 1 3160 5 is_stmt 0 view .LVU419
- 1297 000c B0F5805F cmp r0, #4096
- 1298 0010 03D9 bls .L68
- ARM GAS /tmp/ccLSPxIe.s page 158
-
-
-3162:Src/main.c **** }
- 1299 .loc 1 3162 11 view .LVU420
- 1300 0012 4FF48055 mov r5, #4096
- 1301 0016 00E0 b .L68
- 1302 .L81:
-3158:Src/main.c **** }
- 1303 .loc 1 3158 11 view .LVU421
- 1304 0018 0225 movs r5, #2
- 1305 .L68:
- 1306 .LVL103:
-3164:Src/main.c **** {
- 1307 .loc 1 3164 2 is_stmt 1 view .LVU422
-3164:Src/main.c **** {
- 1308 .loc 1 3164 5 is_stmt 0 view .LVU423
- 1309 001a B6F5005F cmp r6, #8192
- 1310 001e 01D3 bcc .L69
-3166:Src/main.c **** }
- 1311 .loc 1 3166 13 view .LVU424
- 1312 0020 41F6FF76 movw r6, #8191
- 1313 .L69:
- 1314 .LVL104:
-3170:Src/main.c ****
- 1315 .loc 1 3170 2 is_stmt 1 view .LVU425
- 1316 0024 0421 movs r1, #4
- 1317 .LVL105:
-3170:Src/main.c ****
- 1318 .loc 1 3170 2 is_stmt 0 view .LVU426
- 1319 0026 1E20 movs r0, #30
- 1320 0028 FFF7FEFF bl AD9102_WriteReg
- 1321 .LVL106:
-3172:Src/main.c **** {
- 1322 .loc 1 3172 2 is_stmt 1 view .LVU427
- 1323 .LBB392:
-3172:Src/main.c **** {
- 1324 .loc 1 3172 7 view .LVU428
-3172:Src/main.c **** {
- 1325 .loc 1 3172 16 is_stmt 0 view .LVU429
- 1326 002c 0024 movs r4, #0
-3172:Src/main.c **** {
- 1327 .loc 1 3172 2 view .LVU430
- 1328 002e 2DE0 b .L70
- 1329 .LVL107:
- 1330 .L92:
- 1331 .LBB393:
- 1332 .LBB394:
-3183:Src/main.c **** }
- 1333 .loc 1 3183 10 view .LVU431
- 1334 0030 0122 movs r2, #1
- 1335 .LVL108:
-3183:Src/main.c **** }
- 1336 .loc 1 3183 10 view .LVU432
- 1337 0032 34E0 b .L72
- 1338 .LVL109:
- 1339 .L85:
- 1340 .LBB395:
-3187:Src/main.c **** if (span == 0)
- 1341 .loc 1 3187 14 discriminator 2 view .LVU433
- ARM GAS /tmp/ccLSPxIe.s page 159
-
-
- 1342 0034 0122 movs r2, #1
- 1343 .LVL110:
-3187:Src/main.c **** if (span == 0)
- 1344 .loc 1 3187 14 discriminator 2 view .LVU434
- 1345 0036 38E0 b .L74
- 1346 .LVL111:
- 1347 .L73:
-3187:Src/main.c **** if (span == 0)
- 1348 .loc 1 3187 14 discriminator 2 view .LVU435
- 1349 .LBE395:
- 1350 .LBB396:
-3199:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
- 1351 .loc 1 3199 5 is_stmt 1 view .LVU436
-3199:Src/main.c **** uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
- 1352 .loc 1 3199 14 is_stmt 0 view .LVU437
- 1353 0038 A91A subs r1, r5, r2
- 1354 003a 89B2 uxth r1, r1
- 1355 .LVL112:
-3200:Src/main.c **** if (span == 0)
- 1356 .loc 1 3200 5 is_stmt 1 view .LVU438
-3200:Src/main.c **** if (span == 0)
- 1357 .loc 1 3200 14 is_stmt 0 view .LVU439
- 1358 003c 0129 cmp r1, #1
- 1359 003e 09D9 bls .L86
-3200:Src/main.c **** if (span == 0)
- 1360 .loc 1 3200 14 discriminator 1 view .LVU440
- 1361 0040 0139 subs r1, r1, #1
- 1362 .LVL113:
-3200:Src/main.c **** if (span == 0)
- 1363 .loc 1 3200 14 discriminator 1 view .LVU441
- 1364 0042 89B2 uxth r1, r1
- 1365 .LVL114:
- 1366 .L77:
-3201:Src/main.c **** {
- 1367 .loc 1 3201 5 is_stmt 1 view .LVU442
-3201:Src/main.c **** {
- 1368 .loc 1 3201 8 is_stmt 0 view .LVU443
- 1369 0044 ABB1 cbz r3, .L75
-3207:Src/main.c **** }
- 1370 .loc 1 3207 6 is_stmt 1 view .LVU444
-3207:Src/main.c **** }
- 1371 .loc 1 3207 44 is_stmt 0 view .LVU445
- 1372 0046 A21A subs r2, r4, r2
- 1373 .LVL115:
-3207:Src/main.c **** }
- 1374 .loc 1 3207 30 view .LVU446
- 1375 0048 03FB02F2 mul r2, r3, r2
-3207:Src/main.c **** }
- 1376 .loc 1 3207 53 view .LVU447
- 1377 004c 92FBF1F2 sdiv r2, r2, r1
-3207:Src/main.c **** }
- 1378 .loc 1 3207 12 view .LVU448
- 1379 0050 831A subs r3, r0, r2
- 1380 .LVL116:
-3207:Src/main.c **** }
- 1381 .loc 1 3207 12 view .LVU449
- 1382 0052 0BE0 b .L76
- ARM GAS /tmp/ccLSPxIe.s page 160
-
-
- 1383 .LVL117:
- 1384 .L86:
-3200:Src/main.c **** if (span == 0)
- 1385 .loc 1 3200 14 discriminator 2 view .LVU450
- 1386 0054 0121 movs r1, #1
- 1387 .LVL118:
-3200:Src/main.c **** if (span == 0)
- 1388 .loc 1 3200 14 discriminator 2 view .LVU451
- 1389 0056 F5E7 b .L77
- 1390 .LVL119:
- 1391 .L71:
-3200:Src/main.c **** if (span == 0)
- 1392 .loc 1 3200 14 discriminator 2 view .LVU452
- 1393 .LBE396:
- 1394 .LBE394:
- 1395 .LBB398:
-3213:Src/main.c **** if (span == 0)
- 1396 .loc 1 3213 4 is_stmt 1 view .LVU453
-3213:Src/main.c **** if (span == 0)
- 1397 .loc 1 3213 13 is_stmt 0 view .LVU454
- 1398 0058 012D cmp r5, #1
- 1399 005a 2ED9 bls .L87
-3213:Src/main.c **** if (span == 0)
- 1400 .loc 1 3213 13 discriminator 1 view .LVU455
- 1401 005c 6A1E subs r2, r5, #1
- 1402 005e 92B2 uxth r2, r2
- 1403 .L78:
- 1404 .LVL120:
-3214:Src/main.c **** {
- 1405 .loc 1 3214 4 is_stmt 1 view .LVU456
-3214:Src/main.c **** {
- 1406 .loc 1 3214 7 is_stmt 0 view .LVU457
- 1407 0060 3BB1 cbz r3, .L75
-3220:Src/main.c **** }
- 1408 .loc 1 3220 5 is_stmt 1 view .LVU458
-3220:Src/main.c **** }
- 1409 .loc 1 3220 29 is_stmt 0 view .LVU459
- 1410 0062 04FB03F3 mul r3, r4, r3
- 1411 .LVL121:
-3220:Src/main.c **** }
- 1412 .loc 1 3220 43 view .LVU460
- 1413 0066 93FBF2F3 sdiv r3, r3, r2
- 1414 006a 1B1A subs r3, r3, r0
- 1415 .LVL122:
- 1416 .L76:
-3220:Src/main.c **** }
- 1417 .loc 1 3220 43 view .LVU461
- 1418 .LBE398:
-3224:Src/main.c **** {
- 1419 .loc 1 3224 3 is_stmt 1 view .LVU462
-3224:Src/main.c **** {
- 1420 .loc 1 3224 6 is_stmt 0 view .LVU463
- 1421 006c 13F5005F cmn r3, #8192
- 1422 0070 25DB blt .L88
- 1423 .LVL123:
- 1424 .L75:
-3228:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 161
-
-
- 1425 .loc 1 3228 8 is_stmt 1 view .LVU464
-3228:Src/main.c **** {
- 1426 .loc 1 3228 11 is_stmt 0 view .LVU465
- 1427 0072 B3F5005F cmp r3, #8192
- 1428 0076 24DA bge .L89
- 1429 .L79:
- 1430 .LVL124:
-3233:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2);
- 1431 .loc 1 3233 3 is_stmt 1 view .LVU466
-3233:Src/main.c **** uint16_t word = (uint16_t)(sample_u14 << 2);
- 1432 .loc 1 3233 25 is_stmt 0 view .LVU467
- 1433 0078 99B2 uxth r1, r3
- 1434 .LVL125:
-3234:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + i), word);
- 1435 .loc 1 3234 3 is_stmt 1 view .LVU468
-3235:Src/main.c **** }
- 1436 .loc 1 3235 3 view .LVU469
- 1437 007a 8900 lsls r1, r1, #2
- 1438 .LVL126:
-3235:Src/main.c **** }
- 1439 .loc 1 3235 3 is_stmt 0 view .LVU470
- 1440 007c 89B2 uxth r1, r1
- 1441 007e 04F5C040 add r0, r4, #24576
- 1442 .LVL127:
-3235:Src/main.c **** }
- 1443 .loc 1 3235 3 view .LVU471
- 1444 0082 80B2 uxth r0, r0
- 1445 0084 FFF7FEFF bl AD9102_WriteReg
- 1446 .LVL128:
-3235:Src/main.c **** }
- 1447 .loc 1 3235 3 view .LVU472
- 1448 .LBE393:
-3172:Src/main.c **** {
- 1449 .loc 1 3172 37 is_stmt 1 discriminator 2 view .LVU473
- 1450 0088 0134 adds r4, r4, #1
- 1451 .LVL129:
-3172:Src/main.c **** {
- 1452 .loc 1 3172 37 is_stmt 0 discriminator 2 view .LVU474
- 1453 008a A4B2 uxth r4, r4
- 1454 .LVL130:
- 1455 .L70:
-3172:Src/main.c **** {
- 1456 .loc 1 3172 25 is_stmt 1 discriminator 1 view .LVU475
- 1457 008c A542 cmp r5, r4
- 1458 008e 1BD9 bls .L91
- 1459 .LBB401:
-3174:Src/main.c **** int32_t min_val = -(int32_t)amplitude;
- 1460 .loc 1 3174 3 view .LVU476
-3175:Src/main.c **** int32_t max_val = (int32_t)amplitude;
- 1461 .loc 1 3175 3 view .LVU477
-3175:Src/main.c **** int32_t max_val = (int32_t)amplitude;
- 1462 .loc 1 3175 22 is_stmt 0 view .LVU478
- 1463 0090 3046 mov r0, r6
- 1464 .LVL131:
-3176:Src/main.c **** int32_t span = max_val - min_val;
- 1465 .loc 1 3176 3 is_stmt 1 view .LVU479
-3177:Src/main.c **** if (triangle)
- ARM GAS /tmp/ccLSPxIe.s page 162
-
-
- 1466 .loc 1 3177 3 view .LVU480
-3177:Src/main.c **** if (triangle)
- 1467 .loc 1 3177 11 is_stmt 0 view .LVU481
- 1468 0092 7300 lsls r3, r6, #1
- 1469 .LVL132:
-3178:Src/main.c **** {
- 1470 .loc 1 3178 3 is_stmt 1 view .LVU482
-3178:Src/main.c **** {
- 1471 .loc 1 3178 6 is_stmt 0 view .LVU483
- 1472 0094 002F cmp r7, #0
- 1473 0096 DFD0 beq .L71
- 1474 .LBB399:
-3180:Src/main.c **** if (half == 0u)
- 1475 .loc 1 3180 4 is_stmt 1 view .LVU484
-3180:Src/main.c **** if (half == 0u)
- 1476 .loc 1 3180 13 is_stmt 0 view .LVU485
- 1477 0098 6A08 lsrs r2, r5, #1
- 1478 .LVL133:
-3181:Src/main.c **** {
- 1479 .loc 1 3181 4 is_stmt 1 view .LVU486
-3181:Src/main.c **** {
- 1480 .loc 1 3181 7 is_stmt 0 view .LVU487
- 1481 009a 012D cmp r5, #1
- 1482 009c C8D9 bls .L92
- 1483 .LVL134:
- 1484 .L72:
-3185:Src/main.c **** {
- 1485 .loc 1 3185 4 is_stmt 1 view .LVU488
-3185:Src/main.c **** {
- 1486 .loc 1 3185 7 is_stmt 0 view .LVU489
- 1487 009e 9442 cmp r4, r2
- 1488 00a0 CAD2 bcs .L73
- 1489 .LBB397:
-3187:Src/main.c **** if (span == 0)
- 1490 .loc 1 3187 5 is_stmt 1 view .LVU490
-3187:Src/main.c **** if (span == 0)
- 1491 .loc 1 3187 14 is_stmt 0 view .LVU491
- 1492 00a2 012A cmp r2, #1
- 1493 00a4 C6D9 bls .L85
-3187:Src/main.c **** if (span == 0)
- 1494 .loc 1 3187 14 discriminator 1 view .LVU492
- 1495 00a6 013A subs r2, r2, #1
- 1496 .LVL135:
-3187:Src/main.c **** if (span == 0)
- 1497 .loc 1 3187 14 discriminator 1 view .LVU493
- 1498 00a8 92B2 uxth r2, r2
- 1499 .LVL136:
- 1500 .L74:
-3188:Src/main.c **** {
- 1501 .loc 1 3188 5 is_stmt 1 view .LVU494
-3188:Src/main.c **** {
- 1502 .loc 1 3188 8 is_stmt 0 view .LVU495
- 1503 00aa 002B cmp r3, #0
- 1504 00ac E1D0 beq .L75
-3194:Src/main.c **** }
- 1505 .loc 1 3194 6 is_stmt 1 view .LVU496
-3194:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 163
-
-
- 1506 .loc 1 3194 30 is_stmt 0 view .LVU497
- 1507 00ae 04FB03F3 mul r3, r4, r3
- 1508 .LVL137:
-3194:Src/main.c **** }
- 1509 .loc 1 3194 44 view .LVU498
- 1510 00b2 93FBF2F3 sdiv r3, r3, r2
- 1511 00b6 1B1A subs r3, r3, r0
- 1512 .LVL138:
-3194:Src/main.c **** }
- 1513 .loc 1 3194 44 view .LVU499
- 1514 00b8 D8E7 b .L76
- 1515 .LVL139:
- 1516 .L87:
-3194:Src/main.c **** }
- 1517 .loc 1 3194 44 view .LVU500
- 1518 .LBE397:
- 1519 .LBE399:
- 1520 .LBB400:
-3213:Src/main.c **** if (span == 0)
- 1521 .loc 1 3213 13 discriminator 2 view .LVU501
- 1522 00ba 0122 movs r2, #1
- 1523 00bc D0E7 b .L78
- 1524 .LVL140:
- 1525 .L88:
-3213:Src/main.c **** if (span == 0)
- 1526 .loc 1 3213 13 discriminator 2 view .LVU502
- 1527 .LBE400:
-3226:Src/main.c **** }
- 1528 .loc 1 3226 10 view .LVU503
- 1529 00be 054B ldr r3, .L93
- 1530 .LVL141:
-3226:Src/main.c **** }
- 1531 .loc 1 3226 10 view .LVU504
- 1532 00c0 DAE7 b .L79
- 1533 .LVL142:
- 1534 .L89:
-3230:Src/main.c **** }
- 1535 .loc 1 3230 10 view .LVU505
- 1536 00c2 41F6FF73 movw r3, #8191
- 1537 00c6 D7E7 b .L79
- 1538 .LVL143:
- 1539 .L91:
-3230:Src/main.c **** }
- 1540 .loc 1 3230 10 view .LVU506
- 1541 .LBE401:
- 1542 .LBE392:
-3239:Src/main.c **** }
- 1543 .loc 1 3239 2 is_stmt 1 view .LVU507
- 1544 00c8 0021 movs r1, #0
- 1545 00ca 1E20 movs r0, #30
- 1546 00cc FFF7FEFF bl AD9102_WriteReg
- 1547 .LVL144:
-3240:Src/main.c ****
- 1548 .loc 1 3240 1 is_stmt 0 view .LVU508
- 1549 00d0 F8BD pop {r3, r4, r5, r6, r7, pc}
- 1550 .LVL145:
- 1551 .L94:
- ARM GAS /tmp/ccLSPxIe.s page 164
-
-
-3240:Src/main.c ****
- 1552 .loc 1 3240 1 view .LVU509
- 1553 00d2 00BF .align 2
- 1554 .L93:
- 1555 00d4 00E0FFFF .word -8192
- 1556 .cfi_endproc
- 1557 .LFE1231:
- 1559 .section .text.AD9102_WriteWaveUploadChunk,"ax",%progbits
- 1560 .align 1
- 1561 .syntax unified
- 1562 .thumb
- 1563 .thumb_func
- 1565 AD9102_WriteWaveUploadChunk:
- 1566 .LVL146:
- 1567 .LFB1227:
-3039:Src/main.c **** if (ad9102_wave_upload_active == 0u)
- 1568 .loc 1 3039 1 is_stmt 1 view -0
- 1569 .cfi_startproc
- 1570 @ args = 0, pretend = 0, frame = 0
- 1571 @ frame_needed = 0, uses_anonymous_args = 0
-3039:Src/main.c **** if (ad9102_wave_upload_active == 0u)
- 1572 .loc 1 3039 1 is_stmt 0 view .LVU511
- 1573 0000 70B5 push {r4, r5, r6, lr}
- 1574 .LCFI12:
- 1575 .cfi_def_cfa_offset 16
- 1576 .cfi_offset 4, -16
- 1577 .cfi_offset 5, -12
- 1578 .cfi_offset 6, -8
- 1579 .cfi_offset 14, -4
- 1580 0002 0646 mov r6, r0
-3040:Src/main.c **** {
- 1581 .loc 1 3040 2 is_stmt 1 view .LVU512
-3040:Src/main.c **** {
- 1582 .loc 1 3040 32 is_stmt 0 view .LVU513
- 1583 0004 194B ldr r3, .L104
- 1584 0006 1878 ldrb r0, [r3] @ zero_extendqisi2
- 1585 .LVL147:
-3040:Src/main.c **** {
- 1586 .loc 1 3040 5 view .LVU514
- 1587 0008 58B3 cbz r0, .L96
- 1588 000a 0D46 mov r5, r1
-3044:Src/main.c **** {
- 1589 .loc 1 3044 2 is_stmt 1 view .LVU515
-3044:Src/main.c **** {
- 1590 .loc 1 3044 26 is_stmt 0 view .LVU516
- 1591 000c 4B1E subs r3, r1, #1
- 1592 000e 9BB2 uxth r3, r3
-3044:Src/main.c **** {
- 1593 .loc 1 3044 5 view .LVU517
- 1594 0010 0B2B cmp r3, #11
- 1595 0012 25D8 bhi .L99
-3048:Src/main.c **** {
- 1596 .loc 1 3048 2 is_stmt 1 view .LVU518
-3048:Src/main.c **** {
- 1597 .loc 1 3048 7 is_stmt 0 view .LVU519
- 1598 0014 164B ldr r3, .L104+4
- 1599 0016 1B88 ldrh r3, [r3]
- ARM GAS /tmp/ccLSPxIe.s page 165
-
-
-3048:Src/main.c **** {
- 1600 .loc 1 3048 45 view .LVU520
- 1601 0018 0B44 add r3, r3, r1
-3048:Src/main.c **** {
- 1602 .loc 1 3048 72 view .LVU521
- 1603 001a 164A ldr r2, .L104+8
- 1604 001c 1288 ldrh r2, [r2]
-3048:Src/main.c **** {
- 1605 .loc 1 3048 5 view .LVU522
- 1606 001e 9342 cmp r3, r2
- 1607 0020 20D8 bhi .L100
- 1608 .LBB402:
-3053:Src/main.c **** {
- 1609 .loc 1 3053 16 view .LVU523
- 1610 0022 0024 movs r4, #0
- 1611 .LVL148:
- 1612 .L97:
-3053:Src/main.c **** {
- 1613 .loc 1 3053 25 is_stmt 1 discriminator 1 view .LVU524
- 1614 0024 AC42 cmp r4, r5
- 1615 0026 15D2 bcs .L103
- 1616 .LBB403:
-3055:Src/main.c **** uint16_t sample_u14;
- 1617 .loc 1 3055 3 view .LVU525
-3055:Src/main.c **** uint16_t sample_u14;
- 1618 .loc 1 3055 36 is_stmt 0 view .LVU526
- 1619 0028 36F81430 ldrh r3, [r6, r4, lsl #1]
- 1620 .LVL149:
-3056:Src/main.c **** uint16_t word;
- 1621 .loc 1 3056 3 is_stmt 1 view .LVU527
-3057:Src/main.c ****
- 1622 .loc 1 3057 3 view .LVU528
-3059:Src/main.c **** {
- 1623 .loc 1 3059 3 view .LVU529
-3059:Src/main.c **** {
- 1624 .loc 1 3059 39 is_stmt 0 view .LVU530
- 1625 002c 03F50052 add r2, r3, #8192
- 1626 0030 92B2 uxth r2, r2
-3059:Src/main.c **** {
- 1627 .loc 1 3059 6 view .LVU531
- 1628 0032 B2F5804F cmp r2, #16384
- 1629 0036 17D2 bcs .L101
-3064:Src/main.c **** word = (uint16_t)(sample_u14 << 2);
- 1630 .loc 1 3064 3 is_stmt 1 view .LVU532
- 1631 .LVL150:
-3065:Src/main.c **** AD9102_WriteReg((uint16_t)(AD9102_REG_SRAM_DATA_BASE + ad9102_wave_written_samples + i), word);
- 1632 .loc 1 3065 3 view .LVU533
-3066:Src/main.c **** }
- 1633 .loc 1 3066 3 view .LVU534
-3066:Src/main.c **** }
- 1634 .loc 1 3066 86 is_stmt 0 view .LVU535
- 1635 0038 0D4A ldr r2, .L104+4
- 1636 003a 1088 ldrh r0, [r2]
- 1637 003c 2044 add r0, r0, r4
- 1638 003e 80B2 uxth r0, r0
-3066:Src/main.c **** }
- 1639 .loc 1 3066 3 view .LVU536
- ARM GAS /tmp/ccLSPxIe.s page 166
-
-
- 1640 0040 9900 lsls r1, r3, #2
- 1641 0042 89B2 uxth r1, r1
- 1642 0044 00F5C040 add r0, r0, #24576
- 1643 0048 80B2 uxth r0, r0
- 1644 004a FFF7FEFF bl AD9102_WriteReg
- 1645 .LVL151:
-3066:Src/main.c **** }
- 1646 .loc 1 3066 3 view .LVU537
- 1647 .LBE403:
-3053:Src/main.c **** {
- 1648 .loc 1 3053 41 is_stmt 1 discriminator 2 view .LVU538
- 1649 004e 0134 adds r4, r4, #1
- 1650 .LVL152:
-3053:Src/main.c **** {
- 1651 .loc 1 3053 41 is_stmt 0 discriminator 2 view .LVU539
- 1652 0050 A4B2 uxth r4, r4
- 1653 .LVL153:
-3053:Src/main.c **** {
- 1654 .loc 1 3053 41 discriminator 2 view .LVU540
- 1655 0052 E7E7 b .L97
- 1656 .LVL154:
- 1657 .L103:
-3053:Src/main.c **** {
- 1658 .loc 1 3053 41 discriminator 2 view .LVU541
- 1659 .LBE402:
-3069:Src/main.c **** return 1u;
- 1660 .loc 1 3069 2 is_stmt 1 view .LVU542
-3069:Src/main.c **** return 1u;
- 1661 .loc 1 3069 32 is_stmt 0 view .LVU543
- 1662 0054 064B ldr r3, .L104+4
- 1663 0056 1A88 ldrh r2, [r3]
- 1664 0058 1544 add r5, r5, r2
- 1665 .LVL155:
-3069:Src/main.c **** return 1u;
- 1666 .loc 1 3069 30 view .LVU544
- 1667 005a 1D80 strh r5, [r3] @ movhi
-3070:Src/main.c **** }
- 1668 .loc 1 3070 2 is_stmt 1 view .LVU545
-3070:Src/main.c **** }
- 1669 .loc 1 3070 9 is_stmt 0 view .LVU546
- 1670 005c 0120 movs r0, #1
- 1671 005e 00E0 b .L96
- 1672 .LVL156:
- 1673 .L99:
-3046:Src/main.c **** }
- 1674 .loc 1 3046 10 view .LVU547
- 1675 0060 0020 movs r0, #0
- 1676 .LVL157:
- 1677 .L96:
-3071:Src/main.c ****
- 1678 .loc 1 3071 1 view .LVU548
- 1679 0062 70BD pop {r4, r5, r6, pc}
- 1680 .LVL158:
- 1681 .L100:
-3050:Src/main.c **** }
- 1682 .loc 1 3050 10 view .LVU549
- 1683 0064 0020 movs r0, #0
- ARM GAS /tmp/ccLSPxIe.s page 167
-
-
- 1684 0066 FCE7 b .L96
- 1685 .LVL159:
- 1686 .L101:
- 1687 .LBB405:
- 1688 .LBB404:
-3061:Src/main.c **** }
- 1689 .loc 1 3061 11 view .LVU550
- 1690 0068 0020 movs r0, #0
- 1691 006a FAE7 b .L96
- 1692 .L105:
- 1693 .align 2
- 1694 .L104:
- 1695 006c 00000000 .word ad9102_wave_upload_active
- 1696 0070 00000000 .word ad9102_wave_written_samples
- 1697 0074 00000000 .word ad9102_wave_expected_samples
- 1698 .LBE404:
- 1699 .LBE405:
- 1700 .cfi_endproc
- 1701 .LFE1227:
- 1703 .section .text.AD9102_Init,"ax",%progbits
- 1704 .align 1
- 1705 .syntax unified
- 1706 .thumb
- 1707 .thumb_func
- 1709 AD9102_Init:
- 1710 .LFB1212:
-2740:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- 1711 .loc 1 2740 1 is_stmt 1 view -0
- 1712 .cfi_startproc
- 1713 @ args = 0, pretend = 0, frame = 8
- 1714 @ frame_needed = 0, uses_anonymous_args = 0
- 1715 0000 00B5 push {lr}
- 1716 .LCFI13:
- 1717 .cfi_def_cfa_offset 4
- 1718 .cfi_offset 14, -4
- 1719 0002 83B0 sub sp, sp, #12
- 1720 .LCFI14:
- 1721 .cfi_def_cfa_offset 16
-2741:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
- 1722 .loc 1 2741 2 view .LVU552
- 1723 0004 0122 movs r2, #1
- 1724 0006 4FF48051 mov r1, #4096
- 1725 000a 1648 ldr r0, .L110
- 1726 000c FFF7FEFF bl HAL_GPIO_WritePin
- 1727 .LVL160:
-2742:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {}
- 1728 .loc 1 2742 2 view .LVU553
- 1729 0010 0022 movs r2, #0
- 1730 0012 4021 movs r1, #64
- 1731 0014 1448 ldr r0, .L110+4
- 1732 0016 FFF7FEFF bl HAL_GPIO_WritePin
- 1733 .LVL161:
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1734 .loc 1 2743 2 view .LVU554
- 1735 .LBB406:
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1736 .loc 1 2743 7 view .LVU555
- ARM GAS /tmp/ccLSPxIe.s page 168
-
-
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1737 .loc 1 2743 25 is_stmt 0 view .LVU556
- 1738 001a 0023 movs r3, #0
- 1739 001c 0193 str r3, [sp, #4]
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1740 .loc 1 2743 2 view .LVU557
- 1741 001e 02E0 b .L107
- 1742 .L108:
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1743 .loc 1 2743 48 is_stmt 1 discriminator 3 view .LVU558
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1744 .loc 1 2743 43 discriminator 3 view .LVU559
- 1745 0020 019B ldr r3, [sp, #4]
- 1746 0022 0133 adds r3, r3, #1
- 1747 0024 0193 str r3, [sp, #4]
- 1748 .L107:
-2743:Src/main.c **** HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
- 1749 .loc 1 2743 34 discriminator 1 view .LVU560
- 1750 0026 019B ldr r3, [sp, #4]
- 1751 0028 B3F57A7F cmp r3, #1000
- 1752 002c F8D3 bcc .L108
- 1753 .LBE406:
-2744:Src/main.c ****
- 1754 .loc 1 2744 2 view .LVU561
- 1755 002e 0122 movs r2, #1
- 1756 0030 4021 movs r1, #64
- 1757 0032 0D48 ldr r0, .L110+4
- 1758 0034 FFF7FEFF bl HAL_GPIO_WritePin
- 1759 .LVL162:
-2746:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- 1760 .loc 1 2746 2 view .LVU562
- 1761 0038 4221 movs r1, #66
- 1762 003a 0C48 ldr r0, .L110+8
- 1763 003c FFF7FEFF bl AD9102_WriteRegTable
- 1764 .LVL163:
-2747:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 1765 .loc 1 2747 2 view .LVU563
- 1766 0040 0021 movs r1, #0
- 1767 0042 1E20 movs r0, #30
- 1768 0044 FFF7FEFF bl AD9102_WriteReg
- 1769 .LVL164:
-2748:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 1770 .loc 1 2748 2 view .LVU564
- 1771 0048 0121 movs r1, #1
- 1772 004a 1D20 movs r0, #29
- 1773 004c FFF7FEFF bl AD9102_WriteReg
- 1774 .LVL165:
-2749:Src/main.c **** }
- 1775 .loc 1 2749 2 view .LVU565
- 1776 0050 0122 movs r2, #1
- 1777 0052 4FF40061 mov r1, #2048
- 1778 0056 0648 ldr r0, .L110+12
- 1779 0058 FFF7FEFF bl HAL_GPIO_WritePin
- 1780 .LVL166:
-2750:Src/main.c ****
- 1781 .loc 1 2750 1 is_stmt 0 view .LVU566
- 1782 005c 03B0 add sp, sp, #12
- ARM GAS /tmp/ccLSPxIe.s page 169
-
-
- 1783 .LCFI15:
- 1784 .cfi_def_cfa_offset 4
- 1785 @ sp needed
- 1786 005e 5DF804FB ldr pc, [sp], #4
- 1787 .L111:
- 1788 0062 00BF .align 2
- 1789 .L110:
- 1790 0064 00040240 .word 1073873920
- 1791 0068 00080240 .word 1073874944
- 1792 006c 00000000 .word ad9102_example4_regval
- 1793 0070 000C0240 .word 1073875968
- 1794 .cfi_endproc
- 1795 .LFE1212:
- 1797 .section .text.AD9102_StartOutput,"ax",%progbits
- 1798 .align 1
- 1799 .syntax unified
- 1800 .thumb
- 1801 .thumb_func
- 1803 AD9102_StartOutput:
- 1804 .LFB1224:
-2963:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 1805 .loc 1 2963 1 is_stmt 1 view -0
- 1806 .cfi_startproc
- 1807 @ args = 0, pretend = 0, frame = 8
- 1808 @ frame_needed = 0, uses_anonymous_args = 0
- 1809 0000 00B5 push {lr}
- 1810 .LCFI16:
- 1811 .cfi_def_cfa_offset 4
- 1812 .cfi_offset 14, -4
- 1813 0002 83B0 sub sp, sp, #12
- 1814 .LCFI17:
- 1815 .cfi_def_cfa_offset 16
-2964:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, AD9102_PAT_STATUS_RUN);
- 1816 .loc 1 2964 2 view .LVU568
- 1817 0004 0122 movs r2, #1
- 1818 0006 4FF40061 mov r1, #2048
- 1819 000a 0F48 ldr r0, .L116
- 1820 000c FFF7FEFF bl HAL_GPIO_WritePin
- 1821 .LVL167:
-2965:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 1822 .loc 1 2965 2 view .LVU569
- 1823 0010 0121 movs r1, #1
- 1824 0012 1E20 movs r0, #30
- 1825 0014 FFF7FEFF bl AD9102_WriteReg
- 1826 .LVL168:
-2966:Src/main.c **** for (volatile uint32_t d = 0; d < 1000; d++) {}
- 1827 .loc 1 2966 2 view .LVU570
- 1828 0018 0121 movs r1, #1
- 1829 001a 1D20 movs r0, #29
- 1830 001c FFF7FEFF bl AD9102_WriteReg
- 1831 .LVL169:
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1832 .loc 1 2967 2 view .LVU571
- 1833 .LBB407:
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1834 .loc 1 2967 7 view .LVU572
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- ARM GAS /tmp/ccLSPxIe.s page 170
-
-
- 1835 .loc 1 2967 25 is_stmt 0 view .LVU573
- 1836 0020 0023 movs r3, #0
- 1837 0022 0193 str r3, [sp, #4]
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1838 .loc 1 2967 2 view .LVU574
- 1839 0024 02E0 b .L113
- 1840 .L114:
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1841 .loc 1 2967 48 is_stmt 1 discriminator 3 view .LVU575
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1842 .loc 1 2967 43 discriminator 3 view .LVU576
- 1843 0026 019B ldr r3, [sp, #4]
- 1844 0028 0133 adds r3, r3, #1
- 1845 002a 0193 str r3, [sp, #4]
- 1846 .L113:
-2967:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_RESET);
- 1847 .loc 1 2967 34 discriminator 1 view .LVU577
- 1848 002c 019B ldr r3, [sp, #4]
- 1849 002e B3F57A7F cmp r3, #1000
- 1850 0032 F8D3 bcc .L114
- 1851 .LBE407:
-2968:Src/main.c **** }
- 1852 .loc 1 2968 2 view .LVU578
- 1853 0034 0022 movs r2, #0
- 1854 0036 4FF40061 mov r1, #2048
- 1855 003a 0348 ldr r0, .L116
- 1856 003c FFF7FEFF bl HAL_GPIO_WritePin
- 1857 .LVL170:
-2969:Src/main.c ****
- 1858 .loc 1 2969 1 is_stmt 0 view .LVU579
- 1859 0040 03B0 add sp, sp, #12
- 1860 .LCFI18:
- 1861 .cfi_def_cfa_offset 4
- 1862 @ sp needed
- 1863 0042 5DF804FB ldr pc, [sp], #4
- 1864 .L117:
- 1865 0046 00BF .align 2
- 1866 .L116:
- 1867 0048 000C0240 .word 1073875968
- 1868 .cfi_endproc
- 1869 .LFE1224:
- 1871 .section .text.AD9102_StopOutput,"ax",%progbits
- 1872 .align 1
- 1873 .syntax unified
- 1874 .thumb
- 1875 .thumb_func
- 1877 AD9102_StopOutput:
- 1878 .LFB1223:
-2957:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
- 1879 .loc 1 2957 1 is_stmt 1 view -0
- 1880 .cfi_startproc
- 1881 @ args = 0, pretend = 0, frame = 0
- 1882 @ frame_needed = 0, uses_anonymous_args = 0
- 1883 0000 08B5 push {r3, lr}
- 1884 .LCFI19:
- 1885 .cfi_def_cfa_offset 8
- 1886 .cfi_offset 3, -8
- ARM GAS /tmp/ccLSPxIe.s page 171
-
-
- 1887 .cfi_offset 14, -4
-2958:Src/main.c **** HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
- 1888 .loc 1 2958 2 view .LVU581
- 1889 0002 0021 movs r1, #0
- 1890 0004 1E20 movs r0, #30
- 1891 0006 FFF7FEFF bl AD9102_WriteReg
- 1892 .LVL171:
-2959:Src/main.c **** }
- 1893 .loc 1 2959 2 view .LVU582
- 1894 000a 0122 movs r2, #1
- 1895 000c 4FF40061 mov r1, #2048
- 1896 0010 0148 ldr r0, .L120
- 1897 0012 FFF7FEFF bl HAL_GPIO_WritePin
- 1898 .LVL172:
-2960:Src/main.c ****
- 1899 .loc 1 2960 1 is_stmt 0 view .LVU583
- 1900 0016 08BD pop {r3, pc}
- 1901 .L121:
- 1902 .align 2
- 1903 .L120:
- 1904 0018 000C0240 .word 1073875968
- 1905 .cfi_endproc
- 1906 .LFE1223:
- 1908 .section .text.AD9102_ConfigureSramPlayback,"ax",%progbits
- 1909 .align 1
- 1910 .syntax unified
- 1911 .thumb
- 1912 .thumb_func
- 1914 AD9102_ConfigureSramPlayback:
- 1915 .LVL173:
- 1916 .LFB1225:
-2972:Src/main.c **** uint16_t pat_timebase;
- 1917 .loc 1 2972 1 is_stmt 1 view -0
- 1918 .cfi_startproc
- 1919 @ args = 0, pretend = 0, frame = 0
- 1920 @ frame_needed = 0, uses_anonymous_args = 0
-2972:Src/main.c **** uint16_t pat_timebase;
- 1921 .loc 1 2972 1 is_stmt 0 view .LVU585
- 1922 0000 70B5 push {r4, r5, r6, lr}
- 1923 .LCFI20:
- 1924 .cfi_def_cfa_offset 16
- 1925 .cfi_offset 4, -16
- 1926 .cfi_offset 5, -12
- 1927 .cfi_offset 6, -8
- 1928 .cfi_offset 14, -4
-2973:Src/main.c **** uint32_t pat_period;
- 1929 .loc 1 2973 2 is_stmt 1 view .LVU586
-2974:Src/main.c ****
- 1930 .loc 1 2974 2 view .LVU587
-2976:Src/main.c **** {
- 1931 .loc 1 2976 2 view .LVU588
-2976:Src/main.c **** {
- 1932 .loc 1 2976 5 is_stmt 0 view .LVU589
- 1933 0002 0128 cmp r0, #1
- 1934 0004 06D9 bls .L126
- 1935 0006 0446 mov r4, r0
-2980:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 172
-
-
- 1936 .loc 1 2980 2 is_stmt 1 view .LVU590
-2980:Src/main.c **** {
- 1937 .loc 1 2980 5 is_stmt 0 view .LVU591
- 1938 0008 B0F5805F cmp r0, #4096
- 1939 000c 03D9 bls .L123
-2982:Src/main.c **** }
- 1940 .loc 1 2982 11 view .LVU592
- 1941 000e 4FF48054 mov r4, #4096
- 1942 0012 00E0 b .L123
- 1943 .L126:
-2978:Src/main.c **** }
- 1944 .loc 1 2978 11 view .LVU593
- 1945 0014 0224 movs r4, #2
- 1946 .L123:
- 1947 .LVL174:
-2984:Src/main.c **** {
- 1948 .loc 1 2984 2 is_stmt 1 view .LVU594
-2984:Src/main.c **** {
- 1949 .loc 1 2984 5 is_stmt 0 view .LVU595
- 1950 0016 19B1 cbz r1, .L128
-2988:Src/main.c **** {
- 1951 .loc 1 2988 2 is_stmt 1 view .LVU596
-2988:Src/main.c **** {
- 1952 .loc 1 2988 5 is_stmt 0 view .LVU597
- 1953 0018 0F29 cmp r1, #15
- 1954 001a 02D9 bls .L124
-2990:Src/main.c **** }
- 1955 .loc 1 2990 8 view .LVU598
- 1956 001c 0F21 movs r1, #15
- 1957 .LVL175:
-2990:Src/main.c **** }
- 1958 .loc 1 2990 8 view .LVU599
- 1959 001e 00E0 b .L124
- 1960 .LVL176:
- 1961 .L128:
-2986:Src/main.c **** }
- 1962 .loc 1 2986 8 view .LVU600
- 1963 0020 0121 movs r1, #1
- 1964 .LVL177:
- 1965 .L124:
-2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1966 .loc 1 2993 2 is_stmt 1 view .LVU601
-2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1967 .loc 1 2993 54 is_stmt 0 view .LVU602
- 1968 0022 0D02 lsls r5, r1, #8
- 1969 0024 05F47065 and r5, r5, #3840
-2993:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 1970 .loc 1 2993 15 view .LVU603
- 1971 0028 45F01105 orr r5, r5, #17
- 1972 .LVL178:
-2996:Src/main.c **** if (pat_period == 0u)
- 1973 .loc 1 2996 2 is_stmt 1 view .LVU604
-2996:Src/main.c **** if (pat_period == 0u)
- 1974 .loc 1 2996 15 is_stmt 0 view .LVU605
- 1975 002c 2646 mov r6, r4
-2996:Src/main.c **** if (pat_period == 0u)
- 1976 .loc 1 2996 35 view .LVU606
- ARM GAS /tmp/ccLSPxIe.s page 173
-
-
- 1977 002e 01F00F01 and r1, r1, #15
- 1978 .LVL179:
-2996:Src/main.c **** if (pat_period == 0u)
- 1979 .loc 1 2996 13 view .LVU607
- 1980 0032 04FB01F1 mul r1, r4, r1
- 1981 .LVL180:
-2997:Src/main.c **** {
- 1982 .loc 1 2997 2 is_stmt 1 view .LVU608
-2997:Src/main.c **** {
- 1983 .loc 1 2997 5 is_stmt 0 view .LVU609
- 1984 0036 19B1 cbz r1, .L125
-3001:Src/main.c **** {
- 1985 .loc 1 3001 2 is_stmt 1 view .LVU610
-3001:Src/main.c **** {
- 1986 .loc 1 3001 5 is_stmt 0 view .LVU611
- 1987 0038 B1F5803F cmp r1, #65536
- 1988 003c 35D2 bcs .L130
- 1989 003e 0E46 mov r6, r1
- 1990 .L125:
- 1991 .LVL181:
-3006:Src/main.c **** AD9102_StopOutput();
- 1992 .loc 1 3006 2 is_stmt 1 view .LVU612
- 1993 0040 4221 movs r1, #66
- 1994 0042 1B48 ldr r0, .L132
- 1995 0044 FFF7FEFF bl AD9102_WriteRegTable
- 1996 .LVL182:
-3007:Src/main.c **** AD9102_WriteReg(AD9102_REG_WAV_CONFIG, AD9102_EX2_WAV_CONFIG);
- 1997 .loc 1 3007 2 view .LVU613
- 1998 0048 FFF7FEFF bl AD9102_StopOutput
- 1999 .LVL183:
-3008:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, AD9102_EX2_SAW_CONFIG);
- 2000 .loc 1 3008 2 view .LVU614
- 2001 004c 43F23001 movw r1, #12336
- 2002 0050 2720 movs r0, #39
- 2003 0052 FFF7FEFF bl AD9102_WriteReg
- 2004 .LVL184:
-3009:Src/main.c **** AD9102_WriteReg(AD9102_REG_DAC_PAT, AD9102_EX2_DAC_PAT);
- 2005 .loc 1 3009 2 view .LVU615
- 2006 0056 4FF40071 mov r1, #512
- 2007 005a 3720 movs r0, #55
- 2008 005c FFF7FEFF bl AD9102_WriteReg
- 2009 .LVL185:
-3010:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- 2010 .loc 1 3010 2 view .LVU616
- 2011 0060 40F20111 movw r1, #257
- 2012 0064 2B20 movs r0, #43
- 2013 0066 FFF7FEFF bl AD9102_WriteReg
- 2014 .LVL186:
-3011:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, (uint16_t)pat_period);
- 2015 .loc 1 3011 2 view .LVU617
- 2016 006a 2946 mov r1, r5
- 2017 006c 2820 movs r0, #40
- 2018 006e FFF7FEFF bl AD9102_WriteReg
- 2019 .LVL187:
-3012:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
- 2020 .loc 1 3012 2 view .LVU618
- 2021 0072 B1B2 uxth r1, r6
- ARM GAS /tmp/ccLSPxIe.s page 174
-
-
- 2022 0074 2920 movs r0, #41
- 2023 0076 FFF7FEFF bl AD9102_WriteReg
- 2024 .LVL188:
-3013:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_DLY, AD9102_SRAM_START_DLY_DEFAULT);
- 2025 .loc 1 3013 2 view .LVU619
- 2026 007a 0021 movs r1, #0
- 2027 007c 1F20 movs r0, #31
- 2028 007e FFF7FEFF bl AD9102_WriteReg
- 2029 .LVL189:
-3014:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- 2030 .loc 1 3014 2 view .LVU620
- 2031 0082 0021 movs r1, #0
- 2032 0084 5C20 movs r0, #92
- 2033 0086 FFF7FEFF bl AD9102_WriteReg
- 2034 .LVL190:
-3015:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
- 2035 .loc 1 3015 2 view .LVU621
- 2036 008a 0021 movs r1, #0
- 2037 008c 5D20 movs r0, #93
- 2038 008e FFF7FEFF bl AD9102_WriteReg
- 2039 .LVL191:
-3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2040 .loc 1 3016 2 view .LVU622
-3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2041 .loc 1 3016 60 is_stmt 0 view .LVU623
- 2042 0092 611E subs r1, r4, #1
- 2043 0094 89B2 uxth r1, r1
-3016:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 2044 .loc 1 3016 2 view .LVU624
- 2045 0096 0901 lsls r1, r1, #4
- 2046 0098 89B2 uxth r1, r1
- 2047 009a 5E20 movs r0, #94
- 2048 009c FFF7FEFF bl AD9102_WriteReg
- 2049 .LVL192:
-3017:Src/main.c **** }
- 2050 .loc 1 3017 2 is_stmt 1 view .LVU625
- 2051 00a0 0121 movs r1, #1
- 2052 00a2 1D20 movs r0, #29
- 2053 00a4 FFF7FEFF bl AD9102_WriteReg
- 2054 .LVL193:
-3018:Src/main.c ****
- 2055 .loc 1 3018 1 is_stmt 0 view .LVU626
- 2056 00a8 70BD pop {r4, r5, r6, pc}
- 2057 .LVL194:
- 2058 .L130:
-3003:Src/main.c **** }
- 2059 .loc 1 3003 14 view .LVU627
- 2060 00aa 4FF6FF76 movw r6, #65535
- 2061 00ae C7E7 b .L125
- 2062 .L133:
- 2063 .align 2
- 2064 .L132:
- 2065 00b0 00000000 .word ad9102_example2_regval
- 2066 .cfi_endproc
- 2067 .LFE1225:
- 2069 .section .text.AD9102_BeginWaveUpload,"ax",%progbits
- 2070 .align 1
- ARM GAS /tmp/ccLSPxIe.s page 175
-
-
- 2071 .syntax unified
- 2072 .thumb
- 2073 .thumb_func
- 2075 AD9102_BeginWaveUpload:
- 2076 .LVL195:
- 2077 .LFB1226:
-3021:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES))
- 2078 .loc 1 3021 1 is_stmt 1 view -0
- 2079 .cfi_startproc
- 2080 @ args = 0, pretend = 0, frame = 0
- 2081 @ frame_needed = 0, uses_anonymous_args = 0
-3022:Src/main.c **** {
- 2082 .loc 1 3022 2 view .LVU629
-3022:Src/main.c **** {
- 2083 .loc 1 3022 21 is_stmt 0 view .LVU630
- 2084 0000 831E subs r3, r0, #2
- 2085 0002 9BB2 uxth r3, r3
-3022:Src/main.c **** {
- 2086 .loc 1 3022 5 view .LVU631
- 2087 0004 40F6FE72 movw r2, #4094
- 2088 0008 9342 cmp r3, r2
- 2089 000a 01D9 bls .L141
-3024:Src/main.c **** }
- 2090 .loc 1 3024 10 view .LVU632
- 2091 000c 0020 movs r0, #0
- 2092 .LVL196:
-3036:Src/main.c ****
- 2093 .loc 1 3036 1 view .LVU633
- 2094 000e 7047 bx lr
- 2095 .LVL197:
- 2096 .L141:
-3021:Src/main.c **** if ((samples < 2u) || (samples > AD9102_SRAM_MAX_SAMPLES))
- 2097 .loc 1 3021 1 view .LVU634
- 2098 0010 10B5 push {r4, lr}
- 2099 .LCFI21:
- 2100 .cfi_def_cfa_offset 8
- 2101 .cfi_offset 4, -8
- 2102 .cfi_offset 14, -4
- 2103 0012 0446 mov r4, r0
-3027:Src/main.c **** AD9102_ResetWaveUploadState();
- 2104 .loc 1 3027 2 is_stmt 1 view .LVU635
- 2105 0014 FFF7FEFF bl AD9102_StopOutput
- 2106 .LVL198:
-3028:Src/main.c **** AD9102_ConfigureSramPlayback(samples, AD9102_SRAM_HOLD_DEFAULT);
- 2107 .loc 1 3028 2 view .LVU636
- 2108 0018 FFF7FEFF bl AD9102_ResetWaveUploadState
- 2109 .LVL199:
-3029:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); // enable SRAM access
- 2110 .loc 1 3029 2 view .LVU637
- 2111 001c 0121 movs r1, #1
- 2112 001e 2046 mov r0, r4
- 2113 0020 FFF7FEFF bl AD9102_ConfigureSramPlayback
- 2114 .LVL200:
-3030:Src/main.c ****
- 2115 .loc 1 3030 2 view .LVU638
- 2116 0024 0421 movs r1, #4
- 2117 0026 1E20 movs r0, #30
- ARM GAS /tmp/ccLSPxIe.s page 176
-
-
- 2118 0028 FFF7FEFF bl AD9102_WriteReg
- 2119 .LVL201:
-3032:Src/main.c **** ad9102_wave_written_samples = 0u;
- 2120 .loc 1 3032 2 view .LVU639
-3032:Src/main.c **** ad9102_wave_written_samples = 0u;
- 2121 .loc 1 3032 31 is_stmt 0 view .LVU640
- 2122 002c 044B ldr r3, .L142
- 2123 002e 1C80 strh r4, [r3] @ movhi
-3033:Src/main.c **** ad9102_wave_upload_active = 1u;
- 2124 .loc 1 3033 2 is_stmt 1 view .LVU641
-3033:Src/main.c **** ad9102_wave_upload_active = 1u;
- 2125 .loc 1 3033 30 is_stmt 0 view .LVU642
- 2126 0030 044B ldr r3, .L142+4
- 2127 0032 0022 movs r2, #0
- 2128 0034 1A80 strh r2, [r3] @ movhi
-3034:Src/main.c **** return 1u;
- 2129 .loc 1 3034 2 is_stmt 1 view .LVU643
-3034:Src/main.c **** return 1u;
- 2130 .loc 1 3034 28 is_stmt 0 view .LVU644
- 2131 0036 0120 movs r0, #1
- 2132 0038 034B ldr r3, .L142+8
- 2133 003a 1870 strb r0, [r3]
-3035:Src/main.c **** }
- 2134 .loc 1 3035 2 is_stmt 1 view .LVU645
-3036:Src/main.c ****
- 2135 .loc 1 3036 1 is_stmt 0 view .LVU646
- 2136 003c 10BD pop {r4, pc}
- 2137 .L143:
- 2138 003e 00BF .align 2
- 2139 .L142:
- 2140 0040 00000000 .word ad9102_wave_expected_samples
- 2141 0044 00000000 .word ad9102_wave_written_samples
- 2142 0048 00000000 .word ad9102_wave_upload_active
- 2143 .cfi_endproc
- 2144 .LFE1226:
- 2146 .section .text.AD9102_CancelWaveUpload,"ax",%progbits
- 2147 .align 1
- 2148 .syntax unified
- 2149 .thumb
- 2150 .thumb_func
- 2152 AD9102_CancelWaveUpload:
- 2153 .LFB1229:
-3107:Src/main.c **** if (ad9102_wave_upload_active != 0u)
- 2154 .loc 1 3107 1 is_stmt 1 view -0
- 2155 .cfi_startproc
- 2156 @ args = 0, pretend = 0, frame = 0
- 2157 @ frame_needed = 0, uses_anonymous_args = 0
- 2158 0000 08B5 push {r3, lr}
- 2159 .LCFI22:
- 2160 .cfi_def_cfa_offset 8
- 2161 .cfi_offset 3, -8
- 2162 .cfi_offset 14, -4
-3108:Src/main.c **** {
- 2163 .loc 1 3108 2 view .LVU648
-3108:Src/main.c **** {
- 2164 .loc 1 3108 32 is_stmt 0 view .LVU649
- 2165 0002 044B ldr r3, .L148
- ARM GAS /tmp/ccLSPxIe.s page 177
-
-
- 2166 0004 1B78 ldrb r3, [r3] @ zero_extendqisi2
-3108:Src/main.c **** {
- 2167 .loc 1 3108 5 view .LVU650
- 2168 0006 13B9 cbnz r3, .L147
- 2169 .L145:
-3112:Src/main.c **** }
- 2170 .loc 1 3112 2 is_stmt 1 view .LVU651
- 2171 0008 FFF7FEFF bl AD9102_ResetWaveUploadState
- 2172 .LVL202:
-3113:Src/main.c ****
- 2173 .loc 1 3113 1 is_stmt 0 view .LVU652
- 2174 000c 08BD pop {r3, pc}
- 2175 .L147:
-3110:Src/main.c **** }
- 2176 .loc 1 3110 3 is_stmt 1 view .LVU653
- 2177 000e FFF7FEFF bl AD9102_StopOutput
- 2178 .LVL203:
- 2179 0012 F9E7 b .L145
- 2180 .L149:
- 2181 .align 2
- 2182 .L148:
- 2183 0014 00000000 .word ad9102_wave_upload_active
- 2184 .cfi_endproc
- 2185 .LFE1229:
- 2187 .section .text.AD9102_ReadReg,"ax",%progbits
- 2188 .align 1
- 2189 .syntax unified
- 2190 .thumb
- 2191 .thumb_func
- 2193 AD9102_ReadReg:
- 2194 .LVL204:
- 2195 .LFB1220:
-2907:Src/main.c **** uint32_t tmp32 = 0;
- 2196 .loc 1 2907 1 view -0
- 2197 .cfi_startproc
- 2198 @ args = 0, pretend = 0, frame = 0
- 2199 @ frame_needed = 0, uses_anonymous_args = 0
-2907:Src/main.c **** uint32_t tmp32 = 0;
- 2200 .loc 1 2907 1 is_stmt 0 view .LVU655
- 2201 0000 10B5 push {r4, lr}
- 2202 .LCFI23:
- 2203 .cfi_def_cfa_offset 8
- 2204 .cfi_offset 4, -8
- 2205 .cfi_offset 14, -4
-2908:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
- 2206 .loc 1 2908 2 is_stmt 1 view .LVU656
- 2207 .LVL205:
-2909:Src/main.c **** uint16_t value;
- 2208 .loc 1 2909 2 view .LVU657
-2909:Src/main.c **** uint16_t value;
- 2209 .loc 1 2909 11 is_stmt 0 view .LVU658
- 2210 0002 40F40044 orr r4, r0, #32768
- 2211 .LVL206:
-2910:Src/main.c ****
- 2212 .loc 1 2910 2 is_stmt 1 view .LVU659
-2912:Src/main.c ****
- 2213 .loc 1 2912 2 view .LVU660
- ARM GAS /tmp/ccLSPxIe.s page 178
-
-
- 2214 0006 0021 movs r1, #0
- 2215 0008 0846 mov r0, r1
- 2216 .LVL207:
-2912:Src/main.c ****
- 2217 .loc 1 2912 2 is_stmt 0 view .LVU661
- 2218 000a FFF7FEFF bl SPI2_SetMode
- 2219 .LVL208:
-2914:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
- 2220 .loc 1 2914 2 is_stmt 1 view .LVU662
- 2221 000e 0122 movs r2, #1
- 2222 0010 4FF48041 mov r1, #16384
- 2223 0014 2C48 ldr r0, .L165
- 2224 0016 FFF7FEFF bl HAL_GPIO_WritePin
- 2225 .LVL209:
-2915:Src/main.c ****
- 2226 .loc 1 2915 2 view .LVU663
- 2227 001a 0122 movs r2, #1
- 2228 001c 4FF48051 mov r1, #4096
- 2229 0020 2A48 ldr r0, .L165+4
- 2230 0022 FFF7FEFF bl HAL_GPIO_WritePin
- 2231 .LVL210:
-2917:Src/main.c **** {
- 2232 .loc 1 2917 2 view .LVU664
- 2233 .LBB408:
- 2234 .LBI408:
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2235 .loc 4 381 26 view .LVU665
- 2236 .LBB409:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2237 .loc 4 383 3 view .LVU666
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2238 .loc 4 383 12 is_stmt 0 view .LVU667
- 2239 0026 2A4B ldr r3, .L165+8
- 2240 0028 1B68 ldr r3, [r3]
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2241 .loc 4 383 69 view .LVU668
- 2242 002a 13F0400F tst r3, #64
- 2243 002e 04D1 bne .L151
- 2244 .LVL211:
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2245 .loc 4 383 69 view .LVU669
- 2246 .LBE409:
- 2247 .LBE408:
-2919:Src/main.c **** }
- 2248 .loc 1 2919 3 is_stmt 1 view .LVU670
- 2249 .LBB410:
- 2250 .LBI410:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2251 .loc 4 358 22 view .LVU671
- 2252 .LBB411:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2253 .loc 4 360 3 view .LVU672
- 2254 0030 274A ldr r2, .L165+8
- 2255 0032 1368 ldr r3, [r2]
- 2256 0034 43F04003 orr r3, r3, #64
- 2257 0038 1360 str r3, [r2]
- 2258 .LVL212:
- ARM GAS /tmp/ccLSPxIe.s page 179
-
-
- 2259 .L151:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2260 .loc 4 360 3 is_stmt 0 view .LVU673
- 2261 .LBE411:
- 2262 .LBE410:
-2922:Src/main.c ****
- 2263 .loc 1 2922 2 is_stmt 1 view .LVU674
- 2264 003a 0022 movs r2, #0
- 2265 003c 4FF48051 mov r1, #4096
- 2266 0040 2148 ldr r0, .L165
- 2267 0042 FFF7FEFF bl HAL_GPIO_WritePin
- 2268 .LVL213:
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2269 .loc 1 2924 2 view .LVU675
-2908:Src/main.c **** uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
- 2270 .loc 1 2908 11 is_stmt 0 view .LVU676
- 2271 0046 0023 movs r3, #0
- 2272 .LVL214:
- 2273 .L153:
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2274 .loc 1 2924 63 is_stmt 1 discriminator 2 view .LVU677
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2275 .loc 1 2924 41 discriminator 2 view .LVU678
- 2276 .LBB412:
- 2277 .LBI412:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2278 .loc 4 916 26 view .LVU679
- 2279 .LBB413:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2280 .loc 4 918 3 view .LVU680
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2281 .loc 4 918 12 is_stmt 0 view .LVU681
- 2282 0048 214A ldr r2, .L165+8
- 2283 004a 9268 ldr r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2284 .loc 4 918 66 view .LVU682
- 2285 004c 12F0020F tst r2, #2
- 2286 0050 05D1 bne .L152
- 2287 .LVL215:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2288 .loc 4 918 66 view .LVU683
- 2289 .LBE413:
- 2290 .LBE412:
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2291 .loc 1 2924 50 discriminator 1 view .LVU684
- 2292 0052 5A1C adds r2, r3, #1
- 2293 .LVL216:
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2294 .loc 1 2924 41 discriminator 1 view .LVU685
- 2295 0054 B3F57A7F cmp r3, #1000
- 2296 0058 01D2 bcs .L152
-2924:Src/main.c **** LL_SPI_TransmitData16(SPI2, cmd);
- 2297 .loc 1 2924 50 discriminator 1 view .LVU686
- 2298 005a 1346 mov r3, r2
- 2299 005c F4E7 b .L153
- 2300 .LVL217:
- 2301 .L152:
- ARM GAS /tmp/ccLSPxIe.s page 180
-
-
-2925:Src/main.c **** tmp32 = 0;
- 2302 .loc 1 2925 2 is_stmt 1 view .LVU687
- 2303 .LBB414:
- 2304 .LBI414:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2305 .loc 4 1373 22 view .LVU688
- 2306 .LBB415:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 2307 .loc 4 1376 3 view .LVU689
- 2308 .loc 4 1377 3 view .LVU690
- 2309 .loc 4 1377 10 is_stmt 0 view .LVU691
- 2310 005e 1C4B ldr r3, .L165+8
- 2311 0060 9C81 strh r4, [r3, #12] @ movhi
- 2312 .LVL218:
- 2313 .loc 4 1377 10 view .LVU692
- 2314 .LBE415:
- 2315 .LBE414:
-2926:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 2316 .loc 1 2926 2 is_stmt 1 view .LVU693
-2927:Src/main.c **** (void) SPI2->DR;
- 2317 .loc 1 2927 2 view .LVU694
-2926:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 2318 .loc 1 2926 8 is_stmt 0 view .LVU695
- 2319 0062 0023 movs r3, #0
- 2320 .LVL219:
- 2321 .L155:
-2927:Src/main.c **** (void) SPI2->DR;
- 2322 .loc 1 2927 64 is_stmt 1 discriminator 2 view .LVU696
-2927:Src/main.c **** (void) SPI2->DR;
- 2323 .loc 1 2927 42 discriminator 2 view .LVU697
- 2324 .LBB416:
- 2325 .LBI416:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2326 .loc 4 905 26 view .LVU698
- 2327 .LBB417:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2328 .loc 4 907 3 view .LVU699
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2329 .loc 4 907 12 is_stmt 0 view .LVU700
- 2330 0064 1A4A ldr r2, .L165+8
- 2331 0066 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2332 .loc 4 907 68 view .LVU701
- 2333 0068 12F0010F tst r2, #1
- 2334 006c 05D1 bne .L154
- 2335 .LVL220:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2336 .loc 4 907 68 view .LVU702
- 2337 .LBE417:
- 2338 .LBE416:
-2927:Src/main.c **** (void) SPI2->DR;
- 2339 .loc 1 2927 51 discriminator 1 view .LVU703
- 2340 006e 5A1C adds r2, r3, #1
- 2341 .LVL221:
-2927:Src/main.c **** (void) SPI2->DR;
- 2342 .loc 1 2927 42 discriminator 1 view .LVU704
- 2343 0070 B3F57A7F cmp r3, #1000
- ARM GAS /tmp/ccLSPxIe.s page 181
-
-
- 2344 0074 01D2 bcs .L154
-2927:Src/main.c **** (void) SPI2->DR;
- 2345 .loc 1 2927 51 discriminator 1 view .LVU705
- 2346 0076 1346 mov r3, r2
- 2347 0078 F4E7 b .L155
- 2348 .LVL222:
- 2349 .L154:
-2928:Src/main.c ****
- 2350 .loc 1 2928 2 is_stmt 1 view .LVU706
- 2351 007a 154B ldr r3, .L165+8
- 2352 007c DB68 ldr r3, [r3, #12]
-2930:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 2353 .loc 1 2930 2 view .LVU707
- 2354 .LVL223:
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2355 .loc 1 2931 2 view .LVU708
-2930:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
- 2356 .loc 1 2930 8 is_stmt 0 view .LVU709
- 2357 007e 0023 movs r3, #0
- 2358 .LVL224:
- 2359 .L157:
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2360 .loc 1 2931 63 is_stmt 1 discriminator 2 view .LVU710
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2361 .loc 1 2931 41 discriminator 2 view .LVU711
- 2362 .LBB418:
- 2363 .LBI418:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2364 .loc 4 916 26 view .LVU712
- 2365 .LBB419:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2366 .loc 4 918 3 view .LVU713
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2367 .loc 4 918 12 is_stmt 0 view .LVU714
- 2368 0080 134A ldr r2, .L165+8
- 2369 0082 9268 ldr r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2370 .loc 4 918 66 view .LVU715
- 2371 0084 12F0020F tst r2, #2
- 2372 0088 05D1 bne .L156
- 2373 .LVL225:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2374 .loc 4 918 66 view .LVU716
- 2375 .LBE419:
- 2376 .LBE418:
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2377 .loc 1 2931 50 discriminator 1 view .LVU717
- 2378 008a 5A1C adds r2, r3, #1
- 2379 .LVL226:
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2380 .loc 1 2931 41 discriminator 1 view .LVU718
- 2381 008c B3F57A7F cmp r3, #1000
- 2382 0090 01D2 bcs .L156
-2931:Src/main.c **** LL_SPI_TransmitData16(SPI2, 0x0000u);
- 2383 .loc 1 2931 50 discriminator 1 view .LVU719
- 2384 0092 1346 mov r3, r2
- 2385 0094 F4E7 b .L157
- ARM GAS /tmp/ccLSPxIe.s page 182
-
-
- 2386 .LVL227:
- 2387 .L156:
-2932:Src/main.c **** tmp32 = 0;
- 2388 .loc 1 2932 2 is_stmt 1 view .LVU720
- 2389 .LBB420:
- 2390 .LBI420:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2391 .loc 4 1373 22 view .LVU721
- 2392 .LBB421:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 2393 .loc 4 1376 3 view .LVU722
- 2394 .loc 4 1377 3 view .LVU723
- 2395 .loc 4 1377 10 is_stmt 0 view .LVU724
- 2396 0096 0023 movs r3, #0
- 2397 0098 0D4A ldr r2, .L165+8
- 2398 009a 9381 strh r3, [r2, #12] @ movhi
- 2399 .LVL228:
- 2400 .loc 4 1377 10 view .LVU725
- 2401 .LBE421:
- 2402 .LBE420:
-2933:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 2403 .loc 1 2933 2 is_stmt 1 view .LVU726
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2404 .loc 1 2934 2 view .LVU727
- 2405 .L159:
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2406 .loc 1 2934 64 discriminator 2 view .LVU728
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2407 .loc 1 2934 42 discriminator 2 view .LVU729
- 2408 .LBB422:
- 2409 .LBI422:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2410 .loc 4 905 26 view .LVU730
- 2411 .LBB423:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2412 .loc 4 907 3 view .LVU731
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2413 .loc 4 907 12 is_stmt 0 view .LVU732
- 2414 009c 0C4A ldr r2, .L165+8
- 2415 009e 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2416 .loc 4 907 68 view .LVU733
- 2417 00a0 12F0010F tst r2, #1
- 2418 00a4 05D1 bne .L158
- 2419 .LVL229:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2420 .loc 4 907 68 view .LVU734
- 2421 .LBE423:
- 2422 .LBE422:
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2423 .loc 1 2934 51 discriminator 1 view .LVU735
- 2424 00a6 5A1C adds r2, r3, #1
- 2425 .LVL230:
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2426 .loc 1 2934 42 discriminator 1 view .LVU736
- 2427 00a8 B3F57A7F cmp r3, #1000
- 2428 00ac 01D2 bcs .L158
- ARM GAS /tmp/ccLSPxIe.s page 183
-
-
-2934:Src/main.c **** value = LL_SPI_ReceiveData16(SPI2);
- 2429 .loc 1 2934 51 discriminator 1 view .LVU737
- 2430 00ae 1346 mov r3, r2
- 2431 00b0 F4E7 b .L159
- 2432 .LVL231:
- 2433 .L158:
-2935:Src/main.c ****
- 2434 .loc 1 2935 2 is_stmt 1 view .LVU738
- 2435 .LBB424:
- 2436 .LBI424:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 2437 .loc 4 1344 26 view .LVU739
- 2438 .LBB425:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2439 .loc 4 1346 3 view .LVU740
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2440 .loc 4 1346 21 is_stmt 0 view .LVU741
- 2441 00b2 074B ldr r3, .L165+8
- 2442 00b4 DC68 ldr r4, [r3, #12]
- 2443 .LVL232:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2444 .loc 4 1346 10 view .LVU742
- 2445 00b6 A4B2 uxth r4, r4
- 2446 .LVL233:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 2447 .loc 4 1346 10 view .LVU743
- 2448 .LBE425:
- 2449 .LBE424:
-2937:Src/main.c **** return value;
- 2450 .loc 1 2937 2 is_stmt 1 view .LVU744
- 2451 00b8 0122 movs r2, #1
- 2452 00ba 4FF48051 mov r1, #4096
- 2453 00be 0248 ldr r0, .L165
- 2454 00c0 FFF7FEFF bl HAL_GPIO_WritePin
- 2455 .LVL234:
-2938:Src/main.c **** }
- 2456 .loc 1 2938 2 view .LVU745
-2939:Src/main.c ****
- 2457 .loc 1 2939 1 is_stmt 0 view .LVU746
- 2458 00c4 2046 mov r0, r4
- 2459 00c6 10BD pop {r4, pc}
- 2460 .LVL235:
- 2461 .L166:
-2939:Src/main.c ****
- 2462 .loc 1 2939 1 view .LVU747
- 2463 .align 2
- 2464 .L165:
- 2465 00c8 00040240 .word 1073873920
- 2466 00cc 000C0240 .word 1073875968
- 2467 00d0 00380040 .word 1073756160
- 2468 .cfi_endproc
- 2469 .LFE1220:
- 2471 .section .text.AD9102_ApplySram,"ax",%progbits
- 2472 .align 1
- 2473 .syntax unified
- 2474 .thumb
- 2475 .thumb_func
- ARM GAS /tmp/ccLSPxIe.s page 184
-
-
- 2477 AD9102_ApplySram:
- 2478 .LVL236:
- 2479 .LFB1232:
-3243:Src/main.c **** AD9102_ResetWaveUploadState();
- 2480 .loc 1 3243 1 is_stmt 1 view -0
- 2481 .cfi_startproc
- 2482 @ args = 4, pretend = 0, frame = 0
- 2483 @ frame_needed = 0, uses_anonymous_args = 0
-3243:Src/main.c **** AD9102_ResetWaveUploadState();
- 2484 .loc 1 3243 1 is_stmt 0 view .LVU749
- 2485 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 2486 .LCFI24:
- 2487 .cfi_def_cfa_offset 24
- 2488 .cfi_offset 4, -24
- 2489 .cfi_offset 5, -20
- 2490 .cfi_offset 6, -16
- 2491 .cfi_offset 7, -12
- 2492 .cfi_offset 8, -8
- 2493 .cfi_offset 14, -4
- 2494 0004 0646 mov r6, r0
- 2495 0006 0C46 mov r4, r1
- 2496 0008 1546 mov r5, r2
- 2497 000a 1F46 mov r7, r3
- 2498 000c BDF81880 ldrh r8, [sp, #24]
-3244:Src/main.c ****
- 2499 .loc 1 3244 2 is_stmt 1 view .LVU750
- 2500 0010 FFF7FEFF bl AD9102_ResetWaveUploadState
- 2501 .LVL237:
-3246:Src/main.c **** {
- 2502 .loc 1 3246 2 view .LVU751
-3246:Src/main.c **** {
- 2503 .loc 1 3246 5 is_stmt 0 view .LVU752
- 2504 0014 1CB1 cbz r4, .L174
-3250:Src/main.c **** {
- 2505 .loc 1 3250 2 is_stmt 1 view .LVU753
-3250:Src/main.c **** {
- 2506 .loc 1 3250 5 is_stmt 0 view .LVU754
- 2507 0016 012C cmp r4, #1
- 2508 0018 02D8 bhi .L168
-3252:Src/main.c **** }
- 2509 .loc 1 3252 11 view .LVU755
- 2510 001a 0224 movs r4, #2
- 2511 .LVL238:
-3252:Src/main.c **** }
- 2512 .loc 1 3252 11 view .LVU756
- 2513 001c 03E0 b .L169
- 2514 .LVL239:
- 2515 .L174:
-3248:Src/main.c **** }
- 2516 .loc 1 3248 11 view .LVU757
- 2517 001e 1024 movs r4, #16
- 2518 .LVL240:
- 2519 .L168:
-3254:Src/main.c **** {
- 2520 .loc 1 3254 2 is_stmt 1 view .LVU758
-3254:Src/main.c **** {
- 2521 .loc 1 3254 5 is_stmt 0 view .LVU759
- ARM GAS /tmp/ccLSPxIe.s page 185
-
-
- 2522 0020 B4F5805F cmp r4, #4096
- 2523 0024 04D8 bhi .L176
- 2524 .LVL241:
- 2525 .L169:
-3258:Src/main.c **** {
- 2526 .loc 1 3258 2 is_stmt 1 view .LVU760
-3258:Src/main.c **** {
- 2527 .loc 1 3258 5 is_stmt 0 view .LVU761
- 2528 0026 35B1 cbz r5, .L177
-3262:Src/main.c **** {
- 2529 .loc 1 3262 2 is_stmt 1 view .LVU762
-3262:Src/main.c **** {
- 2530 .loc 1 3262 5 is_stmt 0 view .LVU763
- 2531 0028 0F2D cmp r5, #15
- 2532 002a 05D9 bls .L170
-3264:Src/main.c **** }
- 2533 .loc 1 3264 8 view .LVU764
- 2534 002c 0F25 movs r5, #15
- 2535 .LVL242:
-3264:Src/main.c **** }
- 2536 .loc 1 3264 8 view .LVU765
- 2537 002e 03E0 b .L170
- 2538 .LVL243:
- 2539 .L176:
-3256:Src/main.c **** }
- 2540 .loc 1 3256 11 view .LVU766
- 2541 0030 4FF48054 mov r4, #4096
- 2542 .LVL244:
-3256:Src/main.c **** }
- 2543 .loc 1 3256 11 view .LVU767
- 2544 0034 F7E7 b .L169
- 2545 .LVL245:
- 2546 .L177:
-3260:Src/main.c **** }
- 2547 .loc 1 3260 8 view .LVU768
- 2548 0036 0125 movs r5, #1
- 2549 .LVL246:
- 2550 .L170:
-3267:Src/main.c **** {
- 2551 .loc 1 3267 2 is_stmt 1 view .LVU769
-3267:Src/main.c **** {
- 2552 .loc 1 3267 5 is_stmt 0 view .LVU770
- 2553 0038 B8F5005F cmp r8, #8192
- 2554 003c 01D3 bcc .L171
-3269:Src/main.c **** }
- 2555 .loc 1 3269 13 view .LVU771
- 2556 003e 41F6FF78 movw r8, #8191
- 2557 .L171:
- 2558 .LVL247:
-3272:Src/main.c **** AD9102_LoadSramRamp(samples, triangle, amplitude);
- 2559 .loc 1 3272 2 is_stmt 1 view .LVU772
- 2560 0042 2946 mov r1, r5
- 2561 0044 2046 mov r0, r4
- 2562 0046 FFF7FEFF bl AD9102_ConfigureSramPlayback
- 2563 .LVL248:
-3273:Src/main.c ****
- 2564 .loc 1 3273 2 view .LVU773
- ARM GAS /tmp/ccLSPxIe.s page 186
-
-
- 2565 004a 4246 mov r2, r8
- 2566 004c 3946 mov r1, r7
- 2567 004e 2046 mov r0, r4
- 2568 0050 FFF7FEFF bl AD9102_LoadSramRamp
- 2569 .LVL249:
-3275:Src/main.c **** {
- 2570 .loc 1 3275 2 view .LVU774
-3275:Src/main.c **** {
- 2571 .loc 1 3275 5 is_stmt 0 view .LVU775
- 2572 0054 36B1 cbz r6, .L172
-3277:Src/main.c **** }
- 2573 .loc 1 3277 3 is_stmt 1 view .LVU776
- 2574 0056 FFF7FEFF bl AD9102_StartOutput
- 2575 .LVL250:
- 2576 .L173:
-3284:Src/main.c **** }
- 2577 .loc 1 3284 2 view .LVU777
-3284:Src/main.c **** }
- 2578 .loc 1 3284 9 is_stmt 0 view .LVU778
- 2579 005a 1E20 movs r0, #30
- 2580 005c FFF7FEFF bl AD9102_ReadReg
- 2581 .LVL251:
-3285:Src/main.c ****
- 2582 .loc 1 3285 1 view .LVU779
- 2583 0060 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 2584 .LVL252:
- 2585 .L172:
-3281:Src/main.c **** }
- 2586 .loc 1 3281 3 is_stmt 1 view .LVU780
- 2587 0064 FFF7FEFF bl AD9102_StopOutput
- 2588 .LVL253:
- 2589 0068 F7E7 b .L173
- 2590 .cfi_endproc
- 2591 .LFE1232:
- 2593 .section .text.AD9102_Apply,"ax",%progbits
- 2594 .align 1
- 2595 .syntax unified
- 2596 .thumb
- 2597 .thumb_func
- 2599 AD9102_Apply:
- 2600 .LVL254:
- 2601 .LFB1230:
-3116:Src/main.c **** AD9102_ResetWaveUploadState();
- 2602 .loc 1 3116 1 view -0
- 2603 .cfi_startproc
- 2604 @ args = 4, pretend = 0, frame = 0
- 2605 @ frame_needed = 0, uses_anonymous_args = 0
-3116:Src/main.c **** AD9102_ResetWaveUploadState();
- 2606 .loc 1 3116 1 is_stmt 0 view .LVU782
- 2607 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
- 2608 .LCFI25:
- 2609 .cfi_def_cfa_offset 24
- 2610 .cfi_offset 3, -24
- 2611 .cfi_offset 4, -20
- 2612 .cfi_offset 5, -16
- 2613 .cfi_offset 6, -12
- 2614 .cfi_offset 7, -8
- ARM GAS /tmp/ccLSPxIe.s page 187
-
-
- 2615 .cfi_offset 14, -4
- 2616 0002 0546 mov r5, r0
- 2617 0004 0F46 mov r7, r1
- 2618 0006 1446 mov r4, r2
- 2619 0008 1E46 mov r6, r3
-3117:Src/main.c ****
- 2620 .loc 1 3117 2 is_stmt 1 view .LVU783
- 2621 000a FFF7FEFF bl AD9102_ResetWaveUploadState
- 2622 .LVL255:
-3119:Src/main.c **** {
- 2623 .loc 1 3119 2 view .LVU784
-3119:Src/main.c **** {
- 2624 .loc 1 3119 5 is_stmt 0 view .LVU785
- 2625 000e 67B3 cbz r7, .L182
- 2626 .LBB426:
-3121:Src/main.c **** uint16_t pat_timebase;
- 2627 .loc 1 3121 3 is_stmt 1 view .LVU786
-3122:Src/main.c ****
- 2628 .loc 1 3122 3 view .LVU787
-3124:Src/main.c **** {
- 2629 .loc 1 3124 3 view .LVU788
-3124:Src/main.c **** {
- 2630 .loc 1 3124 6 is_stmt 0 view .LVU789
- 2631 0010 1CB1 cbz r4, .L185
-3128:Src/main.c **** {
- 2632 .loc 1 3128 3 is_stmt 1 view .LVU790
-3128:Src/main.c **** {
- 2633 .loc 1 3128 6 is_stmt 0 view .LVU791
- 2634 0012 3F2C cmp r4, #63
- 2635 0014 02D9 bls .L183
-3130:Src/main.c **** }
- 2636 .loc 1 3130 13 view .LVU792
- 2637 0016 3F24 movs r4, #63
- 2638 .LVL256:
-3130:Src/main.c **** }
- 2639 .loc 1 3130 13 view .LVU793
- 2640 0018 00E0 b .L183
- 2641 .LVL257:
- 2642 .L185:
-3126:Src/main.c **** }
- 2643 .loc 1 3126 13 view .LVU794
- 2644 001a 0124 movs r4, #1
- 2645 .LVL258:
- 2646 .L183:
-3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2647 .loc 1 3132 3 is_stmt 1 view .LVU795
-3133:Src/main.c **** pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2648 .loc 1 3133 25 is_stmt 0 view .LVU796
- 2649 001c 05F00305 and r5, r5, #3
- 2650 .LVL259:
-3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2651 .loc 1 3132 60 view .LVU797
- 2652 0020 A400 lsls r4, r4, #2
- 2653 .LVL260:
-3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2654 .loc 1 3132 60 view .LVU798
- 2655 0022 E4B2 uxtb r4, r4
- ARM GAS /tmp/ccLSPxIe.s page 188
-
-
-3132:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2656 .loc 1 3132 11 view .LVU799
- 2657 0024 2543 orrs r5, r5, r4
- 2658 .LVL261:
-3134:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
- 2659 .loc 1 3134 3 is_stmt 1 view .LVU800
-3135:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
- 2660 .loc 1 3135 49 is_stmt 0 view .LVU801
- 2661 0026 3301 lsls r3, r6, #4
- 2662 0028 03F0F003 and r3, r3, #240
-3134:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
- 2663 .loc 1 3134 16 view .LVU802
- 2664 002c 40F20114 movw r4, #257
- 2665 0030 1C43 orrs r4, r4, r3
- 2666 .LVL262:
-3138:Src/main.c **** AD9102_WriteReg(AD9102_REG_SAW_CONFIG, saw_cfg);
- 2667 .loc 1 3138 3 is_stmt 1 view .LVU803
- 2668 0032 43F21221 movw r1, #12818
- 2669 0036 2720 movs r0, #39
- 2670 0038 FFF7FEFF bl AD9102_WriteReg
- 2671 .LVL263:
-3139:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TIMEBASE, pat_timebase);
- 2672 .loc 1 3139 3 view .LVU804
- 2673 003c 2946 mov r1, r5
- 2674 003e 3720 movs r0, #55
- 2675 0040 FFF7FEFF bl AD9102_WriteReg
- 2676 .LVL264:
-3140:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_PERIOD, pat_period);
- 2677 .loc 1 3140 3 view .LVU805
- 2678 0044 2146 mov r1, r4
- 2679 0046 2820 movs r0, #40
- 2680 0048 FFF7FEFF bl AD9102_WriteReg
- 2681 .LVL265:
-3141:Src/main.c **** AD9102_WriteReg(AD9102_REG_PAT_TYPE, 0x0000u); // continuous pattern repeat
- 2682 .loc 1 3141 3 view .LVU806
- 2683 004c BDF81810 ldrh r1, [sp, #24]
- 2684 0050 2920 movs r0, #41
- 2685 0052 FFF7FEFF bl AD9102_WriteReg
- 2686 .LVL266:
-3142:Src/main.c ****
- 2687 .loc 1 3142 3 view .LVU807
- 2688 0056 0021 movs r1, #0
- 2689 0058 1F20 movs r0, #31
- 2690 005a FFF7FEFF bl AD9102_WriteReg
- 2691 .LVL267:
-3144:Src/main.c **** }
- 2692 .loc 1 3144 3 view .LVU808
- 2693 005e FFF7FEFF bl AD9102_StartOutput
- 2694 .LVL268:
- 2695 .L184:
-3144:Src/main.c **** }
- 2696 .loc 1 3144 3 is_stmt 0 view .LVU809
- 2697 .LBE426:
-3151:Src/main.c **** }
- 2698 .loc 1 3151 2 is_stmt 1 view .LVU810
-3151:Src/main.c **** }
- 2699 .loc 1 3151 9 is_stmt 0 view .LVU811
- ARM GAS /tmp/ccLSPxIe.s page 189
-
-
- 2700 0062 1E20 movs r0, #30
- 2701 0064 FFF7FEFF bl AD9102_ReadReg
- 2702 .LVL269:
-3152:Src/main.c ****
- 2703 .loc 1 3152 1 view .LVU812
- 2704 0068 F8BD pop {r3, r4, r5, r6, r7, pc}
- 2705 .LVL270:
- 2706 .L182:
-3148:Src/main.c **** }
- 2707 .loc 1 3148 3 is_stmt 1 view .LVU813
- 2708 006a FFF7FEFF bl AD9102_StopOutput
- 2709 .LVL271:
- 2710 006e F8E7 b .L184
- 2711 .cfi_endproc
- 2712 .LFE1230:
- 2714 .section .text.AD9102_CheckFlags,"ax",%progbits
- 2715 .align 1
- 2716 .syntax unified
- 2717 .thumb
- 2718 .thumb_func
- 2720 AD9102_CheckFlags:
- 2721 .LVL272:
- 2722 .LFB1233:
-3288:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 2723 .loc 1 3288 1 view -0
- 2724 .cfi_startproc
- 2725 @ args = 8, pretend = 0, frame = 8
- 2726 @ frame_needed = 0, uses_anonymous_args = 0
-3288:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 2727 .loc 1 3288 1 is_stmt 0 view .LVU815
- 2728 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- 2729 .LCFI26:
- 2730 .cfi_def_cfa_offset 36
- 2731 .cfi_offset 4, -36
- 2732 .cfi_offset 5, -32
- 2733 .cfi_offset 6, -28
- 2734 .cfi_offset 7, -24
- 2735 .cfi_offset 8, -20
- 2736 .cfi_offset 9, -16
- 2737 .cfi_offset 10, -12
- 2738 .cfi_offset 11, -8
- 2739 .cfi_offset 14, -4
- 2740 0004 83B0 sub sp, sp, #12
- 2741 .LCFI27:
- 2742 .cfi_def_cfa_offset 48
- 2743 0006 0190 str r0, [sp, #4]
- 2744 0008 0F46 mov r7, r1
- 2745 000a 1546 mov r5, r2
- 2746 000c 1C46 mov r4, r3
- 2747 000e BDF834B0 ldrh fp, [sp, #52]
-3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 2748 .loc 1 3289 2 is_stmt 1 view .LVU816
-3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 2749 .loc 1 3289 23 is_stmt 0 view .LVU817
- 2750 0012 0020 movs r0, #0
- 2751 .LVL273:
-3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- ARM GAS /tmp/ccLSPxIe.s page 190
-
-
- 2752 .loc 1 3289 23 view .LVU818
- 2753 0014 FFF7FEFF bl AD9102_ReadReg
- 2754 .LVL274:
-3289:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 2755 .loc 1 3289 23 view .LVU819
- 2756 0018 8246 mov r10, r0
- 2757 .LVL275:
-3290:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 2758 .loc 1 3290 2 is_stmt 1 view .LVU820
-3290:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 2759 .loc 1 3290 22 is_stmt 0 view .LVU821
- 2760 001a 0120 movs r0, #1
- 2761 001c FFF7FEFF bl AD9102_ReadReg
- 2762 .LVL276:
- 2763 0020 8146 mov r9, r0
- 2764 .LVL277:
-3291:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 2765 .loc 1 3291 2 is_stmt 1 view .LVU822
-3291:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 2766 .loc 1 3291 22 is_stmt 0 view .LVU823
- 2767 0022 0220 movs r0, #2
- 2768 0024 FFF7FEFF bl AD9102_ReadReg
- 2769 .LVL278:
- 2770 0028 8046 mov r8, r0
- 2771 .LVL279:
-3292:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2772 .loc 1 3292 2 is_stmt 1 view .LVU824
-3292:Src/main.c **** uint16_t pat_timebase = (uint16_t)(((AD9102_PAT_TIMEBASE_HOLD_DEFAULT & 0x0Fu) << 8) |
- 2773 .loc 1 3292 21 is_stmt 0 view .LVU825
- 2774 002a 6020 movs r0, #96
- 2775 002c FFF7FEFF bl AD9102_ReadReg
- 2776 .LVL280:
-3293:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
- 2777 .loc 1 3293 2 is_stmt 1 view .LVU826
-3294:Src/main.c **** (AD9102_START_DELAY_BASE_DEFAULT & 0x0Fu));
- 2778 .loc 1 3294 57 is_stmt 0 view .LVU827
- 2779 0030 9DF83030 ldrb r3, [sp, #48] @ zero_extendqisi2
- 2780 0034 1B01 lsls r3, r3, #4
- 2781 0036 03F0F003 and r3, r3, #240
-3293:Src/main.c **** ((pat_base & 0x0Fu) << 4) |
- 2782 .loc 1 3293 11 view .LVU828
- 2783 003a 40F20116 movw r6, #257
- 2784 003e 1E43 orrs r6, r6, r3
- 2785 .LVL281:
-3297:Src/main.c **** {
- 2786 .loc 1 3297 2 is_stmt 1 view .LVU829
-3297:Src/main.c **** {
- 2787 .loc 1 3297 5 is_stmt 0 view .LVU830
- 2788 0040 1CB1 cbz r4, .L201
-3301:Src/main.c **** {
- 2789 .loc 1 3301 2 is_stmt 1 view .LVU831
-3301:Src/main.c **** {
- 2790 .loc 1 3301 5 is_stmt 0 view .LVU832
- 2791 0042 3F2C cmp r4, #63
- 2792 0044 02D9 bls .L189
-3303:Src/main.c **** }
- 2793 .loc 1 3303 12 view .LVU833
- ARM GAS /tmp/ccLSPxIe.s page 191
-
-
- 2794 0046 3F24 movs r4, #63
- 2795 .LVL282:
-3303:Src/main.c **** }
- 2796 .loc 1 3303 12 view .LVU834
- 2797 0048 00E0 b .L189
- 2798 .LVL283:
- 2799 .L201:
-3299:Src/main.c **** }
- 2800 .loc 1 3299 12 view .LVU835
- 2801 004a 0124 movs r4, #1
- 2802 .LVL284:
- 2803 .L189:
-3305:Src/main.c **** {
- 2804 .loc 1 3305 2 is_stmt 1 view .LVU836
-3305:Src/main.c **** {
- 2805 .loc 1 3305 5 is_stmt 0 view .LVU837
- 2806 004c BBF1000F cmp fp, #0
- 2807 0050 01D1 bne .L190
-3307:Src/main.c **** }
- 2808 .loc 1 3307 14 view .LVU838
- 2809 0052 4FF6FF7B movw fp, #65535
- 2810 .L190:
- 2811 .LVL285:
-3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2812 .loc 1 3309 2 is_stmt 1 view .LVU839
-3310:Src/main.c ****
- 2813 .loc 1 3310 35 is_stmt 0 view .LVU840
- 2814 0056 05F00305 and r5, r5, #3
- 2815 .LVL286:
-3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2816 .loc 1 3309 71 view .LVU841
- 2817 005a A400 lsls r4, r4, #2
- 2818 .LVL287:
-3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2819 .loc 1 3309 71 view .LVU842
- 2820 005c E4B2 uxtb r4, r4
-3309:Src/main.c **** ((uint16_t)(saw_type & 0x3u)));
- 2821 .loc 1 3309 11 view .LVU843
- 2822 005e 2543 orrs r5, r5, r4
- 2823 .LVL288:
-3312:Src/main.c ****
- 2824 .loc 1 3312 2 is_stmt 1 view .LVU844
-3315:Src/main.c **** {
- 2825 .loc 1 3315 2 view .LVU845
-3315:Src/main.c **** {
- 2826 .loc 1 3315 5 is_stmt 0 view .LVU846
- 2827 0060 BAF1000F cmp r10, #0
- 2828 0064 36D1 bne .L204
-3312:Src/main.c ****
- 2829 .loc 1 3312 10 view .LVU847
- 2830 0066 0124 movs r4, #1
- 2831 .L191:
- 2832 .LVL289:
-3321:Src/main.c **** {
- 2833 .loc 1 3321 2 is_stmt 1 view .LVU848
-3321:Src/main.c **** {
- 2834 .loc 1 3321 5 is_stmt 0 view .LVU849
- ARM GAS /tmp/ccLSPxIe.s page 192
-
-
- 2835 0068 19F4F47F tst r9, #488
- 2836 006c 00D0 beq .L192
-3323:Src/main.c **** }
- 2837 .loc 1 3323 6 view .LVU850
- 2838 006e 0024 movs r4, #0
- 2839 .LVL290:
- 2840 .L192:
-3327:Src/main.c **** {
- 2841 .loc 1 3327 2 is_stmt 1 view .LVU851
-3327:Src/main.c **** {
- 2842 .loc 1 3327 5 is_stmt 0 view .LVU852
- 2843 0070 18F40E6F tst r8, #2272
- 2844 0074 00D0 beq .L193
-3329:Src/main.c **** }
- 2845 .loc 1 3329 6 view .LVU853
- 2846 0076 0024 movs r4, #0
- 2847 .LVL291:
- 2848 .L193:
-3333:Src/main.c **** {
- 2849 .loc 1 3333 2 is_stmt 1 view .LVU854
-3333:Src/main.c **** {
- 2850 .loc 1 3333 5 is_stmt 0 view .LVU855
- 2851 0078 10F03F0F tst r0, #63
- 2852 007c 00D0 beq .L194
-3335:Src/main.c **** }
- 2853 .loc 1 3335 6 view .LVU856
- 2854 007e 0024 movs r4, #0
- 2855 .LVL292:
- 2856 .L194:
-3338:Src/main.c **** {
- 2857 .loc 1 3338 2 is_stmt 1 view .LVU857
-3338:Src/main.c **** {
- 2858 .loc 1 3338 5 is_stmt 0 view .LVU858
- 2859 0080 27B1 cbz r7, .L195
-3338:Src/main.c **** {
- 2860 .loc 1 3338 17 discriminator 1 view .LVU859
- 2861 0082 019B ldr r3, [sp, #4]
- 2862 0084 13F0010F tst r3, #1
- 2863 0088 00D1 bne .L195
-3340:Src/main.c **** }
- 2864 .loc 1 3340 6 view .LVU860
- 2865 008a 0024 movs r4, #0
- 2866 .LVL293:
- 2867 .L195:
-3343:Src/main.c **** {
- 2868 .loc 1 3343 2 is_stmt 1 view .LVU861
-3343:Src/main.c **** {
- 2869 .loc 1 3343 6 is_stmt 0 view .LVU862
- 2870 008c 2720 movs r0, #39
- 2871 .LVL294:
-3343:Src/main.c **** {
- 2872 .loc 1 3343 6 view .LVU863
- 2873 008e FFF7FEFF bl AD9102_ReadReg
- 2874 .LVL295:
-3343:Src/main.c **** {
- 2875 .loc 1 3343 5 discriminator 1 view .LVU864
- 2876 0092 43F21223 movw r3, #12818
- ARM GAS /tmp/ccLSPxIe.s page 193
-
-
- 2877 0096 9842 cmp r0, r3
- 2878 0098 00D0 beq .L196
-3345:Src/main.c **** }
- 2879 .loc 1 3345 6 view .LVU865
- 2880 009a 0024 movs r4, #0
- 2881 .LVL296:
- 2882 .L196:
-3347:Src/main.c **** {
- 2883 .loc 1 3347 2 is_stmt 1 view .LVU866
-3347:Src/main.c **** {
- 2884 .loc 1 3347 6 is_stmt 0 view .LVU867
- 2885 009c 2820 movs r0, #40
- 2886 009e FFF7FEFF bl AD9102_ReadReg
- 2887 .LVL297:
-3347:Src/main.c **** {
- 2888 .loc 1 3347 5 discriminator 1 view .LVU868
- 2889 00a2 B042 cmp r0, r6
- 2890 00a4 00D0 beq .L197
-3349:Src/main.c **** }
- 2891 .loc 1 3349 6 view .LVU869
- 2892 00a6 0024 movs r4, #0
- 2893 .LVL298:
- 2894 .L197:
-3351:Src/main.c **** {
- 2895 .loc 1 3351 2 is_stmt 1 view .LVU870
-3351:Src/main.c **** {
- 2896 .loc 1 3351 6 is_stmt 0 view .LVU871
- 2897 00a8 2920 movs r0, #41
- 2898 00aa FFF7FEFF bl AD9102_ReadReg
- 2899 .LVL299:
-3351:Src/main.c **** {
- 2900 .loc 1 3351 5 discriminator 1 view .LVU872
- 2901 00ae 5845 cmp r0, fp
- 2902 00b0 00D0 beq .L198
-3353:Src/main.c **** }
- 2903 .loc 1 3353 6 view .LVU873
- 2904 00b2 0024 movs r4, #0
- 2905 .LVL300:
- 2906 .L198:
-3355:Src/main.c **** {
- 2907 .loc 1 3355 2 is_stmt 1 view .LVU874
-3355:Src/main.c **** {
- 2908 .loc 1 3355 6 is_stmt 0 view .LVU875
- 2909 00b4 1F20 movs r0, #31
- 2910 00b6 FFF7FEFF bl AD9102_ReadReg
- 2911 .LVL301:
-3355:Src/main.c **** {
- 2912 .loc 1 3355 5 discriminator 1 view .LVU876
- 2913 00ba 00B1 cbz r0, .L199
-3357:Src/main.c **** }
- 2914 .loc 1 3357 6 view .LVU877
- 2915 00bc 0024 movs r4, #0
- 2916 .LVL302:
- 2917 .L199:
-3359:Src/main.c **** {
- 2918 .loc 1 3359 2 is_stmt 1 view .LVU878
-3359:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 194
-
-
- 2919 .loc 1 3359 6 is_stmt 0 view .LVU879
- 2920 00be 3720 movs r0, #55
- 2921 00c0 FFF7FEFF bl AD9102_ReadReg
- 2922 .LVL303:
-3359:Src/main.c **** {
- 2923 .loc 1 3359 5 discriminator 1 view .LVU880
- 2924 00c4 A842 cmp r0, r5
- 2925 00c6 00D0 beq .L200
-3361:Src/main.c **** }
- 2926 .loc 1 3361 6 view .LVU881
- 2927 00c8 0024 movs r4, #0
- 2928 .LVL304:
- 2929 .L200:
-3364:Src/main.c **** }
- 2930 .loc 1 3364 2 is_stmt 1 view .LVU882
-3365:Src/main.c ****
- 2931 .loc 1 3365 1 is_stmt 0 view .LVU883
- 2932 00ca 84F00100 eor r0, r4, #1
- 2933 00ce 03B0 add sp, sp, #12
- 2934 .LCFI28:
- 2935 .cfi_remember_state
- 2936 .cfi_def_cfa_offset 36
- 2937 @ sp needed
- 2938 00d0 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
- 2939 .LVL305:
- 2940 .L204:
- 2941 .LCFI29:
- 2942 .cfi_restore_state
-3317:Src/main.c **** }
- 2943 .loc 1 3317 6 view .LVU884
- 2944 00d4 0024 movs r4, #0
- 2945 00d6 C7E7 b .L191
- 2946 .cfi_endproc
- 2947 .LFE1233:
- 2949 .section .text.AD9102_CommitWaveUpload,"ax",%progbits
- 2950 .align 1
- 2951 .syntax unified
- 2952 .thumb
- 2953 .thumb_func
- 2955 AD9102_CommitWaveUpload:
- 2956 .LVL306:
- 2957 .LFB1228:
-3074:Src/main.c **** uint16_t pat_status;
- 2958 .loc 1 3074 1 is_stmt 1 view -0
- 2959 .cfi_startproc
- 2960 @ args = 0, pretend = 0, frame = 0
- 2961 @ frame_needed = 0, uses_anonymous_args = 0
-3074:Src/main.c **** uint16_t pat_status;
- 2962 .loc 1 3074 1 is_stmt 0 view .LVU886
- 2963 0000 38B5 push {r3, r4, r5, lr}
- 2964 .LCFI30:
- 2965 .cfi_def_cfa_offset 16
- 2966 .cfi_offset 3, -16
- 2967 .cfi_offset 4, -12
- 2968 .cfi_offset 5, -8
- 2969 .cfi_offset 14, -4
-3075:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 195
-
-
- 2970 .loc 1 3075 2 is_stmt 1 view .LVU887
-3077:Src/main.c **** {
- 2971 .loc 1 3077 2 view .LVU888
-3077:Src/main.c **** {
- 2972 .loc 1 3077 5 is_stmt 0 view .LVU889
- 2973 0002 0546 mov r5, r0
- 2974 0004 08B1 cbz r0, .L216
-3079:Src/main.c **** }
- 2975 .loc 1 3079 3 is_stmt 1 view .LVU890
-3079:Src/main.c **** }
- 2976 .loc 1 3079 7 is_stmt 0 view .LVU891
- 2977 0006 0023 movs r3, #0
- 2978 0008 0370 strb r3, [r0]
- 2979 .L216:
-3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) ||
- 2980 .loc 1 3082 2 is_stmt 1 view .LVU892
-3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) ||
- 2981 .loc 1 3082 33 is_stmt 0 view .LVU893
- 2982 000a 1A4B ldr r3, .L221
- 2983 000c 1B78 ldrb r3, [r3] @ zero_extendqisi2
-3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) ||
- 2984 .loc 1 3082 5 view .LVU894
- 2985 000e 3BB1 cbz r3, .L217
-3083:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples))
- 2986 .loc 1 3083 36 view .LVU895
- 2987 0010 194B ldr r3, .L221+4
- 2988 0012 1B88 ldrh r3, [r3]
-3082:Src/main.c **** (ad9102_wave_expected_samples < 2u) ||
- 2989 .loc 1 3082 40 discriminator 1 view .LVU896
- 2990 0014 012B cmp r3, #1
- 2991 0016 03D9 bls .L217
-3084:Src/main.c **** {
- 2992 .loc 1 3084 35 view .LVU897
- 2993 0018 184A ldr r2, .L221+8
- 2994 001a 1288 ldrh r2, [r2]
-3083:Src/main.c **** (ad9102_wave_written_samples != ad9102_wave_expected_samples))
- 2995 .loc 1 3083 42 view .LVU898
- 2996 001c 9342 cmp r3, r2
- 2997 001e 07D0 beq .L218
- 2998 .L217:
-3086:Src/main.c **** return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
- 2999 .loc 1 3086 3 is_stmt 1 view .LVU899
- 3000 0020 FFF7FEFF bl AD9102_CancelWaveUpload
- 3001 .LVL307:
-3087:Src/main.c **** }
- 3002 .loc 1 3087 3 view .LVU900
-3087:Src/main.c **** }
- 3003 .loc 1 3087 10 is_stmt 0 view .LVU901
- 3004 0024 1E20 movs r0, #30
- 3005 0026 FFF7FEFF bl AD9102_ReadReg
- 3006 .LVL308:
- 3007 002a 0446 mov r4, r0
- 3008 .L219:
-3104:Src/main.c ****
- 3009 .loc 1 3104 1 view .LVU902
- 3010 002c 2046 mov r0, r4
- 3011 002e 38BD pop {r3, r4, r5, pc}
- ARM GAS /tmp/ccLSPxIe.s page 196
-
-
- 3012 .LVL309:
- 3013 .L218:
-3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- 3014 .loc 1 3090 2 is_stmt 1 view .LVU903
- 3015 0030 0021 movs r1, #0
- 3016 0032 1E20 movs r0, #30
- 3017 .LVL310:
-3090:Src/main.c **** AD9102_WriteReg(AD9102_REG_START_ADDR, 0x0000u);
- 3018 .loc 1 3090 2 is_stmt 0 view .LVU904
- 3019 0034 FFF7FEFF bl AD9102_WriteReg
- 3020 .LVL311:
-3091:Src/main.c **** AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((ad9102_wave_expected_samples - 1u) << 4));
- 3021 .loc 1 3091 2 is_stmt 1 view .LVU905
- 3022 0038 0021 movs r1, #0
- 3023 003a 5D20 movs r0, #93
- 3024 003c FFF7FEFF bl AD9102_WriteReg
- 3025 .LVL312:
-3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 3026 .loc 1 3092 2 view .LVU906
-3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 3027 .loc 1 3092 81 is_stmt 0 view .LVU907
- 3028 0040 0D4B ldr r3, .L221+4
- 3029 0042 1988 ldrh r1, [r3]
- 3030 0044 0139 subs r1, r1, #1
- 3031 0046 89B2 uxth r1, r1
-3092:Src/main.c **** AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
- 3032 .loc 1 3092 2 view .LVU908
- 3033 0048 0901 lsls r1, r1, #4
- 3034 004a 89B2 uxth r1, r1
- 3035 004c 5E20 movs r0, #94
- 3036 004e FFF7FEFF bl AD9102_WriteReg
- 3037 .LVL313:
-3093:Src/main.c **** AD9102_StartOutput();
- 3038 .loc 1 3093 2 is_stmt 1 view .LVU909
- 3039 0052 0121 movs r1, #1
- 3040 0054 1D20 movs r0, #29
- 3041 0056 FFF7FEFF bl AD9102_WriteReg
- 3042 .LVL314:
-3094:Src/main.c **** pat_status = AD9102_ReadReg(AD9102_REG_PAT_STATUS);
- 3043 .loc 1 3094 2 view .LVU910
- 3044 005a FFF7FEFF bl AD9102_StartOutput
- 3045 .LVL315:
-3095:Src/main.c ****
- 3046 .loc 1 3095 2 view .LVU911
-3095:Src/main.c ****
- 3047 .loc 1 3095 15 is_stmt 0 view .LVU912
- 3048 005e 1E20 movs r0, #30
- 3049 0060 FFF7FEFF bl AD9102_ReadReg
- 3050 .LVL316:
- 3051 0064 0446 mov r4, r0
- 3052 .LVL317:
-3097:Src/main.c **** if (ok != NULL)
- 3053 .loc 1 3097 2 is_stmt 1 view .LVU913
- 3054 0066 FFF7FEFF bl AD9102_ResetWaveUploadState
- 3055 .LVL318:
-3098:Src/main.c **** {
- 3056 .loc 1 3098 2 view .LVU914
- ARM GAS /tmp/ccLSPxIe.s page 197
-
-
-3098:Src/main.c **** {
- 3057 .loc 1 3098 5 is_stmt 0 view .LVU915
- 3058 006a 002D cmp r5, #0
- 3059 006c DED0 beq .L219
-3100:Src/main.c **** }
- 3060 .loc 1 3100 3 is_stmt 1 view .LVU916
-3100:Src/main.c **** }
- 3061 .loc 1 3100 7 is_stmt 0 view .LVU917
- 3062 006e 0123 movs r3, #1
- 3063 0070 2B70 strb r3, [r5]
- 3064 0072 DBE7 b .L219
- 3065 .L222:
- 3066 .align 2
- 3067 .L221:
- 3068 0074 00000000 .word ad9102_wave_upload_active
- 3069 0078 00000000 .word ad9102_wave_expected_samples
- 3070 007c 00000000 .word ad9102_wave_written_samples
- 3071 .cfi_endproc
- 3072 .LFE1228:
- 3074 .section .text.AD9102_CheckFlagsSram,"ax",%progbits
- 3075 .align 1
- 3076 .syntax unified
- 3077 .thumb
- 3078 .thumb_func
- 3080 AD9102_CheckFlagsSram:
- 3081 .LVL319:
- 3082 .LFB1234:
-3368:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 3083 .loc 1 3368 1 is_stmt 1 view -0
- 3084 .cfi_startproc
- 3085 @ args = 0, pretend = 0, frame = 8
- 3086 @ frame_needed = 0, uses_anonymous_args = 0
-3368:Src/main.c **** uint16_t spiconfig = AD9102_ReadReg(AD9102_REG_SPICONFIG);
- 3087 .loc 1 3368 1 is_stmt 0 view .LVU919
- 3088 0000 2DE9F04F push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- 3089 .LCFI31:
- 3090 .cfi_def_cfa_offset 36
- 3091 .cfi_offset 4, -36
- 3092 .cfi_offset 5, -32
- 3093 .cfi_offset 6, -28
- 3094 .cfi_offset 7, -24
- 3095 .cfi_offset 8, -20
- 3096 .cfi_offset 9, -16
- 3097 .cfi_offset 10, -12
- 3098 .cfi_offset 11, -8
- 3099 .cfi_offset 14, -4
- 3100 0004 83B0 sub sp, sp, #12
- 3101 .LCFI32:
- 3102 .cfi_def_cfa_offset 48
- 3103 0006 8346 mov fp, r0
- 3104 0008 0F46 mov r7, r1
- 3105 000a 1446 mov r4, r2
- 3106 000c 1D46 mov r5, r3
-3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 3107 .loc 1 3369 2 is_stmt 1 view .LVU920
-3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 3108 .loc 1 3369 23 is_stmt 0 view .LVU921
- ARM GAS /tmp/ccLSPxIe.s page 198
-
-
- 3109 000e 0020 movs r0, #0
- 3110 .LVL320:
-3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 3111 .loc 1 3369 23 view .LVU922
- 3112 0010 FFF7FEFF bl AD9102_ReadReg
- 3113 .LVL321:
-3369:Src/main.c **** uint16_t powercfg = AD9102_ReadReg(AD9102_REG_POWERCONFIG);
- 3114 .loc 1 3369 23 view .LVU923
- 3115 0014 8246 mov r10, r0
- 3116 .LVL322:
-3370:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 3117 .loc 1 3370 2 is_stmt 1 view .LVU924
-3370:Src/main.c **** uint16_t clockcfg = AD9102_ReadReg(AD9102_REG_CLOCKCONFIG);
- 3118 .loc 1 3370 22 is_stmt 0 view .LVU925
- 3119 0016 0120 movs r0, #1
- 3120 0018 FFF7FEFF bl AD9102_ReadReg
- 3121 .LVL323:
- 3122 001c 8146 mov r9, r0
- 3123 .LVL324:
-3371:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 3124 .loc 1 3371 2 is_stmt 1 view .LVU926
-3371:Src/main.c **** uint16_t cfg_err = AD9102_ReadReg(AD9102_REG_CFG_ERROR);
- 3125 .loc 1 3371 22 is_stmt 0 view .LVU927
- 3126 001e 0220 movs r0, #2
- 3127 0020 FFF7FEFF bl AD9102_ReadReg
- 3128 .LVL325:
- 3129 0024 8046 mov r8, r0
- 3130 .LVL326:
-3372:Src/main.c ****
- 3131 .loc 1 3372 2 is_stmt 1 view .LVU928
-3372:Src/main.c ****
- 3132 .loc 1 3372 21 is_stmt 0 view .LVU929
- 3133 0026 6020 movs r0, #96
- 3134 0028 FFF7FEFF bl AD9102_ReadReg
- 3135 .LVL327:
-3374:Src/main.c **** {
- 3136 .loc 1 3374 2 is_stmt 1 view .LVU930
-3374:Src/main.c **** {
- 3137 .loc 1 3374 5 is_stmt 0 view .LVU931
- 3138 002c 1CB1 cbz r4, .L240
-3378:Src/main.c **** {
- 3139 .loc 1 3378 2 is_stmt 1 view .LVU932
-3378:Src/main.c **** {
- 3140 .loc 1 3378 5 is_stmt 0 view .LVU933
- 3141 002e 012C cmp r4, #1
- 3142 0030 02D8 bhi .L224
-3380:Src/main.c **** }
- 3143 .loc 1 3380 11 view .LVU934
- 3144 0032 0224 movs r4, #2
- 3145 .LVL328:
-3380:Src/main.c **** }
- 3146 .loc 1 3380 11 view .LVU935
- 3147 0034 03E0 b .L225
- 3148 .LVL329:
- 3149 .L240:
-3376:Src/main.c **** }
- 3150 .loc 1 3376 11 view .LVU936
- ARM GAS /tmp/ccLSPxIe.s page 199
-
-
- 3151 0036 1024 movs r4, #16
- 3152 .LVL330:
- 3153 .L224:
-3382:Src/main.c **** {
- 3154 .loc 1 3382 2 is_stmt 1 view .LVU937
-3382:Src/main.c **** {
- 3155 .loc 1 3382 5 is_stmt 0 view .LVU938
- 3156 0038 B4F5805F cmp r4, #4096
- 3157 003c 04D8 bhi .L242
- 3158 .LVL331:
- 3159 .L225:
-3386:Src/main.c **** {
- 3160 .loc 1 3386 2 is_stmt 1 view .LVU939
-3386:Src/main.c **** {
- 3161 .loc 1 3386 5 is_stmt 0 view .LVU940
- 3162 003e 35B1 cbz r5, .L243
-3390:Src/main.c **** {
- 3163 .loc 1 3390 2 is_stmt 1 view .LVU941
-3390:Src/main.c **** {
- 3164 .loc 1 3390 5 is_stmt 0 view .LVU942
- 3165 0040 0F2D cmp r5, #15
- 3166 0042 05D9 bls .L226
-3392:Src/main.c **** }
- 3167 .loc 1 3392 8 view .LVU943
- 3168 0044 0F25 movs r5, #15
- 3169 .LVL332:
-3392:Src/main.c **** }
- 3170 .loc 1 3392 8 view .LVU944
- 3171 0046 03E0 b .L226
- 3172 .LVL333:
- 3173 .L242:
-3384:Src/main.c **** }
- 3174 .loc 1 3384 11 view .LVU945
- 3175 0048 4FF48054 mov r4, #4096
- 3176 .LVL334:
-3384:Src/main.c **** }
- 3177 .loc 1 3384 11 view .LVU946
- 3178 004c F7E7 b .L225
- 3179 .LVL335:
- 3180 .L243:
-3388:Src/main.c **** }
- 3181 .loc 1 3388 8 view .LVU947
- 3182 004e 0125 movs r5, #1
- 3183 .LVL336:
- 3184 .L226:
-3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 3185 .loc 1 3395 2 is_stmt 1 view .LVU948
-3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 3186 .loc 1 3395 63 is_stmt 0 view .LVU949
- 3187 0050 2E02 lsls r6, r5, #8
- 3188 0052 06F47066 and r6, r6, #3840
-3395:Src/main.c **** ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
- 3189 .loc 1 3395 11 view .LVU950
- 3190 0056 46F01106 orr r6, r6, #17
- 3191 .LVL337:
-3398:Src/main.c **** if (pat_period == 0u)
- 3192 .loc 1 3398 2 is_stmt 1 view .LVU951
- ARM GAS /tmp/ccLSPxIe.s page 200
-
-
-3398:Src/main.c **** if (pat_period == 0u)
- 3193 .loc 1 3398 24 is_stmt 0 view .LVU952
- 3194 005a 0194 str r4, [sp, #4]
-3398:Src/main.c **** if (pat_period == 0u)
- 3195 .loc 1 3398 44 view .LVU953
- 3196 005c 05F00F05 and r5, r5, #15
- 3197 .LVL338:
-3398:Src/main.c **** if (pat_period == 0u)
- 3198 .loc 1 3398 11 view .LVU954
- 3199 0060 04FB05F5 mul r5, r4, r5
- 3200 .LVL339:
-3399:Src/main.c **** {
- 3201 .loc 1 3399 2 is_stmt 1 view .LVU955
-3399:Src/main.c **** {
- 3202 .loc 1 3399 5 is_stmt 0 view .LVU956
- 3203 0064 1DB1 cbz r5, .L227
-3403:Src/main.c **** {
- 3204 .loc 1 3403 2 is_stmt 1 view .LVU957
-3403:Src/main.c **** {
- 3205 .loc 1 3403 5 is_stmt 0 view .LVU958
- 3206 0066 B5F5803F cmp r5, #65536
- 3207 006a 4CD2 bcs .L245
- 3208 006c 0195 str r5, [sp, #4]
- 3209 .L227:
- 3210 .LVL340:
-3408:Src/main.c ****
- 3211 .loc 1 3408 2 is_stmt 1 view .LVU959
-3408:Src/main.c ****
- 3212 .loc 1 3408 43 is_stmt 0 view .LVU960
- 3213 006e 013C subs r4, r4, #1
- 3214 .LVL341:
-3408:Src/main.c ****
- 3215 .loc 1 3408 43 view .LVU961
- 3216 0070 A4B2 uxth r4, r4
-3408:Src/main.c ****
- 3217 .loc 1 3408 11 view .LVU962
- 3218 0072 2401 lsls r4, r4, #4
- 3219 0074 A4B2 uxth r4, r4
- 3220 .LVL342:
-3410:Src/main.c ****
- 3221 .loc 1 3410 2 is_stmt 1 view .LVU963
-3412:Src/main.c **** {
- 3222 .loc 1 3412 2 view .LVU964
-3412:Src/main.c **** {
- 3223 .loc 1 3412 5 is_stmt 0 view .LVU965
- 3224 0076 BAF1000F cmp r10, #0
- 3225 007a 48D1 bne .L246
-3410:Src/main.c ****
- 3226 .loc 1 3410 10 view .LVU966
- 3227 007c 0125 movs r5, #1
- 3228 .L228:
- 3229 .LVL343:
-3416:Src/main.c **** {
- 3230 .loc 1 3416 2 is_stmt 1 view .LVU967
-3416:Src/main.c **** {
- 3231 .loc 1 3416 5 is_stmt 0 view .LVU968
- 3232 007e 19F4F47F tst r9, #488
- ARM GAS /tmp/ccLSPxIe.s page 201
-
-
- 3233 0082 00D0 beq .L229
-3418:Src/main.c **** }
- 3234 .loc 1 3418 6 view .LVU969
- 3235 0084 0025 movs r5, #0
- 3236 .LVL344:
- 3237 .L229:
-3420:Src/main.c **** {
- 3238 .loc 1 3420 2 is_stmt 1 view .LVU970
-3420:Src/main.c **** {
- 3239 .loc 1 3420 5 is_stmt 0 view .LVU971
- 3240 0086 18F40E6F tst r8, #2272
- 3241 008a 00D0 beq .L230
-3422:Src/main.c **** }
- 3242 .loc 1 3422 6 view .LVU972
- 3243 008c 0025 movs r5, #0
- 3244 .LVL345:
- 3245 .L230:
-3424:Src/main.c **** {
- 3246 .loc 1 3424 2 is_stmt 1 view .LVU973
-3424:Src/main.c **** {
- 3247 .loc 1 3424 5 is_stmt 0 view .LVU974
- 3248 008e 10F03F0F tst r0, #63
- 3249 0092 00D0 beq .L231
-3426:Src/main.c **** }
- 3250 .loc 1 3426 6 view .LVU975
- 3251 0094 0025 movs r5, #0
- 3252 .LVL346:
- 3253 .L231:
-3428:Src/main.c **** {
- 3254 .loc 1 3428 2 is_stmt 1 view .LVU976
-3428:Src/main.c **** {
- 3255 .loc 1 3428 5 is_stmt 0 view .LVU977
- 3256 0096 1FB1 cbz r7, .L232
-3428:Src/main.c **** {
- 3257 .loc 1 3428 17 discriminator 1 view .LVU978
- 3258 0098 1BF0010F tst fp, #1
- 3259 009c 00D1 bne .L232
-3430:Src/main.c **** }
- 3260 .loc 1 3430 6 view .LVU979
- 3261 009e 0025 movs r5, #0
- 3262 .LVL347:
- 3263 .L232:
-3433:Src/main.c **** {
- 3264 .loc 1 3433 2 is_stmt 1 view .LVU980
-3433:Src/main.c **** {
- 3265 .loc 1 3433 6 is_stmt 0 view .LVU981
- 3266 00a0 2720 movs r0, #39
- 3267 .LVL348:
-3433:Src/main.c **** {
- 3268 .loc 1 3433 6 view .LVU982
- 3269 00a2 FFF7FEFF bl AD9102_ReadReg
- 3270 .LVL349:
-3433:Src/main.c **** {
- 3271 .loc 1 3433 5 discriminator 1 view .LVU983
- 3272 00a6 43F23003 movw r3, #12336
- 3273 00aa 9842 cmp r0, r3
- 3274 00ac 00D0 beq .L233
- ARM GAS /tmp/ccLSPxIe.s page 202
-
-
-3435:Src/main.c **** }
- 3275 .loc 1 3435 6 view .LVU984
- 3276 00ae 0025 movs r5, #0
- 3277 .LVL350:
- 3278 .L233:
-3437:Src/main.c **** {
- 3279 .loc 1 3437 2 is_stmt 1 view .LVU985
-3437:Src/main.c **** {
- 3280 .loc 1 3437 6 is_stmt 0 view .LVU986
- 3281 00b0 2820 movs r0, #40
- 3282 00b2 FFF7FEFF bl AD9102_ReadReg
- 3283 .LVL351:
-3437:Src/main.c **** {
- 3284 .loc 1 3437 5 discriminator 1 view .LVU987
- 3285 00b6 B042 cmp r0, r6
- 3286 00b8 00D0 beq .L234
-3439:Src/main.c **** }
- 3287 .loc 1 3439 6 view .LVU988
- 3288 00ba 0025 movs r5, #0
- 3289 .LVL352:
- 3290 .L234:
-3441:Src/main.c **** {
- 3291 .loc 1 3441 2 is_stmt 1 view .LVU989
-3441:Src/main.c **** {
- 3292 .loc 1 3441 6 is_stmt 0 view .LVU990
- 3293 00bc 2920 movs r0, #41
- 3294 00be FFF7FEFF bl AD9102_ReadReg
- 3295 .LVL353:
-3441:Src/main.c **** {
- 3296 .loc 1 3441 44 discriminator 1 view .LVU991
- 3297 00c2 BDF80430 ldrh r3, [sp, #4]
-3441:Src/main.c **** {
- 3298 .loc 1 3441 5 discriminator 1 view .LVU992
- 3299 00c6 9842 cmp r0, r3
- 3300 00c8 00D0 beq .L235
-3443:Src/main.c **** }
- 3301 .loc 1 3443 6 view .LVU993
- 3302 00ca 0025 movs r5, #0
- 3303 .LVL354:
- 3304 .L235:
-3445:Src/main.c **** {
- 3305 .loc 1 3445 2 is_stmt 1 view .LVU994
-3445:Src/main.c **** {
- 3306 .loc 1 3445 6 is_stmt 0 view .LVU995
- 3307 00cc 1F20 movs r0, #31
- 3308 00ce FFF7FEFF bl AD9102_ReadReg
- 3309 .LVL355:
-3445:Src/main.c **** {
- 3310 .loc 1 3445 5 discriminator 1 view .LVU996
- 3311 00d2 00B1 cbz r0, .L236
-3447:Src/main.c **** }
- 3312 .loc 1 3447 6 view .LVU997
- 3313 00d4 0025 movs r5, #0
- 3314 .LVL356:
- 3315 .L236:
-3449:Src/main.c **** {
- 3316 .loc 1 3449 2 is_stmt 1 view .LVU998
- ARM GAS /tmp/ccLSPxIe.s page 203
-
-
-3449:Src/main.c **** {
- 3317 .loc 1 3449 6 is_stmt 0 view .LVU999
- 3318 00d6 5D20 movs r0, #93
- 3319 00d8 FFF7FEFF bl AD9102_ReadReg
- 3320 .LVL357:
-3449:Src/main.c **** {
- 3321 .loc 1 3449 5 discriminator 1 view .LVU1000
- 3322 00dc 00B1 cbz r0, .L237
-3451:Src/main.c **** }
- 3323 .loc 1 3451 6 view .LVU1001
- 3324 00de 0025 movs r5, #0
- 3325 .LVL358:
- 3326 .L237:
-3453:Src/main.c **** {
- 3327 .loc 1 3453 2 is_stmt 1 view .LVU1002
-3453:Src/main.c **** {
- 3328 .loc 1 3453 6 is_stmt 0 view .LVU1003
- 3329 00e0 5E20 movs r0, #94
- 3330 00e2 FFF7FEFF bl AD9102_ReadReg
- 3331 .LVL359:
-3453:Src/main.c **** {
- 3332 .loc 1 3453 5 discriminator 1 view .LVU1004
- 3333 00e6 A042 cmp r0, r4
- 3334 00e8 00D0 beq .L238
-3455:Src/main.c **** }
- 3335 .loc 1 3455 6 view .LVU1005
- 3336 00ea 0025 movs r5, #0
- 3337 .LVL360:
- 3338 .L238:
-3457:Src/main.c **** {
- 3339 .loc 1 3457 2 is_stmt 1 view .LVU1006
-3457:Src/main.c **** {
- 3340 .loc 1 3457 6 is_stmt 0 view .LVU1007
- 3341 00ec 2B20 movs r0, #43
- 3342 00ee FFF7FEFF bl AD9102_ReadReg
- 3343 .LVL361:
-3457:Src/main.c **** {
- 3344 .loc 1 3457 5 discriminator 1 view .LVU1008
- 3345 00f2 40F20113 movw r3, #257
- 3346 00f6 9842 cmp r0, r3
- 3347 00f8 00D0 beq .L239
-3459:Src/main.c **** }
- 3348 .loc 1 3459 6 view .LVU1009
- 3349 00fa 0025 movs r5, #0
- 3350 .LVL362:
- 3351 .L239:
-3462:Src/main.c **** }
- 3352 .loc 1 3462 2 is_stmt 1 view .LVU1010
-3463:Src/main.c ****
- 3353 .loc 1 3463 1 is_stmt 0 view .LVU1011
- 3354 00fc 85F00100 eor r0, r5, #1
- 3355 0100 03B0 add sp, sp, #12
- 3356 .LCFI33:
- 3357 .cfi_remember_state
- 3358 .cfi_def_cfa_offset 36
- 3359 @ sp needed
- 3360 0102 BDE8F08F pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
- ARM GAS /tmp/ccLSPxIe.s page 204
-
-
- 3361 .LVL363:
- 3362 .L245:
- 3363 .LCFI34:
- 3364 .cfi_restore_state
-3405:Src/main.c **** }
- 3365 .loc 1 3405 14 view .LVU1012
- 3366 0106 4FF6FF73 movw r3, #65535
- 3367 010a 0193 str r3, [sp, #4]
- 3368 010c AFE7 b .L227
- 3369 .LVL364:
- 3370 .L246:
-3414:Src/main.c **** }
- 3371 .loc 1 3414 6 view .LVU1013
- 3372 010e 0025 movs r5, #0
- 3373 0110 B5E7 b .L228
- 3374 .cfi_endproc
- 3375 .LFE1234:
- 3377 .section .text.AD9833_WriteWord,"ax",%progbits
- 3378 .align 1
- 3379 .syntax unified
- 3380 .thumb
- 3381 .thumb_func
- 3383 AD9833_WriteWord:
- 3384 .LVL365:
- 3385 .LFB1214:
-2767:Src/main.c **** uint32_t tmp32 = 0;
- 3386 .loc 1 2767 1 is_stmt 1 view -0
- 3387 .cfi_startproc
- 3388 @ args = 0, pretend = 0, frame = 0
- 3389 @ frame_needed = 0, uses_anonymous_args = 0
-2767:Src/main.c **** uint32_t tmp32 = 0;
- 3390 .loc 1 2767 1 is_stmt 0 view .LVU1015
- 3391 0000 38B5 push {r3, r4, r5, lr}
- 3392 .LCFI35:
- 3393 .cfi_def_cfa_offset 16
- 3394 .cfi_offset 3, -16
- 3395 .cfi_offset 4, -12
- 3396 .cfi_offset 5, -8
- 3397 .cfi_offset 14, -4
- 3398 0002 0446 mov r4, r0
-2768:Src/main.c ****
- 3399 .loc 1 2768 2 is_stmt 1 view .LVU1016
- 3400 .LVL366:
-2770:Src/main.c ****
- 3401 .loc 1 2770 2 view .LVU1017
- 3402 0004 0021 movs r1, #0
- 3403 0006 0220 movs r0, #2
- 3404 .LVL367:
-2770:Src/main.c ****
- 3405 .loc 1 2770 2 is_stmt 0 view .LVU1018
- 3406 0008 FFF7FEFF bl SPI2_SetMode
- 3407 .LVL368:
-2772:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
- 3408 .loc 1 2772 2 is_stmt 1 view .LVU1019
- 3409 000c 1E4D ldr r5, .L267
- 3410 000e 0122 movs r2, #1
- 3411 0010 4FF48051 mov r1, #4096
- ARM GAS /tmp/ccLSPxIe.s page 205
-
-
- 3412 0014 2846 mov r0, r5
- 3413 0016 FFF7FEFF bl HAL_GPIO_WritePin
- 3414 .LVL369:
-2773:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
- 3415 .loc 1 2773 2 view .LVU1020
- 3416 001a 0122 movs r2, #1
- 3417 001c 4FF48041 mov r1, #16384
- 3418 0020 2846 mov r0, r5
- 3419 0022 FFF7FEFF bl HAL_GPIO_WritePin
- 3420 .LVL370:
-2774:Src/main.c ****
- 3421 .loc 1 2774 2 view .LVU1021
- 3422 0026 05F50065 add r5, r5, #2048
- 3423 002a 0122 movs r2, #1
- 3424 002c 4FF48051 mov r1, #4096
- 3425 0030 2846 mov r0, r5
- 3426 0032 FFF7FEFF bl HAL_GPIO_WritePin
- 3427 .LVL371:
-2776:Src/main.c ****
- 3428 .loc 1 2776 2 view .LVU1022
- 3429 0036 0022 movs r2, #0
- 3430 0038 4FF40051 mov r1, #8192
- 3431 003c 2846 mov r0, r5
- 3432 003e FFF7FEFF bl HAL_GPIO_WritePin
- 3433 .LVL372:
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- 3434 .loc 1 2778 2 view .LVU1023
-2768:Src/main.c ****
- 3435 .loc 1 2768 11 is_stmt 0 view .LVU1024
- 3436 0042 0023 movs r3, #0
- 3437 .LVL373:
- 3438 .L261:
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- 3439 .loc 1 2778 63 is_stmt 1 discriminator 2 view .LVU1025
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- 3440 .loc 1 2778 41 discriminator 2 view .LVU1026
- 3441 .LBB427:
- 3442 .LBI427:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3443 .loc 4 916 26 view .LVU1027
- 3444 .LBB428:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3445 .loc 4 918 3 view .LVU1028
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3446 .loc 4 918 12 is_stmt 0 view .LVU1029
- 3447 0044 114A ldr r2, .L267+4
- 3448 0046 9268 ldr r2, [r2, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3449 .loc 4 918 66 view .LVU1030
- 3450 0048 12F0020F tst r2, #2
- 3451 004c 05D1 bne .L260
- 3452 .LVL374:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3453 .loc 4 918 66 view .LVU1031
- 3454 .LBE428:
- 3455 .LBE427:
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- ARM GAS /tmp/ccLSPxIe.s page 206
-
-
- 3456 .loc 1 2778 50 discriminator 1 view .LVU1032
- 3457 004e 5A1C adds r2, r3, #1
- 3458 .LVL375:
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- 3459 .loc 1 2778 41 discriminator 1 view .LVU1033
- 3460 0050 B3F57A7F cmp r3, #1000
- 3461 0054 01D2 bcs .L260
-2778:Src/main.c **** LL_SPI_TransmitData16(SPI2, word);
- 3462 .loc 1 2778 50 discriminator 1 view .LVU1034
- 3463 0056 1346 mov r3, r2
- 3464 0058 F4E7 b .L261
- 3465 .LVL376:
- 3466 .L260:
-2779:Src/main.c **** tmp32 = 0;
- 3467 .loc 1 2779 2 is_stmt 1 view .LVU1035
- 3468 .LBB429:
- 3469 .LBI429:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3470 .loc 4 1373 22 view .LVU1036
- 3471 .LBB430:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 3472 .loc 4 1376 3 view .LVU1037
- 3473 .loc 4 1377 3 view .LVU1038
- 3474 .loc 4 1377 10 is_stmt 0 view .LVU1039
- 3475 005a 0C4B ldr r3, .L267+4
- 3476 005c 9C81 strh r4, [r3, #12] @ movhi
- 3477 .LVL377:
- 3478 .loc 4 1377 10 view .LVU1040
- 3479 .LBE430:
- 3480 .LBE429:
-2780:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 3481 .loc 1 2780 2 is_stmt 1 view .LVU1041
-2781:Src/main.c **** (void) SPI2->DR;
- 3482 .loc 1 2781 2 view .LVU1042
-2780:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
- 3483 .loc 1 2780 8 is_stmt 0 view .LVU1043
- 3484 005e 0023 movs r3, #0
- 3485 .LVL378:
- 3486 .L263:
-2781:Src/main.c **** (void) SPI2->DR;
- 3487 .loc 1 2781 64 is_stmt 1 discriminator 2 view .LVU1044
-2781:Src/main.c **** (void) SPI2->DR;
- 3488 .loc 1 2781 42 discriminator 2 view .LVU1045
- 3489 .LBB431:
- 3490 .LBI431:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3491 .loc 4 905 26 view .LVU1046
- 3492 .LBB432:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3493 .loc 4 907 3 view .LVU1047
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3494 .loc 4 907 12 is_stmt 0 view .LVU1048
- 3495 0060 0A4A ldr r2, .L267+4
- 3496 0062 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3497 .loc 4 907 68 view .LVU1049
- 3498 0064 12F0010F tst r2, #1
- ARM GAS /tmp/ccLSPxIe.s page 207
-
-
- 3499 0068 05D1 bne .L262
- 3500 .LVL379:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3501 .loc 4 907 68 view .LVU1050
- 3502 .LBE432:
- 3503 .LBE431:
-2781:Src/main.c **** (void) SPI2->DR;
- 3504 .loc 1 2781 51 discriminator 1 view .LVU1051
- 3505 006a 5A1C adds r2, r3, #1
- 3506 .LVL380:
-2781:Src/main.c **** (void) SPI2->DR;
- 3507 .loc 1 2781 42 discriminator 1 view .LVU1052
- 3508 006c B3F57A7F cmp r3, #1000
- 3509 0070 01D2 bcs .L262
-2781:Src/main.c **** (void) SPI2->DR;
- 3510 .loc 1 2781 51 discriminator 1 view .LVU1053
- 3511 0072 1346 mov r3, r2
- 3512 0074 F4E7 b .L263
- 3513 .LVL381:
- 3514 .L262:
-2782:Src/main.c ****
- 3515 .loc 1 2782 2 is_stmt 1 view .LVU1054
- 3516 0076 054B ldr r3, .L267+4
- 3517 0078 DB68 ldr r3, [r3, #12]
-2784:Src/main.c **** }
- 3518 .loc 1 2784 2 view .LVU1055
- 3519 007a 0122 movs r2, #1
- 3520 007c 4FF40051 mov r1, #8192
- 3521 0080 0348 ldr r0, .L267+8
- 3522 0082 FFF7FEFF bl HAL_GPIO_WritePin
- 3523 .LVL382:
-2785:Src/main.c ****
- 3524 .loc 1 2785 1 is_stmt 0 view .LVU1056
- 3525 0086 38BD pop {r3, r4, r5, pc}
- 3526 .LVL383:
- 3527 .L268:
-2785:Src/main.c ****
- 3528 .loc 1 2785 1 view .LVU1057
- 3529 .align 2
- 3530 .L267:
- 3531 0088 00040240 .word 1073873920
- 3532 008c 00380040 .word 1073756160
- 3533 0090 000C0240 .word 1073875968
- 3534 .cfi_endproc
- 3535 .LFE1214:
- 3537 .section .text.AD9833_Apply,"ax",%progbits
- 3538 .align 1
- 3539 .syntax unified
- 3540 .thumb
- 3541 .thumb_func
- 3543 AD9833_Apply:
- 3544 .LVL384:
- 3545 .LFB1215:
-2788:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1
- 3546 .loc 1 2788 1 is_stmt 1 view -0
- 3547 .cfi_startproc
- 3548 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccLSPxIe.s page 208
-
-
- 3549 @ frame_needed = 0, uses_anonymous_args = 0
-2788:Src/main.c **** uint16_t control = 0x2000u; // B28 = 1
- 3550 .loc 1 2788 1 is_stmt 0 view .LVU1059
- 3551 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 3552 .LCFI36:
- 3553 .cfi_def_cfa_offset 24
- 3554 .cfi_offset 4, -24
- 3555 .cfi_offset 5, -20
- 3556 .cfi_offset 6, -16
- 3557 .cfi_offset 7, -12
- 3558 .cfi_offset 8, -8
- 3559 .cfi_offset 14, -4
- 3560 0004 0546 mov r5, r0
-2789:Src/main.c **** if (triangle)
- 3561 .loc 1 2789 2 is_stmt 1 view .LVU1060
- 3562 .LVL385:
-2790:Src/main.c **** {
- 3563 .loc 1 2790 2 view .LVU1061
-2790:Src/main.c **** {
- 3564 .loc 1 2790 5 is_stmt 0 view .LVU1062
- 3565 0006 F9B9 cbnz r1, .L272
-2789:Src/main.c **** if (triangle)
- 3566 .loc 1 2789 11 view .LVU1063
- 3567 0008 4FF40057 mov r7, #8192
- 3568 .L270:
- 3569 .LVL386:
-2794:Src/main.c ****
- 3570 .loc 1 2794 2 is_stmt 1 view .LVU1064
-2794:Src/main.c ****
- 3571 .loc 1 2794 10 is_stmt 0 view .LVU1065
- 3572 000c 47F48078 orr r8, r7, #256
- 3573 .LVL387:
-2796:Src/main.c **** uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
- 3574 .loc 1 2796 2 is_stmt 1 view .LVU1066
-2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
- 3575 .loc 1 2797 2 view .LVU1067
-2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
- 3576 .loc 1 2797 49 is_stmt 0 view .LVU1068
- 3577 0010 C2F30D06 ubfx r6, r2, #0, #14
-2797:Src/main.c **** uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
- 3578 .loc 1 2797 11 view .LVU1069
- 3579 0014 46F48046 orr r6, r6, #16384
- 3580 .LVL388:
-2798:Src/main.c ****
- 3581 .loc 1 2798 2 is_stmt 1 view .LVU1070
-2798:Src/main.c ****
- 3582 .loc 1 2798 57 is_stmt 0 view .LVU1071
- 3583 0018 C2F38D32 ubfx r2, r2, #14, #14
- 3584 .LVL389:
-2798:Src/main.c ****
- 3585 .loc 1 2798 11 view .LVU1072
- 3586 001c 42F48044 orr r4, r2, #16384
- 3587 .LVL390:
-2800:Src/main.c **** AD9833_WriteWord(lsw);
- 3588 .loc 1 2800 2 is_stmt 1 view .LVU1073
- 3589 0020 4046 mov r0, r8
- 3590 .LVL391:
- ARM GAS /tmp/ccLSPxIe.s page 209
-
-
-2800:Src/main.c **** AD9833_WriteWord(lsw);
- 3591 .loc 1 2800 2 is_stmt 0 view .LVU1074
- 3592 0022 FFF7FEFF bl AD9833_WriteWord
- 3593 .LVL392:
-2801:Src/main.c **** AD9833_WriteWord(msw);
- 3594 .loc 1 2801 2 is_stmt 1 view .LVU1075
- 3595 0026 3046 mov r0, r6
- 3596 0028 FFF7FEFF bl AD9833_WriteWord
- 3597 .LVL393:
-2802:Src/main.c **** AD9833_WriteWord(0xC000u); // PHASE0 = 0
- 3598 .loc 1 2802 2 view .LVU1076
- 3599 002c 2046 mov r0, r4
- 3600 002e FFF7FEFF bl AD9833_WriteWord
- 3601 .LVL394:
-2803:Src/main.c ****
- 3602 .loc 1 2803 2 view .LVU1077
- 3603 0032 4FF44040 mov r0, #49152
- 3604 0036 FFF7FEFF bl AD9833_WriteWord
- 3605 .LVL395:
-2805:Src/main.c **** {
- 3606 .loc 1 2805 2 view .LVU1078
-2805:Src/main.c **** {
- 3607 .loc 1 2805 5 is_stmt 0 view .LVU1079
- 3608 003a 05B9 cbnz r5, .L271
-2794:Src/main.c ****
- 3609 .loc 1 2794 10 view .LVU1080
- 3610 003c 4746 mov r7, r8
- 3611 .L271:
- 3612 .LVL396:
-2809:Src/main.c **** }
- 3613 .loc 1 2809 2 is_stmt 1 view .LVU1081
- 3614 003e 3846 mov r0, r7
- 3615 0040 FFF7FEFF bl AD9833_WriteWord
- 3616 .LVL397:
-2810:Src/main.c ****
- 3617 .loc 1 2810 1 is_stmt 0 view .LVU1082
- 3618 0044 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 3619 .LVL398:
- 3620 .L272:
-2792:Src/main.c **** }
- 3621 .loc 1 2792 11 view .LVU1083
- 3622 0048 42F20207 movw r7, #8194
- 3623 004c DEE7 b .L270
- 3624 .cfi_endproc
- 3625 .LFE1215:
- 3627 .section .text.OUT_trigger,"ax",%progbits
- 3628 .align 1
- 3629 .syntax unified
- 3630 .thumb
- 3631 .thumb_func
- 3633 OUT_trigger:
- 3634 .LVL399:
- 3635 .LFB1211:
-2684:Src/main.c **** switch (out_n)
- 3636 .loc 1 2684 1 is_stmt 1 view -0
- 3637 .cfi_startproc
- 3638 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccLSPxIe.s page 210
-
-
- 3639 @ frame_needed = 0, uses_anonymous_args = 0
-2684:Src/main.c **** switch (out_n)
- 3640 .loc 1 2684 1 is_stmt 0 view .LVU1085
- 3641 0000 10B5 push {r4, lr}
- 3642 .LCFI37:
- 3643 .cfi_def_cfa_offset 8
- 3644 .cfi_offset 4, -8
- 3645 .cfi_offset 14, -4
-2685:Src/main.c **** {
- 3646 .loc 1 2685 2 is_stmt 1 view .LVU1086
- 3647 0002 0928 cmp r0, #9
- 3648 0004 13D8 bhi .L274
- 3649 0006 DFE800F0 tbb [pc, r0]
- 3650 .L277:
- 3651 000a 05 .byte (.L286-.L277)/2
- 3652 000b 13 .byte (.L285-.L277)/2
- 3653 000c 21 .byte (.L284-.L277)/2
- 3654 000d 2F .byte (.L283-.L277)/2
- 3655 000e 3D .byte (.L282-.L277)/2
- 3656 000f 4B .byte (.L281-.L277)/2
- 3657 0010 59 .byte (.L280-.L277)/2
- 3658 0011 65 .byte (.L279-.L277)/2
- 3659 0012 71 .byte (.L278-.L277)/2
- 3660 0013 7D .byte (.L276-.L277)/2
- 3661 .p2align 1
- 3662 .L286:
-2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- 3663 .loc 1 2688 3 view .LVU1087
- 3664 0014 414C ldr r4, .L289
- 3665 0016 0122 movs r2, #1
- 3666 0018 4FF48061 mov r1, #1024
- 3667 001c 2046 mov r0, r4
- 3668 .LVL400:
-2688:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET);
- 3669 .loc 1 2688 3 is_stmt 0 view .LVU1088
- 3670 001e FFF7FEFF bl HAL_GPIO_WritePin
- 3671 .LVL401:
-2689:Src/main.c **** break;
- 3672 .loc 1 2689 3 is_stmt 1 view .LVU1089
- 3673 0022 0022 movs r2, #0
- 3674 0024 4FF48061 mov r1, #1024
- 3675 0028 2046 mov r0, r4
- 3676 002a FFF7FEFF bl HAL_GPIO_WritePin
- 3677 .LVL402:
-2690:Src/main.c ****
- 3678 .loc 1 2690 2 view .LVU1090
- 3679 .L274:
-2737:Src/main.c ****
- 3680 .loc 1 2737 1 is_stmt 0 view .LVU1091
- 3681 002e 10BD pop {r4, pc}
- 3682 .LVL403:
- 3683 .L285:
-2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- 3684 .loc 1 2693 3 is_stmt 1 view .LVU1092
- 3685 0030 3A4C ldr r4, .L289
- 3686 0032 0122 movs r2, #1
- 3687 0034 4FF40061 mov r1, #2048
- ARM GAS /tmp/ccLSPxIe.s page 211
-
-
- 3688 0038 2046 mov r0, r4
- 3689 .LVL404:
-2693:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET);
- 3690 .loc 1 2693 3 is_stmt 0 view .LVU1093
- 3691 003a FFF7FEFF bl HAL_GPIO_WritePin
- 3692 .LVL405:
-2694:Src/main.c **** break;
- 3693 .loc 1 2694 3 is_stmt 1 view .LVU1094
- 3694 003e 0022 movs r2, #0
- 3695 0040 4FF40061 mov r1, #2048
- 3696 0044 2046 mov r0, r4
- 3697 0046 FFF7FEFF bl HAL_GPIO_WritePin
- 3698 .LVL406:
-2695:Src/main.c ****
- 3699 .loc 1 2695 2 view .LVU1095
- 3700 004a F0E7 b .L274
- 3701 .LVL407:
- 3702 .L284:
-2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- 3703 .loc 1 2698 3 view .LVU1096
- 3704 004c 334C ldr r4, .L289
- 3705 004e 0122 movs r2, #1
- 3706 0050 4FF48051 mov r1, #4096
- 3707 0054 2046 mov r0, r4
- 3708 .LVL408:
-2698:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET);
- 3709 .loc 1 2698 3 is_stmt 0 view .LVU1097
- 3710 0056 FFF7FEFF bl HAL_GPIO_WritePin
- 3711 .LVL409:
-2699:Src/main.c **** break;
- 3712 .loc 1 2699 3 is_stmt 1 view .LVU1098
- 3713 005a 0022 movs r2, #0
- 3714 005c 4FF48051 mov r1, #4096
- 3715 0060 2046 mov r0, r4
- 3716 0062 FFF7FEFF bl HAL_GPIO_WritePin
- 3717 .LVL410:
-2700:Src/main.c ****
- 3718 .loc 1 2700 2 view .LVU1099
- 3719 0066 E2E7 b .L274
- 3720 .LVL411:
- 3721 .L283:
-2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- 3722 .loc 1 2703 3 view .LVU1100
- 3723 0068 2C4C ldr r4, .L289
- 3724 006a 0122 movs r2, #1
- 3725 006c 4FF40051 mov r1, #8192
- 3726 0070 2046 mov r0, r4
- 3727 .LVL412:
-2703:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET);
- 3728 .loc 1 2703 3 is_stmt 0 view .LVU1101
- 3729 0072 FFF7FEFF bl HAL_GPIO_WritePin
- 3730 .LVL413:
-2704:Src/main.c **** break;
- 3731 .loc 1 2704 3 is_stmt 1 view .LVU1102
- 3732 0076 0022 movs r2, #0
- 3733 0078 4FF40051 mov r1, #8192
- 3734 007c 2046 mov r0, r4
- ARM GAS /tmp/ccLSPxIe.s page 212
-
-
- 3735 007e FFF7FEFF bl HAL_GPIO_WritePin
- 3736 .LVL414:
-2705:Src/main.c ****
- 3737 .loc 1 2705 2 view .LVU1103
- 3738 0082 D4E7 b .L274
- 3739 .LVL415:
- 3740 .L282:
-2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- 3741 .loc 1 2708 3 view .LVU1104
- 3742 0084 254C ldr r4, .L289
- 3743 0086 0122 movs r2, #1
- 3744 0088 4FF48041 mov r1, #16384
- 3745 008c 2046 mov r0, r4
- 3746 .LVL416:
-2708:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET);
- 3747 .loc 1 2708 3 is_stmt 0 view .LVU1105
- 3748 008e FFF7FEFF bl HAL_GPIO_WritePin
- 3749 .LVL417:
-2709:Src/main.c **** break;
- 3750 .loc 1 2709 3 is_stmt 1 view .LVU1106
- 3751 0092 0022 movs r2, #0
- 3752 0094 4FF48041 mov r1, #16384
- 3753 0098 2046 mov r0, r4
- 3754 009a FFF7FEFF bl HAL_GPIO_WritePin
- 3755 .LVL418:
-2710:Src/main.c ****
- 3756 .loc 1 2710 2 view .LVU1107
- 3757 009e C6E7 b .L274
- 3758 .LVL419:
- 3759 .L281:
-2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- 3760 .loc 1 2713 3 view .LVU1108
- 3761 00a0 1E4C ldr r4, .L289
- 3762 00a2 0122 movs r2, #1
- 3763 00a4 4FF40041 mov r1, #32768
- 3764 00a8 2046 mov r0, r4
- 3765 .LVL420:
-2713:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET);
- 3766 .loc 1 2713 3 is_stmt 0 view .LVU1109
- 3767 00aa FFF7FEFF bl HAL_GPIO_WritePin
- 3768 .LVL421:
-2714:Src/main.c **** break;
- 3769 .loc 1 2714 3 is_stmt 1 view .LVU1110
- 3770 00ae 0022 movs r2, #0
- 3771 00b0 4FF40041 mov r1, #32768
- 3772 00b4 2046 mov r0, r4
- 3773 00b6 FFF7FEFF bl HAL_GPIO_WritePin
- 3774 .LVL422:
-2715:Src/main.c ****
- 3775 .loc 1 2715 2 view .LVU1111
- 3776 00ba B8E7 b .L274
- 3777 .LVL423:
- 3778 .L280:
-2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- 3779 .loc 1 2718 3 view .LVU1112
- 3780 00bc 184C ldr r4, .L289+4
- 3781 00be 0122 movs r2, #1
- ARM GAS /tmp/ccLSPxIe.s page 213
-
-
- 3782 00c0 1021 movs r1, #16
- 3783 00c2 2046 mov r0, r4
- 3784 .LVL424:
-2718:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET);
- 3785 .loc 1 2718 3 is_stmt 0 view .LVU1113
- 3786 00c4 FFF7FEFF bl HAL_GPIO_WritePin
- 3787 .LVL425:
-2719:Src/main.c **** break;
- 3788 .loc 1 2719 3 is_stmt 1 view .LVU1114
- 3789 00c8 0022 movs r2, #0
- 3790 00ca 1021 movs r1, #16
- 3791 00cc 2046 mov r0, r4
- 3792 00ce FFF7FEFF bl HAL_GPIO_WritePin
- 3793 .LVL426:
-2720:Src/main.c ****
- 3794 .loc 1 2720 2 view .LVU1115
- 3795 00d2 ACE7 b .L274
- 3796 .LVL427:
- 3797 .L279:
-2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- 3798 .loc 1 2723 3 view .LVU1116
- 3799 00d4 124C ldr r4, .L289+4
- 3800 00d6 0122 movs r2, #1
- 3801 00d8 2021 movs r1, #32
- 3802 00da 2046 mov r0, r4
- 3803 .LVL428:
-2723:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET);
- 3804 .loc 1 2723 3 is_stmt 0 view .LVU1117
- 3805 00dc FFF7FEFF bl HAL_GPIO_WritePin
- 3806 .LVL429:
-2724:Src/main.c **** break;
- 3807 .loc 1 2724 3 is_stmt 1 view .LVU1118
- 3808 00e0 0022 movs r2, #0
- 3809 00e2 2021 movs r1, #32
- 3810 00e4 2046 mov r0, r4
- 3811 00e6 FFF7FEFF bl HAL_GPIO_WritePin
- 3812 .LVL430:
-2725:Src/main.c ****
- 3813 .loc 1 2725 2 view .LVU1119
- 3814 00ea A0E7 b .L274
- 3815 .LVL431:
- 3816 .L278:
-2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- 3817 .loc 1 2728 3 view .LVU1120
- 3818 00ec 0C4C ldr r4, .L289+4
- 3819 00ee 0122 movs r2, #1
- 3820 00f0 4021 movs r1, #64
- 3821 00f2 2046 mov r0, r4
- 3822 .LVL432:
-2728:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET);
- 3823 .loc 1 2728 3 is_stmt 0 view .LVU1121
- 3824 00f4 FFF7FEFF bl HAL_GPIO_WritePin
- 3825 .LVL433:
-2729:Src/main.c **** break;
- 3826 .loc 1 2729 3 is_stmt 1 view .LVU1122
- 3827 00f8 0022 movs r2, #0
- 3828 00fa 4021 movs r1, #64
- ARM GAS /tmp/ccLSPxIe.s page 214
-
-
- 3829 00fc 2046 mov r0, r4
- 3830 00fe FFF7FEFF bl HAL_GPIO_WritePin
- 3831 .LVL434:
-2730:Src/main.c ****
- 3832 .loc 1 2730 2 view .LVU1123
- 3833 0102 94E7 b .L274
- 3834 .LVL435:
- 3835 .L276:
-2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- 3836 .loc 1 2733 3 view .LVU1124
- 3837 0104 064C ldr r4, .L289+4
- 3838 0106 0122 movs r2, #1
- 3839 0108 8021 movs r1, #128
- 3840 010a 2046 mov r0, r4
- 3841 .LVL436:
-2733:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET);
- 3842 .loc 1 2733 3 is_stmt 0 view .LVU1125
- 3843 010c FFF7FEFF bl HAL_GPIO_WritePin
- 3844 .LVL437:
-2734:Src/main.c **** break;
- 3845 .loc 1 2734 3 is_stmt 1 view .LVU1126
- 3846 0110 0022 movs r2, #0
- 3847 0112 8021 movs r1, #128
- 3848 0114 2046 mov r0, r4
- 3849 0116 FFF7FEFF bl HAL_GPIO_WritePin
- 3850 .LVL438:
-2735:Src/main.c **** }
- 3851 .loc 1 2735 2 view .LVU1127
-2737:Src/main.c ****
- 3852 .loc 1 2737 1 is_stmt 0 view .LVU1128
- 3853 011a 88E7 b .L274
- 3854 .L290:
- 3855 .align 2
- 3856 .L289:
- 3857 011c 00180240 .word 1073879040
- 3858 0120 00040240 .word 1073873920
- 3859 .cfi_endproc
- 3860 .LFE1211:
- 3862 .section .text.MPhD_T,"ax",%progbits
- 3863 .align 1
- 3864 .syntax unified
- 3865 .thumb
- 3866 .thumb_func
- 3868 MPhD_T:
- 3869 .LVL439:
- 3870 .LFB1236:
-3529:Src/main.c **** uint16_t P;
- 3871 .loc 1 3529 1 is_stmt 1 view -0
- 3872 .cfi_startproc
- 3873 @ args = 0, pretend = 0, frame = 0
- 3874 @ frame_needed = 0, uses_anonymous_args = 0
-3529:Src/main.c **** uint16_t P;
- 3875 .loc 1 3529 1 is_stmt 0 view .LVU1130
- 3876 0000 38B5 push {r3, r4, r5, lr}
- 3877 .LCFI38:
- 3878 .cfi_def_cfa_offset 16
- 3879 .cfi_offset 3, -16
- ARM GAS /tmp/ccLSPxIe.s page 215
-
-
- 3880 .cfi_offset 4, -12
- 3881 .cfi_offset 5, -8
- 3882 .cfi_offset 14, -4
- 3883 0002 0446 mov r4, r0
-3530:Src/main.c **** uint32_t tmp32;
- 3884 .loc 1 3530 2 is_stmt 1 view .LVU1131
-3531:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 3885 .loc 1 3531 2 view .LVU1132
-3532:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 3886 .loc 1 3532 2 view .LVU1133
- 3887 0004 0022 movs r2, #0
- 3888 0006 4FF48041 mov r1, #16384
- 3889 000a 8148 ldr r0, .L332
- 3890 .LVL440:
-3532:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion
- 3891 .loc 1 3532 2 is_stmt 0 view .LVU1134
- 3892 000c FFF7FEFF bl HAL_GPIO_WritePin
- 3893 .LVL441:
-3533:Src/main.c **** tmp32=0;
- 3894 .loc 1 3533 2 is_stmt 1 view .LVU1135
- 3895 0010 0022 movs r2, #0
- 3896 0012 4FF40071 mov r1, #512
- 3897 0016 7F48 ldr r0, .L332+4
- 3898 0018 FFF7FEFF bl HAL_GPIO_WritePin
- 3899 .LVL442:
-3534:Src/main.c **** while(tmp32<500){tmp32++;}
- 3900 .loc 1 3534 2 view .LVU1136
-3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3901 .loc 1 3535 2 view .LVU1137
-3534:Src/main.c **** while(tmp32<500){tmp32++;}
- 3902 .loc 1 3534 7 is_stmt 0 view .LVU1138
- 3903 001c 0023 movs r3, #0
-3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3904 .loc 1 3535 7 view .LVU1139
- 3905 001e 00E0 b .L292
- 3906 .LVL443:
- 3907 .L293:
-3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3908 .loc 1 3535 19 is_stmt 1 discriminator 2 view .LVU1140
-3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3909 .loc 1 3535 24 is_stmt 0 discriminator 2 view .LVU1141
- 3910 0020 0133 adds r3, r3, #1
- 3911 .LVL444:
- 3912 .L292:
-3535:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3913 .loc 1 3535 13 is_stmt 1 discriminator 1 view .LVU1142
- 3914 0022 B3F5FA7F cmp r3, #500
- 3915 0026 FBD3 bcc .L293
-3536:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver
- 3916 .loc 1 3536 2 view .LVU1143
- 3917 0028 0122 movs r2, #1
- 3918 002a 4FF48041 mov r1, #16384
- 3919 002e 7848 ldr r0, .L332
- 3920 0030 FFF7FEFF bl HAL_GPIO_WritePin
- 3921 .LVL445:
-3537:Src/main.c **** tmp32=0;
- 3922 .loc 1 3537 2 view .LVU1144
- ARM GAS /tmp/ccLSPxIe.s page 216
-
-
- 3923 0034 0122 movs r2, #1
- 3924 0036 4FF40071 mov r1, #512
- 3925 003a 7648 ldr r0, .L332+4
- 3926 003c FFF7FEFF bl HAL_GPIO_WritePin
- 3927 .LVL446:
-3538:Src/main.c **** while(tmp32<500){tmp32++;}
- 3928 .loc 1 3538 2 view .LVU1145
-3539:Src/main.c **** if (num==1)//MPD1
- 3929 .loc 1 3539 2 view .LVU1146
-3538:Src/main.c **** while(tmp32<500){tmp32++;}
- 3930 .loc 1 3538 7 is_stmt 0 view .LVU1147
- 3931 0040 0023 movs r3, #0
-3539:Src/main.c **** if (num==1)//MPD1
- 3932 .loc 1 3539 7 view .LVU1148
- 3933 0042 00E0 b .L294
- 3934 .LVL447:
- 3935 .L295:
-3539:Src/main.c **** if (num==1)//MPD1
- 3936 .loc 1 3539 19 is_stmt 1 discriminator 2 view .LVU1149
-3539:Src/main.c **** if (num==1)//MPD1
- 3937 .loc 1 3539 24 is_stmt 0 discriminator 2 view .LVU1150
- 3938 0044 0133 adds r3, r3, #1
- 3939 .LVL448:
- 3940 .L294:
-3539:Src/main.c **** if (num==1)//MPD1
- 3941 .loc 1 3539 13 is_stmt 1 discriminator 1 view .LVU1151
- 3942 0046 B3F5FA7F cmp r3, #500
- 3943 004a FBD3 bcc .L295
-3540:Src/main.c **** {
- 3944 .loc 1 3540 2 view .LVU1152
- 3945 004c 631E subs r3, r4, #1
- 3946 .LVL449:
-3540:Src/main.c **** {
- 3947 .loc 1 3540 2 is_stmt 0 view .LVU1153
- 3948 004e 032B cmp r3, #3
- 3949 0050 39D8 bhi .L296
- 3950 0052 DFE803F0 tbb [pc, r3]
- 3951 .L298:
- 3952 0056 02 .byte (.L301-.L298)/2
- 3953 0057 3A .byte (.L300-.L298)/2
- 3954 0058 6F .byte (.L299-.L298)/2
- 3955 0059 A6 .byte (.L297-.L298)/2
- 3956 .p2align 1
- 3957 .L301:
-3542:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- 3958 .loc 1 3542 3 is_stmt 1 view .LVU1154
- 3959 005a 6D4C ldr r4, .L332
- 3960 .LVL450:
-3542:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET);
- 3961 .loc 1 3542 3 is_stmt 0 view .LVU1155
- 3962 005c 0122 movs r2, #1
- 3963 005e 4FF40061 mov r1, #2048
- 3964 0062 2046 mov r0, r4
- 3965 0064 FFF7FEFF bl HAL_GPIO_WritePin
- 3966 .LVL451:
-3543:Src/main.c **** tmp32=0;
- 3967 .loc 1 3543 3 is_stmt 1 view .LVU1156
- ARM GAS /tmp/ccLSPxIe.s page 217
-
-
- 3968 0068 0022 movs r2, #0
- 3969 006a 4FF48061 mov r1, #1024
- 3970 006e 2046 mov r0, r4
- 3971 0070 FFF7FEFF bl HAL_GPIO_WritePin
- 3972 .LVL452:
-3544:Src/main.c **** while(tmp32<500){tmp32++;}
- 3973 .loc 1 3544 3 view .LVU1157
-3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3974 .loc 1 3545 3 view .LVU1158
-3544:Src/main.c **** while(tmp32<500){tmp32++;}
- 3975 .loc 1 3544 8 is_stmt 0 view .LVU1159
- 3976 0074 0023 movs r3, #0
-3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3977 .loc 1 3545 8 view .LVU1160
- 3978 0076 00E0 b .L302
- 3979 .LVL453:
- 3980 .L303:
-3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3981 .loc 1 3545 20 is_stmt 1 discriminator 2 view .LVU1161
-3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3982 .loc 1 3545 25 is_stmt 0 discriminator 2 view .LVU1162
- 3983 0078 0133 adds r3, r3, #1
- 3984 .LVL454:
- 3985 .L302:
-3545:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 3986 .loc 1 3545 14 is_stmt 1 discriminator 1 view .LVU1163
- 3987 007a B3F5FA7F cmp r3, #500
- 3988 007e FBD3 bcc .L303
-3547:Src/main.c **** tmp32 = 0;
- 3989 .loc 1 3547 3 view .LVU1164
- 3990 .LVL455:
- 3991 .LBB433:
- 3992 .LBI433:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 3993 .loc 4 358 22 view .LVU1165
- 3994 .LBB434:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3995 .loc 4 360 3 view .LVU1166
- 3996 0080 654A ldr r2, .L332+8
- 3997 0082 1368 ldr r3, [r2]
- 3998 .LVL456:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 3999 .loc 4 360 3 is_stmt 0 view .LVU1167
- 4000 0084 43F04003 orr r3, r3, #64
- 4001 0088 1360 str r3, [r2]
- 4002 .LVL457:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4003 .loc 4 360 3 view .LVU1168
- 4004 .LBE434:
- 4005 .LBE433:
-3548:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4006 .loc 1 3548 3 is_stmt 1 view .LVU1169
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4007 .loc 1 3549 3 view .LVU1170
-3548:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4008 .loc 1 3548 9 is_stmt 0 view .LVU1171
- 4009 008a 0023 movs r3, #0
- ARM GAS /tmp/ccLSPxIe.s page 218
-
-
- 4010 .LVL458:
- 4011 .L304:
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4012 .loc 1 3549 43 is_stmt 1 discriminator 1 view .LVU1172
- 4013 .LBB435:
- 4014 .LBI435:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4015 .loc 4 905 26 view .LVU1173
- 4016 .LBB436:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4017 .loc 4 907 3 view .LVU1174
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4018 .loc 4 907 12 is_stmt 0 view .LVU1175
- 4019 008c 624A ldr r2, .L332+8
- 4020 008e 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4021 .loc 4 907 68 view .LVU1176
- 4022 0090 12F0010F tst r2, #1
- 4023 0094 04D1 bne .L305
- 4024 .LVL459:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4025 .loc 4 907 68 view .LVU1177
- 4026 .LBE436:
- 4027 .LBE435:
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4028 .loc 1 3549 43 discriminator 2 view .LVU1178
- 4029 0096 B3F57A7F cmp r3, #1000
- 4030 009a 01D8 bhi .L305
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4031 .loc 1 3549 62 is_stmt 1 discriminator 3 view .LVU1179
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4032 .loc 1 3549 67 is_stmt 0 discriminator 3 view .LVU1180
- 4033 009c 0133 adds r3, r3, #1
- 4034 .LVL460:
-3549:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC
- 4035 .loc 1 3549 67 discriminator 3 view .LVU1181
- 4036 009e F5E7 b .L304
- 4037 .L305:
-3550:Src/main.c **** while(tmp32<500){tmp32++;}
- 4038 .loc 1 3550 3 is_stmt 1 view .LVU1182
- 4039 .LVL461:
- 4040 .LBB437:
- 4041 .LBI437:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4042 .loc 4 370 22 view .LVU1183
- 4043 .LBB438:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4044 .loc 4 372 3 view .LVU1184
- 4045 00a0 5D49 ldr r1, .L332+8
- 4046 00a2 0A68 ldr r2, [r1]
- 4047 00a4 22F04002 bic r2, r2, #64
- 4048 00a8 0A60 str r2, [r1]
- 4049 .LVL462:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4050 .loc 4 372 3 is_stmt 0 view .LVU1185
- 4051 .LBE438:
- 4052 .LBE437:
- ARM GAS /tmp/ccLSPxIe.s page 219
-
-
-3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4053 .loc 1 3551 3 is_stmt 1 view .LVU1186
- 4054 .LBB440:
- 4055 .LBB439:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4056 .loc 4 373 1 is_stmt 0 view .LVU1187
- 4057 00aa 00E0 b .L307
- 4058 .L308:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4059 .loc 4 373 1 view .LVU1188
- 4060 .LBE439:
- 4061 .LBE440:
-3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4062 .loc 1 3551 20 is_stmt 1 discriminator 2 view .LVU1189
-3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4063 .loc 1 3551 25 is_stmt 0 discriminator 2 view .LVU1190
- 4064 00ac 0133 adds r3, r3, #1
- 4065 .LVL463:
- 4066 .L307:
-3551:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4067 .loc 1 3551 14 is_stmt 1 discriminator 1 view .LVU1191
- 4068 00ae B3F5FA7F cmp r3, #500
- 4069 00b2 FBD3 bcc .L308
-3553:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4);
- 4070 .loc 1 3553 3 view .LVU1192
- 4071 00b4 0122 movs r2, #1
- 4072 00b6 4FF48061 mov r1, #1024
- 4073 00ba 5548 ldr r0, .L332
- 4074 00bc FFF7FEFF bl HAL_GPIO_WritePin
- 4075 .LVL464:
-3554:Src/main.c **** }
- 4076 .loc 1 3554 3 view .LVU1193
- 4077 .LBB441:
- 4078 .LBI441:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4079 .loc 4 1344 26 view .LVU1194
- 4080 .LBB442:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4081 .loc 4 1346 3 view .LVU1195
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4082 .loc 4 1346 21 is_stmt 0 view .LVU1196
- 4083 00c0 554B ldr r3, .L332+8
- 4084 00c2 DD68 ldr r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4085 .loc 4 1346 10 view .LVU1197
- 4086 00c4 ADB2 uxth r5, r5
- 4087 .LVL465:
- 4088 .L296:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4089 .loc 4 1346 10 view .LVU1198
- 4090 .LBE442:
- 4091 .LBE441:
-3626:Src/main.c **** }
- 4092 .loc 1 3626 2 is_stmt 1 view .LVU1199
-3627:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time
- 4093 .loc 1 3627 1 is_stmt 0 view .LVU1200
- 4094 00c6 2846 mov r0, r5
- ARM GAS /tmp/ccLSPxIe.s page 220
-
-
- 4095 00c8 38BD pop {r3, r4, r5, pc}
- 4096 .LVL466:
- 4097 .L300:
-3558:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET);
- 4098 .loc 1 3558 3 is_stmt 1 view .LVU1201
- 4099 00ca 524C ldr r4, .L332+4
- 4100 00cc 0122 movs r2, #1
- 4101 00ce 4FF48061 mov r1, #1024
- 4102 00d2 2046 mov r0, r4
- 4103 00d4 FFF7FEFF bl HAL_GPIO_WritePin
- 4104 .LVL467:
-3559:Src/main.c **** tmp32=0;
- 4105 .loc 1 3559 3 view .LVU1202
- 4106 00d8 0022 movs r2, #0
- 4107 00da 4021 movs r1, #64
- 4108 00dc 2046 mov r0, r4
- 4109 00de FFF7FEFF bl HAL_GPIO_WritePin
- 4110 .LVL468:
-3560:Src/main.c **** while(tmp32<500){tmp32++;}
- 4111 .loc 1 3560 3 view .LVU1203
-3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4112 .loc 1 3561 3 view .LVU1204
-3560:Src/main.c **** while(tmp32<500){tmp32++;}
- 4113 .loc 1 3560 8 is_stmt 0 view .LVU1205
- 4114 00e2 0023 movs r3, #0
-3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4115 .loc 1 3561 8 view .LVU1206
- 4116 00e4 00E0 b .L309
- 4117 .LVL469:
- 4118 .L310:
-3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4119 .loc 1 3561 20 is_stmt 1 discriminator 2 view .LVU1207
-3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4120 .loc 1 3561 25 is_stmt 0 discriminator 2 view .LVU1208
- 4121 00e6 0133 adds r3, r3, #1
- 4122 .LVL470:
- 4123 .L309:
-3561:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4124 .loc 1 3561 14 is_stmt 1 discriminator 1 view .LVU1209
- 4125 00e8 B3F5FA7F cmp r3, #500
- 4126 00ec FBD3 bcc .L310
-3563:Src/main.c **** tmp32 = 0;
- 4127 .loc 1 3563 3 view .LVU1210
- 4128 .LVL471:
- 4129 .LBB443:
- 4130 .LBI443:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4131 .loc 4 358 22 view .LVU1211
- 4132 .LBB444:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4133 .loc 4 360 3 view .LVU1212
- 4134 00ee 4B4A ldr r2, .L332+12
- 4135 00f0 1368 ldr r3, [r2]
- 4136 .LVL472:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4137 .loc 4 360 3 is_stmt 0 view .LVU1213
- 4138 00f2 43F04003 orr r3, r3, #64
- ARM GAS /tmp/ccLSPxIe.s page 221
-
-
- 4139 00f6 1360 str r3, [r2]
- 4140 .LVL473:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4141 .loc 4 360 3 view .LVU1214
- 4142 .LBE444:
- 4143 .LBE443:
-3564:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4144 .loc 1 3564 3 is_stmt 1 view .LVU1215
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4145 .loc 1 3565 3 view .LVU1216
-3564:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4146 .loc 1 3564 9 is_stmt 0 view .LVU1217
- 4147 00f8 0023 movs r3, #0
- 4148 .LVL474:
- 4149 .L311:
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4150 .loc 1 3565 43 is_stmt 1 discriminator 1 view .LVU1218
- 4151 .LBB445:
- 4152 .LBI445:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4153 .loc 4 905 26 view .LVU1219
- 4154 .LBB446:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4155 .loc 4 907 3 view .LVU1220
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4156 .loc 4 907 12 is_stmt 0 view .LVU1221
- 4157 00fa 484A ldr r2, .L332+12
- 4158 00fc 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4159 .loc 4 907 68 view .LVU1222
- 4160 00fe 12F0010F tst r2, #1
- 4161 0102 04D1 bne .L312
- 4162 .LVL475:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4163 .loc 4 907 68 view .LVU1223
- 4164 .LBE446:
- 4165 .LBE445:
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4166 .loc 1 3565 43 discriminator 2 view .LVU1224
- 4167 0104 B3F57A7F cmp r3, #1000
- 4168 0108 01D8 bhi .L312
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4169 .loc 1 3565 62 is_stmt 1 discriminator 3 view .LVU1225
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4170 .loc 1 3565 67 is_stmt 0 discriminator 3 view .LVU1226
- 4171 010a 0133 adds r3, r3, #1
- 4172 .LVL476:
-3565:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC
- 4173 .loc 1 3565 67 discriminator 3 view .LVU1227
- 4174 010c F5E7 b .L311
- 4175 .L312:
-3566:Src/main.c **** while(tmp32<500){tmp32++;}
- 4176 .loc 1 3566 3 is_stmt 1 view .LVU1228
- 4177 .LVL477:
- 4178 .LBB447:
- 4179 .LBI447:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 222
-
-
- 4180 .loc 4 370 22 view .LVU1229
- 4181 .LBB448:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4182 .loc 4 372 3 view .LVU1230
- 4183 010e 4349 ldr r1, .L332+12
- 4184 0110 0A68 ldr r2, [r1]
- 4185 0112 22F04002 bic r2, r2, #64
- 4186 0116 0A60 str r2, [r1]
- 4187 .LVL478:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4188 .loc 4 372 3 is_stmt 0 view .LVU1231
- 4189 .LBE448:
- 4190 .LBE447:
-3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4191 .loc 1 3567 3 is_stmt 1 view .LVU1232
- 4192 .LBB450:
- 4193 .LBB449:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4194 .loc 4 373 1 is_stmt 0 view .LVU1233
- 4195 0118 00E0 b .L314
- 4196 .L315:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4197 .loc 4 373 1 view .LVU1234
- 4198 .LBE449:
- 4199 .LBE450:
-3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4200 .loc 1 3567 20 is_stmt 1 discriminator 2 view .LVU1235
-3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4201 .loc 1 3567 25 is_stmt 0 discriminator 2 view .LVU1236
- 4202 011a 0133 adds r3, r3, #1
- 4203 .LVL479:
- 4204 .L314:
-3567:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4205 .loc 1 3567 14 is_stmt 1 discriminator 1 view .LVU1237
- 4206 011c B3F5FA7F cmp r3, #500
- 4207 0120 FBD3 bcc .L315
-3569:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5);
- 4208 .loc 1 3569 3 view .LVU1238
- 4209 0122 0122 movs r2, #1
- 4210 0124 4021 movs r1, #64
- 4211 0126 3B48 ldr r0, .L332+4
- 4212 0128 FFF7FEFF bl HAL_GPIO_WritePin
- 4213 .LVL480:
-3570:Src/main.c **** }
- 4214 .loc 1 3570 3 view .LVU1239
- 4215 .LBB451:
- 4216 .LBI451:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4217 .loc 4 1344 26 view .LVU1240
- 4218 .LBB452:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4219 .loc 4 1346 3 view .LVU1241
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4220 .loc 4 1346 21 is_stmt 0 view .LVU1242
- 4221 012c 3B4B ldr r3, .L332+12
- 4222 012e DD68 ldr r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 223
-
-
- 4223 .loc 4 1346 10 view .LVU1243
- 4224 0130 ADB2 uxth r5, r5
- 4225 .LVL481:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4226 .loc 4 1346 10 view .LVU1244
- 4227 .LBE452:
- 4228 .LBE451:
- 4229 0132 C8E7 b .L296
- 4230 .LVL482:
- 4231 .L299:
-3574:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
- 4232 .loc 1 3574 3 is_stmt 1 view .LVU1245
- 4233 0134 364C ldr r4, .L332
- 4234 0136 0122 movs r2, #1
- 4235 0138 4FF48061 mov r1, #1024
- 4236 013c 2046 mov r0, r4
- 4237 013e FFF7FEFF bl HAL_GPIO_WritePin
- 4238 .LVL483:
-3575:Src/main.c **** tmp32=0;
- 4239 .loc 1 3575 3 view .LVU1246
- 4240 0142 0022 movs r2, #0
- 4241 0144 4FF40061 mov r1, #2048
- 4242 0148 2046 mov r0, r4
- 4243 014a FFF7FEFF bl HAL_GPIO_WritePin
- 4244 .LVL484:
-3576:Src/main.c **** while(tmp32<500){tmp32++;}
- 4245 .loc 1 3576 3 view .LVU1247
-3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4246 .loc 1 3577 3 view .LVU1248
-3576:Src/main.c **** while(tmp32<500){tmp32++;}
- 4247 .loc 1 3576 8 is_stmt 0 view .LVU1249
- 4248 014e 0023 movs r3, #0
-3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4249 .loc 1 3577 8 view .LVU1250
- 4250 0150 00E0 b .L316
- 4251 .LVL485:
- 4252 .L317:
-3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4253 .loc 1 3577 20 is_stmt 1 discriminator 2 view .LVU1251
-3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4254 .loc 1 3577 25 is_stmt 0 discriminator 2 view .LVU1252
- 4255 0152 0133 adds r3, r3, #1
- 4256 .LVL486:
- 4257 .L316:
-3577:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4258 .loc 1 3577 14 is_stmt 1 discriminator 1 view .LVU1253
- 4259 0154 B3F5FA7F cmp r3, #500
- 4260 0158 FBD3 bcc .L317
-3579:Src/main.c **** tmp32 = 0;
- 4261 .loc 1 3579 3 view .LVU1254
- 4262 .LVL487:
- 4263 .LBB453:
- 4264 .LBI453:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4265 .loc 4 358 22 view .LVU1255
- 4266 .LBB454:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 224
-
-
- 4267 .loc 4 360 3 view .LVU1256
- 4268 015a 2F4A ldr r2, .L332+8
- 4269 015c 1368 ldr r3, [r2]
- 4270 .LVL488:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4271 .loc 4 360 3 is_stmt 0 view .LVU1257
- 4272 015e 43F04003 orr r3, r3, #64
- 4273 0162 1360 str r3, [r2]
- 4274 .LVL489:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4275 .loc 4 360 3 view .LVU1258
- 4276 .LBE454:
- 4277 .LBE453:
-3580:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4278 .loc 1 3580 3 is_stmt 1 view .LVU1259
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4279 .loc 1 3581 3 view .LVU1260
-3580:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4280 .loc 1 3580 9 is_stmt 0 view .LVU1261
- 4281 0164 0023 movs r3, #0
- 4282 .LVL490:
- 4283 .L318:
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4284 .loc 1 3581 43 is_stmt 1 discriminator 1 view .LVU1262
- 4285 .LBB455:
- 4286 .LBI455:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4287 .loc 4 905 26 view .LVU1263
- 4288 .LBB456:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4289 .loc 4 907 3 view .LVU1264
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4290 .loc 4 907 12 is_stmt 0 view .LVU1265
- 4291 0166 2C4A ldr r2, .L332+8
- 4292 0168 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4293 .loc 4 907 68 view .LVU1266
- 4294 016a 12F0010F tst r2, #1
- 4295 016e 04D1 bne .L319
- 4296 .LVL491:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4297 .loc 4 907 68 view .LVU1267
- 4298 .LBE456:
- 4299 .LBE455:
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4300 .loc 1 3581 43 discriminator 2 view .LVU1268
- 4301 0170 B3F57A7F cmp r3, #1000
- 4302 0174 01D8 bhi .L319
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4303 .loc 1 3581 62 is_stmt 1 discriminator 3 view .LVU1269
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4304 .loc 1 3581 67 is_stmt 0 discriminator 3 view .LVU1270
- 4305 0176 0133 adds r3, r3, #1
- 4306 .LVL492:
-3581:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC
- 4307 .loc 1 3581 67 discriminator 3 view .LVU1271
- 4308 0178 F5E7 b .L318
- ARM GAS /tmp/ccLSPxIe.s page 225
-
-
- 4309 .L319:
-3582:Src/main.c **** while(tmp32<500){tmp32++;}
- 4310 .loc 1 3582 3 is_stmt 1 view .LVU1272
- 4311 .LVL493:
- 4312 .LBB457:
- 4313 .LBI457:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4314 .loc 4 370 22 view .LVU1273
- 4315 .LBB458:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4316 .loc 4 372 3 view .LVU1274
- 4317 017a 2749 ldr r1, .L332+8
- 4318 017c 0A68 ldr r2, [r1]
- 4319 017e 22F04002 bic r2, r2, #64
- 4320 0182 0A60 str r2, [r1]
- 4321 .LVL494:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4322 .loc 4 372 3 is_stmt 0 view .LVU1275
- 4323 .LBE458:
- 4324 .LBE457:
-3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4325 .loc 1 3583 3 is_stmt 1 view .LVU1276
- 4326 .LBB460:
- 4327 .LBB459:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4328 .loc 4 373 1 is_stmt 0 view .LVU1277
- 4329 0184 00E0 b .L321
- 4330 .L322:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4331 .loc 4 373 1 view .LVU1278
- 4332 .LBE459:
- 4333 .LBE460:
-3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4334 .loc 1 3583 20 is_stmt 1 discriminator 2 view .LVU1279
-3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4335 .loc 1 3583 25 is_stmt 0 discriminator 2 view .LVU1280
- 4336 0186 0133 adds r3, r3, #1
- 4337 .LVL495:
- 4338 .L321:
-3583:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4339 .loc 1 3583 14 is_stmt 1 discriminator 1 view .LVU1281
- 4340 0188 B3F5FA7F cmp r3, #500
- 4341 018c FBD3 bcc .L322
-3585:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4);
- 4342 .loc 1 3585 3 view .LVU1282
- 4343 018e 0122 movs r2, #1
- 4344 0190 4FF40061 mov r1, #2048
- 4345 0194 1E48 ldr r0, .L332
- 4346 0196 FFF7FEFF bl HAL_GPIO_WritePin
- 4347 .LVL496:
-3586:Src/main.c **** }
- 4348 .loc 1 3586 3 view .LVU1283
- 4349 .LBB461:
- 4350 .LBI461:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4351 .loc 4 1344 26 view .LVU1284
- 4352 .LBB462:
- ARM GAS /tmp/ccLSPxIe.s page 226
-
-
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4353 .loc 4 1346 3 view .LVU1285
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4354 .loc 4 1346 21 is_stmt 0 view .LVU1286
- 4355 019a 1F4B ldr r3, .L332+8
- 4356 019c DD68 ldr r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4357 .loc 4 1346 10 view .LVU1287
- 4358 019e ADB2 uxth r5, r5
- 4359 .LVL497:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4360 .loc 4 1346 10 view .LVU1288
- 4361 .LBE462:
- 4362 .LBE461:
- 4363 01a0 91E7 b .L296
- 4364 .LVL498:
- 4365 .L297:
-3590:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET);
- 4366 .loc 1 3590 3 is_stmt 1 view .LVU1289
- 4367 01a2 1C4C ldr r4, .L332+4
- 4368 01a4 0122 movs r2, #1
- 4369 01a6 4021 movs r1, #64
- 4370 01a8 2046 mov r0, r4
- 4371 01aa FFF7FEFF bl HAL_GPIO_WritePin
- 4372 .LVL499:
-3591:Src/main.c **** tmp32=0;
- 4373 .loc 1 3591 3 view .LVU1290
- 4374 01ae 0022 movs r2, #0
- 4375 01b0 4FF48061 mov r1, #1024
- 4376 01b4 2046 mov r0, r4
- 4377 01b6 FFF7FEFF bl HAL_GPIO_WritePin
- 4378 .LVL500:
-3592:Src/main.c **** while(tmp32<500){tmp32++;}
- 4379 .loc 1 3592 3 view .LVU1291
-3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4380 .loc 1 3593 3 view .LVU1292
-3592:Src/main.c **** while(tmp32<500){tmp32++;}
- 4381 .loc 1 3592 8 is_stmt 0 view .LVU1293
- 4382 01ba 0023 movs r3, #0
-3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4383 .loc 1 3593 8 view .LVU1294
- 4384 01bc 00E0 b .L323
- 4385 .LVL501:
- 4386 .L324:
-3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4387 .loc 1 3593 20 is_stmt 1 discriminator 2 view .LVU1295
-3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4388 .loc 1 3593 25 is_stmt 0 discriminator 2 view .LVU1296
- 4389 01be 0133 adds r3, r3, #1
- 4390 .LVL502:
- 4391 .L323:
-3593:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c
- 4392 .loc 1 3593 14 is_stmt 1 discriminator 1 view .LVU1297
- 4393 01c0 B3F5FA7F cmp r3, #500
- 4394 01c4 FBD3 bcc .L324
-3595:Src/main.c **** tmp32 = 0;
- 4395 .loc 1 3595 3 view .LVU1298
- ARM GAS /tmp/ccLSPxIe.s page 227
-
-
- 4396 .LVL503:
- 4397 .LBB463:
- 4398 .LBI463:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4399 .loc 4 358 22 view .LVU1299
- 4400 .LBB464:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4401 .loc 4 360 3 view .LVU1300
- 4402 01c6 154A ldr r2, .L332+12
- 4403 01c8 1368 ldr r3, [r2]
- 4404 .LVL504:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4405 .loc 4 360 3 is_stmt 0 view .LVU1301
- 4406 01ca 43F04003 orr r3, r3, #64
- 4407 01ce 1360 str r3, [r2]
- 4408 .LVL505:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4409 .loc 4 360 3 view .LVU1302
- 4410 .LBE464:
- 4411 .LBE463:
-3596:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4412 .loc 1 3596 3 is_stmt 1 view .LVU1303
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4413 .loc 1 3597 3 view .LVU1304
-3596:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w
- 4414 .loc 1 3596 9 is_stmt 0 view .LVU1305
- 4415 01d0 0023 movs r3, #0
- 4416 .LVL506:
- 4417 .L325:
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4418 .loc 1 3597 43 is_stmt 1 discriminator 1 view .LVU1306
- 4419 .LBB465:
- 4420 .LBI465:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4421 .loc 4 905 26 view .LVU1307
- 4422 .LBB466:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4423 .loc 4 907 3 view .LVU1308
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4424 .loc 4 907 12 is_stmt 0 view .LVU1309
- 4425 01d2 124A ldr r2, .L332+12
- 4426 01d4 9268 ldr r2, [r2, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4427 .loc 4 907 68 view .LVU1310
- 4428 01d6 12F0010F tst r2, #1
- 4429 01da 04D1 bne .L326
- 4430 .LVL507:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4431 .loc 4 907 68 view .LVU1311
- 4432 .LBE466:
- 4433 .LBE465:
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4434 .loc 1 3597 43 discriminator 2 view .LVU1312
- 4435 01dc B3F57A7F cmp r3, #1000
- 4436 01e0 01D8 bhi .L326
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4437 .loc 1 3597 62 is_stmt 1 discriminator 3 view .LVU1313
- ARM GAS /tmp/ccLSPxIe.s page 228
-
-
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4438 .loc 1 3597 67 is_stmt 0 discriminator 3 view .LVU1314
- 4439 01e2 0133 adds r3, r3, #1
- 4440 .LVL508:
-3597:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC
- 4441 .loc 1 3597 67 discriminator 3 view .LVU1315
- 4442 01e4 F5E7 b .L325
- 4443 .L326:
-3598:Src/main.c **** while(tmp32<500){tmp32++;}
- 4444 .loc 1 3598 3 is_stmt 1 view .LVU1316
- 4445 .LVL509:
- 4446 .LBB467:
- 4447 .LBI467:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4448 .loc 4 370 22 view .LVU1317
- 4449 .LBB468:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4450 .loc 4 372 3 view .LVU1318
- 4451 01e6 0D49 ldr r1, .L332+12
- 4452 01e8 0A68 ldr r2, [r1]
- 4453 01ea 22F04002 bic r2, r2, #64
- 4454 01ee 0A60 str r2, [r1]
- 4455 .LVL510:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4456 .loc 4 372 3 is_stmt 0 view .LVU1319
- 4457 .LBE468:
- 4458 .LBE467:
-3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4459 .loc 1 3599 3 is_stmt 1 view .LVU1320
- 4460 .LBB470:
- 4461 .LBB469:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4462 .loc 4 373 1 is_stmt 0 view .LVU1321
- 4463 01f0 00E0 b .L328
- 4464 .L329:
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- 4465 .loc 4 373 1 view .LVU1322
- 4466 .LBE469:
- 4467 .LBE470:
-3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4468 .loc 1 3599 20 is_stmt 1 discriminator 2 view .LVU1323
-3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4469 .loc 1 3599 25 is_stmt 0 discriminator 2 view .LVU1324
- 4470 01f2 0133 adds r3, r3, #1
- 4471 .LVL511:
- 4472 .L328:
-3599:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100);
- 4473 .loc 1 3599 14 is_stmt 1 discriminator 1 view .LVU1325
- 4474 01f4 B3F5FA7F cmp r3, #500
- 4475 01f8 FBD3 bcc .L329
-3601:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5);
- 4476 .loc 1 3601 3 view .LVU1326
- 4477 01fa 0122 movs r2, #1
- 4478 01fc 4FF48061 mov r1, #1024
- 4479 0200 0448 ldr r0, .L332+4
- 4480 0202 FFF7FEFF bl HAL_GPIO_WritePin
- 4481 .LVL512:
- ARM GAS /tmp/ccLSPxIe.s page 229
-
-
-3602:Src/main.c **** }
- 4482 .loc 1 3602 3 view .LVU1327
- 4483 .LBB471:
- 4484 .LBI471:
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 4485 .loc 4 1344 26 view .LVU1328
- 4486 .LBB472:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4487 .loc 4 1346 3 view .LVU1329
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4488 .loc 4 1346 21 is_stmt 0 view .LVU1330
- 4489 0206 054B ldr r3, .L332+12
- 4490 0208 DD68 ldr r5, [r3, #12]
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4491 .loc 4 1346 10 view .LVU1331
- 4492 020a ADB2 uxth r5, r5
- 4493 .LVL513:
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 4494 .loc 4 1346 10 view .LVU1332
- 4495 020c 5BE7 b .L296
- 4496 .L333:
- 4497 020e 00BF .align 2
- 4498 .L332:
- 4499 0210 00100240 .word 1073876992
- 4500 0214 00140240 .word 1073878016
- 4501 0218 00340140 .word 1073820672
- 4502 021c 00500140 .word 1073827840
- 4503 .LBE472:
- 4504 .LBE471:
- 4505 .cfi_endproc
- 4506 .LFE1236:
- 4508 .section .text.Stop_TIM10,"ax",%progbits
- 4509 .align 1
- 4510 .syntax unified
- 4511 .thumb
- 4512 .thumb_func
- 4514 Stop_TIM10:
- 4515 .LFB1247:
-3767:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff)
-3768:Src/main.c **** {
-3769:Src/main.c **** uint16_t cl_ind;
-3770:Src/main.c ****
-3771:Src/main.c **** switch (UART_header)
-3772:Src/main.c **** {
-3773:Src/main.c **** case 0x7777:
-3774:Src/main.c **** cl_ind = TSK_16 - 2;
-3775:Src/main.c **** break;
-3776:Src/main.c **** case 0x1111:
-3777:Src/main.c **** cl_ind = CL_16 - 2;
-3778:Src/main.c **** break;
-3779:Src/main.c **** default:
-3780:Src/main.c **** return 0;
-3781:Src/main.c **** break;
-3782:Src/main.c **** }
-3783:Src/main.c ****
-3784:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind);
-3785:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 230
-
-
-3786:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0);
-3787:Src/main.c **** }
-3788:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
-3789:Src/main.c **** {
-3790:Src/main.c **** short i;
-3791:Src/main.c **** uint16_t cs = *pbuff;
-3792:Src/main.c ****
-3793:Src/main.c **** for(i = 1; i < len; i++)
-3794:Src/main.c **** {
-3795:Src/main.c **** cs ^= *(pbuff+i);
-3796:Src/main.c **** }
-3797:Src/main.c **** return cs;
-3798:Src/main.c **** }
-3799:Src/main.c ****
-3800:Src/main.c **** /*int SD_Init(void)
-3801:Src/main.c **** {
-3802:Src/main.c **** int test=0;
-3803:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3804:Src/main.c **** {
-3805:Src/main.c **** test = Mount_SD("/");
-3806:Src/main.c **** if (test == 0) //0 - suc
-3807:Src/main.c **** {
-3808:Src/main.c **** //Format_SD();
-3809:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc
-3810:Src/main.c **** //Create_File("FILE2.TXT");
-3811:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part
-3812:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
-3813:Src/main.c **** return test;
-3814:Src/main.c **** }
-3815:Src/main.c **** else
-3816:Src/main.c **** {
-3817:Src/main.c **** return 1;
-3818:Src/main.c **** }
-3819:Src/main.c **** }
-3820:Src/main.c **** else
-3821:Src/main.c **** {
-3822:Src/main.c **** return 1;
-3823:Src/main.c **** }
-3824:Src/main.c **** }*/
-3825:Src/main.c ****
-3826:Src/main.c **** int SD_SAVE(uint16_t *pbuff)
-3827:Src/main.c **** {
-3828:Src/main.c **** int test=0;
-3829:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3830:Src/main.c **** {
-3831:Src/main.c **** test = Mount_SD("/");
-3832:Src/main.c **** if (test == 0) //0 - suc
-3833:Src/main.c **** {
-3834:Src/main.c **** //Format_SD();
-3835:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8);
-3836:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
-3837:Src/main.c **** return test;
-3838:Src/main.c **** }
-3839:Src/main.c **** else
-3840:Src/main.c **** {
-3841:Src/main.c **** return 1;
-3842:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 231
-
-
-3843:Src/main.c **** }
-3844:Src/main.c **** else
-3845:Src/main.c **** {
-3846:Src/main.c **** return 1;
-3847:Src/main.c **** }
-3848:Src/main.c **** }
-3849:Src/main.c ****
-3850:Src/main.c ****
-3851:Src/main.c ****
-3852:Src/main.c **** //uint32_t Get_Length(void)
-3853:Src/main.c **** //{
-3854:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16);
-3855:Src/main.c **** //}
-3856:Src/main.c ****
-3857:Src/main.c **** int SD_READ(uint16_t *pbuff)
-3858:Src/main.c **** {
-3859:Src/main.c **** int test=0;
-3860:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
-3861:Src/main.c **** {
-3862:Src/main.c **** test = Mount_SD("/");
-3863:Src/main.c **** if (test == 0) //0 - suc
-3864:Src/main.c **** {
-3865:Src/main.c **** //Format_SD();
-3866:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes
-3867:Src/main.c **** fgoto+=DL_8;
-3868:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
-3869:Src/main.c **** return test;
-3870:Src/main.c **** }
-3871:Src/main.c **** else
-3872:Src/main.c **** {
-3873:Src/main.c **** return 1;
-3874:Src/main.c **** }
-3875:Src/main.c **** }
-3876:Src/main.c **** else
-3877:Src/main.c **** {
-3878:Src/main.c **** return 1;
-3879:Src/main.c **** }
-3880:Src/main.c ****
-3881:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++)
-3882:Src/main.c **** {
-3883:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j];
-3884:Src/main.c **** }
-3885:Src/main.c **** if (SD_SLIDEDHR12R1 = 0u;
- 5137 .loc 1 2825 2 view .LVU1546
-2825:Src/main.c **** DAC->DHR12R1 = 0u;
- 5138 .loc 1 2825 5 is_stmt 0 view .LVU1547
- 5139 0046 064B ldr r3, .L344+8
- 5140 0048 1968 ldr r1, [r3]
-2825:Src/main.c **** DAC->DHR12R1 = 0u;
- 5141 .loc 1 2825 10 view .LVU1548
- 5142 004a 064A ldr r2, .L344+12
- 5143 004c 0A40 ands r2, r2, r1
- 5144 004e 1A60 str r2, [r3]
-2826:Src/main.c **** }
- 5145 .loc 1 2826 2 is_stmt 1 view .LVU1549
-2826:Src/main.c **** }
- 5146 .loc 1 2826 15 is_stmt 0 view .LVU1550
- 5147 0050 9C60 str r4, [r3, #8]
-2827:Src/main.c ****
- 5148 .loc 1 2827 1 view .LVU1551
- 5149 0052 08B0 add sp, sp, #32
- 5150 .LCFI45:
- 5151 .cfi_def_cfa_offset 8
- 5152 @ sp needed
- 5153 0054 10BD pop {r4, pc}
- 5154 .L345:
- 5155 0056 00BF .align 2
- 5156 .L344:
- 5157 0058 00380240 .word 1073887232
- 5158 005c 00000240 .word 1073872896
- 5159 0060 00740040 .word 1073771520
- 5160 0064 FAEFFFFF .word -4102
- 5161 .cfi_endproc
- 5162 .LFE1216:
- 5164 .section .text.MX_SPI4_Init,"ax",%progbits
- 5165 .align 1
- 5166 .syntax unified
- 5167 .thumb
- 5168 .thumb_func
- 5170 MX_SPI4_Init:
- 5171 .LFB1192:
-1439:Src/main.c ****
- 5172 .loc 1 1439 1 is_stmt 1 view -0
- ARM GAS /tmp/ccLSPxIe.s page 248
-
-
- 5173 .cfi_startproc
- 5174 @ args = 0, pretend = 0, frame = 72
- 5175 @ frame_needed = 0, uses_anonymous_args = 0
- 5176 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 5177 .LCFI46:
- 5178 .cfi_def_cfa_offset 24
- 5179 .cfi_offset 4, -24
- 5180 .cfi_offset 5, -20
- 5181 .cfi_offset 6, -16
- 5182 .cfi_offset 7, -12
- 5183 .cfi_offset 8, -8
- 5184 .cfi_offset 14, -4
- 5185 0004 92B0 sub sp, sp, #72
- 5186 .LCFI47:
- 5187 .cfi_def_cfa_offset 96
-1445:Src/main.c ****
- 5188 .loc 1 1445 3 view .LVU1553
-1445:Src/main.c ****
- 5189 .loc 1 1445 22 is_stmt 0 view .LVU1554
- 5190 0006 2822 movs r2, #40
- 5191 0008 0021 movs r1, #0
- 5192 000a 08A8 add r0, sp, #32
- 5193 000c FFF7FEFF bl memset
- 5194 .LVL545:
-1447:Src/main.c ****
- 5195 .loc 1 1447 3 is_stmt 1 view .LVU1555
-1447:Src/main.c ****
- 5196 .loc 1 1447 23 is_stmt 0 view .LVU1556
- 5197 0010 0024 movs r4, #0
- 5198 0012 0294 str r4, [sp, #8]
- 5199 0014 0394 str r4, [sp, #12]
- 5200 0016 0494 str r4, [sp, #16]
- 5201 0018 0594 str r4, [sp, #20]
- 5202 001a 0694 str r4, [sp, #24]
- 5203 001c 0794 str r4, [sp, #28]
-1450:Src/main.c ****
- 5204 .loc 1 1450 3 is_stmt 1 view .LVU1557
- 5205 .LVL546:
- 5206 .LBB483:
- 5207 .LBI483:
- 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not
- 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n
- 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n
- 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_IsEnabledClock\n
- 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_IsEnabledClock\n
- 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_IsEnabledClock\n
- 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_IsEnabledClock\n
- 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_IsEnabledClock\n
- 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_IsEnabledClock\n
- 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n
- 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n
- 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n
- 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
- 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n
- ARM GAS /tmp/ccLSPxIe.s page 249
-
-
- 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_IsEnabledClock\n
- 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_IsEnabledClock\n
- 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_IsEnabledClock\n
- 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_IsEnabledClock\n
- 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_IsEnabledClock\n
- 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_IsEnabledClock\n
- 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_IsEnabledClock\n
- 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_IsEnabledClock\n
- 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_IsEnabledClock\n
- 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_IsEnabledClock
- 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
- 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
- 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB1_GRP1_IsEnabledClock(uint32_t Periphs)
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB1ENR, Periphs) == Periphs);
- 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock.
- 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n
- 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_DisableClock\n
- 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_DisableClock\n
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_DisableClock\n
- 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_DisableClock\n
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_DisableClock\n
- 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_DisableClock\n
- 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n
- 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n
- 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n
- 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n
- 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccLSPxIe.s page 250
-
-
- 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n
- 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_DisableClock\n
- 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_DisableClock\n
- 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_DisableClock\n
- 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_DisableClock\n
- 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_DisableClock\n
- 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_DisableClock\n
- 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACRXEN LL_AHB1_GRP1_DisableClock\n
- 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACPTPEN LL_AHB1_GRP1_DisableClock\n
- 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSEN LL_AHB1_GRP1_DisableClock\n
- 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR OTGHSULPIENDEN LL_AHB1_GRP1_DisableClock
- 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
- 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
- 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
- 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClock(uint32_t Periphs)
- 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1ENR, Periphs);
- 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB1 peripherals reset.
- 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ForceReset\n
- 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ForceReset\n
- 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ForceReset\n
- 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ForceReset\n
- 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ForceReset\n
- 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ForceReset\n
- 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n
- 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n
- 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n
- 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n
- 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccLSPxIe.s page 251
-
-
- 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n
- 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA1RST LL_AHB1_GRP1_ForceReset\n
- 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2RST LL_AHB1_GRP1_ForceReset\n
- 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ForceReset\n
- 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ForceReset\n
- 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ForceReset
- 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
- 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ForceReset(uint32_t Periphs)
- 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1RSTR, Periphs);
- 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB1 peripherals reset.
- 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ReleaseReset\n
- 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOBRST LL_AHB1_GRP1_ReleaseReset\n
- 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOCRST LL_AHB1_GRP1_ReleaseReset\n
- 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n
- 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n
- 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n
- 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n
- 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n
- 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n
- 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n
- 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ReleaseReset\n
- 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ReleaseReset\n
- 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA1RST LL_AHB1_GRP1_ReleaseReset\n
- 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2RST LL_AHB1_GRP1_ReleaseReset\n
- 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR DMA2DRST LL_AHB1_GRP1_ReleaseReset\n
- 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR ETHMACRST LL_AHB1_GRP1_ReleaseReset\n
- 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset
- 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
- 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- ARM GAS /tmp/ccLSPxIe.s page 252
-
-
- 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_ReleaseReset(uint32_t Periphs)
- 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1RSTR, Periphs);
- 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB1 peripheral clocks in low-power mode
- 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR CRCLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR AXILPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_EnableClockLowPower\n
- 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower
- 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- ARM GAS /tmp/ccLSPxIe.s page 253
-
-
- 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI
- 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
- 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
- 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2
- 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
- 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
- 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
- 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_EnableClockLowPower(uint32_t Periphs)
- 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1LPENR, Periphs);
- 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB1LPENR, Periphs);
- 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripheral clocks in low-power mode
- 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1LPENR GPIOALPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOBLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOILPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOJLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOKLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR CRCLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR AXILPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccLSPxIe.s page 254
-
-
- 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACTXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACRXLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR ETHMACPTPLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_DisableClockLowPower
- 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
- 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
- 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
- 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
- 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
- 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
- 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI
- 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF
- 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1
- 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2
- 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM
- 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM
- 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1
- 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2
- 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2D (*)
- 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*)
- 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*)
- 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*)
- 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*)
- 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS
- 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI
- 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB1_GRP1_DisableClockLowPower(uint32_t Periphs)
- 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1LPENR, Periphs);
- 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
- 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB2 AHB2
- 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
- 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock.
- 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_EnableClock\n
- ARM GAS /tmp/ccLSPxIe.s page 255
-
-
- 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_EnableClock\n
- 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_EnableClock\n
- 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_EnableClock\n
- 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_EnableClock\n
- 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_EnableClock\n
- 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_EnableClock
- 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs)
- 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2ENR, Periphs);
- 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2ENR, Periphs);
- 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB2 peripheral clock is enabled or not
- 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_IsEnabledClock\n
- 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_IsEnabledClock\n
- 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_IsEnabledClock\n
- 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_IsEnabledClock\n
- 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_IsEnabledClock\n
- 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_IsEnabledClock\n
- 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_IsEnabledClock
- 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
- 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB2_GRP1_IsEnabledClock(uint32_t Periphs)
- 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB2ENR, Periphs) == Periphs);
- 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock.
- 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n
- 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR JPEGEN LL_AHB2_GRP1_DisableClock\n
- ARM GAS /tmp/ccLSPxIe.s page 256
-
-
- 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR CRYPEN LL_AHB2_GRP1_DisableClock\n
- 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR AESEN LL_AHB2_GRP1_DisableClock\n
- 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR HASHEN LL_AHB2_GRP1_DisableClock\n
- 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR RNGEN LL_AHB2_GRP1_DisableClock\n
- 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2ENR OTGFSEN LL_AHB2_GRP1_DisableClock
- 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClock(uint32_t Periphs)
- 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2ENR, Periphs);
- 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB2 peripherals reset.
- 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset\n
- 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ForceReset\n
- 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ForceReset\n
- 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ForceReset\n
- 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ForceReset\n
- 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ForceReset\n
- 762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ForceReset
- 763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- 765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)
- 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2RSTR, Periphs);
- 779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB2 peripherals reset.
- 783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ReleaseReset\n
- 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ReleaseReset\n
- 785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n
- 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n
- 787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n
- 788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR RNGRST LL_AHB2_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccLSPxIe.s page 257
-
-
- 789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR OTGFSRST LL_AHB2_GRP1_ReleaseReset
- 790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- 792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ReleaseReset(uint32_t Periphs)
- 804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2RSTR, Periphs);
- 806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripheral clocks in low-power mode
- 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_EnableClockLowPower\n
- 816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_EnableClockLowPower
- 817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_EnableClockLowPower(uint32_t Periphs)
- 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs);
- 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);
- 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripheral clocks in low-power mode
- 840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_DisableClockLowPower\n
- 841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- 842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- 843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- 844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- 845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR RNGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccLSPxIe.s page 258
-
-
- 846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR OTGFSLPEN LL_AHB2_GRP1_DisableClockLowPower
- 847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_DCMI (*)
- 849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_JPEG (*)
- 850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_CRYP (*)
- 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_AES (*)
- 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_HASH (*)
- 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
- 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
- 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_DisableClockLowPower(uint32_t Periphs)
- 860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2LPENR, Periphs);
- 862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
- 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB3 AHB3
- 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
- 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripherals clock.
- 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_EnableClock\n
- 875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_EnableClock
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClock(uint32_t Periphs)
- 884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3ENR, Periphs);
- 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);
- 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB3 peripheral clock is enabled or not
- 894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_IsEnabledClock\n
- 895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_IsEnabledClock
- 896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
- 902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 259
-
-
- 903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_AHB3_GRP1_IsEnabledClock(uint32_t Periphs)
- 904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->AHB3ENR, Periphs) == Periphs);
- 906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripherals clock.
- 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3ENR FMCEN LL_AHB3_GRP1_DisableClock\n
- 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3ENR QSPIEN LL_AHB3_GRP1_DisableClock
- 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClock(uint32_t Periphs)
- 920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3ENR, Periphs);
- 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB3 peripherals reset.
- 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n
- 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset
- 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_ALL
- 930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ForceReset(uint32_t Periphs)
- 937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3RSTR, Periphs);
- 939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release AHB3 peripherals reset.
- 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ReleaseReset\n
- 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3RSTR QSPIRST LL_AHB3_GRP1_ReleaseReset
- 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
- 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_ReleaseReset(uint32_t Periphs)
- 954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3RSTR, Periphs);
- 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB3 peripheral clocks in low-power mode
- ARM GAS /tmp/ccLSPxIe.s page 260
-
-
- 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_EnableClockLowPower\n
- 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_EnableClockLowPower
- 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_EnableClockLowPower(uint32_t Periphs)
- 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB3LPENR, Periphs);
- 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3LPENR, Periphs);
- 975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripheral clocks in low-power mode
- 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n
- 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockLowPower
- 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- 986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- 987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- 988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB3_GRP1_DisableClockLowPower(uint32_t Periphs)
- 990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3LPENR, Periphs);
- 992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- 995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
- 996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- 997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- 998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB1 APB1
- 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
-1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock.
-1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
-1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
-1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n
-1007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_EnableClock\n
-1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_EnableClock\n
-1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_EnableClock\n
-1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_EnableClock\n
-1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_EnableClock\n
-1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n
-1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n
-1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n
-1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n
-1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccLSPxIe.s page 261
-
-
-1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_EnableClock\n
-1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_EnableClock\n
-1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_EnableClock\n
-1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_EnableClock\n
-1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_EnableClock\n
-1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_EnableClock\n
-1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_EnableClock\n
-1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_EnableClock\n
-1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_EnableClock\n
-1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_EnableClock\n
-1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_EnableClock\n
-1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_EnableClock\n
-1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_EnableClock\n
-1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_EnableClock\n
-1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_EnableClock\n
-1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_EnableClock\n
-1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_EnableClock\n
-1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_EnableClock
-1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
-1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
-1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- ARM GAS /tmp/ccLSPxIe.s page 262
-
-
-1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
-1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1ENR, Periphs);
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
-1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if APB1 peripheral clock is enabled or not
-1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_IsEnabledClock\n
-1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_IsEnabledClock\n
-1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_IsEnabledClock\n
-1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_IsEnabledClock\n
-1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_IsEnabledClock\n
-1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_IsEnabledClock\n
-1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_IsEnabledClock\n
-1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_IsEnabledClock\n
-1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_IsEnabledClock\n
-1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_IsEnabledClock\n
-1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n
-1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n
-1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n
-1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_IsEnabledClock\n
-1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n
-1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n
-1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n
-1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n
-1100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_IsEnabledClock\n
-1101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_IsEnabledClock\n
-1102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_IsEnabledClock\n
-1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_IsEnabledClock\n
-1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_IsEnabledClock\n
-1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_IsEnabledClock\n
-1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_IsEnabledClock\n
-1107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_IsEnabledClock\n
-1108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_IsEnabledClock\n
-1109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_IsEnabledClock\n
-1110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_IsEnabledClock\n
-1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_IsEnabledClock\n
-1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_IsEnabledClock
-1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
- ARM GAS /tmp/ccLSPxIe.s page 263
-
-
-1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
-1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
-1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs)
-1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs);
-1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable APB1 peripherals clock.
-1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n
-1157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_DisableClock\n
-1158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_DisableClock\n
-1159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM5EN LL_APB1_GRP1_DisableClock\n
-1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM6EN LL_APB1_GRP1_DisableClock\n
-1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM7EN LL_APB1_GRP1_DisableClock\n
-1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM12EN LL_APB1_GRP1_DisableClock\n
-1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM13EN LL_APB1_GRP1_DisableClock\n
-1164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_DisableClock\n
-1165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_DisableClock\n
-1166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_DisableClock\n
-1167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_DisableClock\n
-1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_DisableClock\n
-1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_DisableClock\n
-1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_DisableClock\n
-1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_DisableClock\n
-1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_DisableClock\n
-1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n
-1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
-1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
-1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
-1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_DisableClock\n
-1178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN1EN LL_APB1_GRP1_DisableClock\n
-1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN2EN LL_APB1_GRP1_DisableClock\n
-1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CAN3EN LL_APB1_GRP1_DisableClock\n
-1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR CECEN LL_APB1_GRP1_DisableClock\n
-1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR PWREN LL_APB1_GRP1_DisableClock\n
-1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n
-1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n
-1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n
-1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock
-1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 264
-
-
-1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
-1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClock(uint32_t Periphs)
-1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1ENR, Periphs);
-1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force APB1 peripherals reset.
-1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n
-1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
-1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n
-1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n
-1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n
-1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ForceReset\n
-1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ForceReset\n
-1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ForceReset\n
-1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ForceReset\n
-1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ForceReset\n
-1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n
-1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n
-1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n
-1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n
-1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccLSPxIe.s page 265
-
-
-1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ForceReset\n
-1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ForceReset\n
-1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ForceReset\n
-1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ForceReset\n
-1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ForceReset\n
-1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ForceReset\n
-1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ForceReset\n
-1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ForceReset\n
-1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ForceReset\n
-1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ForceReset\n
-1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ForceReset\n
-1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ForceReset\n
-1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ForceReset\n
-1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ForceReset\n
-1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ForceReset
-1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ForceReset(uint32_t Periphs)
-1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs);
-1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Release APB1 peripherals reset.
- ARM GAS /tmp/ccLSPxIe.s page 266
-
-
-1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ReleaseReset\n
-1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ReleaseReset\n
-1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ReleaseReset\n
-1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ReleaseReset\n
-1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ReleaseReset\n
-1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM7RST LL_APB1_GRP1_ReleaseReset\n
-1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM12RST LL_APB1_GRP1_ReleaseReset\n
-1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM13RST LL_APB1_GRP1_ReleaseReset\n
-1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM14RST LL_APB1_GRP1_ReleaseReset\n
-1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR LPTIM1RST LL_APB1_GRP1_ReleaseReset\n
-1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ReleaseReset\n
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ReleaseReset\n
-1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ReleaseReset\n
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ReleaseReset\n
-1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART2RST LL_APB1_GRP1_ReleaseReset\n
-1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR USART3RST LL_APB1_GRP1_ReleaseReset\n
-1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART4RST LL_APB1_GRP1_ReleaseReset\n
-1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART5RST LL_APB1_GRP1_ReleaseReset\n
-1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n
-1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n
-1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n
-1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ReleaseReset\n
-1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n
-1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n
-1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ReleaseReset\n
-1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n
-1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR PWRRST LL_APB1_GRP1_ReleaseReset\n
-1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR DACRST LL_APB1_GRP1_ReleaseReset\n
-1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART7RST LL_APB1_GRP1_ReleaseReset\n
-1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR UART8RST LL_APB1_GRP1_ReleaseReset
-1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- ARM GAS /tmp/ccLSPxIe.s page 267
-
-
-1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_ReleaseReset(uint32_t Periphs)
-1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1RSTR, Periphs);
-1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripheral clocks in low-power mode
-1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM3LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM4LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM5LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM6LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM7LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_EnableClockLowPower\n
-1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI2LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI3LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_EnableClockLowPower\n
-1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C4LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN1LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_EnableClockLowPower\n
-1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_EnableClockLowPower\n
-1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n
-1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n
-1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower
-1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
- ARM GAS /tmp/ccLSPxIe.s page 268
-
-
-1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
-1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs)
-1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
-1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1LPENR, Periphs);
-1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
-1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB1LPENR, Periphs);
-1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
-1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable APB1 peripheral clocks in low-power mode
-1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1LPENR TIM2LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM3LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM4LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM5LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM6LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM7LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n
-1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI2LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPI3LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR SPDIFRXLPEN LL_APB1_GRP1_DisableClockLowPower\n
-1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART2LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR USART3LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C3LPEN LL_APB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccLSPxIe.s page 269
-
-
-1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C4LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN1LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN2LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CAN3LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR CECLPEN LL_APB1_GRP1_DisableClockLowPower\n
-1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR PWRLPEN LL_APB1_GRP1_DisableClockLowPower\n
-1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_DisableClockLowPower\n
-1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_DisableClockLowPower\n
-1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_DisableClockLowPower
-1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2
-1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3
-1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
-1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
-1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
-1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
-1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
-1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
-1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
-1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1
-1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG
-1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
-1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
-1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
-1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
-1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
-1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART4
-1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART5
-1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1
-1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2
-1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3
-1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
-1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
-1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
-1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
-1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
-1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
-1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
-1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
-1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*)
-1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)
-1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->APB1LPENR, Periphs);
-1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
-1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
-1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
-1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
- ARM GAS /tmp/ccLSPxIe.s page 270
-
-
-1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
-1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
-1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
-1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB2 peripherals clock.
-1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB2ENR TIM1EN LL_APB2_GRP1_EnableClock\n
-1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM8EN LL_APB2_GRP1_EnableClock\n
-1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART1EN LL_APB2_GRP1_EnableClock\n
-1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR USART6EN LL_APB2_GRP1_EnableClock\n
-1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC1EN LL_APB2_GRP1_EnableClock\n
-1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC2EN LL_APB2_GRP1_EnableClock\n
-1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR ADC3EN LL_APB2_GRP1_EnableClock\n
-1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC1EN LL_APB2_GRP1_EnableClock\n
-1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SDMMC2EN LL_APB2_GRP1_EnableClock\n
-1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI1EN LL_APB2_GRP1_EnableClock\n
-1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI4EN LL_APB2_GRP1_EnableClock\n
-1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SYSCFGEN LL_APB2_GRP1_EnableClock\n
-1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM9EN LL_APB2_GRP1_EnableClock\n
-1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM10EN LL_APB2_GRP1_EnableClock\n
-1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n
-1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI5EN LL_APB2_GRP1_EnableClock\n
-1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI6EN LL_APB2_GRP1_EnableClock\n
-1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n
-1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI2EN LL_APB2_GRP1_EnableClock\n
-1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR LTDCEN LL_APB2_GRP1_EnableClock\n
-1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DSIEN LL_APB2_GRP1_EnableClock\n
-1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock\n
-1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR MDIOEN LL_APB2_GRP1_EnableClock\n
-1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR OTGPHYCEN LL_APB2_GRP1_EnableClock
-1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
-1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM1
-1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8
-1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1
-1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6
-1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
-1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2
-1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3
-1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
-1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*)
-1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
-1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI4
-1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SYSCFG
-1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM9
-1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10
-1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
-1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
-1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
-1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1
-1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI2
-1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
-1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DSI (*)
-1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_DFSDM1 (*)
-1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_MDIO (*)
-1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*)
-1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
-1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
-1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
-1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 271
-
-
-1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB2_GRP1_EnableClock(uint32_t Periphs)
- 5208 .loc 3 1587 22 view .LVU1558
- 5209 .LBB484:
-1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
-1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
- 5210 .loc 3 1589 3 view .LVU1559
-1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
- 5211 .loc 3 1590 3 view .LVU1560
- 5212 001e 2A4B ldr r3, .L348
- 5213 0020 5A6C ldr r2, [r3, #68]
- 5214 0022 42F40052 orr r2, r2, #8192
- 5215 0026 5A64 str r2, [r3, #68]
-1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->APB2ENR, Periphs);
- 5216 .loc 3 1592 3 view .LVU1561
- 5217 .loc 3 1592 12 is_stmt 0 view .LVU1562
- 5218 0028 5A6C ldr r2, [r3, #68]
- 5219 002a 02F40052 and r2, r2, #8192
- 5220 .loc 3 1592 10 view .LVU1563
- 5221 002e 0192 str r2, [sp, #4]
-1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5222 .loc 3 1593 3 is_stmt 1 view .LVU1564
- 5223 0030 019A ldr r2, [sp, #4]
- 5224 .LVL547:
- 5225 .loc 3 1593 3 is_stmt 0 view .LVU1565
- 5226 .LBE484:
- 5227 .LBE483:
-1452:Src/main.c **** /**SPI4 GPIO Configuration
- 5228 .loc 1 1452 3 is_stmt 1 view .LVU1566
- 5229 .LBB485:
- 5230 .LBI485:
- 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5231 .loc 3 309 22 view .LVU1567
- 5232 .LBB486:
- 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
- 5233 .loc 3 311 3 view .LVU1568
- 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5234 .loc 3 312 3 view .LVU1569
- 5235 0032 1A6B ldr r2, [r3, #48]
- 5236 0034 42F01002 orr r2, r2, #16
- 5237 0038 1A63 str r2, [r3, #48]
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5238 .loc 3 314 3 view .LVU1570
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5239 .loc 3 314 12 is_stmt 0 view .LVU1571
- 5240 003a 1B6B ldr r3, [r3, #48]
- 5241 003c 03F01003 and r3, r3, #16
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5242 .loc 3 314 10 view .LVU1572
- 5243 0040 0093 str r3, [sp]
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5244 .loc 3 315 3 is_stmt 1 view .LVU1573
- 5245 0042 009B ldr r3, [sp]
- 5246 .LVL548:
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5247 .loc 3 315 3 is_stmt 0 view .LVU1574
- 5248 .LBE486:
- ARM GAS /tmp/ccLSPxIe.s page 272
-
-
- 5249 .LBE485:
-1457:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5250 .loc 1 1457 3 is_stmt 1 view .LVU1575
-1457:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5251 .loc 1 1457 23 is_stmt 0 view .LVU1576
- 5252 0044 4FF48053 mov r3, #4096
- 5253 0048 0293 str r3, [sp, #8]
-1458:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5254 .loc 1 1458 3 is_stmt 1 view .LVU1577
-1458:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5255 .loc 1 1458 24 is_stmt 0 view .LVU1578
- 5256 004a 0225 movs r5, #2
- 5257 004c 0395 str r5, [sp, #12]
-1459:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5258 .loc 1 1459 3 is_stmt 1 view .LVU1579
-1459:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5259 .loc 1 1459 25 is_stmt 0 view .LVU1580
- 5260 004e 4FF00308 mov r8, #3
- 5261 0052 CDF81080 str r8, [sp, #16]
-1460:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5262 .loc 1 1460 3 is_stmt 1 view .LVU1581
-1461:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5263 .loc 1 1461 3 view .LVU1582
-1462:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 5264 .loc 1 1462 3 view .LVU1583
-1462:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 5265 .loc 1 1462 29 is_stmt 0 view .LVU1584
- 5266 0056 0527 movs r7, #5
- 5267 0058 0797 str r7, [sp, #28]
-1463:Src/main.c ****
- 5268 .loc 1 1463 3 is_stmt 1 view .LVU1585
- 5269 005a 1C4E ldr r6, .L348+4
- 5270 005c 02A9 add r1, sp, #8
- 5271 005e 3046 mov r0, r6
- 5272 0060 FFF7FEFF bl LL_GPIO_Init
- 5273 .LVL549:
-1465:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5274 .loc 1 1465 3 view .LVU1586
-1465:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5275 .loc 1 1465 23 is_stmt 0 view .LVU1587
- 5276 0064 4FF40053 mov r3, #8192
- 5277 0068 0293 str r3, [sp, #8]
-1466:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5278 .loc 1 1466 3 is_stmt 1 view .LVU1588
-1466:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5279 .loc 1 1466 24 is_stmt 0 view .LVU1589
- 5280 006a 0395 str r5, [sp, #12]
-1467:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5281 .loc 1 1467 3 is_stmt 1 view .LVU1590
-1467:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5282 .loc 1 1467 25 is_stmt 0 view .LVU1591
- 5283 006c CDF81080 str r8, [sp, #16]
-1468:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5284 .loc 1 1468 3 is_stmt 1 view .LVU1592
-1468:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5285 .loc 1 1468 30 is_stmt 0 view .LVU1593
- 5286 0070 0594 str r4, [sp, #20]
- ARM GAS /tmp/ccLSPxIe.s page 273
-
-
-1469:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5287 .loc 1 1469 3 is_stmt 1 view .LVU1594
-1469:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5288 .loc 1 1469 24 is_stmt 0 view .LVU1595
- 5289 0072 0694 str r4, [sp, #24]
-1470:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 5290 .loc 1 1470 3 is_stmt 1 view .LVU1596
-1470:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct);
- 5291 .loc 1 1470 29 is_stmt 0 view .LVU1597
- 5292 0074 0797 str r7, [sp, #28]
-1471:Src/main.c ****
- 5293 .loc 1 1471 3 is_stmt 1 view .LVU1598
- 5294 0076 02A9 add r1, sp, #8
- 5295 0078 3046 mov r0, r6
- 5296 007a FFF7FEFF bl LL_GPIO_Init
- 5297 .LVL550:
-1477:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5298 .loc 1 1477 3 view .LVU1599
-1477:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5299 .loc 1 1477 36 is_stmt 0 view .LVU1600
- 5300 007e 4FF48063 mov r3, #1024
- 5301 0082 0893 str r3, [sp, #32]
-1478:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5302 .loc 1 1478 3 is_stmt 1 view .LVU1601
-1478:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5303 .loc 1 1478 23 is_stmt 0 view .LVU1602
- 5304 0084 4FF48273 mov r3, #260
- 5305 0088 0993 str r3, [sp, #36]
-1479:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5306 .loc 1 1479 3 is_stmt 1 view .LVU1603
-1479:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5307 .loc 1 1479 28 is_stmt 0 view .LVU1604
- 5308 008a 4FF47063 mov r3, #3840
- 5309 008e 0A93 str r3, [sp, #40]
-1480:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5310 .loc 1 1480 3 is_stmt 1 view .LVU1605
-1480:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5311 .loc 1 1480 32 is_stmt 0 view .LVU1606
- 5312 0090 0B95 str r5, [sp, #44]
-1481:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5313 .loc 1 1481 3 is_stmt 1 view .LVU1607
-1481:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5314 .loc 1 1481 29 is_stmt 0 view .LVU1608
- 5315 0092 0C94 str r4, [sp, #48]
-1482:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5316 .loc 1 1482 3 is_stmt 1 view .LVU1609
-1482:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5317 .loc 1 1482 22 is_stmt 0 view .LVU1610
- 5318 0094 4FF40073 mov r3, #512
- 5319 0098 0D93 str r3, [sp, #52]
-1483:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5320 .loc 1 1483 3 is_stmt 1 view .LVU1611
-1483:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5321 .loc 1 1483 27 is_stmt 0 view .LVU1612
- 5322 009a 1823 movs r3, #24
- 5323 009c 0E93 str r3, [sp, #56]
-1484:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- ARM GAS /tmp/ccLSPxIe.s page 274
-
-
- 5324 .loc 1 1484 3 is_stmt 1 view .LVU1613
-1484:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5325 .loc 1 1484 27 is_stmt 0 view .LVU1614
- 5326 009e 0F94 str r4, [sp, #60]
-1485:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5327 .loc 1 1485 3 is_stmt 1 view .LVU1615
-1485:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5328 .loc 1 1485 33 is_stmt 0 view .LVU1616
- 5329 00a0 1094 str r4, [sp, #64]
-1486:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
- 5330 .loc 1 1486 3 is_stmt 1 view .LVU1617
-1486:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct);
- 5331 .loc 1 1486 26 is_stmt 0 view .LVU1618
- 5332 00a2 0723 movs r3, #7
- 5333 00a4 1193 str r3, [sp, #68]
-1487:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA);
- 5334 .loc 1 1487 3 is_stmt 1 view .LVU1619
- 5335 00a6 0A4C ldr r4, .L348+8
- 5336 00a8 08A9 add r1, sp, #32
- 5337 00aa 2046 mov r0, r4
- 5338 00ac FFF7FEFF bl LL_SPI_Init
- 5339 .LVL551:
-1488:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4);
- 5340 .loc 1 1488 3 view .LVU1620
- 5341 .LBB487:
- 5342 .LBI487:
- 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5343 .loc 4 426 22 view .LVU1621
- 5344 .LBB488:
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5345 .loc 4 428 3 view .LVU1622
- 5346 00b0 6368 ldr r3, [r4, #4]
- 5347 00b2 23F01003 bic r3, r3, #16
- 5348 00b6 6360 str r3, [r4, #4]
- 5349 .LVL552:
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5350 .loc 4 428 3 is_stmt 0 view .LVU1623
- 5351 .LBE488:
- 5352 .LBE487:
-1489:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */
- 5353 .loc 1 1489 3 is_stmt 1 view .LVU1624
- 5354 .LBB489:
- 5355 .LBI489:
- 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5356 .loc 4 874 22 view .LVU1625
- 5357 .LBB490:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5358 .loc 4 876 3 view .LVU1626
- 5359 00b8 6368 ldr r3, [r4, #4]
- 5360 00ba 23F00803 bic r3, r3, #8
- 5361 00be 6360 str r3, [r4, #4]
- 5362 .LVL553:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5363 .loc 4 876 3 is_stmt 0 view .LVU1627
- 5364 .LBE490:
- 5365 .LBE489:
-1494:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 275
-
-
- 5366 .loc 1 1494 1 view .LVU1628
- 5367 00c0 12B0 add sp, sp, #72
- 5368 .LCFI48:
- 5369 .cfi_def_cfa_offset 24
- 5370 @ sp needed
- 5371 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 5372 .L349:
- 5373 00c6 00BF .align 2
- 5374 .L348:
- 5375 00c8 00380240 .word 1073887232
- 5376 00cc 00100240 .word 1073876992
- 5377 00d0 00340140 .word 1073820672
- 5378 .cfi_endproc
- 5379 .LFE1192:
- 5381 .section .text.MX_SPI2_Init,"ax",%progbits
- 5382 .align 1
- 5383 .syntax unified
- 5384 .thumb
- 5385 .thumb_func
- 5387 MX_SPI2_Init:
- 5388 .LFB1191:
-1367:Src/main.c ****
- 5389 .loc 1 1367 1 is_stmt 1 view -0
- 5390 .cfi_startproc
- 5391 @ args = 0, pretend = 0, frame = 72
- 5392 @ frame_needed = 0, uses_anonymous_args = 0
- 5393 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 5394 .LCFI49:
- 5395 .cfi_def_cfa_offset 24
- 5396 .cfi_offset 4, -24
- 5397 .cfi_offset 5, -20
- 5398 .cfi_offset 6, -16
- 5399 .cfi_offset 7, -12
- 5400 .cfi_offset 8, -8
- 5401 .cfi_offset 14, -4
- 5402 0004 92B0 sub sp, sp, #72
- 5403 .LCFI50:
- 5404 .cfi_def_cfa_offset 96
-1373:Src/main.c ****
- 5405 .loc 1 1373 3 view .LVU1630
-1373:Src/main.c ****
- 5406 .loc 1 1373 22 is_stmt 0 view .LVU1631
- 5407 0006 2822 movs r2, #40
- 5408 0008 0021 movs r1, #0
- 5409 000a 08A8 add r0, sp, #32
- 5410 000c FFF7FEFF bl memset
- 5411 .LVL554:
-1375:Src/main.c ****
- 5412 .loc 1 1375 3 is_stmt 1 view .LVU1632
-1375:Src/main.c ****
- 5413 .loc 1 1375 23 is_stmt 0 view .LVU1633
- 5414 0010 0024 movs r4, #0
- 5415 0012 0294 str r4, [sp, #8]
- 5416 0014 0394 str r4, [sp, #12]
- 5417 0016 0494 str r4, [sp, #16]
- 5418 0018 0594 str r4, [sp, #20]
- 5419 001a 0694 str r4, [sp, #24]
- ARM GAS /tmp/ccLSPxIe.s page 276
-
-
- 5420 001c 0794 str r4, [sp, #28]
-1378:Src/main.c ****
- 5421 .loc 1 1378 3 is_stmt 1 view .LVU1634
- 5422 .LVL555:
- 5423 .LBB491:
- 5424 .LBI491:
+ 954 .loc 4 876 3 view .LVU324
+ 955 00b8 6368 ldr r3, [r4, #4]
+ 956 00ba 23F00803 bic r3, r3, #8
+ 957 00be 6360 str r3, [r4, #4]
+ 958 .LVL51:
+ 959 .loc 4 876 3 is_stmt 0 view .LVU325
+ 960 .LBE159:
+ ARM GAS /tmp/ccDGOsZt.s page 119
+
+
+ 961 .LBE158:
+ 491:Src/main.c ****
+ 962 .loc 1 491 1 view .LVU326
+ 963 00c0 12B0 add sp, sp, #72
+ 964 .LCFI9:
+ 965 .cfi_def_cfa_offset 24
+ 966 @ sp needed
+ 967 00c2 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
+ 968 .L19:
+ 969 00c6 00BF .align 2
+ 970 .L18:
+ 971 00c8 00380240 .word 1073887232
+ 972 00cc 00100240 .word 1073876992
+ 973 00d0 00340140 .word 1073820672
+ 974 .cfi_endproc
+ 975 .LFE1189:
+ 977 .section .text.MX_SPI2_Init,"ax",%progbits
+ 978 .align 1
+ 979 .syntax unified
+ 980 .thumb
+ 981 .thumb_func
+ 983 MX_SPI2_Init:
+ 984 .LFB1188:
+ 364:Src/main.c ****
+ 985 .loc 1 364 1 is_stmt 1 view -0
+ 986 .cfi_startproc
+ 987 @ args = 0, pretend = 0, frame = 72
+ 988 @ frame_needed = 0, uses_anonymous_args = 0
+ 989 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
+ 990 .LCFI10:
+ 991 .cfi_def_cfa_offset 24
+ 992 .cfi_offset 4, -24
+ 993 .cfi_offset 5, -20
+ 994 .cfi_offset 6, -16
+ 995 .cfi_offset 7, -12
+ 996 .cfi_offset 8, -8
+ 997 .cfi_offset 14, -4
+ 998 0004 92B0 sub sp, sp, #72
+ 999 .LCFI11:
+ 1000 .cfi_def_cfa_offset 96
+ 370:Src/main.c ****
+ 1001 .loc 1 370 3 view .LVU328
+ 370:Src/main.c ****
+ 1002 .loc 1 370 22 is_stmt 0 view .LVU329
+ 1003 0006 2822 movs r2, #40
+ 1004 0008 0021 movs r1, #0
+ 1005 000a 08A8 add r0, sp, #32
+ 1006 000c FFF7FEFF bl memset
+ 1007 .LVL52:
+ 372:Src/main.c ****
+ 1008 .loc 1 372 3 is_stmt 1 view .LVU330
+ 372:Src/main.c ****
+ 1009 .loc 1 372 23 is_stmt 0 view .LVU331
+ 1010 0010 0024 movs r4, #0
+ 1011 0012 0294 str r4, [sp, #8]
+ 1012 0014 0394 str r4, [sp, #12]
+ 1013 0016 0494 str r4, [sp, #16]
+ ARM GAS /tmp/ccDGOsZt.s page 120
+
+
+ 1014 0018 0594 str r4, [sp, #20]
+ 1015 001a 0694 str r4, [sp, #24]
+ 1016 001c 0794 str r4, [sp, #28]
+ 375:Src/main.c ****
+ 1017 .loc 1 375 3 is_stmt 1 view .LVU332
+ 1018 .LVL53:
+ 1019 .LBB160:
+ 1020 .LBI160:
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5425 .loc 3 1071 22 view .LVU1635
- 5426 .LBB492:
+ 1021 .loc 3 1071 22 view .LVU333
+ 1022 .LBB161:
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
- 5427 .loc 3 1073 3 view .LVU1636
+ 1023 .loc 3 1073 3 view .LVU334
1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5428 .loc 3 1074 3 view .LVU1637
- 5429 001e 2F4B ldr r3, .L352
- 5430 0020 1A6C ldr r2, [r3, #64]
- 5431 0022 42F48042 orr r2, r2, #16384
- 5432 0026 1A64 str r2, [r3, #64]
+ 1024 .loc 3 1074 3 view .LVU335
+ 1025 001e 2F4B ldr r3, .L22
+ 1026 0020 1A6C ldr r2, [r3, #64]
+ 1027 0022 42F48042 orr r2, r2, #16384
+ 1028 0026 1A64 str r2, [r3, #64]
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5433 .loc 3 1076 3 view .LVU1638
+ 1029 .loc 3 1076 3 view .LVU336
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5434 .loc 3 1076 12 is_stmt 0 view .LVU1639
- 5435 0028 1A6C ldr r2, [r3, #64]
- 5436 002a 02F48042 and r2, r2, #16384
+ 1030 .loc 3 1076 12 is_stmt 0 view .LVU337
+ 1031 0028 1A6C ldr r2, [r3, #64]
+ 1032 002a 02F48042 and r2, r2, #16384
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5437 .loc 3 1076 10 view .LVU1640
- 5438 002e 0192 str r2, [sp, #4]
+ 1033 .loc 3 1076 10 view .LVU338
+ 1034 002e 0192 str r2, [sp, #4]
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5439 .loc 3 1077 3 is_stmt 1 view .LVU1641
- 5440 0030 019A ldr r2, [sp, #4]
- 5441 .LVL556:
+ 1035 .loc 3 1077 3 is_stmt 1 view .LVU339
+ 1036 0030 019A ldr r2, [sp, #4]
+ 1037 .LVL54:
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5442 .loc 3 1077 3 is_stmt 0 view .LVU1642
- 5443 .LBE492:
- 5444 .LBE491:
-1380:Src/main.c **** /**SPI2 GPIO Configuration
- 5445 .loc 1 1380 3 is_stmt 1 view .LVU1643
- 5446 .LBB493:
- 5447 .LBI493:
+ 1038 .loc 3 1077 3 is_stmt 0 view .LVU340
+ 1039 .LBE161:
+ 1040 .LBE160:
+ 377:Src/main.c **** /**SPI2 GPIO Configuration
+ 1041 .loc 1 377 3 is_stmt 1 view .LVU341
+ 1042 .LBB162:
+ 1043 .LBI162:
309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5448 .loc 3 309 22 view .LVU1644
- 5449 .LBB494:
+ 1044 .loc 3 309 22 view .LVU342
+ 1045 .LBB163:
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
- 5450 .loc 3 311 3 view .LVU1645
+ 1046 .loc 3 311 3 view .LVU343
312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5451 .loc 3 312 3 view .LVU1646
- 5452 0032 1A6B ldr r2, [r3, #48]
- 5453 0034 42F00202 orr r2, r2, #2
- 5454 0038 1A63 str r2, [r3, #48]
+ 1047 .loc 3 312 3 view .LVU344
+ 1048 0032 1A6B ldr r2, [r3, #48]
+ 1049 0034 42F00202 orr r2, r2, #2
+ 1050 0038 1A63 str r2, [r3, #48]
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5455 .loc 3 314 3 view .LVU1647
+ 1051 .loc 3 314 3 view .LVU345
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5456 .loc 3 314 12 is_stmt 0 view .LVU1648
- 5457 003a 1B6B ldr r3, [r3, #48]
- 5458 003c 03F00203 and r3, r3, #2
+ 1052 .loc 3 314 12 is_stmt 0 view .LVU346
+ 1053 003a 1B6B ldr r3, [r3, #48]
+ 1054 003c 03F00203 and r3, r3, #2
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5459 .loc 3 314 10 view .LVU1649
- 5460 0040 0093 str r3, [sp]
- ARM GAS /tmp/ccLSPxIe.s page 277
+ ARM GAS /tmp/ccDGOsZt.s page 121
+ 1055 .loc 3 314 10 view .LVU347
+ 1056 0040 0093 str r3, [sp]
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5461 .loc 3 315 3 is_stmt 1 view .LVU1650
- 5462 0042 009B ldr r3, [sp]
- 5463 .LVL557:
+ 1057 .loc 3 315 3 is_stmt 1 view .LVU348
+ 1058 0042 009B ldr r3, [sp]
+ 1059 .LVL55:
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5464 .loc 3 315 3 is_stmt 0 view .LVU1651
- 5465 .LBE494:
- 5466 .LBE493:
-1386:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5467 .loc 1 1386 3 is_stmt 1 view .LVU1652
-1386:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5468 .loc 1 1386 23 is_stmt 0 view .LVU1653
- 5469 0044 4FF40053 mov r3, #8192
- 5470 0048 0293 str r3, [sp, #8]
-1387:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5471 .loc 1 1387 3 is_stmt 1 view .LVU1654
-1387:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5472 .loc 1 1387 24 is_stmt 0 view .LVU1655
- 5473 004a 4FF00208 mov r8, #2
- 5474 004e CDF80C80 str r8, [sp, #12]
-1388:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5475 .loc 1 1388 3 is_stmt 1 view .LVU1656
-1388:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5476 .loc 1 1388 25 is_stmt 0 view .LVU1657
- 5477 0052 0327 movs r7, #3
- 5478 0054 0497 str r7, [sp, #16]
-1389:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5479 .loc 1 1389 3 is_stmt 1 view .LVU1658
-1390:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5480 .loc 1 1390 3 view .LVU1659
-1391:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5481 .loc 1 1391 3 view .LVU1660
-1391:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5482 .loc 1 1391 29 is_stmt 0 view .LVU1661
- 5483 0056 0526 movs r6, #5
- 5484 0058 0796 str r6, [sp, #28]
-1392:Src/main.c ****
- 5485 .loc 1 1392 3 is_stmt 1 view .LVU1662
- 5486 005a 214D ldr r5, .L352+4
- 5487 005c 02A9 add r1, sp, #8
- 5488 005e 2846 mov r0, r5
- 5489 0060 FFF7FEFF bl LL_GPIO_Init
- 5490 .LVL558:
-1394:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5491 .loc 1 1394 3 view .LVU1663
-1394:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5492 .loc 1 1394 23 is_stmt 0 view .LVU1664
- 5493 0064 4FF48043 mov r3, #16384
- 5494 0068 0293 str r3, [sp, #8]
-1395:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5495 .loc 1 1395 3 is_stmt 1 view .LVU1665
-1395:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5496 .loc 1 1395 24 is_stmt 0 view .LVU1666
- 5497 006a CDF80C80 str r8, [sp, #12]
-1396:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5498 .loc 1 1396 3 is_stmt 1 view .LVU1667
-1396:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- ARM GAS /tmp/ccLSPxIe.s page 278
+ 1060 .loc 3 315 3 is_stmt 0 view .LVU349
+ 1061 .LBE163:
+ 1062 .LBE162:
+ 383:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1063 .loc 1 383 3 is_stmt 1 view .LVU350
+ 383:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1064 .loc 1 383 23 is_stmt 0 view .LVU351
+ 1065 0044 4FF40053 mov r3, #8192
+ 1066 0048 0293 str r3, [sp, #8]
+ 384:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1067 .loc 1 384 3 is_stmt 1 view .LVU352
+ 384:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1068 .loc 1 384 24 is_stmt 0 view .LVU353
+ 1069 004a 4FF00208 mov r8, #2
+ 1070 004e CDF80C80 str r8, [sp, #12]
+ 385:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1071 .loc 1 385 3 is_stmt 1 view .LVU354
+ 385:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1072 .loc 1 385 25 is_stmt 0 view .LVU355
+ 1073 0052 0327 movs r7, #3
+ 1074 0054 0497 str r7, [sp, #16]
+ 386:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1075 .loc 1 386 3 is_stmt 1 view .LVU356
+ 387:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1076 .loc 1 387 3 view .LVU357
+ 388:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1077 .loc 1 388 3 view .LVU358
+ 388:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1078 .loc 1 388 29 is_stmt 0 view .LVU359
+ 1079 0056 0526 movs r6, #5
+ 1080 0058 0796 str r6, [sp, #28]
+ 389:Src/main.c ****
+ 1081 .loc 1 389 3 is_stmt 1 view .LVU360
+ 1082 005a 214D ldr r5, .L22+4
+ 1083 005c 02A9 add r1, sp, #8
+ 1084 005e 2846 mov r0, r5
+ 1085 0060 FFF7FEFF bl LL_GPIO_Init
+ 1086 .LVL56:
+ 391:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1087 .loc 1 391 3 view .LVU361
+ 391:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1088 .loc 1 391 23 is_stmt 0 view .LVU362
+ 1089 0064 4FF48043 mov r3, #16384
+ 1090 0068 0293 str r3, [sp, #8]
+ 392:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1091 .loc 1 392 3 is_stmt 1 view .LVU363
+ 392:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1092 .loc 1 392 24 is_stmt 0 view .LVU364
+ 1093 006a CDF80C80 str r8, [sp, #12]
+ 393:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ ARM GAS /tmp/ccDGOsZt.s page 122
- 5499 .loc 1 1396 25 is_stmt 0 view .LVU1668
- 5500 006e 0497 str r7, [sp, #16]
-1397:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5501 .loc 1 1397 3 is_stmt 1 view .LVU1669
-1397:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5502 .loc 1 1397 30 is_stmt 0 view .LVU1670
- 5503 0070 0594 str r4, [sp, #20]
-1398:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5504 .loc 1 1398 3 is_stmt 1 view .LVU1671
-1398:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5505 .loc 1 1398 24 is_stmt 0 view .LVU1672
- 5506 0072 0694 str r4, [sp, #24]
-1399:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5507 .loc 1 1399 3 is_stmt 1 view .LVU1673
-1399:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5508 .loc 1 1399 29 is_stmt 0 view .LVU1674
- 5509 0074 0796 str r6, [sp, #28]
-1400:Src/main.c ****
- 5510 .loc 1 1400 3 is_stmt 1 view .LVU1675
- 5511 0076 02A9 add r1, sp, #8
- 5512 0078 2846 mov r0, r5
- 5513 007a FFF7FEFF bl LL_GPIO_Init
- 5514 .LVL559:
-1402:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5515 .loc 1 1402 3 view .LVU1676
-1402:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5516 .loc 1 1402 23 is_stmt 0 view .LVU1677
- 5517 007e 4FF40043 mov r3, #32768
- 5518 0082 0293 str r3, [sp, #8]
-1403:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5519 .loc 1 1403 3 is_stmt 1 view .LVU1678
-1403:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5520 .loc 1 1403 24 is_stmt 0 view .LVU1679
- 5521 0084 CDF80C80 str r8, [sp, #12]
-1404:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5522 .loc 1 1404 3 is_stmt 1 view .LVU1680
-1404:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5523 .loc 1 1404 25 is_stmt 0 view .LVU1681
- 5524 0088 0497 str r7, [sp, #16]
-1405:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5525 .loc 1 1405 3 is_stmt 1 view .LVU1682
-1405:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5526 .loc 1 1405 30 is_stmt 0 view .LVU1683
- 5527 008a 0594 str r4, [sp, #20]
-1406:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5528 .loc 1 1406 3 is_stmt 1 view .LVU1684
-1406:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5529 .loc 1 1406 24 is_stmt 0 view .LVU1685
- 5530 008c 0694 str r4, [sp, #24]
-1407:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5531 .loc 1 1407 3 is_stmt 1 view .LVU1686
-1407:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
- 5532 .loc 1 1407 29 is_stmt 0 view .LVU1687
- 5533 008e 0796 str r6, [sp, #28]
-1408:Src/main.c ****
- 5534 .loc 1 1408 3 is_stmt 1 view .LVU1688
- 5535 0090 02A9 add r1, sp, #8
- ARM GAS /tmp/ccLSPxIe.s page 279
+ 1094 .loc 1 393 3 is_stmt 1 view .LVU365
+ 393:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1095 .loc 1 393 25 is_stmt 0 view .LVU366
+ 1096 006e 0497 str r7, [sp, #16]
+ 394:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1097 .loc 1 394 3 is_stmt 1 view .LVU367
+ 394:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1098 .loc 1 394 30 is_stmt 0 view .LVU368
+ 1099 0070 0594 str r4, [sp, #20]
+ 395:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1100 .loc 1 395 3 is_stmt 1 view .LVU369
+ 395:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1101 .loc 1 395 24 is_stmt 0 view .LVU370
+ 1102 0072 0694 str r4, [sp, #24]
+ 396:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1103 .loc 1 396 3 is_stmt 1 view .LVU371
+ 396:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1104 .loc 1 396 29 is_stmt 0 view .LVU372
+ 1105 0074 0796 str r6, [sp, #28]
+ 397:Src/main.c ****
+ 1106 .loc 1 397 3 is_stmt 1 view .LVU373
+ 1107 0076 02A9 add r1, sp, #8
+ 1108 0078 2846 mov r0, r5
+ 1109 007a FFF7FEFF bl LL_GPIO_Init
+ 1110 .LVL57:
+ 399:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1111 .loc 1 399 3 view .LVU374
+ 399:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1112 .loc 1 399 23 is_stmt 0 view .LVU375
+ 1113 007e 4FF40043 mov r3, #32768
+ 1114 0082 0293 str r3, [sp, #8]
+ 400:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1115 .loc 1 400 3 is_stmt 1 view .LVU376
+ 400:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1116 .loc 1 400 24 is_stmt 0 view .LVU377
+ 1117 0084 CDF80C80 str r8, [sp, #12]
+ 401:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1118 .loc 1 401 3 is_stmt 1 view .LVU378
+ 401:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1119 .loc 1 401 25 is_stmt 0 view .LVU379
+ 1120 0088 0497 str r7, [sp, #16]
+ 402:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1121 .loc 1 402 3 is_stmt 1 view .LVU380
+ 402:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1122 .loc 1 402 30 is_stmt 0 view .LVU381
+ 1123 008a 0594 str r4, [sp, #20]
+ 403:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1124 .loc 1 403 3 is_stmt 1 view .LVU382
+ 403:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1125 .loc 1 403 24 is_stmt 0 view .LVU383
+ 1126 008c 0694 str r4, [sp, #24]
+ 404:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1127 .loc 1 404 3 is_stmt 1 view .LVU384
+ 404:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+ 1128 .loc 1 404 29 is_stmt 0 view .LVU385
+ 1129 008e 0796 str r6, [sp, #28]
+ 405:Src/main.c ****
+ ARM GAS /tmp/ccDGOsZt.s page 123
- 5536 0092 2846 mov r0, r5
- 5537 0094 FFF7FEFF bl LL_GPIO_Init
- 5538 .LVL560:
-1414:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5539 .loc 1 1414 3 view .LVU1689
-1414:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5540 .loc 1 1414 36 is_stmt 0 view .LVU1690
- 5541 0098 0894 str r4, [sp, #32]
-1415:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5542 .loc 1 1415 3 is_stmt 1 view .LVU1691
-1415:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5543 .loc 1 1415 23 is_stmt 0 view .LVU1692
- 5544 009a 4FF48273 mov r3, #260
- 5545 009e 0993 str r3, [sp, #36]
-1416:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
- 5546 .loc 1 1416 3 is_stmt 1 view .LVU1693
-1416:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
- 5547 .loc 1 1416 28 is_stmt 0 view .LVU1694
- 5548 00a0 4FF47063 mov r3, #3840
- 5549 00a4 0A93 str r3, [sp, #40]
-1417:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5550 .loc 1 1417 3 is_stmt 1 view .LVU1695
-1417:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5551 .loc 1 1417 32 is_stmt 0 view .LVU1696
- 5552 00a6 0B94 str r4, [sp, #44]
-1418:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5553 .loc 1 1418 3 is_stmt 1 view .LVU1697
-1418:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5554 .loc 1 1418 29 is_stmt 0 view .LVU1698
- 5555 00a8 0C94 str r4, [sp, #48]
-1419:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
- 5556 .loc 1 1419 3 is_stmt 1 view .LVU1699
-1419:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
- 5557 .loc 1 1419 22 is_stmt 0 view .LVU1700
- 5558 00aa 4FF40073 mov r3, #512
- 5559 00ae 0D93 str r3, [sp, #52]
-1420:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5560 .loc 1 1420 3 is_stmt 1 view .LVU1701
-1420:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5561 .loc 1 1420 27 is_stmt 0 view .LVU1702
- 5562 00b0 1023 movs r3, #16
- 5563 00b2 0E93 str r3, [sp, #56]
-1421:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5564 .loc 1 1421 3 is_stmt 1 view .LVU1703
-1421:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5565 .loc 1 1421 27 is_stmt 0 view .LVU1704
- 5566 00b4 0F94 str r4, [sp, #60]
-1422:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5567 .loc 1 1422 3 is_stmt 1 view .LVU1705
-1422:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5568 .loc 1 1422 33 is_stmt 0 view .LVU1706
- 5569 00b6 1094 str r4, [sp, #64]
-1423:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
- 5570 .loc 1 1423 3 is_stmt 1 view .LVU1707
-1423:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
- 5571 .loc 1 1423 26 is_stmt 0 view .LVU1708
- 5572 00b8 0723 movs r3, #7
- ARM GAS /tmp/ccLSPxIe.s page 280
+ 1130 .loc 1 405 3 is_stmt 1 view .LVU386
+ 1131 0090 02A9 add r1, sp, #8
+ 1132 0092 2846 mov r0, r5
+ 1133 0094 FFF7FEFF bl LL_GPIO_Init
+ 1134 .LVL58:
+ 411:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1135 .loc 1 411 3 view .LVU387
+ 411:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1136 .loc 1 411 36 is_stmt 0 view .LVU388
+ 1137 0098 0894 str r4, [sp, #32]
+ 412:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1138 .loc 1 412 3 is_stmt 1 view .LVU389
+ 412:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1139 .loc 1 412 23 is_stmt 0 view .LVU390
+ 1140 009a 4FF48273 mov r3, #260
+ 1141 009e 0993 str r3, [sp, #36]
+ 413:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+ 1142 .loc 1 413 3 is_stmt 1 view .LVU391
+ 413:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_LOW;
+ 1143 .loc 1 413 28 is_stmt 0 view .LVU392
+ 1144 00a0 4FF47063 mov r3, #3840
+ 1145 00a4 0A93 str r3, [sp, #40]
+ 414:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 1146 .loc 1 414 3 is_stmt 1 view .LVU393
+ 414:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 1147 .loc 1 414 32 is_stmt 0 view .LVU394
+ 1148 00a6 0B94 str r4, [sp, #44]
+ 415:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1149 .loc 1 415 3 is_stmt 1 view .LVU395
+ 415:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1150 .loc 1 415 29 is_stmt 0 view .LVU396
+ 1151 00a8 0C94 str r4, [sp, #48]
+ 416:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+ 1152 .loc 1 416 3 is_stmt 1 view .LVU397
+ 416:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8;
+ 1153 .loc 1 416 22 is_stmt 0 view .LVU398
+ 1154 00aa 4FF40073 mov r3, #512
+ 1155 00ae 0D93 str r3, [sp, #52]
+ 417:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1156 .loc 1 417 3 is_stmt 1 view .LVU399
+ 417:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1157 .loc 1 417 27 is_stmt 0 view .LVU400
+ 1158 00b0 1023 movs r3, #16
+ 1159 00b2 0E93 str r3, [sp, #56]
+ 418:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1160 .loc 1 418 3 is_stmt 1 view .LVU401
+ 418:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1161 .loc 1 418 27 is_stmt 0 view .LVU402
+ 1162 00b4 0F94 str r4, [sp, #60]
+ 419:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1163 .loc 1 419 3 is_stmt 1 view .LVU403
+ 419:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1164 .loc 1 419 33 is_stmt 0 view .LVU404
+ 1165 00b6 1094 str r4, [sp, #64]
+ 420:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
+ 1166 .loc 1 420 3 is_stmt 1 view .LVU405
+ 420:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct);
+ ARM GAS /tmp/ccDGOsZt.s page 124
- 5573 00ba 1193 str r3, [sp, #68]
-1424:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
- 5574 .loc 1 1424 3 is_stmt 1 view .LVU1709
- 5575 00bc 094C ldr r4, .L352+8
- 5576 00be 08A9 add r1, sp, #32
- 5577 00c0 2046 mov r0, r4
- 5578 00c2 FFF7FEFF bl LL_SPI_Init
- 5579 .LVL561:
-1425:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2);
- 5580 .loc 1 1425 3 view .LVU1710
- 5581 .LBB495:
- 5582 .LBI495:
+ 1167 .loc 1 420 26 is_stmt 0 view .LVU406
+ 1168 00b8 0723 movs r3, #7
+ 1169 00ba 1193 str r3, [sp, #68]
+ 421:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA);
+ 1170 .loc 1 421 3 is_stmt 1 view .LVU407
+ 1171 00bc 094C ldr r4, .L22+8
+ 1172 00be 08A9 add r1, sp, #32
+ 1173 00c0 2046 mov r0, r4
+ 1174 00c2 FFF7FEFF bl LL_SPI_Init
+ 1175 .LVL59:
+ 422:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2);
+ 1176 .loc 1 422 3 view .LVU408
+ 1177 .LBB164:
+ 1178 .LBI164:
426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5583 .loc 4 426 22 view .LVU1711
- 5584 .LBB496:
+ 1179 .loc 4 426 22 view .LVU409
+ 1180 .LBB165:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5585 .loc 4 428 3 view .LVU1712
- 5586 00c6 6368 ldr r3, [r4, #4]
- 5587 00c8 23F01003 bic r3, r3, #16
- 5588 00cc 6360 str r3, [r4, #4]
- 5589 .LVL562:
+ 1181 .loc 4 428 3 view .LVU410
+ 1182 00c6 6368 ldr r3, [r4, #4]
+ 1183 00c8 23F01003 bic r3, r3, #16
+ 1184 00cc 6360 str r3, [r4, #4]
+ 1185 .LVL60:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5590 .loc 4 428 3 is_stmt 0 view .LVU1713
- 5591 .LBE496:
- 5592 .LBE495:
-1426:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */
- 5593 .loc 1 1426 3 is_stmt 1 view .LVU1714
- 5594 .LBB497:
- 5595 .LBI497:
+ 1186 .loc 4 428 3 is_stmt 0 view .LVU411
+ 1187 .LBE165:
+ 1188 .LBE164:
+ 423:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */
+ 1189 .loc 1 423 3 is_stmt 1 view .LVU412
+ 1190 .LBB166:
+ 1191 .LBI166:
874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5596 .loc 4 874 22 view .LVU1715
- 5597 .LBB498:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5598 .loc 4 876 3 view .LVU1716
- 5599 00ce 6368 ldr r3, [r4, #4]
- 5600 00d0 23F00803 bic r3, r3, #8
- 5601 00d4 6360 str r3, [r4, #4]
- 5602 .LVL563:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5603 .loc 4 876 3 is_stmt 0 view .LVU1717
- 5604 .LBE498:
- 5605 .LBE497:
-1431:Src/main.c ****
- 5606 .loc 1 1431 1 view .LVU1718
- 5607 00d6 12B0 add sp, sp, #72
- 5608 .LCFI51:
- 5609 .cfi_def_cfa_offset 24
- 5610 @ sp needed
- 5611 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 5612 .L353:
- 5613 .align 2
- 5614 .L352:
- 5615 00dc 00380240 .word 1073887232
- 5616 00e0 00040240 .word 1073873920
- 5617 00e4 00380040 .word 1073756160
- 5618 .cfi_endproc
- 5619 .LFE1191:
- ARM GAS /tmp/ccLSPxIe.s page 281
+ 1192 .loc 4 874 22 view .LVU413
+ 1193 .LBB167:
+ 1194 .loc 4 876 3 view .LVU414
+ 1195 00ce 6368 ldr r3, [r4, #4]
+ 1196 00d0 23F00803 bic r3, r3, #8
+ 1197 00d4 6360 str r3, [r4, #4]
+ 1198 .LVL61:
+ 1199 .loc 4 876 3 is_stmt 0 view .LVU415
+ 1200 .LBE167:
+ 1201 .LBE166:
+ 428:Src/main.c ****
+ 1202 .loc 1 428 1 view .LVU416
+ 1203 00d6 12B0 add sp, sp, #72
+ 1204 .LCFI12:
+ 1205 .cfi_def_cfa_offset 24
+ 1206 @ sp needed
+ 1207 00d8 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
+ 1208 .L23:
+ 1209 .align 2
+ 1210 .L22:
+ 1211 00dc 00380240 .word 1073887232
+ 1212 00e0 00040240 .word 1073873920
+ 1213 00e4 00380040 .word 1073756160
+ 1214 .cfi_endproc
+ 1215 .LFE1188:
+ ARM GAS /tmp/ccDGOsZt.s page 125
- 5621 .section .text.MX_SPI5_Init,"ax",%progbits
- 5622 .align 1
- 5623 .syntax unified
- 5624 .thumb
- 5625 .thumb_func
- 5627 MX_SPI5_Init:
- 5628 .LFB1193:
-1502:Src/main.c ****
- 5629 .loc 1 1502 1 is_stmt 1 view -0
- 5630 .cfi_startproc
- 5631 @ args = 0, pretend = 0, frame = 72
- 5632 @ frame_needed = 0, uses_anonymous_args = 0
- 5633 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 5634 .LCFI52:
- 5635 .cfi_def_cfa_offset 24
- 5636 .cfi_offset 4, -24
- 5637 .cfi_offset 5, -20
- 5638 .cfi_offset 6, -16
- 5639 .cfi_offset 7, -12
- 5640 .cfi_offset 8, -8
- 5641 .cfi_offset 14, -4
- 5642 0004 92B0 sub sp, sp, #72
- 5643 .LCFI53:
- 5644 .cfi_def_cfa_offset 96
-1508:Src/main.c ****
- 5645 .loc 1 1508 3 view .LVU1720
-1508:Src/main.c ****
- 5646 .loc 1 1508 22 is_stmt 0 view .LVU1721
- 5647 0006 2822 movs r2, #40
- 5648 0008 0021 movs r1, #0
- 5649 000a 08A8 add r0, sp, #32
- 5650 000c FFF7FEFF bl memset
- 5651 .LVL564:
-1510:Src/main.c ****
- 5652 .loc 1 1510 3 is_stmt 1 view .LVU1722
-1510:Src/main.c ****
- 5653 .loc 1 1510 23 is_stmt 0 view .LVU1723
- 5654 0010 0024 movs r4, #0
- 5655 0012 0294 str r4, [sp, #8]
- 5656 0014 0394 str r4, [sp, #12]
- 5657 0016 0494 str r4, [sp, #16]
- 5658 0018 0594 str r4, [sp, #20]
- 5659 001a 0694 str r4, [sp, #24]
- 5660 001c 0794 str r4, [sp, #28]
-1513:Src/main.c ****
- 5661 .loc 1 1513 3 is_stmt 1 view .LVU1724
- 5662 .LVL565:
- 5663 .LBB499:
- 5664 .LBI499:
+ 1217 .section .text.MX_SPI5_Init,"ax",%progbits
+ 1218 .align 1
+ 1219 .syntax unified
+ 1220 .thumb
+ 1221 .thumb_func
+ 1223 MX_SPI5_Init:
+ 1224 .LFB1190:
+ 499:Src/main.c ****
+ 1225 .loc 1 499 1 is_stmt 1 view -0
+ 1226 .cfi_startproc
+ 1227 @ args = 0, pretend = 0, frame = 72
+ 1228 @ frame_needed = 0, uses_anonymous_args = 0
+ 1229 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
+ 1230 .LCFI13:
+ 1231 .cfi_def_cfa_offset 24
+ 1232 .cfi_offset 4, -24
+ 1233 .cfi_offset 5, -20
+ 1234 .cfi_offset 6, -16
+ 1235 .cfi_offset 7, -12
+ 1236 .cfi_offset 8, -8
+ 1237 .cfi_offset 14, -4
+ 1238 0004 92B0 sub sp, sp, #72
+ 1239 .LCFI14:
+ 1240 .cfi_def_cfa_offset 96
+ 505:Src/main.c ****
+ 1241 .loc 1 505 3 view .LVU418
+ 505:Src/main.c ****
+ 1242 .loc 1 505 22 is_stmt 0 view .LVU419
+ 1243 0006 2822 movs r2, #40
+ 1244 0008 0021 movs r1, #0
+ 1245 000a 08A8 add r0, sp, #32
+ 1246 000c FFF7FEFF bl memset
+ 1247 .LVL62:
+ 507:Src/main.c ****
+ 1248 .loc 1 507 3 is_stmt 1 view .LVU420
+ 507:Src/main.c ****
+ 1249 .loc 1 507 23 is_stmt 0 view .LVU421
+ 1250 0010 0024 movs r4, #0
+ 1251 0012 0294 str r4, [sp, #8]
+ 1252 0014 0394 str r4, [sp, #12]
+ 1253 0016 0494 str r4, [sp, #16]
+ 1254 0018 0594 str r4, [sp, #20]
+ 1255 001a 0694 str r4, [sp, #24]
+ 1256 001c 0794 str r4, [sp, #28]
+ 510:Src/main.c ****
+ 1257 .loc 1 510 3 is_stmt 1 view .LVU422
+ 1258 .LVL63:
+ 1259 .LBB168:
+ 1260 .LBI168:
1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5665 .loc 3 1587 22 view .LVU1725
- 5666 .LBB500:
+ 1261 .loc 3 1587 22 view .LVU423
+ 1262 .LBB169:
1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
- 5667 .loc 3 1589 3 view .LVU1726
+ 1263 .loc 3 1589 3 view .LVU424
1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5668 .loc 3 1590 3 view .LVU1727
- 5669 001e 294B ldr r3, .L356
- ARM GAS /tmp/ccLSPxIe.s page 282
+ 1264 .loc 3 1590 3 view .LVU425
+ 1265 001e 294B ldr r3, .L26
+ ARM GAS /tmp/ccDGOsZt.s page 126
- 5670 0020 5A6C ldr r2, [r3, #68]
- 5671 0022 42F48012 orr r2, r2, #1048576
- 5672 0026 5A64 str r2, [r3, #68]
+ 1266 0020 5A6C ldr r2, [r3, #68]
+ 1267 0022 42F48012 orr r2, r2, #1048576
+ 1268 0026 5A64 str r2, [r3, #68]
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5673 .loc 3 1592 3 view .LVU1728
+ 1269 .loc 3 1592 3 view .LVU426
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5674 .loc 3 1592 12 is_stmt 0 view .LVU1729
- 5675 0028 5A6C ldr r2, [r3, #68]
- 5676 002a 02F48012 and r2, r2, #1048576
+ 1270 .loc 3 1592 12 is_stmt 0 view .LVU427
+ 1271 0028 5A6C ldr r2, [r3, #68]
+ 1272 002a 02F48012 and r2, r2, #1048576
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5677 .loc 3 1592 10 view .LVU1730
- 5678 002e 0192 str r2, [sp, #4]
- 5679 .loc 3 1593 3 is_stmt 1 view .LVU1731
- 5680 0030 019A ldr r2, [sp, #4]
- 5681 .LVL566:
- 5682 .loc 3 1593 3 is_stmt 0 view .LVU1732
- 5683 .LBE500:
- 5684 .LBE499:
-1515:Src/main.c **** /**SPI5 GPIO Configuration
- 5685 .loc 1 1515 3 is_stmt 1 view .LVU1733
- 5686 .LBB501:
- 5687 .LBI501:
+ 1273 .loc 3 1592 10 view .LVU428
+ 1274 002e 0192 str r2, [sp, #4]
+ 1275 .loc 3 1593 3 is_stmt 1 view .LVU429
+ 1276 0030 019A ldr r2, [sp, #4]
+ 1277 .LVL64:
+ 1278 .loc 3 1593 3 is_stmt 0 view .LVU430
+ 1279 .LBE169:
+ 1280 .LBE168:
+ 512:Src/main.c **** /**SPI5 GPIO Configuration
+ 1281 .loc 1 512 3 is_stmt 1 view .LVU431
+ 1282 .LBB170:
+ 1283 .LBI170:
309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5688 .loc 3 309 22 view .LVU1734
- 5689 .LBB502:
+ 1284 .loc 3 309 22 view .LVU432
+ 1285 .LBB171:
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
- 5690 .loc 3 311 3 view .LVU1735
+ 1286 .loc 3 311 3 view .LVU433
312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5691 .loc 3 312 3 view .LVU1736
- 5692 0032 1A6B ldr r2, [r3, #48]
- 5693 0034 42F02002 orr r2, r2, #32
- 5694 0038 1A63 str r2, [r3, #48]
+ 1287 .loc 3 312 3 view .LVU434
+ 1288 0032 1A6B ldr r2, [r3, #48]
+ 1289 0034 42F02002 orr r2, r2, #32
+ 1290 0038 1A63 str r2, [r3, #48]
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5695 .loc 3 314 3 view .LVU1737
+ 1291 .loc 3 314 3 view .LVU435
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5696 .loc 3 314 12 is_stmt 0 view .LVU1738
- 5697 003a 1B6B ldr r3, [r3, #48]
- 5698 003c 03F02003 and r3, r3, #32
+ 1292 .loc 3 314 12 is_stmt 0 view .LVU436
+ 1293 003a 1B6B ldr r3, [r3, #48]
+ 1294 003c 03F02003 and r3, r3, #32
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5699 .loc 3 314 10 view .LVU1739
- 5700 0040 0093 str r3, [sp]
+ 1295 .loc 3 314 10 view .LVU437
+ 1296 0040 0093 str r3, [sp]
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5701 .loc 3 315 3 is_stmt 1 view .LVU1740
- 5702 0042 009B ldr r3, [sp]
- 5703 .LVL567:
+ 1297 .loc 3 315 3 is_stmt 1 view .LVU438
+ 1298 0042 009B ldr r3, [sp]
+ 1299 .LVL65:
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5704 .loc 3 315 3 is_stmt 0 view .LVU1741
- 5705 .LBE502:
- 5706 .LBE501:
-1520:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5707 .loc 1 1520 3 is_stmt 1 view .LVU1742
-1520:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5708 .loc 1 1520 23 is_stmt 0 view .LVU1743
- 5709 0044 8023 movs r3, #128
- 5710 0046 0293 str r3, [sp, #8]
-1521:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5711 .loc 1 1521 3 is_stmt 1 view .LVU1744
- ARM GAS /tmp/ccLSPxIe.s page 283
+ 1300 .loc 3 315 3 is_stmt 0 view .LVU439
+ 1301 .LBE171:
+ 1302 .LBE170:
+ 517:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1303 .loc 1 517 3 is_stmt 1 view .LVU440
+ 517:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1304 .loc 1 517 23 is_stmt 0 view .LVU441
+ 1305 0044 8023 movs r3, #128
+ 1306 0046 0293 str r3, [sp, #8]
+ 518:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1307 .loc 1 518 3 is_stmt 1 view .LVU442
+ ARM GAS /tmp/ccDGOsZt.s page 127
-1521:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5712 .loc 1 1521 24 is_stmt 0 view .LVU1745
- 5713 0048 0225 movs r5, #2
- 5714 004a 0395 str r5, [sp, #12]
-1522:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5715 .loc 1 1522 3 is_stmt 1 view .LVU1746
-1522:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5716 .loc 1 1522 25 is_stmt 0 view .LVU1747
- 5717 004c 4FF00308 mov r8, #3
- 5718 0050 CDF81080 str r8, [sp, #16]
-1523:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5719 .loc 1 1523 3 is_stmt 1 view .LVU1748
-1524:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5720 .loc 1 1524 3 view .LVU1749
-1525:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 5721 .loc 1 1525 3 view .LVU1750
-1525:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 5722 .loc 1 1525 29 is_stmt 0 view .LVU1751
- 5723 0054 0527 movs r7, #5
- 5724 0056 0797 str r7, [sp, #28]
-1526:Src/main.c ****
- 5725 .loc 1 1526 3 is_stmt 1 view .LVU1752
- 5726 0058 1B4E ldr r6, .L356+4
- 5727 005a 02A9 add r1, sp, #8
- 5728 005c 3046 mov r0, r6
- 5729 005e FFF7FEFF bl LL_GPIO_Init
- 5730 .LVL568:
-1528:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5731 .loc 1 1528 3 view .LVU1753
-1528:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5732 .loc 1 1528 23 is_stmt 0 view .LVU1754
- 5733 0062 4FF48073 mov r3, #256
- 5734 0066 0293 str r3, [sp, #8]
-1529:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5735 .loc 1 1529 3 is_stmt 1 view .LVU1755
-1529:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5736 .loc 1 1529 24 is_stmt 0 view .LVU1756
- 5737 0068 0395 str r5, [sp, #12]
-1530:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5738 .loc 1 1530 3 is_stmt 1 view .LVU1757
-1530:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5739 .loc 1 1530 25 is_stmt 0 view .LVU1758
- 5740 006a CDF81080 str r8, [sp, #16]
-1531:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5741 .loc 1 1531 3 is_stmt 1 view .LVU1759
-1531:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5742 .loc 1 1531 30 is_stmt 0 view .LVU1760
- 5743 006e 0594 str r4, [sp, #20]
-1532:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5744 .loc 1 1532 3 is_stmt 1 view .LVU1761
-1532:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
- 5745 .loc 1 1532 24 is_stmt 0 view .LVU1762
- 5746 0070 0694 str r4, [sp, #24]
-1533:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 5747 .loc 1 1533 3 is_stmt 1 view .LVU1763
-1533:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
- 5748 .loc 1 1533 29 is_stmt 0 view .LVU1764
- ARM GAS /tmp/ccLSPxIe.s page 284
+ 518:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1308 .loc 1 518 24 is_stmt 0 view .LVU443
+ 1309 0048 0225 movs r5, #2
+ 1310 004a 0395 str r5, [sp, #12]
+ 519:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1311 .loc 1 519 3 is_stmt 1 view .LVU444
+ 519:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1312 .loc 1 519 25 is_stmt 0 view .LVU445
+ 1313 004c 4FF00308 mov r8, #3
+ 1314 0050 CDF81080 str r8, [sp, #16]
+ 520:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1315 .loc 1 520 3 is_stmt 1 view .LVU446
+ 521:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1316 .loc 1 521 3 view .LVU447
+ 522:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 1317 .loc 1 522 3 view .LVU448
+ 522:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 1318 .loc 1 522 29 is_stmt 0 view .LVU449
+ 1319 0054 0527 movs r7, #5
+ 1320 0056 0797 str r7, [sp, #28]
+ 523:Src/main.c ****
+ 1321 .loc 1 523 3 is_stmt 1 view .LVU450
+ 1322 0058 1B4E ldr r6, .L26+4
+ 1323 005a 02A9 add r1, sp, #8
+ 1324 005c 3046 mov r0, r6
+ 1325 005e FFF7FEFF bl LL_GPIO_Init
+ 1326 .LVL66:
+ 525:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1327 .loc 1 525 3 view .LVU451
+ 525:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1328 .loc 1 525 23 is_stmt 0 view .LVU452
+ 1329 0062 4FF48073 mov r3, #256
+ 1330 0066 0293 str r3, [sp, #8]
+ 526:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1331 .loc 1 526 3 is_stmt 1 view .LVU453
+ 526:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1332 .loc 1 526 24 is_stmt 0 view .LVU454
+ 1333 0068 0395 str r5, [sp, #12]
+ 527:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1334 .loc 1 527 3 is_stmt 1 view .LVU455
+ 527:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1335 .loc 1 527 25 is_stmt 0 view .LVU456
+ 1336 006a CDF81080 str r8, [sp, #16]
+ 528:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1337 .loc 1 528 3 is_stmt 1 view .LVU457
+ 528:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1338 .loc 1 528 30 is_stmt 0 view .LVU458
+ 1339 006e 0594 str r4, [sp, #20]
+ 529:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1340 .loc 1 529 3 is_stmt 1 view .LVU459
+ 529:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5;
+ 1341 .loc 1 529 24 is_stmt 0 view .LVU460
+ 1342 0070 0694 str r4, [sp, #24]
+ 530:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 1343 .loc 1 530 3 is_stmt 1 view .LVU461
+ 530:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+ 1344 .loc 1 530 29 is_stmt 0 view .LVU462
+ ARM GAS /tmp/ccDGOsZt.s page 128
- 5749 0072 0797 str r7, [sp, #28]
-1534:Src/main.c ****
- 5750 .loc 1 1534 3 is_stmt 1 view .LVU1765
- 5751 0074 02A9 add r1, sp, #8
- 5752 0076 3046 mov r0, r6
- 5753 0078 FFF7FEFF bl LL_GPIO_Init
- 5754 .LVL569:
-1540:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5755 .loc 1 1540 3 view .LVU1766
-1540:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5756 .loc 1 1540 36 is_stmt 0 view .LVU1767
- 5757 007c 4FF48063 mov r3, #1024
- 5758 0080 0893 str r3, [sp, #32]
-1541:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5759 .loc 1 1541 3 is_stmt 1 view .LVU1768
-1541:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5760 .loc 1 1541 23 is_stmt 0 view .LVU1769
- 5761 0082 4FF48273 mov r3, #260
- 5762 0086 0993 str r3, [sp, #36]
-1542:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5763 .loc 1 1542 3 is_stmt 1 view .LVU1770
-1542:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5764 .loc 1 1542 28 is_stmt 0 view .LVU1771
- 5765 0088 4FF47063 mov r3, #3840
- 5766 008c 0A93 str r3, [sp, #40]
-1543:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5767 .loc 1 1543 3 is_stmt 1 view .LVU1772
-1543:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
- 5768 .loc 1 1543 32 is_stmt 0 view .LVU1773
- 5769 008e 0B95 str r5, [sp, #44]
-1544:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5770 .loc 1 1544 3 is_stmt 1 view .LVU1774
-1544:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5771 .loc 1 1544 29 is_stmt 0 view .LVU1775
- 5772 0090 0C94 str r4, [sp, #48]
-1545:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5773 .loc 1 1545 3 is_stmt 1 view .LVU1776
-1545:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5774 .loc 1 1545 22 is_stmt 0 view .LVU1777
- 5775 0092 4FF40073 mov r3, #512
- 5776 0096 0D93 str r3, [sp, #52]
-1546:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5777 .loc 1 1546 3 is_stmt 1 view .LVU1778
-1546:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5778 .loc 1 1546 27 is_stmt 0 view .LVU1779
- 5779 0098 1823 movs r3, #24
- 5780 009a 0E93 str r3, [sp, #56]
-1547:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5781 .loc 1 1547 3 is_stmt 1 view .LVU1780
-1547:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5782 .loc 1 1547 27 is_stmt 0 view .LVU1781
- 5783 009c 0F94 str r4, [sp, #60]
-1548:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5784 .loc 1 1548 3 is_stmt 1 view .LVU1782
-1548:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 5785 .loc 1 1548 33 is_stmt 0 view .LVU1783
- 5786 009e 1094 str r4, [sp, #64]
- ARM GAS /tmp/ccLSPxIe.s page 285
+ 1345 0072 0797 str r7, [sp, #28]
+ 531:Src/main.c ****
+ 1346 .loc 1 531 3 is_stmt 1 view .LVU463
+ 1347 0074 02A9 add r1, sp, #8
+ 1348 0076 3046 mov r0, r6
+ 1349 0078 FFF7FEFF bl LL_GPIO_Init
+ 1350 .LVL67:
+ 537:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1351 .loc 1 537 3 view .LVU464
+ 537:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1352 .loc 1 537 36 is_stmt 0 view .LVU465
+ 1353 007c 4FF48063 mov r3, #1024
+ 1354 0080 0893 str r3, [sp, #32]
+ 538:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1355 .loc 1 538 3 is_stmt 1 view .LVU466
+ 538:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1356 .loc 1 538 23 is_stmt 0 view .LVU467
+ 1357 0082 4FF48273 mov r3, #260
+ 1358 0086 0993 str r3, [sp, #36]
+ 539:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 1359 .loc 1 539 3 is_stmt 1 view .LVU468
+ 539:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 1360 .loc 1 539 28 is_stmt 0 view .LVU469
+ 1361 0088 4FF47063 mov r3, #3840
+ 1362 008c 0A93 str r3, [sp, #40]
+ 540:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 1363 .loc 1 540 3 is_stmt 1 view .LVU470
+ 540:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE;
+ 1364 .loc 1 540 32 is_stmt 0 view .LVU471
+ 1365 008e 0B95 str r5, [sp, #44]
+ 541:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1366 .loc 1 541 3 is_stmt 1 view .LVU472
+ 541:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1367 .loc 1 541 29 is_stmt 0 view .LVU473
+ 1368 0090 0C94 str r4, [sp, #48]
+ 542:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 1369 .loc 1 542 3 is_stmt 1 view .LVU474
+ 542:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 1370 .loc 1 542 22 is_stmt 0 view .LVU475
+ 1371 0092 4FF40073 mov r3, #512
+ 1372 0096 0D93 str r3, [sp, #52]
+ 543:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1373 .loc 1 543 3 is_stmt 1 view .LVU476
+ 543:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1374 .loc 1 543 27 is_stmt 0 view .LVU477
+ 1375 0098 1823 movs r3, #24
+ 1376 009a 0E93 str r3, [sp, #56]
+ 544:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1377 .loc 1 544 3 is_stmt 1 view .LVU478
+ 544:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1378 .loc 1 544 27 is_stmt 0 view .LVU479
+ 1379 009c 0F94 str r4, [sp, #60]
+ 545:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1380 .loc 1 545 3 is_stmt 1 view .LVU480
+ 545:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1381 .loc 1 545 33 is_stmt 0 view .LVU481
+ 1382 009e 1094 str r4, [sp, #64]
+ ARM GAS /tmp/ccDGOsZt.s page 129
-1549:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
- 5787 .loc 1 1549 3 is_stmt 1 view .LVU1784
-1549:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
- 5788 .loc 1 1549 26 is_stmt 0 view .LVU1785
- 5789 00a0 0723 movs r3, #7
- 5790 00a2 1193 str r3, [sp, #68]
-1550:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
- 5791 .loc 1 1550 3 is_stmt 1 view .LVU1786
- 5792 00a4 094C ldr r4, .L356+8
- 5793 00a6 08A9 add r1, sp, #32
- 5794 00a8 2046 mov r0, r4
- 5795 00aa FFF7FEFF bl LL_SPI_Init
- 5796 .LVL570:
-1551:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5);
- 5797 .loc 1 1551 3 view .LVU1787
- 5798 .LBB503:
- 5799 .LBI503:
+ 546:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
+ 1383 .loc 1 546 3 is_stmt 1 view .LVU482
+ 546:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct);
+ 1384 .loc 1 546 26 is_stmt 0 view .LVU483
+ 1385 00a0 0723 movs r3, #7
+ 1386 00a2 1193 str r3, [sp, #68]
+ 547:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA);
+ 1387 .loc 1 547 3 is_stmt 1 view .LVU484
+ 1388 00a4 094C ldr r4, .L26+8
+ 1389 00a6 08A9 add r1, sp, #32
+ 1390 00a8 2046 mov r0, r4
+ 1391 00aa FFF7FEFF bl LL_SPI_Init
+ 1392 .LVL68:
+ 548:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5);
+ 1393 .loc 1 548 3 view .LVU485
+ 1394 .LBB172:
+ 1395 .LBI172:
426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5800 .loc 4 426 22 view .LVU1788
- 5801 .LBB504:
+ 1396 .loc 4 426 22 view .LVU486
+ 1397 .LBB173:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5802 .loc 4 428 3 view .LVU1789
- 5803 00ae 6368 ldr r3, [r4, #4]
- 5804 00b0 23F01003 bic r3, r3, #16
- 5805 00b4 6360 str r3, [r4, #4]
- 5806 .LVL571:
+ 1398 .loc 4 428 3 view .LVU487
+ 1399 00ae 6368 ldr r3, [r4, #4]
+ 1400 00b0 23F01003 bic r3, r3, #16
+ 1401 00b4 6360 str r3, [r4, #4]
+ 1402 .LVL69:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5807 .loc 4 428 3 is_stmt 0 view .LVU1790
- 5808 .LBE504:
- 5809 .LBE503:
-1552:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */
- 5810 .loc 1 1552 3 is_stmt 1 view .LVU1791
- 5811 .LBB505:
- 5812 .LBI505:
+ 1403 .loc 4 428 3 is_stmt 0 view .LVU488
+ 1404 .LBE173:
+ 1405 .LBE172:
+ 549:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */
+ 1406 .loc 1 549 3 is_stmt 1 view .LVU489
+ 1407 .LBB174:
+ 1408 .LBI174:
874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 5813 .loc 4 874 22 view .LVU1792
- 5814 .LBB506:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5815 .loc 4 876 3 view .LVU1793
- 5816 00b6 6368 ldr r3, [r4, #4]
- 5817 00b8 23F00803 bic r3, r3, #8
- 5818 00bc 6360 str r3, [r4, #4]
- 5819 .LVL572:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 5820 .loc 4 876 3 is_stmt 0 view .LVU1794
- 5821 .LBE506:
- 5822 .LBE505:
-1557:Src/main.c ****
- 5823 .loc 1 1557 1 view .LVU1795
- 5824 00be 12B0 add sp, sp, #72
- 5825 .LCFI54:
- 5826 .cfi_def_cfa_offset 24
- 5827 @ sp needed
- 5828 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 5829 .L357:
- 5830 .align 2
- 5831 .L356:
- ARM GAS /tmp/ccLSPxIe.s page 286
+ 1409 .loc 4 874 22 view .LVU490
+ 1410 .LBB175:
+ 1411 .loc 4 876 3 view .LVU491
+ 1412 00b6 6368 ldr r3, [r4, #4]
+ 1413 00b8 23F00803 bic r3, r3, #8
+ 1414 00bc 6360 str r3, [r4, #4]
+ 1415 .LVL70:
+ 1416 .loc 4 876 3 is_stmt 0 view .LVU492
+ 1417 .LBE175:
+ 1418 .LBE174:
+ 554:Src/main.c ****
+ 1419 .loc 1 554 1 view .LVU493
+ 1420 00be 12B0 add sp, sp, #72
+ 1421 .LCFI15:
+ 1422 .cfi_def_cfa_offset 24
+ 1423 @ sp needed
+ 1424 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
+ 1425 .L27:
+ 1426 .align 2
+ 1427 .L26:
+ 1428 00c4 00380240 .word 1073887232
+ 1429 00c8 00140240 .word 1073878016
+ ARM GAS /tmp/ccDGOsZt.s page 130
- 5832 00c4 00380240 .word 1073887232
- 5833 00c8 00140240 .word 1073878016
- 5834 00cc 00500140 .word 1073827840
- 5835 .cfi_endproc
- 5836 .LFE1193:
- 5838 .section .text.MX_SPI6_Init,"ax",%progbits
- 5839 .align 1
- 5840 .syntax unified
- 5841 .thumb
- 5842 .thumb_func
- 5844 MX_SPI6_Init:
- 5845 .LFB1194:
-1565:Src/main.c ****
- 5846 .loc 1 1565 1 is_stmt 1 view -0
- 5847 .cfi_startproc
- 5848 @ args = 0, pretend = 0, frame = 72
- 5849 @ frame_needed = 0, uses_anonymous_args = 0
- 5850 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 5851 .LCFI55:
- 5852 .cfi_def_cfa_offset 24
- 5853 .cfi_offset 4, -24
- 5854 .cfi_offset 5, -20
- 5855 .cfi_offset 6, -16
- 5856 .cfi_offset 7, -12
- 5857 .cfi_offset 8, -8
- 5858 .cfi_offset 14, -4
- 5859 0004 92B0 sub sp, sp, #72
- 5860 .LCFI56:
- 5861 .cfi_def_cfa_offset 96
-1571:Src/main.c ****
- 5862 .loc 1 1571 3 view .LVU1797
-1571:Src/main.c ****
- 5863 .loc 1 1571 22 is_stmt 0 view .LVU1798
- 5864 0006 2822 movs r2, #40
- 5865 0008 0021 movs r1, #0
- 5866 000a 08A8 add r0, sp, #32
- 5867 000c FFF7FEFF bl memset
- 5868 .LVL573:
-1573:Src/main.c ****
- 5869 .loc 1 1573 3 is_stmt 1 view .LVU1799
-1573:Src/main.c ****
- 5870 .loc 1 1573 23 is_stmt 0 view .LVU1800
- 5871 0010 0024 movs r4, #0
- 5872 0012 0294 str r4, [sp, #8]
- 5873 0014 0394 str r4, [sp, #12]
- 5874 0016 0494 str r4, [sp, #16]
- 5875 0018 0594 str r4, [sp, #20]
- 5876 001a 0694 str r4, [sp, #24]
- 5877 001c 0794 str r4, [sp, #28]
-1576:Src/main.c ****
- 5878 .loc 1 1576 3 is_stmt 1 view .LVU1801
- 5879 .LVL574:
- 5880 .LBB507:
- 5881 .LBI507:
+ 1430 00cc 00500140 .word 1073827840
+ 1431 .cfi_endproc
+ 1432 .LFE1190:
+ 1434 .section .text.MX_SPI6_Init,"ax",%progbits
+ 1435 .align 1
+ 1436 .syntax unified
+ 1437 .thumb
+ 1438 .thumb_func
+ 1440 MX_SPI6_Init:
+ 1441 .LFB1191:
+ 562:Src/main.c ****
+ 1442 .loc 1 562 1 is_stmt 1 view -0
+ 1443 .cfi_startproc
+ 1444 @ args = 0, pretend = 0, frame = 72
+ 1445 @ frame_needed = 0, uses_anonymous_args = 0
+ 1446 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
+ 1447 .LCFI16:
+ 1448 .cfi_def_cfa_offset 24
+ 1449 .cfi_offset 4, -24
+ 1450 .cfi_offset 5, -20
+ 1451 .cfi_offset 6, -16
+ 1452 .cfi_offset 7, -12
+ 1453 .cfi_offset 8, -8
+ 1454 .cfi_offset 14, -4
+ 1455 0004 92B0 sub sp, sp, #72
+ 1456 .LCFI17:
+ 1457 .cfi_def_cfa_offset 96
+ 568:Src/main.c ****
+ 1458 .loc 1 568 3 view .LVU495
+ 568:Src/main.c ****
+ 1459 .loc 1 568 22 is_stmt 0 view .LVU496
+ 1460 0006 2822 movs r2, #40
+ 1461 0008 0021 movs r1, #0
+ 1462 000a 08A8 add r0, sp, #32
+ 1463 000c FFF7FEFF bl memset
+ 1464 .LVL71:
+ 570:Src/main.c ****
+ 1465 .loc 1 570 3 is_stmt 1 view .LVU497
+ 570:Src/main.c ****
+ 1466 .loc 1 570 23 is_stmt 0 view .LVU498
+ 1467 0010 0024 movs r4, #0
+ 1468 0012 0294 str r4, [sp, #8]
+ 1469 0014 0394 str r4, [sp, #12]
+ 1470 0016 0494 str r4, [sp, #16]
+ 1471 0018 0594 str r4, [sp, #20]
+ 1472 001a 0694 str r4, [sp, #24]
+ 1473 001c 0794 str r4, [sp, #28]
+ 573:Src/main.c ****
+ 1474 .loc 1 573 3 is_stmt 1 view .LVU499
+ 1475 .LVL72:
+ 1476 .LBB176:
+ 1477 .LBI176:
1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5882 .loc 3 1587 22 view .LVU1802
- 5883 .LBB508:
- ARM GAS /tmp/ccLSPxIe.s page 287
-
-
+ 1478 .loc 3 1587 22 view .LVU500
+ 1479 .LBB177:
1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
- 5884 .loc 3 1589 3 view .LVU1803
+ 1480 .loc 3 1589 3 view .LVU501
+ ARM GAS /tmp/ccDGOsZt.s page 131
+
+
1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5885 .loc 3 1590 3 view .LVU1804
- 5886 001e 294B ldr r3, .L360
- 5887 0020 5A6C ldr r2, [r3, #68]
- 5888 0022 42F40012 orr r2, r2, #2097152
- 5889 0026 5A64 str r2, [r3, #68]
+ 1481 .loc 3 1590 3 view .LVU502
+ 1482 001e 294B ldr r3, .L30
+ 1483 0020 5A6C ldr r2, [r3, #68]
+ 1484 0022 42F40012 orr r2, r2, #2097152
+ 1485 0026 5A64 str r2, [r3, #68]
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5890 .loc 3 1592 3 view .LVU1805
+ 1486 .loc 3 1592 3 view .LVU503
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5891 .loc 3 1592 12 is_stmt 0 view .LVU1806
- 5892 0028 5A6C ldr r2, [r3, #68]
- 5893 002a 02F40012 and r2, r2, #2097152
+ 1487 .loc 3 1592 12 is_stmt 0 view .LVU504
+ 1488 0028 5A6C ldr r2, [r3, #68]
+ 1489 002a 02F40012 and r2, r2, #2097152
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5894 .loc 3 1592 10 view .LVU1807
- 5895 002e 0192 str r2, [sp, #4]
- 5896 .loc 3 1593 3 is_stmt 1 view .LVU1808
- 5897 0030 019A ldr r2, [sp, #4]
- 5898 .LVL575:
- 5899 .loc 3 1593 3 is_stmt 0 view .LVU1809
- 5900 .LBE508:
- 5901 .LBE507:
-1578:Src/main.c **** /**SPI6 GPIO Configuration
- 5902 .loc 1 1578 3 is_stmt 1 view .LVU1810
- 5903 .LBB509:
- 5904 .LBI509:
+ 1490 .loc 3 1592 10 view .LVU505
+ 1491 002e 0192 str r2, [sp, #4]
+ 1492 .loc 3 1593 3 is_stmt 1 view .LVU506
+ 1493 0030 019A ldr r2, [sp, #4]
+ 1494 .LVL73:
+ 1495 .loc 3 1593 3 is_stmt 0 view .LVU507
+ 1496 .LBE177:
+ 1497 .LBE176:
+ 575:Src/main.c **** /**SPI6 GPIO Configuration
+ 1498 .loc 1 575 3 is_stmt 1 view .LVU508
+ 1499 .LBB178:
+ 1500 .LBI178:
309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 5905 .loc 3 309 22 view .LVU1811
- 5906 .LBB510:
+ 1501 .loc 3 309 22 view .LVU509
+ 1502 .LBB179:
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
- 5907 .loc 3 311 3 view .LVU1812
+ 1503 .loc 3 311 3 view .LVU510
312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 5908 .loc 3 312 3 view .LVU1813
- 5909 0032 1A6B ldr r2, [r3, #48]
- 5910 0034 42F00102 orr r2, r2, #1
- 5911 0038 1A63 str r2, [r3, #48]
+ 1504 .loc 3 312 3 view .LVU511
+ 1505 0032 1A6B ldr r2, [r3, #48]
+ 1506 0034 42F00102 orr r2, r2, #1
+ 1507 0038 1A63 str r2, [r3, #48]
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5912 .loc 3 314 3 view .LVU1814
+ 1508 .loc 3 314 3 view .LVU512
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5913 .loc 3 314 12 is_stmt 0 view .LVU1815
- 5914 003a 1B6B ldr r3, [r3, #48]
- 5915 003c 03F00103 and r3, r3, #1
+ 1509 .loc 3 314 12 is_stmt 0 view .LVU513
+ 1510 003a 1B6B ldr r3, [r3, #48]
+ 1511 003c 03F00103 and r3, r3, #1
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 5916 .loc 3 314 10 view .LVU1816
- 5917 0040 0093 str r3, [sp]
+ 1512 .loc 3 314 10 view .LVU514
+ 1513 0040 0093 str r3, [sp]
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5918 .loc 3 315 3 is_stmt 1 view .LVU1817
- 5919 0042 009B ldr r3, [sp]
- 5920 .LVL576:
+ 1514 .loc 3 315 3 is_stmt 1 view .LVU515
+ 1515 0042 009B ldr r3, [sp]
+ 1516 .LVL74:
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 5921 .loc 3 315 3 is_stmt 0 view .LVU1818
- 5922 .LBE510:
- 5923 .LBE509:
-1583:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5924 .loc 1 1583 3 is_stmt 1 view .LVU1819
-1583:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- ARM GAS /tmp/ccLSPxIe.s page 288
+ 1517 .loc 3 315 3 is_stmt 0 view .LVU516
+ 1518 .LBE179:
+ 1519 .LBE178:
+ 580:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1520 .loc 1 580 3 is_stmt 1 view .LVU517
+ 580:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1521 .loc 1 580 23 is_stmt 0 view .LVU518
+ 1522 0044 2023 movs r3, #32
+ ARM GAS /tmp/ccDGOsZt.s page 132
- 5925 .loc 1 1583 23 is_stmt 0 view .LVU1820
- 5926 0044 2023 movs r3, #32
- 5927 0046 0293 str r3, [sp, #8]
-1584:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5928 .loc 1 1584 3 is_stmt 1 view .LVU1821
-1584:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5929 .loc 1 1584 24 is_stmt 0 view .LVU1822
- 5930 0048 0225 movs r5, #2
- 5931 004a 0395 str r5, [sp, #12]
-1585:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5932 .loc 1 1585 3 is_stmt 1 view .LVU1823
-1585:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5933 .loc 1 1585 25 is_stmt 0 view .LVU1824
- 5934 004c 4FF00308 mov r8, #3
- 5935 0050 CDF81080 str r8, [sp, #16]
-1586:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5936 .loc 1 1586 3 is_stmt 1 view .LVU1825
-1587:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- 5937 .loc 1 1587 3 view .LVU1826
-1588:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 5938 .loc 1 1588 3 view .LVU1827
-1588:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 5939 .loc 1 1588 29 is_stmt 0 view .LVU1828
- 5940 0054 0827 movs r7, #8
- 5941 0056 0797 str r7, [sp, #28]
-1589:Src/main.c ****
- 5942 .loc 1 1589 3 is_stmt 1 view .LVU1829
- 5943 0058 1B4E ldr r6, .L360+4
- 5944 005a 0DEB0701 add r1, sp, r7
- 5945 005e 3046 mov r0, r6
- 5946 0060 FFF7FEFF bl LL_GPIO_Init
- 5947 .LVL577:
-1591:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5948 .loc 1 1591 3 view .LVU1830
-1591:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 5949 .loc 1 1591 23 is_stmt 0 view .LVU1831
- 5950 0064 8023 movs r3, #128
- 5951 0066 0293 str r3, [sp, #8]
-1592:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5952 .loc 1 1592 3 is_stmt 1 view .LVU1832
-1592:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 5953 .loc 1 1592 24 is_stmt 0 view .LVU1833
- 5954 0068 0395 str r5, [sp, #12]
-1593:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5955 .loc 1 1593 3 is_stmt 1 view .LVU1834
-1593:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 5956 .loc 1 1593 25 is_stmt 0 view .LVU1835
- 5957 006a CDF81080 str r8, [sp, #16]
-1594:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5958 .loc 1 1594 3 is_stmt 1 view .LVU1836
-1594:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 5959 .loc 1 1594 30 is_stmt 0 view .LVU1837
- 5960 006e 0594 str r4, [sp, #20]
-1595:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- 5961 .loc 1 1595 3 is_stmt 1 view .LVU1838
-1595:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
- 5962 .loc 1 1595 24 is_stmt 0 view .LVU1839
- ARM GAS /tmp/ccLSPxIe.s page 289
+ 1523 0046 0293 str r3, [sp, #8]
+ 581:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1524 .loc 1 581 3 is_stmt 1 view .LVU519
+ 581:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1525 .loc 1 581 24 is_stmt 0 view .LVU520
+ 1526 0048 0225 movs r5, #2
+ 1527 004a 0395 str r5, [sp, #12]
+ 582:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1528 .loc 1 582 3 is_stmt 1 view .LVU521
+ 582:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1529 .loc 1 582 25 is_stmt 0 view .LVU522
+ 1530 004c 4FF00308 mov r8, #3
+ 1531 0050 CDF81080 str r8, [sp, #16]
+ 583:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1532 .loc 1 583 3 is_stmt 1 view .LVU523
+ 584:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 1533 .loc 1 584 3 view .LVU524
+ 585:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 1534 .loc 1 585 3 view .LVU525
+ 585:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 1535 .loc 1 585 29 is_stmt 0 view .LVU526
+ 1536 0054 0827 movs r7, #8
+ 1537 0056 0797 str r7, [sp, #28]
+ 586:Src/main.c ****
+ 1538 .loc 1 586 3 is_stmt 1 view .LVU527
+ 1539 0058 1B4E ldr r6, .L30+4
+ 1540 005a 0DEB0701 add r1, sp, r7
+ 1541 005e 3046 mov r0, r6
+ 1542 0060 FFF7FEFF bl LL_GPIO_Init
+ 1543 .LVL75:
+ 588:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1544 .loc 1 588 3 view .LVU528
+ 588:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 1545 .loc 1 588 23 is_stmt 0 view .LVU529
+ 1546 0064 8023 movs r3, #128
+ 1547 0066 0293 str r3, [sp, #8]
+ 589:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1548 .loc 1 589 3 is_stmt 1 view .LVU530
+ 589:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 1549 .loc 1 589 24 is_stmt 0 view .LVU531
+ 1550 0068 0395 str r5, [sp, #12]
+ 590:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1551 .loc 1 590 3 is_stmt 1 view .LVU532
+ 590:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 1552 .loc 1 590 25 is_stmt 0 view .LVU533
+ 1553 006a CDF81080 str r8, [sp, #16]
+ 591:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1554 .loc 1 591 3 is_stmt 1 view .LVU534
+ 591:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 1555 .loc 1 591 30 is_stmt 0 view .LVU535
+ 1556 006e 0594 str r4, [sp, #20]
+ 592:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 1557 .loc 1 592 3 is_stmt 1 view .LVU536
+ 592:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8;
+ 1558 .loc 1 592 24 is_stmt 0 view .LVU537
+ 1559 0070 0694 str r4, [sp, #24]
+ 593:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ ARM GAS /tmp/ccDGOsZt.s page 133
- 5963 0070 0694 str r4, [sp, #24]
-1596:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 5964 .loc 1 1596 3 is_stmt 1 view .LVU1840
-1596:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 5965 .loc 1 1596 29 is_stmt 0 view .LVU1841
- 5966 0072 0797 str r7, [sp, #28]
-1597:Src/main.c ****
- 5967 .loc 1 1597 3 is_stmt 1 view .LVU1842
- 5968 0074 0DEB0701 add r1, sp, r7
- 5969 0078 3046 mov r0, r6
- 5970 007a FFF7FEFF bl LL_GPIO_Init
- 5971 .LVL578:
-1603:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5972 .loc 1 1603 3 view .LVU1843
-1603:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
- 5973 .loc 1 1603 36 is_stmt 0 view .LVU1844
- 5974 007e 0894 str r4, [sp, #32]
-1604:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5975 .loc 1 1604 3 is_stmt 1 view .LVU1845
-1604:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
- 5976 .loc 1 1604 23 is_stmt 0 view .LVU1846
- 5977 0080 4FF48273 mov r3, #260
- 5978 0084 0993 str r3, [sp, #36]
-1605:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5979 .loc 1 1605 3 is_stmt 1 view .LVU1847
-1605:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
- 5980 .loc 1 1605 28 is_stmt 0 view .LVU1848
- 5981 0086 4FF47063 mov r3, #3840
- 5982 008a 0A93 str r3, [sp, #40]
-1606:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- 5983 .loc 1 1606 3 is_stmt 1 view .LVU1849
-1606:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
- 5984 .loc 1 1606 32 is_stmt 0 view .LVU1850
- 5985 008c 0B95 str r5, [sp, #44]
-1607:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5986 .loc 1 1607 3 is_stmt 1 view .LVU1851
-1607:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
- 5987 .loc 1 1607 29 is_stmt 0 view .LVU1852
- 5988 008e 0123 movs r3, #1
- 5989 0090 0C93 str r3, [sp, #48]
-1608:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5990 .loc 1 1608 3 is_stmt 1 view .LVU1853
-1608:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
- 5991 .loc 1 1608 22 is_stmt 0 view .LVU1854
- 5992 0092 4FF40073 mov r3, #512
- 5993 0096 0D93 str r3, [sp, #52]
-1609:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5994 .loc 1 1609 3 is_stmt 1 view .LVU1855
-1609:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
- 5995 .loc 1 1609 27 is_stmt 0 view .LVU1856
- 5996 0098 1823 movs r3, #24
- 5997 009a 0E93 str r3, [sp, #56]
-1610:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5998 .loc 1 1610 3 is_stmt 1 view .LVU1857
-1610:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
- 5999 .loc 1 1610 27 is_stmt 0 view .LVU1858
- 6000 009c 0F94 str r4, [sp, #60]
- ARM GAS /tmp/ccLSPxIe.s page 290
+ 1560 .loc 1 593 3 is_stmt 1 view .LVU538
+ 593:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 1561 .loc 1 593 29 is_stmt 0 view .LVU539
+ 1562 0072 0797 str r7, [sp, #28]
+ 594:Src/main.c ****
+ 1563 .loc 1 594 3 is_stmt 1 view .LVU540
+ 1564 0074 0DEB0701 add r1, sp, r7
+ 1565 0078 3046 mov r0, r6
+ 1566 007a FFF7FEFF bl LL_GPIO_Init
+ 1567 .LVL76:
+ 600:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1568 .loc 1 600 3 view .LVU541
+ 600:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER;
+ 1569 .loc 1 600 36 is_stmt 0 view .LVU542
+ 1570 007e 0894 str r4, [sp, #32]
+ 601:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1571 .loc 1 601 3 is_stmt 1 view .LVU543
+ 601:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT;
+ 1572 .loc 1 601 23 is_stmt 0 view .LVU544
+ 1573 0080 4FF48273 mov r3, #260
+ 1574 0084 0993 str r3, [sp, #36]
+ 602:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 1575 .loc 1 602 3 is_stmt 1 view .LVU545
+ 602:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH;
+ 1576 .loc 1 602 28 is_stmt 0 view .LVU546
+ 1577 0086 4FF47063 mov r3, #3840
+ 1578 008a 0A93 str r3, [sp, #40]
+ 603:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+ 1579 .loc 1 603 3 is_stmt 1 view .LVU547
+ 603:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE;
+ 1580 .loc 1 603 32 is_stmt 0 view .LVU548
+ 1581 008c 0B95 str r5, [sp, #44]
+ 604:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1582 .loc 1 604 3 is_stmt 1 view .LVU549
+ 604:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT;
+ 1583 .loc 1 604 29 is_stmt 0 view .LVU550
+ 1584 008e 0123 movs r3, #1
+ 1585 0090 0C93 str r3, [sp, #48]
+ 605:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 1586 .loc 1 605 3 is_stmt 1 view .LVU551
+ 605:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16;
+ 1587 .loc 1 605 22 is_stmt 0 view .LVU552
+ 1588 0092 4FF40073 mov r3, #512
+ 1589 0096 0D93 str r3, [sp, #52]
+ 606:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1590 .loc 1 606 3 is_stmt 1 view .LVU553
+ 606:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST;
+ 1591 .loc 1 606 27 is_stmt 0 view .LVU554
+ 1592 0098 1823 movs r3, #24
+ 1593 009a 0E93 str r3, [sp, #56]
+ 607:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1594 .loc 1 607 3 is_stmt 1 view .LVU555
+ 607:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE;
+ 1595 .loc 1 607 27 is_stmt 0 view .LVU556
+ 1596 009c 0F94 str r4, [sp, #60]
+ 608:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1597 .loc 1 608 3 is_stmt 1 view .LVU557
+ ARM GAS /tmp/ccDGOsZt.s page 134
-1611:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 6001 .loc 1 1611 3 is_stmt 1 view .LVU1859
-1611:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
- 6002 .loc 1 1611 33 is_stmt 0 view .LVU1860
- 6003 009e 1094 str r4, [sp, #64]
-1612:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
- 6004 .loc 1 1612 3 is_stmt 1 view .LVU1861
-1612:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
- 6005 .loc 1 1612 26 is_stmt 0 view .LVU1862
- 6006 00a0 0723 movs r3, #7
- 6007 00a2 1193 str r3, [sp, #68]
-1613:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
- 6008 .loc 1 1613 3 is_stmt 1 view .LVU1863
- 6009 00a4 094C ldr r4, .L360+8
- 6010 00a6 08A9 add r1, sp, #32
- 6011 00a8 2046 mov r0, r4
- 6012 00aa FFF7FEFF bl LL_SPI_Init
- 6013 .LVL579:
-1614:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6);
- 6014 .loc 1 1614 3 view .LVU1864
- 6015 .LBB511:
- 6016 .LBI511:
+ 608:Src/main.c **** SPI_InitStruct.CRCPoly = 7;
+ 1598 .loc 1 608 33 is_stmt 0 view .LVU558
+ 1599 009e 1094 str r4, [sp, #64]
+ 609:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
+ 1600 .loc 1 609 3 is_stmt 1 view .LVU559
+ 609:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct);
+ 1601 .loc 1 609 26 is_stmt 0 view .LVU560
+ 1602 00a0 0723 movs r3, #7
+ 1603 00a2 1193 str r3, [sp, #68]
+ 610:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA);
+ 1604 .loc 1 610 3 is_stmt 1 view .LVU561
+ 1605 00a4 094C ldr r4, .L30+8
+ 1606 00a6 08A9 add r1, sp, #32
+ 1607 00a8 2046 mov r0, r4
+ 1608 00aa FFF7FEFF bl LL_SPI_Init
+ 1609 .LVL77:
+ 611:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6);
+ 1610 .loc 1 611 3 view .LVU562
+ 1611 .LBB180:
+ 1612 .LBI180:
426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6017 .loc 4 426 22 view .LVU1865
- 6018 .LBB512:
+ 1613 .loc 4 426 22 view .LVU563
+ 1614 .LBB181:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6019 .loc 4 428 3 view .LVU1866
- 6020 00ae 6368 ldr r3, [r4, #4]
- 6021 00b0 23F01003 bic r3, r3, #16
- 6022 00b4 6360 str r3, [r4, #4]
- 6023 .LVL580:
+ 1615 .loc 4 428 3 view .LVU564
+ 1616 00ae 6368 ldr r3, [r4, #4]
+ 1617 00b0 23F01003 bic r3, r3, #16
+ 1618 00b4 6360 str r3, [r4, #4]
+ 1619 .LVL78:
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6024 .loc 4 428 3 is_stmt 0 view .LVU1867
- 6025 .LBE512:
- 6026 .LBE511:
-1615:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */
- 6027 .loc 1 1615 3 is_stmt 1 view .LVU1868
- 6028 .LBB513:
- 6029 .LBI513:
+ 1620 .loc 4 428 3 is_stmt 0 view .LVU565
+ 1621 .LBE181:
+ 1622 .LBE180:
+ 612:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */
+ 1623 .loc 1 612 3 is_stmt 1 view .LVU566
+ 1624 .LBB182:
+ 1625 .LBI182:
874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 6030 .loc 4 874 22 view .LVU1869
- 6031 .LBB514:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6032 .loc 4 876 3 view .LVU1870
- 6033 00b6 6368 ldr r3, [r4, #4]
- 6034 00b8 23F00803 bic r3, r3, #8
- 6035 00bc 6360 str r3, [r4, #4]
- 6036 .LVL581:
- 876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 6037 .loc 4 876 3 is_stmt 0 view .LVU1871
- 6038 .LBE514:
- 6039 .LBE513:
-1620:Src/main.c ****
- 6040 .loc 1 1620 1 view .LVU1872
- 6041 00be 12B0 add sp, sp, #72
- 6042 .LCFI57:
- 6043 .cfi_def_cfa_offset 24
- ARM GAS /tmp/ccLSPxIe.s page 291
+ 1626 .loc 4 874 22 view .LVU567
+ 1627 .LBB183:
+ 1628 .loc 4 876 3 view .LVU568
+ 1629 00b6 6368 ldr r3, [r4, #4]
+ 1630 00b8 23F00803 bic r3, r3, #8
+ 1631 00bc 6360 str r3, [r4, #4]
+ 1632 .LVL79:
+ 1633 .loc 4 876 3 is_stmt 0 view .LVU569
+ 1634 .LBE183:
+ 1635 .LBE182:
+ 617:Src/main.c ****
+ 1636 .loc 1 617 1 view .LVU570
+ 1637 00be 12B0 add sp, sp, #72
+ 1638 .LCFI18:
+ 1639 .cfi_def_cfa_offset 24
+ 1640 @ sp needed
+ 1641 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
+ 1642 .L31:
+ 1643 .align 2
+ ARM GAS /tmp/ccDGOsZt.s page 135
- 6044 @ sp needed
- 6045 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 6046 .L361:
- 6047 .align 2
- 6048 .L360:
- 6049 00c4 00380240 .word 1073887232
- 6050 00c8 00000240 .word 1073872896
- 6051 00cc 00540140 .word 1073828864
- 6052 .cfi_endproc
- 6053 .LFE1194:
- 6055 .section .text.MX_TIM2_Init,"ax",%progbits
- 6056 .align 1
- 6057 .syntax unified
- 6058 .thumb
- 6059 .thumb_func
- 6061 MX_TIM2_Init:
- 6062 .LFB1195:
-1628:Src/main.c ****
- 6063 .loc 1 1628 1 is_stmt 1 view -0
- 6064 .cfi_startproc
- 6065 @ args = 0, pretend = 0, frame = 24
- 6066 @ frame_needed = 0, uses_anonymous_args = 0
- 6067 0000 10B5 push {r4, lr}
- 6068 .LCFI58:
- 6069 .cfi_def_cfa_offset 8
- 6070 .cfi_offset 4, -8
- 6071 .cfi_offset 14, -4
- 6072 0002 86B0 sub sp, sp, #24
- 6073 .LCFI59:
- 6074 .cfi_def_cfa_offset 32
-1634:Src/main.c ****
- 6075 .loc 1 1634 3 view .LVU1874
-1634:Src/main.c ****
- 6076 .loc 1 1634 22 is_stmt 0 view .LVU1875
- 6077 0004 0024 movs r4, #0
- 6078 0006 0194 str r4, [sp, #4]
- 6079 0008 0294 str r4, [sp, #8]
- 6080 000a 0394 str r4, [sp, #12]
- 6081 000c 0494 str r4, [sp, #16]
- 6082 000e 0594 str r4, [sp, #20]
-1637:Src/main.c ****
- 6083 .loc 1 1637 3 is_stmt 1 view .LVU1876
- 6084 .LVL582:
- 6085 .LBB515:
- 6086 .LBI515:
+ 1644 .L30:
+ 1645 00c4 00380240 .word 1073887232
+ 1646 00c8 00000240 .word 1073872896
+ 1647 00cc 00540140 .word 1073828864
+ 1648 .cfi_endproc
+ 1649 .LFE1191:
+ 1651 .section .text.MX_TIM2_Init,"ax",%progbits
+ 1652 .align 1
+ 1653 .syntax unified
+ 1654 .thumb
+ 1655 .thumb_func
+ 1657 MX_TIM2_Init:
+ 1658 .LFB1192:
+ 625:Src/main.c ****
+ 1659 .loc 1 625 1 is_stmt 1 view -0
+ 1660 .cfi_startproc
+ 1661 @ args = 0, pretend = 0, frame = 24
+ 1662 @ frame_needed = 0, uses_anonymous_args = 0
+ 1663 0000 10B5 push {r4, lr}
+ 1664 .LCFI19:
+ 1665 .cfi_def_cfa_offset 8
+ 1666 .cfi_offset 4, -8
+ 1667 .cfi_offset 14, -4
+ 1668 0002 86B0 sub sp, sp, #24
+ 1669 .LCFI20:
+ 1670 .cfi_def_cfa_offset 32
+ 631:Src/main.c ****
+ 1671 .loc 1 631 3 view .LVU572
+ 631:Src/main.c ****
+ 1672 .loc 1 631 22 is_stmt 0 view .LVU573
+ 1673 0004 0024 movs r4, #0
+ 1674 0006 0194 str r4, [sp, #4]
+ 1675 0008 0294 str r4, [sp, #8]
+ 1676 000a 0394 str r4, [sp, #12]
+ 1677 000c 0494 str r4, [sp, #16]
+ 1678 000e 0594 str r4, [sp, #20]
+ 634:Src/main.c ****
+ 1679 .loc 1 634 3 is_stmt 1 view .LVU574
+ 1680 .LVL80:
+ 1681 .LBB184:
+ 1682 .LBI184:
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 6087 .loc 3 1071 22 view .LVU1877
- 6088 .LBB516:
+ 1683 .loc 3 1071 22 view .LVU575
+ 1684 .LBB185:
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
- 6089 .loc 3 1073 3 view .LVU1878
+ 1685 .loc 3 1073 3 view .LVU576
1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 6090 .loc 3 1074 3 view .LVU1879
- 6091 0010 1D4B ldr r3, .L364
- 6092 0012 1A6C ldr r2, [r3, #64]
- 6093 0014 42F00102 orr r2, r2, #1
- 6094 0018 1A64 str r2, [r3, #64]
+ 1686 .loc 3 1074 3 view .LVU577
+ 1687 0010 1D4B ldr r3, .L34
+ 1688 0012 1A6C ldr r2, [r3, #64]
+ 1689 0014 42F00102 orr r2, r2, #1
+ 1690 0018 1A64 str r2, [r3, #64]
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- ARM GAS /tmp/ccLSPxIe.s page 292
+ 1691 .loc 3 1076 3 view .LVU578
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 1692 .loc 3 1076 12 is_stmt 0 view .LVU579
+ 1693 001a 1B6C ldr r3, [r3, #64]
+ ARM GAS /tmp/ccDGOsZt.s page 136
- 6095 .loc 3 1076 3 view .LVU1880
+ 1694 001c 03F00103 and r3, r3, #1
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6096 .loc 3 1076 12 is_stmt 0 view .LVU1881
- 6097 001a 1B6C ldr r3, [r3, #64]
- 6098 001c 03F00103 and r3, r3, #1
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6099 .loc 3 1076 10 view .LVU1882
- 6100 0020 0093 str r3, [sp]
+ 1695 .loc 3 1076 10 view .LVU580
+ 1696 0020 0093 str r3, [sp]
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6101 .loc 3 1077 3 is_stmt 1 view .LVU1883
- 6102 0022 009B ldr r3, [sp]
- 6103 .LVL583:
+ 1697 .loc 3 1077 3 is_stmt 1 view .LVU581
+ 1698 0022 009B ldr r3, [sp]
+ 1699 .LVL81:
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6104 .loc 3 1077 3 is_stmt 0 view .LVU1884
- 6105 .LBE516:
- 6106 .LBE515:
-1640:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
- 6107 .loc 1 1640 3 is_stmt 1 view .LVU1885
- 6108 .LBB517:
- 6109 .LBI517:
+ 1700 .loc 3 1077 3 is_stmt 0 view .LVU582
+ 1701 .LBE185:
+ 1702 .LBE184:
+ 637:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
+ 1703 .loc 1 637 3 is_stmt 1 view .LVU583
+ 1704 .LBB186:
+ 1705 .LBI186:
1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 6110 .loc 2 1884 26 view .LVU1886
- 6111 .LBB518:
+ 1706 .loc 2 1884 26 view .LVU584
+ 1707 .LBB187:
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6112 .loc 2 1886 3 view .LVU1887
+ 1708 .loc 2 1886 3 view .LVU585
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6113 .loc 2 1886 26 is_stmt 0 view .LVU1888
- 6114 0024 194B ldr r3, .L364+4
- 6115 0026 D868 ldr r0, [r3, #12]
- 6116 .LBE518:
- 6117 .LBE517:
-1640:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
- 6118 .loc 1 1640 3 discriminator 1 view .LVU1889
- 6119 0028 2246 mov r2, r4
- 6120 002a 2146 mov r1, r4
- 6121 002c C0F30220 ubfx r0, r0, #8, #3
- 6122 0030 FFF7FEFF bl NVIC_EncodePriority
- 6123 .LVL584:
- 6124 .LBB519:
- 6125 .LBI519:
+ 1709 .loc 2 1886 26 is_stmt 0 view .LVU586
+ 1710 0024 194B ldr r3, .L34+4
+ 1711 0026 D868 ldr r0, [r3, #12]
+ 1712 .LBE187:
+ 1713 .LBE186:
+ 637:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn);
+ 1714 .loc 1 637 3 discriminator 1 view .LVU587
+ 1715 0028 2246 mov r2, r4
+ 1716 002a 2146 mov r1, r4
+ 1717 002c C0F30220 ubfx r0, r0, #8, #3
+ 1718 0030 FFF7FEFF bl NVIC_EncodePriority
+ 1719 .LVL82:
+ 1720 .LBB188:
+ 1721 .LBI188:
2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 6126 .loc 2 2024 22 is_stmt 1 view .LVU1890
- 6127 .LBB520:
+ 1722 .loc 2 2024 22 is_stmt 1 view .LVU588
+ 1723 .LBB189:
2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 6128 .loc 2 2026 3 view .LVU1891
+ 1724 .loc 2 2026 3 view .LVU589
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6129 .loc 2 2028 5 view .LVU1892
+ 1725 .loc 2 2028 5 view .LVU590
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6130 .loc 2 2028 49 is_stmt 0 view .LVU1893
- 6131 0034 0001 lsls r0, r0, #4
- 6132 .LVL585:
+ 1726 .loc 2 2028 49 is_stmt 0 view .LVU591
+ 1727 0034 0001 lsls r0, r0, #4
+ 1728 .LVL83:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6133 .loc 2 2028 49 view .LVU1894
- 6134 0036 C0B2 uxtb r0, r0
+ 1729 .loc 2 2028 49 view .LVU592
+ 1730 0036 C0B2 uxtb r0, r0
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6135 .loc 2 2028 47 view .LVU1895
- 6136 0038 154B ldr r3, .L364+8
- ARM GAS /tmp/ccLSPxIe.s page 293
+ 1731 .loc 2 2028 47 view .LVU593
+ 1732 0038 154B ldr r3, .L34+8
+ 1733 003a 83F81C03 strb r0, [r3, #796]
+ 1734 .LVL84:
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ 1735 .loc 2 2028 47 view .LVU594
+ ARM GAS /tmp/ccDGOsZt.s page 137
- 6137 003a 83F81C03 strb r0, [r3, #796]
- 6138 .LVL586:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6139 .loc 2 2028 47 view .LVU1896
- 6140 .LBE520:
- 6141 .LBE519:
-1641:Src/main.c ****
- 6142 .loc 1 1641 3 is_stmt 1 view .LVU1897
- 6143 .LBB521:
- 6144 .LBI521:
+ 1736 .LBE189:
+ 1737 .LBE188:
+ 638:Src/main.c ****
+ 1738 .loc 1 638 3 is_stmt 1 view .LVU595
+ 1739 .LBB190:
+ 1740 .LBI190:
1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 6145 .loc 2 1896 22 view .LVU1898
- 6146 .LBB522:
+ 1741 .loc 2 1896 22 view .LVU596
+ 1742 .LBB191:
1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 6147 .loc 2 1898 3 view .LVU1899
+ 1743 .loc 2 1898 3 view .LVU597
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6148 .loc 2 1900 5 view .LVU1900
+ 1744 .loc 2 1900 5 view .LVU598
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6149 .loc 2 1900 43 is_stmt 0 view .LVU1901
- 6150 003e 4FF08052 mov r2, #268435456
- 6151 0042 1A60 str r2, [r3]
- 6152 .LVL587:
+ 1745 .loc 2 1900 43 is_stmt 0 view .LVU599
+ 1746 003e 4FF08052 mov r2, #268435456
+ 1747 0042 1A60 str r2, [r3]
+ 1748 .LVL85:
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6153 .loc 2 1900 43 view .LVU1902
- 6154 .LBE522:
- 6155 .LBE521:
-1646:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6156 .loc 1 1646 3 is_stmt 1 view .LVU1903
-1646:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6157 .loc 1 1646 28 is_stmt 0 view .LVU1904
- 6158 0044 4FF47A73 mov r3, #1000
- 6159 0048 ADF80430 strh r3, [sp, #4] @ movhi
-1647:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
- 6160 .loc 1 1647 3 is_stmt 1 view .LVU1905
-1647:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
- 6161 .loc 1 1647 30 is_stmt 0 view .LVU1906
- 6162 004c 0294 str r4, [sp, #8]
-1648:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 6163 .loc 1 1648 3 is_stmt 1 view .LVU1907
-1648:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 6164 .loc 1 1648 29 is_stmt 0 view .LVU1908
- 6165 004e 114B ldr r3, .L364+12
- 6166 0050 0393 str r3, [sp, #12]
-1649:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
- 6167 .loc 1 1649 3 is_stmt 1 view .LVU1909
-1649:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
- 6168 .loc 1 1649 32 is_stmt 0 view .LVU1910
- 6169 0052 0494 str r4, [sp, #16]
-1650:Src/main.c **** LL_TIM_DisableARRPreload(TIM2);
- 6170 .loc 1 1650 3 is_stmt 1 view .LVU1911
- 6171 0054 01A9 add r1, sp, #4
- 6172 0056 4FF08040 mov r0, #1073741824
- 6173 005a FFF7FEFF bl LL_TIM_Init
- 6174 .LVL588:
-1651:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
- 6175 .loc 1 1651 3 view .LVU1912
- 6176 .LBB523:
- ARM GAS /tmp/ccLSPxIe.s page 294
-
-
- 6177 .LBI523:
- 6178 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
+ 1749 .loc 2 1900 43 view .LVU600
+ 1750 .LBE191:
+ 1751 .LBE190:
+ 643:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 1752 .loc 1 643 3 is_stmt 1 view .LVU601
+ 643:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 1753 .loc 1 643 28 is_stmt 0 view .LVU602
+ 1754 0044 4FF47A73 mov r3, #1000
+ 1755 0048 ADF80430 strh r3, [sp, #4] @ movhi
+ 644:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
+ 1756 .loc 1 644 3 is_stmt 1 view .LVU603
+ 644:Src/main.c **** TIM_InitStruct.Autoreload = 840000;
+ 1757 .loc 1 644 30 is_stmt 0 view .LVU604
+ 1758 004c 0294 str r4, [sp, #8]
+ 645:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 1759 .loc 1 645 3 is_stmt 1 view .LVU605
+ 645:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 1760 .loc 1 645 29 is_stmt 0 view .LVU606
+ 1761 004e 114B ldr r3, .L34+12
+ 1762 0050 0393 str r3, [sp, #12]
+ 646:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
+ 1763 .loc 1 646 3 is_stmt 1 view .LVU607
+ 646:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct);
+ 1764 .loc 1 646 32 is_stmt 0 view .LVU608
+ 1765 0052 0494 str r4, [sp, #16]
+ 647:Src/main.c **** LL_TIM_DisableARRPreload(TIM2);
+ 1766 .loc 1 647 3 is_stmt 1 view .LVU609
+ 1767 0054 01A9 add r1, sp, #4
+ 1768 0056 4FF08040 mov r0, #1073741824
+ 1769 005a FFF7FEFF bl LL_TIM_Init
+ 1770 .LVL86:
+ 648:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 1771 .loc 1 648 3 view .LVU610
+ 1772 .LBB192:
+ 1773 .LBI192:
+ 1774 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
+ ARM GAS /tmp/ccDGOsZt.s page 138
+
+
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h
4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @author MCD Application Team
5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Header file of TIM LL module.
@@ -17638,13 +8274,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */
54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */
55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */
- ARM GAS /tmp/ccLSPxIe.s page 295
-
-
56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] =
59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ ARM GAS /tmp/ccDGOsZt.s page 139
+
+
60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */
61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */
62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */
@@ -17698,13 +8334,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 296
-
-
113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/
114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants
115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 140
+
+
117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Defines used for the bit position in the register and perform offsets */
@@ -17758,13 +8394,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
- ARM GAS /tmp/ccLSPxIe.s page 297
-
-
170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
+ ARM GAS /tmp/ccDGOsZt.s page 141
+
+
174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -17818,13 +8454,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/
225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division.
- ARM GAS /tmp/ccLSPxIe.s page 298
-
-
227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetClockDivision().*/
+ ARM GAS /tmp/ccDGOsZt.s page 142
+
+
231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc
233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts
@@ -17878,13 +8514,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
- ARM GAS /tmp/ccLSPxIe.s page 299
-
-
284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/
287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 143
+
+
288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
@@ -17938,13 +8574,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
- ARM GAS /tmp/ccLSPxIe.s page 300
-
-
341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetEncoderMode().*/
+ ARM GAS /tmp/ccDGOsZt.s page 144
+
+
345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
@@ -17998,13 +8634,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition.
- ARM GAS /tmp/ccLSPxIe.s page 301
-
-
398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 145
+
+
402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -18058,13 +8694,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level
453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 302
-
-
455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters.
456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note The LOCK bits can be written only once after the reset.
+ ARM GAS /tmp/ccDGOsZt.s page 146
+
+
459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the
460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the
@@ -18118,13 +8754,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2()
- ARM GAS /tmp/ccLSPxIe.s page 303
-
-
512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 147
+
+
516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter.
517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER
518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -18178,13 +8814,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 304
-
-
569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 148
+
+
573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */
574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */
575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -18238,13 +8874,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 305
-
-
626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at
627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at
628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ ARM GAS /tmp/ccDGOsZt.s page 149
+
+
630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
@@ -18298,13 +8934,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- ARM GAS /tmp/ccLSPxIe.s page 306
-
-
683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF - No bit is write
685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */
686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /*!< LOCK Level 2 */
+ ARM GAS /tmp/ccDGOsZt.s page 150
+
+
687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */
688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
@@ -18358,13 +8994,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3
- ARM GAS /tmp/ccLSPxIe.s page 307
-
-
740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1
743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
+ ARM GAS /tmp/ccDGOsZt.s page 151
+
+
744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
@@ -18418,13 +9054,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << 16U) /*!< Capture is done
795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- ARM GAS /tmp/ccLSPxIe.s page 308
-
-
797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter
800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ ARM GAS /tmp/ccDGOsZt.s page 152
+
+
801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1 0x00000000U
803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV1_N2 (TIM_CCMR1_IC1F_0 << 16U)
@@ -18478,13 +9114,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO Trigger Output
853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- ARM GAS /tmp/ccLSPxIe.s page 309
-
-
854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_RESET 0x00000000U /*!<
856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /*!<
857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 /*!<
+ ARM GAS /tmp/ccDGOsZt.s page 153
+
+
858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!<
859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC1REF TIM_CR2_MMS_2 /*!<
860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_OC2REF (TIM_CR2_MMS_2 | TIM_CR2_MMS_0) /*!<
@@ -18538,13 +9174,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2
910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 | TIM_SMCR_TS_0)
- ARM GAS /tmp/ccLSPxIe.s page 310
-
-
911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 | TIM_SMCR_TS_1)
912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ETRF (TIM_SMCR_TS_2 | TIM_SMCR_TS_1 | TIM_SMCR_TS_0)
913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ ARM GAS /tmp/ccDGOsZt.s page 154
+
+
915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ETR_POLARITY External Trigger Polarity
@@ -18598,13 +9234,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /*!< Break input BRK is ac
966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- ARM GAS /tmp/ccLSPxIe.s page 311
-
-
968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_FILTER break filter
971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ ARM GAS /tmp/ccDGOsZt.s page 155
+
+
972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1 0x00000000U /*!< No filter, BRK acts asynchronousl
974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV1_N2 0x00010000U /*!< fSAMPLING=fCK_INT, N=2 */
@@ -18658,13 +9294,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 312
-
-
1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSI OSSI
1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_DISABLE 0x00000000U /*!< When inactive, OCx/OCxN
+ ARM GAS /tmp/ccDGOsZt.s page 156
+
+
1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OxC/OCxN
1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
@@ -18718,13 +9354,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2
1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0)
1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1)
- ARM GAS /tmp/ccLSPxIe.s page 313
-
-
1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)
1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3
1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0)
1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 | TIM_DCR_DBA_1)
+ ARM GAS /tmp/ccDGOsZt.s page 157
+
+
1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0)
1087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_RCR (TIM_DCR_DBA_3 | TIM_DCR_DBA_2)
1088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR1 (TIM_DCR_DBA_3 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)
@@ -18778,13 +9414,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR_ITR1_RMP_1 | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1
1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF (TIM2_OR_ITR1_RMP | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1
1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 314
-
-
1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TIM5_TI4_RMP TIM5 External Input Ch4 Remap
+ ARM GAS /tmp/ccDGOsZt.s page 158
+
+
1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
1144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM5_TI4_RMP_GPIO TIM5_OR_RMP_MASK /*!< TIM5 chan
@@ -18838,13 +9474,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 315
-
-
1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the UIFCPY flag from the counter value.
1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
+ ARM GAS /tmp/ccDGOsZt.s page 159
+
+
1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * to TIMx_CNT register bit 31)
1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNT__ Counter value
@@ -18898,13 +9534,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))
- ARM GAS /tmp/ccLSPxIe.s page 316
-
-
1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu
1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * active/inactive delay.
+ ARM GAS /tmp/ccDGOsZt.s page 160
+
+
1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
@@ -18958,13 +9594,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter.
1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter
- ARM GAS /tmp/ccLSPxIe.s page 317
-
-
1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
+ ARM GAS /tmp/ccDGOsZt.s page 161
+
+
1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN);
1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -19018,13 +9654,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1).
- ARM GAS /tmp/ccLSPxIe.s page 318
-
-
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
+ ARM GAS /tmp/ccDGOsZt.s page 162
+
+
1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -19078,13 +9714,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode.
1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
- ARM GAS /tmp/ccLSPxIe.s page 319
-
-
1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
+ ARM GAS /tmp/ccDGOsZt.s page 163
+
+
1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -19138,13 +9774,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U)
1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 320
-
-
1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return counter_mode;
+ ARM GAS /tmp/ccDGOsZt.s page 164
+
+
1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -19165,23 +9801,23 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
- 6179 .loc 5 1504 22 view .LVU1913
- 6180 .LBB524:
+ 1775 .loc 5 1504 22 view .LVU611
+ 1776 .LBB193:
1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
- 6181 .loc 5 1506 3 view .LVU1914
- 6182 005e 4FF08043 mov r3, #1073741824
- 6183 0062 1A68 ldr r2, [r3]
- 6184 0064 22F08002 bic r2, r2, #128
- 6185 0068 1A60 str r2, [r3]
- 6186 .LVL589:
- 6187 .loc 5 1506 3 is_stmt 0 view .LVU1915
- 6188 .LBE524:
- 6189 .LBE523:
-1652:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
- 6190 .loc 1 1652 3 is_stmt 1 view .LVU1916
- 6191 .LBB525:
- 6192 .LBI525:
+ 1777 .loc 5 1506 3 view .LVU612
+ 1778 005e 4FF08043 mov r3, #1073741824
+ 1779 0062 1A68 ldr r2, [r3]
+ 1780 0064 22F08002 bic r2, r2, #128
+ 1781 0068 1A60 str r2, [r3]
+ 1782 .LVL87:
+ 1783 .loc 5 1506 3 is_stmt 0 view .LVU613
+ 1784 .LBE193:
+ 1785 .LBE192:
+ 649:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET);
+ 1786 .loc 1 649 3 is_stmt 1 view .LVU614
+ 1787 .LBB194:
+ 1788 .LBI194:
1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -19198,13 +9834,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead
1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters.
- ARM GAS /tmp/ccLSPxIe.s page 321
-
-
1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer
1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance.
1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision
+ ARM GAS /tmp/ccDGOsZt.s page 165
+
+
1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values:
1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
@@ -19258,13 +9894,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccLSPxIe.s page 322
-
-
1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT));
1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 166
+
+
1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current direction of the counter
1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection
@@ -19318,13 +9954,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 323
-
-
1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload);
1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 167
+
+
1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value.
1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload
1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
@@ -19378,13 +10014,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 324
-
-
1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt flag (UIF) remapping.
1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccDGOsZt.s page 168
+
+
1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
@@ -19438,13 +10074,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 325
-
-
1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is en
1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccDGOsZt.s page 169
+
+
1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
@@ -19498,13 +10134,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the
1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters.
- ARM GAS /tmp/ccLSPxIe.s page 326
-
-
1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the lock mechanism is supported by a timer instance.
1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccDGOsZt.s page 170
+
+
1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values:
1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF
1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1
@@ -19558,13 +10194,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n
1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel
1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccLSPxIe.s page 327
-
-
1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+ ARM GAS /tmp/ccDGOsZt.s page 171
+
+
1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
@@ -19618,13 +10254,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel.
1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
- ARM GAS /tmp/ccLSPxIe.s page 328
-
-
1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
+ ARM GAS /tmp/ccDGOsZt.s page 172
+
+
1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n
1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n
1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n
@@ -19678,13 +10314,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
- ARM GAS /tmp/ccLSPxIe.s page 329
-
-
1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Mode This parameter can be one of the following values:
1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN
1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE
1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE
+ ARM GAS /tmp/ccDGOsZt.s page 173
+
+
1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE
1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
@@ -19738,13 +10374,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
- ARM GAS /tmp/ccLSPxIe.s page 330
-
-
2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT
+ ARM GAS /tmp/ccDGOsZt.s page 174
+
+
2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -19798,13 +10434,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
- ARM GAS /tmp/ccLSPxIe.s page 331
-
-
2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+ ARM GAS /tmp/ccDGOsZt.s page 175
+
+
2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH
2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW
@@ -19858,13 +10494,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n
2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
- ARM GAS /tmp/ccLSPxIe.s page 332
-
-
2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n
2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n
2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState\n
2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_GetIdleState\n
+ ARM GAS /tmp/ccDGOsZt.s page 176
+
+
2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState
2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
@@ -19918,13 +10554,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel.
2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n
- ARM GAS /tmp/ccLSPxIe.s page 333
-
-
2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n
2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast\n
2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_DisableFast\n
2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_DisableFast
+ ARM GAS /tmp/ccDGOsZt.s page 177
+
+
2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
@@ -19978,13 +10614,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload
2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccLSPxIe.s page 334
-
-
2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+ ARM GAS /tmp/ccDGOsZt.s page 178
+
+
2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
@@ -20038,13 +10674,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
- ARM GAS /tmp/ccLSPxIe.s page 335
-
-
2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ ARM GAS /tmp/ccDGOsZt.s page 179
+
+
2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
@@ -20098,13 +10734,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 336
-
-
2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+ ARM GAS /tmp/ccDGOsZt.s page 180
+
+
2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -20158,13 +10794,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1).
2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
- ARM GAS /tmp/ccLSPxIe.s page 337
-
-
2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance.
+ ARM GAS /tmp/ccDGOsZt.s page 181
+
+
2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
@@ -20218,13 +10854,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccLSPxIe.s page 338
-
-
2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
+ ARM GAS /tmp/ccDGOsZt.s page 182
+
+
2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue);
2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -20278,13 +10914,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
- ARM GAS /tmp/ccLSPxIe.s page 339
-
-
2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance.
2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccDGOsZt.s page 183
+
+
2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
@@ -20338,13 +10974,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 340
-
-
2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR6) set for output channel 6.
2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance.
2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
+ ARM GAS /tmp/ccDGOsZt.s page 184
+
+
2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -20398,13 +11034,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n
2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n
2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n
- ARM GAS /tmp/ccLSPxIe.s page 341
-
-
2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n
2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n
2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n
2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_Config
+ ARM GAS /tmp/ccDGOsZt.s page 185
+
+
2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
@@ -20458,13 +11094,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input.
2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
- ARM GAS /tmp/ccLSPxIe.s page 342
-
-
2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput
2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+ ARM GAS /tmp/ccDGOsZt.s page 186
+
+
2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
@@ -20518,13 +11154,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
- ARM GAS /tmp/ccLSPxIe.s page 343
-
-
2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
+ ARM GAS /tmp/ccDGOsZt.s page 187
+
+
2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -20578,13 +11214,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n
2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n
- ARM GAS /tmp/ccLSPxIe.s page 344
-
-
2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter
2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+ ARM GAS /tmp/ccDGOsZt.s page 188
+
+
2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
@@ -20638,13 +11274,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity
2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
- ARM GAS /tmp/ccLSPxIe.s page 345
-
-
2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]);
2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 189
+
+
2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity.
2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
@@ -20698,13 +11334,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 346
-
-
2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+ ARM GAS /tmp/ccDGOsZt.s page 190
+
+
2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
@@ -20758,13 +11394,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 347
-
-
3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3));
3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 191
+
+
3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4.
@@ -20818,13 +11454,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled.
- ARM GAS /tmp/ccLSPxIe.s page 348
-
-
3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccDGOsZt.s page 192
+
+
3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
@@ -20852,23 +11488,23 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
- 6193 .loc 5 3092 22 view .LVU1917
- 6194 .LBB526:
+ 1789 .loc 5 3092 22 view .LVU615
+ 1790 .LBB195:
3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
- 6195 .loc 5 3094 3 view .LVU1918
- 6196 006a 9968 ldr r1, [r3, #8]
- 6197 006c 0A4A ldr r2, .L364+16
- 6198 006e 0A40 ands r2, r2, r1
- 6199 0070 9A60 str r2, [r3, #8]
- 6200 .LVL590:
- 6201 .loc 5 3094 3 is_stmt 0 view .LVU1919
- 6202 .LBE526:
- 6203 .LBE525:
-1653:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2);
- 6204 .loc 1 1653 3 is_stmt 1 view .LVU1920
- 6205 .LBB527:
- 6206 .LBI527:
+ 1791 .loc 5 3094 3 view .LVU616
+ 1792 006a 9968 ldr r1, [r3, #8]
+ 1793 006c 0A4A ldr r2, .L34+16
+ 1794 006e 0A40 ands r2, r2, r1
+ 1795 0070 9A60 str r2, [r3, #8]
+ 1796 .LVL88:
+ 1797 .loc 5 3094 3 is_stmt 0 view .LVU617
+ 1798 .LBE195:
+ 1799 .LBE194:
+ 650:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2);
+ 1800 .loc 1 650 3 is_stmt 1 view .LVU618
+ 1801 .LBB196:
+ 1802 .LBI196:
3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -20878,13 +11514,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode
3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 349
-
-
3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1
3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2
3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12
3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+ ARM GAS /tmp/ccDGOsZt.s page 193
+
+
3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -20916,35 +11552,35 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
- 6207 .loc 5 3138 22 view .LVU1921
- 6208 .LBB528:
+ 1803 .loc 5 3138 22 view .LVU619
+ 1804 .LBB197:
3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
- 6209 .loc 5 3140 3 view .LVU1922
- 6210 0072 5A68 ldr r2, [r3, #4]
- 6211 0074 22F07002 bic r2, r2, #112
- 6212 0078 5A60 str r2, [r3, #4]
- 6213 .LVL591:
- 6214 .loc 5 3140 3 is_stmt 0 view .LVU1923
- 6215 .LBE528:
- 6216 .LBE527:
-1654:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
- 6217 .loc 1 1654 3 is_stmt 1 view .LVU1924
- 6218 .LBB529:
- 6219 .LBI529:
+ 1805 .loc 5 3140 3 view .LVU620
+ 1806 0072 5A68 ldr r2, [r3, #4]
+ 1807 0074 22F07002 bic r2, r2, #112
+ 1808 0078 5A60 str r2, [r3, #4]
+ 1809 .LVL89:
+ 1810 .loc 5 3140 3 is_stmt 0 view .LVU621
+ 1811 .LBE197:
+ 1812 .LBE196:
+ 651:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */
+ 1813 .loc 1 651 3 is_stmt 1 view .LVU622
+ 1814 .LBB198:
+ 1815 .LBI198:
3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization.
- ARM GAS /tmp/ccLSPxIe.s page 350
-
-
3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer Instance
3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ADCSynchronization This parameter can be one of the following values:
3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_RESET
+ ARM GAS /tmp/ccDGOsZt.s page 194
+
+
3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE
3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_UPDATE
3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_CC1F
@@ -20998,13 +11634,13 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2
3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3
3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED
- ARM GAS /tmp/ccLSPxIe.s page 351
-
-
3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1
3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2
3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF
3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+ ARM GAS /tmp/ccDGOsZt.s page 195
+
+
3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -21033,2026 +11669,1646 @@ ARM GAS /tmp/ccLSPxIe.s page 1
3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
- 6220 .loc 5 3235 22 view .LVU1925
- 6221 .LBB530:
+ 1816 .loc 5 3235 22 view .LVU623
+ 1817 .LBB199:
3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
- 6222 .loc 5 3237 3 view .LVU1926
- 6223 007a 9A68 ldr r2, [r3, #8]
- 6224 007c 22F08002 bic r2, r2, #128
- 6225 0080 9A60 str r2, [r3, #8]
- 6226 .LVL592:
- 6227 .loc 5 3237 3 is_stmt 0 view .LVU1927
- 6228 .LBE530:
- 6229 .LBE529:
-1659:Src/main.c ****
- 6230 .loc 1 1659 1 view .LVU1928
- 6231 0082 06B0 add sp, sp, #24
- 6232 .LCFI60:
- 6233 .cfi_def_cfa_offset 8
- 6234 @ sp needed
- 6235 0084 10BD pop {r4, pc}
- 6236 .L365:
- 6237 0086 00BF .align 2
- 6238 .L364:
- 6239 0088 00380240 .word 1073887232
- 6240 008c 00ED00E0 .word -536810240
- 6241 0090 00E100E0 .word -536813312
- ARM GAS /tmp/ccLSPxIe.s page 352
+ 1818 .loc 5 3237 3 view .LVU624
+ 1819 007a 9A68 ldr r2, [r3, #8]
+ 1820 007c 22F08002 bic r2, r2, #128
+ 1821 0080 9A60 str r2, [r3, #8]
+ 1822 .LVL90:
+ 1823 .loc 5 3237 3 is_stmt 0 view .LVU625
+ 1824 .LBE199:
+ 1825 .LBE198:
+ 656:Src/main.c ****
+ 1826 .loc 1 656 1 view .LVU626
+ 1827 0082 06B0 add sp, sp, #24
+ 1828 .LCFI21:
+ 1829 .cfi_def_cfa_offset 8
+ 1830 @ sp needed
+ 1831 0084 10BD pop {r4, pc}
+ 1832 .L35:
+ 1833 0086 00BF .align 2
+ 1834 .L34:
+ 1835 0088 00380240 .word 1073887232
+ 1836 008c 00ED00E0 .word -536810240
+ 1837 0090 00E100E0 .word -536813312
+ 1838 0094 40D10C00 .word 840000
+ 1839 0098 F8BFFEFF .word -81928
+ 1840 .cfi_endproc
+ 1841 .LFE1192:
+ ARM GAS /tmp/ccDGOsZt.s page 196
- 6242 0094 40D10C00 .word 840000
- 6243 0098 F8BFFEFF .word -81928
- 6244 .cfi_endproc
- 6245 .LFE1195:
- 6247 .section .text.MX_TIM5_Init,"ax",%progbits
- 6248 .align 1
- 6249 .syntax unified
- 6250 .thumb
- 6251 .thumb_func
- 6253 MX_TIM5_Init:
- 6254 .LFB1197:
-1726:Src/main.c ****
- 6255 .loc 1 1726 1 is_stmt 1 view -0
- 6256 .cfi_startproc
- 6257 @ args = 0, pretend = 0, frame = 24
- 6258 @ frame_needed = 0, uses_anonymous_args = 0
- 6259 0000 10B5 push {r4, lr}
- 6260 .LCFI61:
- 6261 .cfi_def_cfa_offset 8
- 6262 .cfi_offset 4, -8
- 6263 .cfi_offset 14, -4
- 6264 0002 86B0 sub sp, sp, #24
- 6265 .LCFI62:
- 6266 .cfi_def_cfa_offset 32
-1732:Src/main.c ****
- 6267 .loc 1 1732 3 view .LVU1930
-1732:Src/main.c ****
- 6268 .loc 1 1732 22 is_stmt 0 view .LVU1931
- 6269 0004 0024 movs r4, #0
- 6270 0006 0194 str r4, [sp, #4]
- 6271 0008 0294 str r4, [sp, #8]
- 6272 000a 0394 str r4, [sp, #12]
- 6273 000c 0494 str r4, [sp, #16]
- 6274 000e 0594 str r4, [sp, #20]
-1735:Src/main.c ****
- 6275 .loc 1 1735 3 is_stmt 1 view .LVU1932
- 6276 .LVL593:
- 6277 .LBB531:
- 6278 .LBI531:
+ 1843 .section .text.MX_TIM5_Init,"ax",%progbits
+ 1844 .align 1
+ 1845 .syntax unified
+ 1846 .thumb
+ 1847 .thumb_func
+ 1849 MX_TIM5_Init:
+ 1850 .LFB1193:
+ 664:Src/main.c ****
+ 1851 .loc 1 664 1 is_stmt 1 view -0
+ 1852 .cfi_startproc
+ 1853 @ args = 0, pretend = 0, frame = 24
+ 1854 @ frame_needed = 0, uses_anonymous_args = 0
+ 1855 0000 10B5 push {r4, lr}
+ 1856 .LCFI22:
+ 1857 .cfi_def_cfa_offset 8
+ 1858 .cfi_offset 4, -8
+ 1859 .cfi_offset 14, -4
+ 1860 0002 86B0 sub sp, sp, #24
+ 1861 .LCFI23:
+ 1862 .cfi_def_cfa_offset 32
+ 670:Src/main.c ****
+ 1863 .loc 1 670 3 view .LVU628
+ 670:Src/main.c ****
+ 1864 .loc 1 670 22 is_stmt 0 view .LVU629
+ 1865 0004 0024 movs r4, #0
+ 1866 0006 0194 str r4, [sp, #4]
+ 1867 0008 0294 str r4, [sp, #8]
+ 1868 000a 0394 str r4, [sp, #12]
+ 1869 000c 0494 str r4, [sp, #16]
+ 1870 000e 0594 str r4, [sp, #20]
+ 673:Src/main.c ****
+ 1871 .loc 1 673 3 is_stmt 1 view .LVU630
+ 1872 .LVL91:
+ 1873 .LBB200:
+ 1874 .LBI200:
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 6279 .loc 3 1071 22 view .LVU1933
- 6280 .LBB532:
+ 1875 .loc 3 1071 22 view .LVU631
+ 1876 .LBB201:
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
- 6281 .loc 3 1073 3 view .LVU1934
+ 1877 .loc 3 1073 3 view .LVU632
1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 6282 .loc 3 1074 3 view .LVU1935
- 6283 0010 1C4B ldr r3, .L368
- 6284 0012 1A6C ldr r2, [r3, #64]
- 6285 0014 42F00802 orr r2, r2, #8
- 6286 0018 1A64 str r2, [r3, #64]
+ 1878 .loc 3 1074 3 view .LVU633
+ 1879 0010 1C4B ldr r3, .L38
+ 1880 0012 1A6C ldr r2, [r3, #64]
+ 1881 0014 42F00802 orr r2, r2, #8
+ 1882 0018 1A64 str r2, [r3, #64]
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6287 .loc 3 1076 3 view .LVU1936
+ 1883 .loc 3 1076 3 view .LVU634
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6288 .loc 3 1076 12 is_stmt 0 view .LVU1937
- 6289 001a 1B6C ldr r3, [r3, #64]
- 6290 001c 03F00803 and r3, r3, #8
+ 1884 .loc 3 1076 12 is_stmt 0 view .LVU635
+ 1885 001a 1B6C ldr r3, [r3, #64]
+ 1886 001c 03F00803 and r3, r3, #8
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- ARM GAS /tmp/ccLSPxIe.s page 353
+ 1887 .loc 3 1076 10 view .LVU636
+ 1888 0020 0093 str r3, [sp]
+1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 1889 .loc 3 1077 3 is_stmt 1 view .LVU637
+ ARM GAS /tmp/ccDGOsZt.s page 197
- 6291 .loc 3 1076 10 view .LVU1938
- 6292 0020 0093 str r3, [sp]
+ 1890 0022 009B ldr r3, [sp]
+ 1891 .LVL92:
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6293 .loc 3 1077 3 is_stmt 1 view .LVU1939
- 6294 0022 009B ldr r3, [sp]
- 6295 .LVL594:
-1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6296 .loc 3 1077 3 is_stmt 0 view .LVU1940
- 6297 .LBE532:
- 6298 .LBE531:
-1738:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
- 6299 .loc 1 1738 3 is_stmt 1 view .LVU1941
- 6300 .LBB533:
- 6301 .LBI533:
+ 1892 .loc 3 1077 3 is_stmt 0 view .LVU638
+ 1893 .LBE201:
+ 1894 .LBE200:
+ 676:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
+ 1895 .loc 1 676 3 is_stmt 1 view .LVU639
+ 1896 .LBB202:
+ 1897 .LBI202:
1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 6302 .loc 2 1884 26 view .LVU1942
- 6303 .LBB534:
+ 1898 .loc 2 1884 26 view .LVU640
+ 1899 .LBB203:
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6304 .loc 2 1886 3 view .LVU1943
+ 1900 .loc 2 1886 3 view .LVU641
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6305 .loc 2 1886 26 is_stmt 0 view .LVU1944
- 6306 0024 184B ldr r3, .L368+4
- 6307 0026 D868 ldr r0, [r3, #12]
- 6308 .LBE534:
- 6309 .LBE533:
-1738:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
- 6310 .loc 1 1738 3 discriminator 1 view .LVU1945
- 6311 0028 2246 mov r2, r4
- 6312 002a 2146 mov r1, r4
- 6313 002c C0F30220 ubfx r0, r0, #8, #3
- 6314 0030 FFF7FEFF bl NVIC_EncodePriority
- 6315 .LVL595:
- 6316 .LBB535:
- 6317 .LBI535:
+ 1901 .loc 2 1886 26 is_stmt 0 view .LVU642
+ 1902 0024 184B ldr r3, .L38+4
+ 1903 0026 D868 ldr r0, [r3, #12]
+ 1904 .LBE203:
+ 1905 .LBE202:
+ 676:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn);
+ 1906 .loc 1 676 3 discriminator 1 view .LVU643
+ 1907 0028 2246 mov r2, r4
+ 1908 002a 2146 mov r1, r4
+ 1909 002c C0F30220 ubfx r0, r0, #8, #3
+ 1910 0030 FFF7FEFF bl NVIC_EncodePriority
+ 1911 .LVL93:
+ 1912 .LBB204:
+ 1913 .LBI204:
2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 6318 .loc 2 2024 22 is_stmt 1 view .LVU1946
- 6319 .LBB536:
+ 1914 .loc 2 2024 22 is_stmt 1 view .LVU644
+ 1915 .LBB205:
2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 6320 .loc 2 2026 3 view .LVU1947
+ 1916 .loc 2 2026 3 view .LVU645
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6321 .loc 2 2028 5 view .LVU1948
+ 1917 .loc 2 2028 5 view .LVU646
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6322 .loc 2 2028 49 is_stmt 0 view .LVU1949
- 6323 0034 0001 lsls r0, r0, #4
- 6324 .LVL596:
+ 1918 .loc 2 2028 49 is_stmt 0 view .LVU647
+ 1919 0034 0001 lsls r0, r0, #4
+ 1920 .LVL94:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6325 .loc 2 2028 49 view .LVU1950
- 6326 0036 C0B2 uxtb r0, r0
+ 1921 .loc 2 2028 49 view .LVU648
+ 1922 0036 C0B2 uxtb r0, r0
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6327 .loc 2 2028 47 view .LVU1951
- 6328 0038 144B ldr r3, .L368+8
- 6329 003a 83F83203 strb r0, [r3, #818]
- 6330 .LVL597:
+ 1923 .loc 2 2028 47 view .LVU649
+ 1924 0038 144B ldr r3, .L38+8
+ 1925 003a 83F83203 strb r0, [r3, #818]
+ 1926 .LVL95:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6331 .loc 2 2028 47 view .LVU1952
- 6332 .LBE536:
- 6333 .LBE535:
- ARM GAS /tmp/ccLSPxIe.s page 354
+ 1927 .loc 2 2028 47 view .LVU650
+ 1928 .LBE205:
+ 1929 .LBE204:
+ 677:Src/main.c ****
+ 1930 .loc 1 677 3 is_stmt 1 view .LVU651
+ 1931 .LBB206:
+ 1932 .LBI206:
+ ARM GAS /tmp/ccDGOsZt.s page 198
-1739:Src/main.c ****
- 6334 .loc 1 1739 3 is_stmt 1 view .LVU1953
- 6335 .LBB537:
- 6336 .LBI537:
1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 6337 .loc 2 1896 22 view .LVU1954
- 6338 .LBB538:
+ 1933 .loc 2 1896 22 view .LVU652
+ 1934 .LBB207:
1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 6339 .loc 2 1898 3 view .LVU1955
+ 1935 .loc 2 1898 3 view .LVU653
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6340 .loc 2 1900 5 view .LVU1956
+ 1936 .loc 2 1900 5 view .LVU654
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6341 .loc 2 1900 43 is_stmt 0 view .LVU1957
- 6342 003e 4FF48022 mov r2, #262144
- 6343 0042 5A60 str r2, [r3, #4]
- 6344 .LVL598:
+ 1937 .loc 2 1900 43 is_stmt 0 view .LVU655
+ 1938 003e 4FF48022 mov r2, #262144
+ 1939 0042 5A60 str r2, [r3, #4]
+ 1940 .LVL96:
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6345 .loc 2 1900 43 view .LVU1958
- 6346 .LBE538:
- 6347 .LBE537:
-1744:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6348 .loc 1 1744 3 is_stmt 1 view .LVU1959
-1744:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6349 .loc 1 1744 28 is_stmt 0 view .LVU1960
- 6350 0044 42F21073 movw r3, #10000
- 6351 0048 ADF80430 strh r3, [sp, #4] @ movhi
-1745:Src/main.c **** TIM_InitStruct.Autoreload = 560;
- 6352 .loc 1 1745 3 is_stmt 1 view .LVU1961
-1745:Src/main.c **** TIM_InitStruct.Autoreload = 560;
- 6353 .loc 1 1745 30 is_stmt 0 view .LVU1962
- 6354 004c 0294 str r4, [sp, #8]
-1746:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 6355 .loc 1 1746 3 is_stmt 1 view .LVU1963
-1746:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
- 6356 .loc 1 1746 29 is_stmt 0 view .LVU1964
- 6357 004e 4FF40C73 mov r3, #560
- 6358 0052 0393 str r3, [sp, #12]
-1747:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
- 6359 .loc 1 1747 3 is_stmt 1 view .LVU1965
-1747:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
- 6360 .loc 1 1747 32 is_stmt 0 view .LVU1966
- 6361 0054 0494 str r4, [sp, #16]
-1748:Src/main.c **** LL_TIM_DisableARRPreload(TIM5);
- 6362 .loc 1 1748 3 is_stmt 1 view .LVU1967
- 6363 0056 0E4C ldr r4, .L368+12
- 6364 0058 01A9 add r1, sp, #4
- 6365 005a 2046 mov r0, r4
- 6366 005c FFF7FEFF bl LL_TIM_Init
- 6367 .LVL599:
-1749:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
- 6368 .loc 1 1749 3 view .LVU1968
- 6369 .LBB539:
- 6370 .LBI539:
+ 1941 .loc 2 1900 43 view .LVU656
+ 1942 .LBE207:
+ 1943 .LBE206:
+ 682:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 1944 .loc 1 682 3 is_stmt 1 view .LVU657
+ 682:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 1945 .loc 1 682 28 is_stmt 0 view .LVU658
+ 1946 0044 42F21073 movw r3, #10000
+ 1947 0048 ADF80430 strh r3, [sp, #4] @ movhi
+ 683:Src/main.c **** TIM_InitStruct.Autoreload = 560;
+ 1948 .loc 1 683 3 is_stmt 1 view .LVU659
+ 683:Src/main.c **** TIM_InitStruct.Autoreload = 560;
+ 1949 .loc 1 683 30 is_stmt 0 view .LVU660
+ 1950 004c 0294 str r4, [sp, #8]
+ 684:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 1951 .loc 1 684 3 is_stmt 1 view .LVU661
+ 684:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
+ 1952 .loc 1 684 29 is_stmt 0 view .LVU662
+ 1953 004e 4FF40C73 mov r3, #560
+ 1954 0052 0393 str r3, [sp, #12]
+ 685:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
+ 1955 .loc 1 685 3 is_stmt 1 view .LVU663
+ 685:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct);
+ 1956 .loc 1 685 32 is_stmt 0 view .LVU664
+ 1957 0054 0494 str r4, [sp, #16]
+ 686:Src/main.c **** LL_TIM_DisableARRPreload(TIM5);
+ 1958 .loc 1 686 3 is_stmt 1 view .LVU665
+ 1959 0056 0E4C ldr r4, .L38+12
+ 1960 0058 01A9 add r1, sp, #4
+ 1961 005a 2046 mov r0, r4
+ 1962 005c FFF7FEFF bl LL_TIM_Init
+ 1963 .LVL97:
+ 687:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL);
+ 1964 .loc 1 687 3 view .LVU666
+ 1965 .LBB208:
+ 1966 .LBI208:
1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6371 .loc 5 1504 22 view .LVU1969
- 6372 .LBB540:
+ 1967 .loc 5 1504 22 view .LVU667
+ 1968 .LBB209:
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 355
+ 1969 .loc 5 1506 3 view .LVU668
+ 1970 0060 2368 ldr r3, [r4]
+ 1971 0062 23F08003 bic r3, r3, #128
+ 1972 0066 2360 str r3, [r4]
+ ARM GAS /tmp/ccDGOsZt.s page 199
- 6373 .loc 5 1506 3 view .LVU1970
- 6374 0060 2368 ldr r3, [r4]
- 6375 0062 23F08003 bic r3, r3, #128
- 6376 0066 2360 str r3, [r4]
- 6377 .LVL600:
+ 1973 .LVL98:
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6378 .loc 5 1506 3 is_stmt 0 view .LVU1971
- 6379 .LBE540:
- 6380 .LBE539:
-1750:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
- 6381 .loc 1 1750 3 is_stmt 1 view .LVU1972
- 6382 .LBB541:
- 6383 .LBI541:
+ 1974 .loc 5 1506 3 is_stmt 0 view .LVU669
+ 1975 .LBE209:
+ 1976 .LBE208:
+ 688:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET);
+ 1977 .loc 1 688 3 is_stmt 1 view .LVU670
+ 1978 .LBB210:
+ 1979 .LBI210:
3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6384 .loc 5 3092 22 view .LVU1973
- 6385 .LBB542:
+ 1980 .loc 5 3092 22 view .LVU671
+ 1981 .LBB211:
3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6386 .loc 5 3094 3 view .LVU1974
- 6387 0068 A268 ldr r2, [r4, #8]
- 6388 006a 0A4B ldr r3, .L368+16
- 6389 006c 1340 ands r3, r3, r2
- 6390 006e A360 str r3, [r4, #8]
- 6391 .LVL601:
+ 1982 .loc 5 3094 3 view .LVU672
+ 1983 0068 A268 ldr r2, [r4, #8]
+ 1984 006a 0A4B ldr r3, .L38+16
+ 1985 006c 1340 ands r3, r3, r2
+ 1986 006e A360 str r3, [r4, #8]
+ 1987 .LVL99:
3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6392 .loc 5 3094 3 is_stmt 0 view .LVU1975
- 6393 .LBE542:
- 6394 .LBE541:
-1751:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5);
- 6395 .loc 1 1751 3 is_stmt 1 view .LVU1976
- 6396 .LBB543:
- 6397 .LBI543:
+ 1988 .loc 5 3094 3 is_stmt 0 view .LVU673
+ 1989 .LBE211:
+ 1990 .LBE210:
+ 689:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5);
+ 1991 .loc 1 689 3 is_stmt 1 view .LVU674
+ 1992 .LBB212:
+ 1993 .LBI212:
3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6398 .loc 5 3138 22 view .LVU1977
- 6399 .LBB544:
+ 1994 .loc 5 3138 22 view .LVU675
+ 1995 .LBB213:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6400 .loc 5 3140 3 view .LVU1978
- 6401 0070 6368 ldr r3, [r4, #4]
- 6402 0072 23F07003 bic r3, r3, #112
- 6403 0076 6360 str r3, [r4, #4]
- 6404 .LVL602:
+ 1996 .loc 5 3140 3 view .LVU676
+ 1997 0070 6368 ldr r3, [r4, #4]
+ 1998 0072 23F07003 bic r3, r3, #112
+ 1999 0076 6360 str r3, [r4, #4]
+ 2000 .LVL100:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6405 .loc 5 3140 3 is_stmt 0 view .LVU1979
- 6406 .LBE544:
- 6407 .LBE543:
-1752:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */
- 6408 .loc 1 1752 3 is_stmt 1 view .LVU1980
- 6409 .LBB545:
- 6410 .LBI545:
+ 2001 .loc 5 3140 3 is_stmt 0 view .LVU677
+ 2002 .LBE213:
+ 2003 .LBE212:
+ 690:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */
+ 2004 .loc 1 690 3 is_stmt 1 view .LVU678
+ 2005 .LBB214:
+ 2006 .LBI214:
3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6411 .loc 5 3235 22 view .LVU1981
- 6412 .LBB546:
- 6413 .loc 5 3237 3 view .LVU1982
- 6414 0078 A368 ldr r3, [r4, #8]
- 6415 007a 23F08003 bic r3, r3, #128
- 6416 007e A360 str r3, [r4, #8]
- 6417 .LVL603:
- 6418 .loc 5 3237 3 is_stmt 0 view .LVU1983
- ARM GAS /tmp/ccLSPxIe.s page 356
+ 2007 .loc 5 3235 22 view .LVU679
+ 2008 .LBB215:
+ 2009 .loc 5 3237 3 view .LVU680
+ 2010 0078 A368 ldr r3, [r4, #8]
+ 2011 007a 23F08003 bic r3, r3, #128
+ 2012 007e A360 str r3, [r4, #8]
+ 2013 .LVL101:
+ 2014 .loc 5 3237 3 is_stmt 0 view .LVU681
+ 2015 .LBE215:
+ 2016 .LBE214:
+ 695:Src/main.c ****
+ 2017 .loc 1 695 1 view .LVU682
+ ARM GAS /tmp/ccDGOsZt.s page 200
- 6419 .LBE546:
- 6420 .LBE545:
-1757:Src/main.c ****
- 6421 .loc 1 1757 1 view .LVU1984
- 6422 0080 06B0 add sp, sp, #24
- 6423 .LCFI63:
- 6424 .cfi_def_cfa_offset 8
- 6425 @ sp needed
- 6426 0082 10BD pop {r4, pc}
- 6427 .L369:
- 6428 .align 2
- 6429 .L368:
- 6430 0084 00380240 .word 1073887232
- 6431 0088 00ED00E0 .word -536810240
- 6432 008c 00E100E0 .word -536813312
- 6433 0090 000C0040 .word 1073744896
- 6434 0094 F8BFFEFF .word -81928
- 6435 .cfi_endproc
- 6436 .LFE1197:
- 6438 .section .text.MX_TIM7_Init,"ax",%progbits
- 6439 .align 1
- 6440 .syntax unified
- 6441 .thumb
- 6442 .thumb_func
- 6444 MX_TIM7_Init:
- 6445 .LFB1199:
-1802:Src/main.c ****
- 6446 .loc 1 1802 1 is_stmt 1 view -0
- 6447 .cfi_startproc
- 6448 @ args = 0, pretend = 0, frame = 24
- 6449 @ frame_needed = 0, uses_anonymous_args = 0
- 6450 0000 10B5 push {r4, lr}
- 6451 .LCFI64:
- 6452 .cfi_def_cfa_offset 8
- 6453 .cfi_offset 4, -8
- 6454 .cfi_offset 14, -4
- 6455 0002 86B0 sub sp, sp, #24
- 6456 .LCFI65:
- 6457 .cfi_def_cfa_offset 32
-1808:Src/main.c ****
- 6458 .loc 1 1808 3 view .LVU1986
-1808:Src/main.c ****
- 6459 .loc 1 1808 22 is_stmt 0 view .LVU1987
- 6460 0004 0024 movs r4, #0
- 6461 0006 0194 str r4, [sp, #4]
- 6462 0008 0294 str r4, [sp, #8]
- 6463 000a 0394 str r4, [sp, #12]
- 6464 000c 0494 str r4, [sp, #16]
- 6465 000e 0594 str r4, [sp, #20]
-1811:Src/main.c ****
- 6466 .loc 1 1811 3 is_stmt 1 view .LVU1988
- 6467 .LVL604:
- 6468 .LBB547:
- 6469 .LBI547:
+ 2018 0080 06B0 add sp, sp, #24
+ 2019 .LCFI24:
+ 2020 .cfi_def_cfa_offset 8
+ 2021 @ sp needed
+ 2022 0082 10BD pop {r4, pc}
+ 2023 .L39:
+ 2024 .align 2
+ 2025 .L38:
+ 2026 0084 00380240 .word 1073887232
+ 2027 0088 00ED00E0 .word -536810240
+ 2028 008c 00E100E0 .word -536813312
+ 2029 0090 000C0040 .word 1073744896
+ 2030 0094 F8BFFEFF .word -81928
+ 2031 .cfi_endproc
+ 2032 .LFE1193:
+ 2034 .section .text.MX_TIM7_Init,"ax",%progbits
+ 2035 .align 1
+ 2036 .syntax unified
+ 2037 .thumb
+ 2038 .thumb_func
+ 2040 MX_TIM7_Init:
+ 2041 .LFB1195:
+ 740:Src/main.c ****
+ 2042 .loc 1 740 1 is_stmt 1 view -0
+ 2043 .cfi_startproc
+ 2044 @ args = 0, pretend = 0, frame = 24
+ 2045 @ frame_needed = 0, uses_anonymous_args = 0
+ 2046 0000 10B5 push {r4, lr}
+ 2047 .LCFI25:
+ 2048 .cfi_def_cfa_offset 8
+ 2049 .cfi_offset 4, -8
+ 2050 .cfi_offset 14, -4
+ 2051 0002 86B0 sub sp, sp, #24
+ 2052 .LCFI26:
+ 2053 .cfi_def_cfa_offset 32
+ 746:Src/main.c ****
+ 2054 .loc 1 746 3 view .LVU684
+ 746:Src/main.c ****
+ 2055 .loc 1 746 22 is_stmt 0 view .LVU685
+ 2056 0004 0024 movs r4, #0
+ 2057 0006 0194 str r4, [sp, #4]
+ 2058 0008 0294 str r4, [sp, #8]
+ 2059 000a 0394 str r4, [sp, #12]
+ 2060 000c 0494 str r4, [sp, #16]
+ 2061 000e 0594 str r4, [sp, #20]
+ 749:Src/main.c ****
+ 2062 .loc 1 749 3 is_stmt 1 view .LVU686
+ 2063 .LVL102:
+ 2064 .LBB216:
+ 2065 .LBI216:
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 6470 .loc 3 1071 22 view .LVU1989
- 6471 .LBB548:
- ARM GAS /tmp/ccLSPxIe.s page 357
-
-
+ 2066 .loc 3 1071 22 view .LVU687
+ 2067 .LBB217:
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
- 6472 .loc 3 1073 3 view .LVU1990
+ 2068 .loc 3 1073 3 view .LVU688
1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 6473 .loc 3 1074 3 view .LVU1991
- 6474 0010 1A4B ldr r3, .L372
- 6475 0012 1A6C ldr r2, [r3, #64]
- 6476 0014 42F02002 orr r2, r2, #32
- 6477 0018 1A64 str r2, [r3, #64]
+ 2069 .loc 3 1074 3 view .LVU689
+ ARM GAS /tmp/ccDGOsZt.s page 201
+
+
+ 2070 0010 1A4B ldr r3, .L42
+ 2071 0012 1A6C ldr r2, [r3, #64]
+ 2072 0014 42F02002 orr r2, r2, #32
+ 2073 0018 1A64 str r2, [r3, #64]
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6478 .loc 3 1076 3 view .LVU1992
+ 2074 .loc 3 1076 3 view .LVU690
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6479 .loc 3 1076 12 is_stmt 0 view .LVU1993
- 6480 001a 1B6C ldr r3, [r3, #64]
- 6481 001c 03F02003 and r3, r3, #32
+ 2075 .loc 3 1076 12 is_stmt 0 view .LVU691
+ 2076 001a 1B6C ldr r3, [r3, #64]
+ 2077 001c 03F02003 and r3, r3, #32
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6482 .loc 3 1076 10 view .LVU1994
- 6483 0020 0093 str r3, [sp]
+ 2078 .loc 3 1076 10 view .LVU692
+ 2079 0020 0093 str r3, [sp]
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6484 .loc 3 1077 3 is_stmt 1 view .LVU1995
- 6485 0022 009B ldr r3, [sp]
- 6486 .LVL605:
+ 2080 .loc 3 1077 3 is_stmt 1 view .LVU693
+ 2081 0022 009B ldr r3, [sp]
+ 2082 .LVL103:
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6487 .loc 3 1077 3 is_stmt 0 view .LVU1996
- 6488 .LBE548:
- 6489 .LBE547:
-1814:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
- 6490 .loc 1 1814 3 is_stmt 1 view .LVU1997
- 6491 .LBB549:
- 6492 .LBI549:
+ 2083 .loc 3 1077 3 is_stmt 0 view .LVU694
+ 2084 .LBE217:
+ 2085 .LBE216:
+ 752:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
+ 2086 .loc 1 752 3 is_stmt 1 view .LVU695
+ 2087 .LBB218:
+ 2088 .LBI218:
1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 6493 .loc 2 1884 26 view .LVU1998
- 6494 .LBB550:
+ 2089 .loc 2 1884 26 view .LVU696
+ 2090 .LBB219:
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6495 .loc 2 1886 3 view .LVU1999
+ 2091 .loc 2 1886 3 view .LVU697
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6496 .loc 2 1886 26 is_stmt 0 view .LVU2000
- 6497 0024 164B ldr r3, .L372+4
- 6498 0026 D868 ldr r0, [r3, #12]
- 6499 .LBE550:
- 6500 .LBE549:
-1814:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
- 6501 .loc 1 1814 3 discriminator 1 view .LVU2001
- 6502 0028 2246 mov r2, r4
- 6503 002a 2146 mov r1, r4
- 6504 002c C0F30220 ubfx r0, r0, #8, #3
- 6505 0030 FFF7FEFF bl NVIC_EncodePriority
- 6506 .LVL606:
- 6507 .LBB551:
- 6508 .LBI551:
+ 2092 .loc 2 1886 26 is_stmt 0 view .LVU698
+ 2093 0024 164B ldr r3, .L42+4
+ 2094 0026 D868 ldr r0, [r3, #12]
+ 2095 .LBE219:
+ 2096 .LBE218:
+ 752:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn);
+ 2097 .loc 1 752 3 discriminator 1 view .LVU699
+ 2098 0028 2246 mov r2, r4
+ 2099 002a 2146 mov r1, r4
+ 2100 002c C0F30220 ubfx r0, r0, #8, #3
+ 2101 0030 FFF7FEFF bl NVIC_EncodePriority
+ 2102 .LVL104:
+ 2103 .LBB220:
+ 2104 .LBI220:
2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 6509 .loc 2 2024 22 is_stmt 1 view .LVU2002
- 6510 .LBB552:
+ 2105 .loc 2 2024 22 is_stmt 1 view .LVU700
+ 2106 .LBB221:
2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 6511 .loc 2 2026 3 view .LVU2003
+ 2107 .loc 2 2026 3 view .LVU701
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6512 .loc 2 2028 5 view .LVU2004
+ 2108 .loc 2 2028 5 view .LVU702
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 358
+ 2109 .loc 2 2028 49 is_stmt 0 view .LVU703
+ 2110 0034 0001 lsls r0, r0, #4
+ 2111 .LVL105:
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 202
- 6513 .loc 2 2028 49 is_stmt 0 view .LVU2005
- 6514 0034 0001 lsls r0, r0, #4
- 6515 .LVL607:
+ 2112 .loc 2 2028 49 view .LVU704
+ 2113 0036 C0B2 uxtb r0, r0
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6516 .loc 2 2028 49 view .LVU2006
- 6517 0036 C0B2 uxtb r0, r0
+ 2114 .loc 2 2028 47 view .LVU705
+ 2115 0038 124B ldr r3, .L42+8
+ 2116 003a 83F83703 strb r0, [r3, #823]
+ 2117 .LVL106:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6518 .loc 2 2028 47 view .LVU2007
- 6519 0038 124B ldr r3, .L372+8
- 6520 003a 83F83703 strb r0, [r3, #823]
- 6521 .LVL608:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6522 .loc 2 2028 47 view .LVU2008
- 6523 .LBE552:
- 6524 .LBE551:
-1815:Src/main.c ****
- 6525 .loc 1 1815 3 is_stmt 1 view .LVU2009
- 6526 .LBB553:
- 6527 .LBI553:
+ 2118 .loc 2 2028 47 view .LVU706
+ 2119 .LBE221:
+ 2120 .LBE220:
+ 753:Src/main.c ****
+ 2121 .loc 1 753 3 is_stmt 1 view .LVU707
+ 2122 .LBB222:
+ 2123 .LBI222:
1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 6528 .loc 2 1896 22 view .LVU2010
- 6529 .LBB554:
+ 2124 .loc 2 1896 22 view .LVU708
+ 2125 .LBB223:
1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 6530 .loc 2 1898 3 view .LVU2011
+ 2126 .loc 2 1898 3 view .LVU709
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6531 .loc 2 1900 5 view .LVU2012
+ 2127 .loc 2 1900 5 view .LVU710
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6532 .loc 2 1900 43 is_stmt 0 view .LVU2013
- 6533 003e 4FF40002 mov r2, #8388608
- 6534 0042 5A60 str r2, [r3, #4]
- 6535 .LVL609:
+ 2128 .loc 2 1900 43 is_stmt 0 view .LVU711
+ 2129 003e 4FF40002 mov r2, #8388608
+ 2130 0042 5A60 str r2, [r3, #4]
+ 2131 .LVL107:
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6536 .loc 2 1900 43 view .LVU2014
- 6537 .LBE554:
- 6538 .LBE553:
-1820:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6539 .loc 1 1820 3 is_stmt 1 view .LVU2015
-1820:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6540 .loc 1 1820 28 is_stmt 0 view .LVU2016
- 6541 0044 40F29733 movw r3, #919
- 6542 0048 ADF80430 strh r3, [sp, #4] @ movhi
-1821:Src/main.c **** TIM_InitStruct.Autoreload = 99;
- 6543 .loc 1 1821 3 is_stmt 1 view .LVU2017
-1821:Src/main.c **** TIM_InitStruct.Autoreload = 99;
- 6544 .loc 1 1821 30 is_stmt 0 view .LVU2018
- 6545 004c 0294 str r4, [sp, #8]
-1822:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
- 6546 .loc 1 1822 3 is_stmt 1 view .LVU2019
-1822:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
- 6547 .loc 1 1822 29 is_stmt 0 view .LVU2020
- 6548 004e 6323 movs r3, #99
- 6549 0050 0393 str r3, [sp, #12]
-1823:Src/main.c **** LL_TIM_DisableARRPreload(TIM7);
- 6550 .loc 1 1823 3 is_stmt 1 view .LVU2021
- 6551 0052 0D4C ldr r4, .L372+12
- 6552 0054 01A9 add r1, sp, #4
- 6553 0056 2046 mov r0, r4
- ARM GAS /tmp/ccLSPxIe.s page 359
+ 2132 .loc 2 1900 43 view .LVU712
+ 2133 .LBE223:
+ 2134 .LBE222:
+ 758:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 2135 .loc 1 758 3 is_stmt 1 view .LVU713
+ 758:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 2136 .loc 1 758 28 is_stmt 0 view .LVU714
+ 2137 0044 40F29733 movw r3, #919
+ 2138 0048 ADF80430 strh r3, [sp, #4] @ movhi
+ 759:Src/main.c **** TIM_InitStruct.Autoreload = 99;
+ 2139 .loc 1 759 3 is_stmt 1 view .LVU715
+ 759:Src/main.c **** TIM_InitStruct.Autoreload = 99;
+ 2140 .loc 1 759 30 is_stmt 0 view .LVU716
+ 2141 004c 0294 str r4, [sp, #8]
+ 760:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
+ 2142 .loc 1 760 3 is_stmt 1 view .LVU717
+ 760:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct);
+ 2143 .loc 1 760 29 is_stmt 0 view .LVU718
+ 2144 004e 6323 movs r3, #99
+ 2145 0050 0393 str r3, [sp, #12]
+ 761:Src/main.c **** LL_TIM_DisableARRPreload(TIM7);
+ 2146 .loc 1 761 3 is_stmt 1 view .LVU719
+ 2147 0052 0D4C ldr r4, .L42+12
+ 2148 0054 01A9 add r1, sp, #4
+ 2149 0056 2046 mov r0, r4
+ 2150 0058 FFF7FEFF bl LL_TIM_Init
+ 2151 .LVL108:
+ 762:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
+ 2152 .loc 1 762 3 view .LVU720
+ ARM GAS /tmp/ccDGOsZt.s page 203
- 6554 0058 FFF7FEFF bl LL_TIM_Init
- 6555 .LVL610:
-1824:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE);
- 6556 .loc 1 1824 3 view .LVU2022
- 6557 .LBB555:
- 6558 .LBI555:
+ 2153 .LBB224:
+ 2154 .LBI224:
1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6559 .loc 5 1504 22 view .LVU2023
- 6560 .LBB556:
+ 2155 .loc 5 1504 22 view .LVU721
+ 2156 .LBB225:
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6561 .loc 5 1506 3 view .LVU2024
- 6562 005c 2368 ldr r3, [r4]
- 6563 005e 23F08003 bic r3, r3, #128
- 6564 0062 2360 str r3, [r4]
- 6565 .LVL611:
+ 2157 .loc 5 1506 3 view .LVU722
+ 2158 005c 2368 ldr r3, [r4]
+ 2159 005e 23F08003 bic r3, r3, #128
+ 2160 0062 2360 str r3, [r4]
+ 2161 .LVL109:
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6566 .loc 5 1506 3 is_stmt 0 view .LVU2025
- 6567 .LBE556:
- 6568 .LBE555:
-1825:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7);
- 6569 .loc 1 1825 3 is_stmt 1 view .LVU2026
- 6570 .LBB557:
- 6571 .LBI557:
+ 2162 .loc 5 1506 3 is_stmt 0 view .LVU723
+ 2163 .LBE225:
+ 2164 .LBE224:
+ 763:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7);
+ 2165 .loc 1 763 3 is_stmt 1 view .LVU724
+ 2166 .LBB226:
+ 2167 .LBI226:
3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6572 .loc 5 3138 22 view .LVU2027
- 6573 .LBB558:
+ 2168 .loc 5 3138 22 view .LVU725
+ 2169 .LBB227:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6574 .loc 5 3140 3 view .LVU2028
- 6575 0064 6368 ldr r3, [r4, #4]
- 6576 0066 23F07003 bic r3, r3, #112
- 6577 006a 43F01003 orr r3, r3, #16
- 6578 006e 6360 str r3, [r4, #4]
- 6579 .LVL612:
+ 2170 .loc 5 3140 3 view .LVU726
+ 2171 0064 6368 ldr r3, [r4, #4]
+ 2172 0066 23F07003 bic r3, r3, #112
+ 2173 006a 43F01003 orr r3, r3, #16
+ 2174 006e 6360 str r3, [r4, #4]
+ 2175 .LVL110:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6580 .loc 5 3140 3 is_stmt 0 view .LVU2029
- 6581 .LBE558:
- 6582 .LBE557:
-1826:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
- 6583 .loc 1 1826 3 is_stmt 1 view .LVU2030
- 6584 .LBB559:
- 6585 .LBI559:
+ 2176 .loc 5 3140 3 is_stmt 0 view .LVU727
+ 2177 .LBE227:
+ 2178 .LBE226:
+ 764:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */
+ 2179 .loc 1 764 3 is_stmt 1 view .LVU728
+ 2180 .LBB228:
+ 2181 .LBI228:
3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6586 .loc 5 3235 22 view .LVU2031
- 6587 .LBB560:
- 6588 .loc 5 3237 3 view .LVU2032
- 6589 0070 A368 ldr r3, [r4, #8]
- 6590 0072 23F08003 bic r3, r3, #128
- 6591 0076 A360 str r3, [r4, #8]
- 6592 .LVL613:
- 6593 .loc 5 3237 3 is_stmt 0 view .LVU2033
- 6594 .LBE560:
- 6595 .LBE559:
-1831:Src/main.c ****
- 6596 .loc 1 1831 1 view .LVU2034
- 6597 0078 06B0 add sp, sp, #24
- 6598 .LCFI66:
- 6599 .cfi_def_cfa_offset 8
- ARM GAS /tmp/ccLSPxIe.s page 360
+ 2182 .loc 5 3235 22 view .LVU729
+ 2183 .LBB229:
+ 2184 .loc 5 3237 3 view .LVU730
+ 2185 0070 A368 ldr r3, [r4, #8]
+ 2186 0072 23F08003 bic r3, r3, #128
+ 2187 0076 A360 str r3, [r4, #8]
+ 2188 .LVL111:
+ 2189 .loc 5 3237 3 is_stmt 0 view .LVU731
+ 2190 .LBE229:
+ 2191 .LBE228:
+ 769:Src/main.c ****
+ 2192 .loc 1 769 1 view .LVU732
+ 2193 0078 06B0 add sp, sp, #24
+ 2194 .LCFI27:
+ 2195 .cfi_def_cfa_offset 8
+ 2196 @ sp needed
+ 2197 007a 10BD pop {r4, pc}
+ 2198 .L43:
+ 2199 .align 2
+ ARM GAS /tmp/ccDGOsZt.s page 204
- 6600 @ sp needed
- 6601 007a 10BD pop {r4, pc}
- 6602 .L373:
- 6603 .align 2
- 6604 .L372:
- 6605 007c 00380240 .word 1073887232
- 6606 0080 00ED00E0 .word -536810240
- 6607 0084 00E100E0 .word -536813312
- 6608 0088 00140040 .word 1073746944
- 6609 .cfi_endproc
- 6610 .LFE1199:
- 6612 .section .text.MX_TIM6_Init,"ax",%progbits
- 6613 .align 1
- 6614 .syntax unified
- 6615 .thumb
- 6616 .thumb_func
- 6618 MX_TIM6_Init:
- 6619 .LFB1198:
-1765:Src/main.c ****
- 6620 .loc 1 1765 1 is_stmt 1 view -0
- 6621 .cfi_startproc
- 6622 @ args = 0, pretend = 0, frame = 24
- 6623 @ frame_needed = 0, uses_anonymous_args = 0
- 6624 0000 10B5 push {r4, lr}
- 6625 .LCFI67:
- 6626 .cfi_def_cfa_offset 8
- 6627 .cfi_offset 4, -8
- 6628 .cfi_offset 14, -4
- 6629 0002 86B0 sub sp, sp, #24
- 6630 .LCFI68:
- 6631 .cfi_def_cfa_offset 32
-1771:Src/main.c ****
- 6632 .loc 1 1771 3 view .LVU2036
-1771:Src/main.c ****
- 6633 .loc 1 1771 22 is_stmt 0 view .LVU2037
- 6634 0004 0024 movs r4, #0
- 6635 0006 0194 str r4, [sp, #4]
- 6636 0008 0294 str r4, [sp, #8]
- 6637 000a 0394 str r4, [sp, #12]
- 6638 000c 0494 str r4, [sp, #16]
- 6639 000e 0594 str r4, [sp, #20]
-1774:Src/main.c ****
- 6640 .loc 1 1774 3 is_stmt 1 view .LVU2038
- 6641 .LVL614:
- 6642 .LBB561:
- 6643 .LBI561:
+ 2200 .L42:
+ 2201 007c 00380240 .word 1073887232
+ 2202 0080 00ED00E0 .word -536810240
+ 2203 0084 00E100E0 .word -536813312
+ 2204 0088 00140040 .word 1073746944
+ 2205 .cfi_endproc
+ 2206 .LFE1195:
+ 2208 .section .text.MX_TIM6_Init,"ax",%progbits
+ 2209 .align 1
+ 2210 .syntax unified
+ 2211 .thumb
+ 2212 .thumb_func
+ 2214 MX_TIM6_Init:
+ 2215 .LFB1194:
+ 703:Src/main.c ****
+ 2216 .loc 1 703 1 is_stmt 1 view -0
+ 2217 .cfi_startproc
+ 2218 @ args = 0, pretend = 0, frame = 24
+ 2219 @ frame_needed = 0, uses_anonymous_args = 0
+ 2220 0000 10B5 push {r4, lr}
+ 2221 .LCFI28:
+ 2222 .cfi_def_cfa_offset 8
+ 2223 .cfi_offset 4, -8
+ 2224 .cfi_offset 14, -4
+ 2225 0002 86B0 sub sp, sp, #24
+ 2226 .LCFI29:
+ 2227 .cfi_def_cfa_offset 32
+ 709:Src/main.c ****
+ 2228 .loc 1 709 3 view .LVU734
+ 709:Src/main.c ****
+ 2229 .loc 1 709 22 is_stmt 0 view .LVU735
+ 2230 0004 0024 movs r4, #0
+ 2231 0006 0194 str r4, [sp, #4]
+ 2232 0008 0294 str r4, [sp, #8]
+ 2233 000a 0394 str r4, [sp, #12]
+ 2234 000c 0494 str r4, [sp, #16]
+ 2235 000e 0594 str r4, [sp, #20]
+ 712:Src/main.c ****
+ 2236 .loc 1 712 3 is_stmt 1 view .LVU736
+ 2237 .LVL112:
+ 2238 .LBB230:
+ 2239 .LBI230:
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 6644 .loc 3 1071 22 view .LVU2039
- 6645 .LBB562:
+ 2240 .loc 3 1071 22 view .LVU737
+ 2241 .LBB231:
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs);
- 6646 .loc 3 1073 3 view .LVU2040
+ 2242 .loc 3 1073 3 view .LVU738
1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 6647 .loc 3 1074 3 view .LVU2041
- 6648 0010 1A4B ldr r3, .L376
- 6649 0012 1A6C ldr r2, [r3, #64]
- 6650 0014 42F01002 orr r2, r2, #16
- 6651 0018 1A64 str r2, [r3, #64]
- ARM GAS /tmp/ccLSPxIe.s page 361
+ 2243 .loc 3 1074 3 view .LVU739
+ 2244 0010 1A4B ldr r3, .L46
+ 2245 0012 1A6C ldr r2, [r3, #64]
+ 2246 0014 42F01002 orr r2, r2, #16
+ 2247 0018 1A64 str r2, [r3, #64]
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2248 .loc 3 1076 3 view .LVU740
+1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2249 .loc 3 1076 12 is_stmt 0 view .LVU741
+ ARM GAS /tmp/ccDGOsZt.s page 205
+ 2250 001a 1B6C ldr r3, [r3, #64]
+ 2251 001c 03F01003 and r3, r3, #16
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6652 .loc 3 1076 3 view .LVU2042
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6653 .loc 3 1076 12 is_stmt 0 view .LVU2043
- 6654 001a 1B6C ldr r3, [r3, #64]
- 6655 001c 03F01003 and r3, r3, #16
-1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 6656 .loc 3 1076 10 view .LVU2044
- 6657 0020 0093 str r3, [sp]
+ 2252 .loc 3 1076 10 view .LVU742
+ 2253 0020 0093 str r3, [sp]
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6658 .loc 3 1077 3 is_stmt 1 view .LVU2045
- 6659 0022 009B ldr r3, [sp]
- 6660 .LVL615:
+ 2254 .loc 3 1077 3 is_stmt 1 view .LVU743
+ 2255 0022 009B ldr r3, [sp]
+ 2256 .LVL113:
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 6661 .loc 3 1077 3 is_stmt 0 view .LVU2046
- 6662 .LBE562:
- 6663 .LBE561:
-1777:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 6664 .loc 1 1777 3 is_stmt 1 view .LVU2047
- 6665 .LBB563:
- 6666 .LBI563:
+ 2257 .loc 3 1077 3 is_stmt 0 view .LVU744
+ 2258 .LBE231:
+ 2259 .LBE230:
+ 715:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 2260 .loc 1 715 3 is_stmt 1 view .LVU745
+ 2261 .LBB232:
+ 2262 .LBI232:
1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 6667 .loc 2 1884 26 view .LVU2048
- 6668 .LBB564:
+ 2263 .loc 2 1884 26 view .LVU746
+ 2264 .LBB233:
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6669 .loc 2 1886 3 view .LVU2049
+ 2265 .loc 2 1886 3 view .LVU747
1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 6670 .loc 2 1886 26 is_stmt 0 view .LVU2050
- 6671 0024 164B ldr r3, .L376+4
- 6672 0026 D868 ldr r0, [r3, #12]
- 6673 .LBE564:
- 6674 .LBE563:
-1777:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
- 6675 .loc 1 1777 3 discriminator 1 view .LVU2051
- 6676 0028 2246 mov r2, r4
- 6677 002a 2146 mov r1, r4
- 6678 002c C0F30220 ubfx r0, r0, #8, #3
- 6679 0030 FFF7FEFF bl NVIC_EncodePriority
- 6680 .LVL616:
- 6681 .LBB565:
- 6682 .LBI565:
+ 2266 .loc 2 1886 26 is_stmt 0 view .LVU748
+ 2267 0024 164B ldr r3, .L46+4
+ 2268 0026 D868 ldr r0, [r3, #12]
+ 2269 .LBE233:
+ 2270 .LBE232:
+ 715:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn);
+ 2271 .loc 1 715 3 discriminator 1 view .LVU749
+ 2272 0028 2246 mov r2, r4
+ 2273 002a 2146 mov r1, r4
+ 2274 002c C0F30220 ubfx r0, r0, #8, #3
+ 2275 0030 FFF7FEFF bl NVIC_EncodePriority
+ 2276 .LVL114:
+ 2277 .LBB234:
+ 2278 .LBI234:
2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 6683 .loc 2 2024 22 is_stmt 1 view .LVU2052
- 6684 .LBB566:
+ 2279 .loc 2 2024 22 is_stmt 1 view .LVU750
+ 2280 .LBB235:
2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 6685 .loc 2 2026 3 view .LVU2053
+ 2281 .loc 2 2026 3 view .LVU751
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6686 .loc 2 2028 5 view .LVU2054
+ 2282 .loc 2 2028 5 view .LVU752
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6687 .loc 2 2028 49 is_stmt 0 view .LVU2055
- 6688 0034 0001 lsls r0, r0, #4
- 6689 .LVL617:
+ 2283 .loc 2 2028 49 is_stmt 0 view .LVU753
+ 2284 0034 0001 lsls r0, r0, #4
+ 2285 .LVL115:
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6690 .loc 2 2028 49 view .LVU2056
- 6691 0036 C0B2 uxtb r0, r0
+ 2286 .loc 2 2028 49 view .LVU754
+ 2287 0036 C0B2 uxtb r0, r0
2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6692 .loc 2 2028 47 view .LVU2057
- ARM GAS /tmp/ccLSPxIe.s page 362
+ 2288 .loc 2 2028 47 view .LVU755
+ 2289 0038 124B ldr r3, .L46+8
+ 2290 003a 83F83603 strb r0, [r3, #822]
+ 2291 .LVL116:
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 206
- 6693 0038 124B ldr r3, .L376+8
- 6694 003a 83F83603 strb r0, [r3, #822]
- 6695 .LVL618:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 6696 .loc 2 2028 47 view .LVU2058
- 6697 .LBE566:
- 6698 .LBE565:
-1778:Src/main.c ****
- 6699 .loc 1 1778 3 is_stmt 1 view .LVU2059
- 6700 .LBB567:
- 6701 .LBI567:
+ 2292 .loc 2 2028 47 view .LVU756
+ 2293 .LBE235:
+ 2294 .LBE234:
+ 716:Src/main.c ****
+ 2295 .loc 1 716 3 is_stmt 1 view .LVU757
+ 2296 .LBB236:
+ 2297 .LBI236:
1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 6702 .loc 2 1896 22 view .LVU2060
- 6703 .LBB568:
+ 2298 .loc 2 1896 22 view .LVU758
+ 2299 .LBB237:
1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 6704 .loc 2 1898 3 view .LVU2061
+ 2300 .loc 2 1898 3 view .LVU759
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6705 .loc 2 1900 5 view .LVU2062
+ 2301 .loc 2 1900 5 view .LVU760
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6706 .loc 2 1900 43 is_stmt 0 view .LVU2063
- 6707 003e 4FF48002 mov r2, #4194304
- 6708 0042 5A60 str r2, [r3, #4]
- 6709 .LVL619:
+ 2302 .loc 2 1900 43 is_stmt 0 view .LVU761
+ 2303 003e 4FF48002 mov r2, #4194304
+ 2304 0042 5A60 str r2, [r3, #4]
+ 2305 .LVL117:
1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 6710 .loc 2 1900 43 view .LVU2064
- 6711 .LBE568:
- 6712 .LBE567:
-1783:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6713 .loc 1 1783 3 is_stmt 1 view .LVU2065
-1783:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
- 6714 .loc 1 1783 28 is_stmt 0 view .LVU2066
- 6715 0044 4BF2AF33 movw r3, #45999
- 6716 0048 ADF80430 strh r3, [sp, #4] @ movhi
-1784:Src/main.c **** TIM_InitStruct.Autoreload = 19;
- 6717 .loc 1 1784 3 is_stmt 1 view .LVU2067
-1784:Src/main.c **** TIM_InitStruct.Autoreload = 19;
- 6718 .loc 1 1784 30 is_stmt 0 view .LVU2068
- 6719 004c 0294 str r4, [sp, #8]
-1785:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
- 6720 .loc 1 1785 3 is_stmt 1 view .LVU2069
-1785:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
- 6721 .loc 1 1785 29 is_stmt 0 view .LVU2070
- 6722 004e 1323 movs r3, #19
- 6723 0050 0393 str r3, [sp, #12]
-1786:Src/main.c **** LL_TIM_DisableARRPreload(TIM6);
- 6724 .loc 1 1786 3 is_stmt 1 view .LVU2071
- 6725 0052 0D4C ldr r4, .L376+12
- 6726 0054 01A9 add r1, sp, #4
- 6727 0056 2046 mov r0, r4
- 6728 0058 FFF7FEFF bl LL_TIM_Init
- 6729 .LVL620:
-1787:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
- 6730 .loc 1 1787 3 view .LVU2072
- 6731 .LBB569:
- 6732 .LBI569:
+ 2306 .loc 2 1900 43 view .LVU762
+ 2307 .LBE237:
+ 2308 .LBE236:
+ 721:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 2309 .loc 1 721 3 is_stmt 1 view .LVU763
+ 721:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP;
+ 2310 .loc 1 721 28 is_stmt 0 view .LVU764
+ 2311 0044 4BF2AF33 movw r3, #45999
+ 2312 0048 ADF80430 strh r3, [sp, #4] @ movhi
+ 722:Src/main.c **** TIM_InitStruct.Autoreload = 19;
+ 2313 .loc 1 722 3 is_stmt 1 view .LVU765
+ 722:Src/main.c **** TIM_InitStruct.Autoreload = 19;
+ 2314 .loc 1 722 30 is_stmt 0 view .LVU766
+ 2315 004c 0294 str r4, [sp, #8]
+ 723:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
+ 2316 .loc 1 723 3 is_stmt 1 view .LVU767
+ 723:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct);
+ 2317 .loc 1 723 29 is_stmt 0 view .LVU768
+ 2318 004e 1323 movs r3, #19
+ 2319 0050 0393 str r3, [sp, #12]
+ 724:Src/main.c **** LL_TIM_DisableARRPreload(TIM6);
+ 2320 .loc 1 724 3 is_stmt 1 view .LVU769
+ 2321 0052 0D4C ldr r4, .L46+12
+ 2322 0054 01A9 add r1, sp, #4
+ 2323 0056 2046 mov r0, r4
+ 2324 0058 FFF7FEFF bl LL_TIM_Init
+ 2325 .LVL118:
+ 725:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE);
+ 2326 .loc 1 725 3 view .LVU770
+ 2327 .LBB238:
+ 2328 .LBI238:
1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6733 .loc 5 1504 22 view .LVU2073
- ARM GAS /tmp/ccLSPxIe.s page 363
+ 2329 .loc 5 1504 22 view .LVU771
+ 2330 .LBB239:
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 2331 .loc 5 1506 3 view .LVU772
+ 2332 005c 2368 ldr r3, [r4]
+ ARM GAS /tmp/ccDGOsZt.s page 207
- 6734 .LBB570:
+ 2333 005e 23F08003 bic r3, r3, #128
+ 2334 0062 2360 str r3, [r4]
+ 2335 .LVL119:
1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6735 .loc 5 1506 3 view .LVU2074
- 6736 005c 2368 ldr r3, [r4]
- 6737 005e 23F08003 bic r3, r3, #128
- 6738 0062 2360 str r3, [r4]
- 6739 .LVL621:
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6740 .loc 5 1506 3 is_stmt 0 view .LVU2075
- 6741 .LBE570:
- 6742 .LBE569:
-1788:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6);
- 6743 .loc 1 1788 3 is_stmt 1 view .LVU2076
- 6744 .LBB571:
- 6745 .LBI571:
+ 2336 .loc 5 1506 3 is_stmt 0 view .LVU773
+ 2337 .LBE239:
+ 2338 .LBE238:
+ 726:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6);
+ 2339 .loc 1 726 3 is_stmt 1 view .LVU774
+ 2340 .LBB240:
+ 2341 .LBI240:
3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6746 .loc 5 3138 22 view .LVU2077
- 6747 .LBB572:
+ 2342 .loc 5 3138 22 view .LVU775
+ 2343 .LBB241:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6748 .loc 5 3140 3 view .LVU2078
- 6749 0064 6368 ldr r3, [r4, #4]
- 6750 0066 23F07003 bic r3, r3, #112
- 6751 006a 43F01003 orr r3, r3, #16
- 6752 006e 6360 str r3, [r4, #4]
- 6753 .LVL622:
+ 2344 .loc 5 3140 3 view .LVU776
+ 2345 0064 6368 ldr r3, [r4, #4]
+ 2346 0066 23F07003 bic r3, r3, #112
+ 2347 006a 43F01003 orr r3, r3, #16
+ 2348 006e 6360 str r3, [r4, #4]
+ 2349 .LVL120:
3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 6754 .loc 5 3140 3 is_stmt 0 view .LVU2079
- 6755 .LBE572:
- 6756 .LBE571:
-1789:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
- 6757 .loc 1 1789 3 is_stmt 1 view .LVU2080
- 6758 .LBB573:
- 6759 .LBI573:
+ 2350 .loc 5 3140 3 is_stmt 0 view .LVU777
+ 2351 .LBE241:
+ 2352 .LBE240:
+ 727:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */
+ 2353 .loc 1 727 3 is_stmt 1 view .LVU778
+ 2354 .LBB242:
+ 2355 .LBI242:
3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6760 .loc 5 3235 22 view .LVU2081
- 6761 .LBB574:
- 6762 .loc 5 3237 3 view .LVU2082
- 6763 0070 A368 ldr r3, [r4, #8]
- 6764 0072 23F08003 bic r3, r3, #128
- 6765 0076 A360 str r3, [r4, #8]
- 6766 .LVL623:
- 6767 .loc 5 3237 3 is_stmt 0 view .LVU2083
- 6768 .LBE574:
- 6769 .LBE573:
-1794:Src/main.c ****
- 6770 .loc 1 1794 1 view .LVU2084
- 6771 0078 06B0 add sp, sp, #24
- 6772 .LCFI69:
- 6773 .cfi_def_cfa_offset 8
- 6774 @ sp needed
- 6775 007a 10BD pop {r4, pc}
- 6776 .L377:
- 6777 .align 2
- 6778 .L376:
- 6779 007c 00380240 .word 1073887232
- 6780 0080 00ED00E0 .word -536810240
- 6781 0084 00E100E0 .word -536813312
- ARM GAS /tmp/ccLSPxIe.s page 364
+ 2356 .loc 5 3235 22 view .LVU779
+ 2357 .LBB243:
+ 2358 .loc 5 3237 3 view .LVU780
+ 2359 0070 A368 ldr r3, [r4, #8]
+ 2360 0072 23F08003 bic r3, r3, #128
+ 2361 0076 A360 str r3, [r4, #8]
+ 2362 .LVL121:
+ 2363 .loc 5 3237 3 is_stmt 0 view .LVU781
+ 2364 .LBE243:
+ 2365 .LBE242:
+ 732:Src/main.c ****
+ 2366 .loc 1 732 1 view .LVU782
+ 2367 0078 06B0 add sp, sp, #24
+ 2368 .LCFI30:
+ 2369 .cfi_def_cfa_offset 8
+ 2370 @ sp needed
+ 2371 007a 10BD pop {r4, pc}
+ 2372 .L47:
+ 2373 .align 2
+ 2374 .L46:
+ 2375 007c 00380240 .word 1073887232
+ 2376 0080 00ED00E0 .word -536810240
+ 2377 0084 00E100E0 .word -536813312
+ 2378 0088 00100040 .word 1073745920
+ 2379 .cfi_endproc
+ 2380 .LFE1194:
+ 2382 .section .text.Error_Handler,"ax",%progbits
+ ARM GAS /tmp/ccDGOsZt.s page 208
- 6782 0088 00100040 .word 1073745920
- 6783 .cfi_endproc
- 6784 .LFE1198:
- 6786 .section .rodata.Init_params.str1.4,"aMS",%progbits,1
- 6787 .align 2
- 6788 .LC0:
- 6789 0000 2F00 .ascii "/\000"
- 6790 0002 0000 .align 2
- 6791 .LC1:
- 6792 0004 434F4D4D .ascii "COMMAND.TXT\000"
- 6792 414E442E
- 6792 54585400
- 6793 .section .text.Init_params,"ax",%progbits
- 6794 .align 1
- 6795 .syntax unified
- 6796 .thumb
- 6797 .thumb_func
- 6799 Init_params:
- 6800 .LFB1208:
-2341:Src/main.c **** TO6 = 0;
- 6801 .loc 1 2341 1 is_stmt 1 view -0
- 6802 .cfi_startproc
- 6803 @ args = 0, pretend = 0, frame = 0
- 6804 @ frame_needed = 0, uses_anonymous_args = 0
- 6805 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr}
- 6806 .LCFI70:
- 6807 .cfi_def_cfa_offset 32
- 6808 .cfi_offset 3, -32
- 6809 .cfi_offset 4, -28
- 6810 .cfi_offset 5, -24
- 6811 .cfi_offset 6, -20
- 6812 .cfi_offset 7, -16
- 6813 .cfi_offset 8, -12
- 6814 .cfi_offset 9, -8
- 6815 .cfi_offset 14, -4
-2342:Src/main.c **** TO7 = 0;
- 6816 .loc 1 2342 2 view .LVU2086
-2342:Src/main.c **** TO7 = 0;
- 6817 .loc 1 2342 6 is_stmt 0 view .LVU2087
- 6818 0004 0023 movs r3, #0
- 6819 0006 A34A ldr r2, .L390
- 6820 0008 1360 str r3, [r2]
-2343:Src/main.c **** TO7_before = 0;
- 6821 .loc 1 2343 2 is_stmt 1 view .LVU2088
-2343:Src/main.c **** TO7_before = 0;
- 6822 .loc 1 2343 6 is_stmt 0 view .LVU2089
- 6823 000a A34A ldr r2, .L390+4
- 6824 000c 1360 str r3, [r2]
-2344:Src/main.c **** TO6_before = 0;
- 6825 .loc 1 2344 2 is_stmt 1 view .LVU2090
-2344:Src/main.c **** TO6_before = 0;
- 6826 .loc 1 2344 13 is_stmt 0 view .LVU2091
- 6827 000e A34A ldr r2, .L390+8
- 6828 0010 1360 str r3, [r2]
-2345:Src/main.c **** TO6_uart = 0;
- 6829 .loc 1 2345 2 is_stmt 1 view .LVU2092
-2345:Src/main.c **** TO6_uart = 0;
- ARM GAS /tmp/ccLSPxIe.s page 365
+ 2383 .align 1
+ 2384 .global Error_Handler
+ 2385 .syntax unified
+ 2386 .thumb
+ 2387 .thumb_func
+ 2389 Error_Handler:
+ 2390 .LFB1201:
+1145:Src/main.c ****
+1146:Src/main.c **** /* USER CODE BEGIN 4 */
+1147:Src/main.c **** /* Application logic lives in App/. This file intentionally stays thin. */
+1148:Src/main.c **** /* USER CODE END 4 */
+1149:Src/main.c ****
+1150:Src/main.c **** /**
+1151:Src/main.c **** * @brief This function is executed in case of error occurrence.
+1152:Src/main.c **** * @retval None
+1153:Src/main.c **** */
+1154:Src/main.c **** void Error_Handler(void)
+1155:Src/main.c **** {
+ 2391 .loc 1 1155 1 is_stmt 1 view -0
+ 2392 .cfi_startproc
+ 2393 @ Volatile: function does not return.
+ 2394 @ args = 0, pretend = 0, frame = 0
+ 2395 @ frame_needed = 0, uses_anonymous_args = 0
+ 2396 @ link register save eliminated.
+1156:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
+1157:Src/main.c **** /* User can add his own implementation to report the HAL error return state */
+1158:Src/main.c **** __disable_irq();
+ 2397 .loc 1 1158 3 view .LVU784
+ 2398 .LBB244:
+ 2399 .LBI244:
+ 2400 .file 6 "Drivers/CMSIS/Include/cmsis_gcc.h"
+ 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
+ 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
+ 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
+ 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
+ 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
+ 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
+ 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
+ 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ 9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
+ 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
+ 11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
+ 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
+ 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
+ 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
+ 15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
+ 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
+ 17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
+ 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
+ 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
+ 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
+ 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ 24:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
+ 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
+ ARM GAS /tmp/ccDGOsZt.s page 209
- 6830 .loc 1 2345 13 is_stmt 0 view .LVU2093
- 6831 0012 A34A ldr r2, .L390+12
- 6832 0014 1360 str r3, [r2]
-2346:Src/main.c **** flg_tmt = 0;
- 6833 .loc 1 2346 2 is_stmt 1 view .LVU2094
-2346:Src/main.c **** flg_tmt = 0;
- 6834 .loc 1 2346 11 is_stmt 0 view .LVU2095
- 6835 0016 A34A ldr r2, .L390+16
- 6836 0018 1360 str r3, [r2]
-2347:Src/main.c **** UART_rec_incr = 0;
- 6837 .loc 1 2347 2 is_stmt 1 view .LVU2096
-2347:Src/main.c **** UART_rec_incr = 0;
- 6838 .loc 1 2347 10 is_stmt 0 view .LVU2097
- 6839 001a A34A ldr r2, .L390+20
- 6840 001c 1370 strb r3, [r2]
-2348:Src/main.c **** fgoto = 0;
- 6841 .loc 1 2348 2 is_stmt 1 view .LVU2098
-2348:Src/main.c **** fgoto = 0;
- 6842 .loc 1 2348 16 is_stmt 0 view .LVU2099
- 6843 001e A34A ldr r2, .L390+24
- 6844 0020 1380 strh r3, [r2] @ movhi
-2349:Src/main.c **** sizeoffile = 0;
- 6845 .loc 1 2349 2 is_stmt 1 view .LVU2100
-2349:Src/main.c **** sizeoffile = 0;
- 6846 .loc 1 2349 8 is_stmt 0 view .LVU2101
- 6847 0022 A34A ldr r2, .L390+28
- 6848 0024 1360 str r3, [r2]
-2350:Src/main.c **** u_tx_flg = 0;
- 6849 .loc 1 2350 2 is_stmt 1 view .LVU2102
-2350:Src/main.c **** u_tx_flg = 0;
- 6850 .loc 1 2350 13 is_stmt 0 view .LVU2103
- 6851 0026 A34A ldr r2, .L390+32
- 6852 0028 1360 str r3, [r2]
-2351:Src/main.c **** u_rx_flg = 0;
- 6853 .loc 1 2351 2 is_stmt 1 view .LVU2104
-2351:Src/main.c **** u_rx_flg = 0;
- 6854 .loc 1 2351 11 is_stmt 0 view .LVU2105
- 6855 002a A34A ldr r2, .L390+36
- 6856 002c 1370 strb r3, [r2]
-2352:Src/main.c **** //State_Data[0]=0;
- 6857 .loc 1 2352 2 is_stmt 1 view .LVU2106
-2352:Src/main.c **** //State_Data[0]=0;
- 6858 .loc 1 2352 11 is_stmt 0 view .LVU2107
- 6859 002e A34A ldr r2, .L390+40
- 6860 0030 1370 strb r3, [r2]
-2355:Src/main.c **** {
- 6861 .loc 1 2355 2 is_stmt 1 view .LVU2108
- 6862 .LBB575:
-2355:Src/main.c **** {
- 6863 .loc 1 2355 7 view .LVU2109
- 6864 .LVL624:
-2355:Src/main.c **** {
- 6865 .loc 1 2355 2 is_stmt 0 view .LVU2110
- 6866 0032 05E0 b .L379
- 6867 .LVL625:
- 6868 .L380:
-2357:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 366
+ 27:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
+ 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
+ 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
+ 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
+ 33:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
+ 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
+ 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
+ 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 38:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
+ 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
+ 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
+ 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
+ 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
+ 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
+ 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
+ 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
+ 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
+ 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
+ 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
+ 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
+ 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
+ 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
+ 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
+ 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
+ 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
+ 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
+ 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
+ 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
+ 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
+ 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
+ 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
+ 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
+ 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+ 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
+ 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
+ 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
+ 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
+ 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
+ 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+ 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
+ ARM GAS /tmp/ccDGOsZt.s page 210
- 6869 .loc 1 2357 3 is_stmt 1 view .LVU2111
-2357:Src/main.c **** }
- 6870 .loc 1 2357 16 is_stmt 0 view .LVU2112
- 6871 0034 A24A ldr r2, .L390+44
- 6872 0036 0021 movs r1, #0
- 6873 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi
-2355:Src/main.c **** {
- 6874 .loc 1 2355 31 is_stmt 1 discriminator 3 view .LVU2113
- 6875 003c 0133 adds r3, r3, #1
- 6876 .LVL626:
-2355:Src/main.c **** {
- 6877 .loc 1 2355 31 is_stmt 0 discriminator 3 view .LVU2114
- 6878 003e 9BB2 uxth r3, r3
- 6879 .LVL627:
- 6880 .L379:
-2355:Src/main.c **** {
- 6881 .loc 1 2355 22 is_stmt 1 discriminator 1 view .LVU2115
- 6882 0040 0E2B cmp r3, #14
- 6883 0042 F7D9 bls .L380
- 6884 .LBE575:
-2359:Src/main.c ****
- 6885 .loc 1 2359 2 view .LVU2116
-2359:Src/main.c ****
- 6886 .loc 1 2359 14 is_stmt 0 view .LVU2117
- 6887 0044 9E4B ldr r3, .L390+44
- 6888 .LVL628:
-2359:Src/main.c ****
- 6889 .loc 1 2359 14 view .LVU2118
- 6890 0046 41F21112 movw r2, #4369
- 6891 004a 1A80 strh r2, [r3] @ movhi
-2362:Src/main.c **** Def_setup.LD1_EN = 0;
- 6892 .loc 1 2362 2 is_stmt 1 view .LVU2119
-2362:Src/main.c **** Def_setup.LD1_EN = 0;
- 6893 .loc 1 2362 21 is_stmt 0 view .LVU2120
- 6894 004c 9D4B ldr r3, .L390+48
- 6895 004e 0022 movs r2, #0
- 6896 0050 DA81 strh r2, [r3, #14] @ movhi
-2363:Src/main.c **** Def_setup.LD2_EN = 0;
- 6897 .loc 1 2363 2 is_stmt 1 view .LVU2121
-2363:Src/main.c **** Def_setup.LD2_EN = 0;
- 6898 .loc 1 2363 19 is_stmt 0 view .LVU2122
- 6899 0052 DA70 strb r2, [r3, #3]
-2364:Src/main.c **** Def_setup.MES_ID = 0;
- 6900 .loc 1 2364 2 is_stmt 1 view .LVU2123
-2364:Src/main.c **** Def_setup.MES_ID = 0;
- 6901 .loc 1 2364 19 is_stmt 0 view .LVU2124
- 6902 0054 1A71 strb r2, [r3, #4]
-2365:Src/main.c **** Def_setup.PI1_RD = 0;
- 6903 .loc 1 2365 2 is_stmt 1 view .LVU2125
-2365:Src/main.c **** Def_setup.PI1_RD = 0;
- 6904 .loc 1 2365 19 is_stmt 0 view .LVU2126
- 6905 0056 1A82 strh r2, [r3, #16] @ movhi
-2366:Src/main.c **** Def_setup.PI2_RD = 0;
- 6906 .loc 1 2366 2 is_stmt 1 view .LVU2127
-2366:Src/main.c **** Def_setup.PI2_RD = 0;
- 6907 .loc 1 2366 19 is_stmt 0 view .LVU2128
- 6908 0058 1A73 strb r2, [r3, #12]
- ARM GAS /tmp/ccLSPxIe.s page 367
+ 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
+ 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
+ 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
+ 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
+ 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+ 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
+ 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
+ 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
+ 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
+ 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
+ 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+ 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
+ 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
+ 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
+ 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
+ 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
+ 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
+ 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+ 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
+ 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
+ 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
+ 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
+ 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
+ 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
+ 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
+ 116:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 117:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
+ 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
+ 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+ 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
+ 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ 123:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
+ 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+ 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
+ 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
+ 130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
+ 132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ 133:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 134:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
+ 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+ 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
+ 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
+ ARM GAS /tmp/ccDGOsZt.s page 211
-2367:Src/main.c **** Def_setup.REF1_EN = 0;
- 6909 .loc 1 2367 2 is_stmt 1 view .LVU2129
-2367:Src/main.c **** Def_setup.REF1_EN = 0;
- 6910 .loc 1 2367 19 is_stmt 0 view .LVU2130
- 6911 005a 5A73 strb r2, [r3, #13]
-2368:Src/main.c **** Def_setup.REF2_EN = 0;
- 6912 .loc 1 2368 2 is_stmt 1 view .LVU2131
-2368:Src/main.c **** Def_setup.REF2_EN = 0;
- 6913 .loc 1 2368 20 is_stmt 0 view .LVU2132
- 6914 005c 5A71 strb r2, [r3, #5]
-2369:Src/main.c **** Def_setup.SD_EN = 0;
- 6915 .loc 1 2369 2 is_stmt 1 view .LVU2133
-2369:Src/main.c **** Def_setup.SD_EN = 0;
- 6916 .loc 1 2369 20 is_stmt 0 view .LVU2134
- 6917 005e 9A71 strb r2, [r3, #6]
-2370:Src/main.c **** Def_setup.TEC1_EN = 0;
- 6918 .loc 1 2370 2 is_stmt 1 view .LVU2135
-2370:Src/main.c **** Def_setup.TEC1_EN = 0;
- 6919 .loc 1 2370 18 is_stmt 0 view .LVU2136
- 6920 0060 DA72 strb r2, [r3, #11]
-2371:Src/main.c **** Def_setup.TEC2_EN = 0;
- 6921 .loc 1 2371 2 is_stmt 1 view .LVU2137
-2371:Src/main.c **** Def_setup.TEC2_EN = 0;
- 6922 .loc 1 2371 20 is_stmt 0 view .LVU2138
- 6923 0062 DA71 strb r2, [r3, #7]
-2372:Src/main.c **** Def_setup.TS1_EN = 0;
- 6924 .loc 1 2372 2 is_stmt 1 view .LVU2139
-2372:Src/main.c **** Def_setup.TS1_EN = 0;
- 6925 .loc 1 2372 20 is_stmt 0 view .LVU2140
- 6926 0064 1A72 strb r2, [r3, #8]
-2373:Src/main.c **** Def_setup.TS2_EN = 0;
- 6927 .loc 1 2373 2 is_stmt 1 view .LVU2141
-2373:Src/main.c **** Def_setup.TS2_EN = 0;
- 6928 .loc 1 2373 19 is_stmt 0 view .LVU2142
- 6929 0066 5A72 strb r2, [r3, #9]
-2374:Src/main.c **** Def_setup.U5V1_EN = 0;
- 6930 .loc 1 2374 2 is_stmt 1 view .LVU2143
-2374:Src/main.c **** Def_setup.U5V1_EN = 0;
- 6931 .loc 1 2374 19 is_stmt 0 view .LVU2144
- 6932 0068 9A72 strb r2, [r3, #10]
-2375:Src/main.c **** Def_setup.U5V2_EN = 0;
- 6933 .loc 1 2375 2 is_stmt 1 view .LVU2145
-2375:Src/main.c **** Def_setup.U5V2_EN = 0;
- 6934 .loc 1 2375 20 is_stmt 0 view .LVU2146
- 6935 006a 5A70 strb r2, [r3, #1]
-2376:Src/main.c **** Def_setup.WORK_EN = 0;
- 6936 .loc 1 2376 2 is_stmt 1 view .LVU2147
-2376:Src/main.c **** Def_setup.WORK_EN = 0;
- 6937 .loc 1 2376 20 is_stmt 0 view .LVU2148
- 6938 006c 9A70 strb r2, [r3, #2]
-2377:Src/main.c ****
- 6939 .loc 1 2377 2 is_stmt 1 view .LVU2149
-2377:Src/main.c ****
- 6940 .loc 1 2377 20 is_stmt 0 view .LVU2150
- 6941 006e 1A70 strb r2, [r3]
-2379:Src/main.c **** LD2_def_setup.LD_TEMP = 0;
- 6942 .loc 1 2379 2 is_stmt 1 view .LVU2151
- ARM GAS /tmp/ccLSPxIe.s page 368
+ 2401 .loc 6 140 27 view .LVU785
+ 2402 .LBB245:
+ 141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
+ 2403 .loc 6 142 3 view .LVU786
+ 2404 .syntax unified
+ 2405 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 2406 0000 72B6 cpsid i
+ 2407 @ 0 "" 2
+ 2408 .thumb
+ 2409 .syntax unified
+ 2410 .L49:
+ 2411 .LBE245:
+ 2412 .LBE244:
+1159:Src/main.c **** while (1)
+ 2413 .loc 1 1159 3 view .LVU787
+1160:Src/main.c **** {
+1161:Src/main.c **** }
+ 2414 .loc 1 1161 3 view .LVU788
+1159:Src/main.c **** while (1)
+ 2415 .loc 1 1159 9 view .LVU789
+ 2416 0002 FEE7 b .L49
+ 2417 .cfi_endproc
+ 2418 .LFE1201:
+ 2420 .section .text.MX_ADC1_Init,"ax",%progbits
+ 2421 .align 1
+ 2422 .syntax unified
+ 2423 .thumb
+ 2424 .thumb_func
+ 2426 MX_ADC1_Init:
+ 2427 .LFB1185:
+ 196:Src/main.c ****
+ 2428 .loc 1 196 1 view -0
+ 2429 .cfi_startproc
+ 2430 @ args = 0, pretend = 0, frame = 16
+ 2431 @ frame_needed = 0, uses_anonymous_args = 0
+ 2432 0000 00B5 push {lr}
+ 2433 .LCFI31:
+ 2434 .cfi_def_cfa_offset 4
+ 2435 .cfi_offset 14, -4
+ 2436 0002 85B0 sub sp, sp, #20
+ 2437 .LCFI32:
+ 2438 .cfi_def_cfa_offset 24
+ 202:Src/main.c ****
+ 2439 .loc 1 202 3 view .LVU791
+ 202:Src/main.c ****
+ 2440 .loc 1 202 26 is_stmt 0 view .LVU792
+ 2441 0004 0023 movs r3, #0
+ 2442 0006 0093 str r3, [sp]
+ 2443 0008 0193 str r3, [sp, #4]
+ 2444 000a 0293 str r3, [sp, #8]
+ 2445 000c 0393 str r3, [sp, #12]
+ 210:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 2446 .loc 1 210 3 is_stmt 1 view .LVU793
+ 210:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 2447 .loc 1 210 18 is_stmt 0 view .LVU794
+ 2448 000e 2B48 ldr r0, .L64
+ ARM GAS /tmp/ccDGOsZt.s page 212
-2379:Src/main.c **** LD2_def_setup.LD_TEMP = 0;
- 6943 .loc 1 2379 24 is_stmt 0 view .LVU2152
- 6944 0070 954D ldr r5, .L390+52
- 6945 0072 2A80 strh r2, [r5] @ movhi
-2380:Src/main.c **** LD1_def_setup.P_coef_temp = 0;
- 6946 .loc 1 2380 2 is_stmt 1 view .LVU2153
-2380:Src/main.c **** LD1_def_setup.P_coef_temp = 0;
- 6947 .loc 1 2380 24 is_stmt 0 view .LVU2154
- 6948 0074 954C ldr r4, .L390+56
- 6949 0076 2280 strh r2, [r4] @ movhi
-2381:Src/main.c **** LD2_def_setup.P_coef_temp = 0;
- 6950 .loc 1 2381 2 is_stmt 1 view .LVU2155
-2381:Src/main.c **** LD2_def_setup.P_coef_temp = 0;
- 6951 .loc 1 2381 28 is_stmt 0 view .LVU2156
- 6952 0078 0022 movs r2, #0
- 6953 007a 6A60 str r2, [r5, #4] @ float
-2382:Src/main.c **** LD1_def_setup.I_coef_temp = 0;
- 6954 .loc 1 2382 2 is_stmt 1 view .LVU2157
-2382:Src/main.c **** LD1_def_setup.I_coef_temp = 0;
- 6955 .loc 1 2382 28 is_stmt 0 view .LVU2158
- 6956 007c 6260 str r2, [r4, #4] @ float
-2383:Src/main.c **** LD2_def_setup.I_coef_temp = 0;
- 6957 .loc 1 2383 2 is_stmt 1 view .LVU2159
-2383:Src/main.c **** LD2_def_setup.I_coef_temp = 0;
- 6958 .loc 1 2383 28 is_stmt 0 view .LVU2160
- 6959 007e AA60 str r2, [r5, #8] @ float
-2384:Src/main.c ****
- 6960 .loc 1 2384 2 is_stmt 1 view .LVU2161
-2384:Src/main.c ****
- 6961 .loc 1 2384 28 is_stmt 0 view .LVU2162
- 6962 0080 A260 str r2, [r4, #8] @ float
-2387:Src/main.c **** LD1_curr_setup = LD1_def_setup;
- 6963 .loc 1 2387 2 is_stmt 1 view .LVU2163
-2387:Src/main.c **** LD1_curr_setup = LD1_def_setup;
- 6964 .loc 1 2387 13 is_stmt 0 view .LVU2164
- 6965 0082 934E ldr r6, .L390+60
- 6966 0084 9C46 mov ip, r3
- 6967 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3}
- 6968 008a 0FC6 stmia r6!, {r0, r1, r2, r3}
- 6969 008c DCF80030 ldr r3, [ip]
- 6970 0090 3380 strh r3, [r6] @ movhi
-2388:Src/main.c **** LD2_curr_setup = LD2_def_setup;
- 6971 .loc 1 2388 2 is_stmt 1 view .LVU2165
-2388:Src/main.c **** LD2_curr_setup = LD2_def_setup;
- 6972 .loc 1 2388 17 is_stmt 0 view .LVU2166
- 6973 0092 904E ldr r6, .L390+64
- 6974 0094 95E80F00 ldm r5, {r0, r1, r2, r3}
- 6975 0098 86E80F00 stm r6, {r0, r1, r2, r3}
-2389:Src/main.c ****
- 6976 .loc 1 2389 2 is_stmt 1 view .LVU2167
-2389:Src/main.c ****
- 6977 .loc 1 2389 17 is_stmt 0 view .LVU2168
- 6978 009c 8E4D ldr r5, .L390+68
- 6979 009e 94E80F00 ldm r4, {r0, r1, r2, r3}
- 6980 00a2 85E80F00 stm r5, {r0, r1, r2, r3}
-2394:Src/main.c **** LL_TIM_EnableCounter(TIM6);
- 6981 .loc 1 2394 2 is_stmt 1 view .LVU2169
- ARM GAS /tmp/ccLSPxIe.s page 369
+ 2449 0010 2B4A ldr r2, .L64+4
+ 2450 0012 0260 str r2, [r0]
+ 211:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 2451 .loc 1 211 3 is_stmt 1 view .LVU795
+ 211:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
+ 2452 .loc 1 211 29 is_stmt 0 view .LVU796
+ 2453 0014 4FF44032 mov r2, #196608
+ 2454 0018 4260 str r2, [r0, #4]
+ 212:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+ 2455 .loc 1 212 3 is_stmt 1 view .LVU797
+ 212:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
+ 2456 .loc 1 212 25 is_stmt 0 view .LVU798
+ 2457 001a 8360 str r3, [r0, #8]
+ 213:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
+ 2458 .loc 1 213 3 is_stmt 1 view .LVU799
+ 213:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
+ 2459 .loc 1 213 27 is_stmt 0 view .LVU800
+ 2460 001c 0122 movs r2, #1
+ 2461 001e 0261 str r2, [r0, #16]
+ 214:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 2462 .loc 1 214 3 is_stmt 1 view .LVU801
+ 214:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
+ 2463 .loc 1 214 33 is_stmt 0 view .LVU802
+ 2464 0020 8361 str r3, [r0, #24]
+ 215:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 2465 .loc 1 215 3 is_stmt 1 view .LVU803
+ 215:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 2466 .loc 1 215 36 is_stmt 0 view .LVU804
+ 2467 0022 80F82030 strb r3, [r0, #32]
+ 216:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 2468 .loc 1 216 3 is_stmt 1 view .LVU805
+ 216:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 2469 .loc 1 216 35 is_stmt 0 view .LVU806
+ 2470 0026 C362 str r3, [r0, #44]
+ 217:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 2471 .loc 1 217 3 is_stmt 1 view .LVU807
+ 217:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 2472 .loc 1 217 31 is_stmt 0 view .LVU808
+ 2473 0028 2649 ldr r1, .L64+8
+ 2474 002a 8162 str r1, [r0, #40]
+ 218:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
+ 2475 .loc 1 218 3 is_stmt 1 view .LVU809
+ 218:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
+ 2476 .loc 1 218 24 is_stmt 0 view .LVU810
+ 2477 002c C360 str r3, [r0, #12]
+ 219:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
+ 2478 .loc 1 219 3 is_stmt 1 view .LVU811
+ 219:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
+ 2479 .loc 1 219 30 is_stmt 0 view .LVU812
+ 2480 002e 0521 movs r1, #5
+ 2481 0030 C161 str r1, [r0, #28]
+ 220:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 2482 .loc 1 220 3 is_stmt 1 view .LVU813
+ 220:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 2483 .loc 1 220 36 is_stmt 0 view .LVU814
+ 2484 0032 80F83030 strb r3, [r0, #48]
+ 221:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ ARM GAS /tmp/ccDGOsZt.s page 213
- 6982 .LVL629:
- 6983 .LBB576:
- 6984 .LBI576:
-3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled.
-3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
-3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
-3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
-3251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the external trigger (ETR) input.
-3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
-3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an external trigger input.
-3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ETP LL_TIM_ConfigETR\n
-3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETPS LL_TIM_ConfigETR\n
-3259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETF LL_TIM_ConfigETR
-3260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPolarity This parameter can be one of the following values:
-3262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
-3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_INVERTED
-3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPrescaler This parameter can be one of the following values:
-3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1
-3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2
-3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4
-3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8
-3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values:
-3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1
-3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
-3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
-3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
-3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
-3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
-3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
-3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
-3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
-3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
-3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
-3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
-3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
-3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
-3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
-3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
-3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale
-3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ETRFilter)
-3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler |
- ARM GAS /tmp/ccLSPxIe.s page 370
+ 2485 .loc 1 221 3 is_stmt 1 view .LVU815
+ 221:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
+ 2486 .loc 1 221 27 is_stmt 0 view .LVU816
+ 2487 0036 4261 str r2, [r0, #20]
+ 222:Src/main.c **** {
+ 2488 .loc 1 222 3 is_stmt 1 view .LVU817
+ 222:Src/main.c **** {
+ 2489 .loc 1 222 7 is_stmt 0 view .LVU818
+ 2490 0038 FFF7FEFF bl HAL_ADC_Init
+ 2491 .LVL122:
+ 222:Src/main.c **** {
+ 2492 .loc 1 222 6 discriminator 1 view .LVU819
+ 2493 003c 0028 cmp r0, #0
+ 2494 003e 31D1 bne .L58
+ 229:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 2495 .loc 1 229 3 is_stmt 1 view .LVU820
+ 229:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 2496 .loc 1 229 19 is_stmt 0 view .LVU821
+ 2497 0040 0923 movs r3, #9
+ 2498 0042 0093 str r3, [sp]
+ 230:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 2499 .loc 1 230 3 is_stmt 1 view .LVU822
+ 230:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 2500 .loc 1 230 16 is_stmt 0 view .LVU823
+ 2501 0044 0123 movs r3, #1
+ 2502 0046 0193 str r3, [sp, #4]
+ 231:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2503 .loc 1 231 3 is_stmt 1 view .LVU824
+ 231:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2504 .loc 1 231 24 is_stmt 0 view .LVU825
+ 2505 0048 0723 movs r3, #7
+ 2506 004a 0293 str r3, [sp, #8]
+ 232:Src/main.c **** {
+ 2507 .loc 1 232 3 is_stmt 1 view .LVU826
+ 232:Src/main.c **** {
+ 2508 .loc 1 232 7 is_stmt 0 view .LVU827
+ 2509 004c 6946 mov r1, sp
+ 2510 004e 1B48 ldr r0, .L64
+ 2511 0050 FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2512 .LVL123:
+ 232:Src/main.c **** {
+ 2513 .loc 1 232 6 discriminator 1 view .LVU828
+ 2514 0054 40BB cbnz r0, .L59
+ 239:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
+ 2515 .loc 1 239 3 is_stmt 1 view .LVU829
+ 239:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
+ 2516 .loc 1 239 19 is_stmt 0 view .LVU830
+ 2517 0056 0823 movs r3, #8
+ 2518 0058 0093 str r3, [sp]
+ 240:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2519 .loc 1 240 3 is_stmt 1 view .LVU831
+ 240:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2520 .loc 1 240 16 is_stmt 0 view .LVU832
+ 2521 005a 0223 movs r3, #2
+ 2522 005c 0193 str r3, [sp, #4]
+ 241:Src/main.c **** {
+ 2523 .loc 1 241 3 is_stmt 1 view .LVU833
+ ARM GAS /tmp/ccDGOsZt.s page 214
-3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration
-3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break function.
-3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_EnableBRK
-3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
-3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break function.
-3316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_DisableBRK
-3317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
-3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break input.
-3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
-3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BKF LL_TIM_ConfigBRK
-3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values:
-3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW
-3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH
-3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakFilter This parameter can be one of the following values:
-3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1
-3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
-3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
-3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
-3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
-3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
-3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
-3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
-3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
-3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
-3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
- ARM GAS /tmp/ccLSPxIe.s page 371
+ 241:Src/main.c **** {
+ 2524 .loc 1 241 7 is_stmt 0 view .LVU834
+ 2525 005e 6946 mov r1, sp
+ 2526 0060 1648 ldr r0, .L64
+ 2527 0062 FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2528 .LVL124:
+ 241:Src/main.c **** {
+ 2529 .loc 1 241 6 discriminator 1 view .LVU835
+ 2530 0066 08BB cbnz r0, .L60
+ 248:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
+ 2531 .loc 1 248 3 is_stmt 1 view .LVU836
+ 248:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
+ 2532 .loc 1 248 19 is_stmt 0 view .LVU837
+ 2533 0068 0223 movs r3, #2
+ 2534 006a 0093 str r3, [sp]
+ 249:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2535 .loc 1 249 3 is_stmt 1 view .LVU838
+ 249:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2536 .loc 1 249 16 is_stmt 0 view .LVU839
+ 2537 006c 0323 movs r3, #3
+ 2538 006e 0193 str r3, [sp, #4]
+ 250:Src/main.c **** {
+ 2539 .loc 1 250 3 is_stmt 1 view .LVU840
+ 250:Src/main.c **** {
+ 2540 .loc 1 250 7 is_stmt 0 view .LVU841
+ 2541 0070 6946 mov r1, sp
+ 2542 0072 1248 ldr r0, .L64
+ 2543 0074 FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2544 .LVL125:
+ 250:Src/main.c **** {
+ 2545 .loc 1 250 6 discriminator 1 view .LVU842
+ 2546 0078 D0B9 cbnz r0, .L61
+ 257:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
+ 2547 .loc 1 257 3 is_stmt 1 view .LVU843
+ 257:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
+ 2548 .loc 1 257 19 is_stmt 0 view .LVU844
+ 2549 007a 0A23 movs r3, #10
+ 2550 007c 0093 str r3, [sp]
+ 258:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2551 .loc 1 258 3 is_stmt 1 view .LVU845
+ 258:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2552 .loc 1 258 16 is_stmt 0 view .LVU846
+ 2553 007e 0423 movs r3, #4
+ 2554 0080 0193 str r3, [sp, #4]
+ 259:Src/main.c **** {
+ 2555 .loc 1 259 3 is_stmt 1 view .LVU847
+ 259:Src/main.c **** {
+ 2556 .loc 1 259 7 is_stmt 0 view .LVU848
+ 2557 0082 6946 mov r1, sp
+ 2558 0084 0D48 ldr r0, .L64
+ 2559 0086 FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2560 .LVL126:
+ 259:Src/main.c **** {
+ 2561 .loc 1 259 6 discriminator 1 view .LVU849
+ 2562 008a 98B9 cbnz r0, .L62
+ 266:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
+ 2563 .loc 1 266 3 is_stmt 1 view .LVU850
+ ARM GAS /tmp/ccDGOsZt.s page 215
-3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
-3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
-3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
-3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
-3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
-3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity,
-3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter)
-3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);
-3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break 2 function.
-3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_EnableBRK2
-3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
-3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-3373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break 2 function.
-3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_DisableBRK2
-3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
-3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break 2 input.
-3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
-3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BK2F LL_TIM_ConfigBRK2
-3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Polarity This parameter can be one of the following values:
-3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_LOW
-3397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
-3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Filter This parameter can be one of the following values:
-3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
-3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
-3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
-3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
-3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
-3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
-3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
- ARM GAS /tmp/ccLSPxIe.s page 372
+ 266:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
+ 2564 .loc 1 266 19 is_stmt 0 view .LVU851
+ 2565 008c 0B23 movs r3, #11
+ 2566 008e 0093 str r3, [sp]
+ 267:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2567 .loc 1 267 3 is_stmt 1 view .LVU852
+ 267:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
+ 2568 .loc 1 267 16 is_stmt 0 view .LVU853
+ 2569 0090 0523 movs r3, #5
+ 2570 0092 0193 str r3, [sp, #4]
+ 268:Src/main.c **** {
+ 2571 .loc 1 268 3 is_stmt 1 view .LVU854
+ 268:Src/main.c **** {
+ 2572 .loc 1 268 7 is_stmt 0 view .LVU855
+ 2573 0094 6946 mov r1, sp
+ 2574 0096 0948 ldr r0, .L64
+ 2575 0098 FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2576 .LVL127:
+ 268:Src/main.c **** {
+ 2577 .loc 1 268 6 discriminator 1 view .LVU856
+ 2578 009c 60B9 cbnz r0, .L63
+ 276:Src/main.c ****
+ 2579 .loc 1 276 1 view .LVU857
+ 2580 009e 05B0 add sp, sp, #20
+ 2581 .LCFI33:
+ 2582 .cfi_remember_state
+ 2583 .cfi_def_cfa_offset 4
+ 2584 @ sp needed
+ 2585 00a0 5DF804FB ldr pc, [sp], #4
+ 2586 .L58:
+ 2587 .LCFI34:
+ 2588 .cfi_restore_state
+ 224:Src/main.c **** }
+ 2589 .loc 1 224 5 is_stmt 1 view .LVU858
+ 2590 00a4 FFF7FEFF bl Error_Handler
+ 2591 .LVL128:
+ 2592 .L59:
+ 234:Src/main.c **** }
+ 2593 .loc 1 234 5 view .LVU859
+ 2594 00a8 FFF7FEFF bl Error_Handler
+ 2595 .LVL129:
+ 2596 .L60:
+ 243:Src/main.c **** }
+ 2597 .loc 1 243 5 view .LVU860
+ 2598 00ac FFF7FEFF bl Error_Handler
+ 2599 .LVL130:
+ 2600 .L61:
+ 252:Src/main.c **** }
+ 2601 .loc 1 252 5 view .LVU861
+ 2602 00b0 FFF7FEFF bl Error_Handler
+ 2603 .LVL131:
+ 2604 .L62:
+ 261:Src/main.c **** }
+ 2605 .loc 1 261 5 view .LVU862
+ 2606 00b4 FFF7FEFF bl Error_Handler
+ 2607 .LVL132:
+ 2608 .L63:
+ ARM GAS /tmp/ccDGOsZt.s page 216
-3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
-3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
-3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
-3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
-3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
-3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
-3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
-3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
-3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
-3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F
-3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);
-3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
-3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
-3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR OSSR LL_TIM_SetOffStates
-3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateIdle This parameter can be one of the following values:
-3430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_DISABLE
-3431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_ENABLE
-3432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateRun This parameter can be one of the following values:
-3433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_DISABLE
-3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_ENABLE
-3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat
-3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
-3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable automatic output (MOE can be set by software or automatically when a break input
-3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
-3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
-3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable automatic output (MOE can be set only by software).
-3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
-3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 373
+ 270:Src/main.c **** }
+ 2609 .loc 1 270 5 view .LVU863
+ 2610 00b8 FFF7FEFF bl Error_Handler
+ 2611 .LVL133:
+ 2612 .L65:
+ 2613 .align 2
+ 2614 .L64:
+ 2615 00bc 00000000 .word hadc1
+ 2616 00c0 00200140 .word 1073815552
+ 2617 00c4 0100000F .word 251658241
+ 2618 .cfi_endproc
+ 2619 .LFE1185:
+ 2621 .section .text.MX_ADC3_Init,"ax",%progbits
+ 2622 .align 1
+ 2623 .syntax unified
+ 2624 .thumb
+ 2625 .thumb_func
+ 2627 MX_ADC3_Init:
+ 2628 .LFB1186:
+ 284:Src/main.c ****
+ 2629 .loc 1 284 1 view -0
+ 2630 .cfi_startproc
+ 2631 @ args = 0, pretend = 0, frame = 16
+ 2632 @ frame_needed = 0, uses_anonymous_args = 0
+ 2633 0000 00B5 push {lr}
+ 2634 .LCFI35:
+ 2635 .cfi_def_cfa_offset 4
+ 2636 .cfi_offset 14, -4
+ 2637 0002 85B0 sub sp, sp, #20
+ 2638 .LCFI36:
+ 2639 .cfi_def_cfa_offset 24
+ 290:Src/main.c ****
+ 2640 .loc 1 290 3 view .LVU865
+ 290:Src/main.c ****
+ 2641 .loc 1 290 26 is_stmt 0 view .LVU866
+ 2642 0004 0023 movs r3, #0
+ 2643 0006 0093 str r3, [sp]
+ 2644 0008 0193 str r3, [sp, #4]
+ 2645 000a 0293 str r3, [sp, #8]
+ 2646 000c 0393 str r3, [sp, #12]
+ 298:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 2647 .loc 1 298 3 is_stmt 1 view .LVU867
+ 298:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
+ 2648 .loc 1 298 18 is_stmt 0 view .LVU868
+ 2649 000e 1448 ldr r0, .L72
+ 2650 0010 144A ldr r2, .L72+4
+ 2651 0012 0260 str r2, [r0]
+ 299:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 2652 .loc 1 299 3 is_stmt 1 view .LVU869
+ 299:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
+ 2653 .loc 1 299 29 is_stmt 0 view .LVU870
+ 2654 0014 4FF44032 mov r2, #196608
+ 2655 0018 4260 str r2, [r0, #4]
+ 300:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 2656 .loc 1 300 3 is_stmt 1 view .LVU871
+ 300:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
+ 2657 .loc 1 300 25 is_stmt 0 view .LVU872
+ ARM GAS /tmp/ccDGOsZt.s page 217
-3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
-3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled.
-3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
-3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
-3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
-3479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
-3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
-3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event
-3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
-3488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
-3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
-3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
-3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event.
-3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
-3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
-3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether outputs are enabled.
-3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
-3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccLSPxIe.s page 374
+ 2658 001a 8360 str r3, [r0, #8]
+ 301:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
+ 2659 .loc 1 301 3 is_stmt 1 view .LVU873
+ 301:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
+ 2660 .loc 1 301 27 is_stmt 0 view .LVU874
+ 2661 001c 0361 str r3, [r0, #16]
+ 302:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 2662 .loc 1 302 3 is_stmt 1 view .LVU875
+ 302:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
+ 2663 .loc 1 302 33 is_stmt 0 view .LVU876
+ 2664 001e 8361 str r3, [r0, #24]
+ 303:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 2665 .loc 1 303 3 is_stmt 1 view .LVU877
+ 303:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
+ 2666 .loc 1 303 36 is_stmt 0 view .LVU878
+ 2667 0020 80F82030 strb r3, [r0, #32]
+ 304:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 2668 .loc 1 304 3 is_stmt 1 view .LVU879
+ 304:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
+ 2669 .loc 1 304 35 is_stmt 0 view .LVU880
+ 2670 0024 C362 str r3, [r0, #44]
+ 305:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 2671 .loc 1 305 3 is_stmt 1 view .LVU881
+ 305:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+ 2672 .loc 1 305 31 is_stmt 0 view .LVU882
+ 2673 0026 104A ldr r2, .L72+8
+ 2674 0028 8262 str r2, [r0, #40]
+ 306:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
+ 2675 .loc 1 306 3 is_stmt 1 view .LVU883
+ 306:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
+ 2676 .loc 1 306 24 is_stmt 0 view .LVU884
+ 2677 002a C360 str r3, [r0, #12]
+ 307:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
+ 2678 .loc 1 307 3 is_stmt 1 view .LVU885
+ 307:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
+ 2679 .loc 1 307 30 is_stmt 0 view .LVU886
+ 2680 002c 0122 movs r2, #1
+ 2681 002e C261 str r2, [r0, #28]
+ 308:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 2682 .loc 1 308 3 is_stmt 1 view .LVU887
+ 308:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+ 2683 .loc 1 308 36 is_stmt 0 view .LVU888
+ 2684 0030 80F83030 strb r3, [r0, #48]
+ 309:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 2685 .loc 1 309 3 is_stmt 1 view .LVU889
+ 309:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
+ 2686 .loc 1 309 27 is_stmt 0 view .LVU890
+ 2687 0034 4261 str r2, [r0, #20]
+ 310:Src/main.c **** {
+ 2688 .loc 1 310 3 is_stmt 1 view .LVU891
+ 310:Src/main.c **** {
+ 2689 .loc 1 310 7 is_stmt 0 view .LVU892
+ 2690 0036 FFF7FEFF bl HAL_ADC_Init
+ 2691 .LVL134:
+ 310:Src/main.c **** {
+ 2692 .loc 1 310 6 discriminator 1 view .LVU893
+ 2693 003a 68B9 cbnz r0, .L70
+ ARM GAS /tmp/ccDGOsZt.s page 218
-3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
-3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
-3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input.
-3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_EnableBreakInputSource\n
-3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_EnableBreakInputSource\n
-3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_EnableBreakInputSource\n
-3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_EnableBreakInputSource
-3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
-3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t
-3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, Source);
-3546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the signals connected to the designated timer break input.
-3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_DisableBreakInputSource\n
-3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_DisableBreakInputSource\n
-3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_DisableBreakInputSource\n
-3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_DisableBreakInputSource
-3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
-3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_
-3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, Source);
-3569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of the break signal for the timer break input.
-3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINP LL_TIM_SetBreakInputSourcePolarity\n
-3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n
- ARM GAS /tmp/ccLSPxIe.s page 375
+ 317:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 2694 .loc 1 317 3 is_stmt 1 view .LVU894
+ 317:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
+ 2695 .loc 1 317 19 is_stmt 0 view .LVU895
+ 2696 003c 0F23 movs r3, #15
+ 2697 003e 0093 str r3, [sp]
+ 318:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 2698 .loc 1 318 3 is_stmt 1 view .LVU896
+ 318:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
+ 2699 .loc 1 318 16 is_stmt 0 view .LVU897
+ 2700 0040 0123 movs r3, #1
+ 2701 0042 0193 str r3, [sp, #4]
+ 319:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 2702 .loc 1 319 3 is_stmt 1 view .LVU898
+ 319:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
+ 2703 .loc 1 319 24 is_stmt 0 view .LVU899
+ 2704 0044 0723 movs r3, #7
+ 2705 0046 0293 str r3, [sp, #8]
+ 320:Src/main.c **** {
+ 2706 .loc 1 320 3 is_stmt 1 view .LVU900
+ 320:Src/main.c **** {
+ 2707 .loc 1 320 7 is_stmt 0 view .LVU901
+ 2708 0048 6946 mov r1, sp
+ 2709 004a 0548 ldr r0, .L72
+ 2710 004c FFF7FEFF bl HAL_ADC_ConfigChannel
+ 2711 .LVL135:
+ 320:Src/main.c **** {
+ 2712 .loc 1 320 6 discriminator 1 view .LVU902
+ 2713 0050 20B9 cbnz r0, .L71
+ 328:Src/main.c ****
+ 2714 .loc 1 328 1 view .LVU903
+ 2715 0052 05B0 add sp, sp, #20
+ 2716 .LCFI37:
+ 2717 .cfi_remember_state
+ 2718 .cfi_def_cfa_offset 4
+ 2719 @ sp needed
+ 2720 0054 5DF804FB ldr pc, [sp], #4
+ 2721 .L70:
+ 2722 .LCFI38:
+ 2723 .cfi_restore_state
+ 312:Src/main.c **** }
+ 2724 .loc 1 312 5 is_stmt 1 view .LVU904
+ 2725 0058 FFF7FEFF bl Error_Handler
+ 2726 .LVL136:
+ 2727 .L71:
+ 322:Src/main.c **** }
+ 2728 .loc 1 322 5 view .LVU905
+ 2729 005c FFF7FEFF bl Error_Handler
+ 2730 .LVL137:
+ 2731 .L73:
+ 2732 .align 2
+ 2733 .L72:
+ 2734 0060 00000000 .word hadc3
+ 2735 0064 00220140 .word 1073816064
+ 2736 0068 0100000F .word 251658241
+ 2737 .cfi_endproc
+ 2738 .LFE1186:
+ ARM GAS /tmp/ccDGOsZt.s page 219
-3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n
-3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity
-3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
-3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
-3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_LOW
-3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_HIGH
-3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin
-3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Polarity)
-3593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, (TIMx_AF1_BKINP << TIM_POSITION_BRK_SOURCE), (Polarity << TIM_POSITION_BRK_SOUR
-3596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
-3598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
-3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configures the timer DMA burst feature.
-3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
-3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * not a timer instance supports the DMA burst mode.
-3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
-3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst
-3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values:
-3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
-3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
-3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
-3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
-3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR
-3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
-3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
-3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
-3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
-3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
-3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
-3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
-3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
-3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
-3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
-3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
-3629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
-3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
-3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR
-3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
-3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
- ARM GAS /tmp/ccLSPxIe.s page 376
+ 2740 .section .text.MX_USART1_UART_Init,"ax",%progbits
+ 2741 .align 1
+ 2742 .syntax unified
+ 2743 .thumb
+ 2744 .thumb_func
+ 2746 MX_USART1_UART_Init:
+ 2747 .LFB1198:
+ 881:Src/main.c ****
+ 2748 .loc 1 881 1 view -0
+ 2749 .cfi_startproc
+ 2750 @ args = 0, pretend = 0, frame = 208
+ 2751 @ frame_needed = 0, uses_anonymous_args = 0
+ 2752 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
+ 2753 .LCFI39:
+ 2754 .cfi_def_cfa_offset 24
+ 2755 .cfi_offset 4, -24
+ 2756 .cfi_offset 5, -20
+ 2757 .cfi_offset 6, -16
+ 2758 .cfi_offset 7, -12
+ 2759 .cfi_offset 8, -8
+ 2760 .cfi_offset 14, -4
+ 2761 0004 B4B0 sub sp, sp, #208
+ 2762 .LCFI40:
+ 2763 .cfi_def_cfa_offset 232
+ 887:Src/main.c ****
+ 2764 .loc 1 887 3 view .LVU907
+ 887:Src/main.c ****
+ 2765 .loc 1 887 24 is_stmt 0 view .LVU908
+ 2766 0006 0021 movs r1, #0
+ 2767 0008 2D91 str r1, [sp, #180]
+ 2768 000a 2E91 str r1, [sp, #184]
+ 2769 000c 2F91 str r1, [sp, #188]
+ 2770 000e 3091 str r1, [sp, #192]
+ 2771 0010 3191 str r1, [sp, #196]
+ 2772 0012 3291 str r1, [sp, #200]
+ 2773 0014 3391 str r1, [sp, #204]
+ 889:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 2774 .loc 1 889 3 is_stmt 1 view .LVU909
+ 889:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+ 2775 .loc 1 889 23 is_stmt 0 view .LVU910
+ 2776 0016 2791 str r1, [sp, #156]
+ 2777 0018 2891 str r1, [sp, #160]
+ 2778 001a 2991 str r1, [sp, #164]
+ 2779 001c 2A91 str r1, [sp, #168]
+ 2780 001e 2B91 str r1, [sp, #172]
+ 2781 0020 2C91 str r1, [sp, #176]
+ 890:Src/main.c ****
+ 2782 .loc 1 890 3 is_stmt 1 view .LVU911
+ 890:Src/main.c ****
+ 2783 .loc 1 890 28 is_stmt 0 view .LVU912
+ 2784 0022 9022 movs r2, #144
+ 2785 0024 03A8 add r0, sp, #12
+ 2786 0026 FFF7FEFF bl memset
+ 2787 .LVL138:
+ 894:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ 2788 .loc 1 894 3 is_stmt 1 view .LVU913
+ 894:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+ ARM GAS /tmp/ccDGOsZt.s page 220
-3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
-3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*)
-3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF2 (*)
-3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices
-3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values:
-3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
-3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
-3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
-3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
-3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
-3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
-3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
-3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
-3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
-3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
-3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
-3650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
-3651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
-3652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
-3653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
-3654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
-3655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
-3656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
-3657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_
-3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
-3662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
-3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Remap TIM inputs (input channel, internal/external triggers).
-3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
-3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a some timer inputs can be remapped.
-3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll TIM2_OR ITR1_RMP LL_TIM_SetRemap\n
-3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5_OR TI4_RMP LL_TIM_SetRemap\n
-3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11_OR TI1_RMP LL_TIM_SetRemap
-3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Remap Remap param depends on the TIMx. Description available only
-3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in CHM version of the User Manual (not in .pdf).
-3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Otherwise see Reference Manual description of OR registers.
-3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Below description summarizes "Timer Instance" and "Remap" param combinations:
-3684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM2: one of the following values
-3686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * ITR1_RMP can be one of the following values
-3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
-3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP
-3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
- ARM GAS /tmp/ccLSPxIe.s page 377
+ 2789 .loc 1 894 44 is_stmt 0 view .LVU914
+ 2790 002a 4023 movs r3, #64
+ 2791 002c 0393 str r3, [sp, #12]
+ 895:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+ 2792 .loc 1 895 3 is_stmt 1 view .LVU915
+ 896:Src/main.c **** {
+ 2793 .loc 1 896 3 view .LVU916
+ 896:Src/main.c **** {
+ 2794 .loc 1 896 7 is_stmt 0 view .LVU917
+ 2795 002e 03A8 add r0, sp, #12
+ 2796 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
+ 2797 .LVL139:
+ 896:Src/main.c **** {
+ 2798 .loc 1 896 6 discriminator 1 view .LVU918
+ 2799 0034 0028 cmp r0, #0
+ 2800 0036 40F09E80 bne .L77
+ 902:Src/main.c ****
+ 2801 .loc 1 902 3 is_stmt 1 view .LVU919
+ 2802 .LVL140:
+ 2803 .LBB246:
+ 2804 .LBI246:
+1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 2805 .loc 3 1587 22 view .LVU920
+ 2806 .LBB247:
+1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
+ 2807 .loc 3 1589 3 view .LVU921
+1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ 2808 .loc 3 1590 3 view .LVU922
+ 2809 003a 504B ldr r3, .L78
+ 2810 003c 5A6C ldr r2, [r3, #68]
+ 2811 003e 42F01002 orr r2, r2, #16
+ 2812 0042 5A64 str r2, [r3, #68]
+1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2813 .loc 3 1592 3 view .LVU923
+1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2814 .loc 3 1592 12 is_stmt 0 view .LVU924
+ 2815 0044 5A6C ldr r2, [r3, #68]
+ 2816 0046 02F01002 and r2, r2, #16
+1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2817 .loc 3 1592 10 view .LVU925
+ 2818 004a 0292 str r2, [sp, #8]
+ 2819 .loc 3 1593 3 is_stmt 1 view .LVU926
+ 2820 004c 029A ldr r2, [sp, #8]
+ 2821 .LVL141:
+ 2822 .loc 3 1593 3 is_stmt 0 view .LVU927
+ 2823 .LBE247:
+ 2824 .LBE246:
+ 904:Src/main.c **** /**USART1 GPIO Configuration
+ 2825 .loc 1 904 3 is_stmt 1 view .LVU928
+ 2826 .LBB248:
+ 2827 .LBI248:
+ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
+ 2828 .loc 3 309 22 view .LVU929
+ 2829 .LBB249:
+ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
+ 2830 .loc 3 311 3 view .LVU930
+ 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
+ ARM GAS /tmp/ccDGOsZt.s page 221
-3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF
-3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5: one of the following values
-3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO
-3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI
-3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE
-3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC
-3699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11: one of the following values
-3701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_GPIO
-3703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_SPDIFRX
-3704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_HSE
-3705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_MCO1
-3706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
-3710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK));
-3712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
-3719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF).
-3723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
-3724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
-3728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
-3730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
-3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
-3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
-3739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
-3741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 interrupt flag (CC1F).
-3745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_ClearFlag_CC1
-3746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 378
+ 2831 .loc 3 312 3 view .LVU931
+ 2832 004e 1A6B ldr r2, [r3, #48]
+ 2833 0050 42F00102 orr r2, r2, #1
+ 2834 0054 1A63 str r2, [r3, #48]
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2835 .loc 3 314 3 view .LVU932
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2836 .loc 3 314 12 is_stmt 0 view .LVU933
+ 2837 0056 1B6B ldr r3, [r3, #48]
+ 2838 0058 03F00103 and r3, r3, #1
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
+ 2839 .loc 3 314 10 view .LVU934
+ 2840 005c 0193 str r3, [sp, #4]
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 2841 .loc 3 315 3 is_stmt 1 view .LVU935
+ 2842 005e 019B ldr r3, [sp, #4]
+ 2843 .LVL142:
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
+ 2844 .loc 3 315 3 is_stmt 0 view .LVU936
+ 2845 .LBE249:
+ 2846 .LBE248:
+ 909:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 2847 .loc 1 909 3 is_stmt 1 view .LVU937
+ 909:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 2848 .loc 1 909 23 is_stmt 0 view .LVU938
+ 2849 0060 4FF40073 mov r3, #512
+ 2850 0064 2793 str r3, [sp, #156]
+ 910:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 2851 .loc 1 910 3 is_stmt 1 view .LVU939
+ 910:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 2852 .loc 1 910 24 is_stmt 0 view .LVU940
+ 2853 0066 4FF00208 mov r8, #2
+ 2854 006a CDF8A080 str r8, [sp, #160]
+ 911:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 2855 .loc 1 911 3 is_stmt 1 view .LVU941
+ 911:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 2856 .loc 1 911 25 is_stmt 0 view .LVU942
+ 2857 006e 0327 movs r7, #3
+ 2858 0070 2997 str r7, [sp, #164]
+ 912:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 2859 .loc 1 912 3 is_stmt 1 view .LVU943
+ 912:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 2860 .loc 1 912 30 is_stmt 0 view .LVU944
+ 2861 0072 0024 movs r4, #0
+ 2862 0074 2A94 str r4, [sp, #168]
+ 913:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 2863 .loc 1 913 3 is_stmt 1 view .LVU945
+ 913:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 2864 .loc 1 913 24 is_stmt 0 view .LVU946
+ 2865 0076 2B94 str r4, [sp, #172]
+ 914:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 2866 .loc 1 914 3 is_stmt 1 view .LVU947
+ 914:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 2867 .loc 1 914 29 is_stmt 0 view .LVU948
+ 2868 0078 0726 movs r6, #7
+ 2869 007a 2C96 str r6, [sp, #176]
+ 915:Src/main.c ****
+ ARM GAS /tmp/ccDGOsZt.s page 222
-3748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx)
-3750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
-3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 interrupt flag (CC1F) is set (Capture/Compare 1 inte
-3756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1IF LL_TIM_IsActiveFlag_CC1
-3757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1(const TIM_TypeDef *TIMx)
-3761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1IF) == (TIM_SR_CC1IF)) ? 1UL : 0UL);
-3763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 interrupt flag (CC2F).
-3767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_ClearFlag_CC2
-3768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2(TIM_TypeDef *TIMx)
-3772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2IF));
-3774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 interrupt flag (CC2F) is set (Capture/Compare 2 inte
-3778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2IF LL_TIM_IsActiveFlag_CC2
-3779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2(const TIM_TypeDef *TIMx)
-3783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2IF) == (TIM_SR_CC2IF)) ? 1UL : 0UL);
-3785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 interrupt flag (CC3F).
-3789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_ClearFlag_CC3
-3790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3(TIM_TypeDef *TIMx)
-3794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3IF));
-3796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 interrupt flag (CC3F) is set (Capture/Compare 3 inte
-3800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3IF LL_TIM_IsActiveFlag_CC3
-3801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccLSPxIe.s page 379
-
-
-3805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL);
-3807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
-3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
-3812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4(TIM_TypeDef *TIMx)
-3816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4IF));
-3818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 interrupt flag (CC4F) is set (Capture/Compare 4 inte
-3822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_IsActiveFlag_CC4
-3823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4(const TIM_TypeDef *TIMx)
-3827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC4IF) == (TIM_SR_CC4IF)) ? 1UL : 0UL);
-3829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 5 interrupt flag (CC5F).
-3833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC5IF LL_TIM_ClearFlag_CC5
-3834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC5(TIM_TypeDef *TIMx)
-3838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC5IF));
-3840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 5 interrupt flag (CC5F) is set (Capture/Compare 5 inte
-3844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC5IF LL_TIM_IsActiveFlag_CC5
-3845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC5(const TIM_TypeDef *TIMx)
-3849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC5IF) == (TIM_SR_CC5IF)) ? 1UL : 0UL);
-3851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 6 interrupt flag (CC6F).
-3855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_ClearFlag_CC6
-3856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC6(TIM_TypeDef *TIMx)
-3860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF));
- ARM GAS /tmp/ccLSPxIe.s page 380
-
-
-3862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 inte
-3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6
-3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC6(const TIM_TypeDef *TIMx)
-3871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC6IF) == (TIM_SR_CC6IF)) ? 1UL : 0UL);
-3873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the commutation interrupt flag (COMIF).
-3877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR COMIF LL_TIM_ClearFlag_COM
-3878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_COM(TIM_TypeDef *TIMx)
-3882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_COMIF));
-3884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether commutation interrupt flag (COMIF) is set (commutation interrupt is pe
-3888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR COMIF LL_TIM_IsActiveFlag_COM
-3889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_COM(const TIM_TypeDef *TIMx)
-3893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_COMIF) == (TIM_SR_COMIF)) ? 1UL : 0UL);
-3895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the trigger interrupt flag (TIF).
-3899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_ClearFlag_TRIG
-3900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_TRIG(TIM_TypeDef *TIMx)
-3904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_TIF));
-3906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether trigger interrupt flag (TIF) is set (trigger interrupt is pending).
-3910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR TIF LL_TIM_IsActiveFlag_TRIG
-3911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_TRIG(const TIM_TypeDef *TIMx)
-3915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_TIF) == (TIM_SR_TIF)) ? 1UL : 0UL);
-3917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccLSPxIe.s page 381
-
-
-3919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the break interrupt flag (BIF).
-3921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_ClearFlag_BRK
-3922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
-3926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_BIF));
-3928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether break interrupt flag (BIF) is set (break interrupt is pending).
-3932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_IsActiveFlag_BRK
-3933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK(const TIM_TypeDef *TIMx)
-3937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_BIF) == (TIM_SR_BIF)) ? 1UL : 0UL);
-3939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the break 2 interrupt flag (B2IF).
-3943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR B2IF LL_TIM_ClearFlag_BRK2
-3944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK2(TIM_TypeDef *TIMx)
-3948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_B2IF));
-3950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether break 2 interrupt flag (B2IF) is set (break 2 interrupt is pending).
-3954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR B2IF LL_TIM_IsActiveFlag_BRK2
-3955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_BRK2(const TIM_TypeDef *TIMx)
-3959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_B2IF) == (TIM_SR_B2IF)) ? 1UL : 0UL);
-3961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 1 over-capture interrupt flag (CC1OF).
-3965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_ClearFlag_CC1OVR
-3966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1OVR(TIM_TypeDef *TIMx)
-3970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1OF));
-3972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set
- ARM GAS /tmp/ccLSPxIe.s page 382
-
-
-3976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 1 interrupt is pending).
-3977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR
-3978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)
-3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC1OF) == (TIM_SR_CC1OF)) ? 1UL : 0UL);
-3984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 2 over-capture interrupt flag (CC2OF).
-3988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_ClearFlag_CC2OVR
-3989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC2OVR(TIM_TypeDef *TIMx)
-3993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC2OF));
-3995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 2 over-capture interrupt flag (CC2OF) is set
-3999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 2 over-capture interrupt is pending).
-4000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC2OF LL_TIM_IsActiveFlag_CC2OVR
-4001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-4003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC2OVR(const TIM_TypeDef *TIMx)
-4005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC2OF) == (TIM_SR_CC2OF)) ? 1UL : 0UL);
-4007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 3 over-capture interrupt flag (CC3OF).
-4011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_ClearFlag_CC3OVR
-4012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-4014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC3OVR(TIM_TypeDef *TIMx)
-4016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC3OF));
-4018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 3 over-capture interrupt flag (CC3OF) is set
-4022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 3 over-capture interrupt is pending).
-4023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC3OF LL_TIM_IsActiveFlag_CC3OVR
-4024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-4026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3OVR(const TIM_TypeDef *TIMx)
-4028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3OF) == (TIM_SR_CC3OF)) ? 1UL : 0UL);
-4030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 383
-
-
-4033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF).
-4034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR
-4035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
-4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC4OF));
-4041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 4 over-capture interrupt flag (CC4OF) is set
-4045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 4 over-capture interrupt is pending).
-4046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_IsActiveFlag_CC4OVR
-4047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-4049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC4OVR(const TIM_TypeDef *TIMx)
-4051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC4OF) == (TIM_SR_CC4OF)) ? 1UL : 0UL);
-4053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the system break interrupt flag (SBIF).
-4057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR SBIF LL_TIM_ClearFlag_SYSBRK
-4058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-4060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_SYSBRK(TIM_TypeDef *TIMx)
-4062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_SBIF));
-4064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether system break interrupt flag (SBIF) is set (system break interrupt is p
-4068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR SBIF LL_TIM_IsActiveFlag_SYSBRK
-4069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-4071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_SYSBRK(const TIM_TypeDef *TIMx)
-4073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_SBIF) == (TIM_SR_SBIF)) ? 1UL : 0UL);
-4075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-4076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-4079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-4081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_IT_Management IT-Management
-4082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-4083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-4084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-4085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable update interrupt (UIE).
-4086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER UIE LL_TIM_EnableIT_UPDATE
-4087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-4088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 384
-
-
-4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx)
- 6985 .loc 5 4090 22 view .LVU2170
- 6986 .LBB577:
-4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE);
- 6987 .loc 5 4092 3 view .LVU2171
- 6988 00a6 8D4B ldr r3, .L390+72
- 6989 00a8 DA68 ldr r2, [r3, #12]
- 6990 00aa 42F00102 orr r2, r2, #1
- 6991 00ae DA60 str r2, [r3, #12]
- 6992 .LVL630:
- 6993 .loc 5 4092 3 is_stmt 0 view .LVU2172
- 6994 .LBE577:
- 6995 .LBE576:
-2395:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7);
- 6996 .loc 1 2395 2 is_stmt 1 view .LVU2173
- 6997 .LBB578:
- 6998 .LBI578:
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 6999 .loc 5 1313 22 view .LVU2174
- 7000 .LBB579:
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 7001 .loc 5 1315 3 view .LVU2175
- 7002 00b0 1A68 ldr r2, [r3]
- 7003 00b2 42F00102 orr r2, r2, #1
- 7004 00b6 1A60 str r2, [r3]
- 7005 .LVL631:
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 7006 .loc 5 1315 3 is_stmt 0 view .LVU2176
- 7007 .LBE579:
- 7008 .LBE578:
-2396:Src/main.c **** LL_TIM_EnableCounter(TIM7);
- 7009 .loc 1 2396 2 is_stmt 1 view .LVU2177
- 7010 .LBB580:
- 7011 .LBI580:
-4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 7012 .loc 5 4090 22 view .LVU2178
- 7013 .LBB581:
- 7014 .loc 5 4092 3 view .LVU2179
- 7015 00b8 03F58063 add r3, r3, #1024
- 7016 00bc DA68 ldr r2, [r3, #12]
- 7017 00be 42F00102 orr r2, r2, #1
- 7018 00c2 DA60 str r2, [r3, #12]
- 7019 .LVL632:
- 7020 .loc 5 4092 3 is_stmt 0 view .LVU2180
- 7021 .LBE581:
- 7022 .LBE580:
-2397:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6);
- 7023 .loc 1 2397 2 is_stmt 1 view .LVU2181
- 7024 .LBB582:
- 7025 .LBI582:
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 7026 .loc 5 1313 22 view .LVU2182
- 7027 .LBB583:
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 7028 .loc 5 1315 3 view .LVU2183
- 7029 00c4 1A68 ldr r2, [r3]
- ARM GAS /tmp/ccLSPxIe.s page 385
-
-
- 7030 00c6 42F00102 orr r2, r2, #1
- 7031 00ca 1A60 str r2, [r3]
- 7032 .LVL633:
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 7033 .loc 5 1315 3 is_stmt 0 view .LVU2184
- 7034 .LBE583:
- 7035 .LBE582:
-2404:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2);
- 7036 .loc 1 2404 3 is_stmt 1 view .LVU2185
- 7037 .LBB584:
- 7038 .LBI584:
- 7039 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 2870 .loc 1 915 3 is_stmt 1 view .LVU949
+ 2871 007c 404D ldr r5, .L78+4
+ 2872 007e 27A9 add r1, sp, #156
+ 2873 0080 2846 mov r0, r5
+ 2874 0082 FFF7FEFF bl LL_GPIO_Init
+ 2875 .LVL143:
+ 917:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 2876 .loc 1 917 3 view .LVU950
+ 917:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
+ 2877 .loc 1 917 23 is_stmt 0 view .LVU951
+ 2878 0086 4FF48063 mov r3, #1024
+ 2879 008a 2793 str r3, [sp, #156]
+ 918:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 2880 .loc 1 918 3 is_stmt 1 view .LVU952
+ 918:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
+ 2881 .loc 1 918 24 is_stmt 0 view .LVU953
+ 2882 008c CDF8A080 str r8, [sp, #160]
+ 919:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 2883 .loc 1 919 3 is_stmt 1 view .LVU954
+ 919:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
+ 2884 .loc 1 919 25 is_stmt 0 view .LVU955
+ 2885 0090 2997 str r7, [sp, #164]
+ 920:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 2886 .loc 1 920 3 is_stmt 1 view .LVU956
+ 920:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
+ 2887 .loc 1 920 30 is_stmt 0 view .LVU957
+ 2888 0092 2A94 str r4, [sp, #168]
+ 921:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 2889 .loc 1 921 3 is_stmt 1 view .LVU958
+ 921:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
+ 2890 .loc 1 921 24 is_stmt 0 view .LVU959
+ 2891 0094 2B94 str r4, [sp, #172]
+ 922:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 2892 .loc 1 922 3 is_stmt 1 view .LVU960
+ 922:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+ 2893 .loc 1 922 29 is_stmt 0 view .LVU961
+ 2894 0096 2C96 str r6, [sp, #176]
+ 923:Src/main.c ****
+ 2895 .loc 1 923 3 is_stmt 1 view .LVU962
+ 2896 0098 27A9 add r1, sp, #156
+ 2897 009a 2846 mov r0, r5
+ 2898 009c FFF7FEFF bl LL_GPIO_Init
+ 2899 .LVL144:
+ 928:Src/main.c ****
+ 2900 .loc 1 928 3 view .LVU963
+ 2901 .LBB250:
+ 2902 .LBI250:
+ 2903 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h
@@ -23062,6 +13318,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @attention
8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** *
9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * Copyright (c) 2017 STMicroelectronics.
+ ARM GAS /tmp/ccDGOsZt.s page 223
+
+
10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * All rights reserved.
11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** *
12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * This software is licensed under terms that can be found in the LICENSE file in
@@ -23098,9 +13357,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */
- ARM GAS /tmp/ccLSPxIe.s page 386
-
-
46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** static const uint8_t STREAM_OFFSET_TAB[] =
47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream0_BASE - DMA1_BASE),
@@ -23122,6 +13378,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(DMA_SxCR_CHSEL_3)
+ ARM GAS /tmp/ccDGOsZt.s page 224
+
+
67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define DMA_CHANNEL_SELECTION_8_15
68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_SxCR_CHSEL_3 */
69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -23158,9 +13417,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The circular buffer mode cannot be used if the memory
101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** data transfer direction is configured on the selected
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccLSPxIe.s page 387
-
-
103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct
104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address
@@ -23182,6 +13438,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct
122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination dat
+ ARM GAS /tmp/ccDGOsZt.s page 225
+
+
124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** in case of memory to memory transfer direction.
125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -23218,9 +13477,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemBurst; /*!< Specifies the Burst transfer configuration for the memory t
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing
- ARM GAS /tmp/ccLSPxIe.s page 388
-
-
160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction.
161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MBURST
162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The burst mode is possible only if the address Increm
@@ -23242,6 +13498,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /*USE_FULL_LL_DRIVER*/
179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported constants --------------------------------------------------------*/
180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
+ ARM GAS /tmp/ccDGOsZt.s page 226
+
+
181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -23278,9 +13537,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_CIRCULAR DMA_SxCR_CIRC /*!< Circular Mode
215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MODE_PFCTRL DMA_SxCR_PFCTRL /*!< Peripheral flow control mo
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 389
-
-
217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -23302,6 +13558,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 227
+
+
238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MEMORY MEMORY
239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -23338,9 +13597,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_OFFSETSIZE_FIXEDTO4 DMA_SxCR_PINCOS /*!< Peripheral increment offse
272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
- ARM GAS /tmp/ccLSPxIe.s page 390
-
-
274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PRIORITY PRIORITY
@@ -23362,6 +13618,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1
293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1)
294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_4 DMA_SxCR_CHSEL_2
+ ARM GAS /tmp/ccDGOsZt.s page 228
+
+
295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_5 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0)
296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1)
297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_7 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1 | DMA_SxCR_CHSEL_0)
@@ -23398,9 +13657,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC8 DMA_SxCR_PBURST_1 /*!< Peripheral b
329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PBURST_INC16 (DMA_SxCR_PBURST_0 | DMA_SxCR_PBURST_1) /*!< Peripheral b
330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 391
-
-
331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -23422,6 +13678,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_75_100 (DMA_SxFCR_FS_1 | DMA_SxFCR_FS_0) /*!< 3/4 < fifo_l
350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_EMPTY DMA_SxFCR_FS_2 /*!< FIFO is empt
351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_FULL (DMA_SxFCR_FS_2 | DMA_SxFCR_FS_0) /*!< FIFO is full
+ ARM GAS /tmp/ccDGOsZt.s page 229
+
+
352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -23458,9 +13717,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 392
-
-
388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Write a value in DMA register
390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance
@@ -23482,6 +13738,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxStreamy
+ ARM GAS /tmp/ccDGOsZt.s page 230
+
+
409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -23518,9 +13777,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Convert DMA Instance DMAx and LL_DMA_STREAM_y into DMAx_Streamy
443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __DMA_INSTANCE__ DMAx
444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM__ LL_DMA_STREAM_y
- ARM GAS /tmp/ccLSPxIe.s page 393
-
-
445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx_Streamy
446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM_INSTANCE(__DMA_INSTANCE__, __STREAM__) \
@@ -23542,6 +13798,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** DMA2_Stream7)
464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 231
+
+
466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -23578,9 +13837,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccLSPxIe.s page 394
-
-
502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable DMA stream.
504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR EN LL_DMA_DisableStream
@@ -23597,26 +13853,14 @@ ARM GAS /tmp/ccLSPxIe.s page 1
515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableStream(DMA_TypeDef *DMAx, uint32_t Stream)
- 7040 .loc 6 517 22 view .LVU2186
- 7041 .LBB585:
518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
- 7042 .loc 6 519 3 view .LVU2187
- 7043 00cc 03F51433 add r3, r3, #151552
- 7044 00d0 D3F8B820 ldr r2, [r3, #184]
- 7045 00d4 22F00102 bic r2, r2, #1
- 7046 00d8 C3F8B820 str r2, [r3, #184]
- 7047 .LVL634:
- 7048 .loc 6 519 3 is_stmt 0 view .LVU2188
- 7049 .LBE585:
- 7050 .LBE584:
-2405:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2);
- 7051 .loc 1 2405 3 is_stmt 1 view .LVU2189
- 7052 .LBB586:
- 7053 .LBI586:
520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 232
+
+
523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Check if DMA stream is enabled or disabled.
524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR EN LL_DMA_IsEnabledStream
525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -23638,9 +13882,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure all parameters linked to DMA transfer.
- ARM GAS /tmp/ccLSPxIe.s page 395
-
-
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n
545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n
@@ -23677,6 +13918,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 233
+
+
580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Data transfer direction (read from peripheral or from memory).
581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_SetDataTransferDirection
582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -23698,9 +13942,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t
599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
- ARM GAS /tmp/ccLSPxIe.s page 396
-
-
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -23737,6 +13978,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
+ ARM GAS /tmp/ccDGOsZt.s page 234
+
+
637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
@@ -23758,9 +14002,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
- ARM GAS /tmp/ccLSPxIe.s page 397
-
-
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
@@ -23797,6 +14038,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Increment
+ ARM GAS /tmp/ccDGOsZt.s page 235
+
+
694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -23818,9 +14062,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_NOINCREMENT
713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT
714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 398
-
-
715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream)
716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -23857,6 +14098,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
+ ARM GAS /tmp/ccDGOsZt.s page 236
+
+
751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
@@ -23878,9 +14122,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
- ARM GAS /tmp/ccLSPxIe.s page 399
-
-
772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
@@ -23917,6 +14158,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD
806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream)
+ ARM GAS /tmp/ccDGOsZt.s page 237
+
+
808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -23938,9 +14182,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_BYTE
827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_HALFWORD
828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD
- ARM GAS /tmp/ccLSPxIe.s page 400
-
-
829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size)
@@ -23977,6 +14218,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
+ ARM GAS /tmp/ccDGOsZt.s page 238
+
+
865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
@@ -23998,9 +14242,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral increment offset size.
884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_GetIncOffsetSize
885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
- ARM GAS /tmp/ccLSPxIe.s page 401
-
-
886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
@@ -24037,6 +14278,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM
920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH
921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH
+ ARM GAS /tmp/ccDGOsZt.s page 239
+
+
922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Pr
@@ -24058,9 +14302,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 402
-
-
943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW
944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM
945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH
@@ -24097,6 +14338,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Number of data to transfer.
978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_GetDataLength
+ ARM GAS /tmp/ccDGOsZt.s page 240
+
+
979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Once the stream is enabled, the return value indicate the
980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * remaining bytes to be transmitted.
981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -24118,9 +14362,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select Channel number associated to the Stream.
- ARM GAS /tmp/ccLSPxIe.s page 403
-
-
1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection
1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
@@ -24154,8 +14395,153 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channe
+ 2904 .loc 7 1032 22 view .LVU964
+ 2905 .LBB251:
1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ ARM GAS /tmp/ccDGOsZt.s page 241
+
+
1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
+ 2906 .loc 7 1034 3 view .LVU965
+ 2907 00a0 384B ldr r3, .L78+8
+ 2908 00a2 D3F8B820 ldr r2, [r3, #184]
+ 2909 00a6 22F0F052 bic r2, r2, #503316480
+ 2910 00aa 42F00062 orr r2, r2, #134217728
+ 2911 00ae C3F8B820 str r2, [r3, #184]
+ 2912 .LVL145:
+ 2913 .loc 7 1034 3 is_stmt 0 view .LVU966
+ 2914 .LBE251:
+ 2915 .LBE250:
+ 930:Src/main.c ****
+ 2916 .loc 1 930 3 is_stmt 1 view .LVU967
+ 2917 .LBB252:
+ 2918 .LBI252:
+ 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2919 .loc 7 598 22 view .LVU968
+ 2920 .LBB253:
+ 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2921 .loc 7 600 3 view .LVU969
+ 2922 00b2 D3F8B820 ldr r2, [r3, #184]
+ 2923 00b6 22F0C002 bic r2, r2, #192
+ 2924 00ba 42F04002 orr r2, r2, #64
+ 2925 00be C3F8B820 str r2, [r3, #184]
+ 2926 .LVL146:
+ 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2927 .loc 7 600 3 is_stmt 0 view .LVU970
+ 2928 .LBE253:
+ 2929 .LBE252:
+ 932:Src/main.c ****
+ 2930 .loc 1 932 3 is_stmt 1 view .LVU971
+ 2931 .LBB254:
+ 2932 .LBI254:
+ 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2933 .loc 7 924 22 view .LVU972
+ 2934 .LBB255:
+ 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2935 .loc 7 926 3 view .LVU973
+ 2936 00c2 D3F8B820 ldr r2, [r3, #184]
+ 2937 00c6 42F44032 orr r2, r2, #196608
+ 2938 00ca C3F8B820 str r2, [r3, #184]
+ 2939 .LVL147:
+ 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2940 .loc 7 926 3 is_stmt 0 view .LVU974
+ 2941 .LBE255:
+ 2942 .LBE254:
+ 934:Src/main.c ****
+ 2943 .loc 1 934 3 is_stmt 1 view .LVU975
+ 2944 .LBB256:
+ 2945 .LBI256:
+ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2946 .loc 7 646 22 view .LVU976
+ 2947 .LBB257:
+ 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2948 .loc 7 648 3 view .LVU977
+ 2949 00ce D3F8B820 ldr r2, [r3, #184]
+ 2950 00d2 22F49072 bic r2, r2, #288
+ ARM GAS /tmp/ccDGOsZt.s page 242
+
+
+ 2951 00d6 C3F8B820 str r2, [r3, #184]
+ 2952 .LVL148:
+ 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2953 .loc 7 648 3 is_stmt 0 view .LVU978
+ 2954 .LBE257:
+ 2955 .LBE256:
+ 936:Src/main.c ****
+ 2956 .loc 1 936 3 is_stmt 1 view .LVU979
+ 2957 .LBB258:
+ 2958 .LBI258:
+ 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2959 .loc 7 693 22 view .LVU980
+ 2960 .LBB259:
+ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2961 .loc 7 695 3 view .LVU981
+ 2962 00da D3F8B820 ldr r2, [r3, #184]
+ 2963 00de 22F40072 bic r2, r2, #512
+ 2964 00e2 C3F8B820 str r2, [r3, #184]
+ 2965 .LVL149:
+ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2966 .loc 7 695 3 is_stmt 0 view .LVU982
+ 2967 .LBE259:
+ 2968 .LBE258:
+ 938:Src/main.c ****
+ 2969 .loc 1 938 3 is_stmt 1 view .LVU983
+ 2970 .LBB260:
+ 2971 .LBI260:
+ 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2972 .loc 7 738 22 view .LVU984
+ 2973 .LBB261:
+ 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2974 .loc 7 740 3 view .LVU985
+ 2975 00e6 D3F8B820 ldr r2, [r3, #184]
+ 2976 00ea 42F48062 orr r2, r2, #1024
+ 2977 00ee C3F8B820 str r2, [r3, #184]
+ 2978 .LVL150:
+ 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2979 .loc 7 740 3 is_stmt 0 view .LVU986
+ 2980 .LBE261:
+ 2981 .LBE260:
+ 940:Src/main.c ****
+ 2982 .loc 1 940 3 is_stmt 1 view .LVU987
+ 2983 .LBB262:
+ 2984 .LBI262:
+ 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2985 .loc 7 784 22 view .LVU988
+ 2986 .LBB263:
+ 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2987 .loc 7 786 3 view .LVU989
+ 2988 00f2 D3F8B820 ldr r2, [r3, #184]
+ 2989 00f6 22F4C052 bic r2, r2, #6144
+ 2990 00fa C3F8B820 str r2, [r3, #184]
+ 2991 .LVL151:
+ 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 2992 .loc 7 786 3 is_stmt 0 view .LVU990
+ 2993 .LBE263:
+ 2994 .LBE262:
+ ARM GAS /tmp/ccDGOsZt.s page 243
+
+
+ 942:Src/main.c ****
+ 2995 .loc 1 942 3 is_stmt 1 view .LVU991
+ 2996 .LBB264:
+ 2997 .LBI264:
+ 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 2998 .loc 7 831 22 view .LVU992
+ 2999 .LBB265:
+ 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 3000 .loc 7 833 3 view .LVU993
+ 3001 00fe D3F8B820 ldr r2, [r3, #184]
+ 3002 0102 22F4C042 bic r2, r2, #24576
+ 3003 0106 C3F8B820 str r2, [r3, #184]
+ 3004 .LVL152:
+ 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 3005 .loc 7 833 3 is_stmt 0 view .LVU994
+ 3006 .LBE265:
+ 3007 .LBE264:
+ 944:Src/main.c ****
+ 3008 .loc 1 944 3 is_stmt 1 view .LVU995
+ 3009 .LBB266:
+ 3010 .LBI266:
1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -24178,9 +14564,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_3
1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_4
1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5
- ARM GAS /tmp/ccLSPxIe.s page 404
-
-
1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6
1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7
1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_8 (*)
@@ -24195,6 +14578,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * (*) value not defined in all devices.
1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream)
+ ARM GAS /tmp/ccDGOsZt.s page 244
+
+
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -24238,9 +14624,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 405
-
-
1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE
1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4
1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8
@@ -24255,6 +14638,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Peripheral burst transfer configuration.
1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PBURST LL_DMA_SetPeriphBurstxfer
1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
+ ARM GAS /tmp/ccDGOsZt.s page 245
+
+
1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
@@ -24298,9 +14684,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream)
1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
- ARM GAS /tmp/ccLSPxIe.s page 406
-
-
1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -24315,6 +14698,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
+ ARM GAS /tmp/ccDGOsZt.s page 246
+
+
1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param CurrentMemory This parameter can be one of the following values:
1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CURRENTTARGETMEM0
@@ -24358,9 +14744,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
- ARM GAS /tmp/ccLSPxIe.s page 407
-
-
1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
@@ -24375,6 +14758,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable the double buffer mode.
1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DBM LL_DMA_DisableDoubleBufferMode
1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
+ ARM GAS /tmp/ccDGOsZt.s page 247
+
+
1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
@@ -24418,9 +14804,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 408
-
-
1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode.
1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode
1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -24435,1159 +14818,145 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 248
+
+
1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
+ 3011 .loc 7 1299 22 view .LVU996
+ 3012 .LBB267:
1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR,
-1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Fifo mode.
-1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_EnableFifoMode
-1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
-1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DM
-1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select FIFO threshold.
-1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_SetFIFOThreshold
-1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Threshold This parameter can be one of the following values:
-1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
-1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
-1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
-1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
- ARM GAS /tmp/ccLSPxIe.s page 409
+ 3013 .loc 7 1301 3 view .LVU997
+ 3014 010a D3F8CC20 ldr r2, [r3, #204]
+ 3015 010e 22F00402 bic r2, r2, #4
+ 3016 0112 C3F8CC20 str r2, [r3, #204]
+ 3017 .LVL153:
+ 3018 .loc 7 1301 3 is_stmt 0 view .LVU998
+ 3019 .LBE267:
+ 3020 .LBE266:
+ 947:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
+ 3021 .loc 1 947 3 is_stmt 1 view .LVU999
+ 3022 .LBB268:
+ 3023 .LBI268:
+1884:Drivers/CMSIS/Include/core_cm7.h **** {
+ 3024 .loc 2 1884 26 view .LVU1000
+ 3025 .LBB269:
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3026 .loc 2 1886 3 view .LVU1001
+1886:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3027 .loc 2 1886 26 is_stmt 0 view .LVU1002
+ 3028 0116 1C4B ldr r3, .L78+12
+ 3029 0118 D868 ldr r0, [r3, #12]
+ 3030 .LBE269:
+ 3031 .LBE268:
+ 947:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
+ 3032 .loc 1 947 3 discriminator 1 view .LVU1003
+ 3033 011a 2246 mov r2, r4
+ 3034 011c 2146 mov r1, r4
+ 3035 011e C0F30220 ubfx r0, r0, #8, #3
+ 3036 0122 FFF7FEFF bl NVIC_EncodePriority
+ 3037 .LVL154:
+ 3038 .LBB270:
+ 3039 .LBI270:
+2024:Drivers/CMSIS/Include/core_cm7.h **** {
+ 3040 .loc 2 2024 22 is_stmt 1 view .LVU1004
+ 3041 .LBB271:
+2026:Drivers/CMSIS/Include/core_cm7.h **** {
+ 3042 .loc 2 2026 3 view .LVU1005
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3043 .loc 2 2028 5 view .LVU1006
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3044 .loc 2 2028 49 is_stmt 0 view .LVU1007
+ 3045 0126 0001 lsls r0, r0, #4
+ 3046 .LVL155:
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3047 .loc 2 2028 49 view .LVU1008
+ 3048 0128 C0B2 uxtb r0, r0
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3049 .loc 2 2028 47 view .LVU1009
+ 3050 012a 184B ldr r3, .L78+16
+ 3051 012c 83F82503 strb r0, [r3, #805]
+ 3052 .LVL156:
+2028:Drivers/CMSIS/Include/core_cm7.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 249
-1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold
-1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR,
-1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get FIFO threshold.
-1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_GetFIFOThreshold
-1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values:
-1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
-1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
-1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
-1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
-1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream)
-1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
-1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the FIFO .
-1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_ConfigFifo\n
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * FCR DMDIS LL_DMA_ConfigFifo
-1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoMode This parameter can be one of the following values:
-1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOMODE_ENABLE
-1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOMODE_DISABLE
-1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param FifoThreshold This parameter can be one of the following values:
-1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_4
-1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_1_2
-1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
-1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
-1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigFifo(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t FifoMode, uint3
-1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 410
+ 3053 .loc 2 2028 47 view .LVU1010
+ 3054 .LBE271:
+ 3055 .LBE270:
+ 948:Src/main.c ****
+ 3056 .loc 1 948 3 is_stmt 1 view .LVU1011
+ 3057 .LBB272:
+ 3058 .LBI272:
+1896:Drivers/CMSIS/Include/core_cm7.h **** {
+ 3059 .loc 2 1896 22 view .LVU1012
+ 3060 .LBB273:
+1898:Drivers/CMSIS/Include/core_cm7.h **** {
+ 3061 .loc 2 1898 3 view .LVU1013
+1900:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3062 .loc 2 1900 5 view .LVU1014
+1900:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3063 .loc 2 1900 43 is_stmt 0 view .LVU1015
+ 3064 0130 2022 movs r2, #32
+ 3065 0132 5A60 str r2, [r3, #4]
+ 3066 .LVL157:
+1900:Drivers/CMSIS/Include/core_cm7.h **** }
+ 3067 .loc 2 1900 43 view .LVU1016
+ 3068 .LBE273:
+ 3069 .LBE272:
+ 953:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ 3070 .loc 1 953 3 is_stmt 1 view .LVU1017
+ 953:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
+ 3071 .loc 1 953 29 is_stmt 0 view .LVU1018
+ 3072 0134 4FF4E133 mov r3, #115200
+ 3073 0138 2D93 str r3, [sp, #180]
+ 954:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ 3074 .loc 1 954 3 is_stmt 1 view .LVU1019
+ 954:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
+ 3075 .loc 1 954 30 is_stmt 0 view .LVU1020
+ 3076 013a 2E94 str r4, [sp, #184]
+ 955:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ 3077 .loc 1 955 3 is_stmt 1 view .LVU1021
+ 955:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
+ 3078 .loc 1 955 29 is_stmt 0 view .LVU1022
+ 3079 013c 2F94 str r4, [sp, #188]
+ 956:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ 3080 .loc 1 956 3 is_stmt 1 view .LVU1023
+ 956:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
+ 3081 .loc 1 956 27 is_stmt 0 view .LVU1024
+ 3082 013e 3094 str r4, [sp, #192]
+ 957:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ 3083 .loc 1 957 3 is_stmt 1 view .LVU1025
+ 957:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
+ 3084 .loc 1 957 38 is_stmt 0 view .LVU1026
+ 3085 0140 0C23 movs r3, #12
+ 3086 0142 3193 str r3, [sp, #196]
+ 958:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ 3087 .loc 1 958 3 is_stmt 1 view .LVU1027
+ 958:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
+ 3088 .loc 1 958 40 is_stmt 0 view .LVU1028
+ 3089 0144 3294 str r4, [sp, #200]
+ 959:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
+ 3090 .loc 1 959 3 is_stmt 1 view .LVU1029
+ ARM GAS /tmp/ccDGOsZt.s page 250
-1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR,
-1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses.
-1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled.
-1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_ConfigAddresses\n
-1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * PAR PA LL_DMA_ConfigAddresses
-1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param SrcAddress Between 0 to 0xFFFFFFFF
-1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DstAddress Between 0 to 0xFFFFFFFF
-1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Direction This parameter can be one of the following values:
-1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
-1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
-1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
-1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t SrcAddress
-1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Direction Memory to Periph */
-1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
-1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
-1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Direction Periph to Memory and Memory to Memory */
-1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** else
-1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
-1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
-1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory address.
-1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetMemoryAddress
-1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
-1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled.
-1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
- ARM GAS /tmp/ccLSPxIe.s page 411
-
-
-1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF
-1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
-1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR,
-1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Peripheral address.
-1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_SetPeriphAddress
-1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
-1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled.
-1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param PeriphAddress Between 0 to 0xFFFFFFFF
-1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t PeriphAdd
-1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, P
-1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory address.
-1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_GetMemoryAddress
-1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
-1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF
-1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Peripheral address.
-1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetPeriphAddress
-1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
-1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
- ARM GAS /tmp/ccLSPxIe.s page 412
-
-
-1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF
-1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))
-1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Source address.
-1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_SetM2MSrcAddress
-1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled.
-1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF
-1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
-1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, M
-1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set the Memory to Memory Destination address.
-1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_SetM2MDstAddress
-1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA channel is enabled.
-1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF
-1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 413
-
-
-1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
-1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
-1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory to Memory Source address.
-1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll PAR PA LL_DMA_GetM2MSrcAddress
-1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF
-1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream]))
-1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory to Memory Destination address.
-1598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_GetM2MDstAddress
-1599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
-1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF
-1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream)
-1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->
-1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory 1 address (used in case of Double buffer mode).
-1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M1AR M1A LL_DMA_SetMemory1Address
-1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
- ARM GAS /tmp/ccLSPxIe.s page 414
-
-
-1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Address Between 0 to 0xFFFFFFFF
-1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address)
-1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR,
-1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Memory 1 address (used in case of Double buffer mode).
-1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M1AR M1A LL_DMA_GetMemory1Address
-1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Between 0 to 0xFFFFFFFF
-1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream)
-1654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M1AR);
-1656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
-1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
-1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
-1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 half transfer flag.
-1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF0 LL_DMA_IsActiveFlag_HT0
-1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT0(DMA_TypeDef *DMAx)
-1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF0)==(DMA_LISR_HTIF0));
-1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 half transfer flag.
-1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF1 LL_DMA_IsActiveFlag_HT1
-1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
- ARM GAS /tmp/ccLSPxIe.s page 415
-
-
-1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1));
-1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag.
-1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF2 LL_DMA_IsActiveFlag_HT2
-1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
-1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF2)==(DMA_LISR_HTIF2));
-1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 half transfer flag.
-1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF3 LL_DMA_IsActiveFlag_HT3
-1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
-1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF3)==(DMA_LISR_HTIF3));
-1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 half transfer flag.
-1712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF4 LL_DMA_IsActiveFlag_HT4
-1713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
-1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF4)==(DMA_HISR_HTIF4));
-1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 half transfer flag.
-1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF0 LL_DMA_IsActiveFlag_HT5
-1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
-1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF5)==(DMA_HISR_HTIF5));
-1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 half transfer flag.
-1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF6 LL_DMA_IsActiveFlag_HT6
-1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
-1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6));
- ARM GAS /tmp/ccLSPxIe.s page 416
-
-
-1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 half transfer flag.
-1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7
-1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
-1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF7)==(DMA_HISR_HTIF7));
-1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer complete flag.
-1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF0 LL_DMA_IsActiveFlag_TC0
-1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC0(DMA_TypeDef *DMAx)
-1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF0)==(DMA_LISR_TCIF0));
-1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 transfer complete flag.
-1767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF1 LL_DMA_IsActiveFlag_TC1
-1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
-1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF1)==(DMA_LISR_TCIF1));
-1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer complete flag.
-1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF2 LL_DMA_IsActiveFlag_TC2
-1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
-1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF2)==(DMA_LISR_TCIF2));
-1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 transfer complete flag.
-1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF3 LL_DMA_IsActiveFlag_TC3
-1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
-1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF3)==(DMA_LISR_TCIF3));
-1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccLSPxIe.s page 417
-
-
-1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag.
-1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4
-1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
-1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF4)==(DMA_HISR_TCIF4));
-1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer complete flag.
-1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF0 LL_DMA_IsActiveFlag_TC5
-1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
-1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF5)==(DMA_HISR_TCIF5));
-1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 transfer complete flag.
-1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF6 LL_DMA_IsActiveFlag_TC6
-1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
-1827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF6)==(DMA_HISR_TCIF6));
-1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer complete flag.
-1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF7 LL_DMA_IsActiveFlag_TC7
-1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
-1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7));
-1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 transfer error flag.
-1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF0 LL_DMA_IsActiveFlag_TE0
-1845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE0(DMA_TypeDef *DMAx)
-1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF0)==(DMA_LISR_TEIF0));
-1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 transfer error flag.
- ARM GAS /tmp/ccLSPxIe.s page 418
-
-
-1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1
-1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
-1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF1)==(DMA_LISR_TEIF1));
-1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer error flag.
-1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2
-1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
-1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF2)==(DMA_LISR_TEIF2));
-1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 transfer error flag.
-1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF3 LL_DMA_IsActiveFlag_TE3
-1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
-1882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF3)==(DMA_LISR_TEIF3));
-1884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer error flag.
-1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF4 LL_DMA_IsActiveFlag_TE4
-1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
-1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF4)==(DMA_HISR_TEIF4));
-1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 transfer error flag.
-1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF0 LL_DMA_IsActiveFlag_TE5
-1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
-1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF5)==(DMA_HISR_TEIF5));
-1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 transfer error flag.
-1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF6 LL_DMA_IsActiveFlag_TE6
-1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
- ARM GAS /tmp/ccLSPxIe.s page 419
-
-
-1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
-1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6));
-1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer error flag.
-1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TEIF7 LL_DMA_IsActiveFlag_TE7
-1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
-1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF7)==(DMA_HISR_TEIF7));
-1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 direct mode error flag.
-1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF0 LL_DMA_IsActiveFlag_DME0
-1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME0(DMA_TypeDef *DMAx)
-1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF0)==(DMA_LISR_DMEIF0));
-1939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 direct mode error flag.
-1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF1 LL_DMA_IsActiveFlag_DME1
-1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME1(DMA_TypeDef *DMAx)
-1948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF1)==(DMA_LISR_DMEIF1));
-1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 direct mode error flag.
-1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF2 LL_DMA_IsActiveFlag_DME2
-1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME2(DMA_TypeDef *DMAx)
-1959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF2)==(DMA_LISR_DMEIF2));
-1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 direct mode error flag.
-1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF3 LL_DMA_IsActiveFlag_DME3
-1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 420
-
-
-1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx)
-1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3));
-1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 direct mode error flag.
-1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF4 LL_DMA_IsActiveFlag_DME4
-1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME4(DMA_TypeDef *DMAx)
-1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF4)==(DMA_HISR_DMEIF4));
-1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 direct mode error flag.
-1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF0 LL_DMA_IsActiveFlag_DME5
-1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME5(DMA_TypeDef *DMAx)
-1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF5)==(DMA_HISR_DMEIF5));
-1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-1995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-1996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-1997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 direct mode error flag.
-1998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF6 LL_DMA_IsActiveFlag_DME6
-1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME6(DMA_TypeDef *DMAx)
-2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF6)==(DMA_HISR_DMEIF6));
-2005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 direct mode error flag.
-2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR DMEIF7 LL_DMA_IsActiveFlag_DME7
-2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME7(DMA_TypeDef *DMAx)
-2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_DMEIF7)==(DMA_HISR_DMEIF7));
-2016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 FIFO error flag.
-2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF0 LL_DMA_IsActiveFlag_FE0
-2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE0(DMA_TypeDef *DMAx)
-2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 421
-
-
-2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0));
-2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag.
-2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1
-2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE1(DMA_TypeDef *DMAx)
-2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF1)==(DMA_LISR_FEIF1));
-2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 FIFO error flag.
-2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF2 LL_DMA_IsActiveFlag_FE2
-2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE2(DMA_TypeDef *DMAx)
-2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF2)==(DMA_LISR_FEIF2));
-2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 FIFO error flag.
-2053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF3 LL_DMA_IsActiveFlag_FE3
-2054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE3(DMA_TypeDef *DMAx)
-2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF3)==(DMA_LISR_FEIF3));
-2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 FIFO error flag.
-2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF4 LL_DMA_IsActiveFlag_FE4
-2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE4(DMA_TypeDef *DMAx)
-2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF4)==(DMA_HISR_FEIF4));
-2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 FIFO error flag.
-2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF0 LL_DMA_IsActiveFlag_FE5
-2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx)
-2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF5)==(DMA_HISR_FEIF5));
-2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 422
-
-
-2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 FIFO error flag.
-2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF6 LL_DMA_IsActiveFlag_FE6
-2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE6(DMA_TypeDef *DMAx)
-2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF6)==(DMA_HISR_FEIF6));
-2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 FIFO error flag.
-2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF7 LL_DMA_IsActiveFlag_FE7
-2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
-2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE7(DMA_TypeDef *DMAx)
-2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_FEIF7)==(DMA_HISR_FEIF7));
-2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 half transfer flag.
-2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF0 LL_DMA_ClearFlag_HT0
-2109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT0(DMA_TypeDef *DMAx)
-2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF0);
-2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 half transfer flag.
-2119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF1 LL_DMA_ClearFlag_HT1
-2120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
-2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF1);
-2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 half transfer flag.
-2130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF2 LL_DMA_ClearFlag_HT2
-2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
-2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2);
-2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 423
-
-
-2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag.
-2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3
-2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
-2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF3);
-2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 half transfer flag.
-2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF4 LL_DMA_ClearFlag_HT4
-2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
-2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF4);
-2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 half transfer flag.
-2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF5 LL_DMA_ClearFlag_HT5
-2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
-2168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF5);
-2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 half transfer flag.
-2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF6 LL_DMA_ClearFlag_HT6
-2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
-2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF6);
-2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 half transfer flag.
-2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CHTIF7 LL_DMA_ClearFlag_HT7
-2186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
-2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7);
-2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer complete flag.
-2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF0 LL_DMA_ClearFlag_TC0
- ARM GAS /tmp/ccLSPxIe.s page 424
-
-
-2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC0(DMA_TypeDef *DMAx)
-2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0);
-2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer complete flag.
-2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF1 LL_DMA_ClearFlag_TC1
-2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
-2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF1);
-2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 transfer complete flag.
-2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF2 LL_DMA_ClearFlag_TC2
-2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
-2223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF2);
-2225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 transfer complete flag.
-2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF3 LL_DMA_ClearFlag_TC3
-2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
-2234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF3);
-2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer complete flag.
-2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF4 LL_DMA_ClearFlag_TC4
-2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
-2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4);
-2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer complete flag.
-2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF5 LL_DMA_ClearFlag_TC5
-2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 425
-
-
-2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
-2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5);
-2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer complete flag.
-2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF6 LL_DMA_ClearFlag_TC6
-2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
-2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF6);
-2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer complete flag.
-2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTCIF7 LL_DMA_ClearFlag_TC7
-2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
- 7054 .loc 6 2277 22 view .LVU2190
- 7055 .LBB587:
-2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7);
- 7056 .loc 6 2279 3 view .LVU2191
- 7057 00dc 4FF00062 mov r2, #134217728
- 7058 00e0 DA60 str r2, [r3, #12]
- 7059 .LVL635:
- 7060 .loc 6 2279 3 is_stmt 0 view .LVU2192
- 7061 .LBE587:
- 7062 .LBE586:
-2406:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1);
- 7063 .loc 1 2406 3 is_stmt 1 view .LVU2193
- 7064 .LBB588:
- 7065 .LBI588:
-2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer error flag.
-2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0
-2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE0(DMA_TypeDef *DMAx)
-2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF0);
-2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 transfer error flag.
-2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF1 LL_DMA_ClearFlag_TE1
-2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 426
-
-
-2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
-2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1);
-2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 transfer error flag.
-2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF2 LL_DMA_ClearFlag_TE2
-2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
-2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF2);
-2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 transfer error flag.
-2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF3 LL_DMA_ClearFlag_TE3
-2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
-2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF3);
-2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 transfer error flag.
-2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF4 LL_DMA_ClearFlag_TE4
-2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
-2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF4);
-2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer error flag.
-2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5
-2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
-2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF5);
-2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 transfer error flag.
-2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF6 LL_DMA_ClearFlag_TE6
-2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
- ARM GAS /tmp/ccLSPxIe.s page 427
-
-
-2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6);
-2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer error flag.
-2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7
-2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
- 7066 .loc 6 2365 22 view .LVU2194
- 7067 .LBB589:
-2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7);
- 7068 .loc 6 2367 3 view .LVU2195
- 7069 00e2 4FF00072 mov r2, #33554432
- 7070 00e6 DA60 str r2, [r3, #12]
- 7071 .LVL636:
- 7072 .loc 6 2367 3 is_stmt 0 view .LVU2196
- 7073 .LBE589:
- 7074 .LBE588:
-2407:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7);
- 7075 .loc 1 2407 3 is_stmt 1 view .LVU2197
- 7076 .LBB590:
- 7077 .LBI590:
- 7078 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
+ 959:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
+ 3091 .loc 1 959 33 is_stmt 0 view .LVU1030
+ 3092 0146 3394 str r4, [sp, #204]
+ 960:Src/main.c **** LL_USART_ConfigAsyncMode(USART1);
+ 3093 .loc 1 960 3 is_stmt 1 view .LVU1031
+ 3094 0148 04F18044 add r4, r4, #1073741824
+ 3095 014c 04F58834 add r4, r4, #69632
+ 3096 0150 2DA9 add r1, sp, #180
+ 3097 0152 2046 mov r0, r4
+ 3098 0154 FFF7FEFF bl LL_USART_Init
+ 3099 .LVL158:
+ 961:Src/main.c **** LL_USART_Enable(USART1);
+ 3100 .loc 1 961 3 view .LVU1032
+ 3101 .LBB274:
+ 3102 .LBI274:
+ 3103 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h
@@ -25618,9 +14987,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #include "stm32f7xx.h"
29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver
- ARM GAS /tmp/ccLSPxIe.s page 428
-
-
31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -25632,6 +14998,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private types -------------------------------------------------------------*/
+ ARM GAS /tmp/ccDGOsZt.s page 251
+
+
42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private variables ---------------------------------------------------------*/
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private constants ---------------------------------------------------------*/
@@ -25678,9 +15047,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_STOPBI
86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary
- ARM GAS /tmp/ccLSPxIe.s page 429
-
-
88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetStopBitsLength().*/
89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t Parity; /*!< Specifies the parity mode.
@@ -25692,6 +15058,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is en
97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_DIRECT
98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 252
+
+
99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetTransferDirection().*/
101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -25738,9 +15107,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the l
143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data bit (MSB) has to be output on the SCLK pin in synch
144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_LASTCL
- ARM GAS /tmp/ccLSPxIe.s page 430
-
-
145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using
147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** functions @ref LL_USART_SetLastClkPulseOutput().
@@ -25752,6 +15118,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USE_FULL_LL_DRIVER */
+ ARM GAS /tmp/ccDGOsZt.s page 253
+
+
156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported constants --------------------------------------------------------*/
158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Constants USART Exported Constants
@@ -25798,9 +15167,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission com
200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data re
201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detect
- ARM GAS /tmp/ccLSPxIe.s page 431
-
-
202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt fl
203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */
204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout
@@ -25812,6 +15178,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag
211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup
212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
+ ARM GAS /tmp/ccDGOsZt.s page 254
+
+
213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop
215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
@@ -25858,9 +15227,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter
- ARM GAS /tmp/ccLSPxIe.s page 432
-
-
259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter
260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter
261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter
@@ -25872,6 +15238,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_NONE 0x00000000U /*!< Parity co
+ ARM GAS /tmp/ccDGOsZt.s page 255
+
+
270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_EVEN USART_CR1_PCE /*!< Parity co
271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity co
272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -25918,9 +15287,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 433
-
-
316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -25932,6 +15298,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_PHASE Clock Phase
326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
+ ARM GAS /tmp/ccDGOsZt.s page 256
+
+
327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_1EDGE 0x00000000U /*!< The first clock transiti
329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_PHASE_2EDGE USART_CR2_CPHA /*!< The second clock transit
@@ -25978,9 +15347,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
- ARM GAS /tmp/ccLSPxIe.s page 434
-
-
373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works usin
@@ -25992,6 +15358,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_BINARY_LOGIC Binary Data Inversion
382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 257
+
+
384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the da
385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the da
386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26038,9 +15407,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 435
-
-
430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUS)
432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation
@@ -26052,6 +15418,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 258
+
+
441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUS */
443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
@@ -26098,9 +15467,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/
485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros
486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
- ARM GAS /tmp/ccLSPxIe.s page 436
-
-
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros
@@ -26112,6 +15478,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __INSTANCE__ USART Instance
496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __REG__ Register to be written
497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param __VALUE__ Value to be written in the register
+ ARM GAS /tmp/ccDGOsZt.s page 259
+
+
498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VAL
@@ -26158,9 +15527,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 437
-
-
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/
545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Functions USART Exported Functions
@@ -26172,6 +15538,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 260
+
+
555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Enable
556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UE LL_USART_Enable
557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -26218,9 +15587,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 438
-
-
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM);
@@ -26232,6 +15598,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UESM LL_USART_DisableInStopMode
+ ARM GAS /tmp/ccDGOsZt.s page 261
+
+
612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -26278,9 +15647,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);
656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 439
-
-
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART clock is enabled in STOP Mode
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 UCESM LL_USART_IsClockEnabledInStopMode
@@ -26292,6 +15658,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (READ_BIT(USARTx->CR3, USART_CR3_UCESM) == (USART_CR3_UCESM));
667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 262
+
+
669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_UCESM */
670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM*/
671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26338,9 +15707,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 440
-
-
715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure simultaneously enabled/disabled states
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * of Transmitter and Receiver
@@ -26352,6 +15718,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_RX
724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_TX
725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_TX_RX
+ ARM GAS /tmp/ccDGOsZt.s page 263
+
+
726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferDirection(USART_TypeDef *USARTx, uint32_t TransferDirectio
@@ -26398,9 +15767,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_GetParity\n
771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity
- ARM GAS /tmp/ccLSPxIe.s page 441
-
-
772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE
@@ -26412,6 +15778,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE));
781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 264
+
+
783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Receiver Wake Up method from Mute mode.
785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 WAKE LL_USART_SetWakeUpMethod
@@ -26458,9 +15827,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n
- ARM GAS /tmp/ccLSPxIe.s page 442
-
-
829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth
830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
@@ -26472,6 +15838,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_M));
839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 265
+
+
840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Allow switch between Mute Mode and Active mode
@@ -26518,9 +15887,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
- ARM GAS /tmp/ccLSPxIe.s page 443
-
-
886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26532,6 +15898,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8
895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetOverSampling(const USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccDGOsZt.s page 266
+
+
897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR1, USART_CR1_OVER8));
899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -26578,9 +15947,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE
941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE
942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 444
-
-
943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase)
945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -26592,6 +15958,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance.
953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPHA LL_USART_GetClockPhase
+ ARM GAS /tmp/ccDGOsZt.s page 267
+
+
954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE
@@ -26638,9 +16007,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance.
999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
- ARM GAS /tmp/ccLSPxIe.s page 445
-
-
1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function
1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutpu
@@ -26652,6 +16018,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE
1009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE
1010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Polarity This parameter can be one of the following values:
+ ARM GAS /tmp/ccDGOsZt.s page 268
+
+
1011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_LOW
1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_POLARITY_HIGH
1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LBCPOutput This parameter can be one of the following values:
@@ -26698,9 +16067,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 446
-
-
1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL);
@@ -26712,6 +16078,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values:
1067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5
+ ARM GAS /tmp/ccDGOsZt.s page 269
+
+
1068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1
1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1_5
1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_2
@@ -26758,9 +16127,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN
1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD
1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values:
- ARM GAS /tmp/ccLSPxIe.s page 447
-
-
1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5
1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1
1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1_5
@@ -26772,6 +16138,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth);
1124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_STOP, StopBits);
+ ARM GAS /tmp/ccDGOsZt.s page 270
+
+
1125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -26818,9 +16187,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve RX pin active level logic configuration
1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel
- ARM GAS /tmp/ccLSPxIe.s page 448
-
-
1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD
@@ -26832,6 +16198,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccDGOsZt.s page 271
+
+
1182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure TX pin active level logic
1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 TXINV LL_USART_SetTXPinLevel
1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -26878,9 +16247,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Binary data configuration
1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic
1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccLSPxIe.s page 449
-
-
1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE
1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE
@@ -26892,6 +16258,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure transfer bit order (either Less or Most Significant Bit First)
+ ARM GAS /tmp/ccDGOsZt.s page 272
+
+
1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note MSB First means data is transmitted/received with the MSB first, following the start bi
1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LSB First means data is transmitted/received with data bit 0 first, following the start
1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 MSBFIRST LL_USART_SetTransferBitOrder
@@ -26938,9 +16307,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Auto Baud-Rate Detection
1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
- ARM GAS /tmp/ccLSPxIe.s page 450
-
-
1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate
1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
@@ -26952,6 +16318,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Auto Baud-Rate Detection mechanism is enabled
+ ARM GAS /tmp/ccDGOsZt.s page 273
+
+
1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_IsEnabledAutoBaud
@@ -26998,9 +16367,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 451
-
-
1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Receiver Timeout
1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout
@@ -27012,6 +16378,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_RTOEN);
1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccDGOsZt.s page 274
+
+
1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Receiver Timeout
1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_DisableRxTimeout
@@ -27058,9 +16427,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_
- ARM GAS /tmp/ccLSPxIe.s page 452
-
-
1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7,
1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos)));
@@ -27072,6 +16438,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * If 7-bit Address Detection is selected in ADDM7,
1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
+ ARM GAS /tmp/ccDGOsZt.s page 275
+
+
1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADD LL_USART_GetNodeAddress
1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Address of the USART node (Value between Min_Data=0 and Max_Data=255)
@@ -27118,9 +16487,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
- ARM GAS /tmp/ccLSPxIe.s page 453
-
-
1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27132,6 +16498,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableCTSHWFlowCtrl(USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccDGOsZt.s page 276
+
+
1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_CTSE);
1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -27178,9 +16547,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_NONE
1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS
- ARM GAS /tmp/ccLSPxIe.s page 454
-
-
1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS
1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS_CTS
1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -27192,6 +16558,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable One bit sampling method
1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_EnableOneBitSamp
+ ARM GAS /tmp/ccDGOsZt.s page 277
+
+
1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -27238,9 +16607,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect
1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 455
-
-
1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx)
1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -27252,6 +16618,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_IsEnabledOverrunDetect
1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
+ ARM GAS /tmp/ccDGOsZt.s page 278
+
+
1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledOverrunDetect(const USART_TypeDef *USARTx)
1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -27298,9 +16667,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure USART BRR register for achieving expected Baud Rate value.
1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content)
- ARM GAS /tmp/ccLSPxIe.s page 456
-
-
1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Peripheral clock and Baud rate values provided as function parameters should be valid
1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (Baud rate value != 0)
@@ -27312,6 +16678,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_16
1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_OVERSAMPLING_8
1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param BaudRate Baud Rate
+ ARM GAS /tmp/ccDGOsZt.s page 279
+
+
1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetBaudRate(USART_TypeDef *USARTx, uint32_t PeriphClk, uint32_t OverS
@@ -27358,9 +16727,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Do not perform a division by 0 */
1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else if (OverSampling == LL_USART_OVERSAMPLING_8)
- ARM GAS /tmp/ccLSPxIe.s page 457
-
-
1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ;
1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (usartdiv != 0U)
@@ -27372,6 +16738,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if ((usartdiv & 0xFFFFU) != 0U)
1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ ARM GAS /tmp/ccDGOsZt.s page 280
+
+
1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrresult = PeriphClk / usartdiv;
1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -27418,9 +16787,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR BLEN LL_USART_GetBlockLength
1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF
- ARM GAS /tmp/ccLSPxIe.s page 458
-
-
1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx)
1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -27432,6 +16798,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_IRDA Configuration functions related to Irda feature
+ ARM GAS /tmp/ccDGOsZt.s page 281
+
+
1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -27478,9 +16847,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure IrDA Power Mode (Normal or Low Power)
1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance.
- ARM GAS /tmp/ccLSPxIe.s page 459
-
-
1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode
1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PowerMode This parameter can be one of the following values:
@@ -27492,6 +16858,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR3, USART_CR3_IRLP, PowerMode);
1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccDGOsZt.s page 282
+
+
1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve IrDA Power Mode configuration (Normal or Low Power)
@@ -27538,9 +16907,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 460
-
-
1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -27552,6 +16918,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard NACK transmission
1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
+ ARM GAS /tmp/ccDGOsZt.s page 283
+
+
1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 NACK LL_USART_EnableSmartcardNACK
1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
@@ -27598,9 +16967,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableSmartcard(USART_TypeDef *USARTx)
1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN);
- ARM GAS /tmp/ccLSPxIe.s page 461
-
-
1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27612,6 +16978,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableSmartcard(USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccDGOsZt.s page 284
+
+
1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_SCEN);
1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -27658,9 +17027,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardAutoRetryCount(const USART_TypeDef *USARTx)
1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 462
-
-
1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos);
1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -27672,6 +17038,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_SetSmartcardPrescaler
1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PrescalerValue Value between Min_Data=0 and Max_Data=31
+ ARM GAS /tmp/ccDGOsZt.s page 285
+
+
1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetSmartcardPrescaler(USART_TypeDef *USARTx, uint32_t PrescalerValue)
@@ -27718,9 +17087,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Smartcard Guard time value (Value between Min_Data=0x00 and Max_Data=0xFF)
2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx)
- ARM GAS /tmp/ccLSPxIe.s page 463
-
-
2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos);
2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -27732,6 +17098,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex f
2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccDGOsZt.s page 286
+
+
2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Single Wire Half-Duplex mode
@@ -27778,9 +17147,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_LIN Configuration functions related to LIN feature
2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
- ARM GAS /tmp/ccLSPxIe.s page 464
-
-
2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27792,6 +17158,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LINBDLength This parameter can be one of the following values:
2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_10B
2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_11B
+ ARM GAS /tmp/ccDGOsZt.s page 287
+
+
2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetLINBrkDetectionLen(USART_TypeDef *USARTx, uint32_t LINBDLength)
@@ -27838,9 +17207,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableLIN(USART_TypeDef *USARTx)
2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN);
- ARM GAS /tmp/ccLSPxIe.s page 465
-
-
2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27852,6 +17218,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledLIN(const USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccDGOsZt.s page 288
+
+
2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_LINEN) == (USART_CR2_LINEN)) ? 1UL : 0UL);
2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -27898,9 +17267,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEAT LL_USART_SetDEAssertionTime
2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Time Value between Min_Data=0 and Max_Data=31
- ARM GAS /tmp/ccLSPxIe.s page 466
-
-
2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time)
@@ -27912,6 +17278,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return DEAT (Driver Enable Assertion Time)
2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance.
+ ARM GAS /tmp/ccDGOsZt.s page 289
+
+
2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 DEAT LL_USART_GetDEAssertionTime
2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Time value expressed on 5 bits ([4:0] bits) : Value between Min_Data=0 and Max_Data=31
@@ -27958,9 +17327,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDEMode(const USART_TypeDef *USARTx)
2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL);
- ARM GAS /tmp/ccLSPxIe.s page 467
-
-
2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -27972,6 +17338,9 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Polarity This parameter can be one of the following values:
2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_HIGH
2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_LOW
+ ARM GAS /tmp/ccDGOsZt.s page 290
+
+
2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDESignalPolarity(USART_TypeDef *USARTx, uint32_t Polarity)
@@ -28018,9 +17387,6 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Asynchronous Mode
2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using
- ARM GAS /tmp/ccLSPxIe.s page 468
-
-
2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n
2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigAsyncMode\n
@@ -28031,13541 +17397,990 @@ ARM GAS /tmp/ccLSPxIe.s page 1
2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigAsyncMode(USART_TypeDef *USARTx)
+ 3104 .loc 8 2320 22 view .LVU1033
+ ARM GAS /tmp/ccDGOsZt.s page 291
+
+
+ 3105 .LBB275:
2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Asynchronous mode, the following bits must be kept cleared:
2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN, CLKEN bits in the USART_CR2 register,
2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN, IREN and HDSEL bits in the USART_CR3 register.
2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
+ 3106 .loc 8 2326 3 view .LVU1034
+ 3107 0158 6368 ldr r3, [r4, #4]
+ 3108 015a 23F49043 bic r3, r3, #18432
+ 3109 015e 6360 str r3, [r4, #4]
2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
-2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
-2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Synchronous mode, the following bits must be kept cleared:
-2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
-2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
-2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
-2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
-2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also sets the USART in Synchronous mode.
-2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
-2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance.
-2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
-2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Synchronous Mode
-2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, Clock Polarity, ...) should be set using
-2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigSyncMode\n
-2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigSyncMode\n
-2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigSyncMode\n
-2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigSyncMode\n
-2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigSyncMode
-2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigSyncMode(USART_TypeDef *USARTx)
-2358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Synchronous mode, the following bits must be kept cleared:
-2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN bit in the USART_CR2 register,
-2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN, IREN and HDSEL bits in the USART_CR3 register.
-2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
-2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
-2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Synchronous mode */
-2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_CLKEN);
-2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 469
-
-
-2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in LIN Mode
-2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In LIN mode, the following bits must be kept cleared:
-2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register,
-2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
-2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
-2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
-2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also set the UART/USART in LIN mode.
-2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set LINEN in CR2 using @ref LL_USART_EnableLIN() function
-2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to LIN Mode
-2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
-2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
-2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigLINMode\n
-2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 LINEN LL_USART_ConfigLINMode\n
-2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigLINMode\n
-2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigLINMode\n
-2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigLINMode
-2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigLINMode(USART_TypeDef *USARTx)
-2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In LIN mode, the following bits must be kept cleared:
-2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - STOP and CLKEN bits in the USART_CR2 register,
-2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN, SCEN and HDSEL bits in the USART_CR3 register.
-2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_CLKEN | USART_CR2_STOP));
-2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_SCEN | USART_CR3_HDSEL));
-2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Set the UART/USART in LIN mode */
-2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_LINEN);
-2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Half Duplex Mode
-2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Half Duplex mode, the following bits must be kept cleared:
-2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
-2414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register,
-2415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
-2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
-2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also sets the UART/USART in Half Duplex mode.
-2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HALFDUPLEX_INSTANCE(USARTx) can be used to check whether or not
-2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Half-Duplex mode is supported by the USARTx instance.
-2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
- ARM GAS /tmp/ccLSPxIe.s page 470
-
-
-2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function
-2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Half Duplex Mode
-2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using
-2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n
-2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n
-2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n
-2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigHalfDuplexMode\n
-2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigHalfDuplexMode
-2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigHalfDuplexMode(USART_TypeDef *USARTx)
-2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Half Duplex mode, the following bits must be kept cleared:
-2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN and CLKEN bits in the USART_CR2 register,
-2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN and IREN bits in the USART_CR3 register.
-2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
-2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Half Duplex mode */
-2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
-2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
-2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Smartcard mode, the following bits must be kept cleared:
-2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
-2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
-2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
-2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also configures Stop bits to 1.5 bits and
-2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * sets the USART in Smartcard mode (SCEN bit).
-2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Clock Output is also enabled (CLKEN).
-2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-2462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set CLKEN in CR2 using @ref LL_USART_EnableSCLKOutput() function
-2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set SCEN in CR3 using @ref LL_USART_EnableSmartcard() function
-2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Smartcard Mode
-2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using
-2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigSmartcardMode\n
-2471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigSmartcardMode\n
-2472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigSmartcardMode\n
-2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigSmartcardMode\n
-2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigSmartcardMode
-2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigSmartcardMode(USART_TypeDef *USARTx)
-2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Smartcard mode, the following bits must be kept cleared:
-2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN bit in the USART_CR2 register,
- ARM GAS /tmp/ccLSPxIe.s page 471
-
-
-2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN and HDSEL bits in the USART_CR3 register.
-2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN));
-2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL));
-2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Configure Stop bits to 1.5 bits */
-2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Synchronous mode is activated by default */
-2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN));
-2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Smartcard mode */
-2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN);
-2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Irda Mode
-2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In IRDA mode, the following bits must be kept cleared:
-2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
-2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register,
-2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
-2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
-2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * This function also sets the UART/USART in IRDA mode (IREN bit).
-2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
-2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance.
-2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Configure STOP in CR2 using @ref LL_USART_SetStopBitsLength() function
-2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set IREN in CR3 using @ref LL_USART_EnableIrda() function
-2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Irda Mode
-2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Power mode, ...) should be set using
-2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigIrdaMode\n
-2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigIrdaMode\n
-2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigIrdaMode\n
-2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigIrdaMode\n
-2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigIrdaMode\n
-2518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigIrdaMode
-2519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigIrdaMode(USART_TypeDef *USARTx)
-2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In IRDA mode, the following bits must be kept cleared:
-2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN, STOP and CLKEN bits in the USART_CR2 register,
-2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - SCEN and HDSEL bits in the USART_CR3 register.
-2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN | USART_CR2_STOP));
-2529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL));
-2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in IRDA mode */
-2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_IREN);
-2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Multi processor Mode
-2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (several USARTs connected in a network, one of the USARTs can be the master,
-2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * its TX output connected to the RX inputs of the other slaves USARTs).
-2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In MultiProcessor mode, the following bits must be kept cleared:
- ARM GAS /tmp/ccLSPxIe.s page 472
-
-
-2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
-2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register,
-2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
-2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
-2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
-2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
-2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
-2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
-2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
-2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function
-2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
-2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Multi processor Mode
-2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Wake Up Method, Node address, ...) should be set using
-2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
-2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigMultiProcessMode\n
-2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigMultiProcessMode\n
-2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigMultiProcessMode\n
-2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigMultiProcessMode\n
-2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigMultiProcessMode
-2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
-2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Multi Processor mode, the following bits must be kept cleared:
-2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN and CLKEN bits in the USART_CR2 register,
-2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN, SCEN and HDSEL bits in the USART_CR3 register.
-2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
-2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
-2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
-2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_FLAG_Management FLAG_Management
-2576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
-2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Flag is set or not
-2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR PE LL_USART_IsActiveFlag_PE
-2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
-2586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
-2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Framing Error Flag is set or not
-2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR FE LL_USART_IsActiveFlag_FE
-2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccLSPxIe.s page 473
-
-
-2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx)
-2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
-2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Noise error detected Flag is set or not
-2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR NE LL_USART_IsActiveFlag_NE
-2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_NE(const USART_TypeDef *USARTx)
-2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)) ? 1UL : 0UL);
-2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART OverRun Error Flag is set or not
-2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR ORE LL_USART_IsActiveFlag_ORE
-2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
-2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
-2621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART IDLE line detected Flag is set or not
-2625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR IDLE LL_USART_IsActiveFlag_IDLE
-2626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_IDLE(const USART_TypeDef *USARTx)
-2630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)) ? 1UL : 0UL);
-2632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Read Data Register Not Empty Flag is set or not
-2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RXNE LL_USART_IsActiveFlag_RXNE
-2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RXNE(const USART_TypeDef *USARTx)
-2641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)) ? 1UL : 0UL);
-2643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmission Complete Flag is set or not
-2647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TC LL_USART_IsActiveFlag_TC
-2648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TC(const USART_TypeDef *USARTx)
-2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 474
-
-
-2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL);
-2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Data Register Empty Flag is set or not
-2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE
-2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TXE(const USART_TypeDef *USARTx)
-2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)) ? 1UL : 0UL);
-2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART LIN Break Detection Flag is set or not
-2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR LBDF LL_USART_IsActiveFlag_LBD
-2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
-2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
-2678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS interrupt Flag is set or not
-2682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-2683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-2684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTSIF LL_USART_IsActiveFlag_nCTS
-2685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_nCTS(const USART_TypeDef *USARTx)
-2689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)) ? 1UL : 0UL);
-2691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS Flag is set or not
-2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-2697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CTS LL_USART_IsActiveFlag_CTS
-2698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CTS(const USART_TypeDef *USARTx)
-2702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)) ? 1UL : 0UL);
-2704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Time Out Flag is set or not
-2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RTOF LL_USART_IsActiveFlag_RTO
-2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccLSPxIe.s page 475
-
-
-2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx)
-2713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
-2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Flag is set or not
-2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR EOBF LL_USART_IsActiveFlag_EOB
-2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_EOB(const USART_TypeDef *USARTx)
-2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_EOBF) == (USART_ISR_EOBF)) ? 1UL : 0UL);
-2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Error Flag is set or not
-2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
-2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
-2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE
-2735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABRE(const USART_TypeDef *USARTx)
-2739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRE) == (USART_ISR_ABRE)) ? 1UL : 0UL);
-2741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Flag is set or not
-2745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
-2746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
-2747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR ABRF LL_USART_IsActiveFlag_ABR
-2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ABR(const USART_TypeDef *USARTx)
-2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ABRF) == (USART_ISR_ABRF)) ? 1UL : 0UL);
-2754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Busy Flag is set or not
-2758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR BUSY LL_USART_IsActiveFlag_BUSY
-2759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_BUSY(const USART_TypeDef *USARTx)
-2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)) ? 1UL : 0UL);
-2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccLSPxIe.s page 476
-
-
-2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Flag is set or not
-2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM
-2770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx)
-2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)) ? 1UL : 0UL);
-2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Send Break Flag is set or not
-2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR SBKF LL_USART_IsActiveFlag_SBK
-2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_SBK(const USART_TypeDef *USARTx)
-2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
-2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
-2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU
-2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RWU(const USART_TypeDef *USARTx)
-2796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)) ? 1UL : 0UL);
-2798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
-2801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
-2802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Wake Up from stop mode Flag is set or not
-2804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-2805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
-2806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR WUF LL_USART_IsActiveFlag_WKUP
-2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_WKUP(const USART_TypeDef *USARTx)
-2811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)) ? 1UL : 0UL);
-2813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
-2816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
-2817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Enable Acknowledge Flag is set or not
-2819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TEACK LL_USART_IsActiveFlag_TEACK
-2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx)
- ARM GAS /tmp/ccLSPxIe.s page 477
-
-
-2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL);
-2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_ISR_REACK)
-2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Enable Acknowledge Flag is set or not
-2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK
-2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_REACK(const USART_TypeDef *USARTx)
-2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)) ? 1UL : 0UL);
-2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_ISR_REACK */
-2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
-2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
-2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
-2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT
-2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TCBGT(const USART_TypeDef *USARTx)
-2850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TCBGT) == (USART_ISR_TCBGT)) ? 1UL : 0UL);
-2852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
-2855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Parity Error Flag
-2857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR PECF LL_USART_ClearFlag_PE
-2858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
-2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_PECF);
-2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Framing Error Flag
-2868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR FECF LL_USART_ClearFlag_FE
-2869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
-2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_FECF);
-2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Noise Error detected Flag
-2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR NCF LL_USART_ClearFlag_NE
-2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccLSPxIe.s page 478
-
-
-2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
-2884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_NCF);
-2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear OverRun Error Flag
-2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR ORECF LL_USART_ClearFlag_ORE
-2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_ORE(USART_TypeDef *USARTx)
-2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_ORECF);
-2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear IDLE line detected Flag
-2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE
-2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
-2906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_IDLECF);
-2908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Transmission Complete Flag
-2912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCCF LL_USART_ClearFlag_TC
-2913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_TC(USART_TypeDef *USARTx)
-2917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_TCCF);
-2919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
-2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
-2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Smartcard Transmission Complete Before Guard Time Flag
-2925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR TCBGTCF LL_USART_ClearFlag_TCBGT
-2926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_TCBGT(USART_TypeDef *USARTx)
-2930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_TCBGTCF);
-2932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
-2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear LIN Break Detection Flag
-2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
- ARM GAS /tmp/ccLSPxIe.s page 479
-
-
-2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD
-2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
-2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_LBDCF);
-2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear CTS Interrupt Flag
-2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR CTSCF LL_USART_ClearFlag_nCTS
-2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_nCTS(USART_TypeDef *USARTx)
-2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
-2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Receiver Time Out Flag
-2963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR RTOCF LL_USART_ClearFlag_RTO
-2964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_RTO(USART_TypeDef *USARTx)
-2968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_RTOCF);
-2970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear End Of Block Flag
-2974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-2975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-2976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR EOBCF LL_USART_ClearFlag_EOB
-2977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_EOB(USART_TypeDef *USARTx)
-2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_EOBCF);
-2983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-2984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Character Match Flag
-2987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR CMCF LL_USART_ClearFlag_CM
-2988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-2989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-2990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_CM(USART_TypeDef *USARTx)
-2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CMCF);
-2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 480
-
-
-2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
-2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
-2998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Wake Up from stop mode Flag
-3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
-3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR WUCF LL_USART_ClearFlag_WKUP
-3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_WKUP(USART_TypeDef *USARTx)
-3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_WUCF);
-3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
-3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
-3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
-3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management
-3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
-3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable IDLE Interrupt
-3023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_EnableIT_IDLE
-3024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_IDLE(USART_TypeDef *USARTx)
-3028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-3030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable RX Not Empty Interrupt
-3034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RXNEIE LL_USART_EnableIT_RXNE
-3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RXNE(USART_TypeDef *USARTx)
-3039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-3041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Transmission Complete Interrupt
-3045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TCIE LL_USART_EnableIT_TC
-3046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TC(USART_TypeDef *USARTx)
-3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE);
- ARM GAS /tmp/ccLSPxIe.s page 481
-
-
-3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable TX Empty Interrupt
-3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
-3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TXE(USART_TypeDef *USARTx)
-3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TXEIE);
-3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Parity Error Interrupt
-3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_EnableIT_PE
-3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
-3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
-3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Character Match Interrupt
-3078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_EnableIT_CM
-3079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_CM(USART_TypeDef *USARTx)
-3083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_CMIE);
-3085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Receiver Timeout Interrupt
-3089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_EnableIT_RTO
-3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_RTO(USART_TypeDef *USARTx)
-3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RTOIE);
-3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable End Of Block Interrupt
-3100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 EOBIE LL_USART_EnableIT_EOB
-3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_EOB(USART_TypeDef *USARTx)
-3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE);
- ARM GAS /tmp/ccLSPxIe.s page 482
-
-
-3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable LIN Break Detection Interrupt
-3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD
-3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_LBD(USART_TypeDef *USARTx)
-3120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, USART_CR2_LBDIE);
-3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Error Interrupt
-3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a fram
-3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
-3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited
-3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
-3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
-3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_ERROR(USART_TypeDef *USARTx)
-3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_EIE);
-3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable CTS Interrupt
-3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSIE LL_USART_EnableIT_CTS
-3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_CTS(USART_TypeDef *USARTx)
-3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_CTSIE);
-3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
-3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
-3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Wake Up from Stop Mode Interrupt
-3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
-3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_EnableIT_WKUP
-3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_WKUP(USART_TypeDef *USARTx)
-3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_WUFIE);
-3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 483
-
-
-3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
-3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
-3169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
-3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
-3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt
-3173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_EnableIT_TCBGT
-3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_TCBGT(USART_TypeDef *USARTx)
-3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
-3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
-3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable IDLE Interrupt
-3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
-3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_IDLE(USART_TypeDef *USARTx)
-3192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_IDLEIE);
-3194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable RX Not Empty Interrupt
-3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RXNEIE LL_USART_DisableIT_RXNE
-3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_RXNE(USART_TypeDef *USARTx)
-3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RXNEIE);
-3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Transmission Complete Interrupt
-3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TCIE LL_USART_DisableIT_TC
-3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TC(USART_TypeDef *USARTx)
-3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TCIE);
-3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable TX Empty Interrupt
-3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_DisableIT_TXE
-3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 484
-
-
-3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
-3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
-3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Parity Error Interrupt
-3231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_DisableIT_PE
-3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_PE(USART_TypeDef *USARTx)
-3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_PEIE);
-3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Character Match Interrupt
-3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_DisableIT_CM
-3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
-3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_CMIE);
-3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Receiver Timeout Interrupt
-3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_DisableIT_RTO
-3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_RTO(USART_TypeDef *USARTx)
-3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_RTOIE);
-3260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable End Of Block Interrupt
-3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 EOBIE LL_USART_DisableIT_EOB
-3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_EOB(USART_TypeDef *USARTx)
-3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_EOBIE);
-3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable LIN Break Detection Interrupt
-3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD
- ARM GAS /tmp/ccLSPxIe.s page 485
-
-
-3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
-3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
-3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Error Interrupt
-3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a fram
-3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the USARTx_ISR register).
-3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited
-3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
-3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_DisableIT_ERROR
-3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_ERROR(USART_TypeDef *USARTx)
-3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
-3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable CTS Interrupt
-3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSIE LL_USART_DisableIT_CTS
-3308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_CTS(USART_TypeDef *USARTx)
-3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_CTSIE);
-3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
-3317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
-3318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Wake Up from Stop Mode Interrupt
-3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
-3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_DisableIT_WKUP
-3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_WKUP(USART_TypeDef *USARTx)
-3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_WUFIE);
-3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
-3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
-3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
-3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
-3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt
- ARM GAS /tmp/ccLSPxIe.s page 486
-
-
-3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT
-3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx)
-3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_TCBGTIE);
-3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
-3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART IDLE Interrupt source is enabled or disabled.
-3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_IsEnabledIT_IDLE
-3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_IDLE(const USART_TypeDef *USARTx)
-3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
-3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
-3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RXNEIE LL_USART_IsEnabledIT_RXNE
-3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(const USART_TypeDef *USARTx)
-3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
-3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmission Complete Interrupt is enabled or disabled.
-3373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TCIE LL_USART_IsEnabledIT_TC
-3374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
-3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
-3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART TX Empty Interrupt is enabled or disabled.
-3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_IsEnabledIT_TXE
-3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TXE(const USART_TypeDef *USARTx)
-3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)) ? 1U : 0U);
-3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 487
-
-
-3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Interrupt is enabled or disabled.
-3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE
-3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx)
-3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)) ? 1UL : 0UL);
-3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Interrupt is enabled or disabled.
-3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_IsEnabledIT_CM
-3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CM(const USART_TypeDef *USARTx)
-3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)) ? 1UL : 0UL);
-3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled.
-3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO
-3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RTO(const USART_TypeDef *USARTx)
-3422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_RTOIE) == (USART_CR1_RTOIE)) ? 1UL : 0UL);
-3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART End Of Block Interrupt is enabled or disabled.
-3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 EOBIE LL_USART_IsEnabledIT_EOB
-3431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx)
-3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
-3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART LIN Break Detection Interrupt is enabled or disabled.
-3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
-3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
-3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_IsEnabledIT_LBD
-3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_LBD(const USART_TypeDef *USARTx)
-3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_LBDIE) == (USART_CR2_LBDIE)) ? 1UL : 0UL);
-3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 488
-
-
-3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Error Interrupt is enabled or disabled.
-3454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR
-3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_ERROR(const USART_TypeDef *USARTx)
-3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)) ? 1UL : 0UL);
-3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART CTS Interrupt is enabled or disabled.
-3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not
-3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance.
-3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSIE LL_USART_IsEnabledIT_CTS
-3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
-3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
-3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
-3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
-3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Wake Up from Stop Mode Interrupt is enabled or disabled.
-3480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
-3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
-3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUFIE LL_USART_IsEnabledIT_WKUP
-3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_WKUP(const USART_TypeDef *USARTx)
-3487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)) ? 1UL : 0UL);
-3489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
-3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
-3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
-3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
-3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Interrupt is enabled or
-3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
-3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
-3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_IsEnabledIT_TCBGT
-3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TCBGT(const USART_TypeDef *USARTx)
-3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_TCBGTIE) == (USART_CR3_TCBGTIE)) ? 1UL : 0UL);
-3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
- ARM GAS /tmp/ccLSPxIe.s page 489
-
-
-3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
-3511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_DMA_Management DMA_Management
-3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
-3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for reception
-3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_EnableDMAReq_RX
-3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_RX(USART_TypeDef *USARTx)
-3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAR);
-3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Mode for reception
-3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
-3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDMAReq_RX(USART_TypeDef *USARTx)
-3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_DMAR);
-3537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if DMA Mode is enabled for reception
-3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_IsEnabledDMAReq_RX
-3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_RX(const USART_TypeDef *USARTx)
-3546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
-3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for transmission
-3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
-3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMAReq_TX(USART_TypeDef *USARTx)
- 7079 .loc 7 3556 22 view .LVU2198
- 7080 .L381:
-3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR3, USART_CR3_DMAT);
- 7081 .loc 7 3558 3 discriminator 1 view .LVU2199
- 7082 .LBB591:
- 7083 .loc 7 3558 3 discriminator 1 view .LVU2200
- 7084 .loc 7 3558 3 discriminator 1 view .LVU2201
- ARM GAS /tmp/ccLSPxIe.s page 490
-
-
- 7085 .loc 7 3558 3 discriminator 1 view .LVU2202
- 7086 .LBB592:
- 7087 .LBI592:
- 7088 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h"
- 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
- 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
- 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
- 4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
- 5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
- 6:Drivers/CMSIS/Include/cmsis_gcc.h **** ******************************************************************************/
- 7:Drivers/CMSIS/Include/cmsis_gcc.h **** /*
- 8:Drivers/CMSIS/Include/cmsis_gcc.h **** * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- 9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
- 10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
- 11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
- 12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
- 13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
- 14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
- 15:Drivers/CMSIS/Include/cmsis_gcc.h **** *
- 16:Drivers/CMSIS/Include/cmsis_gcc.h **** * www.apache.org/licenses/LICENSE-2.0
- 17:Drivers/CMSIS/Include/cmsis_gcc.h **** *
- 18:Drivers/CMSIS/Include/cmsis_gcc.h **** * Unless required by applicable law or agreed to in writing, software
- 19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- 20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- 21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
- 22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
- 23:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 24:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 25:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __CMSIS_GCC_H
- 26:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_H
- 27:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
- 29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
- 31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
- 32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
- 33:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
- 35:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __has_builtin
- 36:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __has_builtin(x) (0)
- 37:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 38:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 39:Drivers/CMSIS/Include/cmsis_gcc.h **** /* CMSIS compiler specific defines */
- 40:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ASM
- 41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
- 42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
- 44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
- 45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
- 47:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_INLINE static inline
- 48:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 49:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_FORCEINLINE
- 50:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
- 51:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 52:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __NO_RETURN
- 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__))
- ARM GAS /tmp/ccLSPxIe.s page 491
-
-
- 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
- 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
- 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
- 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
- 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
- 62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
- 63:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 64:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_STRUCT
- 65:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
- 66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
- 68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
- 69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
- 71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 72:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
- 73:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
- 74:Drivers/CMSIS/Include/cmsis_gcc.h **** struct __attribute__((packed)) T_UINT32 { uint32_t v; };
- 75:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
- 76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
- 77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
- 79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 80:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
- 81:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
- 82:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
- 83:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
- 84:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE *)(void *)(addr))-
- 85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
- 87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
- 89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
- 90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- 91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
- 92:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ *)(const void *)(add
- 93:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 94:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_WRITE
- 95:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 96:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
- 97:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
- 98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
- 99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
- 100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
- 101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
- 103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- 104:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
- 105:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
- 106:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
- 107:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
- 108:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ *)(const void *)(add
- 109:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED
- ARM GAS /tmp/ccLSPxIe.s page 492
-
-
- 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
- 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
- 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
- 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 116:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 117:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
- 119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
- 120:Drivers/CMSIS/Include/cmsis_gcc.h **** \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
- 121:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
- 122:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 123:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
- 126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
- 127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
- 128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 129:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_irq(void)
- 130:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 131:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie i" : : : "memory");
- 132:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 133:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 134:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
- 137:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables IRQ interrupts by setting the I-bit in the CPSR.
- 138:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
- 139:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 140:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_irq(void)
- 141:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
- 143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 144:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 145:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
- 148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
- 149:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Control Register value
- 150:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 151:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
- 152:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 153:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 154:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
- 156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 158:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 159:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 161:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 162:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register (non-secure)
- 163:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the non-secure Control Register when in secure mode.
- 164:Drivers/CMSIS/Include/cmsis_gcc.h **** \return non-secure Control Register value
- 165:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 166:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
- 167:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 493
-
-
- 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 169:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
- 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 174:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 175:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 177:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register
- 178:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the Control Register.
- 179:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
- 180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
- 182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
- 184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 185:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 186:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 187:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 188:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 189:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Control Register (non-secure)
- 190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
- 191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
- 192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
- 194:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 195:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
- 196:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 197:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 198:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 199:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
- 202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
- 203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
- 204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
- 206:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 207:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 208:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 209:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
- 210:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 211:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 212:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 213:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
- 216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
- 217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
- 218:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 219:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_APSR(void)
- 220:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 221:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 222:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 223:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, apsr" : "=r" (result) );
- 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccLSPxIe.s page 494
-
-
- 225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 226:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 227:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
- 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
- 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
- 232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
- 234:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 235:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 236:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
- 238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 240:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 241:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 243:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer
- 244:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer (PSP).
- 245:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
- 246:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
- 248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 250:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 251:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp" : "=r" (result) );
- 252:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 253:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 254:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 255:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
- 259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
- 260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
- 261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
- 263:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 264:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 265:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 266:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
- 267:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 268:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 270:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 271:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
- 274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
- 275:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
- 276:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 277:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
- 278:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 279:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
- 280:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 281:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccLSPxIe.s page 495
-
-
- 282:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
- 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
- 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
- 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
- 290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 291:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
- 292:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 293:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 294:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 295:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
- 298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
- 299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
- 300:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 301:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSP(void)
- 302:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 303:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 304:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
- 306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 308:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 309:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 310:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 311:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 312:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer (non-secure)
- 313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
- 314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
- 315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
- 317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 319:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 320:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
- 321:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 322:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 323:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 324:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 325:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
- 328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
- 329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
- 330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
- 332:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 333:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
- 334:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 335:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 336:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 337:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 496
-
-
- 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
- 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
- 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
- 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
- 344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
- 346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 348:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 349:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 350:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
- 353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
- 354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
- 355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
- 357:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 358:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 359:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 360:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
- 361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 363:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 364:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 365:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 366:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Stack Pointer (non-secure)
- 367:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
- 368:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfStack Stack Pointer value to set
- 369:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
- 371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
- 373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 375:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 376:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 377:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 378:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask
- 379:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the priority mask bit from the Priority Mask Register.
- 380:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
- 381:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 382:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
- 383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 385:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
- 387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 389:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 390:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 391:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 392:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 393:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Priority Mask (non-secure)
- 394:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current state of the non-secure priority mask bit from the Priority Mask Reg
- 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value
- ARM GAS /tmp/ccLSPxIe.s page 497
-
-
- 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
- 398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 400:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
- 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 405:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 406:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 407:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
- 409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
- 410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
- 411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
- 413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 414:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
- 415:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 416:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 417:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
- 421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
- 422:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
- 423:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 424:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
- 425:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 426:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
- 427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 429:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 430:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- 432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- 433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
- 434:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 435:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable FIQ
- 436:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
- 437:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
- 438:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 439:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __enable_fault_irq(void)
- 440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
- 442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 443:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 444:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 446:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable FIQ
- 447:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Disables FIQ interrupts by setting the F-bit in the CPSR.
- 448:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
- 449:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 450:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __disable_fault_irq(void)
- 451:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory");
- ARM GAS /tmp/ccLSPxIe.s page 498
-
-
- 453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 454:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 455:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
- 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
- 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
- 460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
- 462:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 463:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 464:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
- 466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 468:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 469:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 471:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 472:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority (non-secure)
- 473:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Base Priority register when in secure state.
- 474:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
- 475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
- 477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 479:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 480:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
- 481:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 482:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 483:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 484:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 485:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
- 488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
- 489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
- 490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 491:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
- 492:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 493:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
- 494:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 495:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 496:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
- 500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
- 501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
- 502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 503:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
- 504:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 505:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
- 506:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 507:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 508:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 509:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccLSPxIe.s page 499
-
-
- 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
- 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
- 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
- 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
- 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
- 517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
- 519:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 520:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 521:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
- 524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
- 525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
- 526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
- 528:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 529:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 530:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 531:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
- 532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 534:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 535:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 536:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 537:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 538:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask (non-secure)
- 539:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Fault Mask register when in secure state.
- 540:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
- 541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
- 543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 545:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
- 547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 548:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 549:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 550:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 551:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 552:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 553:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask
- 554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
- 555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
- 556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
- 558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
- 560:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 561:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 562:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 563:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 564:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 565:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Fault Mask (non-secure)
- 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state.
- ARM GAS /tmp/ccLSPxIe.s page 500
-
-
- 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
- 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
- 570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
- 572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 574:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- 576:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- 577:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
- 578:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 579:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- 581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
- 582:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
- 585:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 586:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
- 587:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
- 588:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
- 590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
- 591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
- 593:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 594:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- 595:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- 596:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
- 597:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
- 598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- 601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 604:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 605:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
- 606:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 607:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit (non-secure)
- 608:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 609:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
- 610:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
- 612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
- 613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
- 615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- 617:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
- 618:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
- 619:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 620:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 621:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
- 622:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- ARM GAS /tmp/ccLSPxIe.s page 501
-
-
- 624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 626:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 627:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
- 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
- 632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
- 633:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 634:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
- 635:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- 636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
- 638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- 640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- 641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
- 642:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
- 643:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 644:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
- 645:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 647:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 648:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 650:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 651:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
- 652:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 653:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
- 654:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
- 656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
- 657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
- 659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- 661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
- 662:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)ProcStackPtrLimit;
- 663:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 664:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
- 665:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 666:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 667:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 668:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 669:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
- 672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
- 674:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
- 675:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 676:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
- 677:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
- 678:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 679:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
- 680:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccLSPxIe.s page 502
-
-
- 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
- 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
- 688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 690:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 691:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 692:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- 694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
- 696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
- 698:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 699:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in sec
- 700:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSPLIM Register value
- 701:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 702:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
- 703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- 705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- 706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
- 707:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 708:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 709:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
- 710:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 711:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 714:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 715:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
- 718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 719:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
- 720:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
- 721:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 722:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
- 723:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
- 724:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
- 726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
- 728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- 729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- 730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
- 731:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 732:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
- 733:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 734:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 735:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 736:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
- ARM GAS /tmp/ccLSPxIe.s page 503
-
-
- 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
- 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
- 742:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
- 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
- 745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
- 747:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 748:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- 749:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- 750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
- 751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
- 753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 756:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 757:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
- 758:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
- 759:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 760:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
- 763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
- 764:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Floating Point Status/Control register value
- 765:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 766:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
- 767:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 768:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- 769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
- 770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
- 771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
- 772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
- 773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
- 774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
- 775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 776:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 777:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 778:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
- 779:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 780:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 781:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
- 783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 785:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 786:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 788:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set FPSCR
- 789:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Floating Point Status/Control register.
- 790:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] fpscr Floating Point Status/Control value to set
- 791:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 792:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
- 793:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
- ARM GAS /tmp/ccLSPxIe.s page 504
-
-
- 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
- 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
- 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
- 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
- 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
- 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
- 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
- 803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 804:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 805:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)fpscr;
- 806:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 808:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 809:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
- 811:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 812:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 813:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################## Core Instruction Access ######################### */
- 814:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
- 815:Drivers/CMSIS/Include/cmsis_gcc.h **** Access to dedicated instructions
- 816:Drivers/CMSIS/Include/cmsis_gcc.h **** @{
- 817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 818:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
- 820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
- 821:Drivers/CMSIS/Include/cmsis_gcc.h **** * Otherwise, use general registers, specified by constraint "r" */
- 822:Drivers/CMSIS/Include/cmsis_gcc.h **** #if defined (__thumb__) && !defined (__thumb2__)
- 823:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=l" (r)
- 824:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+l" (r)
- 825:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "l" (r)
- 826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
- 828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
- 829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
- 830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 831:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 833:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief No Operation
- 834:Drivers/CMSIS/Include/cmsis_gcc.h **** \details No Operation does nothing. This instruction can be used for code alignment purposes.
- 835:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 836:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NOP() __ASM volatile ("nop")
- 837:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 838:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
- 840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
- 841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
- 843:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 844:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 845:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 846:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Event
- 847:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Event is a hint instruction that permits the processor to enter
- 848:Drivers/CMSIS/Include/cmsis_gcc.h **** a low-power state until one of a number of events occurs.
- 849:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 850:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFE() __ASM volatile ("wfe")
- 851:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccLSPxIe.s page 505
-
-
- 852:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
- 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
- 858:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 859:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 861:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Instruction Synchronization Barrier
- 862:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Instruction Synchronization Barrier flushes the pipeline in the processor,
- 863:Drivers/CMSIS/Include/cmsis_gcc.h **** so that all instructions following the ISB are fetched from cache or memory,
- 864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
- 865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
- 867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 868:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("isb 0xF":::"memory");
- 869:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 870:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 871:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 872:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 873:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Synchronization Barrier
- 874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
- 875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
- 876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
- 878:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 879:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dsb 0xF":::"memory");
- 880:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 881:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 882:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
- 885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
- 886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
- 887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
- 889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 890:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("dmb 0xF":::"memory");
- 891:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 892:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 893:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 894:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 895:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (32 bit)
- 896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
- 897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
- 898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
- 899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
- 901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 902:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
- 903:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_bswap32(value);
- 904:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 905:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 906:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 907:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- ARM GAS /tmp/ccLSPxIe.s page 506
-
-
- 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 911:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 912:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
- 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes
- 916:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
- 917:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
- 918:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 919:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
- 920:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 922:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- 924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 925:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 926:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 927:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 928:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 929:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit)
- 930:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For exam
- 931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
- 932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
- 933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
- 935:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 936:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
- 937:Drivers/CMSIS/Include/cmsis_gcc.h **** return (int16_t)__builtin_bswap16(value);
- 938:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 939:Drivers/CMSIS/Include/cmsis_gcc.h **** int16_t result;
- 940:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- 942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- 943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- 944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 945:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 946:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 947:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 948:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Rotate Right in unsigned value (32 bit)
- 949:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Rotate Right (immediate) provides the value of the contents of a register rotated by a v
- 950:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op1 Value to rotate
- 951:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] op2 Number of Bits to rotate
- 952:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Rotated value
- 953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
- 955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
- 957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
- 958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 959:Drivers/CMSIS/Include/cmsis_gcc.h **** return op1;
- 960:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 961:Drivers/CMSIS/Include/cmsis_gcc.h **** return (op1 >> op2) | (op1 << (32U - op2));
- 962:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 963:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 964:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccLSPxIe.s page 507
-
-
- 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
- 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
- 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
- 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
- 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break
- 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value)
- 973:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 974:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 975:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- 976:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse bit order of value
- 977:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the bit order of the given value.
- 978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
- 979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
- 980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- 981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
- 982:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 983:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 984:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 985:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
- 986:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- 987:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
- 988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
- 989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- 990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
- 991:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
- 993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
- 994:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 995:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= 1U;
- 996:Drivers/CMSIS/Include/cmsis_gcc.h **** result |= value & 1U;
- 997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
- 998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
-1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
-1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
-1002:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1003:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1004:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1005:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1006:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Count leading zeros
-1007:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Counts the number of leading zeros of a data value.
-1008:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to count the leading zeros
-1009:Drivers/CMSIS/Include/cmsis_gcc.h **** \return number of leading zeros in value
-1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz
-1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
-1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
-1016:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-1017:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
-1018:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1019:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (8 bit)
-1020:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 8 bit value.
-1021:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
-1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr)
- ARM GAS /tmp/ccLSPxIe.s page 508
-
-
-1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
-1025:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
-1027:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-1030:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
-1031:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-1032:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
-1033:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1034:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
-1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
-1037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1038:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1039:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1040:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1041:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (16 bit)
-1042:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 16 bit values.
-1043:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
-1044:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint16_t at (*ptr)
-1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
-1047:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
-1049:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1050:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-1051:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-1052:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
-1053:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
-1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
-1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
-1059:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1060:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1061:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1062:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1063:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief LDR Exclusive (32 bit)
-1064:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive LDR instruction for 32 bit values.
-1065:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to data
-1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
-1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
- 7089 .loc 8 1068 31 view .LVU2203
- 7090 .LBB593:
-1069:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 7091 .loc 8 1070 5 view .LVU2204
-1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 7092 .loc 8 1072 4 view .LVU2205
- 7093 00e8 7D4A ldr r2, .L390+76
- 7094 00ea 02F10803 add r3, r2, #8
- 7095 .syntax unified
- ARM GAS /tmp/ccLSPxIe.s page 509
-
-
- 7096 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 7097 00ee 53E8003F ldrex r3, [r3]
- 7098 @ 0 "" 2
- 7099 .LVL637:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 7100 .loc 8 1073 4 view .LVU2206
- 7101 .loc 8 1073 4 is_stmt 0 view .LVU2207
- 7102 .thumb
- 7103 .syntax unified
- 7104 .LBE593:
- 7105 .LBE592:
- 7106 .loc 7 3558 3 discriminator 1 view .LVU2208
- 7107 00f2 43F08003 orr r3, r3, #128
- 7108 .LVL638:
- 7109 .loc 7 3558 3 is_stmt 1 discriminator 1 view .LVU2209
- 7110 .LBB594:
- 7111 .LBI594:
-1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1075:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1076:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
-1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
-1080:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
-1081:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
-1082:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
-1083:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
-1084:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1085:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-1086:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
-1088:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
-1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1092:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1093:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1094:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1095:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (16 bit)
-1096:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 16 bit values.
-1097:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
-1098:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
-1099:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
-1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
-1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-1103:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
-1105:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1106:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-1107:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
-1108:Drivers/CMSIS/Include/cmsis_gcc.h **** }
-1109:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1110:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1111:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
-1112:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (32 bit)
-1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values.
- ARM GAS /tmp/ccLSPxIe.s page 510
-
-
-1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store
-1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location
-1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded
-1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
-1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
- 7112 .loc 8 1119 31 view .LVU2210
- 7113 .LBB595:
-1120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
-1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 7114 .loc 8 1121 4 view .LVU2211
-1122:Drivers/CMSIS/Include/cmsis_gcc.h ****
-1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 7115 .loc 8 1123 4 view .LVU2212
- 7116 00f6 0832 adds r2, r2, #8
- 7117 .syntax unified
- 7118 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 7119 00f8 42E80031 strex r1, r3, [r2]
- 7120 @ 0 "" 2
- 7121 .LVL639:
-1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 7122 .loc 8 1124 4 view .LVU2213
- 7123 .loc 8 1124 4 is_stmt 0 view .LVU2214
- 7124 .thumb
- 7125 .syntax unified
- 7126 .LBE595:
- 7127 .LBE594:
- 7128 .loc 7 3558 3 discriminator 1 view .LVU2215
- 7129 00fc 0029 cmp r1, #0
- 7130 00fe F3D1 bne .L381
- 7131 .LBE591:
- 7132 .loc 7 3558 3 is_stmt 1 discriminator 2 view .LVU2216
- 7133 .LVL640:
- 7134 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU2217
- 7135 .LBE590:
-2408:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7);
- 7136 .loc 1 2408 3 is_stmt 1 view .LVU2218
- 7137 .LBB596:
- 7138 .LBI596:
-2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 direct mode error flag.
-2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF0 LL_DMA_ClearFlag_DME0
-2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME0(DMA_TypeDef *DMAx)
-2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF0);
-2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 direct mode error flag.
-2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF1 LL_DMA_ClearFlag_DME1
-2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
- ARM GAS /tmp/ccLSPxIe.s page 511
-
-
-2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx)
-2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF1);
-2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 direct mode error flag.
-2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF2 LL_DMA_ClearFlag_DME2
-2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME2(DMA_TypeDef *DMAx)
-2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF2);
-2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 direct mode error flag.
-2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CDMEIF3 LL_DMA_ClearFlag_DME3
-2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME3(DMA_TypeDef *DMAx)
-2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF3);
-2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 direct mode error flag.
-2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF4 LL_DMA_ClearFlag_DME4
-2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME4(DMA_TypeDef *DMAx)
-2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF4);
-2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 direct mode error flag.
-2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF5 LL_DMA_ClearFlag_DME5
-2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME5(DMA_TypeDef *DMAx)
-2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF5);
-2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 direct mode error flag.
-2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF6 LL_DMA_ClearFlag_DME6
-2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx)
- ARM GAS /tmp/ccLSPxIe.s page 512
-
-
-2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6);
-2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 direct mode error flag.
-2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF7 LL_DMA_ClearFlag_DME7
-2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME7(DMA_TypeDef *DMAx)
-2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF7);
-2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 FIFO error flag.
-2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CFEIF0 LL_DMA_ClearFlag_FE0
-2461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE0(DMA_TypeDef *DMAx)
-2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF0);
-2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 1 FIFO error flag.
-2471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CFEIF1 LL_DMA_ClearFlag_FE1
-2472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE1(DMA_TypeDef *DMAx)
-2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF1);
-2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 FIFO error flag.
-2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CFEIF2 LL_DMA_ClearFlag_FE2
-2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE2(DMA_TypeDef *DMAx)
-2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF2);
-2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 FIFO error flag.
-2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CFEIF3 LL_DMA_ClearFlag_FE3
-2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE3(DMA_TypeDef *DMAx)
-2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3);
- ARM GAS /tmp/ccLSPxIe.s page 513
-
-
-2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 FIFO error flag.
-2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF4 LL_DMA_ClearFlag_FE4
-2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE4(DMA_TypeDef *DMAx)
-2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF4);
-2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 FIFO error flag.
-2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF5 LL_DMA_ClearFlag_FE5
-2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE5(DMA_TypeDef *DMAx)
-2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF5);
-2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 6 FIFO error flag.
-2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF6 LL_DMA_ClearFlag_FE6
-2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE6(DMA_TypeDef *DMAx)
-2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF6);
-2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 FIFO error flag.
-2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF7 LL_DMA_ClearFlag_FE7
-2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_FE7(DMA_TypeDef *DMAx)
-2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CFEIF7);
-2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
-2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_IT_Management IT_Management
-2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
-2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Half transfer interrupt.
-2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR HTIE LL_DMA_EnableIT_HT
- ARM GAS /tmp/ccLSPxIe.s page 514
-
-
-2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Stream)
-2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
-2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Transfer error interrupt.
-2576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR TEIE LL_DMA_EnableIT_TE
-2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-2586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Stream)
-2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
-2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
-2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
-2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
-2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Enable Transfer complete interrupt.
-2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR TCIE LL_DMA_EnableIT_TC
-2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
-2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
-2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
-2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
-2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
-2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
-2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
-2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
-2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
-2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
-2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Stream)
- 7139 .loc 6 2609 22 view .LVU2219
- 7140 .LBB597:
-2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
-2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA
- ARM GAS /tmp/ccLSPxIe.s page 515
-
-
- 7141 .loc 6 2611 3 view .LVU2220
- 7142 0100 784B ldr r3, .L390+80
- 7143 0102 D3F8B820 ldr r2, [r3, #184]
- 7144 0106 42F01002 orr r2, r2, #16
- 7145 010a C3F8B820 str r2, [r3, #184]
- 7146 .LVL641:
- 7147 .loc 6 2611 3 is_stmt 0 view .LVU2221
- 7148 .LBE597:
- 7149 .LBE596:
-2409:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2);
- 7150 .loc 1 2409 3 is_stmt 1 view .LVU2222
- 7151 .LBB598:
- 7152 .LBI598:
-2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7153 .loc 6 2589 22 view .LVU2223
- 7154 .LBB599:
-2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7155 .loc 6 2591 3 view .LVU2224
- 7156 010e D3F8B820 ldr r2, [r3, #184]
- 7157 0112 42F00402 orr r2, r2, #4
- 7158 0116 C3F8B820 str r2, [r3, #184]
- 7159 .LVL642:
-2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7160 .loc 6 2591 3 is_stmt 0 view .LVU2225
- 7161 .LBE599:
- 7162 .LBE598:
-2410:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2);
- 7163 .loc 1 2410 3 is_stmt 1 view .LVU2226
- 7164 .LBB600:
- 7165 .LBI600:
-2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7166 .loc 6 2277 22 view .LVU2227
- 7167 .LBB601:
-2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7168 .loc 6 2279 3 view .LVU2228
- 7169 011a 4FF00062 mov r2, #134217728
- 7170 011e DA60 str r2, [r3, #12]
- 7171 .LVL643:
-2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7172 .loc 6 2279 3 is_stmt 0 view .LVU2229
- 7173 .LBE601:
- 7174 .LBE600:
-2411:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART
- 7175 .loc 1 2411 3 is_stmt 1 view .LVU2230
- 7176 .LBB602:
- 7177 .LBI602:
-2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7178 .loc 6 2365 22 view .LVU2231
- 7179 .LBB603:
-2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7180 .loc 6 2367 3 view .LVU2232
- 7181 0120 4FF00072 mov r2, #33554432
- 7182 0124 DA60 str r2, [r3, #12]
- 7183 .LVL644:
-2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7184 .loc 6 2367 3 is_stmt 0 view .LVU2233
- 7185 .LBE603:
- ARM GAS /tmp/ccLSPxIe.s page 516
-
-
- 7186 .LBE602:
-2412:Src/main.c ****
- 7187 .loc 1 2412 3 is_stmt 1 view .LVU2234
- 7188 0126 704A ldr r2, .L390+84
- 7189 .LVL645:
- 7190 .LBB604:
- 7191 .LBI604:
- 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7192 .loc 6 621 26 view .LVU2235
- 7193 .LBB605:
- 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7194 .loc 6 623 3 view .LVU2236
- 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7195 .loc 6 623 11 is_stmt 0 view .LVU2237
- 7196 0128 D3F8B830 ldr r3, [r3, #184]
- 7197 012c 03F0C003 and r3, r3, #192
- 7198 .LVL646:
- 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7199 .loc 6 623 11 view .LVU2238
- 7200 .LBE605:
- 7201 .LBE604:
- 7202 .LBB606:
- 7203 .LBI606:
-1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7204 .loc 6 1425 22 is_stmt 1 view .LVU2239
- 7205 .LBB607:
-1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7206 .loc 6 1428 3 view .LVU2240
-1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 7207 .loc 6 1428 6 is_stmt 0 view .LVU2241
- 7208 0130 402B cmp r3, #64
- 7209 0132 00F08480 beq .L387
-1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
- 7210 .loc 6 1436 5 is_stmt 1 view .LVU2242
- 7211 0136 6B4B ldr r3, .L390+80
- 7212 .LVL647:
-1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
- 7213 .loc 6 1436 5 is_stmt 0 view .LVU2243
- 7214 0138 C3F8C020 str r2, [r3, #192]
-1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7215 .loc 6 1437 5 is_stmt 1 view .LVU2244
- 7216 013c 6B4A ldr r2, .L390+88
- 7217 013e C3F8C420 str r2, [r3, #196]
- 7218 .L383:
- 7219 .LVL648:
-1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7220 .loc 6 1437 5 is_stmt 0 view .LVU2245
- 7221 .LBE607:
- 7222 .LBE606:
-2417:Src/main.c **** SD_SLIDE = 0;
- 7223 .loc 1 2417 2 is_stmt 1 view .LVU2246
-2417:Src/main.c **** SD_SLIDE = 0;
- 7224 .loc 1 2417 10 is_stmt 0 view .LVU2247
- 7225 0142 0024 movs r4, #0
- 7226 0144 6A4B ldr r3, .L390+92
- 7227 0146 1C60 str r4, [r3]
-2418:Src/main.c **** //Reset all periphery
- ARM GAS /tmp/ccLSPxIe.s page 517
-
-
- 7228 .loc 1 2418 2 is_stmt 1 view .LVU2248
-2418:Src/main.c **** //Reset all periphery
- 7229 .loc 1 2418 11 is_stmt 0 view .LVU2249
- 7230 0148 6A4B ldr r3, .L390+96
- 7231 014a 1C60 str r4, [r3]
-2420:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET);
- 7232 .loc 1 2420 2 is_stmt 1 view .LVU2250
- 7233 014c 6A4E ldr r6, .L390+100
- 7234 014e 2246 mov r2, r4
- 7235 0150 0821 movs r1, #8
- 7236 0152 3046 mov r0, r6
- 7237 0154 FFF7FEFF bl HAL_GPIO_WritePin
- 7238 .LVL649:
-2421:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET);
- 7239 .loc 1 2421 2 view .LVU2251
- 7240 0158 2246 mov r2, r4
- 7241 015a 8021 movs r1, #128
- 7242 015c 3046 mov r0, r6
- 7243 015e FFF7FEFF bl HAL_GPIO_WritePin
- 7244 .LVL650:
-2422:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET);
- 7245 .loc 1 2422 2 view .LVU2252
- 7246 0162 664F ldr r7, .L390+104
- 7247 0164 2246 mov r2, r4
- 7248 0166 4FF48071 mov r1, #256
- 7249 016a 3846 mov r0, r7
- 7250 016c FFF7FEFF bl HAL_GPIO_WritePin
- 7251 .LVL651:
-2423:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET);
- 7252 .loc 1 2423 2 view .LVU2253
- 7253 0170 2246 mov r2, r4
- 7254 0172 1021 movs r1, #16
- 7255 0174 3046 mov r0, r6
- 7256 0176 FFF7FEFF bl HAL_GPIO_WritePin
- 7257 .LVL652:
-2424:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET);
- 7258 .loc 1 2424 2 view .LVU2254
- 7259 017a DFF89C81 ldr r8, .L390+132
- 7260 017e 2246 mov r2, r4
- 7261 0180 4FF48061 mov r1, #1024
- 7262 0184 4046 mov r0, r8
- 7263 0186 FFF7FEFF bl HAL_GPIO_WritePin
- 7264 .LVL653:
-2425:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET);
- 7265 .loc 1 2425 2 view .LVU2255
- 7266 018a 5D4D ldr r5, .L390+108
- 7267 018c 2246 mov r2, r4
- 7268 018e 0821 movs r1, #8
- 7269 0190 2846 mov r0, r5
- 7270 0192 FFF7FEFF bl HAL_GPIO_WritePin
- 7271 .LVL654:
-2426:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET);
- 7272 .loc 1 2426 2 view .LVU2256
- 7273 0196 2246 mov r2, r4
- 7274 0198 0121 movs r1, #1
- 7275 019a 2846 mov r0, r5
- 7276 019c FFF7FEFF bl HAL_GPIO_WritePin
- ARM GAS /tmp/ccLSPxIe.s page 518
-
-
- 7277 .LVL655:
-2427:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
- 7278 .loc 1 2427 2 view .LVU2257
- 7279 01a0 2246 mov r2, r4
- 7280 01a2 0221 movs r1, #2
- 7281 01a4 2846 mov r0, r5
- 7282 01a6 FFF7FEFF bl HAL_GPIO_WritePin
- 7283 .LVL656:
-2428:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
- 7284 .loc 1 2428 2 view .LVU2258
- 7285 01aa 2246 mov r2, r4
- 7286 01ac 4FF40061 mov r1, #2048
- 7287 01b0 4046 mov r0, r8
- 7288 01b2 FFF7FEFF bl HAL_GPIO_WritePin
- 7289 .LVL657:
-2429:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++)
- 7290 .loc 1 2429 2 view .LVU2259
- 7291 01b6 2246 mov r2, r4
- 7292 01b8 2021 movs r1, #32
- 7293 01ba 3046 mov r0, r6
- 7294 01bc FFF7FEFF bl HAL_GPIO_WritePin
- 7295 .LVL658:
-2439:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC
- 7296 .loc 1 2439 2 view .LVU2260
- 7297 01c0 06F50066 add r6, r6, #2048
- 7298 01c4 0122 movs r2, #1
- 7299 01c6 4FF48061 mov r1, #1024
- 7300 01ca 3046 mov r0, r6
- 7301 01cc FFF7FEFF bl HAL_GPIO_WritePin
- 7302 .LVL659:
-2440:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
- 7303 .loc 1 2440 2 view .LVU2261
- 7304 01d0 DFF84891 ldr r9, .L390+136
- 7305 01d4 0122 movs r2, #1
- 7306 01d6 4021 movs r1, #64
- 7307 01d8 4846 mov r0, r9
- 7308 01da FFF7FEFF bl HAL_GPIO_WritePin
- 7309 .LVL660:
-2441:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
- 7310 .loc 1 2441 2 view .LVU2262
- 7311 01de 0122 movs r2, #1
- 7312 01e0 4FF48041 mov r1, #16384
- 7313 01e4 3046 mov r0, r6
- 7314 01e6 FFF7FEFF bl HAL_GPIO_WritePin
- 7315 .LVL661:
-2442:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1
- 7316 .loc 1 2442 2 view .LVU2263
- 7317 01ea 0122 movs r2, #1
- 7318 01ec 4FF48041 mov r1, #16384
- 7319 01f0 4846 mov r0, r9
- 7320 01f2 FFF7FEFF bl HAL_GPIO_WritePin
- 7321 .LVL662:
-2443:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- 7322 .loc 1 2443 2 view .LVU2264
- 7323 01f6 0122 movs r2, #1
- 7324 01f8 4FF48041 mov r1, #16384
- 7325 01fc 4046 mov r0, r8
- ARM GAS /tmp/ccLSPxIe.s page 519
-
-
- 7326 01fe FFF7FEFF bl HAL_GPIO_WritePin
- 7327 .LVL663:
-2444:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- 7328 .loc 1 2444 2 view .LVU2265
- 7329 0202 0122 movs r2, #1
- 7330 0204 4021 movs r1, #64
- 7331 0206 2846 mov r0, r5
- 7332 0208 FFF7FEFF bl HAL_GPIO_WritePin
- 7333 .LVL664:
-2445:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
- 7334 .loc 1 2445 2 view .LVU2266
- 7335 020c 0122 movs r2, #1
- 7336 020e 4FF48051 mov r1, #4096
- 7337 0212 3846 mov r0, r7
- 7338 0214 FFF7FEFF bl HAL_GPIO_WritePin
- 7339 .LVL665:
-2446:Src/main.c **** PA4_DAC_Set(0u, 0u);
- 7340 .loc 1 2446 2 view .LVU2267
- 7341 0218 0122 movs r2, #1
- 7342 021a 4FF48071 mov r1, #256
- 7343 021e 3046 mov r0, r6
- 7344 0220 FFF7FEFF bl HAL_GPIO_WritePin
- 7345 .LVL666:
-2447:Src/main.c ****
- 7346 .loc 1 2447 2 view .LVU2268
- 7347 0224 2146 mov r1, r4
- 7348 0226 2046 mov r0, r4
- 7349 0228 FFF7FEFF bl PA4_DAC_Set
- 7350 .LVL667:
-2451:Src/main.c **** {
- 7351 .loc 1 2451 2 view .LVU2269
-2451:Src/main.c **** {
- 7352 .loc 1 2451 6 is_stmt 0 view .LVU2270
- 7353 022c 0121 movs r1, #1
- 7354 022e 3846 mov r0, r7
- 7355 0230 FFF7FEFF bl HAL_GPIO_ReadPin
- 7356 .LVL668:
-2451:Src/main.c **** {
- 7357 .loc 1 2451 5 discriminator 1 view .LVU2271
- 7358 0234 50B1 cbz r0, .L388
- 7359 .L384:
-2482:Src/main.c **** }
- 7360 .loc 1 2482 2 is_stmt 1 view .LVU2272
- 7361 0236 FFF7FEFF bl AD9102_Init
- 7362 .LVL669:
-2483:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_
- 7363 .loc 1 2483 1 is_stmt 0 view .LVU2273
- 7364 023a BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
- 7365 .LVL670:
- 7366 .L387:
- 7367 .LBB609:
- 7368 .LBB608:
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
- 7369 .loc 6 1430 5 is_stmt 1 view .LVU2274
- 7370 023e 294B ldr r3, .L390+80
- 7371 .LVL671:
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
- ARM GAS /tmp/ccLSPxIe.s page 520
-
-
- 7372 .loc 6 1430 5 is_stmt 0 view .LVU2275
- 7373 0240 C3F8C420 str r2, [r3, #196]
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7374 .loc 6 1431 5 is_stmt 1 view .LVU2276
- 7375 0244 294A ldr r2, .L390+88
- 7376 0246 C3F8C020 str r2, [r3, #192]
- 7377 024a 7AE7 b .L383
- 7378 .LVL672:
- 7379 .L388:
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 7380 .loc 6 1431 5 is_stmt 0 view .LVU2277
- 7381 .LBE608:
- 7382 .LBE609:
-2454:Src/main.c **** {
- 7383 .loc 1 2454 3 is_stmt 1 view .LVU2278
-2454:Src/main.c **** {
- 7384 .loc 1 2454 7 is_stmt 0 view .LVU2279
- 7385 024c 4FF48071 mov r1, #256
- 7386 0250 2846 mov r0, r5
- 7387 0252 FFF7FEFF bl HAL_GPIO_ReadPin
- 7388 .LVL673:
-2454:Src/main.c **** {
- 7389 .loc 1 2454 6 discriminator 1 view .LVU2280
- 7390 0256 0028 cmp r0, #0
- 7391 0258 EDD1 bne .L384
-2457:Src/main.c **** if (test == 0) //0 - suc
- 7392 .loc 1 2457 4 is_stmt 1 view .LVU2281
-2457:Src/main.c **** if (test == 0) //0 - suc
- 7393 .loc 1 2457 11 is_stmt 0 view .LVU2282
- 7394 025a 2A48 ldr r0, .L390+112
- 7395 025c FFF7FEFF bl Mount_SD
- 7396 .LVL674:
-2457:Src/main.c **** if (test == 0) //0 - suc
- 7397 .loc 1 2457 9 discriminator 1 view .LVU2283
- 7398 0260 294B ldr r3, .L390+116
- 7399 0262 1860 str r0, [r3]
-2458:Src/main.c **** {
- 7400 .loc 1 2458 4 is_stmt 1 view .LVU2284
-2458:Src/main.c **** {
- 7401 .loc 1 2458 7 is_stmt 0 view .LVU2285
- 7402 0264 18B1 cbz r0, .L389
- 7403 .L385:
-2470:Src/main.c **** }
- 7404 .loc 1 2470 4 is_stmt 1 view .LVU2286
-2470:Src/main.c **** }
- 7405 .loc 1 2470 14 is_stmt 0 view .LVU2287
- 7406 0266 294B ldr r3, .L390+120
- 7407 0268 0122 movs r2, #1
- 7408 026a 1A70 strb r2, [r3]
- 7409 026c E3E7 b .L384
- 7410 .L389:
-2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 7411 .loc 1 2461 5 is_stmt 1 view .LVU2288
-2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 7412 .loc 1 2461 12 is_stmt 0 view .LVU2289
- 7413 026e 1E23 movs r3, #30
- 7414 0270 1A46 mov r2, r3
- ARM GAS /tmp/ccLSPxIe.s page 521
-
-
- 7415 0272 2749 ldr r1, .L390+124
- 7416 0274 2748 ldr r0, .L390+128
- 7417 0276 FFF7FEFF bl Seek_Read_File
- 7418 .LVL675:
-2461:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 7419 .loc 1 2461 10 discriminator 1 view .LVU2290
- 7420 027a 234C ldr r4, .L390+116
- 7421 027c 2060 str r0, [r4]
-2462:Src/main.c **** UART_rec_incr = 0;
- 7422 .loc 1 2462 5 is_stmt 1 view .LVU2291
-2462:Src/main.c **** UART_rec_incr = 0;
- 7423 .loc 1 2462 12 is_stmt 0 view .LVU2292
- 7424 027e 2148 ldr r0, .L390+112
- 7425 0280 FFF7FEFF bl Unmount_SD
- 7426 .LVL676:
-2462:Src/main.c **** UART_rec_incr = 0;
- 7427 .loc 1 2462 10 discriminator 1 view .LVU2293
- 7428 0284 2060 str r0, [r4]
-2463:Src/main.c **** flg_tmt = 0;//Reset the timeout flag
- 7429 .loc 1 2463 5 is_stmt 1 view .LVU2294
-2463:Src/main.c **** flg_tmt = 0;//Reset the timeout flag
- 7430 .loc 1 2463 19 is_stmt 0 view .LVU2295
- 7431 0286 0023 movs r3, #0
- 7432 0288 084A ldr r2, .L390+24
- 7433 028a 1380 strh r3, [r2] @ movhi
-2464:Src/main.c **** }
- 7434 .loc 1 2464 5 is_stmt 1 view .LVU2296
-2464:Src/main.c **** }
- 7435 .loc 1 2464 13 is_stmt 0 view .LVU2297
- 7436 028c 064A ldr r2, .L390+20
- 7437 028e 1370 strb r3, [r2]
- 7438 0290 E9E7 b .L385
- 7439 .L391:
- 7440 0292 00BF .align 2
- 7441 .L390:
- 7442 0294 00000000 .word TO6
- 7443 0298 00000000 .word TO7
- 7444 029c 00000000 .word TO7_before
- 7445 02a0 00000000 .word TO6_before
- 7446 02a4 00000000 .word TO6_uart
- 7447 02a8 00000000 .word flg_tmt
- 7448 02ac 00000000 .word UART_rec_incr
- 7449 02b0 00000000 .word fgoto
- 7450 02b4 00000000 .word sizeoffile
- 7451 02b8 00000000 .word u_tx_flg
- 7452 02bc 00000000 .word u_rx_flg
- 7453 02c0 00000000 .word Long_Data
- 7454 02c4 00000000 .word Def_setup
- 7455 02c8 00000000 .word LD1_def_setup
- 7456 02cc 00000000 .word LD2_def_setup
- 7457 02d0 00000000 .word Curr_setup
- 7458 02d4 00000000 .word LD1_curr_setup
- 7459 02d8 00000000 .word LD2_curr_setup
- 7460 02dc 00100040 .word 1073745920
- 7461 02e0 00100140 .word 1073811456
- 7462 02e4 00640240 .word 1073898496
- 7463 02e8 00000000 .word UART_DATA
- ARM GAS /tmp/ccLSPxIe.s page 522
-
-
- 7464 02ec 28100140 .word 1073811496
- 7465 02f0 00000000 .word SD_SEEK
- 7466 02f4 00000000 .word SD_SLIDE
- 7467 02f8 00080240 .word 1073874944
- 7468 02fc 000C0240 .word 1073875968
- 7469 0300 00000240 .word 1073872896
- 7470 0304 00000000 .word .LC0
- 7471 0308 00000000 .word test
- 7472 030c 00000000 .word CPU_state
- 7473 0310 00000000 .word COMMAND
- 7474 0314 04000000 .word .LC1
- 7475 0318 00040240 .word 1073873920
- 7476 031c 00140240 .word 1073878016
- 7477 .cfi_endproc
- 7478 .LFE1208:
- 7480 .section .text.DS1809_Pulse,"ax",%progbits
- 7481 .align 1
- 7482 .syntax unified
- 7483 .thumb
- 7484 .thumb_func
- 7486 DS1809_Pulse:
- 7487 .LVL677:
- 7488 .LFB1218:
-2849:Src/main.c **** for (uint16_t i = 0; i < count; i++)
- 7489 .loc 1 2849 1 is_stmt 1 view -0
- 7490 .cfi_startproc
- 7491 @ args = 0, pretend = 0, frame = 0
- 7492 @ frame_needed = 0, uses_anonymous_args = 0
-2849:Src/main.c **** for (uint16_t i = 0; i < count; i++)
- 7493 .loc 1 2849 1 is_stmt 0 view .LVU2299
- 7494 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 7495 .LCFI71:
- 7496 .cfi_def_cfa_offset 24
- 7497 .cfi_offset 4, -24
- 7498 .cfi_offset 5, -20
- 7499 .cfi_offset 6, -16
- 7500 .cfi_offset 7, -12
- 7501 .cfi_offset 8, -8
- 7502 .cfi_offset 14, -4
- 7503 0004 0746 mov r7, r0
- 7504 0006 0E46 mov r6, r1
- 7505 0008 9046 mov r8, r2
- 7506 000a 1D46 mov r5, r3
-2850:Src/main.c **** {
- 7507 .loc 1 2850 2 is_stmt 1 view .LVU2300
- 7508 .LBB610:
-2850:Src/main.c **** {
- 7509 .loc 1 2850 7 view .LVU2301
- 7510 .LVL678:
-2850:Src/main.c **** {
- 7511 .loc 1 2850 16 is_stmt 0 view .LVU2302
- 7512 000c 0024 movs r4, #0
-2850:Src/main.c **** {
- 7513 .loc 1 2850 2 view .LVU2303
- 7514 000e 16E0 b .L393
- 7515 .LVL679:
- 7516 .L401:
- ARM GAS /tmp/ccLSPxIe.s page 523
-
-
-2854:Src/main.c **** }
- 7517 .loc 1 2854 4 is_stmt 1 view .LVU2304
- 7518 0010 0022 movs r2, #0
- 7519 0012 0421 movs r1, #4
- 7520 0014 1448 ldr r0, .L404
- 7521 0016 FFF7FEFF bl HAL_GPIO_WritePin
- 7522 .LVL680:
- 7523 001a 14E0 b .L394
- 7524 .L402:
-2858:Src/main.c **** }
- 7525 .loc 1 2858 4 view .LVU2305
- 7526 001c 0022 movs r2, #0
- 7527 001e 0821 movs r1, #8
- 7528 0020 1148 ldr r0, .L404
- 7529 0022 FFF7FEFF bl HAL_GPIO_WritePin
- 7530 .LVL681:
- 7531 0026 10E0 b .L395
- 7532 .L403:
-2863:Src/main.c **** }
- 7533 .loc 1 2863 4 view .LVU2306
- 7534 0028 0122 movs r2, #1
- 7535 002a 0421 movs r1, #4
- 7536 002c 0E48 ldr r0, .L404
- 7537 002e FFF7FEFF bl HAL_GPIO_WritePin
- 7538 .LVL682:
- 7539 0032 0FE0 b .L396
- 7540 .L397:
-2869:Src/main.c **** }
- 7541 .loc 1 2869 3 view .LVU2307
- 7542 0034 2846 mov r0, r5
- 7543 0036 FFF7FEFF bl HAL_Delay
- 7544 .LVL683:
-2850:Src/main.c **** {
- 7545 .loc 1 2850 35 discriminator 2 view .LVU2308
- 7546 003a 0134 adds r4, r4, #1
- 7547 .LVL684:
-2850:Src/main.c **** {
- 7548 .loc 1 2850 35 is_stmt 0 discriminator 2 view .LVU2309
- 7549 003c A4B2 uxth r4, r4
- 7550 .LVL685:
- 7551 .L393:
-2850:Src/main.c **** {
- 7552 .loc 1 2850 25 is_stmt 1 discriminator 1 view .LVU2310
- 7553 003e 4445 cmp r4, r8
- 7554 0040 10D2 bcs .L400
-2852:Src/main.c **** {
- 7555 .loc 1 2852 3 view .LVU2311
-2852:Src/main.c **** {
- 7556 .loc 1 2852 6 is_stmt 0 view .LVU2312
- 7557 0042 002F cmp r7, #0
- 7558 0044 E4D1 bne .L401
- 7559 .L394:
-2856:Src/main.c **** {
- 7560 .loc 1 2856 3 is_stmt 1 view .LVU2313
-2856:Src/main.c **** {
- 7561 .loc 1 2856 6 is_stmt 0 view .LVU2314
- 7562 0046 002E cmp r6, #0
- ARM GAS /tmp/ccLSPxIe.s page 524
-
-
- 7563 0048 E8D1 bne .L402
- 7564 .L395:
-2860:Src/main.c **** if (uc)
- 7565 .loc 1 2860 3 is_stmt 1 view .LVU2315
- 7566 004a 2846 mov r0, r5
- 7567 004c FFF7FEFF bl HAL_Delay
- 7568 .LVL686:
-2861:Src/main.c **** {
- 7569 .loc 1 2861 3 view .LVU2316
-2861:Src/main.c **** {
- 7570 .loc 1 2861 6 is_stmt 0 view .LVU2317
- 7571 0050 002F cmp r7, #0
- 7572 0052 E9D1 bne .L403
- 7573 .L396:
-2865:Src/main.c **** {
- 7574 .loc 1 2865 3 is_stmt 1 view .LVU2318
-2865:Src/main.c **** {
- 7575 .loc 1 2865 6 is_stmt 0 view .LVU2319
- 7576 0054 002E cmp r6, #0
- 7577 0056 EDD0 beq .L397
-2867:Src/main.c **** }
- 7578 .loc 1 2867 4 is_stmt 1 view .LVU2320
- 7579 0058 0122 movs r2, #1
- 7580 005a 0821 movs r1, #8
- 7581 005c 0248 ldr r0, .L404
- 7582 005e FFF7FEFF bl HAL_GPIO_WritePin
- 7583 .LVL687:
- 7584 0062 E7E7 b .L397
- 7585 .L400:
-2867:Src/main.c **** }
- 7586 .loc 1 2867 4 is_stmt 0 view .LVU2321
- 7587 .LBE610:
-2871:Src/main.c ****
- 7588 .loc 1 2871 1 view .LVU2322
- 7589 0064 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 7590 .LVL688:
- 7591 .L405:
-2871:Src/main.c ****
- 7592 .loc 1 2871 1 view .LVU2323
- 7593 .align 2
- 7594 .L404:
- 7595 0068 00100240 .word 1073876992
- 7596 .cfi_endproc
- 7597 .LFE1218:
- 7599 .section .text.Get_ADC,"ax",%progbits
- 7600 .align 1
- 7601 .syntax unified
- 7602 .thumb
- 7603 .thumb_func
- 7605 Get_ADC:
- 7606 .LVL689:
- 7607 .LFB1237:
-3644:Src/main.c **** uint16_t OUT;
- 7608 .loc 1 3644 1 is_stmt 1 view -0
- 7609 .cfi_startproc
- 7610 @ args = 0, pretend = 0, frame = 0
- 7611 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccLSPxIe.s page 525
-
-
-3644:Src/main.c **** uint16_t OUT;
- 7612 .loc 1 3644 1 is_stmt 0 view .LVU2325
- 7613 0000 10B5 push {r4, lr}
- 7614 .LCFI72:
- 7615 .cfi_def_cfa_offset 8
- 7616 .cfi_offset 4, -8
- 7617 .cfi_offset 14, -4
- 7618 0002 0024 movs r4, #0
-3645:Src/main.c **** switch (num)
- 7619 .loc 1 3645 2 is_stmt 1 view .LVU2326
-3646:Src/main.c **** {
- 7620 .loc 1 3646 2 view .LVU2327
- 7621 0004 0528 cmp r0, #5
- 7622 0006 2CD8 bhi .L415
- 7623 0008 DFE800F0 tbb [pc, r0]
- 7624 .L409:
- 7625 000c 03 .byte (.L414-.L409)/2
- 7626 000d 08 .byte (.L413-.L409)/2
- 7627 000e 12 .byte (.L412-.L409)/2
- 7628 000f 17 .byte (.L411-.L409)/2
- 7629 0010 1C .byte (.L410-.L409)/2
- 7630 0011 26 .byte (.L408-.L409)/2
- 7631 .p2align 1
- 7632 .L414:
-3649:Src/main.c **** break;
- 7633 .loc 1 3649 5 view .LVU2328
- 7634 0012 1548 ldr r0, .L417
- 7635 .LVL690:
-3649:Src/main.c **** break;
- 7636 .loc 1 3649 5 is_stmt 0 view .LVU2329
- 7637 0014 FFF7FEFF bl HAL_ADC_Start
- 7638 .LVL691:
-3650:Src/main.c **** case 1:
- 7639 .loc 1 3650 4 is_stmt 1 view .LVU2330
- 7640 0018 2046 mov r0, r4
- 7641 .L407:
- 7642 .LVL692:
-3669:Src/main.c **** }
- 7643 .loc 1 3669 2 view .LVU2331
-3670:Src/main.c ****
- 7644 .loc 1 3670 1 is_stmt 0 view .LVU2332
- 7645 001a 10BD pop {r4, pc}
- 7646 .LVL693:
- 7647 .L413:
-3652:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- 7648 .loc 1 3652 5 is_stmt 1 view .LVU2333
- 7649 001c 124C ldr r4, .L417
- 7650 001e 6421 movs r1, #100
- 7651 0020 2046 mov r0, r4
- 7652 .LVL694:
-3652:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc
- 7653 .loc 1 3652 5 is_stmt 0 view .LVU2334
- 7654 0022 FFF7FEFF bl HAL_ADC_PollForConversion
- 7655 .LVL695:
-3653:Src/main.c **** break;
- 7656 .loc 1 3653 9 is_stmt 1 view .LVU2335
-3653:Src/main.c **** break;
- ARM GAS /tmp/ccLSPxIe.s page 526
-
-
- 7657 .loc 1 3653 15 is_stmt 0 view .LVU2336
- 7658 0026 2046 mov r0, r4
- 7659 0028 FFF7FEFF bl HAL_ADC_GetValue
- 7660 .LVL696:
-3653:Src/main.c **** break;
- 7661 .loc 1 3653 13 discriminator 1 view .LVU2337
- 7662 002c 80B2 uxth r0, r0
- 7663 .LVL697:
-3654:Src/main.c **** case 2:
- 7664 .loc 1 3654 4 is_stmt 1 view .LVU2338
- 7665 002e F4E7 b .L407
- 7666 .LVL698:
- 7667 .L412:
-3656:Src/main.c **** break;
- 7668 .loc 1 3656 5 view .LVU2339
- 7669 0030 0D48 ldr r0, .L417
- 7670 .LVL699:
-3656:Src/main.c **** break;
- 7671 .loc 1 3656 5 is_stmt 0 view .LVU2340
- 7672 0032 FFF7FEFF bl HAL_ADC_Stop
- 7673 .LVL700:
-3657:Src/main.c **** case 3:
- 7674 .loc 1 3657 4 is_stmt 1 view .LVU2341
- 7675 0036 2046 mov r0, r4
- 7676 0038 EFE7 b .L407
- 7677 .LVL701:
- 7678 .L411:
-3659:Src/main.c **** break;
- 7679 .loc 1 3659 5 view .LVU2342
- 7680 003a 0C48 ldr r0, .L417+4
- 7681 .LVL702:
-3659:Src/main.c **** break;
- 7682 .loc 1 3659 5 is_stmt 0 view .LVU2343
- 7683 003c FFF7FEFF bl HAL_ADC_Start
- 7684 .LVL703:
-3660:Src/main.c **** case 4:
- 7685 .loc 1 3660 4 is_stmt 1 view .LVU2344
- 7686 0040 2046 mov r0, r4
- 7687 0042 EAE7 b .L407
- 7688 .LVL704:
- 7689 .L410:
-3662:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- 7690 .loc 1 3662 5 view .LVU2345
- 7691 0044 094C ldr r4, .L417+4
- 7692 0046 6421 movs r1, #100
- 7693 0048 2046 mov r0, r4
- 7694 .LVL705:
-3662:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc
- 7695 .loc 1 3662 5 is_stmt 0 view .LVU2346
- 7696 004a FFF7FEFF bl HAL_ADC_PollForConversion
- 7697 .LVL706:
-3663:Src/main.c **** break;
- 7698 .loc 1 3663 9 is_stmt 1 view .LVU2347
-3663:Src/main.c **** break;
- 7699 .loc 1 3663 15 is_stmt 0 view .LVU2348
- 7700 004e 2046 mov r0, r4
- 7701 0050 FFF7FEFF bl HAL_ADC_GetValue
- ARM GAS /tmp/ccLSPxIe.s page 527
-
-
- 7702 .LVL707:
-3663:Src/main.c **** break;
- 7703 .loc 1 3663 13 discriminator 1 view .LVU2349
- 7704 0054 80B2 uxth r0, r0
- 7705 .LVL708:
-3664:Src/main.c **** case 5:
- 7706 .loc 1 3664 4 is_stmt 1 view .LVU2350
- 7707 0056 E0E7 b .L407
- 7708 .LVL709:
- 7709 .L408:
-3666:Src/main.c **** break;
- 7710 .loc 1 3666 9 view .LVU2351
- 7711 0058 0448 ldr r0, .L417+4
- 7712 .LVL710:
-3666:Src/main.c **** break;
- 7713 .loc 1 3666 9 is_stmt 0 view .LVU2352
- 7714 005a FFF7FEFF bl HAL_ADC_Stop
- 7715 .LVL711:
-3667:Src/main.c **** }
- 7716 .loc 1 3667 4 is_stmt 1 view .LVU2353
- 7717 005e 2046 mov r0, r4
- 7718 0060 DBE7 b .L407
- 7719 .LVL712:
- 7720 .L415:
-3646:Src/main.c **** {
- 7721 .loc 1 3646 2 is_stmt 0 view .LVU2354
- 7722 0062 2046 mov r0, r4
- 7723 .LVL713:
-3646:Src/main.c **** {
- 7724 .loc 1 3646 2 view .LVU2355
- 7725 0064 D9E7 b .L407
- 7726 .L418:
- 7727 0066 00BF .align 2
- 7728 .L417:
- 7729 0068 00000000 .word hadc1
- 7730 006c 00000000 .word hadc3
- 7731 .cfi_endproc
- 7732 .LFE1237:
- 7734 .section .text.Set_LTEC,"ax",%progbits
- 7735 .align 1
- 7736 .global Set_LTEC
- 7737 .syntax unified
- 7738 .thumb
- 7739 .thumb_func
- 7741 Set_LTEC:
- 7742 .LVL714:
- 7743 .LFB1235:
-3466:Src/main.c **** uint32_t tmp32;
- 7744 .loc 1 3466 1 is_stmt 1 view -0
- 7745 .cfi_startproc
- 7746 @ args = 0, pretend = 0, frame = 0
- 7747 @ frame_needed = 0, uses_anonymous_args = 0
-3466:Src/main.c **** uint32_t tmp32;
- 7748 .loc 1 3466 1 is_stmt 0 view .LVU2357
- 7749 0000 38B5 push {r3, r4, r5, lr}
- 7750 .LCFI73:
- 7751 .cfi_def_cfa_offset 16
- ARM GAS /tmp/ccLSPxIe.s page 528
-
-
- 7752 .cfi_offset 3, -16
- 7753 .cfi_offset 4, -12
- 7754 .cfi_offset 5, -8
- 7755 .cfi_offset 14, -4
- 7756 0002 0446 mov r4, r0
- 7757 0004 0D46 mov r5, r1
-3467:Src/main.c ****
- 7758 .loc 1 3467 2 is_stmt 1 view .LVU2358
-3469:Src/main.c **** {
- 7759 .loc 1 3469 2 view .LVU2359
-3469:Src/main.c **** {
- 7760 .loc 1 3469 5 is_stmt 0 view .LVU2360
- 7761 0006 0328 cmp r0, #3
- 7762 0008 18BF it ne
- 7763 000a 0128 cmpne r0, #1
- 7764 000c 06D0 beq .L453
- 7765 .LVL715:
- 7766 .L420:
-3475:Src/main.c **** {
- 7767 .loc 1 3475 2 is_stmt 1 view .LVU2361
- 7768 000e 013C subs r4, r4, #1
- 7769 .LVL716:
-3475:Src/main.c **** {
- 7770 .loc 1 3475 2 is_stmt 0 view .LVU2362
- 7771 0010 032C cmp r4, #3
- 7772 0012 2ED8 bhi .L421
- 7773 0014 DFE804F0 tbb [pc, r4]
- 7774 .L423:
- 7775 0018 0D .byte (.L426-.L423)/2
- 7776 0019 45 .byte (.L425-.L423)/2
- 7777 001a 65 .byte (.L424-.L423)/2
- 7778 001b 86 .byte (.L422-.L423)/2
- 7779 .LVL717:
- 7780 .p2align 1
- 7781 .L453:
-3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- 7782 .loc 1 3471 3 is_stmt 1 view .LVU2363
- 7783 001c 0121 movs r1, #1
- 7784 .LVL718:
-3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- 7785 .loc 1 3471 3 is_stmt 0 view .LVU2364
- 7786 001e 0220 movs r0, #2
- 7787 .LVL719:
-3471:Src/main.c **** HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
- 7788 .loc 1 3471 3 view .LVU2365
- 7789 0020 FFF7FEFF bl SPI2_SetMode
- 7790 .LVL720:
-3472:Src/main.c **** }
- 7791 .loc 1 3472 3 is_stmt 1 view .LVU2366
- 7792 0024 0122 movs r2, #1
- 7793 0026 4FF48051 mov r1, #4096
- 7794 002a 4F48 ldr r0, .L454
- 7795 002c FFF7FEFF bl HAL_GPIO_WritePin
- 7796 .LVL721:
- 7797 0030 EDE7 b .L420
- 7798 .LVL722:
- 7799 .L426:
- ARM GAS /tmp/ccLSPxIe.s page 529
-
-
-3478:Src/main.c **** //tmp32=0;
- 7800 .loc 1 3478 4 view .LVU2367
- 7801 0032 0022 movs r2, #0
- 7802 0034 4FF48041 mov r1, #16384
- 7803 0038 4B48 ldr r0, .L454
- 7804 003a FFF7FEFF bl HAL_GPIO_WritePin
- 7805 .LVL723:
-3481:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 7806 .loc 1 3481 4 view .LVU2368
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7807 .loc 1 3482 4 view .LVU2369
-3481:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 7808 .loc 1 3481 10 is_stmt 0 view .LVU2370
- 7809 003e 0022 movs r2, #0
- 7810 .LVL724:
- 7811 .L427:
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7812 .loc 1 3482 42 is_stmt 1 discriminator 1 view .LVU2371
- 7813 .LBB611:
- 7814 .LBI611:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7815 .loc 4 916 26 view .LVU2372
- 7816 .LBB612:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7817 .loc 4 918 3 view .LVU2373
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7818 .loc 4 918 12 is_stmt 0 view .LVU2374
- 7819 0040 4A4B ldr r3, .L454+4
- 7820 0042 9B68 ldr r3, [r3, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7821 .loc 4 918 66 view .LVU2375
- 7822 0044 13F0020F tst r3, #2
- 7823 0048 04D1 bne .L428
- 7824 .LVL725:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7825 .loc 4 918 66 view .LVU2376
- 7826 .LBE612:
- 7827 .LBE611:
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7828 .loc 1 3482 42 discriminator 2 view .LVU2377
- 7829 004a B2F5FA7F cmp r2, #500
- 7830 004e 01D8 bhi .L428
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7831 .loc 1 3482 59 is_stmt 1 discriminator 3 view .LVU2378
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7832 .loc 1 3482 64 is_stmt 0 discriminator 3 view .LVU2379
- 7833 0050 0132 adds r2, r2, #1
- 7834 .LVL726:
-3482:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 7835 .loc 1 3482 64 discriminator 3 view .LVU2380
- 7836 0052 F5E7 b .L427
- 7837 .L428:
-3483:Src/main.c **** tmp32 = 0;
- 7838 .loc 1 3483 4 is_stmt 1 view .LVU2381
- 7839 .LVL727:
- 7840 .LBB613:
- 7841 .LBI613:
- ARM GAS /tmp/ccLSPxIe.s page 530
-
-
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7842 .loc 4 1373 22 view .LVU2382
- 7843 .LBB614:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 7844 .loc 4 1376 3 view .LVU2383
- 7845 .loc 4 1377 3 view .LVU2384
- 7846 .loc 4 1377 10 is_stmt 0 view .LVU2385
- 7847 0054 454B ldr r3, .L454+4
- 7848 0056 9D81 strh r5, [r3, #12] @ movhi
- 7849 .LVL728:
- 7850 .loc 4 1377 10 view .LVU2386
- 7851 .LBE614:
- 7852 .LBE613:
-3484:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 7853 .loc 1 3484 4 is_stmt 1 view .LVU2387
-3485:Src/main.c **** (void) SPI2->DR;
- 7854 .loc 1 3485 4 view .LVU2388
-3484:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 7855 .loc 1 3484 10 is_stmt 0 view .LVU2389
- 7856 0058 0022 movs r2, #0
- 7857 .LVL729:
- 7858 .L430:
-3485:Src/main.c **** (void) SPI2->DR;
- 7859 .loc 1 3485 43 is_stmt 1 discriminator 1 view .LVU2390
- 7860 .LBB615:
- 7861 .LBI615:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7862 .loc 4 905 26 view .LVU2391
- 7863 .LBB616:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7864 .loc 4 907 3 view .LVU2392
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7865 .loc 4 907 12 is_stmt 0 view .LVU2393
- 7866 005a 444B ldr r3, .L454+4
- 7867 005c 9B68 ldr r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7868 .loc 4 907 68 view .LVU2394
- 7869 005e 13F0010F tst r3, #1
- 7870 0062 04D1 bne .L431
- 7871 .LVL730:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7872 .loc 4 907 68 view .LVU2395
- 7873 .LBE616:
- 7874 .LBE615:
-3485:Src/main.c **** (void) SPI2->DR;
- 7875 .loc 1 3485 43 discriminator 2 view .LVU2396
- 7876 0064 B2F5FA7F cmp r2, #500
- 7877 0068 01D8 bhi .L431
-3485:Src/main.c **** (void) SPI2->DR;
- 7878 .loc 1 3485 60 is_stmt 1 discriminator 3 view .LVU2397
-3485:Src/main.c **** (void) SPI2->DR;
- 7879 .loc 1 3485 65 is_stmt 0 discriminator 3 view .LVU2398
- 7880 006a 0132 adds r2, r2, #1
- 7881 .LVL731:
-3485:Src/main.c **** (void) SPI2->DR;
- 7882 .loc 1 3485 65 discriminator 3 view .LVU2399
- 7883 006c F5E7 b .L430
- ARM GAS /tmp/ccLSPxIe.s page 531
-
-
- 7884 .L431:
-3486:Src/main.c **** break;
- 7885 .loc 1 3486 4 is_stmt 1 view .LVU2400
- 7886 006e 3F4B ldr r3, .L454+4
- 7887 0070 DB68 ldr r3, [r3, #12]
-3487:Src/main.c **** case 2:
- 7888 .loc 1 3487 3 view .LVU2401
- 7889 .LVL732:
- 7890 .L421:
-3523:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2
- 7891 .loc 1 3523 2 view .LVU2402
- 7892 0072 0122 movs r2, #1
- 7893 0074 4FF48041 mov r1, #16384
- 7894 0078 3B48 ldr r0, .L454
- 7895 007a FFF7FEFF bl HAL_GPIO_WritePin
- 7896 .LVL733:
-3524:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1
- 7897 .loc 1 3524 2 view .LVU2403
- 7898 007e 0122 movs r2, #1
- 7899 0080 4021 movs r1, #64
- 7900 0082 3B48 ldr r0, .L454+8
- 7901 0084 FFF7FEFF bl HAL_GPIO_WritePin
- 7902 .LVL734:
-3525:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2
- 7903 .loc 1 3525 2 view .LVU2404
- 7904 0088 0122 movs r2, #1
- 7905 008a 4FF48051 mov r1, #4096
- 7906 008e 3948 ldr r0, .L454+12
- 7907 0090 FFF7FEFF bl HAL_GPIO_WritePin
- 7908 .LVL735:
-3526:Src/main.c **** }
- 7909 .loc 1 3526 2 view .LVU2405
- 7910 0094 0122 movs r2, #1
- 7911 0096 4FF48071 mov r1, #256
- 7912 009a 3748 ldr r0, .L454+16
- 7913 009c FFF7FEFF bl HAL_GPIO_WritePin
- 7914 .LVL736:
-3527:Src/main.c **** static uint16_t MPhD_T(uint8_t num)
- 7915 .loc 1 3527 1 is_stmt 0 view .LVU2406
- 7916 00a0 38BD pop {r3, r4, r5, pc}
- 7917 .LVL737:
- 7918 .L425:
-3490:Src/main.c **** //tmp32=0;
- 7919 .loc 1 3490 4 is_stmt 1 view .LVU2407
- 7920 00a2 0022 movs r2, #0
- 7921 00a4 4021 movs r1, #64
- 7922 00a6 3248 ldr r0, .L454+8
- 7923 00a8 FFF7FEFF bl HAL_GPIO_WritePin
- 7924 .LVL738:
-3493:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 7925 .loc 1 3493 4 view .LVU2408
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7926 .loc 1 3494 4 view .LVU2409
-3493:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 7927 .loc 1 3493 10 is_stmt 0 view .LVU2410
- 7928 00ac 0022 movs r2, #0
- 7929 .LVL739:
- ARM GAS /tmp/ccLSPxIe.s page 532
-
-
- 7930 .L433:
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7931 .loc 1 3494 42 is_stmt 1 discriminator 1 view .LVU2411
- 7932 .LBB617:
- 7933 .LBI617:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7934 .loc 4 916 26 view .LVU2412
- 7935 .LBB618:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7936 .loc 4 918 3 view .LVU2413
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7937 .loc 4 918 12 is_stmt 0 view .LVU2414
- 7938 00ae 334B ldr r3, .L454+20
- 7939 00b0 9B68 ldr r3, [r3, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7940 .loc 4 918 66 view .LVU2415
- 7941 00b2 13F0020F tst r3, #2
- 7942 00b6 04D1 bne .L434
- 7943 .LVL740:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7944 .loc 4 918 66 view .LVU2416
- 7945 .LBE618:
- 7946 .LBE617:
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7947 .loc 1 3494 42 discriminator 2 view .LVU2417
- 7948 00b8 B2F5FA7F cmp r2, #500
- 7949 00bc 01D8 bhi .L434
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7950 .loc 1 3494 59 is_stmt 1 discriminator 3 view .LVU2418
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7951 .loc 1 3494 64 is_stmt 0 discriminator 3 view .LVU2419
- 7952 00be 0132 adds r2, r2, #1
- 7953 .LVL741:
-3494:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 7954 .loc 1 3494 64 discriminator 3 view .LVU2420
- 7955 00c0 F5E7 b .L433
- 7956 .L434:
-3495:Src/main.c **** tmp32 = 0;
- 7957 .loc 1 3495 4 is_stmt 1 view .LVU2421
- 7958 .LVL742:
- 7959 .LBB619:
- 7960 .LBI619:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7961 .loc 4 1373 22 view .LVU2422
- 7962 .LBB620:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 7963 .loc 4 1376 3 view .LVU2423
- 7964 .loc 4 1377 3 view .LVU2424
- 7965 .loc 4 1377 10 is_stmt 0 view .LVU2425
- 7966 00c2 2E4B ldr r3, .L454+20
- 7967 00c4 9D81 strh r5, [r3, #12] @ movhi
- 7968 .LVL743:
- 7969 .loc 4 1377 10 view .LVU2426
- 7970 .LBE620:
- 7971 .LBE619:
-3496:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 7972 .loc 1 3496 4 is_stmt 1 view .LVU2427
- ARM GAS /tmp/ccLSPxIe.s page 533
-
-
-3497:Src/main.c **** (void) SPI6->DR;
- 7973 .loc 1 3497 4 view .LVU2428
-3496:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 7974 .loc 1 3496 10 is_stmt 0 view .LVU2429
- 7975 00c6 0022 movs r2, #0
- 7976 .LVL744:
- 7977 .L436:
-3497:Src/main.c **** (void) SPI6->DR;
- 7978 .loc 1 3497 43 is_stmt 1 discriminator 1 view .LVU2430
- 7979 .LBB621:
- 7980 .LBI621:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 7981 .loc 4 905 26 view .LVU2431
- 7982 .LBB622:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7983 .loc 4 907 3 view .LVU2432
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7984 .loc 4 907 12 is_stmt 0 view .LVU2433
- 7985 00c8 2C4B ldr r3, .L454+20
- 7986 00ca 9B68 ldr r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7987 .loc 4 907 68 view .LVU2434
- 7988 00cc 13F0010F tst r3, #1
- 7989 00d0 04D1 bne .L437
- 7990 .LVL745:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 7991 .loc 4 907 68 view .LVU2435
- 7992 .LBE622:
- 7993 .LBE621:
-3497:Src/main.c **** (void) SPI6->DR;
- 7994 .loc 1 3497 43 discriminator 2 view .LVU2436
- 7995 00d2 B2F5FA7F cmp r2, #500
- 7996 00d6 01D8 bhi .L437
-3497:Src/main.c **** (void) SPI6->DR;
- 7997 .loc 1 3497 60 is_stmt 1 discriminator 3 view .LVU2437
-3497:Src/main.c **** (void) SPI6->DR;
- 7998 .loc 1 3497 65 is_stmt 0 discriminator 3 view .LVU2438
- 7999 00d8 0132 adds r2, r2, #1
- 8000 .LVL746:
-3497:Src/main.c **** (void) SPI6->DR;
- 8001 .loc 1 3497 65 discriminator 3 view .LVU2439
- 8002 00da F5E7 b .L436
- 8003 .L437:
-3498:Src/main.c **** break;
- 8004 .loc 1 3498 4 is_stmt 1 view .LVU2440
- 8005 00dc 274B ldr r3, .L454+20
- 8006 00de DB68 ldr r3, [r3, #12]
-3499:Src/main.c **** case 3:
- 8007 .loc 1 3499 3 view .LVU2441
- 8008 00e0 C7E7 b .L421
- 8009 .LVL747:
- 8010 .L424:
-3501:Src/main.c **** //tmp32=0;
- 8011 .loc 1 3501 4 view .LVU2442
- 8012 00e2 0022 movs r2, #0
- 8013 00e4 4FF48051 mov r1, #4096
- 8014 00e8 2248 ldr r0, .L454+12
- ARM GAS /tmp/ccLSPxIe.s page 534
-
-
- 8015 00ea FFF7FEFF bl HAL_GPIO_WritePin
- 8016 .LVL748:
-3504:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 8017 .loc 1 3504 4 view .LVU2443
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8018 .loc 1 3505 4 view .LVU2444
-3504:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 8019 .loc 1 3504 10 is_stmt 0 view .LVU2445
- 8020 00ee 0022 movs r2, #0
- 8021 .LVL749:
- 8022 .L439:
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8023 .loc 1 3505 42 is_stmt 1 discriminator 1 view .LVU2446
- 8024 .LBB623:
- 8025 .LBI623:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8026 .loc 4 916 26 view .LVU2447
- 8027 .LBB624:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8028 .loc 4 918 3 view .LVU2448
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8029 .loc 4 918 12 is_stmt 0 view .LVU2449
- 8030 00f0 1E4B ldr r3, .L454+4
- 8031 00f2 9B68 ldr r3, [r3, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8032 .loc 4 918 66 view .LVU2450
- 8033 00f4 13F0020F tst r3, #2
- 8034 00f8 04D1 bne .L440
- 8035 .LVL750:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8036 .loc 4 918 66 view .LVU2451
- 8037 .LBE624:
- 8038 .LBE623:
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8039 .loc 1 3505 42 discriminator 2 view .LVU2452
- 8040 00fa B2F5FA7F cmp r2, #500
- 8041 00fe 01D8 bhi .L440
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8042 .loc 1 3505 59 is_stmt 1 discriminator 3 view .LVU2453
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8043 .loc 1 3505 64 is_stmt 0 discriminator 3 view .LVU2454
- 8044 0100 0132 adds r2, r2, #1
- 8045 .LVL751:
-3505:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC
- 8046 .loc 1 3505 64 discriminator 3 view .LVU2455
- 8047 0102 F5E7 b .L439
- 8048 .L440:
-3506:Src/main.c **** tmp32 = 0;
- 8049 .loc 1 3506 4 is_stmt 1 view .LVU2456
- 8050 .LVL752:
- 8051 .LBB625:
- 8052 .LBI625:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8053 .loc 4 1373 22 view .LVU2457
- 8054 .LBB626:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 8055 .loc 4 1376 3 view .LVU2458
- ARM GAS /tmp/ccLSPxIe.s page 535
-
-
- 8056 .loc 4 1377 3 view .LVU2459
- 8057 .loc 4 1377 10 is_stmt 0 view .LVU2460
- 8058 0104 194B ldr r3, .L454+4
- 8059 0106 9D81 strh r5, [r3, #12] @ movhi
- 8060 .LVL753:
- 8061 .loc 4 1377 10 view .LVU2461
- 8062 .LBE626:
- 8063 .LBE625:
-3507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 8064 .loc 1 3507 4 is_stmt 1 view .LVU2462
-3508:Src/main.c **** (void) SPI2->DR;
- 8065 .loc 1 3508 4 view .LVU2463
-3507:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 8066 .loc 1 3507 10 is_stmt 0 view .LVU2464
- 8067 0108 0022 movs r2, #0
- 8068 .LVL754:
- 8069 .L442:
-3508:Src/main.c **** (void) SPI2->DR;
- 8070 .loc 1 3508 43 is_stmt 1 discriminator 1 view .LVU2465
- 8071 .LBB627:
- 8072 .LBI627:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8073 .loc 4 905 26 view .LVU2466
- 8074 .LBB628:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8075 .loc 4 907 3 view .LVU2467
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8076 .loc 4 907 12 is_stmt 0 view .LVU2468
- 8077 010a 184B ldr r3, .L454+4
- 8078 010c 9B68 ldr r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8079 .loc 4 907 68 view .LVU2469
- 8080 010e 13F0010F tst r3, #1
- 8081 0112 04D1 bne .L443
- 8082 .LVL755:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8083 .loc 4 907 68 view .LVU2470
- 8084 .LBE628:
- 8085 .LBE627:
-3508:Src/main.c **** (void) SPI2->DR;
- 8086 .loc 1 3508 43 discriminator 2 view .LVU2471
- 8087 0114 B2F5FA7F cmp r2, #500
- 8088 0118 01D8 bhi .L443
-3508:Src/main.c **** (void) SPI2->DR;
- 8089 .loc 1 3508 60 is_stmt 1 discriminator 3 view .LVU2472
-3508:Src/main.c **** (void) SPI2->DR;
- 8090 .loc 1 3508 65 is_stmt 0 discriminator 3 view .LVU2473
- 8091 011a 0132 adds r2, r2, #1
- 8092 .LVL756:
-3508:Src/main.c **** (void) SPI2->DR;
- 8093 .loc 1 3508 65 discriminator 3 view .LVU2474
- 8094 011c F5E7 b .L442
- 8095 .L443:
-3509:Src/main.c **** break;
- 8096 .loc 1 3509 4 is_stmt 1 view .LVU2475
- 8097 011e 134B ldr r3, .L454+4
- 8098 0120 DB68 ldr r3, [r3, #12]
- ARM GAS /tmp/ccLSPxIe.s page 536
-
-
-3510:Src/main.c **** case 4:
- 8099 .loc 1 3510 3 view .LVU2476
- 8100 0122 A6E7 b .L421
- 8101 .LVL757:
- 8102 .L422:
-3512:Src/main.c **** //tmp32=0;
- 8103 .loc 1 3512 4 view .LVU2477
- 8104 0124 0022 movs r2, #0
- 8105 0126 4FF48071 mov r1, #256
- 8106 012a 1348 ldr r0, .L454+16
- 8107 012c FFF7FEFF bl HAL_GPIO_WritePin
- 8108 .LVL758:
-3515:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 8109 .loc 1 3515 4 view .LVU2478
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8110 .loc 1 3516 4 view .LVU2479
-3515:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi
- 8111 .loc 1 3515 10 is_stmt 0 view .LVU2480
- 8112 0130 0022 movs r2, #0
- 8113 .LVL759:
- 8114 .L445:
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8115 .loc 1 3516 42 is_stmt 1 discriminator 1 view .LVU2481
- 8116 .LBB629:
- 8117 .LBI629:
- 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8118 .loc 4 916 26 view .LVU2482
- 8119 .LBB630:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8120 .loc 4 918 3 view .LVU2483
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8121 .loc 4 918 12 is_stmt 0 view .LVU2484
- 8122 0132 124B ldr r3, .L454+20
- 8123 0134 9B68 ldr r3, [r3, #8]
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8124 .loc 4 918 66 view .LVU2485
- 8125 0136 13F0020F tst r3, #2
- 8126 013a 04D1 bne .L446
- 8127 .LVL760:
- 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8128 .loc 4 918 66 view .LVU2486
- 8129 .LBE630:
- 8130 .LBE629:
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8131 .loc 1 3516 42 discriminator 2 view .LVU2487
- 8132 013c B2F5FA7F cmp r2, #500
- 8133 0140 01D8 bhi .L446
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8134 .loc 1 3516 59 is_stmt 1 discriminator 3 view .LVU2488
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8135 .loc 1 3516 64 is_stmt 0 discriminator 3 view .LVU2489
- 8136 0142 0132 adds r2, r2, #1
- 8137 .LVL761:
-3516:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC
- 8138 .loc 1 3516 64 discriminator 3 view .LVU2490
- 8139 0144 F5E7 b .L445
- 8140 .L446:
- ARM GAS /tmp/ccLSPxIe.s page 537
-
-
-3517:Src/main.c **** tmp32 = 0;
- 8141 .loc 1 3517 4 is_stmt 1 view .LVU2491
- 8142 .LVL762:
- 8143 .LBB631:
- 8144 .LBI631:
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8145 .loc 4 1373 22 view .LVU2492
- 8146 .LBB632:
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData;
- 8147 .loc 4 1376 3 view .LVU2493
- 8148 .loc 4 1377 3 view .LVU2494
- 8149 .loc 4 1377 10 is_stmt 0 view .LVU2495
- 8150 0146 0D4B ldr r3, .L454+20
- 8151 0148 9D81 strh r5, [r3, #12] @ movhi
- 8152 .LVL763:
- 8153 .loc 4 1377 10 view .LVU2496
- 8154 .LBE632:
- 8155 .LBE631:
-3518:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 8156 .loc 1 3518 4 is_stmt 1 view .LVU2497
-3519:Src/main.c **** (void) SPI6->DR;
- 8157 .loc 1 3519 4 view .LVU2498
-3518:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w
- 8158 .loc 1 3518 10 is_stmt 0 view .LVU2499
- 8159 014a 0022 movs r2, #0
- 8160 .LVL764:
- 8161 .L448:
-3519:Src/main.c **** (void) SPI6->DR;
- 8162 .loc 1 3519 43 is_stmt 1 discriminator 1 view .LVU2500
- 8163 .LBB633:
- 8164 .LBI633:
- 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 8165 .loc 4 905 26 view .LVU2501
- 8166 .LBB634:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8167 .loc 4 907 3 view .LVU2502
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8168 .loc 4 907 12 is_stmt 0 view .LVU2503
- 8169 014c 0B4B ldr r3, .L454+20
- 8170 014e 9B68 ldr r3, [r3, #8]
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8171 .loc 4 907 68 view .LVU2504
- 8172 0150 13F0010F tst r3, #1
- 8173 0154 04D1 bne .L449
- 8174 .LVL765:
- 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 8175 .loc 4 907 68 view .LVU2505
- 8176 .LBE634:
- 8177 .LBE633:
-3519:Src/main.c **** (void) SPI6->DR;
- 8178 .loc 1 3519 43 discriminator 2 view .LVU2506
- 8179 0156 B2F5FA7F cmp r2, #500
- 8180 015a 01D8 bhi .L449
-3519:Src/main.c **** (void) SPI6->DR;
- 8181 .loc 1 3519 60 is_stmt 1 discriminator 3 view .LVU2507
-3519:Src/main.c **** (void) SPI6->DR;
- 8182 .loc 1 3519 65 is_stmt 0 discriminator 3 view .LVU2508
- ARM GAS /tmp/ccLSPxIe.s page 538
-
-
- 8183 015c 0132 adds r2, r2, #1
- 8184 .LVL766:
-3519:Src/main.c **** (void) SPI6->DR;
- 8185 .loc 1 3519 65 discriminator 3 view .LVU2509
- 8186 015e F5E7 b .L448
- 8187 .L449:
-3520:Src/main.c **** break;
- 8188 .loc 1 3520 4 is_stmt 1 view .LVU2510
- 8189 0160 064B ldr r3, .L454+20
- 8190 0162 DB68 ldr r3, [r3, #12]
-3521:Src/main.c **** }
- 8191 .loc 1 3521 3 view .LVU2511
- 8192 0164 85E7 b .L421
- 8193 .L455:
- 8194 0166 00BF .align 2
- 8195 .L454:
- 8196 0168 00040240 .word 1073873920
- 8197 016c 00380040 .word 1073756160
- 8198 0170 00000240 .word 1073872896
- 8199 0174 000C0240 .word 1073875968
- 8200 0178 00100240 .word 1073876992
- 8201 017c 00540140 .word 1073828864
- 8202 .cfi_endproc
- 8203 .LFE1235:
- 8205 .section .text.Decode_uart,"ax",%progbits
- 8206 .align 1
- 8207 .syntax unified
- 8208 .thumb
- 8209 .thumb_func
- 8211 Decode_uart:
- 8212 .LVL767:
- 8213 .LFB1209:
-2485:Src/main.c **** // uint8_t *temp1;
- 8214 .loc 1 2485 1 view -0
- 8215 .cfi_startproc
- 8216 @ args = 0, pretend = 0, frame = 0
- 8217 @ frame_needed = 0, uses_anonymous_args = 0
-2485:Src/main.c **** // uint8_t *temp1;
- 8218 .loc 1 2485 1 is_stmt 0 view .LVU2513
- 8219 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr}
- 8220 .LCFI74:
- 8221 .cfi_def_cfa_offset 32
- 8222 .cfi_offset 3, -32
- 8223 .cfi_offset 4, -28
- 8224 .cfi_offset 5, -24
- 8225 .cfi_offset 6, -20
- 8226 .cfi_offset 7, -16
- 8227 .cfi_offset 8, -12
- 8228 .cfi_offset 9, -8
- 8229 .cfi_offset 14, -4
- 8230 0004 0546 mov r5, r0
- 8231 0006 0F46 mov r7, r1
- 8232 0008 1646 mov r6, r2
- 8233 000a 1C46 mov r4, r3
-2487:Src/main.c ****
- 8234 .loc 1 2487 2 is_stmt 1 view .LVU2514
-2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- ARM GAS /tmp/ccLSPxIe.s page 539
-
-
- 8235 .loc 1 2492 2 view .LVU2515
-2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 8236 .loc 1 2492 6 is_stmt 0 view .LVU2516
- 8237 000c AF4B ldr r3, .L480
- 8238 .LVL768:
-2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 8239 .loc 1 2492 6 view .LVU2517
- 8240 000e 0022 movs r2, #0
- 8241 .LVL769:
-2492:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&&
- 8242 .loc 1 2492 6 view .LVU2518
- 8243 0010 1A60 str r2, [r3]
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8244 .loc 1 2493 2 is_stmt 1 view .LVU2519
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8245 .loc 1 2493 7 is_stmt 0 view .LVU2520
- 8246 0012 0121 movs r1, #1
- 8247 .LVL770:
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8248 .loc 1 2493 7 view .LVU2521
- 8249 0014 AE48 ldr r0, .L480+4
- 8250 .LVL771:
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8251 .loc 1 2493 7 view .LVU2522
- 8252 0016 FFF7FEFF bl HAL_GPIO_ReadPin
- 8253 .LVL772:
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8254 .loc 1 2493 5 discriminator 1 view .LVU2523
- 8255 001a 0028 cmp r0, #0
- 8256 001c 00F0D280 beq .L477
- 8257 .L457:
-2508:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01;
- 8258 .loc 1 2508 2 is_stmt 1 view .LVU2524
- 8259 .LVL773:
-2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 8260 .loc 1 2509 2 view .LVU2525
-2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 8261 .loc 1 2509 36 is_stmt 0 view .LVU2526
- 8262 0020 2B88 ldrh r3, [r5]
-2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 8263 .loc 1 2509 48 view .LVU2527
- 8264 0022 03F00103 and r3, r3, #1
-2509:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01;
- 8265 .loc 1 2509 22 view .LVU2528
- 8266 0026 2370 strb r3, [r4]
-2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 8267 .loc 1 2510 2 is_stmt 1 view .LVU2529
-2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 8268 .loc 1 2510 36 is_stmt 0 view .LVU2530
- 8269 0028 2B88 ldrh r3, [r5]
-2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 8270 .loc 1 2510 48 view .LVU2531
- 8271 002a C3F34003 ubfx r3, r3, #1, #1
-2510:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01;
- 8272 .loc 1 2510 22 view .LVU2532
- 8273 002e 6370 strb r3, [r4, #1]
-2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- ARM GAS /tmp/ccLSPxIe.s page 540
-
-
- 8274 .loc 1 2511 2 is_stmt 1 view .LVU2533
-2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 8275 .loc 1 2511 36 is_stmt 0 view .LVU2534
- 8276 0030 2B88 ldrh r3, [r5]
-2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 8277 .loc 1 2511 48 view .LVU2535
- 8278 0032 C3F38003 ubfx r3, r3, #2, #1
-2511:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01;
- 8279 .loc 1 2511 22 view .LVU2536
- 8280 0036 A370 strb r3, [r4, #2]
-2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 8281 .loc 1 2512 2 is_stmt 1 view .LVU2537
-2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 8282 .loc 1 2512 35 is_stmt 0 view .LVU2538
- 8283 0038 2B88 ldrh r3, [r5]
-2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 8284 .loc 1 2512 47 view .LVU2539
- 8285 003a C3F3C003 ubfx r3, r3, #3, #1
-2512:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01;
- 8286 .loc 1 2512 21 view .LVU2540
- 8287 003e E370 strb r3, [r4, #3]
-2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 8288 .loc 1 2513 2 is_stmt 1 view .LVU2541
-2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 8289 .loc 1 2513 35 is_stmt 0 view .LVU2542
- 8290 0040 2B88 ldrh r3, [r5]
-2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 8291 .loc 1 2513 47 view .LVU2543
- 8292 0042 C3F30013 ubfx r3, r3, #4, #1
-2513:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01;
- 8293 .loc 1 2513 21 view .LVU2544
- 8294 0046 2371 strb r3, [r4, #4]
-2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 8295 .loc 1 2514 2 is_stmt 1 view .LVU2545
-2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 8296 .loc 1 2514 36 is_stmt 0 view .LVU2546
- 8297 0048 2B88 ldrh r3, [r5]
-2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 8298 .loc 1 2514 48 view .LVU2547
- 8299 004a C3F34013 ubfx r3, r3, #5, #1
-2514:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01;
- 8300 .loc 1 2514 22 view .LVU2548
- 8301 004e 6371 strb r3, [r4, #5]
-2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 8302 .loc 1 2515 2 is_stmt 1 view .LVU2549
-2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 8303 .loc 1 2515 36 is_stmt 0 view .LVU2550
- 8304 0050 2B88 ldrh r3, [r5]
-2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 8305 .loc 1 2515 48 view .LVU2551
- 8306 0052 C3F38013 ubfx r3, r3, #6, #1
-2515:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01;
- 8307 .loc 1 2515 22 view .LVU2552
- 8308 0056 A371 strb r3, [r4, #6]
-2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 8309 .loc 1 2516 2 is_stmt 1 view .LVU2553
-2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- ARM GAS /tmp/ccLSPxIe.s page 541
-
-
- 8310 .loc 1 2516 36 is_stmt 0 view .LVU2554
- 8311 0058 2B88 ldrh r3, [r5]
-2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 8312 .loc 1 2516 48 view .LVU2555
- 8313 005a C3F3C013 ubfx r3, r3, #7, #1
-2516:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01;
- 8314 .loc 1 2516 22 view .LVU2556
- 8315 005e E371 strb r3, [r4, #7]
-2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 8316 .loc 1 2517 2 is_stmt 1 view .LVU2557
-2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 8317 .loc 1 2517 36 is_stmt 0 view .LVU2558
- 8318 0060 2B88 ldrh r3, [r5]
-2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 8319 .loc 1 2517 48 view .LVU2559
- 8320 0062 C3F30023 ubfx r3, r3, #8, #1
-2517:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01;
- 8321 .loc 1 2517 22 view .LVU2560
- 8322 0066 2372 strb r3, [r4, #8]
-2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 8323 .loc 1 2518 2 is_stmt 1 view .LVU2561
-2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 8324 .loc 1 2518 35 is_stmt 0 view .LVU2562
- 8325 0068 2B88 ldrh r3, [r5]
-2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 8326 .loc 1 2518 47 view .LVU2563
- 8327 006a C3F34023 ubfx r3, r3, #9, #1
-2518:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01;
- 8328 .loc 1 2518 21 view .LVU2564
- 8329 006e 6372 strb r3, [r4, #9]
-2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 8330 .loc 1 2519 2 is_stmt 1 view .LVU2565
-2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 8331 .loc 1 2519 35 is_stmt 0 view .LVU2566
- 8332 0070 2B88 ldrh r3, [r5]
-2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 8333 .loc 1 2519 48 view .LVU2567
- 8334 0072 C3F38023 ubfx r3, r3, #10, #1
-2519:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01;
- 8335 .loc 1 2519 21 view .LVU2568
- 8336 0076 A372 strb r3, [r4, #10]
-2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 8337 .loc 1 2520 2 is_stmt 1 view .LVU2569
-2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 8338 .loc 1 2520 34 is_stmt 0 view .LVU2570
- 8339 0078 2B88 ldrh r3, [r5]
-2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 8340 .loc 1 2520 47 view .LVU2571
- 8341 007a C3F3C023 ubfx r3, r3, #11, #1
-2520:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01;
- 8342 .loc 1 2520 20 view .LVU2572
- 8343 007e E372 strb r3, [r4, #11]
-2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 8344 .loc 1 2521 2 is_stmt 1 view .LVU2573
-2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 8345 .loc 1 2521 35 is_stmt 0 view .LVU2574
- 8346 0080 2B88 ldrh r3, [r5]
- ARM GAS /tmp/ccLSPxIe.s page 542
-
-
-2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 8347 .loc 1 2521 48 view .LVU2575
- 8348 0082 C3F30033 ubfx r3, r3, #12, #1
-2521:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01;
- 8349 .loc 1 2521 21 view .LVU2576
- 8350 0086 2373 strb r3, [r4, #12]
-2522:Src/main.c ****
- 8351 .loc 1 2522 2 is_stmt 1 view .LVU2577
-2522:Src/main.c ****
- 8352 .loc 1 2522 35 is_stmt 0 view .LVU2578
- 8353 0088 2B88 ldrh r3, [r5]
-2522:Src/main.c ****
- 8354 .loc 1 2522 48 view .LVU2579
- 8355 008a C3F34033 ubfx r3, r3, #13, #1
-2522:Src/main.c ****
- 8356 .loc 1 2522 21 view .LVU2580
- 8357 008e 6373 strb r3, [r4, #13]
-2524:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- 8358 .loc 1 2524 2 is_stmt 1 view .LVU2581
- 8359 .LVL774:
-2525:Src/main.c **** temp2++;
- 8360 .loc 1 2525 2 view .LVU2582
-2525:Src/main.c **** temp2++;
- 8361 .loc 1 2525 28 is_stmt 0 view .LVU2583
- 8362 0090 6B88 ldrh r3, [r5, #2]
-2525:Src/main.c **** temp2++;
- 8363 .loc 1 2525 26 view .LVU2584
- 8364 0092 3B80 strh r3, [r7] @ movhi
-2526:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2);
- 8365 .loc 1 2526 2 is_stmt 1 view .LVU2585
- 8366 .LVL775:
-2527:Src/main.c **** temp2++;
- 8367 .loc 1 2527 2 view .LVU2586
-2527:Src/main.c **** temp2++;
- 8368 .loc 1 2527 28 is_stmt 0 view .LVU2587
- 8369 0094 AB88 ldrh r3, [r5, #4]
-2527:Src/main.c **** temp2++;
- 8370 .loc 1 2527 26 view .LVU2588
- 8371 0096 3380 strh r3, [r6] @ movhi
-2528:Src/main.c **** temp2++;
- 8372 .loc 1 2528 2 is_stmt 1 view .LVU2589
- 8373 .LVL776:
-2529:Src/main.c **** temp2++;
- 8374 .loc 1 2529 2 view .LVU2590
-2530:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2);
- 8375 .loc 1 2530 2 view .LVU2591
-2531:Src/main.c **** temp2++;
- 8376 .loc 1 2531 2 view .LVU2592
-2531:Src/main.c **** temp2++;
- 8377 .loc 1 2531 25 is_stmt 0 view .LVU2593
- 8378 0098 6B89 ldrh r3, [r5, #10]
-2531:Src/main.c **** temp2++;
- 8379 .loc 1 2531 23 view .LVU2594
- 8380 009a E381 strh r3, [r4, #14] @ movhi
-2532:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 8381 .loc 1 2532 2 is_stmt 1 view .LVU2595
- 8382 .LVL777:
- ARM GAS /tmp/ccLSPxIe.s page 543
-
-
-2533:Src/main.c **** temp2++;
- 8383 .loc 1 2533 2 view .LVU2596
-2533:Src/main.c **** temp2++;
- 8384 .loc 1 2533 51 is_stmt 0 view .LVU2597
- 8385 009c AB89 ldrh r3, [r5, #12]
- 8386 009e 07EE903A vmov s15, r3 @ int
-2533:Src/main.c **** temp2++;
- 8387 .loc 1 2533 32 view .LVU2598
- 8388 00a2 F8EE677A vcvt.f32.u32 s15, s15
-2533:Src/main.c **** temp2++;
- 8389 .loc 1 2533 59 view .LVU2599
- 8390 00a6 9FED8B7A vldr.32 s14, .L480+8
- 8391 00aa 67EE877A vmul.f32 s15, s15, s14
-2533:Src/main.c **** temp2++;
- 8392 .loc 1 2533 30 view .LVU2600
- 8393 00ae C7ED017A vstr.32 s15, [r7, #4]
-2534:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 8394 .loc 1 2534 2 is_stmt 1 view .LVU2601
- 8395 .LVL778:
-2535:Src/main.c **** temp2++;
- 8396 .loc 1 2535 2 view .LVU2602
-2535:Src/main.c **** temp2++;
- 8397 .loc 1 2535 51 is_stmt 0 view .LVU2603
- 8398 00b2 EB89 ldrh r3, [r5, #14]
- 8399 00b4 07EE903A vmov s15, r3 @ int
-2535:Src/main.c **** temp2++;
- 8400 .loc 1 2535 32 view .LVU2604
- 8401 00b8 F8EE677A vcvt.f32.u32 s15, s15
-2535:Src/main.c **** temp2++;
- 8402 .loc 1 2535 59 view .LVU2605
- 8403 00bc 67EE877A vmul.f32 s15, s15, s14
-2535:Src/main.c **** temp2++;
- 8404 .loc 1 2535 30 view .LVU2606
- 8405 00c0 C7ED027A vstr.32 s15, [r7, #8]
-2536:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 8406 .loc 1 2536 2 is_stmt 1 view .LVU2607
- 8407 .LVL779:
-2537:Src/main.c **** temp2++;
- 8408 .loc 1 2537 2 view .LVU2608
-2537:Src/main.c **** temp2++;
- 8409 .loc 1 2537 51 is_stmt 0 view .LVU2609
- 8410 00c4 2B8A ldrh r3, [r5, #16]
- 8411 00c6 07EE903A vmov s15, r3 @ int
-2537:Src/main.c **** temp2++;
- 8412 .loc 1 2537 32 view .LVU2610
- 8413 00ca F8EE677A vcvt.f32.u32 s15, s15
-2537:Src/main.c **** temp2++;
- 8414 .loc 1 2537 59 view .LVU2611
- 8415 00ce 67EE877A vmul.f32 s15, s15, s14
-2537:Src/main.c **** temp2++;
- 8416 .loc 1 2537 30 view .LVU2612
- 8417 00d2 C6ED017A vstr.32 s15, [r6, #4]
-2538:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint
- 8418 .loc 1 2538 2 is_stmt 1 view .LVU2613
- 8419 .LVL780:
-2539:Src/main.c **** temp2++;
- 8420 .loc 1 2539 2 view .LVU2614
- ARM GAS /tmp/ccLSPxIe.s page 544
-
-
-2539:Src/main.c **** temp2++;
- 8421 .loc 1 2539 51 is_stmt 0 view .LVU2615
- 8422 00d6 6B8A ldrh r3, [r5, #18]
- 8423 00d8 07EE903A vmov s15, r3 @ int
-2539:Src/main.c **** temp2++;
- 8424 .loc 1 2539 32 view .LVU2616
- 8425 00dc F8EE677A vcvt.f32.u32 s15, s15
-2539:Src/main.c **** temp2++;
- 8426 .loc 1 2539 59 view .LVU2617
- 8427 00e0 67EE877A vmul.f32 s15, s15, s14
-2539:Src/main.c **** temp2++;
- 8428 .loc 1 2539 30 view .LVU2618
- 8429 00e4 C6ED027A vstr.32 s15, [r6, #8]
-2540:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID
- 8430 .loc 1 2540 2 is_stmt 1 view .LVU2619
- 8431 .LVL781:
-2541:Src/main.c **** temp2++;
- 8432 .loc 1 2541 2 view .LVU2620
-2541:Src/main.c **** temp2++;
- 8433 .loc 1 2541 18 is_stmt 0 view .LVU2621
- 8434 00e8 AA8A ldrh r2, [r5, #20]
-2541:Src/main.c **** temp2++;
- 8435 .loc 1 2541 16 view .LVU2622
- 8436 00ea 7B4B ldr r3, .L480+12
- 8437 00ec 5A83 strh r2, [r3, #26] @ movhi
-2542:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2);
- 8438 .loc 1 2542 2 is_stmt 1 view .LVU2623
- 8439 .LVL782:
-2543:Src/main.c **** temp2++;
- 8440 .loc 1 2543 2 view .LVU2624
-2543:Src/main.c **** temp2++;
- 8441 .loc 1 2543 28 is_stmt 0 view .LVU2625
- 8442 00ee EB8A ldrh r3, [r5, #22]
-2543:Src/main.c **** temp2++;
- 8443 .loc 1 2543 26 view .LVU2626
- 8444 00f0 BB81 strh r3, [r7, #12] @ movhi
-2544:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2);
- 8445 .loc 1 2544 2 is_stmt 1 view .LVU2627
- 8446 .LVL783:
-2545:Src/main.c **** temp2++;
- 8447 .loc 1 2545 2 view .LVU2628
-2545:Src/main.c **** temp2++;
- 8448 .loc 1 2545 28 is_stmt 0 view .LVU2629
- 8449 00f2 2B8B ldrh r3, [r5, #24]
-2545:Src/main.c **** temp2++;
- 8450 .loc 1 2545 26 view .LVU2630
- 8451 00f4 B381 strh r3, [r6, #12] @ movhi
-2546:Src/main.c ****
- 8452 .loc 1 2546 2 is_stmt 1 view .LVU2631
- 8453 .LVL784:
-2548:Src/main.c **** {
- 8454 .loc 1 2548 2 view .LVU2632
-2548:Src/main.c **** {
- 8455 .loc 1 2548 16 is_stmt 0 view .LVU2633
- 8456 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2
-2548:Src/main.c **** {
- 8457 .loc 1 2548 5 view .LVU2634
- ARM GAS /tmp/ccLSPxIe.s page 545
-
-
- 8458 00f8 002B cmp r3, #0
- 8459 00fa 00F09580 beq .L458
-2550:Src/main.c **** }
- 8460 .loc 1 2550 3 is_stmt 1 view .LVU2635
- 8461 00fe 0122 movs r2, #1
- 8462 0100 0821 movs r1, #8
- 8463 0102 7648 ldr r0, .L480+16
- 8464 0104 FFF7FEFF bl HAL_GPIO_WritePin
- 8465 .LVL785:
- 8466 .L459:
-2557:Src/main.c **** {
- 8467 .loc 1 2557 2 view .LVU2636
-2557:Src/main.c **** {
- 8468 .loc 1 2557 16 is_stmt 0 view .LVU2637
- 8469 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2
-2557:Src/main.c **** {
- 8470 .loc 1 2557 5 view .LVU2638
- 8471 010a 002B cmp r3, #0
- 8472 010c 00F09280 beq .L460
-2559:Src/main.c **** }
- 8473 .loc 1 2559 3 is_stmt 1 view .LVU2639
- 8474 0110 0122 movs r2, #1
- 8475 0112 8021 movs r1, #128
- 8476 0114 7148 ldr r0, .L480+16
- 8477 0116 FFF7FEFF bl HAL_GPIO_WritePin
- 8478 .LVL786:
- 8479 .L461:
-2566:Src/main.c **** {
- 8480 .loc 1 2566 2 view .LVU2640
-2566:Src/main.c **** {
- 8481 .loc 1 2566 16 is_stmt 0 view .LVU2641
- 8482 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2
-2566:Src/main.c **** {
- 8483 .loc 1 2566 5 view .LVU2642
- 8484 011c 002B cmp r3, #0
- 8485 011e 00F08F80 beq .L462
-2568:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC
- 8486 .loc 1 2568 3 is_stmt 1 view .LVU2643
- 8487 0122 0122 movs r2, #1
- 8488 0124 4FF48071 mov r1, #256
- 8489 0128 6948 ldr r0, .L480+4
- 8490 012a FFF7FEFF bl HAL_GPIO_WritePin
- 8491 .LVL787:
- 8492 .L463:
-2577:Src/main.c **** {
- 8493 .loc 1 2577 2 view .LVU2644
-2577:Src/main.c **** {
- 8494 .loc 1 2577 16 is_stmt 0 view .LVU2645
- 8495 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2
-2577:Src/main.c **** {
- 8496 .loc 1 2577 5 view .LVU2646
- 8497 0130 002B cmp r3, #0
- 8498 0132 00F08C80 beq .L464
-2579:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC
- 8499 .loc 1 2579 3 is_stmt 1 view .LVU2647
- 8500 0136 0122 movs r2, #1
- 8501 0138 1021 movs r1, #16
- ARM GAS /tmp/ccLSPxIe.s page 546
-
-
- 8502 013a 6848 ldr r0, .L480+16
- 8503 013c FFF7FEFF bl HAL_GPIO_WritePin
- 8504 .LVL788:
- 8505 .L465:
-2588:Src/main.c **** {
- 8506 .loc 1 2588 2 view .LVU2648
-2588:Src/main.c **** {
- 8507 .loc 1 2588 16 is_stmt 0 view .LVU2649
- 8508 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2
-2588:Src/main.c **** {
- 8509 .loc 1 2588 5 view .LVU2650
- 8510 0142 002B cmp r3, #0
- 8511 0144 00F08980 beq .L466
-2590:Src/main.c **** }
- 8512 .loc 1 2590 3 is_stmt 1 view .LVU2651
- 8513 0148 0122 movs r2, #1
- 8514 014a 4FF48061 mov r1, #1024
- 8515 014e 6448 ldr r0, .L480+20
- 8516 0150 FFF7FEFF bl HAL_GPIO_WritePin
- 8517 .LVL789:
- 8518 .L467:
-2597:Src/main.c **** {
- 8519 .loc 1 2597 2 view .LVU2652
-2597:Src/main.c **** {
- 8520 .loc 1 2597 16 is_stmt 0 view .LVU2653
- 8521 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2
-2597:Src/main.c **** {
- 8522 .loc 1 2597 5 view .LVU2654
- 8523 0156 002B cmp r3, #0
- 8524 0158 00F08680 beq .L468
-2599:Src/main.c **** }
- 8525 .loc 1 2599 3 is_stmt 1 view .LVU2655
- 8526 015c 0122 movs r2, #1
- 8527 015e 0821 movs r1, #8
- 8528 0160 6048 ldr r0, .L480+24
- 8529 0162 FFF7FEFF bl HAL_GPIO_WritePin
- 8530 .LVL790:
- 8531 .L469:
-2606:Src/main.c **** {
- 8532 .loc 1 2606 2 view .LVU2656
-2606:Src/main.c **** {
- 8533 .loc 1 2606 17 is_stmt 0 view .LVU2657
- 8534 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2
-2606:Src/main.c **** {
- 8535 .loc 1 2606 5 view .LVU2658
- 8536 0168 1BB1 cbz r3, .L470
-2606:Src/main.c **** {
- 8537 .loc 1 2606 39 discriminator 1 view .LVU2659
- 8538 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2
-2606:Src/main.c **** {
- 8539 .loc 1 2606 26 discriminator 1 view .LVU2660
- 8540 016c 002B cmp r3, #0
- 8541 016e 40F08180 bne .L478
- 8542 .L470:
-2615:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET);
- 8543 .loc 1 2615 3 is_stmt 1 view .LVU2661
- 8544 0172 0022 movs r2, #0
- ARM GAS /tmp/ccLSPxIe.s page 547
-
-
- 8545 0174 0121 movs r1, #1
- 8546 0176 5B48 ldr r0, .L480+24
- 8547 0178 FFF7FEFF bl HAL_GPIO_WritePin
- 8548 .LVL791:
-2616:Src/main.c **** }
- 8549 .loc 1 2616 3 view .LVU2662
- 8550 017c 0022 movs r2, #0
- 8551 017e 4FF40061 mov r1, #2048
- 8552 0182 5748 ldr r0, .L480+20
- 8553 0184 FFF7FEFF bl HAL_GPIO_WritePin
- 8554 .LVL792:
- 8555 .L471:
-2619:Src/main.c **** {
- 8556 .loc 1 2619 2 view .LVU2663
-2619:Src/main.c **** {
- 8557 .loc 1 2619 17 is_stmt 0 view .LVU2664
- 8558 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2
-2619:Src/main.c **** {
- 8559 .loc 1 2619 5 view .LVU2665
- 8560 018a 1BB1 cbz r3, .L472
-2619:Src/main.c **** {
- 8561 .loc 1 2619 39 discriminator 1 view .LVU2666
- 8562 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2
-2619:Src/main.c **** {
- 8563 .loc 1 2619 26 discriminator 1 view .LVU2667
- 8564 018e 002B cmp r3, #0
- 8565 0190 40F08680 bne .L479
- 8566 .L472:
-2628:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET);
- 8567 .loc 1 2628 3 is_stmt 1 view .LVU2668
- 8568 0194 0022 movs r2, #0
- 8569 0196 0221 movs r1, #2
- 8570 0198 5248 ldr r0, .L480+24
- 8571 019a FFF7FEFF bl HAL_GPIO_WritePin
- 8572 .LVL793:
-2629:Src/main.c **** }
- 8573 .loc 1 2629 3 view .LVU2669
- 8574 019e 0022 movs r2, #0
- 8575 01a0 2021 movs r1, #32
- 8576 01a2 4E48 ldr r0, .L480+16
- 8577 01a4 FFF7FEFF bl HAL_GPIO_WritePin
- 8578 .LVL794:
- 8579 .L473:
-2632:Src/main.c **** {
- 8580 .loc 1 2632 2 view .LVU2670
-2632:Src/main.c **** {
- 8581 .loc 1 2632 16 is_stmt 0 view .LVU2671
- 8582 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2
-2632:Src/main.c **** {
- 8583 .loc 1 2632 5 view .LVU2672
- 8584 01aa 1BB9 cbnz r3, .L474
-2634:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01;
- 8585 .loc 1 2634 3 is_stmt 1 view .LVU2673
-2634:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01;
- 8586 .loc 1 2634 31 is_stmt 0 view .LVU2674
- 8587 01ac 4E4B ldr r3, .L480+28
- 8588 01ae 7B60 str r3, [r7, #4] @ float
- ARM GAS /tmp/ccLSPxIe.s page 548
-
-
-2635:Src/main.c **** }
- 8589 .loc 1 2635 3 is_stmt 1 view .LVU2675
-2635:Src/main.c **** }
- 8590 .loc 1 2635 31 is_stmt 0 view .LVU2676
- 8591 01b0 4E4B ldr r3, .L480+32
- 8592 01b2 BB60 str r3, [r7, #8] @ float
- 8593 .L474:
-2638:Src/main.c **** {
- 8594 .loc 1 2638 2 is_stmt 1 view .LVU2677
-2638:Src/main.c **** {
- 8595 .loc 1 2638 16 is_stmt 0 view .LVU2678
- 8596 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2
-2638:Src/main.c **** {
- 8597 .loc 1 2638 5 view .LVU2679
- 8598 01b6 1BB9 cbnz r3, .L456
-2640:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01;
- 8599 .loc 1 2640 3 is_stmt 1 view .LVU2680
-2640:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01;
- 8600 .loc 1 2640 31 is_stmt 0 view .LVU2681
- 8601 01b8 4B4B ldr r3, .L480+28
- 8602 01ba 7360 str r3, [r6, #4] @ float
-2641:Src/main.c **** }
- 8603 .loc 1 2641 3 is_stmt 1 view .LVU2682
-2641:Src/main.c **** }
- 8604 .loc 1 2641 31 is_stmt 0 view .LVU2683
- 8605 01bc 4B4B ldr r3, .L480+32
- 8606 01be B360 str r3, [r6, #8] @ float
- 8607 .L456:
-2643:Src/main.c ****
- 8608 .loc 1 2643 1 view .LVU2684
- 8609 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc}
- 8610 .LVL795:
- 8611 .L477:
-2494:Src/main.c **** {
- 8612 .loc 1 2494 6 view .LVU2685
- 8613 01c4 4FF48071 mov r1, #256
- 8614 01c8 4648 ldr r0, .L480+24
- 8615 01ca FFF7FEFF bl HAL_GPIO_ReadPin
- 8616 .LVL796:
-2493:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u
- 8617 .loc 1 2493 78 discriminator 1 view .LVU2686
- 8618 01ce 0128 cmp r0, #1
- 8619 01d0 7FF426AF bne .L457
-2496:Src/main.c **** if (test == 0) //0 - suc
- 8620 .loc 1 2496 3 is_stmt 1 view .LVU2687
-2496:Src/main.c **** if (test == 0) //0 - suc
- 8621 .loc 1 2496 10 is_stmt 0 view .LVU2688
- 8622 01d4 4648 ldr r0, .L480+36
- 8623 01d6 FFF7FEFF bl Mount_SD
- 8624 .LVL797:
-2496:Src/main.c **** if (test == 0) //0 - suc
- 8625 .loc 1 2496 8 discriminator 1 view .LVU2689
- 8626 01da 3C4B ldr r3, .L480
- 8627 01dc 1860 str r0, [r3]
-2497:Src/main.c **** {
- 8628 .loc 1 2497 3 is_stmt 1 view .LVU2690
-2497:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 549
-
-
- 8629 .loc 1 2497 6 is_stmt 0 view .LVU2691
- 8630 01de 0028 cmp r0, #0
- 8631 01e0 7FF41EAF bne .L457
-2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ
- 8632 .loc 1 2500 4 is_stmt 1 view .LVU2692
-2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ
- 8633 .loc 1 2500 11 is_stmt 0 view .LVU2693
- 8634 01e4 DFF80C91 ldr r9, .L480+40
- 8635 01e8 4846 mov r0, r9
- 8636 01ea FFF7FEFF bl Remove_File
- 8637 .LVL798:
-2500:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ
- 8638 .loc 1 2500 9 discriminator 1 view .LVU2694
- 8639 01ee DFF8DC80 ldr r8, .L480
- 8640 01f2 C8F80000 str r0, [r8]
-2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8641 .loc 1 2501 4 is_stmt 1 view .LVU2695
-2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8642 .loc 1 2501 11 is_stmt 0 view .LVU2696
- 8643 01f6 4846 mov r0, r9
- 8644 01f8 FFF7FEFF bl Create_File
- 8645 .LVL799:
-2501:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8646 .loc 1 2501 9 discriminator 1 view .LVU2697
- 8647 01fc C8F80000 str r0, [r8]
-2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8648 .loc 1 2502 4 is_stmt 1 view .LVU2698
-2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8649 .loc 1 2502 11 is_stmt 0 view .LVU2699
- 8650 0200 1E22 movs r2, #30
- 8651 0202 2946 mov r1, r5
- 8652 0204 4846 mov r0, r9
- 8653 0206 FFF7FEFF bl Write_File_byte
- 8654 .LVL800:
-2502:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8);
- 8655 .loc 1 2502 9 discriminator 1 view .LVU2700
- 8656 020a C8F80000 str r0, [r8]
-2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 8657 .loc 1 2503 4 is_stmt 1 view .LVU2701
-2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 8658 .loc 1 2503 11 is_stmt 0 view .LVU2702
- 8659 020e 1E22 movs r2, #30
- 8660 0210 2946 mov r1, r5
- 8661 0212 4846 mov r0, r9
- 8662 0214 FFF7FEFF bl Update_File_byte
- 8663 .LVL801:
-2503:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 8664 .loc 1 2503 9 discriminator 1 view .LVU2703
- 8665 0218 C8F80000 str r0, [r8]
-2504:Src/main.c **** }
- 8666 .loc 1 2504 4 is_stmt 1 view .LVU2704
-2504:Src/main.c **** }
- 8667 .loc 1 2504 11 is_stmt 0 view .LVU2705
- 8668 021c 3448 ldr r0, .L480+36
- 8669 021e FFF7FEFF bl Unmount_SD
- 8670 .LVL802:
-2504:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 550
-
-
- 8671 .loc 1 2504 9 discriminator 1 view .LVU2706
- 8672 0222 C8F80000 str r0, [r8]
- 8673 0226 FBE6 b .L457
- 8674 .LVL803:
- 8675 .L458:
-2554:Src/main.c **** }
- 8676 .loc 1 2554 3 is_stmt 1 view .LVU2707
- 8677 0228 0022 movs r2, #0
- 8678 022a 0821 movs r1, #8
- 8679 022c 2B48 ldr r0, .L480+16
- 8680 022e FFF7FEFF bl HAL_GPIO_WritePin
- 8681 .LVL804:
- 8682 0232 69E7 b .L459
- 8683 .L460:
-2563:Src/main.c **** }
- 8684 .loc 1 2563 3 view .LVU2708
- 8685 0234 0022 movs r2, #0
- 8686 0236 8021 movs r1, #128
- 8687 0238 2848 ldr r0, .L480+16
- 8688 023a FFF7FEFF bl HAL_GPIO_WritePin
- 8689 .LVL805:
- 8690 023e 6CE7 b .L461
- 8691 .L462:
-2573:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC
- 8692 .loc 1 2573 3 view .LVU2709
- 8693 0240 0022 movs r2, #0
- 8694 0242 4FF48071 mov r1, #256
- 8695 0246 2248 ldr r0, .L480+4
- 8696 0248 FFF7FEFF bl HAL_GPIO_WritePin
- 8697 .LVL806:
- 8698 024c 6FE7 b .L463
- 8699 .L464:
-2584:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC
- 8700 .loc 1 2584 3 view .LVU2710
- 8701 024e 0022 movs r2, #0
- 8702 0250 1021 movs r1, #16
- 8703 0252 2248 ldr r0, .L480+16
- 8704 0254 FFF7FEFF bl HAL_GPIO_WritePin
- 8705 .LVL807:
- 8706 0258 72E7 b .L465
- 8707 .L466:
-2594:Src/main.c **** }
- 8708 .loc 1 2594 3 view .LVU2711
- 8709 025a 0022 movs r2, #0
- 8710 025c 4FF48061 mov r1, #1024
- 8711 0260 1F48 ldr r0, .L480+20
- 8712 0262 FFF7FEFF bl HAL_GPIO_WritePin
- 8713 .LVL808:
- 8714 0266 75E7 b .L467
- 8715 .L468:
-2603:Src/main.c **** }
- 8716 .loc 1 2603 3 view .LVU2712
- 8717 0268 0022 movs r2, #0
- 8718 026a 0821 movs r1, #8
- 8719 026c 1D48 ldr r0, .L480+24
- 8720 026e FFF7FEFF bl HAL_GPIO_WritePin
- 8721 .LVL809:
- ARM GAS /tmp/ccLSPxIe.s page 551
-
-
- 8722 0272 78E7 b .L469
- 8723 .L478:
-2608:Src/main.c **** Set_LTEC(3,32767);
- 8724 .loc 1 2608 3 view .LVU2713
- 8725 0274 47F6FF71 movw r1, #32767
- 8726 0278 0320 movs r0, #3
- 8727 027a FFF7FEFF bl Set_LTEC
- 8728 .LVL810:
-2609:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET);
- 8729 .loc 1 2609 3 view .LVU2714
- 8730 027e 47F6FF71 movw r1, #32767
- 8731 0282 0320 movs r0, #3
- 8732 0284 FFF7FEFF bl Set_LTEC
- 8733 .LVL811:
-2610:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET);
- 8734 .loc 1 2610 3 view .LVU2715
- 8735 0288 0122 movs r2, #1
- 8736 028a 4FF40061 mov r1, #2048
- 8737 028e 1448 ldr r0, .L480+20
- 8738 0290 FFF7FEFF bl HAL_GPIO_WritePin
- 8739 .LVL812:
-2611:Src/main.c **** }
- 8740 .loc 1 2611 3 view .LVU2716
- 8741 0294 0122 movs r2, #1
- 8742 0296 1146 mov r1, r2
- 8743 0298 1248 ldr r0, .L480+24
- 8744 029a FFF7FEFF bl HAL_GPIO_WritePin
- 8745 .LVL813:
- 8746 029e 73E7 b .L471
- 8747 .L479:
-2621:Src/main.c **** Set_LTEC(4,32767);
- 8748 .loc 1 2621 3 view .LVU2717
- 8749 02a0 47F6FF71 movw r1, #32767
- 8750 02a4 0420 movs r0, #4
- 8751 02a6 FFF7FEFF bl Set_LTEC
- 8752 .LVL814:
-2622:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET);
- 8753 .loc 1 2622 3 view .LVU2718
- 8754 02aa 47F6FF71 movw r1, #32767
- 8755 02ae 0420 movs r0, #4
- 8756 02b0 FFF7FEFF bl Set_LTEC
- 8757 .LVL815:
-2623:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET);
- 8758 .loc 1 2623 3 view .LVU2719
- 8759 02b4 0122 movs r2, #1
- 8760 02b6 2021 movs r1, #32
- 8761 02b8 0848 ldr r0, .L480+16
- 8762 02ba FFF7FEFF bl HAL_GPIO_WritePin
- 8763 .LVL816:
-2624:Src/main.c **** }
- 8764 .loc 1 2624 3 view .LVU2720
- 8765 02be 0122 movs r2, #1
- 8766 02c0 0221 movs r1, #2
- 8767 02c2 0848 ldr r0, .L480+24
- 8768 02c4 FFF7FEFF bl HAL_GPIO_WritePin
- 8769 .LVL817:
- 8770 02c8 6EE7 b .L473
- ARM GAS /tmp/ccLSPxIe.s page 552
-
-
- 8771 .L481:
- 8772 02ca 00BF .align 2
- 8773 .L480:
- 8774 02cc 00000000 .word test
- 8775 02d0 000C0240 .word 1073875968
- 8776 02d4 0000803B .word 998244352
- 8777 02d8 00000000 .word Long_Data
- 8778 02dc 00080240 .word 1073874944
- 8779 02e0 00040240 .word 1073873920
- 8780 02e4 00000240 .word 1073872896
- 8781 02e8 00002041 .word 1092616192
- 8782 02ec 0AD7233C .word 1008981770
- 8783 02f0 00000000 .word .LC0
- 8784 02f4 04000000 .word .LC1
- 8785 .cfi_endproc
- 8786 .LFE1209:
- 8788 .section .text.Advanced_Controller_Temp,"ax",%progbits
- 8789 .align 1
- 8790 .global Advanced_Controller_Temp
- 8791 .syntax unified
- 8792 .thumb
- 8793 .thumb_func
- 8795 Advanced_Controller_Temp:
- 8796 .LVL818:
- 8797 .LFB1238:
-3673:Src/main.c **** // Main idea:
- 8798 .loc 1 3673 1 view -0
- 8799 .cfi_startproc
- 8800 @ args = 0, pretend = 0, frame = 0
- 8801 @ frame_needed = 0, uses_anonymous_args = 0
- 8802 @ link register save eliminated.
-3673:Src/main.c **** // Main idea:
- 8803 .loc 1 3673 1 is_stmt 0 view .LVU2722
- 8804 0000 30B4 push {r4, r5}
- 8805 .LCFI75:
- 8806 .cfi_def_cfa_offset 8
- 8807 .cfi_offset 4, -8
- 8808 .cfi_offset 5, -4
-3691:Src/main.c **** float P_coef_current;//, I_coef_current;
- 8809 .loc 1 3691 2 is_stmt 1 view .LVU2723
-3692:Src/main.c **** float e_integral;
- 8810 .loc 1 3692 2 view .LVU2724
-3693:Src/main.c **** int x_output;
- 8811 .loc 1 3693 2 view .LVU2725
-3694:Src/main.c ****
- 8812 .loc 1 3694 2 view .LVU2726
-3696:Src/main.c ****
- 8813 .loc 1 3696 2 view .LVU2727
-3696:Src/main.c ****
- 8814 .loc 1 3696 28 is_stmt 0 view .LVU2728
- 8815 0002 0B88 ldrh r3, [r1]
-3696:Src/main.c ****
- 8816 .loc 1 3696 65 view .LVU2729
- 8817 0004 0488 ldrh r4, [r0]
-3696:Src/main.c ****
- 8818 .loc 1 3696 8 view .LVU2730
- 8819 0006 1B1B subs r3, r3, r4
- ARM GAS /tmp/ccLSPxIe.s page 553
-
-
- 8820 .LVL819:
-3698:Src/main.c ****
- 8821 .loc 1 3698 2 is_stmt 1 view .LVU2731
-3698:Src/main.c ****
- 8822 .loc 1 3698 13 is_stmt 0 view .LVU2732
- 8823 0008 D1ED017A vldr.32 s15, [r1, #4]
- 8824 .LVL820:
-3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 8825 .loc 1 3700 2 is_stmt 1 view .LVU2733
-3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 8826 .loc 1 3700 20 is_stmt 0 view .LVU2734
- 8827 000c 03F6B73C addw ip, r3, #2999
-3700:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100
- 8828 .loc 1 3700 4 view .LVU2735
- 8829 0010 41F26E74 movw r4, #5998
- 8830 0014 A445 cmp ip, r4
- 8831 0016 18D8 bhi .L483
-3701:Src/main.c **** }
- 8832 .loc 1 3701 3 is_stmt 1 view .LVU2736
-3701:Src/main.c **** }
- 8833 .loc 1 3701 31 is_stmt 0 view .LVU2737
- 8834 0018 90ED027A vldr.32 s14, [r0, #8]
-3701:Src/main.c **** }
- 8835 .loc 1 3701 47 view .LVU2738
- 8836 001c 06EE903A vmov s13, r3 @ int
- 8837 0020 F8EEE66A vcvt.f32.s32 s13, s13
-3701:Src/main.c **** }
- 8838 .loc 1 3701 45 view .LVU2739
- 8839 0024 27EE267A vmul.f32 s14, s14, s13
-3701:Src/main.c **** }
- 8840 .loc 1 3701 76 view .LVU2740
- 8841 0028 284C ldr r4, .L493
- 8842 002a 2468 ldr r4, [r4]
- 8843 002c 284D ldr r5, .L493+4
- 8844 002e 2D68 ldr r5, [r5]
- 8845 0030 641B subs r4, r4, r5
-3701:Src/main.c **** }
- 8846 .loc 1 3701 64 view .LVU2741
- 8847 0032 06EE904A vmov s13, r4 @ int
- 8848 0036 F8EE666A vcvt.f32.u32 s13, s13
-3701:Src/main.c **** }
- 8849 .loc 1 3701 62 view .LVU2742
- 8850 003a 27EE267A vmul.f32 s14, s14, s13
-3701:Src/main.c **** }
- 8851 .loc 1 3701 87 view .LVU2743
- 8852 003e 9FED256A vldr.32 s12, .L493+8
- 8853 0042 C7EE066A vdiv.f32 s13, s14, s12
-3701:Src/main.c **** }
- 8854 .loc 1 3701 14 view .LVU2744
- 8855 0046 77EEA67A vadd.f32 s15, s15, s13
- 8856 .LVL821:
- 8857 .L483:
-3703:Src/main.c ****
- 8858 .loc 1 3703 2 is_stmt 1 view .LVU2745
-3703:Src/main.c ****
- 8859 .loc 1 3703 17 is_stmt 0 view .LVU2746
- 8860 004a D0ED016A vldr.32 s13, [r0, #4]
- ARM GAS /tmp/ccLSPxIe.s page 554
-
-
- 8861 .LVL822:
-3705:Src/main.c **** e_integral = 32000;
- 8862 .loc 1 3705 2 is_stmt 1 view .LVU2747
-3705:Src/main.c **** e_integral = 32000;
- 8863 .loc 1 3705 5 is_stmt 0 view .LVU2748
- 8864 004e 9FED227A vldr.32 s14, .L493+12
- 8865 0052 F4EEC77A vcmpe.f32 s15, s14
- 8866 0056 F1EE10FA vmrs APSR_nzcv, FPSCR
- 8867 005a 09DC bgt .L487
-3708:Src/main.c **** e_integral = -32000;
- 8868 .loc 1 3708 7 is_stmt 1 view .LVU2749
-3708:Src/main.c **** e_integral = -32000;
- 8869 .loc 1 3708 10 is_stmt 0 view .LVU2750
- 8870 005c 9FED1F7A vldr.32 s14, .L493+16
- 8871 0060 F4EEC77A vcmpe.f32 s15, s14
- 8872 0064 F1EE10FA vmrs APSR_nzcv, FPSCR
- 8873 0068 04D5 bpl .L484
-3709:Src/main.c **** }
- 8874 .loc 1 3709 15 view .LVU2751
- 8875 006a DFED1C7A vldr.32 s15, .L493+16
- 8876 .LVL823:
-3709:Src/main.c **** }
- 8877 .loc 1 3709 15 view .LVU2752
- 8878 006e 01E0 b .L484
- 8879 .LVL824:
- 8880 .L487:
-3706:Src/main.c **** }
- 8881 .loc 1 3706 15 view .LVU2753
- 8882 0070 DFED197A vldr.32 s15, .L493+12
- 8883 .LVL825:
- 8884 .L484:
-3711:Src/main.c ****
- 8885 .loc 1 3711 2 is_stmt 1 view .LVU2754
-3711:Src/main.c ****
- 8886 .loc 1 3711 26 is_stmt 0 view .LVU2755
- 8887 0074 C1ED017A vstr.32 s15, [r1, #4]
-3713:Src/main.c ****
- 8888 .loc 1 3713 2 is_stmt 1 view .LVU2756
-3713:Src/main.c ****
- 8889 .loc 1 3713 36 is_stmt 0 view .LVU2757
- 8890 0078 07EE103A vmov s14, r3 @ int
- 8891 007c B8EEC77A vcvt.f32.s32 s14, s14
- 8892 0080 27EE267A vmul.f32 s14, s14, s13
-3713:Src/main.c ****
- 8893 .loc 1 3713 19 view .LVU2758
- 8894 0084 DFED166A vldr.32 s13, .L493+20
- 8895 .LVL826:
-3713:Src/main.c ****
- 8896 .loc 1 3713 19 view .LVU2759
- 8897 0088 37EE267A vadd.f32 s14, s14, s13
-3713:Src/main.c ****
- 8898 .loc 1 3713 46 view .LVU2760
- 8899 008c FDEEE77A vcvt.s32.f32 s15, s15
- 8900 .LVL827:
-3713:Src/main.c ****
- 8901 .loc 1 3713 44 view .LVU2761
- 8902 0090 F8EEE77A vcvt.f32.s32 s15, s15
- ARM GAS /tmp/ccLSPxIe.s page 555
-
-
- 8903 0094 77EE877A vadd.f32 s15, s15, s14
-3713:Src/main.c ****
- 8904 .loc 1 3713 11 view .LVU2762
- 8905 0098 FDEEE77A vcvt.s32.f32 s15, s15
- 8906 009c 17EE900A vmov r0, s15 @ int
- 8907 .LVL828:
-3715:Src/main.c **** x_output = 8800;
- 8908 .loc 1 3715 2 is_stmt 1 view .LVU2763
-3715:Src/main.c **** x_output = 8800;
- 8909 .loc 1 3715 4 is_stmt 0 view .LVU2764
- 8910 00a0 B0F57A7F cmp r0, #1000
- 8911 00a4 06DB blt .L489
-3718:Src/main.c **** x_output = 56800;
- 8912 .loc 1 3718 7 is_stmt 1 view .LVU2765
-3718:Src/main.c **** x_output = 56800;
- 8913 .loc 1 3718 9 is_stmt 0 view .LVU2766
- 8914 00a6 4DF6E053 movw r3, #56800
- 8915 .LVL829:
-3718:Src/main.c **** x_output = 56800;
- 8916 .loc 1 3718 9 view .LVU2767
- 8917 00aa 9842 cmp r0, r3
- 8918 00ac 04DD ble .L485
-3719:Src/main.c **** }
- 8919 .loc 1 3719 12 view .LVU2768
- 8920 00ae 4DF6E050 movw r0, #56800
- 8921 .LVL830:
-3719:Src/main.c **** }
- 8922 .loc 1 3719 12 view .LVU2769
- 8923 00b2 01E0 b .L485
- 8924 .LVL831:
- 8925 .L489:
-3716:Src/main.c **** }
- 8926 .loc 1 3716 12 view .LVU2770
- 8927 00b4 42F26020 movw r0, #8800
- 8928 .LVL832:
- 8929 .L485:
-3722:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
- 8930 .loc 1 3722 2 is_stmt 1 view .LVU2771
-3722:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser
- 8931 .loc 1 3722 5 is_stmt 0 view .LVU2772
- 8932 00b8 022A cmp r2, #2
- 8933 00ba 02D0 beq .L492
- 8934 .LVL833:
- 8935 .L486:
-3725:Src/main.c **** }
- 8936 .loc 1 3725 2 is_stmt 1 view .LVU2773
-3726:Src/main.c ****
- 8937 .loc 1 3726 1 is_stmt 0 view .LVU2774
- 8938 00bc 80B2 uxth r0, r0
- 8939 .LVL834:
-3726:Src/main.c ****
- 8940 .loc 1 3726 1 view .LVU2775
- 8941 00be 30BC pop {r4, r5}
- 8942 .LCFI76:
- 8943 .cfi_remember_state
- 8944 .cfi_restore 5
- 8945 .cfi_restore 4
- ARM GAS /tmp/ccLSPxIe.s page 556
-
-
- 8946 .cfi_def_cfa_offset 0
- 8947 00c0 7047 bx lr
- 8948 .LVL835:
- 8949 .L492:
- 8950 .LCFI77:
- 8951 .cfi_restore_state
-3723:Src/main.c ****
- 8952 .loc 1 3723 3 is_stmt 1 view .LVU2776
-3723:Src/main.c ****
- 8953 .loc 1 3723 11 is_stmt 0 view .LVU2777
- 8954 00c2 024B ldr r3, .L493
- 8955 00c4 1A68 ldr r2, [r3]
- 8956 .LVL836:
-3723:Src/main.c ****
- 8957 .loc 1 3723 11 view .LVU2778
- 8958 00c6 024B ldr r3, .L493+4
- 8959 00c8 1A60 str r2, [r3]
- 8960 00ca F7E7 b .L486
- 8961 .L494:
- 8962 .align 2
- 8963 .L493:
- 8964 00cc 00000000 .word TO7
- 8965 00d0 00000000 .word TO7_PID
- 8966 00d4 0000C842 .word 1120403456
- 8967 00d8 0000FA46 .word 1190789120
- 8968 00dc 0000FAC6 .word -956694528
- 8969 00e0 00000047 .word 1191182336
- 8970 .cfi_endproc
- 8971 .LFE1238:
- 8973 .section .text.CalculateChecksum,"ax",%progbits
- 8974 .align 1
- 8975 .global CalculateChecksum
- 8976 .syntax unified
- 8977 .thumb
- 8978 .thumb_func
- 8980 CalculateChecksum:
- 8981 .LVL837:
- 8982 .LFB1241:
-3789:Src/main.c **** short i;
- 8983 .loc 1 3789 1 is_stmt 1 view -0
- 8984 .cfi_startproc
- 8985 @ args = 0, pretend = 0, frame = 0
- 8986 @ frame_needed = 0, uses_anonymous_args = 0
- 8987 @ link register save eliminated.
-3789:Src/main.c **** short i;
- 8988 .loc 1 3789 1 is_stmt 0 view .LVU2780
- 8989 0000 8446 mov ip, r0
-3790:Src/main.c **** uint16_t cs = *pbuff;
- 8990 .loc 1 3790 2 is_stmt 1 view .LVU2781
-3791:Src/main.c ****
- 8991 .loc 1 3791 2 view .LVU2782
-3791:Src/main.c ****
- 8992 .loc 1 3791 11 is_stmt 0 view .LVU2783
- 8993 0002 0088 ldrh r0, [r0]
- 8994 .LVL838:
-3793:Src/main.c **** {
- 8995 .loc 1 3793 3 is_stmt 1 view .LVU2784
- ARM GAS /tmp/ccLSPxIe.s page 557
-
-
-3793:Src/main.c **** {
- 8996 .loc 1 3793 9 is_stmt 0 view .LVU2785
- 8997 0004 0123 movs r3, #1
-3793:Src/main.c **** {
- 8998 .loc 1 3793 3 view .LVU2786
- 8999 0006 04E0 b .L496
- 9000 .LVL839:
- 9001 .L497:
-3795:Src/main.c **** }
- 9002 .loc 1 3795 3 is_stmt 1 view .LVU2787
-3795:Src/main.c **** }
- 9003 .loc 1 3795 9 is_stmt 0 view .LVU2788
- 9004 0008 3CF81320 ldrh r2, [ip, r3, lsl #1]
-3795:Src/main.c **** }
- 9005 .loc 1 3795 6 view .LVU2789
- 9006 000c 5040 eors r0, r0, r2
- 9007 .LVL840:
-3793:Src/main.c **** {
- 9008 .loc 1 3793 24 is_stmt 1 discriminator 3 view .LVU2790
- 9009 000e 0133 adds r3, r3, #1
- 9010 .LVL841:
-3793:Src/main.c **** {
- 9011 .loc 1 3793 24 is_stmt 0 discriminator 3 view .LVU2791
- 9012 0010 1BB2 sxth r3, r3
- 9013 .LVL842:
- 9014 .L496:
-3793:Src/main.c **** {
- 9015 .loc 1 3793 16 is_stmt 1 discriminator 1 view .LVU2792
- 9016 0012 8B42 cmp r3, r1
- 9017 0014 F8DB blt .L497
-3797:Src/main.c **** }
- 9018 .loc 1 3797 2 view .LVU2793
-3798:Src/main.c ****
- 9019 .loc 1 3798 1 is_stmt 0 view .LVU2794
- 9020 0016 7047 bx lr
- 9021 .cfi_endproc
- 9022 .LFE1241:
- 9024 .section .text.CheckChecksum,"ax",%progbits
- 9025 .align 1
- 9026 .global CheckChecksum
- 9027 .syntax unified
- 9028 .thumb
- 9029 .thumb_func
- 9031 CheckChecksum:
- 9032 .LVL843:
- 9033 .LFB1240:
-3768:Src/main.c **** uint16_t cl_ind;
- 9034 .loc 1 3768 1 is_stmt 1 view -0
- 9035 .cfi_startproc
- 9036 @ args = 0, pretend = 0, frame = 0
- 9037 @ frame_needed = 0, uses_anonymous_args = 0
-3768:Src/main.c **** uint16_t cl_ind;
- 9038 .loc 1 3768 1 is_stmt 0 view .LVU2796
- 9039 0000 10B5 push {r4, lr}
- 9040 .LCFI78:
- 9041 .cfi_def_cfa_offset 8
- 9042 .cfi_offset 4, -8
- ARM GAS /tmp/ccLSPxIe.s page 558
-
-
- 9043 .cfi_offset 14, -4
-3769:Src/main.c ****
- 9044 .loc 1 3769 3 is_stmt 1 view .LVU2797
-3771:Src/main.c **** {
- 9045 .loc 1 3771 3 view .LVU2798
- 9046 0002 0E4B ldr r3, .L504
- 9047 0004 1B88 ldrh r3, [r3]
- 9048 0006 41F21112 movw r2, #4369
- 9049 000a 9342 cmp r3, r2
- 9050 000c 05D0 beq .L501
- 9051 000e 47F27772 movw r2, #30583
- 9052 0012 9342 cmp r3, r2
- 9053 0014 0FD1 bne .L502
- 9054 0016 0E24 movs r4, #14
- 9055 0018 00E0 b .L499
- 9056 .L501:
-3777:Src/main.c **** break;
- 9057 .loc 1 3777 14 is_stmt 0 view .LVU2799
- 9058 001a 0D24 movs r4, #13
- 9059 .L499:
- 9060 .LVL844:
-3781:Src/main.c **** }
- 9061 .loc 1 3781 5 is_stmt 1 view .LVU2800
-3784:Src/main.c ****
- 9062 .loc 1 3784 3 view .LVU2801
-3784:Src/main.c ****
- 9063 .loc 1 3784 15 is_stmt 0 view .LVU2802
- 9064 001c 2146 mov r1, r4
- 9065 001e FFF7FEFF bl CalculateChecksum
- 9066 .LVL845:
-3784:Src/main.c ****
- 9067 .loc 1 3784 13 discriminator 1 view .LVU2803
- 9068 0022 074B ldr r3, .L504+4
- 9069 0024 1880 strh r0, [r3] @ movhi
-3786:Src/main.c **** }
- 9070 .loc 1 3786 3 is_stmt 1 view .LVU2804
-3786:Src/main.c **** }
- 9071 .loc 1 3786 32 is_stmt 0 view .LVU2805
- 9072 0026 074B ldr r3, .L504+8
- 9073 0028 33F81430 ldrh r3, [r3, r4, lsl #1]
-3786:Src/main.c **** }
- 9074 .loc 1 3786 46 view .LVU2806
- 9075 002c 9842 cmp r0, r3
- 9076 002e 14BF ite ne
- 9077 0030 0020 movne r0, #0
- 9078 0032 0120 moveq r0, #1
- 9079 .LVL846:
- 9080 .L500:
-3787:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len)
- 9081 .loc 1 3787 1 view .LVU2807
- 9082 0034 10BD pop {r4, pc}
- 9083 .LVL847:
- 9084 .L502:
-3771:Src/main.c **** {
- 9085 .loc 1 3771 3 view .LVU2808
- 9086 0036 0020 movs r0, #0
- 9087 .LVL848:
- ARM GAS /tmp/ccLSPxIe.s page 559
-
-
-3771:Src/main.c **** {
- 9088 .loc 1 3771 3 view .LVU2809
- 9089 0038 FCE7 b .L500
- 9090 .L505:
- 9091 003a 00BF .align 2
- 9092 .L504:
- 9093 003c 00000000 .word UART_header
- 9094 0040 00000000 .word CS_result
- 9095 0044 00000000 .word COMMAND
- 9096 .cfi_endproc
- 9097 .LFE1240:
- 9099 .section .rodata.SD_SAVE.str1.4,"aMS",%progbits,1
- 9100 .align 2
- 9101 .LC2:
- 9102 0000 46494C45 .ascii "FILE1.TXT\000"
- 9102 312E5458
- 9102 5400
- 9103 .section .text.SD_SAVE,"ax",%progbits
- 9104 .align 1
- 9105 .global SD_SAVE
- 9106 .syntax unified
- 9107 .thumb
- 9108 .thumb_func
- 9110 SD_SAVE:
- 9111 .LVL849:
- 9112 .LFB1242:
-3827:Src/main.c **** int test=0;
- 9113 .loc 1 3827 1 is_stmt 1 view -0
- 9114 .cfi_startproc
- 9115 @ args = 0, pretend = 0, frame = 0
- 9116 @ frame_needed = 0, uses_anonymous_args = 0
-3827:Src/main.c **** int test=0;
- 9117 .loc 1 3827 1 is_stmt 0 view .LVU2811
- 9118 0000 10B5 push {r4, lr}
- 9119 .LCFI79:
- 9120 .cfi_def_cfa_offset 8
- 9121 .cfi_offset 4, -8
- 9122 .cfi_offset 14, -4
- 9123 0002 0446 mov r4, r0
-3828:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 9124 .loc 1 3828 2 is_stmt 1 view .LVU2812
- 9125 .LVL850:
-3829:Src/main.c **** {
- 9126 .loc 1 3829 2 view .LVU2813
-3829:Src/main.c **** {
- 9127 .loc 1 3829 6 is_stmt 0 view .LVU2814
- 9128 0004 0121 movs r1, #1
- 9129 0006 0A48 ldr r0, .L513
- 9130 .LVL851:
-3829:Src/main.c **** {
- 9131 .loc 1 3829 6 view .LVU2815
- 9132 0008 FFF7FEFF bl HAL_GPIO_ReadPin
- 9133 .LVL852:
-3829:Src/main.c **** {
- 9134 .loc 1 3829 5 discriminator 1 view .LVU2816
- 9135 000c 08B1 cbz r0, .L511
-3846:Src/main.c **** }
- ARM GAS /tmp/ccLSPxIe.s page 560
-
-
- 9136 .loc 1 3846 10 view .LVU2817
- 9137 000e 0120 movs r0, #1
- 9138 .LVL853:
- 9139 .L506:
-3848:Src/main.c ****
- 9140 .loc 1 3848 1 view .LVU2818
- 9141 0010 10BD pop {r4, pc}
- 9142 .LVL854:
- 9143 .L511:
-3831:Src/main.c **** if (test == 0) //0 - suc
- 9144 .loc 1 3831 3 is_stmt 1 view .LVU2819
-3831:Src/main.c **** if (test == 0) //0 - suc
- 9145 .loc 1 3831 10 is_stmt 0 view .LVU2820
- 9146 0012 0848 ldr r0, .L513+4
- 9147 0014 FFF7FEFF bl Mount_SD
- 9148 .LVL855:
-3832:Src/main.c **** {
- 9149 .loc 1 3832 3 is_stmt 1 view .LVU2821
-3832:Src/main.c **** {
- 9150 .loc 1 3832 6 is_stmt 0 view .LVU2822
- 9151 0018 08B1 cbz r0, .L512
-3841:Src/main.c **** }
- 9152 .loc 1 3841 11 view .LVU2823
- 9153 001a 0120 movs r0, #1
- 9154 .LVL856:
-3841:Src/main.c **** }
- 9155 .loc 1 3841 11 view .LVU2824
- 9156 001c F8E7 b .L506
- 9157 .LVL857:
- 9158 .L512:
-3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 9159 .loc 1 3835 4 is_stmt 1 view .LVU2825
-3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 9160 .loc 1 3835 11 is_stmt 0 view .LVU2826
- 9161 001e 1E22 movs r2, #30
- 9162 0020 2146 mov r1, r4
- 9163 0022 0548 ldr r0, .L513+8
- 9164 .LVL858:
-3835:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 9165 .loc 1 3835 11 view .LVU2827
- 9166 0024 FFF7FEFF bl Update_File_byte
- 9167 .LVL859:
-3836:Src/main.c **** return test;
- 9168 .loc 1 3836 4 is_stmt 1 view .LVU2828
-3836:Src/main.c **** return test;
- 9169 .loc 1 3836 11 is_stmt 0 view .LVU2829
- 9170 0028 0248 ldr r0, .L513+4
- 9171 002a FFF7FEFF bl Unmount_SD
- 9172 .LVL860:
-3837:Src/main.c **** }
- 9173 .loc 1 3837 4 is_stmt 1 view .LVU2830
-3837:Src/main.c **** }
- 9174 .loc 1 3837 11 is_stmt 0 view .LVU2831
- 9175 002e EFE7 b .L506
- 9176 .L514:
- 9177 .align 2
- 9178 .L513:
- ARM GAS /tmp/ccLSPxIe.s page 561
-
-
- 9179 0030 000C0240 .word 1073875968
- 9180 0034 00000000 .word .LC0
- 9181 0038 00000000 .word .LC2
- 9182 .cfi_endproc
- 9183 .LFE1242:
- 9185 .section .text.SD_READ,"ax",%progbits
- 9186 .align 1
- 9187 .global SD_READ
- 9188 .syntax unified
- 9189 .thumb
- 9190 .thumb_func
- 9192 SD_READ:
- 9193 .LVL861:
- 9194 .LFB1243:
-3858:Src/main.c **** int test=0;
- 9195 .loc 1 3858 1 is_stmt 1 view -0
- 9196 .cfi_startproc
- 9197 @ args = 0, pretend = 0, frame = 0
- 9198 @ frame_needed = 0, uses_anonymous_args = 0
-3858:Src/main.c **** int test=0;
- 9199 .loc 1 3858 1 is_stmt 0 view .LVU2833
- 9200 0000 38B5 push {r3, r4, r5, lr}
- 9201 .LCFI80:
- 9202 .cfi_def_cfa_offset 16
- 9203 .cfi_offset 3, -16
- 9204 .cfi_offset 4, -12
- 9205 .cfi_offset 5, -8
- 9206 .cfi_offset 14, -4
- 9207 0002 0446 mov r4, r0
-3859:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 9208 .loc 1 3859 2 is_stmt 1 view .LVU2834
- 9209 .LVL862:
-3860:Src/main.c **** {
- 9210 .loc 1 3860 2 view .LVU2835
-3860:Src/main.c **** {
- 9211 .loc 1 3860 6 is_stmt 0 view .LVU2836
- 9212 0004 0121 movs r1, #1
- 9213 0006 0D48 ldr r0, .L522
- 9214 .LVL863:
-3860:Src/main.c **** {
- 9215 .loc 1 3860 6 view .LVU2837
- 9216 0008 FFF7FEFF bl HAL_GPIO_ReadPin
- 9217 .LVL864:
-3860:Src/main.c **** {
- 9218 .loc 1 3860 5 discriminator 1 view .LVU2838
- 9219 000c 08B1 cbz r0, .L520
-3878:Src/main.c **** }
- 9220 .loc 1 3878 10 view .LVU2839
- 9221 000e 0120 movs r0, #1
- 9222 .LVL865:
- 9223 .L515:
-3894:Src/main.c ****
- 9224 .loc 1 3894 1 view .LVU2840
- 9225 0010 38BD pop {r3, r4, r5, pc}
- 9226 .LVL866:
- 9227 .L520:
-3862:Src/main.c **** if (test == 0) //0 - suc
- ARM GAS /tmp/ccLSPxIe.s page 562
-
-
- 9228 .loc 1 3862 3 is_stmt 1 view .LVU2841
-3862:Src/main.c **** if (test == 0) //0 - suc
- 9229 .loc 1 3862 10 is_stmt 0 view .LVU2842
- 9230 0012 0B48 ldr r0, .L522+4
- 9231 0014 FFF7FEFF bl Mount_SD
- 9232 .LVL867:
-3863:Src/main.c **** {
- 9233 .loc 1 3863 3 is_stmt 1 view .LVU2843
-3863:Src/main.c **** {
- 9234 .loc 1 3863 6 is_stmt 0 view .LVU2844
- 9235 0018 08B1 cbz r0, .L521
-3873:Src/main.c **** }
- 9236 .loc 1 3873 11 view .LVU2845
- 9237 001a 0120 movs r0, #1
- 9238 .LVL868:
-3873:Src/main.c **** }
- 9239 .loc 1 3873 11 view .LVU2846
- 9240 001c F8E7 b .L515
- 9241 .LVL869:
- 9242 .L521:
-3866:Src/main.c **** fgoto+=DL_8;
- 9243 .loc 1 3866 4 is_stmt 1 view .LVU2847
-3866:Src/main.c **** fgoto+=DL_8;
- 9244 .loc 1 3866 11 is_stmt 0 view .LVU2848
- 9245 001e 094D ldr r5, .L522+8
- 9246 0020 2B68 ldr r3, [r5]
- 9247 0022 1E22 movs r2, #30
- 9248 0024 2146 mov r1, r4
- 9249 0026 0848 ldr r0, .L522+12
- 9250 .LVL870:
-3866:Src/main.c **** fgoto+=DL_8;
- 9251 .loc 1 3866 11 view .LVU2849
- 9252 0028 FFF7FEFF bl Seek_Read_File
- 9253 .LVL871:
-3867:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 9254 .loc 1 3867 4 is_stmt 1 view .LVU2850
-3867:Src/main.c **** test = Unmount_SD("/"); // 0 - succ
- 9255 .loc 1 3867 9 is_stmt 0 view .LVU2851
- 9256 002c 2B68 ldr r3, [r5]
- 9257 002e 1E33 adds r3, r3, #30
- 9258 0030 2B60 str r3, [r5]
-3868:Src/main.c **** return test;
- 9259 .loc 1 3868 4 is_stmt 1 view .LVU2852
-3868:Src/main.c **** return test;
- 9260 .loc 1 3868 11 is_stmt 0 view .LVU2853
- 9261 0032 0348 ldr r0, .L522+4
- 9262 0034 FFF7FEFF bl Unmount_SD
- 9263 .LVL872:
-3869:Src/main.c **** }
- 9264 .loc 1 3869 4 is_stmt 1 view .LVU2854
-3869:Src/main.c **** }
- 9265 .loc 1 3869 11 is_stmt 0 view .LVU2855
- 9266 0038 EAE7 b .L515
- 9267 .L523:
- 9268 003a 00BF .align 2
- 9269 .L522:
- 9270 003c 000C0240 .word 1073875968
- ARM GAS /tmp/ccLSPxIe.s page 563
-
-
- 9271 0040 00000000 .word .LC0
- 9272 0044 00000000 .word fgoto
- 9273 0048 00000000 .word .LC2
- 9274 .cfi_endproc
- 9275 .LFE1243:
- 9277 .section .text.SD_REMOVE,"ax",%progbits
- 9278 .align 1
- 9279 .global SD_REMOVE
- 9280 .syntax unified
- 9281 .thumb
- 9282 .thumb_func
- 9284 SD_REMOVE:
- 9285 .LFB1244:
-3897:Src/main.c **** int test=0;
- 9286 .loc 1 3897 1 is_stmt 1 view -0
- 9287 .cfi_startproc
- 9288 @ args = 0, pretend = 0, frame = 0
- 9289 @ frame_needed = 0, uses_anonymous_args = 0
- 9290 0000 10B5 push {r4, lr}
- 9291 .LCFI81:
- 9292 .cfi_def_cfa_offset 8
- 9293 .cfi_offset 4, -8
- 9294 .cfi_offset 14, -4
-3898:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET)
- 9295 .loc 1 3898 2 view .LVU2857
- 9296 .LVL873:
-3899:Src/main.c **** {
- 9297 .loc 1 3899 2 view .LVU2858
-3899:Src/main.c **** {
- 9298 .loc 1 3899 6 is_stmt 0 view .LVU2859
- 9299 0002 0121 movs r1, #1
- 9300 0004 0B48 ldr r0, .L531
- 9301 0006 FFF7FEFF bl HAL_GPIO_ReadPin
- 9302 .LVL874:
-3899:Src/main.c **** {
- 9303 .loc 1 3899 5 discriminator 1 view .LVU2860
- 9304 000a 08B1 cbz r0, .L529
-3917:Src/main.c **** }
- 9305 .loc 1 3917 10 view .LVU2861
- 9306 000c 0120 movs r0, #1
- 9307 .LVL875:
- 9308 .L524:
-3919:Src/main.c ****
- 9309 .loc 1 3919 1 view .LVU2862
- 9310 000e 10BD pop {r4, pc}
- 9311 .LVL876:
- 9312 .L529:
-3901:Src/main.c **** if (test==FR_OK)
- 9313 .loc 1 3901 3 is_stmt 1 view .LVU2863
-3901:Src/main.c **** if (test==FR_OK)
- 9314 .loc 1 3901 10 is_stmt 0 view .LVU2864
- 9315 0010 0948 ldr r0, .L531+4
- 9316 0012 FFF7FEFF bl Mount_SD
- 9317 .LVL877:
-3902:Src/main.c **** {
- 9318 .loc 1 3902 3 is_stmt 1 view .LVU2865
-3902:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 564
-
-
- 9319 .loc 1 3902 6 is_stmt 0 view .LVU2866
- 9320 0016 08B1 cbz r0, .L530
-3912:Src/main.c **** }
- 9321 .loc 1 3912 11 view .LVU2867
- 9322 0018 0120 movs r0, #1
- 9323 .LVL878:
-3912:Src/main.c **** }
- 9324 .loc 1 3912 11 view .LVU2868
- 9325 001a F8E7 b .L524
- 9326 .LVL879:
- 9327 .L530:
-3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc
- 9328 .loc 1 3904 4 is_stmt 1 view .LVU2869
-3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc
- 9329 .loc 1 3904 11 is_stmt 0 view .LVU2870
- 9330 001c 074C ldr r4, .L531+8
- 9331 001e 2046 mov r0, r4
- 9332 .LVL880:
-3904:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc
- 9333 .loc 1 3904 11 view .LVU2871
- 9334 0020 FFF7FEFF bl Remove_File
- 9335 .LVL881:
-3905:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
- 9336 .loc 1 3905 4 is_stmt 1 view .LVU2872
-3905:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt
- 9337 .loc 1 3905 11 is_stmt 0 view .LVU2873
- 9338 0024 2046 mov r0, r4
- 9339 0026 FFF7FEFF bl Create_File
- 9340 .LVL882:
-3907:Src/main.c **** return test;
- 9341 .loc 1 3907 4 is_stmt 1 view .LVU2874
-3907:Src/main.c **** return test;
- 9342 .loc 1 3907 11 is_stmt 0 view .LVU2875
- 9343 002a 0348 ldr r0, .L531+4
- 9344 002c FFF7FEFF bl Unmount_SD
- 9345 .LVL883:
-3908:Src/main.c **** }
- 9346 .loc 1 3908 4 is_stmt 1 view .LVU2876
-3908:Src/main.c **** }
- 9347 .loc 1 3908 11 is_stmt 0 view .LVU2877
- 9348 0030 EDE7 b .L524
- 9349 .L532:
- 9350 0032 00BF .align 2
- 9351 .L531:
- 9352 0034 000C0240 .word 1073875968
- 9353 0038 00000000 .word .LC0
- 9354 003c 00000000 .word .LC2
- 9355 .cfi_endproc
- 9356 .LFE1244:
- 9358 .section .text.USART_TX,"ax",%progbits
- 9359 .align 1
- 9360 .global USART_TX
- 9361 .syntax unified
- 9362 .thumb
- 9363 .thumb_func
- 9365 USART_TX:
- 9366 .LVL884:
- ARM GAS /tmp/ccLSPxIe.s page 565
-
-
- 9367 .LFB1245:
-3923:Src/main.c **** uint16_t ind = 0;
- 9368 .loc 1 3923 1 is_stmt 1 view -0
- 9369 .cfi_startproc
- 9370 @ args = 0, pretend = 0, frame = 0
- 9371 @ frame_needed = 0, uses_anonymous_args = 0
- 9372 @ link register save eliminated.
-3923:Src/main.c **** uint16_t ind = 0;
- 9373 .loc 1 3923 1 is_stmt 0 view .LVU2879
- 9374 0000 8C46 mov ip, r1
-3924:Src/main.c **** while (indCR3, USART_CR3_DMAT);
-3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if DMA Mode is enabled for transmission
-3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAT LL_USART_IsEnabledDMAReq_TX
-3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
-3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDMAReq_TX(const USART_TypeDef *USARTx)
-3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL);
-3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Disabling on Reception Error
-3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr
-3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
-3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_DDRE);
-3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Disabling on Reception Error
-3596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_DisableDMADeactOnRxErr
-3597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableDMADeactOnRxErr(USART_TypeDef *USARTx)
-3601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_DDRE);
-3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if DMA Disabling on Reception Error is disabled
-3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr
-3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccLSPxIe.s page 567
-
-
-3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledDMADeactOnRxErr(const USART_TypeDef *USARTx)
-3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)) ? 1UL : 0UL);
-3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Get the data register address used for DMA transfer
-3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RDR RDR LL_USART_DMA_GetRegAddr\n
-3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_DMA_GetRegAddr
-3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Direction This parameter can be one of the following values:
-3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DMA_REG_DATA_TRANSMIT
-3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DMA_REG_DATA_RECEIVE
-3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Address of data register
-3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_DMA_GetRegAddr(const USART_TypeDef *USARTx, uint32_t Direction)
-3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t data_reg_addr;
-3629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (Direction == LL_USART_DMA_REG_DATA_TRANSMIT)
-3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* return address of TDR register */
-3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data_reg_addr = (uint32_t) &(USARTx->TDR);
-3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else
-3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* return address of RDR register */
-3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data_reg_addr = (uint32_t) &(USARTx->RDR);
-3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr;
-3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
-3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Data_Management Data_Management
-3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
-3650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Read Receiver Data register (Receive Data value, 8 bits)
-3654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RDR RDR LL_USART_ReceiveData8
-3655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF
-3657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
-3659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
-3661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Read Receiver Data register (Receive Data value, 9 bits)
-3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RDR RDR LL_USART_ReceiveData9
-3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccLSPxIe.s page 568
-
-
-3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0x1FF
-3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint16_t LL_USART_ReceiveData9(const USART_TypeDef *USARTx)
-3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint16_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR));
-3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
-3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
-3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
-3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
-3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll TDR TDR LL_USART_TransmitData8
-3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
-3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Value between Min_Data=0x00 and Max_Data=0xFF
-3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
-3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
-3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_TransmitData8(USART_TypeDef *USARTx, uint8_t Value)
- 9414 .loc 7 3681 22 view .LVU2894
- 9415 .LBB638:
-3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
-3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USARTx->TDR = Value;
- 9416 .loc 7 3683 3 view .LVU2895
- 9417 .loc 7 3683 15 is_stmt 0 view .LVU2896
- 9418 0018 034B ldr r3, .L538
- 9419 001a 9962 str r1, [r3, #40]
- 9420 .LVL890:
- 9421 .loc 7 3683 15 view .LVU2897
- 9422 .LBE638:
- 9423 .LBE637:
-3929:Src/main.c **** }
- 9424 .loc 1 3929 5 is_stmt 1 view .LVU2898
-3929:Src/main.c **** }
- 9425 .loc 1 3929 8 is_stmt 0 view .LVU2899
- 9426 001c 0132 adds r2, r2, #1
- 9427 .LVL891:
-3929:Src/main.c **** }
- 9428 .loc 1 3929 8 view .LVU2900
- 9429 001e 92B2 uxth r2, r2
- 9430 .LVL892:
- 9431 .L534:
-3925:Src/main.c **** {
- 9432 .loc 1 3925 13 is_stmt 1 view .LVU2901
- 9433 0020 6245 cmp r2, ip
- 9434 0022 F1D3 bcc .L536
-3931:Src/main.c ****
- 9435 .loc 1 3931 1 is_stmt 0 view .LVU2902
- 9436 0024 7047 bx lr
- 9437 .L539:
- 9438 0026 00BF .align 2
- 9439 .L538:
- 9440 0028 00100140 .word 1073811456
- 9441 .cfi_endproc
- 9442 .LFE1245:
- 9444 .section .text.USART_TX_DMA,"ax",%progbits
- 9445 .align 1
- 9446 .global USART_TX_DMA
- 9447 .syntax unified
- 9448 .thumb
- 9449 .thumb_func
- ARM GAS /tmp/ccLSPxIe.s page 569
-
-
- 9451 USART_TX_DMA:
- 9452 .LFB1246:
-3934:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter
- 9453 .loc 1 3934 1 is_stmt 1 view -0
- 9454 .cfi_startproc
- 9455 @ args = 0, pretend = 0, frame = 0
- 9456 @ frame_needed = 0, uses_anonymous_args = 0
- 9457 @ link register save eliminated.
- 9458 .LVL893:
- 9459 .L541:
-3935:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
- 9460 .loc 1 3935 20 discriminator 1 view .LVU2904
-3935:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7);
- 9461 .loc 1 3935 9 discriminator 1 view .LVU2905
- 9462 0000 0D4B ldr r3, .L542
- 9463 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 9464 0004 002B cmp r3, #0
- 9465 0006 FBD1 bne .L541
-3936:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz);
- 9466 .loc 1 3936 2 view .LVU2906
- 9467 .LVL894:
- 9468 .LBB639:
- 9469 .LBI639:
- 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 9470 .loc 6 517 22 view .LVU2907
- 9471 .LBB640:
- 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9472 .loc 6 519 3 view .LVU2908
- 9473 0008 0C4B ldr r3, .L542+4
- 9474 000a D3F8B820 ldr r2, [r3, #184]
- 9475 000e 22F00102 bic r2, r2, #1
- 9476 0012 C3F8B820 str r2, [r3, #184]
- 9477 .LVL895:
- 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9478 .loc 6 519 3 is_stmt 0 view .LVU2909
- 9479 .LBE640:
- 9480 .LBE639:
-3937:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7);
- 9481 .loc 1 3937 3 is_stmt 1 view .LVU2910
- 9482 .LBB641:
- 9483 .LBI641:
- 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 9484 .loc 6 971 22 view .LVU2911
- 9485 .LBB642:
- 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9486 .loc 6 973 3 view .LVU2912
- 9487 0016 D3F8BC20 ldr r2, [r3, #188]
- 9488 001a 6FF30F02 bfc r2, #0, #16
- 9489 001e 1043 orrs r0, r0, r2
- 9490 .LVL896:
- 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9491 .loc 6 973 3 is_stmt 0 view .LVU2913
- 9492 0020 C3F8BC00 str r0, [r3, #188]
- 9493 .LVL897:
- 973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9494 .loc 6 973 3 view .LVU2914
- 9495 .LBE642:
- ARM GAS /tmp/ccLSPxIe.s page 570
-
-
- 9496 .LBE641:
-3938:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin
- 9497 .loc 1 3938 3 is_stmt 1 view .LVU2915
- 9498 .LBB643:
- 9499 .LBI643:
- 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 9500 .loc 6 497 22 view .LVU2916
- 9501 .LBB644:
- 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9502 .loc 6 499 3 view .LVU2917
- 9503 0024 D3F8B820 ldr r2, [r3, #184]
- 9504 0028 42F00102 orr r2, r2, #1
- 9505 002c C3F8B820 str r2, [r3, #184]
- 9506 .LVL898:
- 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 9507 .loc 6 499 3 is_stmt 0 view .LVU2918
- 9508 .LBE644:
- 9509 .LBE643:
-3939:Src/main.c **** }
- 9510 .loc 1 3939 2 is_stmt 1 view .LVU2919
-3939:Src/main.c **** }
- 9511 .loc 1 3939 11 is_stmt 0 view .LVU2920
- 9512 0030 014B ldr r3, .L542
- 9513 0032 0122 movs r2, #1
- 9514 0034 1A70 strb r2, [r3]
-3940:Src/main.c ****
- 9515 .loc 1 3940 1 view .LVU2921
- 9516 0036 7047 bx lr
- 9517 .L543:
- 9518 .align 2
- 9519 .L542:
- 9520 0038 00000000 .word u_tx_flg
- 9521 003c 00640240 .word 1073898496
- 9522 .cfi_endproc
- 9523 .LFE1246:
- 9525 .section .text.Error_Handler,"ax",%progbits
- 9526 .align 1
- 9527 .global Error_Handler
- 9528 .syntax unified
- 9529 .thumb
- 9530 .thumb_func
- 9532 Error_Handler:
- 9533 .LFB1248:
-3948:Src/main.c **** //-------------------------------------------------------
-3949:Src/main.c **** /* USER CODE END 4 */
-3950:Src/main.c ****
-3951:Src/main.c **** /**
-3952:Src/main.c **** * @brief This function is executed in case of error occurrence.
-3953:Src/main.c **** * @retval None
-3954:Src/main.c **** */
-3955:Src/main.c **** void Error_Handler(void)
-3956:Src/main.c **** {
- 9534 .loc 1 3956 1 is_stmt 1 view -0
- 9535 .cfi_startproc
- 9536 @ Volatile: function does not return.
- 9537 @ args = 0, pretend = 0, frame = 0
- 9538 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccLSPxIe.s page 571
-
-
- 9539 @ link register save eliminated.
-3957:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */
-3958:Src/main.c **** /* User can add his own implementation to report the HAL error return state */
-3959:Src/main.c **** __disable_irq();
- 9540 .loc 1 3959 3 view .LVU2923
- 9541 .LBB645:
- 9542 .LBI645:
- 140:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 9543 .loc 8 140 27 view .LVU2924
- 9544 .LBB646:
- 142:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 9545 .loc 8 142 3 view .LVU2925
- 9546 .syntax unified
- 9547 @ 142 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 9548 0000 72B6 cpsid i
- 9549 @ 0 "" 2
- 9550 .thumb
- 9551 .syntax unified
- 9552 .L545:
- 9553 .LBE646:
- 9554 .LBE645:
-3960:Src/main.c **** while (1)
- 9555 .loc 1 3960 3 view .LVU2926
-3961:Src/main.c **** {
-3962:Src/main.c **** }
- 9556 .loc 1 3962 3 view .LVU2927
-3960:Src/main.c **** while (1)
- 9557 .loc 1 3960 9 view .LVU2928
- 9558 0002 FEE7 b .L545
- 9559 .cfi_endproc
- 9560 .LFE1248:
- 9562 .section .text.MX_ADC1_Init,"ax",%progbits
- 9563 .align 1
- 9564 .syntax unified
- 9565 .thumb
- 9566 .thumb_func
- 9568 MX_ADC1_Init:
- 9569 .LFB1188:
-1199:Src/main.c ****
- 9570 .loc 1 1199 1 view -0
- 9571 .cfi_startproc
- 9572 @ args = 0, pretend = 0, frame = 16
- 9573 @ frame_needed = 0, uses_anonymous_args = 0
- 9574 0000 00B5 push {lr}
- 9575 .LCFI82:
- 9576 .cfi_def_cfa_offset 4
- 9577 .cfi_offset 14, -4
- 9578 0002 85B0 sub sp, sp, #20
- 9579 .LCFI83:
- 9580 .cfi_def_cfa_offset 24
-1205:Src/main.c ****
- 9581 .loc 1 1205 3 view .LVU2930
-1205:Src/main.c ****
- 9582 .loc 1 1205 26 is_stmt 0 view .LVU2931
- 9583 0004 0023 movs r3, #0
- 9584 0006 0093 str r3, [sp]
- 9585 0008 0193 str r3, [sp, #4]
- ARM GAS /tmp/ccLSPxIe.s page 572
-
-
- 9586 000a 0293 str r3, [sp, #8]
- 9587 000c 0393 str r3, [sp, #12]
-1213:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 9588 .loc 1 1213 3 is_stmt 1 view .LVU2932
-1213:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 9589 .loc 1 1213 18 is_stmt 0 view .LVU2933
- 9590 000e 2B48 ldr r0, .L560
- 9591 0010 2B4A ldr r2, .L560+4
- 9592 0012 0260 str r2, [r0]
-1214:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- 9593 .loc 1 1214 3 is_stmt 1 view .LVU2934
-1214:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B;
- 9594 .loc 1 1214 29 is_stmt 0 view .LVU2935
- 9595 0014 4FF44032 mov r2, #196608
- 9596 0018 4260 str r2, [r0, #4]
-1215:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 9597 .loc 1 1215 3 is_stmt 1 view .LVU2936
-1215:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
- 9598 .loc 1 1215 25 is_stmt 0 view .LVU2937
- 9599 001a 8360 str r3, [r0, #8]
-1216:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
- 9600 .loc 1 1216 3 is_stmt 1 view .LVU2938
-1216:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE;
- 9601 .loc 1 1216 27 is_stmt 0 view .LVU2939
- 9602 001c 0122 movs r2, #1
- 9603 001e 0261 str r2, [r0, #16]
-1217:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
- 9604 .loc 1 1217 3 is_stmt 1 view .LVU2940
-1217:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE;
- 9605 .loc 1 1217 33 is_stmt 0 view .LVU2941
- 9606 0020 8361 str r3, [r0, #24]
-1218:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 9607 .loc 1 1218 3 is_stmt 1 view .LVU2942
-1218:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 9608 .loc 1 1218 36 is_stmt 0 view .LVU2943
- 9609 0022 80F82030 strb r3, [r0, #32]
-1219:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 9610 .loc 1 1219 3 is_stmt 1 view .LVU2944
-1219:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 9611 .loc 1 1219 35 is_stmt 0 view .LVU2945
- 9612 0026 C362 str r3, [r0, #44]
-1220:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 9613 .loc 1 1220 3 is_stmt 1 view .LVU2946
-1220:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 9614 .loc 1 1220 31 is_stmt 0 view .LVU2947
- 9615 0028 2649 ldr r1, .L560+8
- 9616 002a 8162 str r1, [r0, #40]
-1221:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
- 9617 .loc 1 1221 3 is_stmt 1 view .LVU2948
-1221:Src/main.c **** hadc1.Init.NbrOfConversion = 5;
- 9618 .loc 1 1221 24 is_stmt 0 view .LVU2949
- 9619 002c C360 str r3, [r0, #12]
-1222:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
- 9620 .loc 1 1222 3 is_stmt 1 view .LVU2950
-1222:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE;
- 9621 .loc 1 1222 30 is_stmt 0 view .LVU2951
- 9622 002e 0521 movs r1, #5
- ARM GAS /tmp/ccLSPxIe.s page 573
-
-
- 9623 0030 C161 str r1, [r0, #28]
-1223:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 9624 .loc 1 1223 3 is_stmt 1 view .LVU2952
-1223:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 9625 .loc 1 1223 36 is_stmt 0 view .LVU2953
- 9626 0032 80F83030 strb r3, [r0, #48]
-1224:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 9627 .loc 1 1224 3 is_stmt 1 view .LVU2954
-1224:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK)
- 9628 .loc 1 1224 27 is_stmt 0 view .LVU2955
- 9629 0036 4261 str r2, [r0, #20]
-1225:Src/main.c **** {
- 9630 .loc 1 1225 3 is_stmt 1 view .LVU2956
-1225:Src/main.c **** {
- 9631 .loc 1 1225 7 is_stmt 0 view .LVU2957
- 9632 0038 FFF7FEFF bl HAL_ADC_Init
- 9633 .LVL899:
-1225:Src/main.c **** {
- 9634 .loc 1 1225 6 discriminator 1 view .LVU2958
- 9635 003c 0028 cmp r0, #0
- 9636 003e 31D1 bne .L554
-1232:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
- 9637 .loc 1 1232 3 is_stmt 1 view .LVU2959
-1232:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
- 9638 .loc 1 1232 19 is_stmt 0 view .LVU2960
- 9639 0040 0923 movs r3, #9
- 9640 0042 0093 str r3, [sp]
-1233:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 9641 .loc 1 1233 3 is_stmt 1 view .LVU2961
-1233:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 9642 .loc 1 1233 16 is_stmt 0 view .LVU2962
- 9643 0044 0123 movs r3, #1
- 9644 0046 0193 str r3, [sp, #4]
-1234:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9645 .loc 1 1234 3 is_stmt 1 view .LVU2963
-1234:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9646 .loc 1 1234 24 is_stmt 0 view .LVU2964
- 9647 0048 0723 movs r3, #7
- 9648 004a 0293 str r3, [sp, #8]
-1235:Src/main.c **** {
- 9649 .loc 1 1235 3 is_stmt 1 view .LVU2965
-1235:Src/main.c **** {
- 9650 .loc 1 1235 7 is_stmt 0 view .LVU2966
- 9651 004c 6946 mov r1, sp
- 9652 004e 1B48 ldr r0, .L560
- 9653 0050 FFF7FEFF bl HAL_ADC_ConfigChannel
- 9654 .LVL900:
-1235:Src/main.c **** {
- 9655 .loc 1 1235 6 discriminator 1 view .LVU2967
- 9656 0054 40BB cbnz r0, .L555
-1242:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
- 9657 .loc 1 1242 3 is_stmt 1 view .LVU2968
-1242:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2;
- 9658 .loc 1 1242 19 is_stmt 0 view .LVU2969
- 9659 0056 0823 movs r3, #8
- 9660 0058 0093 str r3, [sp]
-1243:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- ARM GAS /tmp/ccLSPxIe.s page 574
-
-
- 9661 .loc 1 1243 3 is_stmt 1 view .LVU2970
-1243:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9662 .loc 1 1243 16 is_stmt 0 view .LVU2971
- 9663 005a 0223 movs r3, #2
- 9664 005c 0193 str r3, [sp, #4]
-1244:Src/main.c **** {
- 9665 .loc 1 1244 3 is_stmt 1 view .LVU2972
-1244:Src/main.c **** {
- 9666 .loc 1 1244 7 is_stmt 0 view .LVU2973
- 9667 005e 6946 mov r1, sp
- 9668 0060 1648 ldr r0, .L560
- 9669 0062 FFF7FEFF bl HAL_ADC_ConfigChannel
- 9670 .LVL901:
-1244:Src/main.c **** {
- 9671 .loc 1 1244 6 discriminator 1 view .LVU2974
- 9672 0066 08BB cbnz r0, .L556
-1251:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
- 9673 .loc 1 1251 3 is_stmt 1 view .LVU2975
-1251:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3;
- 9674 .loc 1 1251 19 is_stmt 0 view .LVU2976
- 9675 0068 0223 movs r3, #2
- 9676 006a 0093 str r3, [sp]
-1252:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9677 .loc 1 1252 3 is_stmt 1 view .LVU2977
-1252:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9678 .loc 1 1252 16 is_stmt 0 view .LVU2978
- 9679 006c 0323 movs r3, #3
- 9680 006e 0193 str r3, [sp, #4]
-1253:Src/main.c **** {
- 9681 .loc 1 1253 3 is_stmt 1 view .LVU2979
-1253:Src/main.c **** {
- 9682 .loc 1 1253 7 is_stmt 0 view .LVU2980
- 9683 0070 6946 mov r1, sp
- 9684 0072 1248 ldr r0, .L560
- 9685 0074 FFF7FEFF bl HAL_ADC_ConfigChannel
- 9686 .LVL902:
-1253:Src/main.c **** {
- 9687 .loc 1 1253 6 discriminator 1 view .LVU2981
- 9688 0078 D0B9 cbnz r0, .L557
-1260:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
- 9689 .loc 1 1260 3 is_stmt 1 view .LVU2982
-1260:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4;
- 9690 .loc 1 1260 19 is_stmt 0 view .LVU2983
- 9691 007a 0A23 movs r3, #10
- 9692 007c 0093 str r3, [sp]
-1261:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9693 .loc 1 1261 3 is_stmt 1 view .LVU2984
-1261:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9694 .loc 1 1261 16 is_stmt 0 view .LVU2985
- 9695 007e 0423 movs r3, #4
- 9696 0080 0193 str r3, [sp, #4]
-1262:Src/main.c **** {
- 9697 .loc 1 1262 3 is_stmt 1 view .LVU2986
-1262:Src/main.c **** {
- 9698 .loc 1 1262 7 is_stmt 0 view .LVU2987
- 9699 0082 6946 mov r1, sp
- 9700 0084 0D48 ldr r0, .L560
- ARM GAS /tmp/ccLSPxIe.s page 575
-
-
- 9701 0086 FFF7FEFF bl HAL_ADC_ConfigChannel
- 9702 .LVL903:
-1262:Src/main.c **** {
- 9703 .loc 1 1262 6 discriminator 1 view .LVU2988
- 9704 008a 98B9 cbnz r0, .L558
-1269:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
- 9705 .loc 1 1269 3 is_stmt 1 view .LVU2989
-1269:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5;
- 9706 .loc 1 1269 19 is_stmt 0 view .LVU2990
- 9707 008c 0B23 movs r3, #11
- 9708 008e 0093 str r3, [sp]
-1270:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9709 .loc 1 1270 3 is_stmt 1 view .LVU2991
-1270:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
- 9710 .loc 1 1270 16 is_stmt 0 view .LVU2992
- 9711 0090 0523 movs r3, #5
- 9712 0092 0193 str r3, [sp, #4]
-1271:Src/main.c **** {
- 9713 .loc 1 1271 3 is_stmt 1 view .LVU2993
-1271:Src/main.c **** {
- 9714 .loc 1 1271 7 is_stmt 0 view .LVU2994
- 9715 0094 6946 mov r1, sp
- 9716 0096 0948 ldr r0, .L560
- 9717 0098 FFF7FEFF bl HAL_ADC_ConfigChannel
- 9718 .LVL904:
-1271:Src/main.c **** {
- 9719 .loc 1 1271 6 discriminator 1 view .LVU2995
- 9720 009c 60B9 cbnz r0, .L559
-1279:Src/main.c ****
- 9721 .loc 1 1279 1 view .LVU2996
- 9722 009e 05B0 add sp, sp, #20
- 9723 .LCFI84:
- 9724 .cfi_remember_state
- 9725 .cfi_def_cfa_offset 4
- 9726 @ sp needed
- 9727 00a0 5DF804FB ldr pc, [sp], #4
- 9728 .L554:
- 9729 .LCFI85:
- 9730 .cfi_restore_state
-1227:Src/main.c **** }
- 9731 .loc 1 1227 5 is_stmt 1 view .LVU2997
- 9732 00a4 FFF7FEFF bl Error_Handler
- 9733 .LVL905:
- 9734 .L555:
-1237:Src/main.c **** }
- 9735 .loc 1 1237 5 view .LVU2998
- 9736 00a8 FFF7FEFF bl Error_Handler
- 9737 .LVL906:
- 9738 .L556:
-1246:Src/main.c **** }
- 9739 .loc 1 1246 5 view .LVU2999
- 9740 00ac FFF7FEFF bl Error_Handler
- 9741 .LVL907:
- 9742 .L557:
-1255:Src/main.c **** }
- 9743 .loc 1 1255 5 view .LVU3000
- 9744 00b0 FFF7FEFF bl Error_Handler
- ARM GAS /tmp/ccLSPxIe.s page 576
-
-
- 9745 .LVL908:
- 9746 .L558:
-1264:Src/main.c **** }
- 9747 .loc 1 1264 5 view .LVU3001
- 9748 00b4 FFF7FEFF bl Error_Handler
- 9749 .LVL909:
- 9750 .L559:
-1273:Src/main.c **** }
- 9751 .loc 1 1273 5 view .LVU3002
- 9752 00b8 FFF7FEFF bl Error_Handler
- 9753 .LVL910:
- 9754 .L561:
- 9755 .align 2
- 9756 .L560:
- 9757 00bc 00000000 .word hadc1
- 9758 00c0 00200140 .word 1073815552
- 9759 00c4 0100000F .word 251658241
- 9760 .cfi_endproc
- 9761 .LFE1188:
- 9763 .section .text.MX_ADC3_Init,"ax",%progbits
- 9764 .align 1
- 9765 .syntax unified
- 9766 .thumb
- 9767 .thumb_func
- 9769 MX_ADC3_Init:
- 9770 .LFB1189:
-1287:Src/main.c ****
- 9771 .loc 1 1287 1 view -0
- 9772 .cfi_startproc
- 9773 @ args = 0, pretend = 0, frame = 16
- 9774 @ frame_needed = 0, uses_anonymous_args = 0
- 9775 0000 00B5 push {lr}
- 9776 .LCFI86:
- 9777 .cfi_def_cfa_offset 4
- 9778 .cfi_offset 14, -4
- 9779 0002 85B0 sub sp, sp, #20
- 9780 .LCFI87:
- 9781 .cfi_def_cfa_offset 24
-1293:Src/main.c ****
- 9782 .loc 1 1293 3 view .LVU3004
-1293:Src/main.c ****
- 9783 .loc 1 1293 26 is_stmt 0 view .LVU3005
- 9784 0004 0023 movs r3, #0
- 9785 0006 0093 str r3, [sp]
- 9786 0008 0193 str r3, [sp, #4]
- 9787 000a 0293 str r3, [sp, #8]
- 9788 000c 0393 str r3, [sp, #12]
-1301:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 9789 .loc 1 1301 3 is_stmt 1 view .LVU3006
-1301:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8;
- 9790 .loc 1 1301 18 is_stmt 0 view .LVU3007
- 9791 000e 1448 ldr r0, .L568
- 9792 0010 144A ldr r2, .L568+4
- 9793 0012 0260 str r2, [r0]
-1302:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- 9794 .loc 1 1302 3 is_stmt 1 view .LVU3008
-1302:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B;
- ARM GAS /tmp/ccLSPxIe.s page 577
-
-
- 9795 .loc 1 1302 29 is_stmt 0 view .LVU3009
- 9796 0014 4FF44032 mov r2, #196608
- 9797 0018 4260 str r2, [r0, #4]
-1303:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 9798 .loc 1 1303 3 is_stmt 1 view .LVU3010
-1303:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE;
- 9799 .loc 1 1303 25 is_stmt 0 view .LVU3011
- 9800 001a 8360 str r3, [r0, #8]
-1304:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
- 9801 .loc 1 1304 3 is_stmt 1 view .LVU3012
-1304:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE;
- 9802 .loc 1 1304 27 is_stmt 0 view .LVU3013
- 9803 001c 0361 str r3, [r0, #16]
-1305:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
- 9804 .loc 1 1305 3 is_stmt 1 view .LVU3014
-1305:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE;
- 9805 .loc 1 1305 33 is_stmt 0 view .LVU3015
- 9806 001e 8361 str r3, [r0, #24]
-1306:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 9807 .loc 1 1306 3 is_stmt 1 view .LVU3016
-1306:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
- 9808 .loc 1 1306 36 is_stmt 0 view .LVU3017
- 9809 0020 80F82030 strb r3, [r0, #32]
-1307:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 9810 .loc 1 1307 3 is_stmt 1 view .LVU3018
-1307:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START;
- 9811 .loc 1 1307 35 is_stmt 0 view .LVU3019
- 9812 0024 C362 str r3, [r0, #44]
-1308:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 9813 .loc 1 1308 3 is_stmt 1 view .LVU3020
-1308:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT;
- 9814 .loc 1 1308 31 is_stmt 0 view .LVU3021
- 9815 0026 104A ldr r2, .L568+8
- 9816 0028 8262 str r2, [r0, #40]
-1309:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
- 9817 .loc 1 1309 3 is_stmt 1 view .LVU3022
-1309:Src/main.c **** hadc3.Init.NbrOfConversion = 1;
- 9818 .loc 1 1309 24 is_stmt 0 view .LVU3023
- 9819 002a C360 str r3, [r0, #12]
-1310:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
- 9820 .loc 1 1310 3 is_stmt 1 view .LVU3024
-1310:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE;
- 9821 .loc 1 1310 30 is_stmt 0 view .LVU3025
- 9822 002c 0122 movs r2, #1
- 9823 002e C261 str r2, [r0, #28]
-1311:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 9824 .loc 1 1311 3 is_stmt 1 view .LVU3026
-1311:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
- 9825 .loc 1 1311 36 is_stmt 0 view .LVU3027
- 9826 0030 80F83030 strb r3, [r0, #48]
-1312:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 9827 .loc 1 1312 3 is_stmt 1 view .LVU3028
-1312:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK)
- 9828 .loc 1 1312 27 is_stmt 0 view .LVU3029
- 9829 0034 4261 str r2, [r0, #20]
-1313:Src/main.c **** {
- 9830 .loc 1 1313 3 is_stmt 1 view .LVU3030
- ARM GAS /tmp/ccLSPxIe.s page 578
-
-
-1313:Src/main.c **** {
- 9831 .loc 1 1313 7 is_stmt 0 view .LVU3031
- 9832 0036 FFF7FEFF bl HAL_ADC_Init
- 9833 .LVL911:
-1313:Src/main.c **** {
- 9834 .loc 1 1313 6 discriminator 1 view .LVU3032
- 9835 003a 68B9 cbnz r0, .L566
-1320:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
- 9836 .loc 1 1320 3 is_stmt 1 view .LVU3033
-1320:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1;
- 9837 .loc 1 1320 19 is_stmt 0 view .LVU3034
- 9838 003c 0F23 movs r3, #15
- 9839 003e 0093 str r3, [sp]
-1321:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 9840 .loc 1 1321 3 is_stmt 1 view .LVU3035
-1321:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES;
- 9841 .loc 1 1321 16 is_stmt 0 view .LVU3036
- 9842 0040 0123 movs r3, #1
- 9843 0042 0193 str r3, [sp, #4]
-1322:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 9844 .loc 1 1322 3 is_stmt 1 view .LVU3037
-1322:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK)
- 9845 .loc 1 1322 24 is_stmt 0 view .LVU3038
- 9846 0044 0723 movs r3, #7
- 9847 0046 0293 str r3, [sp, #8]
-1323:Src/main.c **** {
- 9848 .loc 1 1323 3 is_stmt 1 view .LVU3039
-1323:Src/main.c **** {
- 9849 .loc 1 1323 7 is_stmt 0 view .LVU3040
- 9850 0048 6946 mov r1, sp
- 9851 004a 0548 ldr r0, .L568
- 9852 004c FFF7FEFF bl HAL_ADC_ConfigChannel
- 9853 .LVL912:
-1323:Src/main.c **** {
- 9854 .loc 1 1323 6 discriminator 1 view .LVU3041
- 9855 0050 20B9 cbnz r0, .L567
-1331:Src/main.c ****
- 9856 .loc 1 1331 1 view .LVU3042
- 9857 0052 05B0 add sp, sp, #20
- 9858 .LCFI88:
- 9859 .cfi_remember_state
- 9860 .cfi_def_cfa_offset 4
- 9861 @ sp needed
- 9862 0054 5DF804FB ldr pc, [sp], #4
- 9863 .L566:
- 9864 .LCFI89:
- 9865 .cfi_restore_state
-1315:Src/main.c **** }
- 9866 .loc 1 1315 5 is_stmt 1 view .LVU3043
- 9867 0058 FFF7FEFF bl Error_Handler
- 9868 .LVL913:
- 9869 .L567:
-1325:Src/main.c **** }
- 9870 .loc 1 1325 5 view .LVU3044
- 9871 005c FFF7FEFF bl Error_Handler
- 9872 .LVL914:
- 9873 .L569:
- ARM GAS /tmp/ccLSPxIe.s page 579
-
-
- 9874 .align 2
- 9875 .L568:
- 9876 0060 00000000 .word hadc3
- 9877 0064 00220140 .word 1073816064
- 9878 0068 0100000F .word 251658241
- 9879 .cfi_endproc
- 9880 .LFE1189:
- 9882 .section .text.MX_USART1_UART_Init,"ax",%progbits
- 9883 .align 1
- 9884 .syntax unified
- 9885 .thumb
- 9886 .thumb_func
- 9888 MX_USART1_UART_Init:
- 9889 .LFB1205:
-2067:Src/main.c ****
- 9890 .loc 1 2067 1 view -0
- 9891 .cfi_startproc
- 9892 @ args = 0, pretend = 0, frame = 208
- 9893 @ frame_needed = 0, uses_anonymous_args = 0
- 9894 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
- 9895 .LCFI90:
- 9896 .cfi_def_cfa_offset 24
- 9897 .cfi_offset 4, -24
- 9898 .cfi_offset 5, -20
- 9899 .cfi_offset 6, -16
- 9900 .cfi_offset 7, -12
- 9901 .cfi_offset 8, -8
- 9902 .cfi_offset 14, -4
- 9903 0004 B4B0 sub sp, sp, #208
- 9904 .LCFI91:
- 9905 .cfi_def_cfa_offset 232
-2073:Src/main.c ****
- 9906 .loc 1 2073 3 view .LVU3046
-2073:Src/main.c ****
- 9907 .loc 1 2073 24 is_stmt 0 view .LVU3047
- 9908 0006 0021 movs r1, #0
- 9909 0008 2D91 str r1, [sp, #180]
- 9910 000a 2E91 str r1, [sp, #184]
- 9911 000c 2F91 str r1, [sp, #188]
- 9912 000e 3091 str r1, [sp, #192]
- 9913 0010 3191 str r1, [sp, #196]
- 9914 0012 3291 str r1, [sp, #200]
- 9915 0014 3391 str r1, [sp, #204]
-2075:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 9916 .loc 1 2075 3 is_stmt 1 view .LVU3048
-2075:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
- 9917 .loc 1 2075 23 is_stmt 0 view .LVU3049
- 9918 0016 2791 str r1, [sp, #156]
- 9919 0018 2891 str r1, [sp, #160]
- 9920 001a 2991 str r1, [sp, #164]
- 9921 001c 2A91 str r1, [sp, #168]
- 9922 001e 2B91 str r1, [sp, #172]
- 9923 0020 2C91 str r1, [sp, #176]
-2076:Src/main.c ****
- 9924 .loc 1 2076 3 is_stmt 1 view .LVU3050
-2076:Src/main.c ****
- 9925 .loc 1 2076 28 is_stmt 0 view .LVU3051
- ARM GAS /tmp/ccLSPxIe.s page 580
-
-
- 9926 0022 9022 movs r2, #144
- 9927 0024 03A8 add r0, sp, #12
- 9928 0026 FFF7FEFF bl memset
- 9929 .LVL915:
-2080:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 9930 .loc 1 2080 3 is_stmt 1 view .LVU3052
-2080:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
- 9931 .loc 1 2080 44 is_stmt 0 view .LVU3053
- 9932 002a 4023 movs r3, #64
- 9933 002c 0393 str r3, [sp, #12]
-2081:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
- 9934 .loc 1 2081 3 is_stmt 1 view .LVU3054
-2082:Src/main.c **** {
- 9935 .loc 1 2082 3 view .LVU3055
-2082:Src/main.c **** {
- 9936 .loc 1 2082 7 is_stmt 0 view .LVU3056
- 9937 002e 03A8 add r0, sp, #12
- 9938 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
- 9939 .LVL916:
-2082:Src/main.c **** {
- 9940 .loc 1 2082 6 discriminator 1 view .LVU3057
- 9941 0034 0028 cmp r0, #0
- 9942 0036 40F09E80 bne .L573
-2088:Src/main.c ****
- 9943 .loc 1 2088 3 is_stmt 1 view .LVU3058
- 9944 .LVL917:
- 9945 .LBB647:
- 9946 .LBI647:
-1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 9947 .loc 3 1587 22 view .LVU3059
- 9948 .LBB648:
-1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs);
- 9949 .loc 3 1589 3 view .LVU3060
-1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 9950 .loc 3 1590 3 view .LVU3061
- 9951 003a 504B ldr r3, .L574
- 9952 003c 5A6C ldr r2, [r3, #68]
- 9953 003e 42F01002 orr r2, r2, #16
- 9954 0042 5A64 str r2, [r3, #68]
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9955 .loc 3 1592 3 view .LVU3062
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9956 .loc 3 1592 12 is_stmt 0 view .LVU3063
- 9957 0044 5A6C ldr r2, [r3, #68]
- 9958 0046 02F01002 and r2, r2, #16
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9959 .loc 3 1592 10 view .LVU3064
- 9960 004a 0292 str r2, [sp, #8]
- 9961 .loc 3 1593 3 is_stmt 1 view .LVU3065
- 9962 004c 029A ldr r2, [sp, #8]
- 9963 .LVL918:
- 9964 .loc 3 1593 3 is_stmt 0 view .LVU3066
- 9965 .LBE648:
- 9966 .LBE647:
-2090:Src/main.c **** /**USART1 GPIO Configuration
- 9967 .loc 1 2090 3 is_stmt 1 view .LVU3067
- 9968 .LBB649:
- ARM GAS /tmp/ccLSPxIe.s page 581
-
-
- 9969 .LBI649:
- 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- 9970 .loc 3 309 22 view .LVU3068
- 9971 .LBB650:
- 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB1ENR, Periphs);
- 9972 .loc 3 311 3 view .LVU3069
- 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- 9973 .loc 3 312 3 view .LVU3070
- 9974 004e 1A6B ldr r2, [r3, #48]
- 9975 0050 42F00102 orr r2, r2, #1
- 9976 0054 1A63 str r2, [r3, #48]
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9977 .loc 3 314 3 view .LVU3071
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9978 .loc 3 314 12 is_stmt 0 view .LVU3072
- 9979 0056 1B6B ldr r3, [r3, #48]
- 9980 0058 03F00103 and r3, r3, #1
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
- 9981 .loc 3 314 10 view .LVU3073
- 9982 005c 0193 str r3, [sp, #4]
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 9983 .loc 3 315 3 is_stmt 1 view .LVU3074
- 9984 005e 019B ldr r3, [sp, #4]
- 9985 .LVL919:
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- 9986 .loc 3 315 3 is_stmt 0 view .LVU3075
- 9987 .LBE650:
- 9988 .LBE649:
-2095:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 9989 .loc 1 2095 3 is_stmt 1 view .LVU3076
-2095:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 9990 .loc 1 2095 23 is_stmt 0 view .LVU3077
- 9991 0060 4FF40073 mov r3, #512
- 9992 0064 2793 str r3, [sp, #156]
-2096:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 9993 .loc 1 2096 3 is_stmt 1 view .LVU3078
-2096:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 9994 .loc 1 2096 24 is_stmt 0 view .LVU3079
- 9995 0066 4FF00208 mov r8, #2
- 9996 006a CDF8A080 str r8, [sp, #160]
-2097:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 9997 .loc 1 2097 3 is_stmt 1 view .LVU3080
-2097:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 9998 .loc 1 2097 25 is_stmt 0 view .LVU3081
- 9999 006e 0327 movs r7, #3
- 10000 0070 2997 str r7, [sp, #164]
-2098:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 10001 .loc 1 2098 3 is_stmt 1 view .LVU3082
-2098:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 10002 .loc 1 2098 30 is_stmt 0 view .LVU3083
- 10003 0072 0024 movs r4, #0
- 10004 0074 2A94 str r4, [sp, #168]
-2099:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 10005 .loc 1 2099 3 is_stmt 1 view .LVU3084
-2099:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 10006 .loc 1 2099 24 is_stmt 0 view .LVU3085
- 10007 0076 2B94 str r4, [sp, #172]
- ARM GAS /tmp/ccLSPxIe.s page 582
-
-
-2100:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 10008 .loc 1 2100 3 is_stmt 1 view .LVU3086
-2100:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 10009 .loc 1 2100 29 is_stmt 0 view .LVU3087
- 10010 0078 0726 movs r6, #7
- 10011 007a 2C96 str r6, [sp, #176]
-2101:Src/main.c ****
- 10012 .loc 1 2101 3 is_stmt 1 view .LVU3088
- 10013 007c 404D ldr r5, .L574+4
- 10014 007e 27A9 add r1, sp, #156
- 10015 0080 2846 mov r0, r5
- 10016 0082 FFF7FEFF bl LL_GPIO_Init
- 10017 .LVL920:
-2103:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 10018 .loc 1 2103 3 view .LVU3089
-2103:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;
- 10019 .loc 1 2103 23 is_stmt 0 view .LVU3090
- 10020 0086 4FF48063 mov r3, #1024
- 10021 008a 2793 str r3, [sp, #156]
-2104:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 10022 .loc 1 2104 3 is_stmt 1 view .LVU3091
-2104:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH;
- 10023 .loc 1 2104 24 is_stmt 0 view .LVU3092
- 10024 008c CDF8A080 str r8, [sp, #160]
-2105:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 10025 .loc 1 2105 3 is_stmt 1 view .LVU3093
-2105:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
- 10026 .loc 1 2105 25 is_stmt 0 view .LVU3094
- 10027 0090 2997 str r7, [sp, #164]
-2106:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 10028 .loc 1 2106 3 is_stmt 1 view .LVU3095
-2106:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;
- 10029 .loc 1 2106 30 is_stmt 0 view .LVU3096
- 10030 0092 2A94 str r4, [sp, #168]
-2107:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 10031 .loc 1 2107 3 is_stmt 1 view .LVU3097
-2107:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7;
- 10032 .loc 1 2107 24 is_stmt 0 view .LVU3098
- 10033 0094 2B94 str r4, [sp, #172]
-2108:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 10034 .loc 1 2108 3 is_stmt 1 view .LVU3099
-2108:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct);
- 10035 .loc 1 2108 29 is_stmt 0 view .LVU3100
- 10036 0096 2C96 str r6, [sp, #176]
-2109:Src/main.c ****
- 10037 .loc 1 2109 3 is_stmt 1 view .LVU3101
- 10038 0098 27A9 add r1, sp, #156
- 10039 009a 2846 mov r0, r5
- 10040 009c FFF7FEFF bl LL_GPIO_Init
- 10041 .LVL921:
-2114:Src/main.c ****
- 10042 .loc 1 2114 3 view .LVU3102
- 10043 .LBB651:
- 10044 .LBI651:
-1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10045 .loc 6 1032 22 view .LVU3103
- 10046 .LBB652:
- ARM GAS /tmp/ccLSPxIe.s page 583
-
-
-1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10047 .loc 6 1034 3 view .LVU3104
- 10048 00a0 384B ldr r3, .L574+8
- 10049 00a2 D3F8B820 ldr r2, [r3, #184]
- 10050 00a6 22F0F052 bic r2, r2, #503316480
- 10051 00aa 42F00062 orr r2, r2, #134217728
- 10052 00ae C3F8B820 str r2, [r3, #184]
- 10053 .LVL922:
-1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10054 .loc 6 1034 3 is_stmt 0 view .LVU3105
- 10055 .LBE652:
- 10056 .LBE651:
-2116:Src/main.c ****
- 10057 .loc 1 2116 3 is_stmt 1 view .LVU3106
- 10058 .LBB653:
- 10059 .LBI653:
- 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10060 .loc 6 598 22 view .LVU3107
- 10061 .LBB654:
- 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10062 .loc 6 600 3 view .LVU3108
- 10063 00b2 D3F8B820 ldr r2, [r3, #184]
- 10064 00b6 22F0C002 bic r2, r2, #192
- 10065 00ba 42F04002 orr r2, r2, #64
- 10066 00be C3F8B820 str r2, [r3, #184]
- 10067 .LVL923:
- 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10068 .loc 6 600 3 is_stmt 0 view .LVU3109
- 10069 .LBE654:
- 10070 .LBE653:
-2118:Src/main.c ****
- 10071 .loc 1 2118 3 is_stmt 1 view .LVU3110
- 10072 .LBB655:
- 10073 .LBI655:
- 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10074 .loc 6 924 22 view .LVU3111
- 10075 .LBB656:
- 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10076 .loc 6 926 3 view .LVU3112
- 10077 00c2 D3F8B820 ldr r2, [r3, #184]
- 10078 00c6 42F44032 orr r2, r2, #196608
- 10079 00ca C3F8B820 str r2, [r3, #184]
- 10080 .LVL924:
- 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10081 .loc 6 926 3 is_stmt 0 view .LVU3113
- 10082 .LBE656:
- 10083 .LBE655:
-2120:Src/main.c ****
- 10084 .loc 1 2120 3 is_stmt 1 view .LVU3114
- 10085 .LBB657:
- 10086 .LBI657:
- 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10087 .loc 6 646 22 view .LVU3115
- 10088 .LBB658:
- 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10089 .loc 6 648 3 view .LVU3116
- 10090 00ce D3F8B820 ldr r2, [r3, #184]
- ARM GAS /tmp/ccLSPxIe.s page 584
-
-
- 10091 00d2 22F49072 bic r2, r2, #288
- 10092 00d6 C3F8B820 str r2, [r3, #184]
- 10093 .LVL925:
- 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10094 .loc 6 648 3 is_stmt 0 view .LVU3117
- 10095 .LBE658:
- 10096 .LBE657:
-2122:Src/main.c ****
- 10097 .loc 1 2122 3 is_stmt 1 view .LVU3118
- 10098 .LBB659:
- 10099 .LBI659:
- 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10100 .loc 6 693 22 view .LVU3119
- 10101 .LBB660:
- 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10102 .loc 6 695 3 view .LVU3120
- 10103 00da D3F8B820 ldr r2, [r3, #184]
- 10104 00de 22F40072 bic r2, r2, #512
- 10105 00e2 C3F8B820 str r2, [r3, #184]
- 10106 .LVL926:
- 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10107 .loc 6 695 3 is_stmt 0 view .LVU3121
- 10108 .LBE660:
- 10109 .LBE659:
-2124:Src/main.c ****
- 10110 .loc 1 2124 3 is_stmt 1 view .LVU3122
- 10111 .LBB661:
- 10112 .LBI661:
- 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10113 .loc 6 738 22 view .LVU3123
- 10114 .LBB662:
- 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10115 .loc 6 740 3 view .LVU3124
- 10116 00e6 D3F8B820 ldr r2, [r3, #184]
- 10117 00ea 42F48062 orr r2, r2, #1024
- 10118 00ee C3F8B820 str r2, [r3, #184]
- 10119 .LVL927:
- 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10120 .loc 6 740 3 is_stmt 0 view .LVU3125
- 10121 .LBE662:
- 10122 .LBE661:
-2126:Src/main.c ****
- 10123 .loc 1 2126 3 is_stmt 1 view .LVU3126
- 10124 .LBB663:
- 10125 .LBI663:
- 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10126 .loc 6 784 22 view .LVU3127
- 10127 .LBB664:
- 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10128 .loc 6 786 3 view .LVU3128
- 10129 00f2 D3F8B820 ldr r2, [r3, #184]
- 10130 00f6 22F4C052 bic r2, r2, #6144
- 10131 00fa C3F8B820 str r2, [r3, #184]
- 10132 .LVL928:
- 786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10133 .loc 6 786 3 is_stmt 0 view .LVU3129
- 10134 .LBE664:
- ARM GAS /tmp/ccLSPxIe.s page 585
-
-
- 10135 .LBE663:
-2128:Src/main.c ****
- 10136 .loc 1 2128 3 is_stmt 1 view .LVU3130
- 10137 .LBB665:
- 10138 .LBI665:
- 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10139 .loc 6 831 22 view .LVU3131
- 10140 .LBB666:
- 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10141 .loc 6 833 3 view .LVU3132
- 10142 00fe D3F8B820 ldr r2, [r3, #184]
- 10143 0102 22F4C042 bic r2, r2, #24576
- 10144 0106 C3F8B820 str r2, [r3, #184]
- 10145 .LVL929:
- 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10146 .loc 6 833 3 is_stmt 0 view .LVU3133
- 10147 .LBE666:
- 10148 .LBE665:
-2130:Src/main.c ****
- 10149 .loc 1 2130 3 is_stmt 1 view .LVU3134
- 10150 .LBB667:
- 10151 .LBI667:
-1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 10152 .loc 6 1299 22 view .LVU3135
- 10153 .LBB668:
-1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10154 .loc 6 1301 3 view .LVU3136
- 10155 010a D3F8CC20 ldr r2, [r3, #204]
- 10156 010e 22F00402 bic r2, r2, #4
- 10157 0112 C3F8CC20 str r2, [r3, #204]
- 10158 .LVL930:
-1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 10159 .loc 6 1301 3 is_stmt 0 view .LVU3137
- 10160 .LBE668:
- 10161 .LBE667:
-2133:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
- 10162 .loc 1 2133 3 is_stmt 1 view .LVU3138
- 10163 .LBB669:
- 10164 .LBI669:
-1884:Drivers/CMSIS/Include/core_cm7.h **** {
- 10165 .loc 2 1884 26 view .LVU3139
- 10166 .LBB670:
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 10167 .loc 2 1886 3 view .LVU3140
-1886:Drivers/CMSIS/Include/core_cm7.h **** }
- 10168 .loc 2 1886 26 is_stmt 0 view .LVU3141
- 10169 0116 1C4B ldr r3, .L574+12
- 10170 0118 D868 ldr r0, [r3, #12]
- 10171 .LBE670:
- 10172 .LBE669:
-2133:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);
- 10173 .loc 1 2133 3 discriminator 1 view .LVU3142
- 10174 011a 2246 mov r2, r4
- 10175 011c 2146 mov r1, r4
- 10176 011e C0F30220 ubfx r0, r0, #8, #3
- 10177 0122 FFF7FEFF bl NVIC_EncodePriority
- 10178 .LVL931:
- ARM GAS /tmp/ccLSPxIe.s page 586
-
-
- 10179 .LBB671:
- 10180 .LBI671:
-2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 10181 .loc 2 2024 22 is_stmt 1 view .LVU3143
- 10182 .LBB672:
-2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 10183 .loc 2 2026 3 view .LVU3144
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 10184 .loc 2 2028 5 view .LVU3145
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 10185 .loc 2 2028 49 is_stmt 0 view .LVU3146
- 10186 0126 0001 lsls r0, r0, #4
- 10187 .LVL932:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 10188 .loc 2 2028 49 view .LVU3147
- 10189 0128 C0B2 uxtb r0, r0
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 10190 .loc 2 2028 47 view .LVU3148
- 10191 012a 184B ldr r3, .L574+16
- 10192 012c 83F82503 strb r0, [r3, #805]
- 10193 .LVL933:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 10194 .loc 2 2028 47 view .LVU3149
- 10195 .LBE672:
- 10196 .LBE671:
-2134:Src/main.c ****
- 10197 .loc 1 2134 3 is_stmt 1 view .LVU3150
- 10198 .LBB673:
- 10199 .LBI673:
-1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 10200 .loc 2 1896 22 view .LVU3151
- 10201 .LBB674:
-1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 10202 .loc 2 1898 3 view .LVU3152
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 10203 .loc 2 1900 5 view .LVU3153
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 10204 .loc 2 1900 43 is_stmt 0 view .LVU3154
- 10205 0130 2022 movs r2, #32
- 10206 0132 5A60 str r2, [r3, #4]
- 10207 .LVL934:
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 10208 .loc 2 1900 43 view .LVU3155
- 10209 .LBE674:
- 10210 .LBE673:
-2139:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
- 10211 .loc 1 2139 3 is_stmt 1 view .LVU3156
-2139:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;
- 10212 .loc 1 2139 29 is_stmt 0 view .LVU3157
- 10213 0134 4FF4E133 mov r3, #115200
- 10214 0138 2D93 str r3, [sp, #180]
-2140:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- 10215 .loc 1 2140 3 is_stmt 1 view .LVU3158
-2140:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1;
- 10216 .loc 1 2140 30 is_stmt 0 view .LVU3159
- 10217 013a 2E94 str r4, [sp, #184]
-2141:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
- ARM GAS /tmp/ccLSPxIe.s page 587
-
-
- 10218 .loc 1 2141 3 is_stmt 1 view .LVU3160
-2141:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE;
- 10219 .loc 1 2141 29 is_stmt 0 view .LVU3161
- 10220 013c 2F94 str r4, [sp, #188]
-2142:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- 10221 .loc 1 2142 3 is_stmt 1 view .LVU3162
-2142:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;
- 10222 .loc 1 2142 27 is_stmt 0 view .LVU3163
- 10223 013e 3094 str r4, [sp, #192]
-2143:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- 10224 .loc 1 2143 3 is_stmt 1 view .LVU3164
-2143:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;
- 10225 .loc 1 2143 38 is_stmt 0 view .LVU3165
- 10226 0140 0C23 movs r3, #12
- 10227 0142 3193 str r3, [sp, #196]
-2144:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- 10228 .loc 1 2144 3 is_stmt 1 view .LVU3166
-2144:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;
- 10229 .loc 1 2144 40 is_stmt 0 view .LVU3167
- 10230 0144 3294 str r4, [sp, #200]
-2145:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
- 10231 .loc 1 2145 3 is_stmt 1 view .LVU3168
-2145:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct);
- 10232 .loc 1 2145 33 is_stmt 0 view .LVU3169
- 10233 0146 3394 str r4, [sp, #204]
-2146:Src/main.c **** LL_USART_ConfigAsyncMode(USART1);
- 10234 .loc 1 2146 3 is_stmt 1 view .LVU3170
- 10235 0148 04F18044 add r4, r4, #1073741824
- 10236 014c 04F58834 add r4, r4, #69632
- 10237 0150 2DA9 add r1, sp, #180
- 10238 0152 2046 mov r0, r4
- 10239 0154 FFF7FEFF bl LL_USART_Init
- 10240 .LVL935:
-2147:Src/main.c **** LL_USART_Enable(USART1);
- 10241 .loc 1 2147 3 view .LVU3171
- 10242 .LBB675:
- 10243 .LBI675:
-2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 10244 .loc 7 2320 22 view .LVU3172
- 10245 .LBB676:
-2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN | USART_CR3_HDSEL));
- 10246 .loc 7 2326 3 view .LVU3173
- 10247 0158 6368 ldr r3, [r4, #4]
- 10248 015a 23F49043 bic r3, r3, #18432
- 10249 015e 6360 str r3, [r4, #4]
-2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10250 .loc 7 2327 3 view .LVU3174
- 10251 0160 A368 ldr r3, [r4, #8]
- 10252 0162 23F02A03 bic r3, r3, #42
- 10253 0166 A360 str r3, [r4, #8]
- 10254 .LVL936:
-2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10255 .loc 7 2327 3 is_stmt 0 view .LVU3175
- 10256 .LBE676:
- 10257 .LBE675:
-2148:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
- 10258 .loc 1 2148 3 is_stmt 1 view .LVU3176
- ARM GAS /tmp/ccLSPxIe.s page 588
-
-
- 10259 .LBB677:
- 10260 .LBI677:
+ 3110 .loc 8 2327 3 view .LVU1035
+ 3111 0160 A368 ldr r3, [r4, #8]
+ 3112 0162 23F02A03 bic r3, r3, #42
+ 3113 0166 A360 str r3, [r4, #8]
+ 3114 .LVL159:
+ 3115 .loc 8 2327 3 is_stmt 0 view .LVU1036
+ 3116 .LBE275:
+ 3117 .LBE274:
+ 962:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */
+ 3118 .loc 1 962 3 is_stmt 1 view .LVU1037
+ 3119 .LBB276:
+ 3120 .LBI276:
560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 10261 .loc 7 560 22 view .LVU3177
- 10262 .LBB678:
+ 3121 .loc 8 560 22 view .LVU1038
+ 3122 .LBB277:
562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10263 .loc 7 562 3 view .LVU3178
- 10264 0168 2368 ldr r3, [r4]
- 10265 016a 43F00103 orr r3, r3, #1
- 10266 016e 2360 str r3, [r4]
- 10267 .LVL937:
+ 3123 .loc 8 562 3 view .LVU1039
+ 3124 0168 2368 ldr r3, [r4]
+ 3125 016a 43F00103 orr r3, r3, #1
+ 3126 016e 2360 str r3, [r4]
+ 3127 .LVL160:
562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 10268 .loc 7 562 3 is_stmt 0 view .LVU3179
- 10269 .LBE678:
- 10270 .LBE677:
-2153:Src/main.c ****
- 10271 .loc 1 2153 1 view .LVU3180
- 10272 0170 34B0 add sp, sp, #208
- 10273 .LCFI92:
- 10274 .cfi_remember_state
- 10275 .cfi_def_cfa_offset 24
- 10276 @ sp needed
- 10277 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- 10278 .L573:
- 10279 .LCFI93:
- 10280 .cfi_restore_state
-2084:Src/main.c **** }
- 10281 .loc 1 2084 5 is_stmt 1 view .LVU3181
- 10282 0176 FFF7FEFF bl Error_Handler
- 10283 .LVL938:
- 10284 .L575:
- 10285 017a 00BF .align 2
- 10286 .L574:
- 10287 017c 00380240 .word 1073887232
- 10288 0180 00000240 .word 1073872896
- 10289 0184 00640240 .word 1073898496
- 10290 0188 00ED00E0 .word -536810240
- 10291 018c 00E100E0 .word -536813312
- 10292 .cfi_endproc
- 10293 .LFE1205:
- 10295 .section .text.MX_TIM10_Init,"ax",%progbits
- 10296 .align 1
- 10297 .syntax unified
- 10298 .thumb
- 10299 .thumb_func
- 10301 MX_TIM10_Init:
- 10302 .LFB1201:
-1886:Src/main.c ****
- 10303 .loc 1 1886 1 view -0
- 10304 .cfi_startproc
- 10305 @ args = 0, pretend = 0, frame = 0
- 10306 @ frame_needed = 0, uses_anonymous_args = 0
- 10307 0000 08B5 push {r3, lr}
- 10308 .LCFI94:
- 10309 .cfi_def_cfa_offset 8
- 10310 .cfi_offset 3, -8
- 10311 .cfi_offset 14, -4
- ARM GAS /tmp/ccLSPxIe.s page 589
-
-
-1895:Src/main.c **** htim10.Init.Prescaler = 183;
- 10312 .loc 1 1895 3 view .LVU3183
-1895:Src/main.c **** htim10.Init.Prescaler = 183;
- 10313 .loc 1 1895 19 is_stmt 0 view .LVU3184
- 10314 0002 0848 ldr r0, .L580
- 10315 0004 084B ldr r3, .L580+4
- 10316 0006 0360 str r3, [r0]
-1896:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10317 .loc 1 1896 3 is_stmt 1 view .LVU3185
-1896:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10318 .loc 1 1896 25 is_stmt 0 view .LVU3186
- 10319 0008 B723 movs r3, #183
- 10320 000a 4360 str r3, [r0, #4]
-1897:Src/main.c **** htim10.Init.Period = 9;
- 10321 .loc 1 1897 3 is_stmt 1 view .LVU3187
-1897:Src/main.c **** htim10.Init.Period = 9;
- 10322 .loc 1 1897 27 is_stmt 0 view .LVU3188
- 10323 000c 0023 movs r3, #0
- 10324 000e 8360 str r3, [r0, #8]
-1898:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10325 .loc 1 1898 3 is_stmt 1 view .LVU3189
-1898:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10326 .loc 1 1898 22 is_stmt 0 view .LVU3190
- 10327 0010 0922 movs r2, #9
- 10328 0012 C260 str r2, [r0, #12]
-1899:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10329 .loc 1 1899 3 is_stmt 1 view .LVU3191
-1899:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10330 .loc 1 1899 29 is_stmt 0 view .LVU3192
- 10331 0014 0361 str r3, [r0, #16]
-1900:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- 10332 .loc 1 1900 3 is_stmt 1 view .LVU3193
-1900:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK)
- 10333 .loc 1 1900 33 is_stmt 0 view .LVU3194
- 10334 0016 8361 str r3, [r0, #24]
-1901:Src/main.c **** {
- 10335 .loc 1 1901 3 is_stmt 1 view .LVU3195
-1901:Src/main.c **** {
- 10336 .loc 1 1901 7 is_stmt 0 view .LVU3196
- 10337 0018 FFF7FEFF bl HAL_TIM_Base_Init
- 10338 .LVL939:
-1901:Src/main.c **** {
- 10339 .loc 1 1901 6 discriminator 1 view .LVU3197
- 10340 001c 00B9 cbnz r0, .L579
-1909:Src/main.c ****
- 10341 .loc 1 1909 1 view .LVU3198
- 10342 001e 08BD pop {r3, pc}
- 10343 .L579:
-1903:Src/main.c **** }
- 10344 .loc 1 1903 5 is_stmt 1 view .LVU3199
- 10345 0020 FFF7FEFF bl Error_Handler
- 10346 .LVL940:
- 10347 .L581:
- 10348 .align 2
- 10349 .L580:
- 10350 0024 00000000 .word htim10
- 10351 0028 00440140 .word 1073824768
- ARM GAS /tmp/ccLSPxIe.s page 590
-
-
- 10352 .cfi_endproc
- 10353 .LFE1201:
- 10355 .section .text.MX_UART8_Init,"ax",%progbits
- 10356 .align 1
- 10357 .syntax unified
- 10358 .thumb
- 10359 .thumb_func
- 10361 MX_UART8_Init:
- 10362 .LFB1204:
-2032:Src/main.c ****
- 10363 .loc 1 2032 1 view -0
- 10364 .cfi_startproc
- 10365 @ args = 0, pretend = 0, frame = 0
- 10366 @ frame_needed = 0, uses_anonymous_args = 0
- 10367 0000 08B5 push {r3, lr}
- 10368 .LCFI95:
- 10369 .cfi_def_cfa_offset 8
- 10370 .cfi_offset 3, -8
- 10371 .cfi_offset 14, -4
-2041:Src/main.c **** huart8.Init.BaudRate = 115200;
- 10372 .loc 1 2041 3 view .LVU3201
-2041:Src/main.c **** huart8.Init.BaudRate = 115200;
- 10373 .loc 1 2041 19 is_stmt 0 view .LVU3202
- 10374 0002 0B48 ldr r0, .L586
- 10375 0004 0B4B ldr r3, .L586+4
- 10376 0006 0360 str r3, [r0]
-2042:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
- 10377 .loc 1 2042 3 is_stmt 1 view .LVU3203
-2042:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
- 10378 .loc 1 2042 24 is_stmt 0 view .LVU3204
- 10379 0008 4FF4E133 mov r3, #115200
- 10380 000c 4360 str r3, [r0, #4]
-2043:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
- 10381 .loc 1 2043 3 is_stmt 1 view .LVU3205
-2043:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
- 10382 .loc 1 2043 26 is_stmt 0 view .LVU3206
- 10383 000e 0023 movs r3, #0
- 10384 0010 8360 str r3, [r0, #8]
-2044:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
- 10385 .loc 1 2044 3 is_stmt 1 view .LVU3207
-2044:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
- 10386 .loc 1 2044 24 is_stmt 0 view .LVU3208
- 10387 0012 C360 str r3, [r0, #12]
-2045:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
- 10388 .loc 1 2045 3 is_stmt 1 view .LVU3209
-2045:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
- 10389 .loc 1 2045 22 is_stmt 0 view .LVU3210
- 10390 0014 0361 str r3, [r0, #16]
-2046:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 10391 .loc 1 2046 3 is_stmt 1 view .LVU3211
-2046:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
- 10392 .loc 1 2046 20 is_stmt 0 view .LVU3212
- 10393 0016 0C22 movs r2, #12
- 10394 0018 4261 str r2, [r0, #20]
-2047:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- 10395 .loc 1 2047 3 is_stmt 1 view .LVU3213
-2047:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
- ARM GAS /tmp/ccLSPxIe.s page 591
-
-
- 10396 .loc 1 2047 25 is_stmt 0 view .LVU3214
- 10397 001a 8361 str r3, [r0, #24]
-2048:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 10398 .loc 1 2048 3 is_stmt 1 view .LVU3215
-2048:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
- 10399 .loc 1 2048 28 is_stmt 0 view .LVU3216
- 10400 001c C361 str r3, [r0, #28]
-2049:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 10401 .loc 1 2049 3 is_stmt 1 view .LVU3217
-2049:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
- 10402 .loc 1 2049 30 is_stmt 0 view .LVU3218
- 10403 001e 0362 str r3, [r0, #32]
-2050:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
- 10404 .loc 1 2050 3 is_stmt 1 view .LVU3219
-2050:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
- 10405 .loc 1 2050 38 is_stmt 0 view .LVU3220
- 10406 0020 4362 str r3, [r0, #36]
-2051:Src/main.c **** {
- 10407 .loc 1 2051 3 is_stmt 1 view .LVU3221
-2051:Src/main.c **** {
- 10408 .loc 1 2051 7 is_stmt 0 view .LVU3222
- 10409 0022 FFF7FEFF bl HAL_UART_Init
- 10410 .LVL941:
-2051:Src/main.c **** {
- 10411 .loc 1 2051 6 discriminator 1 view .LVU3223
- 10412 0026 00B9 cbnz r0, .L585
-2059:Src/main.c ****
- 10413 .loc 1 2059 1 view .LVU3224
- 10414 0028 08BD pop {r3, pc}
- 10415 .L585:
-2053:Src/main.c **** }
- 10416 .loc 1 2053 5 is_stmt 1 view .LVU3225
- 10417 002a FFF7FEFF bl Error_Handler
- 10418 .LVL942:
- 10419 .L587:
- 10420 002e 00BF .align 2
- 10421 .L586:
- 10422 0030 00000000 .word huart8
- 10423 0034 007C0040 .word 1073773568
- 10424 .cfi_endproc
- 10425 .LFE1204:
- 10427 .section .text.MX_TIM8_Init,"ax",%progbits
- 10428 .align 1
- 10429 .syntax unified
- 10430 .thumb
- 10431 .thumb_func
- 10433 MX_TIM8_Init:
- 10434 .LFB1200:
-1839:Src/main.c ****
- 10435 .loc 1 1839 1 view -0
- 10436 .cfi_startproc
- 10437 @ args = 0, pretend = 0, frame = 32
- 10438 @ frame_needed = 0, uses_anonymous_args = 0
- 10439 0000 00B5 push {lr}
- 10440 .LCFI96:
- 10441 .cfi_def_cfa_offset 4
- 10442 .cfi_offset 14, -4
- ARM GAS /tmp/ccLSPxIe.s page 592
-
-
- 10443 0002 89B0 sub sp, sp, #36
- 10444 .LCFI97:
- 10445 .cfi_def_cfa_offset 40
-1845:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
- 10446 .loc 1 1845 3 view .LVU3227
-1845:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
- 10447 .loc 1 1845 26 is_stmt 0 view .LVU3228
- 10448 0004 0023 movs r3, #0
- 10449 0006 0493 str r3, [sp, #16]
- 10450 0008 0593 str r3, [sp, #20]
- 10451 000a 0693 str r3, [sp, #24]
- 10452 000c 0793 str r3, [sp, #28]
-1846:Src/main.c ****
- 10453 .loc 1 1846 3 is_stmt 1 view .LVU3229
-1846:Src/main.c ****
- 10454 .loc 1 1846 27 is_stmt 0 view .LVU3230
- 10455 000e 0193 str r3, [sp, #4]
- 10456 0010 0293 str r3, [sp, #8]
- 10457 0012 0393 str r3, [sp, #12]
-1851:Src/main.c **** htim8.Init.Prescaler = 0;
- 10458 .loc 1 1851 3 is_stmt 1 view .LVU3231
-1851:Src/main.c **** htim8.Init.Prescaler = 0;
- 10459 .loc 1 1851 18 is_stmt 0 view .LVU3232
- 10460 0014 1348 ldr r0, .L596
- 10461 0016 144A ldr r2, .L596+4
- 10462 0018 0260 str r2, [r0]
-1852:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10463 .loc 1 1852 3 is_stmt 1 view .LVU3233
-1852:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10464 .loc 1 1852 24 is_stmt 0 view .LVU3234
- 10465 001a 4360 str r3, [r0, #4]
-1853:Src/main.c **** htim8.Init.Period = 91;
- 10466 .loc 1 1853 3 is_stmt 1 view .LVU3235
-1853:Src/main.c **** htim8.Init.Period = 91;
- 10467 .loc 1 1853 26 is_stmt 0 view .LVU3236
- 10468 001c 8360 str r3, [r0, #8]
-1854:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10469 .loc 1 1854 3 is_stmt 1 view .LVU3237
-1854:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10470 .loc 1 1854 21 is_stmt 0 view .LVU3238
- 10471 001e 5B22 movs r2, #91
- 10472 0020 C260 str r2, [r0, #12]
-1855:Src/main.c **** htim8.Init.RepetitionCounter = 0;
- 10473 .loc 1 1855 3 is_stmt 1 view .LVU3239
-1855:Src/main.c **** htim8.Init.RepetitionCounter = 0;
- 10474 .loc 1 1855 28 is_stmt 0 view .LVU3240
- 10475 0022 0361 str r3, [r0, #16]
-1856:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10476 .loc 1 1856 3 is_stmt 1 view .LVU3241
-1856:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10477 .loc 1 1856 32 is_stmt 0 view .LVU3242
- 10478 0024 4361 str r3, [r0, #20]
-1857:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 10479 .loc 1 1857 3 is_stmt 1 view .LVU3243
-1857:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK)
- 10480 .loc 1 1857 32 is_stmt 0 view .LVU3244
- 10481 0026 8361 str r3, [r0, #24]
- ARM GAS /tmp/ccLSPxIe.s page 593
-
-
-1858:Src/main.c **** {
- 10482 .loc 1 1858 3 is_stmt 1 view .LVU3245
-1858:Src/main.c **** {
- 10483 .loc 1 1858 7 is_stmt 0 view .LVU3246
- 10484 0028 FFF7FEFF bl HAL_TIM_Base_Init
- 10485 .LVL943:
-1858:Src/main.c **** {
- 10486 .loc 1 1858 6 discriminator 1 view .LVU3247
- 10487 002c 98B9 cbnz r0, .L593
-1862:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 10488 .loc 1 1862 3 is_stmt 1 view .LVU3248
-1862:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK)
- 10489 .loc 1 1862 34 is_stmt 0 view .LVU3249
- 10490 002e 4FF48053 mov r3, #4096
- 10491 0032 0493 str r3, [sp, #16]
-1863:Src/main.c **** {
- 10492 .loc 1 1863 3 is_stmt 1 view .LVU3250
-1863:Src/main.c **** {
- 10493 .loc 1 1863 7 is_stmt 0 view .LVU3251
- 10494 0034 04A9 add r1, sp, #16
- 10495 0036 0B48 ldr r0, .L596
- 10496 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource
- 10497 .LVL944:
-1863:Src/main.c **** {
- 10498 .loc 1 1863 6 discriminator 1 view .LVU3252
- 10499 003c 68B9 cbnz r0, .L594
-1867:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 10500 .loc 1 1867 3 is_stmt 1 view .LVU3253
-1867:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET;
- 10501 .loc 1 1867 37 is_stmt 0 view .LVU3254
- 10502 003e 0023 movs r3, #0
- 10503 0040 0193 str r3, [sp, #4]
-1868:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 10504 .loc 1 1868 3 is_stmt 1 view .LVU3255
-1868:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 10505 .loc 1 1868 38 is_stmt 0 view .LVU3256
- 10506 0042 0293 str r3, [sp, #8]
-1869:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 10507 .loc 1 1869 3 is_stmt 1 view .LVU3257
-1869:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK)
- 10508 .loc 1 1869 33 is_stmt 0 view .LVU3258
- 10509 0044 0393 str r3, [sp, #12]
-1870:Src/main.c **** {
- 10510 .loc 1 1870 3 is_stmt 1 view .LVU3259
-1870:Src/main.c **** {
- 10511 .loc 1 1870 7 is_stmt 0 view .LVU3260
- 10512 0046 01A9 add r1, sp, #4
- 10513 0048 0648 ldr r0, .L596
- 10514 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
- 10515 .LVL945:
-1870:Src/main.c **** {
- 10516 .loc 1 1870 6 discriminator 1 view .LVU3261
- 10517 004e 30B9 cbnz r0, .L595
-1878:Src/main.c ****
- 10518 .loc 1 1878 1 view .LVU3262
- 10519 0050 09B0 add sp, sp, #36
- 10520 .LCFI98:
- ARM GAS /tmp/ccLSPxIe.s page 594
-
-
- 10521 .cfi_remember_state
- 10522 .cfi_def_cfa_offset 4
- 10523 @ sp needed
- 10524 0052 5DF804FB ldr pc, [sp], #4
- 10525 .L593:
- 10526 .LCFI99:
- 10527 .cfi_restore_state
-1860:Src/main.c **** }
- 10528 .loc 1 1860 5 is_stmt 1 view .LVU3263
- 10529 0056 FFF7FEFF bl Error_Handler
- 10530 .LVL946:
- 10531 .L594:
-1865:Src/main.c **** }
- 10532 .loc 1 1865 5 view .LVU3264
- 10533 005a FFF7FEFF bl Error_Handler
- 10534 .LVL947:
- 10535 .L595:
-1872:Src/main.c **** }
- 10536 .loc 1 1872 5 view .LVU3265
- 10537 005e FFF7FEFF bl Error_Handler
- 10538 .LVL948:
- 10539 .L597:
- 10540 0062 00BF .align 2
- 10541 .L596:
- 10542 0064 00000000 .word htim8
- 10543 0068 00040140 .word 1073808384
- 10544 .cfi_endproc
- 10545 .LFE1200:
- 10547 .section .text.MX_TIM11_Init,"ax",%progbits
- 10548 .align 1
- 10549 .syntax unified
- 10550 .thumb
- 10551 .thumb_func
- 10553 MX_TIM11_Init:
- 10554 .LFB1202:
-1917:Src/main.c ****
- 10555 .loc 1 1917 1 view -0
- 10556 .cfi_startproc
- 10557 @ args = 0, pretend = 0, frame = 32
- 10558 @ frame_needed = 0, uses_anonymous_args = 0
- 10559 0000 00B5 push {lr}
- 10560 .LCFI100:
- 10561 .cfi_def_cfa_offset 4
- 10562 .cfi_offset 14, -4
- 10563 0002 89B0 sub sp, sp, #36
- 10564 .LCFI101:
- 10565 .cfi_def_cfa_offset 40
-1923:Src/main.c ****
- 10566 .loc 1 1923 3 view .LVU3267
-1923:Src/main.c ****
- 10567 .loc 1 1923 22 is_stmt 0 view .LVU3268
- 10568 0004 0023 movs r3, #0
- 10569 0006 0193 str r3, [sp, #4]
- 10570 0008 0293 str r3, [sp, #8]
- 10571 000a 0393 str r3, [sp, #12]
- 10572 000c 0493 str r3, [sp, #16]
- 10573 000e 0593 str r3, [sp, #20]
- ARM GAS /tmp/ccLSPxIe.s page 595
-
-
- 10574 0010 0693 str r3, [sp, #24]
- 10575 0012 0793 str r3, [sp, #28]
-1928:Src/main.c **** htim11.Init.Prescaler = 1;
- 10576 .loc 1 1928 3 is_stmt 1 view .LVU3269
-1928:Src/main.c **** htim11.Init.Prescaler = 1;
- 10577 .loc 1 1928 19 is_stmt 0 view .LVU3270
- 10578 0014 1448 ldr r0, .L606
- 10579 0016 154A ldr r2, .L606+4
- 10580 0018 0260 str r2, [r0]
-1929:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10581 .loc 1 1929 3 is_stmt 1 view .LVU3271
-1929:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10582 .loc 1 1929 25 is_stmt 0 view .LVU3272
- 10583 001a 0122 movs r2, #1
- 10584 001c 4260 str r2, [r0, #4]
-1930:Src/main.c **** htim11.Init.Period = 91;
- 10585 .loc 1 1930 3 is_stmt 1 view .LVU3273
-1930:Src/main.c **** htim11.Init.Period = 91;
- 10586 .loc 1 1930 27 is_stmt 0 view .LVU3274
- 10587 001e 8360 str r3, [r0, #8]
-1931:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10588 .loc 1 1931 3 is_stmt 1 view .LVU3275
-1931:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10589 .loc 1 1931 22 is_stmt 0 view .LVU3276
- 10590 0020 5B22 movs r2, #91
- 10591 0022 C260 str r2, [r0, #12]
-1932:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 10592 .loc 1 1932 3 is_stmt 1 view .LVU3277
-1932:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
- 10593 .loc 1 1932 29 is_stmt 0 view .LVU3278
- 10594 0024 0361 str r3, [r0, #16]
-1933:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- 10595 .loc 1 1933 3 is_stmt 1 view .LVU3279
-1933:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK)
- 10596 .loc 1 1933 33 is_stmt 0 view .LVU3280
- 10597 0026 8023 movs r3, #128
- 10598 0028 8361 str r3, [r0, #24]
-1934:Src/main.c **** {
- 10599 .loc 1 1934 3 is_stmt 1 view .LVU3281
-1934:Src/main.c **** {
- 10600 .loc 1 1934 7 is_stmt 0 view .LVU3282
- 10601 002a FFF7FEFF bl HAL_TIM_Base_Init
- 10602 .LVL949:
-1934:Src/main.c **** {
- 10603 .loc 1 1934 6 discriminator 1 view .LVU3283
- 10604 002e A8B9 cbnz r0, .L603
-1938:Src/main.c **** {
- 10605 .loc 1 1938 3 is_stmt 1 view .LVU3284
-1938:Src/main.c **** {
- 10606 .loc 1 1938 7 is_stmt 0 view .LVU3285
- 10607 0030 0D48 ldr r0, .L606
- 10608 0032 FFF7FEFF bl HAL_TIM_PWM_Init
- 10609 .LVL950:
-1938:Src/main.c **** {
- 10610 .loc 1 1938 6 discriminator 1 view .LVU3286
- 10611 0036 98B9 cbnz r0, .L604
-1942:Src/main.c **** sConfigOC.Pulse = 91;
- ARM GAS /tmp/ccLSPxIe.s page 596
-
-
- 10612 .loc 1 1942 3 is_stmt 1 view .LVU3287
-1942:Src/main.c **** sConfigOC.Pulse = 91;
- 10613 .loc 1 1942 20 is_stmt 0 view .LVU3288
- 10614 0038 6023 movs r3, #96
- 10615 003a 0193 str r3, [sp, #4]
-1943:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10616 .loc 1 1943 3 is_stmt 1 view .LVU3289
-1943:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10617 .loc 1 1943 19 is_stmt 0 view .LVU3290
- 10618 003c 5B23 movs r3, #91
- 10619 003e 0293 str r3, [sp, #8]
-1944:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10620 .loc 1 1944 3 is_stmt 1 view .LVU3291
-1944:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10621 .loc 1 1944 24 is_stmt 0 view .LVU3292
- 10622 0040 0022 movs r2, #0
- 10623 0042 0392 str r2, [sp, #12]
-1945:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 10624 .loc 1 1945 3 is_stmt 1 view .LVU3293
-1945:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 10625 .loc 1 1945 24 is_stmt 0 view .LVU3294
- 10626 0044 0592 str r2, [sp, #20]
-1946:Src/main.c **** {
- 10627 .loc 1 1946 3 is_stmt 1 view .LVU3295
-1946:Src/main.c **** {
- 10628 .loc 1 1946 7 is_stmt 0 view .LVU3296
- 10629 0046 01A9 add r1, sp, #4
- 10630 0048 0748 ldr r0, .L606
- 10631 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
- 10632 .LVL951:
-1946:Src/main.c **** {
- 10633 .loc 1 1946 6 discriminator 1 view .LVU3297
- 10634 004e 48B9 cbnz r0, .L605
-1953:Src/main.c ****
- 10635 .loc 1 1953 3 is_stmt 1 view .LVU3298
- 10636 0050 0548 ldr r0, .L606
- 10637 0052 FFF7FEFF bl HAL_TIM_MspPostInit
- 10638 .LVL952:
-1955:Src/main.c ****
- 10639 .loc 1 1955 1 is_stmt 0 view .LVU3299
- 10640 0056 09B0 add sp, sp, #36
- 10641 .LCFI102:
- 10642 .cfi_remember_state
- 10643 .cfi_def_cfa_offset 4
- 10644 @ sp needed
- 10645 0058 5DF804FB ldr pc, [sp], #4
- 10646 .L603:
- 10647 .LCFI103:
- 10648 .cfi_restore_state
-1936:Src/main.c **** }
- 10649 .loc 1 1936 5 is_stmt 1 view .LVU3300
- 10650 005c FFF7FEFF bl Error_Handler
- 10651 .LVL953:
- 10652 .L604:
-1940:Src/main.c **** }
- 10653 .loc 1 1940 5 view .LVU3301
- 10654 0060 FFF7FEFF bl Error_Handler
- ARM GAS /tmp/ccLSPxIe.s page 597
-
-
- 10655 .LVL954:
- 10656 .L605:
-1948:Src/main.c **** }
- 10657 .loc 1 1948 5 view .LVU3302
- 10658 0064 FFF7FEFF bl Error_Handler
- 10659 .LVL955:
- 10660 .L607:
- 10661 .align 2
- 10662 .L606:
- 10663 0068 00000000 .word htim11
- 10664 006c 00480140 .word 1073825792
- 10665 .cfi_endproc
- 10666 .LFE1202:
- 10668 .section .text.MX_TIM4_Init,"ax",%progbits
- 10669 .align 1
- 10670 .syntax unified
- 10671 .thumb
- 10672 .thumb_func
- 10674 MX_TIM4_Init:
- 10675 .LFB1196:
-1667:Src/main.c ****
- 10676 .loc 1 1667 1 view -0
- 10677 .cfi_startproc
- 10678 @ args = 0, pretend = 0, frame = 56
- 10679 @ frame_needed = 0, uses_anonymous_args = 0
- 10680 0000 00B5 push {lr}
- 10681 .LCFI104:
- 10682 .cfi_def_cfa_offset 4
- 10683 .cfi_offset 14, -4
- 10684 0002 8FB0 sub sp, sp, #60
- 10685 .LCFI105:
- 10686 .cfi_def_cfa_offset 64
-1673:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
- 10687 .loc 1 1673 3 view .LVU3304
-1673:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0};
- 10688 .loc 1 1673 26 is_stmt 0 view .LVU3305
- 10689 0004 0023 movs r3, #0
- 10690 0006 0A93 str r3, [sp, #40]
- 10691 0008 0B93 str r3, [sp, #44]
- 10692 000a 0C93 str r3, [sp, #48]
- 10693 000c 0D93 str r3, [sp, #52]
-1674:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
- 10694 .loc 1 1674 3 is_stmt 1 view .LVU3306
-1674:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
- 10695 .loc 1 1674 27 is_stmt 0 view .LVU3307
- 10696 000e 0793 str r3, [sp, #28]
- 10697 0010 0893 str r3, [sp, #32]
- 10698 0012 0993 str r3, [sp, #36]
-1675:Src/main.c ****
- 10699 .loc 1 1675 3 is_stmt 1 view .LVU3308
-1675:Src/main.c ****
- 10700 .loc 1 1675 22 is_stmt 0 view .LVU3309
- 10701 0014 0093 str r3, [sp]
- 10702 0016 0193 str r3, [sp, #4]
- 10703 0018 0293 str r3, [sp, #8]
- 10704 001a 0393 str r3, [sp, #12]
- 10705 001c 0493 str r3, [sp, #16]
- ARM GAS /tmp/ccLSPxIe.s page 598
-
-
- 10706 001e 0593 str r3, [sp, #20]
- 10707 0020 0693 str r3, [sp, #24]
-1680:Src/main.c **** htim4.Init.Prescaler = 0;
- 10708 .loc 1 1680 3 is_stmt 1 view .LVU3310
-1680:Src/main.c **** htim4.Init.Prescaler = 0;
- 10709 .loc 1 1680 18 is_stmt 0 view .LVU3311
- 10710 0022 1E48 ldr r0, .L620
- 10711 0024 1E4A ldr r2, .L620+4
- 10712 0026 0260 str r2, [r0]
-1681:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10713 .loc 1 1681 3 is_stmt 1 view .LVU3312
-1681:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10714 .loc 1 1681 24 is_stmt 0 view .LVU3313
- 10715 0028 4360 str r3, [r0, #4]
-1682:Src/main.c **** htim4.Init.Period = 45;
- 10716 .loc 1 1682 3 is_stmt 1 view .LVU3314
-1682:Src/main.c **** htim4.Init.Period = 45;
- 10717 .loc 1 1682 26 is_stmt 0 view .LVU3315
- 10718 002a 8360 str r3, [r0, #8]
-1683:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10719 .loc 1 1683 3 is_stmt 1 view .LVU3316
-1683:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10720 .loc 1 1683 21 is_stmt 0 view .LVU3317
- 10721 002c 2D22 movs r2, #45
- 10722 002e C260 str r2, [r0, #12]
-1684:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10723 .loc 1 1684 3 is_stmt 1 view .LVU3318
-1684:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10724 .loc 1 1684 28 is_stmt 0 view .LVU3319
- 10725 0030 0361 str r3, [r0, #16]
-1685:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- 10726 .loc 1 1685 3 is_stmt 1 view .LVU3320
-1685:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
- 10727 .loc 1 1685 32 is_stmt 0 view .LVU3321
- 10728 0032 8361 str r3, [r0, #24]
-1686:Src/main.c **** {
- 10729 .loc 1 1686 3 is_stmt 1 view .LVU3322
-1686:Src/main.c **** {
- 10730 .loc 1 1686 7 is_stmt 0 view .LVU3323
- 10731 0034 FFF7FEFF bl HAL_TIM_Base_Init
- 10732 .LVL956:
-1686:Src/main.c **** {
- 10733 .loc 1 1686 6 discriminator 1 view .LVU3324
- 10734 0038 30BB cbnz r0, .L615
-1690:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- 10735 .loc 1 1690 3 is_stmt 1 view .LVU3325
-1690:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
- 10736 .loc 1 1690 34 is_stmt 0 view .LVU3326
- 10737 003a 4FF48053 mov r3, #4096
- 10738 003e 0A93 str r3, [sp, #40]
-1691:Src/main.c **** {
- 10739 .loc 1 1691 3 is_stmt 1 view .LVU3327
-1691:Src/main.c **** {
- 10740 .loc 1 1691 7 is_stmt 0 view .LVU3328
- 10741 0040 0AA9 add r1, sp, #40
- 10742 0042 1648 ldr r0, .L620
- 10743 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource
- ARM GAS /tmp/ccLSPxIe.s page 599
-
-
- 10744 .LVL957:
-1691:Src/main.c **** {
- 10745 .loc 1 1691 6 discriminator 1 view .LVU3329
- 10746 0048 00BB cbnz r0, .L616
-1695:Src/main.c **** {
- 10747 .loc 1 1695 3 is_stmt 1 view .LVU3330
-1695:Src/main.c **** {
- 10748 .loc 1 1695 7 is_stmt 0 view .LVU3331
- 10749 004a 1448 ldr r0, .L620
- 10750 004c FFF7FEFF bl HAL_TIM_PWM_Init
- 10751 .LVL958:
-1695:Src/main.c **** {
- 10752 .loc 1 1695 6 discriminator 1 view .LVU3332
- 10753 0050 F0B9 cbnz r0, .L617
-1699:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 10754 .loc 1 1699 3 is_stmt 1 view .LVU3333
-1699:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
- 10755 .loc 1 1699 37 is_stmt 0 view .LVU3334
- 10756 0052 0023 movs r3, #0
- 10757 0054 0793 str r3, [sp, #28]
-1700:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 10758 .loc 1 1700 3 is_stmt 1 view .LVU3335
-1700:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
- 10759 .loc 1 1700 33 is_stmt 0 view .LVU3336
- 10760 0056 0993 str r3, [sp, #36]
-1701:Src/main.c **** {
- 10761 .loc 1 1701 3 is_stmt 1 view .LVU3337
-1701:Src/main.c **** {
- 10762 .loc 1 1701 7 is_stmt 0 view .LVU3338
- 10763 0058 07A9 add r1, sp, #28
- 10764 005a 1048 ldr r0, .L620
- 10765 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization
- 10766 .LVL959:
-1701:Src/main.c **** {
- 10767 .loc 1 1701 6 discriminator 1 view .LVU3339
- 10768 0060 C0B9 cbnz r0, .L618
-1705:Src/main.c **** sConfigOC.Pulse = 22;
- 10769 .loc 1 1705 3 is_stmt 1 view .LVU3340
-1705:Src/main.c **** sConfigOC.Pulse = 22;
- 10770 .loc 1 1705 20 is_stmt 0 view .LVU3341
- 10771 0062 6023 movs r3, #96
- 10772 0064 0093 str r3, [sp]
-1706:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10773 .loc 1 1706 3 is_stmt 1 view .LVU3342
-1706:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10774 .loc 1 1706 19 is_stmt 0 view .LVU3343
- 10775 0066 1623 movs r3, #22
- 10776 0068 0193 str r3, [sp, #4]
-1707:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10777 .loc 1 1707 3 is_stmt 1 view .LVU3344
-1707:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10778 .loc 1 1707 24 is_stmt 0 view .LVU3345
- 10779 006a 0023 movs r3, #0
- 10780 006c 0293 str r3, [sp, #8]
-1708:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- 10781 .loc 1 1708 3 is_stmt 1 view .LVU3346
-1708:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
- ARM GAS /tmp/ccLSPxIe.s page 600
-
-
- 10782 .loc 1 1708 24 is_stmt 0 view .LVU3347
- 10783 006e 0493 str r3, [sp, #16]
-1709:Src/main.c **** {
- 10784 .loc 1 1709 3 is_stmt 1 view .LVU3348
-1709:Src/main.c **** {
- 10785 .loc 1 1709 7 is_stmt 0 view .LVU3349
- 10786 0070 0822 movs r2, #8
- 10787 0072 6946 mov r1, sp
- 10788 0074 0948 ldr r0, .L620
- 10789 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
- 10790 .LVL960:
-1709:Src/main.c **** {
- 10791 .loc 1 1709 6 discriminator 1 view .LVU3350
- 10792 007a 68B9 cbnz r0, .L619
-1716:Src/main.c ****
- 10793 .loc 1 1716 3 is_stmt 1 view .LVU3351
- 10794 007c 0748 ldr r0, .L620
- 10795 007e FFF7FEFF bl HAL_TIM_MspPostInit
- 10796 .LVL961:
-1718:Src/main.c ****
- 10797 .loc 1 1718 1 is_stmt 0 view .LVU3352
- 10798 0082 0FB0 add sp, sp, #60
- 10799 .LCFI106:
- 10800 .cfi_remember_state
- 10801 .cfi_def_cfa_offset 4
- 10802 @ sp needed
- 10803 0084 5DF804FB ldr pc, [sp], #4
- 10804 .L615:
- 10805 .LCFI107:
- 10806 .cfi_restore_state
-1688:Src/main.c **** }
- 10807 .loc 1 1688 5 is_stmt 1 view .LVU3353
- 10808 0088 FFF7FEFF bl Error_Handler
- 10809 .LVL962:
- 10810 .L616:
-1693:Src/main.c **** }
- 10811 .loc 1 1693 5 view .LVU3354
- 10812 008c FFF7FEFF bl Error_Handler
- 10813 .LVL963:
- 10814 .L617:
-1697:Src/main.c **** }
- 10815 .loc 1 1697 5 view .LVU3355
- 10816 0090 FFF7FEFF bl Error_Handler
- 10817 .LVL964:
- 10818 .L618:
-1703:Src/main.c **** }
- 10819 .loc 1 1703 5 view .LVU3356
- 10820 0094 FFF7FEFF bl Error_Handler
- 10821 .LVL965:
- 10822 .L619:
-1711:Src/main.c **** }
- 10823 .loc 1 1711 5 view .LVU3357
- 10824 0098 FFF7FEFF bl Error_Handler
- 10825 .LVL966:
- 10826 .L621:
- 10827 .align 2
- 10828 .L620:
- ARM GAS /tmp/ccLSPxIe.s page 601
-
-
- 10829 009c 00000000 .word htim4
- 10830 00a0 00080040 .word 1073743872
- 10831 .cfi_endproc
- 10832 .LFE1196:
- 10834 .section .text.MX_TIM1_Init,"ax",%progbits
- 10835 .align 1
- 10836 .syntax unified
- 10837 .thumb
- 10838 .thumb_func
- 10840 MX_TIM1_Init:
- 10841 .LFB1203:
-1963:Src/main.c ****
- 10842 .loc 1 1963 1 view -0
- 10843 .cfi_startproc
- 10844 @ args = 0, pretend = 0, frame = 88
- 10845 @ frame_needed = 0, uses_anonymous_args = 0
- 10846 0000 10B5 push {r4, lr}
- 10847 .LCFI108:
- 10848 .cfi_def_cfa_offset 8
- 10849 .cfi_offset 4, -8
- 10850 .cfi_offset 14, -4
- 10851 0002 96B0 sub sp, sp, #88
- 10852 .LCFI109:
- 10853 .cfi_def_cfa_offset 96
-1969:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
- 10854 .loc 1 1969 3 view .LVU3359
-1969:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
- 10855 .loc 1 1969 26 is_stmt 0 view .LVU3360
- 10856 0004 0024 movs r4, #0
- 10857 0006 1294 str r4, [sp, #72]
- 10858 0008 1394 str r4, [sp, #76]
- 10859 000a 1494 str r4, [sp, #80]
- 10860 000c 1594 str r4, [sp, #84]
-1970:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
- 10861 .loc 1 1970 3 is_stmt 1 view .LVU3361
-1970:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
- 10862 .loc 1 1970 22 is_stmt 0 view .LVU3362
- 10863 000e 0B94 str r4, [sp, #44]
- 10864 0010 0C94 str r4, [sp, #48]
- 10865 0012 0D94 str r4, [sp, #52]
- 10866 0014 0E94 str r4, [sp, #56]
- 10867 0016 0F94 str r4, [sp, #60]
- 10868 0018 1094 str r4, [sp, #64]
- 10869 001a 1194 str r4, [sp, #68]
-1971:Src/main.c ****
- 10870 .loc 1 1971 3 is_stmt 1 view .LVU3363
-1971:Src/main.c ****
- 10871 .loc 1 1971 34 is_stmt 0 view .LVU3364
- 10872 001c 2C22 movs r2, #44
- 10873 001e 2146 mov r1, r4
- 10874 0020 6846 mov r0, sp
- 10875 0022 FFF7FEFF bl memset
- 10876 .LVL967:
-1976:Src/main.c **** htim1.Init.Prescaler = 0;
- 10877 .loc 1 1976 3 is_stmt 1 view .LVU3365
-1976:Src/main.c **** htim1.Init.Prescaler = 0;
- 10878 .loc 1 1976 18 is_stmt 0 view .LVU3366
- ARM GAS /tmp/ccLSPxIe.s page 602
-
-
- 10879 0026 2548 ldr r0, .L634
- 10880 0028 254B ldr r3, .L634+4
- 10881 002a 0360 str r3, [r0]
-1977:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10882 .loc 1 1977 3 is_stmt 1 view .LVU3367
-1977:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
- 10883 .loc 1 1977 24 is_stmt 0 view .LVU3368
- 10884 002c 4460 str r4, [r0, #4]
-1978:Src/main.c **** htim1.Init.Period = 8;
- 10885 .loc 1 1978 3 is_stmt 1 view .LVU3369
-1978:Src/main.c **** htim1.Init.Period = 8;
- 10886 .loc 1 1978 26 is_stmt 0 view .LVU3370
- 10887 002e 8460 str r4, [r0, #8]
-1979:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10888 .loc 1 1979 3 is_stmt 1 view .LVU3371
-1979:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
- 10889 .loc 1 1979 21 is_stmt 0 view .LVU3372
- 10890 0030 0823 movs r3, #8
- 10891 0032 C360 str r3, [r0, #12]
-1980:Src/main.c **** htim1.Init.RepetitionCounter = 0;
- 10892 .loc 1 1980 3 is_stmt 1 view .LVU3373
-1980:Src/main.c **** htim1.Init.RepetitionCounter = 0;
- 10893 .loc 1 1980 28 is_stmt 0 view .LVU3374
- 10894 0034 0461 str r4, [r0, #16]
-1981:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10895 .loc 1 1981 3 is_stmt 1 view .LVU3375
-1981:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
- 10896 .loc 1 1981 32 is_stmt 0 view .LVU3376
- 10897 0036 4461 str r4, [r0, #20]
-1982:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
- 10898 .loc 1 1982 3 is_stmt 1 view .LVU3377
-1982:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
- 10899 .loc 1 1982 32 is_stmt 0 view .LVU3378
- 10900 0038 8461 str r4, [r0, #24]
-1983:Src/main.c **** {
- 10901 .loc 1 1983 3 is_stmt 1 view .LVU3379
-1983:Src/main.c **** {
- 10902 .loc 1 1983 7 is_stmt 0 view .LVU3380
- 10903 003a FFF7FEFF bl HAL_TIM_Base_Init
- 10904 .LVL968:
-1983:Src/main.c **** {
- 10905 .loc 1 1983 6 discriminator 1 view .LVU3381
- 10906 003e 0028 cmp r0, #0
- 10907 0040 32D1 bne .L629
-1987:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
- 10908 .loc 1 1987 3 is_stmt 1 view .LVU3382
-1987:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
- 10909 .loc 1 1987 34 is_stmt 0 view .LVU3383
- 10910 0042 4FF48053 mov r3, #4096
- 10911 0046 1293 str r3, [sp, #72]
-1988:Src/main.c **** {
- 10912 .loc 1 1988 3 is_stmt 1 view .LVU3384
-1988:Src/main.c **** {
- 10913 .loc 1 1988 7 is_stmt 0 view .LVU3385
- 10914 0048 12A9 add r1, sp, #72
- 10915 004a 1C48 ldr r0, .L634
- 10916 004c FFF7FEFF bl HAL_TIM_ConfigClockSource
- ARM GAS /tmp/ccLSPxIe.s page 603
-
-
- 10917 .LVL969:
-1988:Src/main.c **** {
- 10918 .loc 1 1988 6 discriminator 1 view .LVU3386
- 10919 0050 0028 cmp r0, #0
- 10920 0052 2BD1 bne .L630
-1992:Src/main.c **** {
- 10921 .loc 1 1992 3 is_stmt 1 view .LVU3387
-1992:Src/main.c **** {
- 10922 .loc 1 1992 7 is_stmt 0 view .LVU3388
- 10923 0054 1948 ldr r0, .L634
- 10924 0056 FFF7FEFF bl HAL_TIM_PWM_Init
- 10925 .LVL970:
-1992:Src/main.c **** {
- 10926 .loc 1 1992 6 discriminator 1 view .LVU3389
- 10927 005a 48BB cbnz r0, .L631
-1996:Src/main.c **** sConfigOC.Pulse = 4;
- 10928 .loc 1 1996 3 is_stmt 1 view .LVU3390
-1996:Src/main.c **** sConfigOC.Pulse = 4;
- 10929 .loc 1 1996 20 is_stmt 0 view .LVU3391
- 10930 005c 6023 movs r3, #96
- 10931 005e 0B93 str r3, [sp, #44]
-1997:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10932 .loc 1 1997 3 is_stmt 1 view .LVU3392
-1997:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
- 10933 .loc 1 1997 19 is_stmt 0 view .LVU3393
- 10934 0060 0423 movs r3, #4
- 10935 0062 0C93 str r3, [sp, #48]
-1998:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10936 .loc 1 1998 3 is_stmt 1 view .LVU3394
-1998:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
- 10937 .loc 1 1998 24 is_stmt 0 view .LVU3395
- 10938 0064 0022 movs r2, #0
- 10939 0066 0D92 str r2, [sp, #52]
-1999:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 10940 .loc 1 1999 3 is_stmt 1 view .LVU3396
-1999:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
- 10941 .loc 1 1999 24 is_stmt 0 view .LVU3397
- 10942 0068 0F92 str r2, [sp, #60]
-2000:Src/main.c **** {
- 10943 .loc 1 2000 3 is_stmt 1 view .LVU3398
-2000:Src/main.c **** {
- 10944 .loc 1 2000 7 is_stmt 0 view .LVU3399
- 10945 006a 0BA9 add r1, sp, #44
- 10946 006c 1348 ldr r0, .L634
- 10947 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
- 10948 .LVL971:
-2000:Src/main.c **** {
- 10949 .loc 1 2000 6 discriminator 1 view .LVU3400
- 10950 0072 F8B9 cbnz r0, .L632
-2004:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
- 10951 .loc 1 2004 3 is_stmt 1 view .LVU3401
-2004:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
- 10952 .loc 1 2004 40 is_stmt 0 view .LVU3402
- 10953 0074 0023 movs r3, #0
- 10954 0076 0093 str r3, [sp]
-2005:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
- 10955 .loc 1 2005 3 is_stmt 1 view .LVU3403
- ARM GAS /tmp/ccLSPxIe.s page 604
-
-
-2005:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
- 10956 .loc 1 2005 41 is_stmt 0 view .LVU3404
- 10957 0078 0193 str r3, [sp, #4]
-2006:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
- 10958 .loc 1 2006 3 is_stmt 1 view .LVU3405
-2006:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
- 10959 .loc 1 2006 34 is_stmt 0 view .LVU3406
- 10960 007a 0293 str r3, [sp, #8]
-2007:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
- 10961 .loc 1 2007 3 is_stmt 1 view .LVU3407
-2007:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
- 10962 .loc 1 2007 33 is_stmt 0 view .LVU3408
- 10963 007c 0393 str r3, [sp, #12]
-2008:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
- 10964 .loc 1 2008 3 is_stmt 1 view .LVU3409
-2008:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
- 10965 .loc 1 2008 35 is_stmt 0 view .LVU3410
- 10966 007e 0493 str r3, [sp, #16]
-2009:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
- 10967 .loc 1 2009 3 is_stmt 1 view .LVU3411
-2009:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
- 10968 .loc 1 2009 38 is_stmt 0 view .LVU3412
- 10969 0080 4FF40052 mov r2, #8192
- 10970 0084 0592 str r2, [sp, #20]
-2010:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
- 10971 .loc 1 2010 3 is_stmt 1 view .LVU3413
-2010:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
- 10972 .loc 1 2010 36 is_stmt 0 view .LVU3414
- 10973 0086 0693 str r3, [sp, #24]
-2011:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
- 10974 .loc 1 2011 3 is_stmt 1 view .LVU3415
-2011:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
- 10975 .loc 1 2011 36 is_stmt 0 view .LVU3416
- 10976 0088 0793 str r3, [sp, #28]
-2012:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
- 10977 .loc 1 2012 3 is_stmt 1 view .LVU3417
-2012:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
- 10978 .loc 1 2012 39 is_stmt 0 view .LVU3418
- 10979 008a 4FF00072 mov r2, #33554432
- 10980 008e 0892 str r2, [sp, #32]
-2013:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
- 10981 .loc 1 2013 3 is_stmt 1 view .LVU3419
-2013:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
- 10982 .loc 1 2013 37 is_stmt 0 view .LVU3420
- 10983 0090 0993 str r3, [sp, #36]
-2014:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
- 10984 .loc 1 2014 3 is_stmt 1 view .LVU3421
-2014:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
- 10985 .loc 1 2014 40 is_stmt 0 view .LVU3422
- 10986 0092 0A93 str r3, [sp, #40]
-2015:Src/main.c **** {
- 10987 .loc 1 2015 3 is_stmt 1 view .LVU3423
-2015:Src/main.c **** {
- 10988 .loc 1 2015 7 is_stmt 0 view .LVU3424
- 10989 0094 6946 mov r1, sp
- 10990 0096 0948 ldr r0, .L634
- 10991 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime
- ARM GAS /tmp/ccLSPxIe.s page 605
-
-
- 10992 .LVL972:
-2015:Src/main.c **** {
- 10993 .loc 1 2015 6 discriminator 1 view .LVU3425
- 10994 009c 60B9 cbnz r0, .L633
-2022:Src/main.c ****
- 10995 .loc 1 2022 3 is_stmt 1 view .LVU3426
- 10996 009e 0748 ldr r0, .L634
- 10997 00a0 FFF7FEFF bl HAL_TIM_MspPostInit
- 10998 .LVL973:
-2024:Src/main.c ****
- 10999 .loc 1 2024 1 is_stmt 0 view .LVU3427
- 11000 00a4 16B0 add sp, sp, #88
- 11001 .LCFI110:
- 11002 .cfi_remember_state
- 11003 .cfi_def_cfa_offset 8
- 11004 @ sp needed
- 11005 00a6 10BD pop {r4, pc}
- 11006 .L629:
- 11007 .LCFI111:
- 11008 .cfi_restore_state
-1985:Src/main.c **** }
- 11009 .loc 1 1985 5 is_stmt 1 view .LVU3428
- 11010 00a8 FFF7FEFF bl Error_Handler
- 11011 .LVL974:
- 11012 .L630:
-1990:Src/main.c **** }
- 11013 .loc 1 1990 5 view .LVU3429
- 11014 00ac FFF7FEFF bl Error_Handler
- 11015 .LVL975:
- 11016 .L631:
-1994:Src/main.c **** }
- 11017 .loc 1 1994 5 view .LVU3430
- 11018 00b0 FFF7FEFF bl Error_Handler
- 11019 .LVL976:
- 11020 .L632:
-2002:Src/main.c **** }
- 11021 .loc 1 2002 5 view .LVU3431
- 11022 00b4 FFF7FEFF bl Error_Handler
- 11023 .LVL977:
- 11024 .L633:
-2017:Src/main.c **** }
- 11025 .loc 1 2017 5 view .LVU3432
- 11026 00b8 FFF7FEFF bl Error_Handler
- 11027 .LVL978:
- 11028 .L635:
- 11029 .align 2
- 11030 .L634:
- 11031 00bc 00000000 .word htim1
- 11032 00c0 00000140 .word 1073807360
- 11033 .cfi_endproc
- 11034 .LFE1203:
- 11036 .section .text.SystemClock_Config,"ax",%progbits
- 11037 .align 1
- 11038 .global SystemClock_Config
- 11039 .syntax unified
- 11040 .thumb
- 11041 .thumb_func
- ARM GAS /tmp/ccLSPxIe.s page 606
-
-
- 11043 SystemClock_Config:
- 11044 .LFB1187:
-1145:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
- 11045 .loc 1 1145 1 view -0
- 11046 .cfi_startproc
- 11047 @ args = 0, pretend = 0, frame = 80
- 11048 @ frame_needed = 0, uses_anonymous_args = 0
- 11049 0000 00B5 push {lr}
- 11050 .LCFI112:
- 11051 .cfi_def_cfa_offset 4
- 11052 .cfi_offset 14, -4
- 11053 0002 95B0 sub sp, sp, #84
- 11054 .LCFI113:
- 11055 .cfi_def_cfa_offset 88
-1146:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 11056 .loc 1 1146 3 view .LVU3434
-1146:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
- 11057 .loc 1 1146 22 is_stmt 0 view .LVU3435
- 11058 0004 3422 movs r2, #52
- 11059 0006 0021 movs r1, #0
- 11060 0008 07A8 add r0, sp, #28
- 11061 000a FFF7FEFF bl memset
- 11062 .LVL979:
-1147:Src/main.c ****
- 11063 .loc 1 1147 3 is_stmt 1 view .LVU3436
-1147:Src/main.c ****
- 11064 .loc 1 1147 22 is_stmt 0 view .LVU3437
- 11065 000e 0023 movs r3, #0
- 11066 0010 0293 str r3, [sp, #8]
- 11067 0012 0393 str r3, [sp, #12]
- 11068 0014 0493 str r3, [sp, #16]
- 11069 0016 0593 str r3, [sp, #20]
- 11070 0018 0693 str r3, [sp, #24]
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11071 .loc 1 1151 3 is_stmt 1 view .LVU3438
- 11072 .LBB679:
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11073 .loc 1 1151 3 view .LVU3439
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11074 .loc 1 1151 3 view .LVU3440
- 11075 001a 244B ldr r3, .L644
- 11076 001c 1A6C ldr r2, [r3, #64]
- 11077 001e 42F08052 orr r2, r2, #268435456
- 11078 0022 1A64 str r2, [r3, #64]
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11079 .loc 1 1151 3 view .LVU3441
- 11080 0024 1B6C ldr r3, [r3, #64]
- 11081 0026 03F08053 and r3, r3, #268435456
- 11082 002a 0093 str r3, [sp]
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11083 .loc 1 1151 3 view .LVU3442
- 11084 002c 009B ldr r3, [sp]
- 11085 .LBE679:
-1151:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
- 11086 .loc 1 1151 3 view .LVU3443
-1152:Src/main.c ****
- 11087 .loc 1 1152 3 view .LVU3444
- ARM GAS /tmp/ccLSPxIe.s page 607
-
-
- 11088 .LBB680:
-1152:Src/main.c ****
- 11089 .loc 1 1152 3 view .LVU3445
-1152:Src/main.c ****
- 11090 .loc 1 1152 3 view .LVU3446
- 11091 002e 204B ldr r3, .L644+4
- 11092 0030 1A68 ldr r2, [r3]
- 11093 0032 42F44042 orr r2, r2, #49152
- 11094 0036 1A60 str r2, [r3]
-1152:Src/main.c ****
- 11095 .loc 1 1152 3 view .LVU3447
- 11096 0038 1B68 ldr r3, [r3]
- 11097 003a 03F44043 and r3, r3, #49152
- 11098 003e 0193 str r3, [sp, #4]
-1152:Src/main.c ****
- 11099 .loc 1 1152 3 view .LVU3448
- 11100 0040 019B ldr r3, [sp, #4]
- 11101 .LBE680:
-1152:Src/main.c ****
- 11102 .loc 1 1152 3 view .LVU3449
-1157:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 11103 .loc 1 1157 3 view .LVU3450
-1157:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
- 11104 .loc 1 1157 36 is_stmt 0 view .LVU3451
- 11105 0042 0123 movs r3, #1
- 11106 0044 0793 str r3, [sp, #28]
-1158:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 11107 .loc 1 1158 3 is_stmt 1 view .LVU3452
-1158:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
- 11108 .loc 1 1158 30 is_stmt 0 view .LVU3453
- 11109 0046 4FF48033 mov r3, #65536
- 11110 004a 0893 str r3, [sp, #32]
-1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 11111 .loc 1 1159 3 is_stmt 1 view .LVU3454
-1159:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
- 11112 .loc 1 1159 34 is_stmt 0 view .LVU3455
- 11113 004c 0223 movs r3, #2
- 11114 004e 0D93 str r3, [sp, #52]
-1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
- 11115 .loc 1 1160 3 is_stmt 1 view .LVU3456
-1160:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
- 11116 .loc 1 1160 35 is_stmt 0 view .LVU3457
- 11117 0050 4FF48002 mov r2, #4194304
- 11118 0054 0E92 str r2, [sp, #56]
-1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
- 11119 .loc 1 1161 3 is_stmt 1 view .LVU3458
-1161:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
- 11120 .loc 1 1161 30 is_stmt 0 view .LVU3459
- 11121 0056 1922 movs r2, #25
- 11122 0058 0F92 str r2, [sp, #60]
-1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 11123 .loc 1 1162 3 is_stmt 1 view .LVU3460
-1162:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
- 11124 .loc 1 1162 30 is_stmt 0 view .LVU3461
- 11125 005a 4FF4B872 mov r2, #368
- 11126 005e 1092 str r2, [sp, #64]
-1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
- ARM GAS /tmp/ccLSPxIe.s page 608
-
-
- 11127 .loc 1 1163 3 is_stmt 1 view .LVU3462
-1163:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
- 11128 .loc 1 1163 30 is_stmt 0 view .LVU3463
- 11129 0060 1193 str r3, [sp, #68]
-1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
- 11130 .loc 1 1164 3 is_stmt 1 view .LVU3464
-1164:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
- 11131 .loc 1 1164 30 is_stmt 0 view .LVU3465
- 11132 0062 0822 movs r2, #8
- 11133 0064 1292 str r2, [sp, #72]
-1165:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 11134 .loc 1 1165 3 is_stmt 1 view .LVU3466
-1165:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
- 11135 .loc 1 1165 30 is_stmt 0 view .LVU3467
- 11136 0066 1393 str r3, [sp, #76]
-1166:Src/main.c **** {
- 11137 .loc 1 1166 3 is_stmt 1 view .LVU3468
-1166:Src/main.c **** {
- 11138 .loc 1 1166 7 is_stmt 0 view .LVU3469
- 11139 0068 07A8 add r0, sp, #28
- 11140 006a FFF7FEFF bl HAL_RCC_OscConfig
- 11141 .LVL980:
-1166:Src/main.c **** {
- 11142 .loc 1 1166 6 discriminator 1 view .LVU3470
- 11143 006e B0B9 cbnz r0, .L641
-1173:Src/main.c **** {
- 11144 .loc 1 1173 3 is_stmt 1 view .LVU3471
-1173:Src/main.c **** {
- 11145 .loc 1 1173 7 is_stmt 0 view .LVU3472
- 11146 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive
- 11147 .LVL981:
-1173:Src/main.c **** {
- 11148 .loc 1 1173 6 discriminator 1 view .LVU3473
- 11149 0074 A8B9 cbnz r0, .L642
-1180:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- 11150 .loc 1 1180 3 is_stmt 1 view .LVU3474
-1180:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
- 11151 .loc 1 1180 31 is_stmt 0 view .LVU3475
- 11152 0076 0F23 movs r3, #15
- 11153 0078 0293 str r3, [sp, #8]
-1182:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 11154 .loc 1 1182 3 is_stmt 1 view .LVU3476
-1182:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
- 11155 .loc 1 1182 34 is_stmt 0 view .LVU3477
- 11156 007a 0223 movs r3, #2
- 11157 007c 0393 str r3, [sp, #12]
-1183:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 11158 .loc 1 1183 3 is_stmt 1 view .LVU3478
-1183:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
- 11159 .loc 1 1183 35 is_stmt 0 view .LVU3479
- 11160 007e 0023 movs r3, #0
- 11161 0080 0493 str r3, [sp, #16]
-1184:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 11162 .loc 1 1184 3 is_stmt 1 view .LVU3480
-1184:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
- 11163 .loc 1 1184 36 is_stmt 0 view .LVU3481
- 11164 0082 4FF4A053 mov r3, #5120
- ARM GAS /tmp/ccLSPxIe.s page 609
-
-
- 11165 0086 0593 str r3, [sp, #20]
-1185:Src/main.c ****
- 11166 .loc 1 1185 3 is_stmt 1 view .LVU3482
-1185:Src/main.c ****
- 11167 .loc 1 1185 36 is_stmt 0 view .LVU3483
- 11168 0088 4FF48053 mov r3, #4096
- 11169 008c 0693 str r3, [sp, #24]
-1187:Src/main.c **** {
- 11170 .loc 1 1187 3 is_stmt 1 view .LVU3484
-1187:Src/main.c **** {
- 11171 .loc 1 1187 7 is_stmt 0 view .LVU3485
- 11172 008e 0621 movs r1, #6
- 11173 0090 02A8 add r0, sp, #8
- 11174 0092 FFF7FEFF bl HAL_RCC_ClockConfig
- 11175 .LVL982:
-1187:Src/main.c **** {
- 11176 .loc 1 1187 6 discriminator 1 view .LVU3486
- 11177 0096 30B9 cbnz r0, .L643
-1191:Src/main.c ****
- 11178 .loc 1 1191 1 view .LVU3487
- 11179 0098 15B0 add sp, sp, #84
- 11180 .LCFI114:
- 11181 .cfi_remember_state
- 11182 .cfi_def_cfa_offset 4
- 11183 @ sp needed
- 11184 009a 5DF804FB ldr pc, [sp], #4
- 11185 .L641:
- 11186 .LCFI115:
- 11187 .cfi_restore_state
-1168:Src/main.c **** }
- 11188 .loc 1 1168 5 is_stmt 1 view .LVU3488
- 11189 009e FFF7FEFF bl Error_Handler
- 11190 .LVL983:
- 11191 .L642:
-1175:Src/main.c **** }
- 11192 .loc 1 1175 5 view .LVU3489
- 11193 00a2 FFF7FEFF bl Error_Handler
- 11194 .LVL984:
- 11195 .L643:
-1189:Src/main.c **** }
- 11196 .loc 1 1189 5 view .LVU3490
- 11197 00a6 FFF7FEFF bl Error_Handler
- 11198 .LVL985:
- 11199 .L645:
- 11200 00aa 00BF .align 2
- 11201 .L644:
- 11202 00ac 00380240 .word 1073887232
- 11203 00b0 00700040 .word 1073770496
- 11204 .cfi_endproc
- 11205 .LFE1187:
- 11207 .section .text.main,"ax",%progbits
- 11208 .align 1
- 11209 .global main
- 11210 .syntax unified
- 11211 .thumb
- 11212 .thumb_func
- 11214 main:
- ARM GAS /tmp/ccLSPxIe.s page 610
-
-
- 11215 .LFB1186:
- 270:Src/main.c ****
- 11216 .loc 1 270 1 view -0
- 11217 .cfi_startproc
- 11218 @ args = 0, pretend = 0, frame = 16
- 11219 @ frame_needed = 0, uses_anonymous_args = 0
- 11220 0000 2DE9F043 push {r4, r5, r6, r7, r8, r9, lr}
- 11221 .LCFI116:
- 11222 .cfi_def_cfa_offset 28
- 11223 .cfi_offset 4, -28
- 11224 .cfi_offset 5, -24
- 11225 .cfi_offset 6, -20
- 11226 .cfi_offset 7, -16
- 11227 .cfi_offset 8, -12
- 11228 .cfi_offset 9, -8
- 11229 .cfi_offset 14, -4
- 11230 0004 87B0 sub sp, sp, #28
- 11231 .LCFI117:
- 11232 .cfi_def_cfa_offset 56
- 273:Src/main.c **** /* USER CODE END 1 */
- 11233 .loc 1 273 2 view .LVU3492
- 279:Src/main.c ****
- 11234 .loc 1 279 3 view .LVU3493
- 11235 0006 FFF7FEFF bl HAL_Init
- 11236 .LVL986:
- 286:Src/main.c ****
- 11237 .loc 1 286 3 view .LVU3494
- 11238 000a FFF7FEFF bl SystemClock_Config
- 11239 .LVL987:
- 293:Src/main.c **** MX_DMA_Init();
- 11240 .loc 1 293 3 view .LVU3495
- 11241 000e FFF7FEFF bl MX_GPIO_Init
- 11242 .LVL988:
- 294:Src/main.c **** MX_SPI4_Init();
- 11243 .loc 1 294 3 view .LVU3496
- 11244 0012 FFF7FEFF bl MX_DMA_Init
- 11245 .LVL989:
- 295:Src/main.c **** MX_FATFS_Init();
- 11246 .loc 1 295 3 view .LVU3497
- 11247 0016 FFF7FEFF bl MX_SPI4_Init
- 11248 .LVL990:
- 296:Src/main.c **** MX_TIM2_Init();
- 11249 .loc 1 296 3 view .LVU3498
- 11250 001a FFF7FEFF bl MX_FATFS_Init
- 11251 .LVL991:
- 297:Src/main.c **** MX_TIM5_Init();
- 11252 .loc 1 297 3 view .LVU3499
- 11253 001e FFF7FEFF bl MX_TIM2_Init
- 11254 .LVL992:
- 298:Src/main.c **** MX_ADC1_Init();
- 11255 .loc 1 298 3 view .LVU3500
- 11256 0022 FFF7FEFF bl MX_TIM5_Init
- 11257 .LVL993:
- 299:Src/main.c **** MX_ADC3_Init();
- 11258 .loc 1 299 3 view .LVU3501
- 11259 0026 FFF7FEFF bl MX_ADC1_Init
- 11260 .LVL994:
- ARM GAS /tmp/ccLSPxIe.s page 611
-
-
- 300:Src/main.c **** MX_SPI2_Init();
- 11261 .loc 1 300 3 view .LVU3502
- 11262 002a FFF7FEFF bl MX_ADC3_Init
- 11263 .LVL995:
- 301:Src/main.c **** MX_SPI5_Init();
- 11264 .loc 1 301 3 view .LVU3503
- 11265 002e FFF7FEFF bl MX_SPI2_Init
- 11266 .LVL996:
- 302:Src/main.c **** MX_SPI6_Init();
- 11267 .loc 1 302 3 view .LVU3504
- 11268 0032 FFF7FEFF bl MX_SPI5_Init
- 11269 .LVL997:
- 303:Src/main.c **** MX_USART1_UART_Init();
- 11270 .loc 1 303 3 view .LVU3505
- 11271 0036 FFF7FEFF bl MX_SPI6_Init
- 11272 .LVL998:
- 304:Src/main.c **** MX_SDMMC1_SD_Init();
- 11273 .loc 1 304 3 view .LVU3506
- 11274 003a FFF7FEFF bl MX_USART1_UART_Init
- 11275 .LVL999:
- 305:Src/main.c **** MX_TIM7_Init();
- 11276 .loc 1 305 3 view .LVU3507
- 11277 003e FFF7FEFF bl MX_SDMMC1_SD_Init
- 11278 .LVL1000:
- 306:Src/main.c **** MX_TIM6_Init();
- 11279 .loc 1 306 3 view .LVU3508
- 11280 0042 FFF7FEFF bl MX_TIM7_Init
- 11281 .LVL1001:
- 307:Src/main.c **** MX_TIM10_Init();
- 11282 .loc 1 307 3 view .LVU3509
- 11283 0046 FFF7FEFF bl MX_TIM6_Init
- 11284 .LVL1002:
- 308:Src/main.c **** MX_UART8_Init();
- 11285 .loc 1 308 3 view .LVU3510
- 11286 004a FFF7FEFF bl MX_TIM10_Init
- 11287 .LVL1003:
- 309:Src/main.c **** MX_TIM8_Init();
- 11288 .loc 1 309 3 view .LVU3511
- 11289 004e FFF7FEFF bl MX_UART8_Init
- 11290 .LVL1004:
- 310:Src/main.c **** MX_TIM11_Init();
- 11291 .loc 1 310 3 view .LVU3512
- 11292 0052 FFF7FEFF bl MX_TIM8_Init
- 11293 .LVL1005:
- 311:Src/main.c **** MX_TIM4_Init();
- 11294 .loc 1 311 3 view .LVU3513
- 11295 0056 FFF7FEFF bl MX_TIM11_Init
- 11296 .LVL1006:
- 312:Src/main.c **** MX_TIM1_Init();
- 11297 .loc 1 312 3 view .LVU3514
- 11298 005a FFF7FEFF bl MX_TIM4_Init
- 11299 .LVL1007:
- 313:Src/main.c **** PA4_DAC_Init();
- 11300 .loc 1 313 3 view .LVU3515
- 11301 005e FFF7FEFF bl MX_TIM1_Init
- 11302 .LVL1008:
- 314:Src/main.c **** /* USER CODE BEGIN 2 */
- ARM GAS /tmp/ccLSPxIe.s page 612
-
-
- 11303 .loc 1 314 3 view .LVU3516
- 11304 0062 FFF7FEFF bl PA4_DAC_Init
- 11305 .LVL1009:
- 316:Src/main.c **** //HAL_TIM_Base_Start(&htim11);
- 11306 .loc 1 316 2 view .LVU3517
- 11307 0066 FFF7FEFF bl Init_params
- 11308 .LVL1010:
- 327:Src/main.c ****
- 11309 .loc 1 327 2 view .LVU3518
- 327:Src/main.c ****
- 11310 .loc 1 327 14 is_stmt 0 view .LVU3519
- 11311 006a 8D4A ldr r2, .L761
- 11312 006c 3523 movs r3, #53
- 11313 006e D362 str r3, [r2, #44]
- 329:Src/main.c ****
- 11314 .loc 1 329 2 is_stmt 1 view .LVU3520
- 329:Src/main.c ****
- 11315 .loc 1 329 23 is_stmt 0 view .LVU3521
- 11316 0070 D36A ldr r3, [r2, #44]
- 329:Src/main.c ****
- 11317 .loc 1 329 30 view .LVU3522
- 11318 0072 0133 adds r3, r3, #1
- 329:Src/main.c ****
- 11319 .loc 1 329 33 view .LVU3523
- 11320 0074 5B08 lsrs r3, r3, #1
- 329:Src/main.c ****
- 11321 .loc 1 329 36 view .LVU3524
- 11322 0076 013B subs r3, r3, #1
- 329:Src/main.c ****
- 11323 .loc 1 329 15 view .LVU3525
- 11324 0078 D363 str r3, [r2, #60]
- 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 11325 .loc 1 334 2 is_stmt 1 view .LVU3526
- 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 11326 .loc 1 334 23 is_stmt 0 view .LVU3527
- 11327 007a D36A ldr r3, [r2, #44]
- 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 11328 .loc 1 334 36 view .LVU3528
- 11329 007c 9B00 lsls r3, r3, #2
- 11330 007e 0333 adds r3, r3, #3
- 334:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
- 11331 .loc 1 334 15 view .LVU3529
- 11332 0080 02F5A032 add r2, r2, #81920
- 11333 0084 D362 str r3, [r2, #44]
- 335:Src/main.c ****
- 11334 .loc 1 335 2 is_stmt 1 view .LVU3530
- 335:Src/main.c ****
- 11335 .loc 1 335 25 is_stmt 0 view .LVU3531
- 11336 0086 D36A ldr r3, [r2, #44]
- 335:Src/main.c ****
- 11337 .loc 1 335 32 view .LVU3532
- 11338 0088 0133 adds r3, r3, #1
- 335:Src/main.c ****
- 11339 .loc 1 335 35 view .LVU3533
- 11340 008a 5B08 lsrs r3, r3, #1
- 335:Src/main.c ****
- 11341 .loc 1 335 38 view .LVU3534
- ARM GAS /tmp/ccLSPxIe.s page 613
-
-
- 11342 008c 013B subs r3, r3, #1
- 335:Src/main.c ****
- 11343 .loc 1 335 16 view .LVU3535
- 11344 008e 5363 str r3, [r2, #52]
- 339:Src/main.c ****
- 11345 .loc 1 339 2 is_stmt 1 view .LVU3536
- 11346 0090 0021 movs r1, #0
- 11347 0092 8448 ldr r0, .L761+4
- 11348 0094 FFF7FEFF bl HAL_TIM_PWM_Start
- 11349 .LVL1011:
- 11350 0098 4CE0 b .L647
- 11351 .L746:
- 353:Src/main.c **** {
- 11352 .loc 1 353 85 is_stmt 0 discriminator 1 view .LVU3537
- 11353 009a 834B ldr r3, .L761+8
- 11354 009c 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 353:Src/main.c **** {
- 11355 .loc 1 353 73 discriminator 1 view .LVU3538
- 11356 009e 002B cmp r3, #0
- 11357 00a0 4FD1 bne .L648
- 11358 .L649:
- 11359 .LBB681:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11360 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3539
- 11361 .LBB682:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11362 .loc 7 3073 3 discriminator 1 view .LVU3540
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11363 .loc 7 3073 3 discriminator 1 view .LVU3541
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11364 .loc 7 3073 3 discriminator 1 view .LVU3542
- 11365 .LVL1012:
- 11366 .LBB683:
- 11367 .LBI683:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11368 .loc 8 1068 31 view .LVU3543
- 11369 .LBB684:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11370 .loc 8 1070 5 view .LVU3544
-1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11371 .loc 8 1072 4 view .LVU3545
- 11372 00a2 824A ldr r2, .L761+12
- 11373 .syntax unified
- 11374 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11375 00a4 52E8003F ldrex r3, [r2]
- 11376 @ 0 "" 2
- 11377 .LVL1013:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11378 .loc 8 1073 4 view .LVU3546
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11379 .loc 8 1073 4 is_stmt 0 view .LVU3547
- 11380 .thumb
- 11381 .syntax unified
- 11382 .LBE684:
- 11383 .LBE683:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11384 .loc 7 3073 3 discriminator 1 view .LVU3548
- ARM GAS /tmp/ccLSPxIe.s page 614
-
-
- 11385 00a8 43F48073 orr r3, r3, #256
- 11386 .LVL1014:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11387 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU3549
- 11388 .LBB685:
- 11389 .LBI685:
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11390 .loc 8 1119 31 view .LVU3550
- 11391 .LBB686:
-1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11392 .loc 8 1121 4 view .LVU3551
-1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11393 .loc 8 1123 4 view .LVU3552
- 11394 .syntax unified
- 11395 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11396 00ac 42E80031 strex r1, r3, [r2]
- 11397 @ 0 "" 2
- 11398 .LVL1015:
- 11399 .loc 8 1124 4 view .LVU3553
- 11400 .loc 8 1124 4 is_stmt 0 view .LVU3554
- 11401 .thumb
- 11402 .syntax unified
- 11403 .LBE686:
- 11404 .LBE685:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11405 .loc 7 3073 3 discriminator 1 view .LVU3555
- 11406 00b0 0029 cmp r1, #0
- 11407 00b2 F6D1 bne .L649
- 11408 .LVL1016:
- 11409 .L650:
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11410 .loc 7 3073 3 discriminator 1 view .LVU3556
- 11411 .LBE682:
- 11412 .LBE681:
- 11413 .LBB687:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11414 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3557
- 11415 .LBB688:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11416 .loc 7 3040 3 discriminator 1 view .LVU3558
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11417 .loc 7 3040 3 discriminator 1 view .LVU3559
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11418 .loc 7 3040 3 discriminator 1 view .LVU3560
- 11419 .LBB689:
- 11420 .LBI689:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11421 .loc 8 1068 31 view .LVU3561
- 11422 .LBB690:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11423 .loc 8 1070 5 view .LVU3562
-1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11424 .loc 8 1072 4 view .LVU3563
- 11425 00b4 7D4A ldr r2, .L761+12
- 11426 .syntax unified
- 11427 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11428 00b6 52E8003F ldrex r3, [r2]
- ARM GAS /tmp/ccLSPxIe.s page 615
-
-
- 11429 @ 0 "" 2
- 11430 .LVL1017:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11431 .loc 8 1073 4 view .LVU3564
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11432 .loc 8 1073 4 is_stmt 0 view .LVU3565
- 11433 .thumb
- 11434 .syntax unified
- 11435 .LBE690:
- 11436 .LBE689:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11437 .loc 7 3040 3 discriminator 1 view .LVU3566
- 11438 00ba 43F02003 orr r3, r3, #32
- 11439 .LVL1018:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11440 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU3567
- 11441 .LBB691:
- 11442 .LBI691:
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11443 .loc 8 1119 31 view .LVU3568
- 11444 .LBB692:
-1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11445 .loc 8 1121 4 view .LVU3569
-1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11446 .loc 8 1123 4 view .LVU3570
- 11447 .syntax unified
- 11448 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11449 00be 42E80031 strex r1, r3, [r2]
- 11450 @ 0 "" 2
- 11451 .LVL1019:
- 11452 .loc 8 1124 4 view .LVU3571
- 11453 .loc 8 1124 4 is_stmt 0 view .LVU3572
- 11454 .thumb
- 11455 .syntax unified
- 11456 .LBE692:
- 11457 .LBE691:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11458 .loc 7 3040 3 discriminator 1 view .LVU3573
- 11459 00c2 0029 cmp r1, #0
- 11460 00c4 F6D1 bne .L650
- 11461 .LVL1020:
- 11462 .L651:
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11463 .loc 7 3040 3 discriminator 1 view .LVU3574
- 11464 .LBE688:
- 11465 .LBE687:
- 11466 .LBB693:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11467 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3575
- 11468 .LBB694:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11469 .loc 7 3136 3 discriminator 1 view .LVU3576
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11470 .loc 7 3136 3 discriminator 1 view .LVU3577
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11471 .loc 7 3136 3 discriminator 1 view .LVU3578
- 11472 .LBB695:
- ARM GAS /tmp/ccLSPxIe.s page 616
-
-
- 11473 .LBI695:
-1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11474 .loc 8 1068 31 view .LVU3579
- 11475 .LBB696:
-1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11476 .loc 8 1070 5 view .LVU3580
-1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11477 .loc 8 1072 4 view .LVU3581
- 11478 00c6 794A ldr r2, .L761+12
- 11479 00c8 02F10803 add r3, r2, #8
- 11480 .syntax unified
- 11481 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11482 00cc 53E8003F ldrex r3, [r3]
- 11483 @ 0 "" 2
- 11484 .LVL1021:
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11485 .loc 8 1073 4 view .LVU3582
-1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- 11486 .loc 8 1073 4 is_stmt 0 view .LVU3583
- 11487 .thumb
- 11488 .syntax unified
- 11489 .LBE696:
- 11490 .LBE695:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11491 .loc 7 3136 3 discriminator 1 view .LVU3584
- 11492 00d0 43F00103 orr r3, r3, #1
- 11493 .LVL1022:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11494 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU3585
- 11495 .LBB697:
- 11496 .LBI697:
-1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- 11497 .loc 8 1119 31 view .LVU3586
- 11498 .LBB698:
-1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
- 11499 .loc 8 1121 4 view .LVU3587
-1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 11500 .loc 8 1123 4 view .LVU3588
- 11501 00d4 0832 adds r2, r2, #8
- 11502 .syntax unified
- 11503 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 11504 00d6 42E80031 strex r1, r3, [r2]
- 11505 @ 0 "" 2
- 11506 .LVL1023:
- 11507 .loc 8 1124 4 view .LVU3589
- 11508 .loc 8 1124 4 is_stmt 0 view .LVU3590
- 11509 .thumb
- 11510 .syntax unified
- 11511 .LBE698:
- 11512 .LBE697:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11513 .loc 7 3136 3 discriminator 1 view .LVU3591
- 11514 00da 0029 cmp r1, #0
- 11515 00dc F3D1 bne .L651
- 11516 .LBE694:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11517 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU3592
- ARM GAS /tmp/ccLSPxIe.s page 617
-
-
- 11518 .LVL1024:
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 11519 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU3593
- 11520 .LBE693:
- 359:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag...
- 11521 .loc 1 359 4 is_stmt 1 view .LVU3594
- 11522 .LBB699:
- 11523 .LBI699:
-2024:Drivers/CMSIS/Include/core_cm7.h **** {
- 11524 .loc 2 2024 22 view .LVU3595
- 11525 .LBB700:
-2026:Drivers/CMSIS/Include/core_cm7.h **** {
- 11526 .loc 2 2026 3 view .LVU3596
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 11527 .loc 2 2028 5 view .LVU3597
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 11528 .loc 2 2028 47 is_stmt 0 view .LVU3598
- 11529 00de 744B ldr r3, .L761+16
- 11530 00e0 0022 movs r2, #0
- 11531 00e2 83F82523 strb r2, [r3, #805]
- 11532 .LVL1025:
-2028:Drivers/CMSIS/Include/core_cm7.h **** }
- 11533 .loc 2 2028 47 view .LVU3599
- 11534 .LBE700:
- 11535 .LBE699:
- 360:Src/main.c **** u_rx_flg = 1;
- 11536 .loc 1 360 4 is_stmt 1 view .LVU3600
- 11537 .LBB701:
- 11538 .LBI701:
-1896:Drivers/CMSIS/Include/core_cm7.h **** {
- 11539 .loc 2 1896 22 view .LVU3601
- 11540 .LBB702:
-1898:Drivers/CMSIS/Include/core_cm7.h **** {
- 11541 .loc 2 1898 3 view .LVU3602
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 11542 .loc 2 1900 5 view .LVU3603
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 11543 .loc 2 1900 43 is_stmt 0 view .LVU3604
- 11544 00e6 2022 movs r2, #32
- 11545 00e8 5A60 str r2, [r3, #4]
- 11546 .LVL1026:
-1900:Drivers/CMSIS/Include/core_cm7.h **** }
- 11547 .loc 2 1900 43 view .LVU3605
- 11548 .LBE702:
- 11549 .LBE701:
- 361:Src/main.c **** }
- 11550 .loc 1 361 4 is_stmt 1 view .LVU3606
- 361:Src/main.c **** }
- 11551 .loc 1 361 13 is_stmt 0 view .LVU3607
- 11552 00ea 6F4B ldr r3, .L761+8
- 11553 00ec 0122 movs r2, #1
- 11554 00ee 1A70 strb r2, [r3]
- 11555 00f0 27E0 b .L648
- 11556 .L669:
- 371:Src/main.c **** task.current_param = task.min_param;
- 11557 .loc 1 371 6 is_stmt 1 view .LVU3608
- 371:Src/main.c **** task.current_param = task.min_param;
- ARM GAS /tmp/ccLSPxIe.s page 618
-
-
- 11558 .loc 1 371 20 is_stmt 0 view .LVU3609
- 11559 00f2 704B ldr r3, .L761+20
- 11560 00f4 0022 movs r2, #0
- 11561 00f6 1A70 strb r2, [r3]
- 372:Src/main.c **** Stop_TIM10();
- 11562 .loc 1 372 6 is_stmt 1 view .LVU3610
- 372:Src/main.c **** Stop_TIM10();
- 11563 .loc 1 372 31 is_stmt 0 view .LVU3611
- 11564 00f8 6F4B ldr r3, .L761+24
- 11565 00fa 5A68 ldr r2, [r3, #4] @ float
- 372:Src/main.c **** Stop_TIM10();
- 11566 .loc 1 372 25 view .LVU3612
- 11567 00fc 1A61 str r2, [r3, #16] @ float
- 373:Src/main.c **** break;
- 11568 .loc 1 373 6 is_stmt 1 view .LVU3613
- 11569 00fe FFF7FEFF bl Stop_TIM10
- 11570 .LVL1027:
- 374:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message
- 11571 .loc 1 374 5 view .LVU3614
- 11572 .L652:
-1084:Src/main.c **** {
- 11573 .loc 1 1084 3 view .LVU3615
- 11574 0102 6E4B ldr r3, .L761+28
- 11575 0104 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 11576 0106 022B cmp r3, #2
- 11577 0108 00F0C085 beq .L726
- 11578 010c 032B cmp r3, #3
- 11579 010e 00F0F385 beq .L742
- 11580 0112 012B cmp r3, #1
- 11581 0114 09D1 bne .L728
-1087:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10);
- 11582 .loc 1 1087 5 view .LVU3616
- 11583 0116 6A4C ldr r4, .L761+32
- 11584 0118 0221 movs r1, #2
- 11585 011a 2046 mov r0, r4
- 11586 011c FFF7FEFF bl USART_TX
- 11587 .LVL1028:
-1089:Src/main.c **** State_Data[1]=0;//All OK!
- 11588 .loc 1 1089 5 view .LVU3617
-1089:Src/main.c **** State_Data[1]=0;//All OK!
- 11589 .loc 1 1089 18 is_stmt 0 view .LVU3618
- 11590 0120 0023 movs r3, #0
- 11591 0122 2370 strb r3, [r4]
-1090:Src/main.c **** UART_transmission_request = NO_MESS;
- 11592 .loc 1 1090 5 is_stmt 1 view .LVU3619
-1090:Src/main.c **** UART_transmission_request = NO_MESS;
- 11593 .loc 1 1090 18 is_stmt 0 view .LVU3620
- 11594 0124 6370 strb r3, [r4, #1]
-1091:Src/main.c **** break;
- 11595 .loc 1 1091 5 is_stmt 1 view .LVU3621
-1091:Src/main.c **** break;
- 11596 .loc 1 1091 31 is_stmt 0 view .LVU3622
- 11597 0126 654A ldr r2, .L761+28
- 11598 0128 1370 strb r3, [r2]
-1092:Src/main.c **** case MESS_02://Transmith packet
- 11599 .loc 1 1092 4 is_stmt 1 view .LVU3623
- 11600 .L728:
- ARM GAS /tmp/ccLSPxIe.s page 619
-
-
-1126:Src/main.c **** {
- 11601 .loc 1 1126 5 view .LVU3624
-1126:Src/main.c **** {
- 11602 .loc 1 1126 17 is_stmt 0 view .LVU3625
- 11603 012a 664B ldr r3, .L761+36
- 11604 012c 1B78 ldrb r3, [r3] @ zero_extendqisi2
-1126:Src/main.c **** {
- 11605 .loc 1 1126 8 view .LVU3626
- 11606 012e 012B cmp r3, #1
- 11607 0130 00F0E485 beq .L745
- 11608 .L647:
- 351:Src/main.c **** {
- 11609 .loc 1 351 3 is_stmt 1 view .LVU3627
- 353:Src/main.c **** {
- 11610 .loc 1 353 3 view .LVU3628
- 353:Src/main.c **** {
- 11611 .loc 1 353 8 is_stmt 0 view .LVU3629
- 11612 0134 4FF48071 mov r1, #256
- 11613 0138 6348 ldr r0, .L761+40
- 11614 013a FFF7FEFF bl HAL_GPIO_ReadPin
- 11615 .LVL1029:
- 353:Src/main.c **** {
- 11616 .loc 1 353 6 discriminator 1 view .LVU3630
- 11617 013e 0128 cmp r0, #1
- 11618 0140 ABD0 beq .L746
- 11619 .L648:
- 368:Src/main.c **** {
- 11620 .loc 1 368 4 is_stmt 1 view .LVU3631
- 11621 0142 624B ldr r3, .L761+44
- 11622 0144 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 11623 0146 0F2B cmp r3, #15
- 11624 0148 DBD8 bhi .L652
- 11625 014a 01A2 adr r2, .L654
- 11626 014c 52F823F0 ldr pc, [r2, r3, lsl #2]
- 11627 .p2align 2
- 11628 .L654:
- 11629 0150 F3000000 .word .L669+1
- 11630 0154 91010000 .word .L668+1
- 11631 0158 FB010000 .word .L667+1
- 11632 015c 35020000 .word .L666+1
- 11633 0160 65020000 .word .L665+1
- 11634 0164 75020000 .word .L664+1
- 11635 0168 91020000 .word .L663+1
- 11636 016c F9020000 .word .L662+1
- 11637 0170 89070000 .word .L661+1
- 11638 0174 CF070000 .word .L660+1
- 11639 0178 4D040000 .word .L659+1
- 11640 017c 29050000 .word .L658+1
- 11641 0180 79050000 .word .L657+1
- 11642 0184 2F060000 .word .L656+1
- 11643 0188 6B060000 .word .L655+1
- 11644 018c 37070000 .word .L653+1
- 11645 .p2align 1
- 11646 .L668:
- 376:Src/main.c **** if (CheckChecksum(COMMAND))
- 11647 .loc 1 376 6 view .LVU3632
- 376:Src/main.c **** if (CheckChecksum(COMMAND))
- ARM GAS /tmp/ccLSPxIe.s page 620
-
-
- 11648 .loc 1 376 18 is_stmt 0 view .LVU3633
- 11649 0190 4F4C ldr r4, .L761+48
- 11650 0192 0D21 movs r1, #13
- 11651 0194 2046 mov r0, r4
- 11652 0196 FFF7FEFF bl CalculateChecksum
- 11653 .LVL1030:
- 376:Src/main.c **** if (CheckChecksum(COMMAND))
- 11654 .loc 1 376 16 discriminator 1 view .LVU3634
- 11655 019a 4E4B ldr r3, .L761+52
- 11656 019c 1880 strh r0, [r3] @ movhi
- 377:Src/main.c **** {
- 11657 .loc 1 377 6 is_stmt 1 view .LVU3635
- 377:Src/main.c **** {
- 11658 .loc 1 377 10 is_stmt 0 view .LVU3636
- 11659 019e 2046 mov r0, r4
- 11660 01a0 FFF7FEFF bl CheckChecksum
- 11661 .LVL1031:
- 377:Src/main.c **** {
- 11662 .loc 1 377 9 discriminator 1 view .LVU3637
- 11663 01a4 70B9 cbnz r0, .L747
- 390:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 11664 .loc 1 390 7 is_stmt 1 view .LVU3638
- 390:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 11665 .loc 1 390 17 is_stmt 0 view .LVU3639
- 11666 01a6 464A ldr r2, .L761+32
- 11667 01a8 1378 ldrb r3, [r2] @ zero_extendqisi2
- 390:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 11668 .loc 1 390 21 view .LVU3640
- 11669 01aa 43F00403 orr r3, r3, #4
- 11670 01ae 1370 strb r3, [r2]
- 391:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 11671 .loc 1 391 7 is_stmt 1 view .LVU3641
- 391:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 11672 .loc 1 391 17 is_stmt 0 view .LVU3642
- 11673 01b0 464B ldr r3, .L761+44
- 11674 01b2 0222 movs r2, #2
- 11675 01b4 1A70 strb r2, [r3]
- 392:Src/main.c **** }
- 11676 .loc 1 392 7 is_stmt 1 view .LVU3643
- 392:Src/main.c **** }
- 11677 .loc 1 392 21 is_stmt 0 view .LVU3644
- 11678 01b6 3F4B ldr r3, .L761+20
- 11679 01b8 0022 movs r2, #0
- 11680 01ba 1A70 strb r2, [r3]
- 11681 .L671:
- 394:Src/main.c **** break;
- 11682 .loc 1 394 6 is_stmt 1 view .LVU3645
- 394:Src/main.c **** break;
- 11683 .loc 1 394 32 is_stmt 0 view .LVU3646
- 11684 01bc 3F4B ldr r3, .L761+28
- 11685 01be 0122 movs r2, #1
- 11686 01c0 1A70 strb r2, [r3]
- 395:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT
- 11687 .loc 1 395 5 is_stmt 1 view .LVU3647
- 11688 01c2 9EE7 b .L652
- 11689 .L747:
- 379:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2
- ARM GAS /tmp/ccLSPxIe.s page 621
-
-
- 11690 .loc 1 379 7 view .LVU3648
- 11691 .LVL1032:
- 11692 .LBB703:
- 11693 .LBI703:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 11694 .loc 4 358 22 view .LVU3649
- 11695 .LBB704:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11696 .loc 4 360 3 view .LVU3650
- 11697 01c4 444A ldr r2, .L761+56
- 11698 01c6 1368 ldr r3, [r2]
- 11699 01c8 43F04003 orr r3, r3, #64
- 11700 01cc 1360 str r3, [r2]
- 11701 .LVL1033:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11702 .loc 4 360 3 is_stmt 0 view .LVU3651
- 11703 .LBE704:
- 11704 .LBE703:
- 380:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup);
- 11705 .loc 1 380 7 is_stmt 1 view .LVU3652
- 11706 .LBB705:
- 11707 .LBI705:
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 11708 .loc 4 358 22 view .LVU3653
- 11709 .LBB706:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11710 .loc 4 360 3 view .LVU3654
- 11711 01ce 02F58E32 add r2, r2, #72704
- 11712 01d2 1368 ldr r3, [r2]
- 11713 01d4 43F04003 orr r3, r3, #64
- 11714 01d8 1360 str r3, [r2]
- 11715 .LVL1034:
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11716 .loc 4 360 3 is_stmt 0 view .LVU3655
- 11717 .LBE706:
- 11718 .LBE705:
- 381:Src/main.c **** TO6_before = TO6;
- 11719 .loc 1 381 7 is_stmt 1 view .LVU3656
- 11720 01da 404B ldr r3, .L761+60
- 11721 01dc 404A ldr r2, .L761+64
- 11722 01de 4149 ldr r1, .L761+68
- 11723 01e0 2046 mov r0, r4
- 11724 01e2 FFF7FEFF bl Decode_uart
- 11725 .LVL1035:
- 382:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 11726 .loc 1 382 7 view .LVU3657
- 382:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP;
- 11727 .loc 1 382 18 is_stmt 0 view .LVU3658
- 11728 01e6 404B ldr r3, .L761+72
- 11729 01e8 1A68 ldr r2, [r3]
- 11730 01ea 404B ldr r3, .L761+76
- 11731 01ec 1A60 str r2, [r3]
- 385:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle
- 11732 .loc 1 385 7 is_stmt 1 view .LVU3659
- 385:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle
- 11733 .loc 1 385 17 is_stmt 0 view .LVU3660
- 11734 01ee 0723 movs r3, #7
- ARM GAS /tmp/ccLSPxIe.s page 622
-
-
- 11735 01f0 364A ldr r2, .L761+44
- 11736 01f2 1370 strb r3, [r2]
- 386:Src/main.c **** }
- 11737 .loc 1 386 7 is_stmt 1 view .LVU3661
- 386:Src/main.c **** }
- 11738 .loc 1 386 21 is_stmt 0 view .LVU3662
- 11739 01f4 2F4A ldr r2, .L761+20
- 11740 01f6 1370 strb r3, [r2]
- 11741 01f8 E0E7 b .L671
- 11742 .L667:
- 398:Src/main.c **** Stop_TIM10();
- 11743 .loc 1 398 6 is_stmt 1 view .LVU3663
- 398:Src/main.c **** Stop_TIM10();
- 11744 .loc 1 398 31 is_stmt 0 view .LVU3664
- 11745 01fa 2F4B ldr r3, .L761+24
- 11746 01fc 5A68 ldr r2, [r3, #4] @ float
- 398:Src/main.c **** Stop_TIM10();
- 11747 .loc 1 398 25 view .LVU3665
- 11748 01fe 1A61 str r2, [r3, #16] @ float
- 399:Src/main.c **** Init_params();
- 11749 .loc 1 399 6 is_stmt 1 view .LVU3666
- 11750 0200 FFF7FEFF bl Stop_TIM10
- 11751 .LVL1036:
- 400:Src/main.c **** AD9102_CancelWaveUpload();
- 11752 .loc 1 400 6 view .LVU3667
- 11753 0204 FFF7FEFF bl Init_params
- 11754 .LVL1037:
- 401:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1
- 11755 .loc 1 401 6 view .LVU3668
- 11756 0208 FFF7FEFF bl AD9102_CancelWaveUpload
- 11757 .LVL1038:
- 402:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2
- 11758 .loc 1 402 6 view .LVU3669
- 11759 .LBB707:
- 11760 .LBI707:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 11761 .loc 4 370 22 view .LVU3670
- 11762 .LBB708:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11763 .loc 4 372 3 view .LVU3671
- 11764 020c 324A ldr r2, .L761+56
- 11765 020e 1368 ldr r3, [r2]
- 11766 0210 23F04003 bic r3, r3, #64
- 11767 0214 1360 str r3, [r2]
- 11768 .LVL1039:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11769 .loc 4 372 3 is_stmt 0 view .LVU3672
- 11770 .LBE708:
- 11771 .LBE707:
- 403:Src/main.c **** CPU_state = HALT;
- 11772 .loc 1 403 6 is_stmt 1 view .LVU3673
- 11773 .LBB709:
- 11774 .LBI709:
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- 11775 .loc 4 370 22 view .LVU3674
- 11776 .LBB710:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccLSPxIe.s page 623
-
-
- 11777 .loc 4 372 3 view .LVU3675
- 11778 0216 02F58E32 add r2, r2, #72704
- 11779 021a 1368 ldr r3, [r2]
- 11780 021c 23F04003 bic r3, r3, #64
- 11781 0220 1360 str r3, [r2]
- 11782 .LVL1040:
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- 11783 .loc 4 372 3 is_stmt 0 view .LVU3676
- 11784 .LBE710:
- 11785 .LBE709:
- 404:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 11786 .loc 1 404 6 is_stmt 1 view .LVU3677
- 404:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 11787 .loc 1 404 16 is_stmt 0 view .LVU3678
- 11788 0222 0023 movs r3, #0
- 11789 0224 294A ldr r2, .L761+44
- 11790 0226 1370 strb r3, [r2]
- 405:Src/main.c **** UART_transmission_request = MESS_01;
- 11791 .loc 1 405 6 is_stmt 1 view .LVU3679
- 405:Src/main.c **** UART_transmission_request = MESS_01;
- 11792 .loc 1 405 20 is_stmt 0 view .LVU3680
- 11793 0228 224A ldr r2, .L761+20
- 11794 022a 1370 strb r3, [r2]
- 406:Src/main.c **** break;
- 11795 .loc 1 406 6 is_stmt 1 view .LVU3681
- 406:Src/main.c **** break;
- 11796 .loc 1 406 32 is_stmt 0 view .LVU3682
- 11797 022c 234B ldr r3, .L761+28
- 11798 022e 0122 movs r2, #1
- 11799 0230 1A70 strb r2, [r3]
- 407:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting!
- 11800 .loc 1 407 5 is_stmt 1 view .LVU3683
- 11801 0232 66E7 b .L652
- 11802 .L666:
- 409:Src/main.c **** State_Data[0]|=temp16&0xff;
- 11803 .loc 1 409 6 view .LVU3684
- 409:Src/main.c **** State_Data[0]|=temp16&0xff;
- 11804 .loc 1 409 15 is_stmt 0 view .LVU3685
- 11805 0234 2E48 ldr r0, .L761+80
- 11806 0236 FFF7FEFF bl SD_READ
- 11807 .LVL1041:
- 409:Src/main.c **** State_Data[0]|=temp16&0xff;
- 11808 .loc 1 409 13 discriminator 1 view .LVU3686
- 11809 023a 82B2 uxth r2, r0
- 11810 023c 2D4B ldr r3, .L761+84
- 11811 023e 1A80 strh r2, [r3] @ movhi
- 410:Src/main.c **** if (temp16==0)
- 11812 .loc 1 410 6 is_stmt 1 view .LVU3687
- 410:Src/main.c **** if (temp16==0)
- 11813 .loc 1 410 16 is_stmt 0 view .LVU3688
- 11814 0240 1F49 ldr r1, .L761+32
- 11815 0242 0B78 ldrb r3, [r1] @ zero_extendqisi2
- 410:Src/main.c **** if (temp16==0)
- 11816 .loc 1 410 19 view .LVU3689
- 11817 0244 0343 orrs r3, r3, r0
- 11818 0246 0B70 strb r3, [r1]
- 411:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 624
-
-
- 11819 .loc 1 411 6 is_stmt 1 view .LVU3690
- 411:Src/main.c **** {
- 11820 .loc 1 411 9 is_stmt 0 view .LVU3691
- 11821 0248 42B9 cbnz r2, .L672
- 413:Src/main.c **** }
- 11822 .loc 1 413 7 is_stmt 1 view .LVU3692
- 413:Src/main.c **** }
- 11823 .loc 1 413 33 is_stmt 0 view .LVU3693
- 11824 024a 1C4B ldr r3, .L761+28
- 11825 024c 0322 movs r2, #3
- 11826 024e 1A70 strb r2, [r3]
- 11827 .L673:
- 419:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11828 .loc 1 419 6 is_stmt 1 view .LVU3694
- 419:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11829 .loc 1 419 20 is_stmt 0 view .LVU3695
- 11830 0250 0023 movs r3, #0
- 11831 0252 184A ldr r2, .L761+20
- 11832 0254 1370 strb r3, [r2]
- 420:Src/main.c **** break;
- 11833 .loc 1 420 6 is_stmt 1 view .LVU3696
- 420:Src/main.c **** break;
- 11834 .loc 1 420 16 is_stmt 0 view .LVU3697
- 11835 0256 1D4A ldr r2, .L761+44
- 11836 0258 1370 strb r3, [r2]
- 421:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet
- 11837 .loc 1 421 5 is_stmt 1 view .LVU3698
- 11838 025a 52E7 b .L652
- 11839 .L672:
- 417:Src/main.c **** }
- 11840 .loc 1 417 7 view .LVU3699
- 417:Src/main.c **** }
- 11841 .loc 1 417 33 is_stmt 0 view .LVU3700
- 11842 025c 174B ldr r3, .L761+28
- 11843 025e 0122 movs r2, #1
- 11844 0260 1A70 strb r2, [r3]
- 11845 0262 F5E7 b .L673
- 11846 .L665:
- 423:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11847 .loc 1 423 6 is_stmt 1 view .LVU3701
- 423:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11848 .loc 1 423 32 is_stmt 0 view .LVU3702
- 11849 0264 154B ldr r3, .L761+28
- 11850 0266 0222 movs r2, #2
- 11851 0268 1A70 strb r2, [r3]
- 424:Src/main.c **** break;
- 11852 .loc 1 424 6 is_stmt 1 view .LVU3703
- 424:Src/main.c **** break;
- 11853 .loc 1 424 16 is_stmt 0 view .LVU3704
- 11854 026a 124B ldr r3, .L761+20
- 11855 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 11856 026e 174B ldr r3, .L761+44
- 11857 0270 1A70 strb r2, [r3]
- 425:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD
- 11858 .loc 1 425 5 is_stmt 1 view .LVU3705
- 11859 0272 46E7 b .L652
- 11860 .L664:
- ARM GAS /tmp/ccLSPxIe.s page 625
-
-
- 427:Src/main.c **** UART_transmission_request = MESS_01;
- 11861 .loc 1 427 6 view .LVU3706
- 427:Src/main.c **** UART_transmission_request = MESS_01;
- 11862 .loc 1 427 21 is_stmt 0 view .LVU3707
- 11863 0274 FFF7FEFF bl SD_REMOVE
- 11864 .LVL1042:
- 427:Src/main.c **** UART_transmission_request = MESS_01;
- 11865 .loc 1 427 16 discriminator 1 view .LVU3708
- 11866 0278 114A ldr r2, .L761+32
- 11867 027a 1378 ldrb r3, [r2] @ zero_extendqisi2
- 427:Src/main.c **** UART_transmission_request = MESS_01;
- 11868 .loc 1 427 19 discriminator 1 view .LVU3709
- 11869 027c 0343 orrs r3, r3, r0
- 11870 027e 1370 strb r3, [r2]
- 428:Src/main.c **** CPU_state = CPU_state_old;
- 11871 .loc 1 428 6 is_stmt 1 view .LVU3710
- 428:Src/main.c **** CPU_state = CPU_state_old;
- 11872 .loc 1 428 32 is_stmt 0 view .LVU3711
- 11873 0280 0E4B ldr r3, .L761+28
- 11874 0282 0122 movs r2, #1
- 11875 0284 1A70 strb r2, [r3]
- 429:Src/main.c **** break;
- 11876 .loc 1 429 6 is_stmt 1 view .LVU3712
- 429:Src/main.c **** break;
- 11877 .loc 1 429 16 is_stmt 0 view .LVU3713
- 11878 0286 0B4B ldr r3, .L761+20
- 11879 0288 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 11880 028a 104B ldr r3, .L761+44
- 11881 028c 1A70 strb r2, [r3]
- 430:Src/main.c **** case STATE://6 - Transmith state message
- 11882 .loc 1 430 5 is_stmt 1 view .LVU3714
- 11883 028e 38E7 b .L652
- 11884 .L663:
- 432:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11885 .loc 1 432 6 view .LVU3715
- 432:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle
- 11886 .loc 1 432 32 is_stmt 0 view .LVU3716
- 11887 0290 0A4B ldr r3, .L761+28
- 11888 0292 0122 movs r2, #1
- 11889 0294 1A70 strb r2, [r3]
- 433:Src/main.c **** break;
- 11890 .loc 1 433 6 is_stmt 1 view .LVU3717
- 433:Src/main.c **** break;
- 11891 .loc 1 433 16 is_stmt 0 view .LVU3718
- 11892 0296 074B ldr r3, .L761+20
- 11893 0298 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 11894 029a 0C4B ldr r3, .L761+44
- 11895 029c 1A70 strb r2, [r3]
- 434:Src/main.c **** case WORK_ENABLE://7 - Main work cycle
- 11896 .loc 1 434 5 is_stmt 1 view .LVU3719
- 11897 029e 30E7 b .L652
- 11898 .L762:
- 11899 .align 2
- 11900 .L761:
- 11901 02a0 00080040 .word 1073743872
- 11902 02a4 00000000 .word htim1
- 11903 02a8 00000000 .word u_rx_flg
- ARM GAS /tmp/ccLSPxIe.s page 626
-
-
- 11904 02ac 00100140 .word 1073811456
- 11905 02b0 00E100E0 .word -536813312
- 11906 02b4 00000000 .word CPU_state_old
- 11907 02b8 00000000 .word task
- 11908 02bc 00000000 .word UART_transmission_request
- 11909 02c0 00000000 .word State_Data
- 11910 02c4 00000000 .word flg_tmt
- 11911 02c8 00000240 .word 1073872896
- 11912 02cc 00000000 .word CPU_state
- 11913 02d0 00000000 .word COMMAND
- 11914 02d4 00000000 .word CS_result
- 11915 02d8 00380040 .word 1073756160
- 11916 02dc 00000000 .word Curr_setup
- 11917 02e0 00000000 .word LD2_curr_setup
- 11918 02e4 00000000 .word LD1_curr_setup
- 11919 02e8 00000000 .word TO6
- 11920 02ec 00000000 .word TO6_before
- 11921 02f0 00000000 .word Long_Data
- 11922 02f4 00000000 .word temp16
- 11923 .L662:
- 436:Src/main.c **** Stop_TIM10();
- 11924 .loc 1 436 6 view .LVU3720
- 436:Src/main.c **** Stop_TIM10();
- 11925 .loc 1 436 31 is_stmt 0 view .LVU3721
- 11926 02f8 B24B ldr r3, .L763
- 11927 02fa 5A68 ldr r2, [r3, #4] @ float
- 436:Src/main.c **** Stop_TIM10();
- 11928 .loc 1 436 25 view .LVU3722
- 11929 02fc 1A61 str r2, [r3, #16] @ float
- 437:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz)
- 11930 .loc 1 437 6 is_stmt 1 view .LVU3723
- 11931 02fe FFF7FEFF bl Stop_TIM10
- 11932 .LVL1043:
- 438:Src/main.c **** {
- 11933 .loc 1 438 6 view .LVU3724
- 438:Src/main.c **** {
- 11934 .loc 1 438 13 is_stmt 0 view .LVU3725
- 11935 0302 B14B ldr r3, .L763+4
- 11936 0304 1B68 ldr r3, [r3]
- 11937 0306 B14A ldr r2, .L763+8
- 11938 0308 1268 ldr r2, [r2]
- 438:Src/main.c **** {
- 11939 .loc 1 438 9 view .LVU3726
- 11940 030a 9342 cmp r3, r2
- 11941 030c 7FF6F9AE bls .L652
- 440:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11942 .loc 1 440 7 is_stmt 1 view .LVU3727
- 440:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11943 .loc 1 440 18 is_stmt 0 view .LVU3728
- 11944 0310 AE4A ldr r2, .L763+8
- 11945 0312 1360 str r3, [r2]
- 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11946 .loc 1 441 7 is_stmt 1 view .LVU3729
- 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11947 .loc 1 441 25 is_stmt 0 view .LVU3730
- 11948 0314 0120 movs r0, #1
- 11949 0316 FFF7FEFF bl MPhD_T
- ARM GAS /tmp/ccLSPxIe.s page 627
-
-
- 11950 .LVL1044:
- 441:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 11951 .loc 1 441 23 discriminator 1 view .LVU3731
- 11952 031a AD4F ldr r7, .L763+12
- 11953 031c 3881 strh r0, [r7, #8] @ movhi
- 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11954 .loc 1 442 7 is_stmt 1 view .LVU3732
- 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11955 .loc 1 442 25 is_stmt 0 view .LVU3733
- 11956 031e 0120 movs r0, #1
- 11957 0320 FFF7FEFF bl MPhD_T
- 11958 .LVL1045:
- 442:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11959 .loc 1 442 23 discriminator 1 view .LVU3734
- 11960 0324 3881 strh r0, [r7, #8] @ movhi
- 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11961 .loc 1 443 7 is_stmt 1 view .LVU3735
- 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11962 .loc 1 443 25 is_stmt 0 view .LVU3736
- 11963 0326 0220 movs r0, #2
- 11964 0328 FFF7FEFF bl MPhD_T
- 11965 .LVL1046:
- 443:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 11966 .loc 1 443 23 discriminator 1 view .LVU3737
- 11967 032c A94E ldr r6, .L763+16
- 11968 032e 3081 strh r0, [r6, #8] @ movhi
- 444:Src/main.c ****
- 11969 .loc 1 444 7 is_stmt 1 view .LVU3738
- 444:Src/main.c ****
- 11970 .loc 1 444 25 is_stmt 0 view .LVU3739
- 11971 0330 0220 movs r0, #2
- 11972 0332 FFF7FEFF bl MPhD_T
- 11973 .LVL1047:
- 444:Src/main.c ****
- 11974 .loc 1 444 23 discriminator 1 view .LVU3740
- 11975 0336 3081 strh r0, [r6, #8] @ movhi
- 447:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 11976 .loc 1 447 7 is_stmt 1 view .LVU3741
- 447:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3);
- 11977 .loc 1 447 14 is_stmt 0 view .LVU3742
- 11978 0338 0320 movs r0, #3
- 11979 033a FFF7FEFF bl MPhD_T
- 11980 .LVL1048:
- 448:Src/main.c **** (void) MPhD_T(4);
- 11981 .loc 1 448 7 is_stmt 1 view .LVU3743
- 448:Src/main.c **** (void) MPhD_T(4);
- 11982 .loc 1 448 32 is_stmt 0 view .LVU3744
- 11983 033e 0320 movs r0, #3
- 11984 0340 FFF7FEFF bl MPhD_T
- 11985 .LVL1049:
- 448:Src/main.c **** (void) MPhD_T(4);
- 11986 .loc 1 448 30 discriminator 1 view .LVU3745
- 11987 0344 3880 strh r0, [r7] @ movhi
- 449:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 11988 .loc 1 449 7 is_stmt 1 view .LVU3746
- 449:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4);
- 11989 .loc 1 449 14 is_stmt 0 view .LVU3747
- ARM GAS /tmp/ccLSPxIe.s page 628
-
-
- 11990 0346 0420 movs r0, #4
- 11991 0348 FFF7FEFF bl MPhD_T
- 11992 .LVL1050:
- 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11993 .loc 1 450 7 is_stmt 1 view .LVU3748
- 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11994 .loc 1 450 32 is_stmt 0 view .LVU3749
- 11995 034c 0420 movs r0, #4
- 11996 034e FFF7FEFF bl MPhD_T
- 11997 .LVL1051:
- 450:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 11998 .loc 1 450 30 discriminator 1 view .LVU3750
- 11999 0352 3080 strh r0, [r6] @ movhi
- 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1
- 12000 .loc 1 451 7 is_stmt 1 view .LVU3751
- 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1
- 12001 .loc 1 451 14 is_stmt 0 view .LVU3752
- 12002 0354 DFF8AC82 ldr r8, .L763+64
- 12003 0358 0122 movs r2, #1
- 12004 035a 3946 mov r1, r7
- 12005 035c 4046 mov r0, r8
- 12006 035e FFF7FEFF bl PID_Controller_Temp
- 12007 .LVL1052:
- 12008 0362 0146 mov r1, r0
- 451:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1
- 12009 .loc 1 451 13 discriminator 1 view .LVU3753
- 12010 0364 9C4D ldr r5, .L763+20
- 12011 0366 2880 strh r0, [r5] @ movhi
- 452:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 12012 .loc 1 452 7 is_stmt 1 view .LVU3754
- 12013 0368 0320 movs r0, #3
- 12014 036a FFF7FEFF bl Set_LTEC
- 12015 .LVL1053:
- 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2
- 12016 .loc 1 453 7 view .LVU3755
- 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2
- 12017 .loc 1 453 14 is_stmt 0 view .LVU3756
- 12018 036e DFF89892 ldr r9, .L763+68
- 12019 0372 0222 movs r2, #2
- 12020 0374 3146 mov r1, r6
- 12021 0376 4846 mov r0, r9
- 12022 0378 FFF7FEFF bl PID_Controller_Temp
- 12023 .LVL1054:
- 12024 037c 0146 mov r1, r0
- 453:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2
- 12025 .loc 1 453 13 discriminator 1 view .LVU3757
- 12026 037e 2880 strh r0, [r5] @ movhi
- 454:Src/main.c ****
- 12027 .loc 1 454 7 is_stmt 1 view .LVU3758
- 12028 0380 0420 movs r0, #4
- 12029 0382 FFF7FEFF bl Set_LTEC
- 12030 .LVL1055:
- 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 12031 .loc 1 456 7 view .LVU3759
- 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 12032 .loc 1 456 31 is_stmt 0 view .LVU3760
- 12033 0386 3B89 ldrh r3, [r7, #8]
- ARM GAS /tmp/ccLSPxIe.s page 629
-
-
- 456:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 12034 .loc 1 456 20 view .LVU3761
- 12035 0388 944C ldr r4, .L763+24
- 12036 038a 6380 strh r3, [r4, #2] @ movhi
- 457:Src/main.c ****
- 12037 .loc 1 457 7 is_stmt 1 view .LVU3762
- 457:Src/main.c ****
- 12038 .loc 1 457 31 is_stmt 0 view .LVU3763
- 12039 038c 3389 ldrh r3, [r6, #8]
- 457:Src/main.c ****
- 12040 .loc 1 457 20 view .LVU3764
- 12041 038e A380 strh r3, [r4, #4] @ movhi
- 459:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2
- 12042 .loc 1 459 7 is_stmt 1 view .LVU3765
- 12043 0390 B8F80C10 ldrh r1, [r8, #12]
- 12044 0394 0120 movs r0, #1
- 12045 0396 FFF7FEFF bl Set_LTEC
- 12046 .LVL1056:
- 460:Src/main.c ****
- 12047 .loc 1 460 7 view .LVU3766
- 12048 039a B9F80C10 ldrh r1, [r9, #12]
- 12049 039e 0220 movs r0, #2
- 12050 03a0 FFF7FEFF bl Set_LTEC
- 12051 .LVL1057:
- 464:Src/main.c **** temp16 = Get_ADC(1);
- 12052 .loc 1 464 7 view .LVU3767
- 464:Src/main.c **** temp16 = Get_ADC(1);
- 12053 .loc 1 464 16 is_stmt 0 view .LVU3768
- 12054 03a4 0020 movs r0, #0
- 12055 03a6 FFF7FEFF bl Get_ADC
- 12056 .LVL1058:
- 464:Src/main.c **** temp16 = Get_ADC(1);
- 12057 .loc 1 464 14 discriminator 1 view .LVU3769
- 12058 03aa 2880 strh r0, [r5] @ movhi
- 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 12059 .loc 1 465 7 is_stmt 1 view .LVU3770
- 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 12060 .loc 1 465 16 is_stmt 0 view .LVU3771
- 12061 03ac 0120 movs r0, #1
- 12062 03ae FFF7FEFF bl Get_ADC
- 12063 .LVL1059:
- 465:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain
- 12064 .loc 1 465 14 discriminator 1 view .LVU3772
- 12065 03b2 2880 strh r0, [r5] @ movhi
- 466:Src/main.c ****
- 12066 .loc 1 466 7 is_stmt 1 view .LVU3773
- 466:Src/main.c ****
- 12067 .loc 1 466 20 is_stmt 0 view .LVU3774
- 12068 03b4 E081 strh r0, [r4, #14] @ movhi
- 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 12069 .loc 1 469 7 is_stmt 1 view .LVU3775
- 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- 12070 .loc 1 469 16 is_stmt 0 view .LVU3776
- 12071 03b6 0120 movs r0, #1
- 12072 03b8 FFF7FEFF bl Get_ADC
- 12073 .LVL1060:
- 469:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain
- ARM GAS /tmp/ccLSPxIe.s page 630
-
-
- 12074 .loc 1 469 14 discriminator 1 view .LVU3777
- 12075 03bc 2880 strh r0, [r5] @ movhi
- 470:Src/main.c ****
- 12076 .loc 1 470 7 is_stmt 1 view .LVU3778
- 470:Src/main.c ****
- 12077 .loc 1 470 20 is_stmt 0 view .LVU3779
- 12078 03be 2082 strh r0, [r4, #16] @ movhi
- 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 12079 .loc 1 473 7 is_stmt 1 view .LVU3780
- 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 12080 .loc 1 473 16 is_stmt 0 view .LVU3781
- 12081 03c0 0120 movs r0, #1
- 12082 03c2 FFF7FEFF bl Get_ADC
- 12083 .LVL1061:
- 473:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor
- 12084 .loc 1 473 14 discriminator 1 view .LVU3782
- 12085 03c6 2880 strh r0, [r5] @ movhi
- 474:Src/main.c ****
- 12086 .loc 1 474 7 is_stmt 1 view .LVU3783
- 474:Src/main.c ****
- 12087 .loc 1 474 20 is_stmt 0 view .LVU3784
- 12088 03c8 6082 strh r0, [r4, #18] @ movhi
- 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 12089 .loc 1 477 7 is_stmt 1 view .LVU3785
- 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 12090 .loc 1 477 16 is_stmt 0 view .LVU3786
- 12091 03ca 0120 movs r0, #1
- 12092 03cc FFF7FEFF bl Get_ADC
- 12093 .LVL1062:
- 477:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor
- 12094 .loc 1 477 14 discriminator 1 view .LVU3787
- 12095 03d0 2880 strh r0, [r5] @ movhi
- 478:Src/main.c ****
- 12096 .loc 1 478 7 is_stmt 1 view .LVU3788
- 478:Src/main.c ****
- 12097 .loc 1 478 21 is_stmt 0 view .LVU3789
- 12098 03d2 A082 strh r0, [r4, #20] @ movhi
- 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 12099 .loc 1 481 7 is_stmt 1 view .LVU3790
- 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 12100 .loc 1 481 16 is_stmt 0 view .LVU3791
- 12101 03d4 0120 movs r0, #1
- 12102 03d6 FFF7FEFF bl Get_ADC
- 12103 .LVL1063:
- 481:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor
- 12104 .loc 1 481 14 discriminator 1 view .LVU3792
- 12105 03da 2880 strh r0, [r5] @ movhi
- 482:Src/main.c **** temp16 = Get_ADC(2);
- 12106 .loc 1 482 7 is_stmt 1 view .LVU3793
- 482:Src/main.c **** temp16 = Get_ADC(2);
- 12107 .loc 1 482 21 is_stmt 0 view .LVU3794
- 12108 03dc E082 strh r0, [r4, #22] @ movhi
- 483:Src/main.c ****
- 12109 .loc 1 483 7 is_stmt 1 view .LVU3795
- 483:Src/main.c ****
- 12110 .loc 1 483 16 is_stmt 0 view .LVU3796
- 12111 03de 0220 movs r0, #2
- ARM GAS /tmp/ccLSPxIe.s page 631
-
-
- 12112 03e0 FFF7FEFF bl Get_ADC
- 12113 .LVL1064:
- 483:Src/main.c ****
- 12114 .loc 1 483 14 discriminator 1 view .LVU3797
- 12115 03e4 2880 strh r0, [r5] @ movhi
- 486:Src/main.c **** temp16 = Get_ADC(4);
- 12116 .loc 1 486 7 is_stmt 1 view .LVU3798
- 486:Src/main.c **** temp16 = Get_ADC(4);
- 12117 .loc 1 486 16 is_stmt 0 view .LVU3799
- 12118 03e6 0320 movs r0, #3
- 12119 03e8 FFF7FEFF bl Get_ADC
- 12120 .LVL1065:
- 486:Src/main.c **** temp16 = Get_ADC(4);
- 12121 .loc 1 486 14 discriminator 1 view .LVU3800
- 12122 03ec 2880 strh r0, [r5] @ movhi
- 487:Src/main.c **** Long_Data[12] = temp16;
- 12123 .loc 1 487 7 is_stmt 1 view .LVU3801
- 487:Src/main.c **** Long_Data[12] = temp16;
- 12124 .loc 1 487 16 is_stmt 0 view .LVU3802
- 12125 03ee 0420 movs r0, #4
- 12126 03f0 FFF7FEFF bl Get_ADC
- 12127 .LVL1066:
- 487:Src/main.c **** Long_Data[12] = temp16;
- 12128 .loc 1 487 14 discriminator 1 view .LVU3803
- 12129 03f4 2880 strh r0, [r5] @ movhi
- 488:Src/main.c **** temp16 = Get_ADC(5);
- 12130 .loc 1 488 7 is_stmt 1 view .LVU3804
- 488:Src/main.c **** temp16 = Get_ADC(5);
- 12131 .loc 1 488 21 is_stmt 0 view .LVU3805
- 12132 03f6 2083 strh r0, [r4, #24] @ movhi
- 489:Src/main.c ****
- 12133 .loc 1 489 7 is_stmt 1 view .LVU3806
- 489:Src/main.c ****
- 12134 .loc 1 489 16 is_stmt 0 view .LVU3807
- 12135 03f8 0520 movs r0, #5
- 12136 03fa FFF7FEFF bl Get_ADC
- 12137 .LVL1067:
- 489:Src/main.c ****
- 12138 .loc 1 489 14 discriminator 1 view .LVU3808
- 12139 03fe 2880 strh r0, [r5] @ movhi
- 492:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
- 12140 .loc 1 492 7 is_stmt 1 view .LVU3809
- 492:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
- 12141 .loc 1 492 16 is_stmt 0 view .LVU3810
- 12142 0400 774B ldr r3, .L763+28
- 12143 0402 1B68 ldr r3, [r3]
- 12144 0404 774A ldr r2, .L763+32
- 12145 0406 1360 str r3, [r2]
- 493:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
- 12146 .loc 1 493 7 is_stmt 1 view .LVU3811
- 493:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
- 12147 .loc 1 493 20 is_stmt 0 view .LVU3812
- 12148 0408 E380 strh r3, [r4, #6] @ movhi
- 494:Src/main.c ****
- 12149 .loc 1 494 7 is_stmt 1 view .LVU3813
- 494:Src/main.c ****
- 12150 .loc 1 494 31 is_stmt 0 view .LVU3814
- ARM GAS /tmp/ccLSPxIe.s page 632
-
-
- 12151 040a 1B0C lsrs r3, r3, #16
- 494:Src/main.c ****
- 12152 .loc 1 494 20 view .LVU3815
- 12153 040c 2381 strh r3, [r4, #8] @ movhi
- 497:Src/main.c ****
- 12154 .loc 1 497 7 is_stmt 1 view .LVU3816
- 497:Src/main.c ****
- 12155 .loc 1 497 31 is_stmt 0 view .LVU3817
- 12156 040e 3B88 ldrh r3, [r7]
- 497:Src/main.c ****
- 12157 .loc 1 497 20 view .LVU3818
- 12158 0410 6381 strh r3, [r4, #10] @ movhi
- 500:Src/main.c ****
- 12159 .loc 1 500 7 is_stmt 1 view .LVU3819
- 500:Src/main.c ****
- 12160 .loc 1 500 31 is_stmt 0 view .LVU3820
- 12161 0412 3388 ldrh r3, [r6]
- 500:Src/main.c ****
- 12162 .loc 1 500 20 view .LVU3821
- 12163 0414 A381 strh r3, [r4, #12] @ movhi
- 502:Src/main.c **** {
- 12164 .loc 1 502 7 is_stmt 1 view .LVU3822
- 502:Src/main.c **** {
- 12165 .loc 1 502 21 is_stmt 0 view .LVU3823
- 12166 0416 744B ldr r3, .L763+36
- 12167 0418 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2
- 502:Src/main.c **** {
- 12168 .loc 1 502 10 view .LVU3824
- 12169 041a 012B cmp r3, #1
- 12170 041c 03D0 beq .L748
- 12171 .L674:
- 509:Src/main.c **** }
- 12172 .loc 1 509 7 is_stmt 1 view .LVU3825
- 509:Src/main.c **** }
- 12173 .loc 1 509 21 is_stmt 0 view .LVU3826
- 12174 041e 734B ldr r3, .L763+40
- 12175 0420 0722 movs r2, #7
- 12176 0422 1A70 strb r2, [r3]
- 12177 0424 6DE6 b .L652
- 12178 .L748:
- 504:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 12179 .loc 1 504 8 is_stmt 1 view .LVU3827
- 504:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 12180 .loc 1 504 20 is_stmt 0 view .LVU3828
- 12181 0426 0234 adds r4, r4, #2
- 12182 0428 0D21 movs r1, #13
- 12183 042a 2046 mov r0, r4
- 12184 042c FFF7FEFF bl CalculateChecksum
- 12185 .LVL1068:
- 12186 0430 0346 mov r3, r0
- 504:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 12187 .loc 1 504 18 discriminator 1 view .LVU3829
- 12188 0432 6F4A ldr r2, .L763+44
- 12189 0434 1080 strh r0, [r2] @ movhi
- 505:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]);
- 12190 .loc 1 505 8 is_stmt 1 view .LVU3830
- 505:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]);
- ARM GAS /tmp/ccLSPxIe.s page 633
-
-
- 12191 .loc 1 505 27 is_stmt 0 view .LVU3831
- 12192 0436 A01E subs r0, r4, #2
- 12193 0438 8383 strh r3, [r0, #28] @ movhi
- 506:Src/main.c **** State_Data[0]|=temp16&0xff;
- 12194 .loc 1 506 8 is_stmt 1 view .LVU3832
- 506:Src/main.c **** State_Data[0]|=temp16&0xff;
- 12195 .loc 1 506 17 is_stmt 0 view .LVU3833
- 12196 043a FFF7FEFF bl SD_SAVE
- 12197 .LVL1069:
- 12198 043e 0346 mov r3, r0
- 506:Src/main.c **** State_Data[0]|=temp16&0xff;
- 12199 .loc 1 506 15 discriminator 1 view .LVU3834
- 12200 0440 2880 strh r0, [r5] @ movhi
- 507:Src/main.c **** }
- 12201 .loc 1 507 8 is_stmt 1 view .LVU3835
- 507:Src/main.c **** }
- 12202 .loc 1 507 18 is_stmt 0 view .LVU3836
- 12203 0442 6C49 ldr r1, .L763+48
- 12204 0444 0A78 ldrb r2, [r1] @ zero_extendqisi2
- 507:Src/main.c **** }
- 12205 .loc 1 507 21 view .LVU3837
- 12206 0446 1343 orrs r3, r3, r2
- 12207 0448 0B70 strb r3, [r1]
- 12208 044a E8E7 b .L674
- 12209 .L659:
- 513:Src/main.c **** {
- 12210 .loc 1 513 6 is_stmt 1 view .LVU3838
- 513:Src/main.c **** {
- 12211 .loc 1 513 10 is_stmt 0 view .LVU3839
- 12212 044c 6A4C ldr r4, .L763+52
- 12213 044e 0321 movs r1, #3
- 12214 0450 2046 mov r0, r4
- 12215 0452 FFF7FEFF bl CalculateChecksum
- 12216 .LVL1070:
- 513:Src/main.c **** {
- 12217 .loc 1 513 69 discriminator 1 view .LVU3840
- 12218 0456 E388 ldrh r3, [r4, #6]
- 513:Src/main.c **** {
- 12219 .loc 1 513 9 discriminator 1 view .LVU3841
- 12220 0458 9842 cmp r0, r3
- 12221 045a 0CD0 beq .L749
- 588:Src/main.c **** }
- 12222 .loc 1 588 7 is_stmt 1 view .LVU3842
- 588:Src/main.c **** }
- 12223 .loc 1 588 17 is_stmt 0 view .LVU3843
- 12224 045c 654A ldr r2, .L763+48
- 12225 045e 1378 ldrb r3, [r2] @ zero_extendqisi2
- 588:Src/main.c **** }
- 12226 .loc 1 588 21 view .LVU3844
- 12227 0460 43F00403 orr r3, r3, #4
- 12228 0464 1370 strb r3, [r2]
- 12229 .L678:
- 590:Src/main.c **** CPU_state = CPU_state_old;
- 12230 .loc 1 590 6 is_stmt 1 view .LVU3845
- 590:Src/main.c **** CPU_state = CPU_state_old;
- 12231 .loc 1 590 32 is_stmt 0 view .LVU3846
- 12232 0466 654B ldr r3, .L763+56
- ARM GAS /tmp/ccLSPxIe.s page 634
-
-
- 12233 0468 0122 movs r2, #1
- 12234 046a 1A70 strb r2, [r3]
- 591:Src/main.c **** break;
- 12235 .loc 1 591 6 is_stmt 1 view .LVU3847
- 591:Src/main.c **** break;
- 12236 .loc 1 591 16 is_stmt 0 view .LVU3848
- 12237 046c 5F4B ldr r3, .L763+40
- 12238 046e 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12239 0470 634B ldr r3, .L763+60
- 12240 0472 1A70 strb r2, [r3]
- 592:Src/main.c **** case AD9833_CMD://11 - Configure AD9833 triangle output
- 12241 .loc 1 592 5 is_stmt 1 view .LVU3849
- 12242 0474 45E6 b .L652
- 12243 .L749:
- 12244 .LBB711:
- 515:Src/main.c **** uint16_t param0 = COMMAND[1];
- 12245 .loc 1 515 7 view .LVU3850
- 515:Src/main.c **** uint16_t param0 = COMMAND[1];
- 12246 .loc 1 515 16 is_stmt 0 view .LVU3851
- 12247 0476 2388 ldrh r3, [r4]
- 12248 .LVL1071:
- 516:Src/main.c **** uint16_t param1 = COMMAND[2];
- 12249 .loc 1 516 7 is_stmt 1 view .LVU3852
- 516:Src/main.c **** uint16_t param1 = COMMAND[2];
- 12250 .loc 1 516 16 is_stmt 0 view .LVU3853
- 12251 0478 6188 ldrh r1, [r4, #2]
- 12252 .LVL1072:
- 517:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 12253 .loc 1 517 7 is_stmt 1 view .LVU3854
- 517:Src/main.c **** uint8_t enable = (flags & AD9102_FLAG_ENABLE) ? 1u : 0u;
- 12254 .loc 1 517 16 is_stmt 0 view .LVU3855
- 12255 047a A488 ldrh r4, [r4, #4]
- 12256 .LVL1073:
- 518:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 12257 .loc 1 518 7 is_stmt 1 view .LVU3856
- 518:Src/main.c **** uint8_t triangle = (flags & AD9102_FLAG_TRIANGLE) ? 1u : 0u;
- 12258 .loc 1 518 15 is_stmt 0 view .LVU3857
- 12259 047c 03F00106 and r6, r3, #1
- 12260 .LVL1074:
- 519:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 12261 .loc 1 519 7 is_stmt 1 view .LVU3858
- 519:Src/main.c **** uint8_t sram_mode = (flags & AD9102_FLAG_SRAM) ? 1u : 0u;
- 12262 .loc 1 519 15 is_stmt 0 view .LVU3859
- 12263 0480 C3F34005 ubfx r5, r3, #1, #1
- 12264 .LVL1075:
- 520:Src/main.c ****
- 12265 .loc 1 520 7 is_stmt 1 view .LVU3860
- 522:Src/main.c **** {
- 12266 .loc 1 522 7 view .LVU3861
- 522:Src/main.c **** {
- 12267 .loc 1 522 10 is_stmt 0 view .LVU3862
- 12268 0484 13F0040F tst r3, #4
- 12269 0488 1FD0 beq .L676
- 12270 .LBB712:
- 524:Src/main.c **** uint16_t samples;
- 12271 .loc 1 524 8 is_stmt 1 view .LVU3863
- 12272 .LVL1076:
- ARM GAS /tmp/ccLSPxIe.s page 635
-
-
- 525:Src/main.c **** uint8_t hold;
- 12273 .loc 1 525 8 view .LVU3864
- 526:Src/main.c **** uint16_t amplitude;
- 12274 .loc 1 526 8 view .LVU3865
- 527:Src/main.c ****
- 12275 .loc 1 527 8 view .LVU3866
- 529:Src/main.c **** {
- 12276 .loc 1 529 8 view .LVU3867
- 529:Src/main.c **** {
- 12277 .loc 1 529 11 is_stmt 0 view .LVU3868
- 12278 048a 13F0080F tst r3, #8
- 12279 048e 1AD1 bne .L733
- 537:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu);
- 12280 .loc 1 537 9 is_stmt 1 view .LVU3869
- 12281 .LVL1077:
- 538:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT;
- 12282 .loc 1 538 9 view .LVU3870
- 538:Src/main.c **** amplitude = AD9102_SRAM_AMP_DEFAULT;
- 12283 .loc 1 538 14 is_stmt 0 view .LVU3871
- 12284 0490 04F00F07 and r7, r4, #15
- 12285 .LVL1078:
- 539:Src/main.c **** }
- 12286 .loc 1 539 9 is_stmt 1 view .LVU3872
- 537:Src/main.c **** hold = (uint8_t)(param1 & 0x0Fu);
- 12287 .loc 1 537 17 is_stmt 0 view .LVU3873
- 12288 0494 0C46 mov r4, r1
- 12289 .LVL1079:
- 539:Src/main.c **** }
- 12290 .loc 1 539 19 view .LVU3874
- 12291 0496 41F6FF71 movw r1, #8191
- 12292 .LVL1080:
- 12293 .L677:
- 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12294 .loc 1 542 8 is_stmt 1 view .LVU3875
- 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12295 .loc 1 542 30 is_stmt 0 view .LVU3876
- 12296 049a 0091 str r1, [sp]
- 12297 049c 2B46 mov r3, r5
- 12298 .LVL1081:
- 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12299 .loc 1 542 30 view .LVU3877
- 12300 049e 3A46 mov r2, r7
- 12301 04a0 2146 mov r1, r4
- 12302 .LVL1082:
- 542:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12303 .loc 1 542 30 view .LVU3878
- 12304 04a2 3046 mov r0, r6
- 12305 04a4 FFF7FEFF bl AD9102_ApplySram
- 12306 .LVL1083:
- 543:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 12307 .loc 1 543 8 is_stmt 1 view .LVU3879
- 543:Src/main.c **** if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
- 12308 .loc 1 543 22 is_stmt 0 view .LVU3880
- 12309 04a8 524B ldr r3, .L763+48
- 12310 04aa 5870 strb r0, [r3, #1]
- 544:Src/main.c **** {
- 12311 .loc 1 544 8 is_stmt 1 view .LVU3881
- ARM GAS /tmp/ccLSPxIe.s page 636
-
-
- 544:Src/main.c **** {
- 12312 .loc 1 544 12 is_stmt 0 view .LVU3882
- 12313 04ac 3B46 mov r3, r7
- 12314 04ae 2246 mov r2, r4
- 12315 04b0 3146 mov r1, r6
- 12316 04b2 FFF7FEFF bl AD9102_CheckFlagsSram
- 12317 .LVL1084:
- 544:Src/main.c **** {
- 12318 .loc 1 544 11 discriminator 1 view .LVU3883
- 12319 04b6 0028 cmp r0, #0
- 12320 04b8 D5D0 beq .L678
- 546:Src/main.c **** }
- 12321 .loc 1 546 9 is_stmt 1 view .LVU3884
- 546:Src/main.c **** }
- 12322 .loc 1 546 19 is_stmt 0 view .LVU3885
- 12323 04ba 4E4A ldr r2, .L763+48
- 12324 04bc 1378 ldrb r3, [r2] @ zero_extendqisi2
- 546:Src/main.c **** }
- 12325 .loc 1 546 23 view .LVU3886
- 12326 04be 63F07F03 orn r3, r3, #127
- 12327 04c2 1370 strb r3, [r2]
- 12328 04c4 CFE7 b .L678
- 12329 .LVL1085:
- 12330 .L733:
- 533:Src/main.c **** }
- 12331 .loc 1 533 14 view .LVU3887
- 12332 04c6 0127 movs r7, #1
- 12333 04c8 E7E7 b .L677
- 12334 .LVL1086:
- 12335 .L676:
- 533:Src/main.c **** }
- 12336 .loc 1 533 14 view .LVU3888
- 12337 .LBE712:
- 12338 .LBB713:
- 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 12339 .loc 1 551 8 is_stmt 1 view .LVU3889
- 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 12340 .loc 1 551 16 is_stmt 0 view .LVU3890
- 12341 04ca 05B1 cbz r5, .L679
- 551:Src/main.c **** uint8_t saw_step = (uint8_t)(param0 & 0x00FFu);
- 12342 .loc 1 551 16 discriminator 1 view .LVU3891
- 12343 04cc 0225 movs r5, #2
- 12344 .LVL1087:
- 12345 .L679:
- 552:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 12346 .loc 1 552 8 is_stmt 1 view .LVU3892
- 552:Src/main.c **** uint8_t pat_base = (uint8_t)((param0 >> 8) & 0x0Fu);
- 12347 .loc 1 552 16 is_stmt 0 view .LVU3893
- 12348 04ce CFB2 uxtb r7, r1
- 12349 .LVL1088:
- 553:Src/main.c **** uint16_t pat_period = param1;
- 12350 .loc 1 553 8 is_stmt 1 view .LVU3894
- 553:Src/main.c **** uint16_t pat_period = param1;
- 12351 .loc 1 553 16 is_stmt 0 view .LVU3895
- 12352 04d0 C1F30328 ubfx r8, r1, #8, #4
- 12353 .LVL1089:
- 554:Src/main.c ****
- ARM GAS /tmp/ccLSPxIe.s page 637
-
-
- 12354 .loc 1 554 8 is_stmt 1 view .LVU3896
- 556:Src/main.c **** {
- 12355 .loc 1 556 8 view .LVU3897
- 556:Src/main.c **** {
- 12356 .loc 1 556 11 is_stmt 0 view .LVU3898
- 12357 04d4 2143 orrs r1, r1, r4
- 12358 .LVL1090:
- 556:Src/main.c **** {
- 12359 .loc 1 556 11 view .LVU3899
- 12360 04d6 09D0 beq .L734
- 564:Src/main.c **** {
- 12361 .loc 1 564 9 is_stmt 1 view .LVU3900
- 564:Src/main.c **** {
- 12362 .loc 1 564 12 is_stmt 0 view .LVU3901
- 12363 04d8 1FB1 cbz r7, .L735
- 568:Src/main.c **** {
- 12364 .loc 1 568 14 is_stmt 1 view .LVU3902
- 568:Src/main.c **** {
- 12365 .loc 1 568 17 is_stmt 0 view .LVU3903
- 12366 04da 3F2F cmp r7, #63
- 12367 04dc 02D9 bls .L681
- 570:Src/main.c **** }
- 12368 .loc 1 570 19 view .LVU3904
- 12369 04de 3F27 movs r7, #63
- 12370 .LVL1091:
- 570:Src/main.c **** }
- 12371 .loc 1 570 19 view .LVU3905
- 12372 04e0 00E0 b .L681
- 12373 .LVL1092:
- 12374 .L735:
- 566:Src/main.c **** }
- 12375 .loc 1 566 19 view .LVU3906
- 12376 04e2 0127 movs r7, #1
- 12377 .LVL1093:
- 12378 .L681:
- 572:Src/main.c **** {
- 12379 .loc 1 572 9 is_stmt 1 view .LVU3907
- 572:Src/main.c **** {
- 12380 .loc 1 572 12 is_stmt 0 view .LVU3908
- 12381 04e4 3CB9 cbnz r4, .L680
- 574:Src/main.c **** }
- 12382 .loc 1 574 21 view .LVU3909
- 12383 04e6 4FF6FF74 movw r4, #65535
- 12384 .LVL1094:
- 574:Src/main.c **** }
- 12385 .loc 1 574 21 view .LVU3910
- 12386 04ea 04E0 b .L680
- 12387 .LVL1095:
- 12388 .L734:
- 560:Src/main.c **** }
- 12389 .loc 1 560 20 view .LVU3911
- 12390 04ec 4FF6FF74 movw r4, #65535
- 12391 .LVL1096:
- 559:Src/main.c **** pat_period = AD9102_PAT_PERIOD_DEFAULT;
- 12392 .loc 1 559 18 view .LVU3912
- 12393 04f0 4FF00208 mov r8, #2
- 12394 .LVL1097:
- ARM GAS /tmp/ccLSPxIe.s page 638
-
-
- 558:Src/main.c **** pat_base = AD9102_PAT_PERIOD_BASE_DEFAULT;
- 12395 .loc 1 558 18 view .LVU3913
- 12396 04f4 0127 movs r7, #1
- 12397 .LVL1098:
- 12398 .L680:
- 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12399 .loc 1 578 8 is_stmt 1 view .LVU3914
- 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12400 .loc 1 578 30 is_stmt 0 view .LVU3915
- 12401 04f6 0094 str r4, [sp]
- 12402 04f8 4346 mov r3, r8
- 12403 .LVL1099:
- 578:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12404 .loc 1 578 30 view .LVU3916
- 12405 04fa 3A46 mov r2, r7
- 12406 04fc 3146 mov r1, r6
- 12407 04fe 2846 mov r0, r5
- 12408 0500 FFF7FEFF bl AD9102_Apply
- 12409 .LVL1100:
- 579:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- 12410 .loc 1 579 8 is_stmt 1 view .LVU3917
- 579:Src/main.c **** if (AD9102_CheckFlags(pat_status, enable, saw_type, saw_step, pat_base, pat_period))
- 12411 .loc 1 579 22 is_stmt 0 view .LVU3918
- 12412 0504 3B4B ldr r3, .L763+48
- 12413 0506 5870 strb r0, [r3, #1]
- 580:Src/main.c **** {
- 12414 .loc 1 580 8 is_stmt 1 view .LVU3919
- 580:Src/main.c **** {
- 12415 .loc 1 580 12 is_stmt 0 view .LVU3920
- 12416 0508 0194 str r4, [sp, #4]
- 12417 050a CDF80080 str r8, [sp]
- 12418 050e 3B46 mov r3, r7
- 12419 0510 2A46 mov r2, r5
- 12420 0512 3146 mov r1, r6
- 12421 0514 FFF7FEFF bl AD9102_CheckFlags
- 12422 .LVL1101:
- 580:Src/main.c **** {
- 12423 .loc 1 580 11 discriminator 1 view .LVU3921
- 12424 0518 0028 cmp r0, #0
- 12425 051a A4D0 beq .L678
- 582:Src/main.c **** }
- 12426 .loc 1 582 9 is_stmt 1 view .LVU3922
- 582:Src/main.c **** }
- 12427 .loc 1 582 19 is_stmt 0 view .LVU3923
- 12428 051c 354A ldr r2, .L763+48
- 12429 051e 1378 ldrb r3, [r2] @ zero_extendqisi2
- 582:Src/main.c **** }
- 12430 .loc 1 582 23 view .LVU3924
- 12431 0520 63F07F03 orn r3, r3, #127
- 12432 0524 1370 strb r3, [r2]
- 12433 0526 9EE7 b .L678
- 12434 .LVL1102:
- 12435 .L658:
- 582:Src/main.c **** }
- 12436 .loc 1 582 23 view .LVU3925
- 12437 .LBE713:
- 12438 .LBE711:
- ARM GAS /tmp/ccLSPxIe.s page 639
-
-
- 594:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
- 12439 .loc 1 594 6 is_stmt 1 view .LVU3926
- 594:Src/main.c **** if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
- 12440 .loc 1 594 20 is_stmt 0 view .LVU3927
- 12441 0528 324B ldr r3, .L763+48
- 12442 052a 0022 movs r2, #0
- 12443 052c 5A70 strb r2, [r3, #1]
- 595:Src/main.c **** {
- 12444 .loc 1 595 6 is_stmt 1 view .LVU3928
- 595:Src/main.c **** {
- 12445 .loc 1 595 10 is_stmt 0 view .LVU3929
- 12446 052e 324C ldr r4, .L763+52
- 12447 0530 0321 movs r1, #3
- 12448 0532 2046 mov r0, r4
- 12449 0534 FFF7FEFF bl CalculateChecksum
- 12450 .LVL1103:
- 595:Src/main.c **** {
- 12451 .loc 1 595 69 discriminator 1 view .LVU3930
- 12452 0538 E388 ldrh r3, [r4, #6]
- 595:Src/main.c **** {
- 12453 .loc 1 595 9 discriminator 1 view .LVU3931
- 12454 053a 9842 cmp r0, r3
- 12455 053c 0CD0 beq .L750
- 608:Src/main.c **** }
- 12456 .loc 1 608 7 is_stmt 1 view .LVU3932
- 608:Src/main.c **** }
- 12457 .loc 1 608 17 is_stmt 0 view .LVU3933
- 12458 053e 2D4A ldr r2, .L763+48
- 12459 0540 1378 ldrb r3, [r2] @ zero_extendqisi2
- 608:Src/main.c **** }
- 12460 .loc 1 608 21 view .LVU3934
- 12461 0542 43F00403 orr r3, r3, #4
- 12462 0546 1370 strb r3, [r2]
- 12463 .L683:
- 610:Src/main.c **** CPU_state = CPU_state_old;
- 12464 .loc 1 610 6 is_stmt 1 view .LVU3935
- 610:Src/main.c **** CPU_state = CPU_state_old;
- 12465 .loc 1 610 32 is_stmt 0 view .LVU3936
- 12466 0548 2C4B ldr r3, .L763+56
- 12467 054a 0122 movs r2, #1
- 12468 054c 1A70 strb r2, [r3]
- 611:Src/main.c **** break;
- 12469 .loc 1 611 6 is_stmt 1 view .LVU3937
- 611:Src/main.c **** break;
- 12470 .loc 1 611 16 is_stmt 0 view .LVU3938
- 12471 054e 274B ldr r3, .L763+40
- 12472 0550 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12473 0552 2B4B ldr r3, .L763+60
- 12474 0554 1A70 strb r2, [r3]
- 612:Src/main.c **** case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
- 12475 .loc 1 612 5 is_stmt 1 view .LVU3939
- 12476 0556 D4E5 b .L652
- 12477 .L750:
- 12478 .LBB714:
- 597:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
- 12479 .loc 1 597 7 view .LVU3940
- 597:Src/main.c **** uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
- ARM GAS /tmp/ccLSPxIe.s page 640
-
-
- 12480 .loc 1 597 16 is_stmt 0 view .LVU3941
- 12481 0558 2088 ldrh r0, [r4]
- 12482 .LVL1104:
- 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
- 12483 .loc 1 598 7 is_stmt 1 view .LVU3942
- 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
- 12484 .loc 1 598 40 is_stmt 0 view .LVU3943
- 12485 055a 6388 ldrh r3, [r4, #2]
- 598:Src/main.c **** uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
- 12486 .loc 1 598 16 view .LVU3944
- 12487 055c C3F30D03 ubfx r3, r3, #0, #14
- 12488 .LVL1105:
- 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
- 12489 .loc 1 599 7 is_stmt 1 view .LVU3945
- 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
- 12490 .loc 1 599 40 is_stmt 0 view .LVU3946
- 12491 0560 A288 ldrh r2, [r4, #4]
- 599:Src/main.c **** uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
- 12492 .loc 1 599 16 view .LVU3947
- 12493 0562 C2F30D02 ubfx r2, r2, #0, #14
- 12494 .LVL1106:
- 600:Src/main.c **** uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
- 12495 .loc 1 600 7 is_stmt 1 view .LVU3948
- 601:Src/main.c **** uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
- 12496 .loc 1 601 7 view .LVU3949
- 602:Src/main.c ****
- 12497 .loc 1 602 7 view .LVU3950
- 604:Src/main.c **** }
- 12498 .loc 1 604 7 view .LVU3951
- 12499 0566 43EA8232 orr r2, r3, r2, lsl #14
- 12500 .LVL1107:
- 604:Src/main.c **** }
- 12501 .loc 1 604 7 is_stmt 0 view .LVU3952
- 12502 056a C0F34001 ubfx r1, r0, #1, #1
- 12503 056e 00F00100 and r0, r0, #1
- 12504 .LVL1108:
- 604:Src/main.c **** }
- 12505 .loc 1 604 7 view .LVU3953
- 12506 0572 FFF7FEFF bl AD9833_Apply
- 12507 .LVL1109:
- 604:Src/main.c **** }
- 12508 .loc 1 604 7 view .LVU3954
- 12509 .LBE714:
- 12510 0576 E7E7 b .L683
- 12511 .LVL1110:
- 12512 .L657:
- 614:Src/main.c **** {
- 12513 .loc 1 614 6 is_stmt 1 view .LVU3955
- 614:Src/main.c **** {
- 12514 .loc 1 614 10 is_stmt 0 view .LVU3956
- 12515 0578 1F4C ldr r4, .L763+52
- 12516 057a 0321 movs r1, #3
- 12517 057c 2046 mov r0, r4
- 12518 057e FFF7FEFF bl CalculateChecksum
- 12519 .LVL1111:
- 614:Src/main.c **** {
- 12520 .loc 1 614 69 discriminator 1 view .LVU3957
- ARM GAS /tmp/ccLSPxIe.s page 641
-
-
- 12521 0582 E388 ldrh r3, [r4, #6]
- 614:Src/main.c **** {
- 12522 .loc 1 614 9 discriminator 1 view .LVU3958
- 12523 0584 9842 cmp r0, r3
- 12524 0586 0CD0 beq .L751
- 649:Src/main.c **** }
- 12525 .loc 1 649 7 is_stmt 1 view .LVU3959
- 649:Src/main.c **** }
- 12526 .loc 1 649 17 is_stmt 0 view .LVU3960
- 12527 0588 1A4A ldr r2, .L763+48
- 12528 058a 1378 ldrb r3, [r2] @ zero_extendqisi2
- 649:Src/main.c **** }
- 12529 .loc 1 649 21 view .LVU3961
- 12530 058c 43F00403 orr r3, r3, #4
- 12531 0590 1370 strb r3, [r2]
- 12532 .L686:
- 651:Src/main.c **** CPU_state = CPU_state_old;
- 12533 .loc 1 651 6 is_stmt 1 view .LVU3962
- 651:Src/main.c **** CPU_state = CPU_state_old;
- 12534 .loc 1 651 32 is_stmt 0 view .LVU3963
- 12535 0592 1A4B ldr r3, .L763+56
- 12536 0594 0122 movs r2, #1
- 12537 0596 1A70 strb r2, [r3]
- 652:Src/main.c **** break;
- 12538 .loc 1 652 6 is_stmt 1 view .LVU3964
- 652:Src/main.c **** break;
- 12539 .loc 1 652 16 is_stmt 0 view .LVU3965
- 12540 0598 144B ldr r3, .L763+40
- 12541 059a 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12542 059c 184B ldr r3, .L763+60
- 12543 059e 1A70 strb r2, [r3]
- 653:Src/main.c **** case STM32_DAC_CMD://13 - Set STM32 internal DAC (PA4)
- 12544 .loc 1 653 5 is_stmt 1 view .LVU3966
- 12545 05a0 AFE5 b .L652
- 12546 .L751:
- 12547 .LBB715:
- 616:Src/main.c **** uint16_t count = COMMAND[1];
- 12548 .loc 1 616 7 view .LVU3967
- 616:Src/main.c **** uint16_t count = COMMAND[1];
- 12549 .loc 1 616 16 is_stmt 0 view .LVU3968
- 12550 05a2 2346 mov r3, r4
- 12551 05a4 2488 ldrh r4, [r4]
- 12552 .LVL1112:
- 617:Src/main.c **** uint16_t pulse_ms = COMMAND[2];
- 12553 .loc 1 617 7 is_stmt 1 view .LVU3969
- 617:Src/main.c **** uint16_t pulse_ms = COMMAND[2];
- 12554 .loc 1 617 16 is_stmt 0 view .LVU3970
- 12555 05a6 5A88 ldrh r2, [r3, #2]
- 12556 .LVL1113:
- 618:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
- 12557 .loc 1 618 7 is_stmt 1 view .LVU3971
- 618:Src/main.c **** uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
- 12558 .loc 1 618 16 is_stmt 0 view .LVU3972
- 12559 05a8 9B88 ldrh r3, [r3, #4]
- 12560 .LVL1114:
- 619:Src/main.c **** uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
- 12561 .loc 1 619 7 is_stmt 1 view .LVU3973
- ARM GAS /tmp/ccLSPxIe.s page 642
-
-
- 620:Src/main.c ****
- 12562 .loc 1 620 7 view .LVU3974
- 620:Src/main.c ****
- 12563 .loc 1 620 15 is_stmt 0 view .LVU3975
- 12564 05aa C4F34001 ubfx r1, r4, #1, #1
- 12565 .LVL1115:
- 622:Src/main.c **** {
- 12566 .loc 1 622 7 is_stmt 1 view .LVU3976
- 622:Src/main.c **** {
- 12567 .loc 1 622 11 is_stmt 0 view .LVU3977
- 12568 05ae 04F00100 and r0, r4, #1
- 622:Src/main.c **** {
- 12569 .loc 1 622 10 view .LVU3978
- 12570 05b2 0C42 tst r4, r1
- 12571 05b4 2AD0 beq .L685
- 624:Src/main.c **** }
- 12572 .loc 1 624 8 is_stmt 1 view .LVU3979
- 624:Src/main.c **** }
- 12573 .loc 1 624 18 is_stmt 0 view .LVU3980
- 12574 05b6 0F4A ldr r2, .L763+48
- 12575 .LVL1116:
- 624:Src/main.c **** }
- 12576 .loc 1 624 18 view .LVU3981
- 12577 05b8 1378 ldrb r3, [r2] @ zero_extendqisi2
- 12578 .LVL1117:
- 624:Src/main.c **** }
- 12579 .loc 1 624 22 view .LVU3982
- 12580 05ba 43F00403 orr r3, r3, #4
- 12581 05be 1370 strb r3, [r2]
- 12582 05c0 E7E7 b .L686
- 12583 .L764:
- 12584 05c2 00BF .align 2
- 12585 .L763:
- 12586 05c4 00000000 .word task
- 12587 05c8 00000000 .word TO7
- 12588 05cc 00000000 .word TO7_before
- 12589 05d0 00000000 .word LD1_param
- 12590 05d4 00000000 .word LD2_param
- 12591 05d8 00000000 .word temp16
- 12592 05dc 00000000 .word Long_Data
- 12593 05e0 00000000 .word TO6
- 12594 05e4 00000000 .word TO6_stop
- 12595 05e8 00000000 .word Curr_setup
- 12596 05ec 00000000 .word CPU_state_old
- 12597 05f0 00000000 .word CS_result
- 12598 05f4 00000000 .word State_Data
- 12599 05f8 00000000 .word COMMAND
- 12600 05fc 00000000 .word UART_transmission_request
- 12601 0600 00000000 .word CPU_state
- 12602 0604 00000000 .word LD1_curr_setup
- 12603 0608 00000000 .word LD2_curr_setup
- 12604 .LVL1118:
- 12605 .L685:
- 628:Src/main.c **** {
- 12606 .loc 1 628 8 is_stmt 1 view .LVU3983
- 628:Src/main.c **** {
- 12607 .loc 1 628 11 is_stmt 0 view .LVU3984
- ARM GAS /tmp/ccLSPxIe.s page 643
-
-
- 12608 060c 1AB1 cbz r2, .L738
- 632:Src/main.c **** {
- 12609 .loc 1 632 8 is_stmt 1 view .LVU3985
- 632:Src/main.c **** {
- 12610 .loc 1 632 11 is_stmt 0 view .LVU3986
- 12611 060e 402A cmp r2, #64
- 12612 0610 02D9 bls .L687
- 634:Src/main.c **** }
- 12613 .loc 1 634 15 view .LVU3987
- 12614 0612 4022 movs r2, #64
- 12615 .LVL1119:
- 634:Src/main.c **** }
- 12616 .loc 1 634 15 view .LVU3988
- 12617 0614 00E0 b .L687
- 12618 .LVL1120:
- 12619 .L738:
- 630:Src/main.c **** }
- 12620 .loc 1 630 15 view .LVU3989
- 12621 0616 0122 movs r2, #1
- 12622 .LVL1121:
- 12623 .L687:
- 636:Src/main.c **** {
- 12624 .loc 1 636 8 is_stmt 1 view .LVU3990
- 636:Src/main.c **** {
- 12625 .loc 1 636 11 is_stmt 0 view .LVU3991
- 12626 0618 2BB1 cbz r3, .L740
- 640:Src/main.c **** {
- 12627 .loc 1 640 8 is_stmt 1 view .LVU3992
- 640:Src/main.c **** {
- 12628 .loc 1 640 11 is_stmt 0 view .LVU3993
- 12629 061a B3F5FA7F cmp r3, #500
- 12630 061e 03D9 bls .L688
- 642:Src/main.c **** }
- 12631 .loc 1 642 18 view .LVU3994
- 12632 0620 4FF4FA73 mov r3, #500
- 12633 .LVL1122:
- 642:Src/main.c **** }
- 12634 .loc 1 642 18 view .LVU3995
- 12635 0624 00E0 b .L688
- 12636 .LVL1123:
- 12637 .L740:
- 638:Src/main.c **** }
- 12638 .loc 1 638 18 view .LVU3996
- 12639 0626 0223 movs r3, #2
- 12640 .LVL1124:
- 12641 .L688:
- 644:Src/main.c **** }
- 12642 .loc 1 644 8 is_stmt 1 view .LVU3997
- 12643 0628 FFF7FEFF bl DS1809_Pulse
- 12644 .LVL1125:
- 644:Src/main.c **** }
- 12645 .loc 1 644 8 is_stmt 0 view .LVU3998
- 12646 062c B1E7 b .L686
- 12647 .LVL1126:
- 12648 .L656:
- 644:Src/main.c **** }
- 12649 .loc 1 644 8 view .LVU3999
- ARM GAS /tmp/ccLSPxIe.s page 644
-
-
- 12650 .LBE715:
- 655:Src/main.c **** {
- 12651 .loc 1 655 6 is_stmt 1 view .LVU4000
- 655:Src/main.c **** {
- 12652 .loc 1 655 10 is_stmt 0 view .LVU4001
- 12653 062e 7C4C ldr r4, .L765
- 12654 0630 0321 movs r1, #3
- 12655 0632 2046 mov r0, r4
- 12656 0634 FFF7FEFF bl CalculateChecksum
- 12657 .LVL1127:
- 655:Src/main.c **** {
- 12658 .loc 1 655 72 discriminator 1 view .LVU4002
- 12659 0638 E388 ldrh r3, [r4, #6]
- 655:Src/main.c **** {
- 12660 .loc 1 655 9 discriminator 1 view .LVU4003
- 12661 063a 9842 cmp r0, r3
- 12662 063c 0CD0 beq .L752
- 664:Src/main.c **** }
- 12663 .loc 1 664 7 is_stmt 1 view .LVU4004
- 664:Src/main.c **** }
- 12664 .loc 1 664 17 is_stmt 0 view .LVU4005
- 12665 063e 794A ldr r2, .L765+4
- 12666 0640 1378 ldrb r3, [r2] @ zero_extendqisi2
- 664:Src/main.c **** }
- 12667 .loc 1 664 21 view .LVU4006
- 12668 0642 43F00403 orr r3, r3, #4
- 12669 0646 1370 strb r3, [r2]
- 12670 .L690:
- 666:Src/main.c **** CPU_state = CPU_state_old;
- 12671 .loc 1 666 6 is_stmt 1 view .LVU4007
- 666:Src/main.c **** CPU_state = CPU_state_old;
- 12672 .loc 1 666 32 is_stmt 0 view .LVU4008
- 12673 0648 774B ldr r3, .L765+8
- 12674 064a 0122 movs r2, #1
- 12675 064c 1A70 strb r2, [r3]
- 667:Src/main.c **** break;
- 12676 .loc 1 667 6 is_stmt 1 view .LVU4009
- 667:Src/main.c **** break;
- 12677 .loc 1 667 16 is_stmt 0 view .LVU4010
- 12678 064e 774B ldr r3, .L765+12
- 12679 0650 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12680 0652 774B ldr r3, .L765+16
- 12681 0654 1A70 strb r2, [r3]
- 668:Src/main.c **** case AD9102_WAVE_CTRL_CMD://14 - Control custom AD9102 SRAM upload
- 12682 .loc 1 668 5 is_stmt 1 view .LVU4011
- 12683 0656 54E5 b .L652
- 12684 .L752:
- 12685 .LBB716:
- 657:Src/main.c **** uint16_t dac_code = (uint16_t)(COMMAND[1] & 0x0FFFu);
- 12686 .loc 1 657 7 view .LVU4012
- 12687 .LVL1128:
- 658:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u;
- 12688 .loc 1 658 7 view .LVU4013
- 658:Src/main.c **** uint8_t enable = (flags & STM32_DAC_FLAG_ENABLE) ? 1u : 0u;
- 12689 .loc 1 658 45 is_stmt 0 view .LVU4014
- 12690 0658 6088 ldrh r0, [r4, #2]
- 12691 .LVL1129:
- ARM GAS /tmp/ccLSPxIe.s page 645
-
-
- 659:Src/main.c **** PA4_DAC_Set(dac_code, enable);
- 12692 .loc 1 659 7 is_stmt 1 view .LVU4015
- 659:Src/main.c **** PA4_DAC_Set(dac_code, enable);
- 12693 .loc 1 659 61 is_stmt 0 view .LVU4016
- 12694 065a 2178 ldrb r1, [r4] @ zero_extendqisi2
- 12695 .LVL1130:
- 660:Src/main.c **** }
- 12696 .loc 1 660 7 is_stmt 1 view .LVU4017
- 12697 065c 01F00101 and r1, r1, #1
- 12698 .LVL1131:
- 660:Src/main.c **** }
- 12699 .loc 1 660 7 is_stmt 0 view .LVU4018
- 12700 0660 C0F30B00 ubfx r0, r0, #0, #12
- 12701 .LVL1132:
- 660:Src/main.c **** }
- 12702 .loc 1 660 7 view .LVU4019
- 12703 0664 FFF7FEFF bl PA4_DAC_Set
- 12704 .LVL1133:
- 660:Src/main.c **** }
- 12705 .loc 1 660 7 view .LVU4020
- 12706 .LBE716:
- 12707 0668 EEE7 b .L690
- 12708 .LVL1134:
- 12709 .L655:
- 670:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS -
- 12710 .loc 1 670 6 is_stmt 1 view .LVU4021
- 670:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_CTRL_WORDS - 1) == COMMAND[AD9102_WAVE_CTRL_WORDS -
- 12711 .loc 1 670 20 is_stmt 0 view .LVU4022
- 12712 066a 6E4B ldr r3, .L765+4
- 12713 066c 0022 movs r2, #0
- 12714 066e 5A70 strb r2, [r3, #1]
- 671:Src/main.c **** {
- 12715 .loc 1 671 6 is_stmt 1 view .LVU4023
- 671:Src/main.c **** {
- 12716 .loc 1 671 10 is_stmt 0 view .LVU4024
- 12717 0670 6B4C ldr r4, .L765
- 12718 0672 0321 movs r1, #3
- 12719 0674 2046 mov r0, r4
- 12720 0676 FFF7FEFF bl CalculateChecksum
- 12721 .LVL1135:
- 671:Src/main.c **** {
- 12722 .loc 1 671 75 discriminator 1 view .LVU4025
- 12723 067a E388 ldrh r3, [r4, #6]
- 671:Src/main.c **** {
- 12724 .loc 1 671 9 discriminator 1 view .LVU4026
- 12725 067c 9842 cmp r0, r3
- 12726 067e 0CD0 beq .L753
- 722:Src/main.c **** }
- 12727 .loc 1 722 7 is_stmt 1 view .LVU4027
- 722:Src/main.c **** }
- 12728 .loc 1 722 17 is_stmt 0 view .LVU4028
- 12729 0680 684A ldr r2, .L765+4
- 12730 0682 1378 ldrb r3, [r2] @ zero_extendqisi2
- 722:Src/main.c **** }
- 12731 .loc 1 722 21 view .LVU4029
- 12732 0684 43F00403 orr r3, r3, #4
- 12733 0688 1370 strb r3, [r2]
- ARM GAS /tmp/ccLSPxIe.s page 646
-
-
- 12734 .L696:
- 724:Src/main.c **** CPU_state = CPU_state_old;
- 12735 .loc 1 724 6 is_stmt 1 view .LVU4030
- 724:Src/main.c **** CPU_state = CPU_state_old;
- 12736 .loc 1 724 32 is_stmt 0 view .LVU4031
- 12737 068a 674B ldr r3, .L765+8
- 12738 068c 0122 movs r2, #1
- 12739 068e 1A70 strb r2, [r3]
- 725:Src/main.c **** break;
- 12740 .loc 1 725 6 is_stmt 1 view .LVU4032
- 725:Src/main.c **** break;
- 12741 .loc 1 725 16 is_stmt 0 view .LVU4033
- 12742 0690 664B ldr r3, .L765+12
- 12743 0692 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12744 0694 664B ldr r3, .L765+16
- 12745 0696 1A70 strb r2, [r3]
- 726:Src/main.c **** case AD9102_WAVE_DATA_CMD://15 - Write custom AD9102 SRAM samples
- 12746 .loc 1 726 5 is_stmt 1 view .LVU4034
- 12747 0698 33E5 b .L652
- 12748 .L753:
- 12749 .LBB717:
- 673:Src/main.c **** uint16_t param0 = COMMAND[1];
- 12750 .loc 1 673 7 view .LVU4035
- 673:Src/main.c **** uint16_t param0 = COMMAND[1];
- 12751 .loc 1 673 16 is_stmt 0 view .LVU4036
- 12752 069a 2288 ldrh r2, [r4]
- 12753 .LVL1136:
- 674:Src/main.c **** uint16_t param1 = COMMAND[2];
- 12754 .loc 1 674 7 is_stmt 1 view .LVU4037
- 674:Src/main.c **** uint16_t param1 = COMMAND[2];
- 12755 .loc 1 674 16 is_stmt 0 view .LVU4038
- 12756 069c 6088 ldrh r0, [r4, #2]
- 12757 .LVL1137:
- 675:Src/main.c ****
- 12758 .loc 1 675 7 is_stmt 1 view .LVU4039
- 675:Src/main.c ****
- 12759 .loc 1 675 16 is_stmt 0 view .LVU4040
- 12760 069e A388 ldrh r3, [r4, #4]
- 12761 .LVL1138:
- 677:Src/main.c **** {
- 12762 .loc 1 677 7 is_stmt 1 view .LVU4041
- 12763 06a0 022A cmp r2, #2
- 12764 06a2 10D0 beq .L692
- 12765 06a4 032A cmp r2, #3
- 12766 06a6 34D0 beq .L693
- 12767 06a8 012A cmp r2, #1
- 12768 06aa 3CD1 bne .L694
- 680:Src/main.c **** {
- 12769 .loc 1 680 9 view .LVU4042
- 680:Src/main.c **** {
- 12770 .loc 1 680 12 is_stmt 0 view .LVU4043
- 12771 06ac 1BB9 cbnz r3, .L695
- 680:Src/main.c **** {
- 12772 .loc 1 680 32 discriminator 1 view .LVU4044
- 12773 06ae FFF7FEFF bl AD9102_BeginWaveUpload
- 12774 .LVL1139:
- 680:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 647
-
-
- 12775 .loc 1 680 28 discriminator 1 view .LVU4045
- 12776 06b2 0028 cmp r0, #0
- 12777 06b4 E9D1 bne .L696
- 12778 .L695:
- 682:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 12779 .loc 1 682 10 is_stmt 1 view .LVU4046
- 12780 06b6 FFF7FEFF bl AD9102_CancelWaveUpload
- 12781 .LVL1140:
- 683:Src/main.c **** }
- 12782 .loc 1 683 10 view .LVU4047
- 683:Src/main.c **** }
- 12783 .loc 1 683 20 is_stmt 0 view .LVU4048
- 12784 06ba 5A4A ldr r2, .L765+4
- 12785 06bc 1378 ldrb r3, [r2] @ zero_extendqisi2
- 683:Src/main.c **** }
- 12786 .loc 1 683 24 view .LVU4049
- 12787 06be 63F07F03 orn r3, r3, #127
- 12788 06c2 1370 strb r3, [r2]
- 12789 06c4 E1E7 b .L696
- 12790 .LVL1141:
- 12791 .L692:
- 12792 .LBB718:
- 688:Src/main.c **** uint8_t ok = 0u;
- 12793 .loc 1 688 9 is_stmt 1 view .LVU4050
- 688:Src/main.c **** uint8_t ok = 0u;
- 12794 .loc 1 688 18 is_stmt 0 view .LVU4051
- 12795 06c6 5B4A ldr r2, .L765+20
- 12796 .LVL1142:
- 688:Src/main.c **** uint8_t ok = 0u;
- 12797 .loc 1 688 18 view .LVU4052
- 12798 06c8 1488 ldrh r4, [r2]
- 12799 .LVL1143:
- 689:Src/main.c **** uint16_t pat_status;
- 12800 .loc 1 689 9 is_stmt 1 view .LVU4053
- 689:Src/main.c **** uint16_t pat_status;
- 12801 .loc 1 689 17 is_stmt 0 view .LVU4054
- 12802 06ca 0022 movs r2, #0
- 12803 06cc 8DF81720 strb r2, [sp, #23]
- 690:Src/main.c ****
- 12804 .loc 1 690 9 is_stmt 1 view .LVU4055
- 692:Src/main.c **** {
- 12805 .loc 1 692 9 view .LVU4056
- 692:Src/main.c **** {
- 12806 .loc 1 692 12 is_stmt 0 view .LVU4057
- 12807 06d0 1843 orrs r0, r0, r3
- 12808 .LVL1144:
- 692:Src/main.c **** {
- 12809 .loc 1 692 12 view .LVU4058
- 12810 06d2 07D0 beq .L697
- 694:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 12811 .loc 1 694 10 is_stmt 1 view .LVU4059
- 12812 06d4 FFF7FEFF bl AD9102_CancelWaveUpload
- 12813 .LVL1145:
- 695:Src/main.c **** break;
- 12814 .loc 1 695 10 view .LVU4060
- 695:Src/main.c **** break;
- 12815 .loc 1 695 20 is_stmt 0 view .LVU4061
- ARM GAS /tmp/ccLSPxIe.s page 648
-
-
- 12816 06d8 524A ldr r2, .L765+4
- 12817 06da 1378 ldrb r3, [r2] @ zero_extendqisi2
- 695:Src/main.c **** break;
- 12818 .loc 1 695 24 view .LVU4062
- 12819 06dc 63F07F03 orn r3, r3, #127
- 12820 06e0 1370 strb r3, [r2]
- 696:Src/main.c **** }
- 12821 .loc 1 696 10 is_stmt 1 view .LVU4063
- 12822 06e2 D2E7 b .L696
- 12823 .LVL1146:
- 12824 .L697:
- 699:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12825 .loc 1 699 9 view .LVU4064
- 699:Src/main.c **** State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
- 12826 .loc 1 699 22 is_stmt 0 view .LVU4065
- 12827 06e4 0DF11700 add r0, sp, #23
- 12828 06e8 FFF7FEFF bl AD9102_CommitWaveUpload
- 12829 .LVL1147:
- 700:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT))
- 12830 .loc 1 700 9 is_stmt 1 view .LVU4066
- 700:Src/main.c **** if ((!ok) || AD9102_CheckFlagsSram(pat_status, 1u, samples, AD9102_SRAM_HOLD_DEFAULT))
- 12831 .loc 1 700 23 is_stmt 0 view .LVU4067
- 12832 06ec 4D4B ldr r3, .L765+4
- 12833 06ee 5870 strb r0, [r3, #1]
- 701:Src/main.c **** {
- 12834 .loc 1 701 9 is_stmt 1 view .LVU4068
- 701:Src/main.c **** {
- 12835 .loc 1 701 14 is_stmt 0 view .LVU4069
- 12836 06f0 9DF81730 ldrb r3, [sp, #23] @ zero_extendqisi2
- 701:Src/main.c **** {
- 12837 .loc 1 701 12 view .LVU4070
- 12838 06f4 2BB9 cbnz r3, .L754
- 12839 .LVL1148:
- 12840 .L698:
- 703:Src/main.c **** }
- 12841 .loc 1 703 10 is_stmt 1 view .LVU4071
- 703:Src/main.c **** }
- 12842 .loc 1 703 20 is_stmt 0 view .LVU4072
- 12843 06f6 4B4A ldr r2, .L765+4
- 12844 06f8 1378 ldrb r3, [r2] @ zero_extendqisi2
- 703:Src/main.c **** }
- 12845 .loc 1 703 24 view .LVU4073
- 12846 06fa 63F07F03 orn r3, r3, #127
- 12847 06fe 1370 strb r3, [r2]
- 12848 .LBE718:
- 706:Src/main.c **** case AD9102_WAVE_OPCODE_CANCEL:
- 12849 .loc 1 706 8 is_stmt 1 view .LVU4074
- 12850 0700 C3E7 b .L696
- 12851 .LVL1149:
- 12852 .L754:
- 12853 .LBB719:
- 701:Src/main.c **** {
- 12854 .loc 1 701 22 is_stmt 0 discriminator 1 view .LVU4075
- 12855 0702 0123 movs r3, #1
- 12856 0704 2246 mov r2, r4
- 12857 0706 1946 mov r1, r3
- 12858 0708 FFF7FEFF bl AD9102_CheckFlagsSram
- ARM GAS /tmp/ccLSPxIe.s page 649
-
-
- 12859 .LVL1150:
- 701:Src/main.c **** {
- 12860 .loc 1 701 19 discriminator 1 view .LVU4076
- 12861 070c 0028 cmp r0, #0
- 12862 070e BCD0 beq .L696
- 12863 0710 F1E7 b .L698
- 12864 .LVL1151:
- 12865 .L693:
- 701:Src/main.c **** {
- 12866 .loc 1 701 19 discriminator 1 view .LVU4077
- 12867 .LBE719:
- 708:Src/main.c **** {
- 12868 .loc 1 708 9 is_stmt 1 view .LVU4078
- 708:Src/main.c **** {
- 12869 .loc 1 708 12 is_stmt 0 view .LVU4079
- 12870 0712 1843 orrs r0, r0, r3
- 12871 .LVL1152:
- 708:Src/main.c **** {
- 12872 .loc 1 708 12 view .LVU4080
- 12873 0714 04D0 beq .L700
- 710:Src/main.c **** }
- 12874 .loc 1 710 10 is_stmt 1 view .LVU4081
- 710:Src/main.c **** }
- 12875 .loc 1 710 20 is_stmt 0 view .LVU4082
- 12876 0716 434A ldr r2, .L765+4
- 12877 .LVL1153:
- 710:Src/main.c **** }
- 12878 .loc 1 710 20 view .LVU4083
- 12879 0718 1378 ldrb r3, [r2] @ zero_extendqisi2
- 12880 .LVL1154:
- 710:Src/main.c **** }
- 12881 .loc 1 710 24 view .LVU4084
- 12882 071a 63F07F03 orn r3, r3, #127
- 12883 071e 1370 strb r3, [r2]
- 12884 .L700:
- 712:Src/main.c **** break;
- 12885 .loc 1 712 9 is_stmt 1 view .LVU4085
- 12886 0720 FFF7FEFF bl AD9102_CancelWaveUpload
- 12887 .LVL1155:
- 713:Src/main.c **** default:
- 12888 .loc 1 713 8 view .LVU4086
- 12889 0724 B1E7 b .L696
- 12890 .LVL1156:
- 12891 .L694:
- 715:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 12892 .loc 1 715 9 view .LVU4087
- 12893 0726 FFF7FEFF bl AD9102_CancelWaveUpload
- 12894 .LVL1157:
- 716:Src/main.c **** break;
- 12895 .loc 1 716 9 view .LVU4088
- 716:Src/main.c **** break;
- 12896 .loc 1 716 19 is_stmt 0 view .LVU4089
- 12897 072a 3E4A ldr r2, .L765+4
- 12898 072c 1378 ldrb r3, [r2] @ zero_extendqisi2
- 716:Src/main.c **** break;
- 12899 .loc 1 716 23 view .LVU4090
- 12900 072e 63F07F03 orn r3, r3, #127
- ARM GAS /tmp/ccLSPxIe.s page 650
-
-
- 12901 0732 1370 strb r3, [r2]
- 717:Src/main.c **** }
- 12902 .loc 1 717 8 is_stmt 1 view .LVU4091
- 12903 0734 A9E7 b .L696
- 12904 .LVL1158:
- 12905 .L653:
- 717:Src/main.c **** }
- 12906 .loc 1 717 8 is_stmt 0 view .LVU4092
- 12907 .LBE717:
- 728:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS -
- 12908 .loc 1 728 6 is_stmt 1 view .LVU4093
- 728:Src/main.c **** if (CalculateChecksum(COMMAND, AD9102_WAVE_DATA_WORDS - 1) == COMMAND[AD9102_WAVE_DATA_WORDS -
- 12909 .loc 1 728 20 is_stmt 0 view .LVU4094
- 12910 0736 3B4B ldr r3, .L765+4
- 12911 0738 0022 movs r2, #0
- 12912 073a 5A70 strb r2, [r3, #1]
- 729:Src/main.c **** {
- 12913 .loc 1 729 6 is_stmt 1 view .LVU4095
- 729:Src/main.c **** {
- 12914 .loc 1 729 10 is_stmt 0 view .LVU4096
- 12915 073c 384C ldr r4, .L765
- 12916 073e 0D21 movs r1, #13
- 12917 0740 2046 mov r0, r4
- 12918 0742 FFF7FEFF bl CalculateChecksum
- 12919 .LVL1159:
- 729:Src/main.c **** {
- 12920 .loc 1 729 75 discriminator 1 view .LVU4097
- 12921 0746 638B ldrh r3, [r4, #26]
- 729:Src/main.c **** {
- 12922 .loc 1 729 9 discriminator 1 view .LVU4098
- 12923 0748 9842 cmp r0, r3
- 12924 074a 0ED0 beq .L755
- 740:Src/main.c **** State_Data[0] |= UART_DECODE_ERR;
- 12925 .loc 1 740 7 is_stmt 1 view .LVU4099
- 12926 074c FFF7FEFF bl AD9102_CancelWaveUpload
- 12927 .LVL1160:
- 741:Src/main.c **** }
- 12928 .loc 1 741 7 view .LVU4100
- 741:Src/main.c **** }
- 12929 .loc 1 741 17 is_stmt 0 view .LVU4101
- 12930 0750 344A ldr r2, .L765+4
- 12931 0752 1378 ldrb r3, [r2] @ zero_extendqisi2
- 741:Src/main.c **** }
- 12932 .loc 1 741 21 view .LVU4102
- 12933 0754 43F00403 orr r3, r3, #4
- 12934 0758 1370 strb r3, [r2]
- 12935 .L702:
- 743:Src/main.c **** CPU_state = CPU_state_old;
- 12936 .loc 1 743 6 is_stmt 1 view .LVU4103
- 743:Src/main.c **** CPU_state = CPU_state_old;
- 12937 .loc 1 743 32 is_stmt 0 view .LVU4104
- 12938 075a 334B ldr r3, .L765+8
- 12939 075c 0122 movs r2, #1
- 12940 075e 1A70 strb r2, [r3]
- 744:Src/main.c **** break;
- 12941 .loc 1 744 6 is_stmt 1 view .LVU4105
- 744:Src/main.c **** break;
- ARM GAS /tmp/ccLSPxIe.s page 651
-
-
- 12942 .loc 1 744 16 is_stmt 0 view .LVU4106
- 12943 0760 324B ldr r3, .L765+12
- 12944 0762 1A78 ldrb r2, [r3] @ zero_extendqisi2
- 12945 0764 324B ldr r3, .L765+16
- 12946 0766 1A70 strb r2, [r3]
- 745:Src/main.c **** case DECODE_TASK:
- 12947 .loc 1 745 5 is_stmt 1 view .LVU4107
- 12948 0768 CBE4 b .L652
- 12949 .L755:
- 12950 .LBB720:
- 731:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count))
- 12951 .loc 1 731 7 view .LVU4108
- 731:Src/main.c **** if (!AD9102_WriteWaveUploadChunk(&COMMAND[1], chunk_count))
- 12952 .loc 1 731 16 is_stmt 0 view .LVU4109
- 12953 076a 2046 mov r0, r4
- 12954 .LVL1161:
- 732:Src/main.c **** {
- 12955 .loc 1 732 7 is_stmt 1 view .LVU4110
- 732:Src/main.c **** {
- 12956 .loc 1 732 12 is_stmt 0 view .LVU4111
- 12957 076c 30F8021B ldrh r1, [r0], #2
- 12958 0770 FFF7FEFF bl AD9102_WriteWaveUploadChunk
- 12959 .LVL1162:
- 732:Src/main.c **** {
- 12960 .loc 1 732 10 discriminator 1 view .LVU4112
- 12961 0774 0028 cmp r0, #0
- 12962 0776 F0D1 bne .L702
- 734:Src/main.c **** State_Data[0] |= AD9102_ERR;
- 12963 .loc 1 734 8 is_stmt 1 view .LVU4113
- 12964 0778 FFF7FEFF bl AD9102_CancelWaveUpload
- 12965 .LVL1163:
- 735:Src/main.c **** }
- 12966 .loc 1 735 8 view .LVU4114
- 735:Src/main.c **** }
- 12967 .loc 1 735 18 is_stmt 0 view .LVU4115
- 12968 077c 294A ldr r2, .L765+4
- 12969 077e 1378 ldrb r3, [r2] @ zero_extendqisi2
- 735:Src/main.c **** }
- 12970 .loc 1 735 22 view .LVU4116
- 12971 0780 63F07F03 orn r3, r3, #127
- 12972 0784 1370 strb r3, [r2]
- 12973 0786 E8E7 b .L702
- 12974 .LVL1164:
- 12975 .L661:
- 735:Src/main.c **** }
- 12976 .loc 1 735 22 view .LVU4117
- 12977 .LBE720:
- 747:Src/main.c **** {
- 12978 .loc 1 747 6 is_stmt 1 view .LVU4118
- 747:Src/main.c **** {
- 12979 .loc 1 747 10 is_stmt 0 view .LVU4119
- 12980 0788 2548 ldr r0, .L765
- 12981 078a FFF7FEFF bl CheckChecksum
- 12982 .LVL1165:
- 747:Src/main.c **** {
- 12983 .loc 1 747 9 discriminator 1 view .LVU4120
- 12984 078e 70B9 cbnz r0, .L756
- ARM GAS /tmp/ccLSPxIe.s page 652
-
-
- 756:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 12985 .loc 1 756 7 is_stmt 1 view .LVU4121
- 756:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 12986 .loc 1 756 17 is_stmt 0 view .LVU4122
- 12987 0790 244A ldr r2, .L765+4
- 12988 0792 1378 ldrb r3, [r2] @ zero_extendqisi2
- 756:Src/main.c **** CPU_state = DEFAULT_ENABLE;
- 12989 .loc 1 756 21 view .LVU4123
- 12990 0794 43F00403 orr r3, r3, #4
- 12991 0798 1370 strb r3, [r2]
- 757:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 12992 .loc 1 757 7 is_stmt 1 view .LVU4124
- 757:Src/main.c **** CPU_state_old = HALT;//Save main current cycle
- 12993 .loc 1 757 17 is_stmt 0 view .LVU4125
- 12994 079a 254B ldr r3, .L765+16
- 12995 079c 0222 movs r2, #2
- 12996 079e 1A70 strb r2, [r3]
- 758:Src/main.c **** }
- 12997 .loc 1 758 7 is_stmt 1 view .LVU4126
- 758:Src/main.c **** }
- 12998 .loc 1 758 21 is_stmt 0 view .LVU4127
- 12999 07a0 224B ldr r3, .L765+12
- 13000 07a2 0022 movs r2, #0
- 13001 07a4 1A70 strb r2, [r3]
- 13002 .L704:
- 760:Src/main.c **** break;
- 13003 .loc 1 760 6 is_stmt 1 view .LVU4128
- 760:Src/main.c **** break;
- 13004 .loc 1 760 32 is_stmt 0 view .LVU4129
- 13005 07a6 204B ldr r3, .L765+8
- 13006 07a8 0122 movs r2, #1
- 13007 07aa 1A70 strb r2, [r3]
- 761:Src/main.c **** case RUN_TASK:
- 13008 .loc 1 761 5 is_stmt 1 view .LVU4130
- 13009 07ac A9E4 b .L652
- 13010 .L756:
- 749:Src/main.c **** TO6_before = TO6;
- 13011 .loc 1 749 7 view .LVU4131
- 13012 07ae 224B ldr r3, .L765+24
- 13013 07b0 224A ldr r2, .L765+28
- 13014 07b2 2349 ldr r1, .L765+32
- 13015 07b4 1A48 ldr r0, .L765
- 13016 07b6 FFF7FEFF bl Decode_task
- 13017 .LVL1166:
- 750:Src/main.c **** CPU_state = RUN_TASK;
- 13018 .loc 1 750 7 view .LVU4132
- 750:Src/main.c **** CPU_state = RUN_TASK;
- 13019 .loc 1 750 18 is_stmt 0 view .LVU4133
- 13020 07ba 224B ldr r3, .L765+36
- 13021 07bc 1A68 ldr r2, [r3]
- 13022 07be 224B ldr r3, .L765+40
- 13023 07c0 1A60 str r2, [r3]
- 751:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle
- 13024 .loc 1 751 7 is_stmt 1 view .LVU4134
- 751:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle
- 13025 .loc 1 751 17 is_stmt 0 view .LVU4135
- 13026 07c2 0923 movs r3, #9
- ARM GAS /tmp/ccLSPxIe.s page 653
-
-
- 13027 07c4 1A4A ldr r2, .L765+16
- 13028 07c6 1370 strb r3, [r2]
- 752:Src/main.c **** }
- 13029 .loc 1 752 7 is_stmt 1 view .LVU4136
- 752:Src/main.c **** }
- 13030 .loc 1 752 21 is_stmt 0 view .LVU4137
- 13031 07c8 184A ldr r2, .L765+12
- 13032 07ca 1370 strb r3, [r2]
- 13033 07cc EBE7 b .L704
- 13034 .L660:
- 763:Src/main.c **** {
- 13035 .loc 1 763 6 is_stmt 1 view .LVU4138
- 763:Src/main.c **** {
- 13036 .loc 1 763 18 is_stmt 0 view .LVU4139
- 13037 07ce 1F4B ldr r3, .L765+44
- 13038 07d0 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 13039 07d2 012B cmp r3, #1
- 13040 07d4 4AD0 beq .L705
- 13041 07d6 022B cmp r3, #2
- 13042 07d8 00F02D81 beq .L706
- 13043 .L707:
-1018:Src/main.c **** {
- 13044 .loc 1 1018 6 is_stmt 1 view .LVU4140
-1018:Src/main.c **** {
- 13045 .loc 1 1018 13 is_stmt 0 view .LVU4141
- 13046 07dc 1C4B ldr r3, .L765+48
- 13047 07de 1B68 ldr r3, [r3]
- 13048 07e0 1C4A ldr r2, .L765+52
- 13049 07e2 1268 ldr r2, [r2]
-1018:Src/main.c **** {
- 13050 .loc 1 1018 9 view .LVU4142
- 13051 07e4 9342 cmp r3, r2
- 13052 07e6 00F2FE81 bhi .L757
- 13053 .L724:
-1070:Src/main.c ****
- 13054 .loc 1 1070 13 is_stmt 1 discriminator 1 view .LVU4143
- 13055 07ea 1B4B ldr r3, .L765+56
- 13056 07ec 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 13057 07ee 002B cmp r3, #0
- 13058 07f0 FBD0 beq .L724
-1072:Src/main.c ****
- 13059 .loc 1 1072 6 view .LVU4144
- 13060 07f2 FFF7FEFF bl Stop_TIM10
- 13061 .LVL1167:
-1074:Src/main.c **** {
- 13062 .loc 1 1074 6 view .LVU4145
-1074:Src/main.c **** {
- 13063 .loc 1 1074 14 is_stmt 0 view .LVU4146
- 13064 07f6 154B ldr r3, .L765+44
- 13065 07f8 DB8A ldrh r3, [r3, #22]
-1074:Src/main.c **** {
- 13066 .loc 1 1074 9 view .LVU4147
- 13067 07fa 032B cmp r3, #3
- 13068 07fc 0BD9 bls .L725
-1076:Src/main.c **** TO10_counter = task.dt / 10;
- 13069 .loc 1 1076 7 is_stmt 1 view .LVU4148
-1076:Src/main.c **** TO10_counter = task.dt / 10;
- ARM GAS /tmp/ccLSPxIe.s page 654
-
-
- 13070 .loc 1 1076 26 is_stmt 0 view .LVU4149
- 13071 07fe 174B ldr r3, .L765+60
- 13072 0800 1A68 ldr r2, [r3]
- 13073 0802 174B ldr r3, .L765+64
- 13074 0804 DA60 str r2, [r3, #12]
-1077:Src/main.c **** }
- 13075 .loc 1 1077 7 is_stmt 1 view .LVU4150
-1077:Src/main.c **** }
- 13076 .loc 1 1077 26 is_stmt 0 view .LVU4151
- 13077 0806 114B ldr r3, .L765+44
- 13078 0808 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2
-1077:Src/main.c **** }
- 13079 .loc 1 1077 30 view .LVU4152
- 13080 080a 164A ldr r2, .L765+68
- 13081 080c A2FB0323 umull r2, r3, r2, r3
- 13082 0810 DB08 lsrs r3, r3, #3
-1077:Src/main.c **** }
- 13083 .loc 1 1077 20 view .LVU4153
- 13084 0812 154A ldr r2, .L765+72
- 13085 0814 1360 str r3, [r2]
- 13086 .L725:
-1080:Src/main.c **** break;
- 13087 .loc 1 1080 6 is_stmt 1 view .LVU4154
-1080:Src/main.c **** break;
- 13088 .loc 1 1080 20 is_stmt 0 view .LVU4155
- 13089 0816 054B ldr r3, .L765+12
- 13090 0818 0922 movs r2, #9
- 13091 081a 1A70 strb r2, [r3]
-1081:Src/main.c **** }
- 13092 .loc 1 1081 9 is_stmt 1 view .LVU4156
- 13093 081c 71E4 b .L652
- 13094 .L766:
- 13095 081e 00BF .align 2
- 13096 .L765:
- 13097 0820 00000000 .word COMMAND
- 13098 0824 00000000 .word State_Data
- 13099 0828 00000000 .word UART_transmission_request
- 13100 082c 00000000 .word CPU_state_old
- 13101 0830 00000000 .word CPU_state
- 13102 0834 00000000 .word ad9102_wave_expected_samples
- 13103 0838 00000000 .word Curr_setup
- 13104 083c 00000000 .word LD2_curr_setup
- 13105 0840 00000000 .word LD1_curr_setup
- 13106 0844 00000000 .word TO6
- 13107 0848 00000000 .word TO6_before
- 13108 084c 00000000 .word task
- 13109 0850 00000000 .word TO7
- 13110 0854 00000000 .word TO7_before
- 13111 0858 00000000 .word TIM10_coflag
- 13112 085c 00000000 .word TIM10_period
- 13113 0860 00000000 .word htim10
- 13114 0864 CDCCCCCC .word -858993459
- 13115 0868 00000000 .word TO10_counter
- 13116 .L705:
- 13117 .LBB721:
- 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13118 .loc 1 785 7 view .LVU4157
- ARM GAS /tmp/ccLSPxIe.s page 655
-
-
- 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13119 .loc 1 785 38 is_stmt 0 view .LVU4158
- 13120 086c AD4B ldr r3, .L767
- 13121 086e D3ED077A vldr.32 s15, [r3, #28]
- 785:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13122 .loc 1 785 7 view .LVU4159
- 13123 0872 FCEEE77A vcvt.u32.f32 s15, s15
- 13124 0876 17EE903A vmov r3, s15 @ int
- 13125 087a 99B2 uxth r1, r3
- 13126 087c 0220 movs r0, #2
- 13127 087e FFF7FEFF bl Set_LTEC
- 13128 .LVL1168:
- 786:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 13129 .loc 1 786 7 is_stmt 1 view .LVU4160
- 786:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 13130 .loc 1 786 14 is_stmt 0 view .LVU4161
- 13131 0882 0320 movs r0, #3
- 13132 0884 FFF7FEFF bl MPhD_T
- 13133 .LVL1169:
- 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13134 .loc 1 787 7 is_stmt 1 view .LVU4162
- 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13135 .loc 1 787 32 is_stmt 0 view .LVU4163
- 13136 0888 0320 movs r0, #3
- 13137 088a FFF7FEFF bl MPhD_T
- 13138 .LVL1170:
- 787:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13139 .loc 1 787 30 discriminator 1 view .LVU4164
- 13140 088e A64C ldr r4, .L767+4
- 13141 0890 2080 strh r0, [r4] @ movhi
- 788:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 13142 .loc 1 788 7 is_stmt 1 view .LVU4165
- 788:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 13143 .loc 1 788 14 is_stmt 0 view .LVU4166
- 13144 0892 0420 movs r0, #4
- 13145 0894 FFF7FEFF bl MPhD_T
- 13146 .LVL1171:
- 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13147 .loc 1 789 7 is_stmt 1 view .LVU4167
- 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13148 .loc 1 789 32 is_stmt 0 view .LVU4168
- 13149 0898 0420 movs r0, #4
- 13150 089a FFF7FEFF bl MPhD_T
- 13151 .LVL1172:
- 789:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13152 .loc 1 789 30 discriminator 1 view .LVU4169
- 13153 089e A34D ldr r5, .L767+8
- 13154 08a0 2880 strh r0, [r5] @ movhi
- 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13155 .loc 1 790 7 is_stmt 1 view .LVU4170
- 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13156 .loc 1 790 14 is_stmt 0 view .LVU4171
- 13157 08a2 0122 movs r2, #1
- 13158 08a4 2146 mov r1, r4
- 13159 08a6 A248 ldr r0, .L767+12
- 13160 08a8 FFF7FEFF bl PID_Controller_Temp
- 13161 .LVL1173:
- ARM GAS /tmp/ccLSPxIe.s page 656
-
-
- 13162 08ac 0146 mov r1, r0
- 790:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13163 .loc 1 790 13 discriminator 1 view .LVU4172
- 13164 08ae A14C ldr r4, .L767+16
- 13165 08b0 2080 strh r0, [r4] @ movhi
- 791:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 13166 .loc 1 791 7 is_stmt 1 view .LVU4173
- 13167 08b2 0320 movs r0, #3
- 13168 08b4 FFF7FEFF bl Set_LTEC
- 13169 .LVL1174:
- 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13170 .loc 1 792 7 view .LVU4174
- 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13171 .loc 1 792 14 is_stmt 0 view .LVU4175
- 13172 08b8 0222 movs r2, #2
- 13173 08ba 2946 mov r1, r5
- 13174 08bc 9E48 ldr r0, .L767+20
- 13175 08be FFF7FEFF bl PID_Controller_Temp
- 13176 .LVL1175:
- 13177 08c2 0146 mov r1, r0
- 792:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13178 .loc 1 792 13 discriminator 1 view .LVU4176
- 13179 08c4 2080 strh r0, [r4] @ movhi
- 793:Src/main.c ****
- 13180 .loc 1 793 7 is_stmt 1 view .LVU4177
- 13181 08c6 0420 movs r0, #4
- 13182 08c8 FFF7FEFF bl Set_LTEC
- 13183 .LVL1176:
- 796:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13184 .loc 1 796 7 view .LVU4178
- 13185 08cc 9B4C ldr r4, .L767+24
- 13186 08ce 0122 movs r2, #1
- 13187 08d0 8021 movs r1, #128
- 13188 08d2 2046 mov r0, r4
- 13189 08d4 FFF7FEFF bl HAL_GPIO_WritePin
- 13190 .LVL1177:
- 797:Src/main.c ****
- 13191 .loc 1 797 7 view .LVU4179
- 13192 08d8 0022 movs r2, #0
- 13193 08da 8021 movs r1, #128
- 13194 08dc 2046 mov r0, r4
- 13195 08de FFF7FEFF bl HAL_GPIO_WritePin
- 13196 .LVL1178:
- 799:Src/main.c **** if (st != HAL_OK)
- 13197 .loc 1 799 7 view .LVU4180
- 799:Src/main.c **** if (st != HAL_OK)
- 13198 .loc 1 799 12 is_stmt 0 view .LVU4181
- 13199 08e2 9748 ldr r0, .L767+28
- 13200 08e4 FFF7FEFF bl HAL_TIM_Base_Start_IT
- 13201 .LVL1179:
- 800:Src/main.c **** while(1);
- 13202 .loc 1 800 7 is_stmt 1 view .LVU4182
- 800:Src/main.c **** while(1);
- 13203 .loc 1 800 10 is_stmt 0 view .LVU4183
- 13204 08e8 0028 cmp r0, #0
- 13205 08ea 75D1 bne .L709
- 803:Src/main.c **** uint16_t trigger_counter = 0;
- ARM GAS /tmp/ccLSPxIe.s page 657
-
-
- 13206 .loc 1 803 7 is_stmt 1 view .LVU4184
- 13207 .LVL1180:
- 804:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 13208 .loc 1 804 7 view .LVU4185
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13209 .loc 1 805 7 view .LVU4186
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13210 .loc 1 805 47 is_stmt 0 view .LVU4187
- 13211 08ec 8D4B ldr r3, .L767
- 13212 08ee 93ED027A vldr.32 s14, [r3, #8]
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13213 .loc 1 805 64 view .LVU4188
- 13214 08f2 D3ED047A vldr.32 s15, [r3, #16]
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13215 .loc 1 805 58 view .LVU4189
- 13216 08f6 37EE677A vsub.f32 s14, s14, s15
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13217 .loc 1 805 84 view .LVU4190
- 13218 08fa D3ED036A vldr.32 s13, [r3, #12]
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13219 .loc 1 805 79 view .LVU4191
- 13220 08fe C7EE267A vdiv.f32 s15, s14, s13
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13221 .loc 1 805 97 view .LVU4192
- 13222 0902 B2EE047A vmov.f32 s14, #1.0e+1
- 13223 0906 67EE877A vmul.f32 s15, s15, s14
- 805:Src/main.c **** uint16_t task_sheduler = 0;
- 13224 .loc 1 805 31 view .LVU4193
- 13225 090a FCEEE77A vcvt.u32.f32 s15, s15
- 13226 090e CDED037A vstr.32 s15, [sp, #12] @ int
- 13227 0912 9DF80C60 ldrb r6, [sp, #12] @ zero_extendqisi2
- 13228 .LVL1181:
- 806:Src/main.c ****
- 13229 .loc 1 806 7 is_stmt 1 view .LVU4194
- 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 13230 .loc 1 810 7 view .LVU4195
- 13231 0916 DFF85492 ldr r9, .L767+72
- 13232 091a 0021 movs r1, #0
- 13233 091c 4846 mov r0, r9
- 13234 .LVL1182:
- 810:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock
- 13235 .loc 1 810 7 is_stmt 0 view .LVU4196
- 13236 091e FFF7FEFF bl HAL_TIM_PWM_Stop
- 13237 .LVL1183:
- 811:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 13238 .loc 1 811 7 is_stmt 1 view .LVU4197
- 13239 0922 DFF84C82 ldr r8, .L767+76
- 13240 0926 0821 movs r1, #8
- 13241 0928 4046 mov r0, r8
- 13242 092a FFF7FEFF bl HAL_TIM_PWM_Stop
- 13243 .LVL1184:
- 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 13244 .loc 1 812 7 view .LVU4198
- 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 13245 .loc 1 812 13 is_stmt 0 view .LVU4199
- 13246 092e 854F ldr r7, .L767+32
- 13247 0930 3B68 ldr r3, [r7]
- ARM GAS /tmp/ccLSPxIe.s page 658
-
-
- 812:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode
- 13248 .loc 1 812 20 view .LVU4200
- 13249 0932 23F00803 bic r3, r3, #8
- 13250 0936 3B60 str r3, [r7]
- 813:Src/main.c ****
- 13251 .loc 1 813 7 is_stmt 1 view .LVU4201
- 813:Src/main.c ****
- 13252 .loc 1 813 12 is_stmt 0 view .LVU4202
- 13253 0938 834D ldr r5, .L767+36
- 13254 093a 2B68 ldr r3, [r5]
- 813:Src/main.c ****
- 13255 .loc 1 813 19 view .LVU4203
- 13256 093c 23F00803 bic r3, r3, #8
- 13257 0940 2B60 str r3, [r5]
- 817:Src/main.c **** TIM4 -> CNT = 0;
- 13258 .loc 1 817 7 is_stmt 1 view .LVU4204
- 817:Src/main.c **** TIM4 -> CNT = 0;
- 13259 .loc 1 817 20 is_stmt 0 view .LVU4205
- 13260 0942 0024 movs r4, #0
- 13261 0944 7C62 str r4, [r7, #36]
- 818:Src/main.c ****
- 13262 .loc 1 818 7 is_stmt 1 view .LVU4206
- 818:Src/main.c ****
- 13263 .loc 1 818 19 is_stmt 0 view .LVU4207
- 13264 0946 6C62 str r4, [r5, #36]
- 820:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock
- 13265 .loc 1 820 7 is_stmt 1 view .LVU4208
- 13266 0948 2146 mov r1, r4
- 13267 094a 4846 mov r0, r9
- 13268 094c FFF7FEFF bl HAL_TIM_PWM_Start
- 13269 .LVL1185:
- 821:Src/main.c **** //TIM4 -> CNT = 0;
- 13270 .loc 1 821 7 view .LVU4209
- 13271 0950 0821 movs r1, #8
- 13272 0952 4046 mov r0, r8
- 13273 0954 FFF7FEFF bl HAL_TIM_PWM_Start
- 13274 .LVL1186:
- 824:Src/main.c **** TIM11 -> CNT = 0;
- 13275 .loc 1 824 7 view .LVU4210
- 824:Src/main.c **** TIM11 -> CNT = 0;
- 13276 .loc 1 824 26 is_stmt 0 view .LVU4211
- 13277 0958 EB6A ldr r3, [r5, #44]
- 824:Src/main.c **** TIM11 -> CNT = 0;
- 13278 .loc 1 824 33 view .LVU4212
- 13279 095a 143B subs r3, r3, #20
- 824:Src/main.c **** TIM11 -> CNT = 0;
- 13280 .loc 1 824 19 view .LVU4213
- 13281 095c 6B62 str r3, [r5, #36]
- 825:Src/main.c ****
- 13282 .loc 1 825 7 is_stmt 1 view .LVU4214
- 825:Src/main.c ****
- 13283 .loc 1 825 20 is_stmt 0 view .LVU4215
- 13284 095e 7C62 str r4, [r7, #36]
- 828:Src/main.c **** {
- 13285 .loc 1 828 7 is_stmt 1 view .LVU4216
- 804:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1
- 13286 .loc 1 804 16 is_stmt 0 view .LVU4217
- ARM GAS /tmp/ccLSPxIe.s page 659
-
-
- 13287 0960 2546 mov r5, r4
- 13288 .LVL1187:
- 13289 .L711:
- 828:Src/main.c **** {
- 13290 .loc 1 828 33 is_stmt 1 view .LVU4218
- 828:Src/main.c **** {
- 13291 .loc 1 828 18 is_stmt 0 view .LVU4219
- 13292 0962 704B ldr r3, .L767
- 13293 0964 D3ED047A vldr.32 s15, [r3, #16]
- 828:Src/main.c **** {
- 13294 .loc 1 828 39 view .LVU4220
- 13295 0968 93ED027A vldr.32 s14, [r3, #8]
- 828:Src/main.c **** {
- 13296 .loc 1 828 33 view .LVU4221
- 13297 096c F4EEC77A vcmpe.f32 s15, s14
- 13298 0970 F1EE10FA vmrs APSR_nzcv, FPSCR
- 13299 0974 37D5 bpl .L758
- 830:Src/main.c **** {
- 13300 .loc 1 830 8 is_stmt 1 view .LVU4222
- 830:Src/main.c **** {
- 13301 .loc 1 830 12 is_stmt 0 view .LVU4223
- 13302 0976 754B ldr r3, .L767+40
- 13303 0978 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 830:Src/main.c **** {
- 13304 .loc 1 830 11 view .LVU4224
- 13305 097a 002B cmp r3, #0
- 13306 097c F1D0 beq .L711
- 832:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase
- 13307 .loc 1 832 9 is_stmt 1 view .LVU4225
- 13308 097e FCEEE77A vcvt.u32.f32 s15, s15
- 13309 0982 17EE903A vmov r3, s15 @ int
- 13310 0986 99B2 uxth r1, r3
- 13311 0988 0120 movs r0, #1
- 13312 098a FFF7FEFF bl Set_LTEC
- 13313 .LVL1188:
- 835:Src/main.c **** TO10 = 0;
- 13314 .loc 1 835 9 view .LVU4226
- 835:Src/main.c **** TO10 = 0;
- 13315 .loc 1 835 13 is_stmt 0 view .LVU4227
- 13316 098e 654B ldr r3, .L767
- 13317 0990 D3ED047A vldr.32 s15, [r3, #16]
- 835:Src/main.c **** TO10 = 0;
- 13318 .loc 1 835 35 view .LVU4228
- 13319 0994 93ED037A vldr.32 s14, [r3, #12]
- 835:Src/main.c **** TO10 = 0;
- 13320 .loc 1 835 28 view .LVU4229
- 13321 0998 77EE877A vadd.f32 s15, s15, s14
- 13322 099c C3ED047A vstr.32 s15, [r3, #16]
- 836:Src/main.c **** TIM10_coflag = 0;
- 13323 .loc 1 836 9 is_stmt 1 view .LVU4230
- 836:Src/main.c **** TIM10_coflag = 0;
- 13324 .loc 1 836 14 is_stmt 0 view .LVU4231
- 13325 09a0 0027 movs r7, #0
- 13326 09a2 6B4B ldr r3, .L767+44
- 13327 09a4 1F60 str r7, [r3]
- 837:Src/main.c ****
- 13328 .loc 1 837 9 is_stmt 1 view .LVU4232
- ARM GAS /tmp/ccLSPxIe.s page 660
-
-
- 837:Src/main.c ****
- 13329 .loc 1 837 22 is_stmt 0 view .LVU4233
- 13330 09a6 694B ldr r3, .L767+40
- 13331 09a8 1F70 strb r7, [r3]
- 839:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
- 13332 .loc 1 839 9 is_stmt 1 view .LVU4234
- 13333 09aa DFF8C881 ldr r8, .L767+80
- 13334 09ae 0122 movs r2, #1
- 13335 09b0 4FF40071 mov r1, #512
- 13336 09b4 4046 mov r0, r8
- 13337 09b6 FFF7FEFF bl HAL_GPIO_WritePin
- 13338 .LVL1189:
- 840:Src/main.c **** //*
- 13339 .loc 1 840 9 view .LVU4235
- 13340 09ba 3A46 mov r2, r7
- 13341 09bc 4FF40071 mov r1, #512
- 13342 09c0 4046 mov r0, r8
- 13343 09c2 FFF7FEFF bl HAL_GPIO_WritePin
- 13344 .LVL1190:
- 842:Src/main.c **** OUT_trigger(trigger_counter);
- 13345 .loc 1 842 9 view .LVU4236
- 842:Src/main.c **** OUT_trigger(trigger_counter);
- 13346 .loc 1 842 41 is_stmt 0 view .LVU4237
- 13347 09c6 B4FBF6F3 udiv r3, r4, r6
- 13348 09ca 06FB1343 mls r3, r6, r3, r4
- 13349 09ce 9BB2 uxth r3, r3
- 842:Src/main.c **** OUT_trigger(trigger_counter);
- 13350 .loc 1 842 12 view .LVU4238
- 13351 09d0 1BB1 cbz r3, .L759
- 13352 .L712:
- 846:Src/main.c **** //*/
- 13353 .loc 1 846 9 is_stmt 1 view .LVU4239
- 13354 09d2 0134 adds r4, r4, #1
- 13355 .LVL1191:
- 846:Src/main.c **** //*/
- 13356 .loc 1 846 9 is_stmt 0 view .LVU4240
- 13357 09d4 A4B2 uxth r4, r4
- 13358 .LVL1192:
- 846:Src/main.c **** //*/
- 13359 .loc 1 846 9 view .LVU4241
- 13360 09d6 C4E7 b .L711
- 13361 .LVL1193:
- 13362 .L709:
- 801:Src/main.c ****
- 13363 .loc 1 801 8 is_stmt 1 view .LVU4242
- 801:Src/main.c ****
- 13364 .loc 1 801 13 view .LVU4243
- 13365 09d8 FEE7 b .L709
- 13366 .LVL1194:
- 13367 .L759:
- 843:Src/main.c **** ++trigger_counter;
- 13368 .loc 1 843 10 view .LVU4244
- 13369 09da E8B2 uxtb r0, r5
- 13370 09dc FFF7FEFF bl OUT_trigger
- 13371 .LVL1195:
- 844:Src/main.c **** }
- 13372 .loc 1 844 10 view .LVU4245
- ARM GAS /tmp/ccLSPxIe.s page 661
-
-
- 13373 09e0 0135 adds r5, r5, #1
- 13374 .LVL1196:
- 844:Src/main.c **** }
- 13375 .loc 1 844 10 is_stmt 0 view .LVU4246
- 13376 09e2 ADB2 uxth r5, r5
- 13377 .LVL1197:
- 844:Src/main.c **** }
- 13378 .loc 1 844 10 view .LVU4247
- 13379 09e4 F5E7 b .L712
- 13380 .L758:
- 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 13381 .loc 1 871 7 is_stmt 1 view .LVU4248
- 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 13382 .loc 1 871 13 is_stmt 0 view .LVU4249
- 13383 09e6 574A ldr r2, .L767+32
- 13384 09e8 D368 ldr r3, [r2, #12]
- 871:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd
- 13385 .loc 1 871 21 view .LVU4250
- 13386 09ea 43F00103 orr r3, r3, #1
- 13387 09ee D360 str r3, [r2, #12]
- 881:Src/main.c ****
- 13388 .loc 1 881 7 is_stmt 1 view .LVU4251
- 13389 09f0 FFF7FEFF bl Stop_TIM10
- 13390 .LVL1198:
- 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 13391 .loc 1 883 7 view .LVU4252
- 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 13392 .loc 1 883 32 is_stmt 0 view .LVU4253
- 13393 09f4 4B4C ldr r4, .L767
- 13394 .LVL1199:
- 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 13395 .loc 1 883 32 view .LVU4254
- 13396 09f6 D4ED017A vldr.32 s15, [r4, #4]
- 883:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param);
- 13397 .loc 1 883 26 view .LVU4255
- 13398 09fa C4ED047A vstr.32 s15, [r4, #16]
- 884:Src/main.c **** if (task.tau > 3)
- 13399 .loc 1 884 7 is_stmt 1 view .LVU4256
- 13400 09fe FCEEE77A vcvt.u32.f32 s15, s15
- 13401 0a02 17EE903A vmov r3, s15 @ int
- 13402 0a06 99B2 uxth r1, r3
- 13403 0a08 0120 movs r0, #1
- 13404 0a0a FFF7FEFF bl Set_LTEC
- 13405 .LVL1200:
- 885:Src/main.c **** {
- 13406 .loc 1 885 7 view .LVU4257
- 885:Src/main.c **** {
- 13407 .loc 1 885 15 is_stmt 0 view .LVU4258
- 13408 0a0e E38A ldrh r3, [r4, #22]
- 885:Src/main.c **** {
- 13409 .loc 1 885 10 view .LVU4259
- 13410 0a10 032B cmp r3, #3
- 13411 0a12 0CD9 bls .L714
- 887:Src/main.c **** htim10.Init.Period = 9999;
- 13412 .loc 1 887 8 is_stmt 1 view .LVU4260
- 887:Src/main.c **** htim10.Init.Period = 9999;
- 13413 .loc 1 887 34 is_stmt 0 view .LVU4261
- ARM GAS /tmp/ccLSPxIe.s page 662
-
-
- 13414 0a14 4A4A ldr r2, .L767+28
- 13415 0a16 D068 ldr r0, [r2, #12]
- 887:Src/main.c **** htim10.Init.Period = 9999;
- 13416 .loc 1 887 21 view .LVU4262
- 13417 0a18 4E49 ldr r1, .L767+48
- 13418 0a1a 0860 str r0, [r1]
- 888:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- 13419 .loc 1 888 8 is_stmt 1 view .LVU4263
- 888:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- 13420 .loc 1 888 27 is_stmt 0 view .LVU4264
- 13421 0a1c 42F20F71 movw r1, #9999
- 13422 0a20 D160 str r1, [r2, #12]
- 889:Src/main.c **** }
- 13423 .loc 1 889 8 is_stmt 1 view .LVU4265
- 889:Src/main.c **** }
- 13424 .loc 1 889 33 is_stmt 0 view .LVU4266
- 13425 0a22 013B subs r3, r3, #1
- 889:Src/main.c **** }
- 13426 .loc 1 889 38 view .LVU4267
- 13427 0a24 6422 movs r2, #100
- 13428 0a26 02FB03F3 mul r3, r2, r3
- 889:Src/main.c **** }
- 13429 .loc 1 889 21 view .LVU4268
- 13430 0a2a 4B4A ldr r2, .L767+52
- 13431 0a2c 1360 str r3, [r2]
- 13432 .L714:
- 891:Src/main.c **** break;
- 13433 .loc 1 891 7 is_stmt 1 view .LVU4269
- 13434 0a2e 4448 ldr r0, .L767+28
- 13435 0a30 FFF7FEFF bl HAL_TIM_Base_Start_IT
- 13436 .LVL1201:
- 892:Src/main.c **** case TT_CHANGE_CURR_2:
- 13437 .loc 1 892 6 view .LVU4270
- 13438 0a34 D2E6 b .L707
- 13439 .LVL1202:
- 13440 .L706:
- 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13441 .loc 1 896 7 view .LVU4271
- 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13442 .loc 1 896 38 is_stmt 0 view .LVU4272
- 13443 0a36 3B4B ldr r3, .L767
- 13444 0a38 D3ED077A vldr.32 s15, [r3, #28]
- 896:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1);
- 13445 .loc 1 896 7 view .LVU4273
- 13446 0a3c FCEEE77A vcvt.u32.f32 s15, s15
- 13447 0a40 17EE903A vmov r3, s15 @ int
- 13448 0a44 99B2 uxth r1, r3
- 13449 0a46 0120 movs r0, #1
- 13450 0a48 FFF7FEFF bl Set_LTEC
- 13451 .LVL1203:
- 897:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 13452 .loc 1 897 7 is_stmt 1 view .LVU4274
- 897:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1);
- 13453 .loc 1 897 14 is_stmt 0 view .LVU4275
- 13454 0a4c 0320 movs r0, #3
- 13455 0a4e FFF7FEFF bl MPhD_T
- 13456 .LVL1204:
- ARM GAS /tmp/ccLSPxIe.s page 663
-
-
- 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13457 .loc 1 898 7 is_stmt 1 view .LVU4276
- 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13458 .loc 1 898 32 is_stmt 0 view .LVU4277
- 13459 0a52 0320 movs r0, #3
- 13460 0a54 FFF7FEFF bl MPhD_T
- 13461 .LVL1205:
- 898:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2);
- 13462 .loc 1 898 30 discriminator 1 view .LVU4278
- 13463 0a58 334C ldr r4, .L767+4
- 13464 0a5a 2080 strh r0, [r4] @ movhi
- 899:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 13465 .loc 1 899 7 is_stmt 1 view .LVU4279
- 899:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2);
- 13466 .loc 1 899 14 is_stmt 0 view .LVU4280
- 13467 0a5c 0420 movs r0, #4
- 13468 0a5e FFF7FEFF bl MPhD_T
- 13469 .LVL1206:
- 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13470 .loc 1 900 7 is_stmt 1 view .LVU4281
- 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13471 .loc 1 900 32 is_stmt 0 view .LVU4282
- 13472 0a62 0420 movs r0, #4
- 13473 0a64 FFF7FEFF bl MPhD_T
- 13474 .LVL1207:
- 900:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1);
- 13475 .loc 1 900 30 discriminator 1 view .LVU4283
- 13476 0a68 304D ldr r5, .L767+8
- 13477 0a6a 2880 strh r0, [r5] @ movhi
- 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13478 .loc 1 901 7 is_stmt 1 view .LVU4284
- 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13479 .loc 1 901 14 is_stmt 0 view .LVU4285
- 13480 0a6c 0122 movs r2, #1
- 13481 0a6e 2146 mov r1, r4
- 13482 0a70 2F48 ldr r0, .L767+12
- 13483 0a72 FFF7FEFF bl PID_Controller_Temp
- 13484 .LVL1208:
- 13485 0a76 0146 mov r1, r0
- 901:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1
- 13486 .loc 1 901 13 discriminator 1 view .LVU4286
- 13487 0a78 2E4C ldr r4, .L767+16
- 13488 0a7a 2080 strh r0, [r4] @ movhi
- 902:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2);
- 13489 .loc 1 902 7 is_stmt 1 view .LVU4287
- 13490 0a7c 0320 movs r0, #3
- 13491 0a7e FFF7FEFF bl Set_LTEC
- 13492 .LVL1209:
- 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13493 .loc 1 903 7 view .LVU4288
- 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13494 .loc 1 903 14 is_stmt 0 view .LVU4289
- 13495 0a82 0222 movs r2, #2
- 13496 0a84 2946 mov r1, r5
- 13497 0a86 2C48 ldr r0, .L767+20
- 13498 0a88 FFF7FEFF bl PID_Controller_Temp
- 13499 .LVL1210:
- ARM GAS /tmp/ccLSPxIe.s page 664
-
-
- 13500 0a8c 0146 mov r1, r0
- 903:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2
- 13501 .loc 1 903 13 discriminator 1 view .LVU4290
- 13502 0a8e 2080 strh r0, [r4] @ movhi
- 904:Src/main.c ****
- 13503 .loc 1 904 7 is_stmt 1 view .LVU4291
- 13504 0a90 0420 movs r0, #4
- 13505 0a92 FFF7FEFF bl Set_LTEC
- 13506 .LVL1211:
- 906:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 13507 .loc 1 906 7 view .LVU4292
- 906:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L
- 13508 .loc 1 906 28 is_stmt 0 view .LVU4293
- 13509 0a96 314B ldr r3, .L767+56
- 13510 0a98 0222 movs r2, #2
- 13511 0a9a 1A70 strb r2, [r3]
- 907:Src/main.c **** //LD_blinker.param = task.current_param;
- 13512 .loc 1 907 7 is_stmt 1 view .LVU4294
- 907:Src/main.c **** //LD_blinker.param = task.current_param;
- 13513 .loc 1 907 24 is_stmt 0 view .LVU4295
- 13514 0a9c 0022 movs r2, #0
- 13515 0a9e 9A72 strb r2, [r3, #10]
- 909:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 13516 .loc 1 909 7 is_stmt 1 view .LVU4296
- 909:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units)
- 13517 .loc 1 909 24 is_stmt 0 view .LVU4297
- 13518 0aa0 1A81 strh r2, [r3, #8] @ movhi
- 910:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port;
- 13519 .loc 1 910 7 is_stmt 1 view .LVU4298
- 910:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port;
- 13520 .loc 1 910 24 is_stmt 0 view .LVU4299
- 13521 0aa2 4FF47A72 mov r2, #1000
- 13522 0aa6 1A81 strh r2, [r3, #8] @ movhi
- 911:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin;
- 13523 .loc 1 911 7 is_stmt 1 view .LVU4300
- 911:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin;
- 13524 .loc 1 911 30 is_stmt 0 view .LVU4301
- 13525 0aa8 2D4A ldr r2, .L767+60
- 13526 0aaa 5A60 str r2, [r3, #4]
- 912:Src/main.c ****
- 13527 .loc 1 912 7 is_stmt 1 view .LVU4302
- 912:Src/main.c ****
- 13528 .loc 1 912 29 is_stmt 0 view .LVU4303
- 13529 0aac 8022 movs r2, #128
- 13530 0aae 5A80 strh r2, [r3, #2] @ movhi
- 914:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 13531 .loc 1 914 7 is_stmt 1 view .LVU4304
- 914:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU
- 13532 .loc 1 914 17 is_stmt 0 view .LVU4305
- 13533 0ab0 2C4B ldr r3, .L767+64
- 13534 0ab2 42F21072 movw r2, #10000
- 13535 0ab6 DA62 str r2, [r3, #44]
- 916:Src/main.c **** if (st != HAL_OK)
- 13536 .loc 1 916 7 is_stmt 1 view .LVU4306
- 916:Src/main.c **** if (st != HAL_OK)
- 13537 .loc 1 916 12 is_stmt 0 view .LVU4307
- 13538 0ab8 2B48 ldr r0, .L767+68
- ARM GAS /tmp/ccLSPxIe.s page 665
-
-
- 13539 0aba FFF7FEFF bl HAL_TIM_Base_Start_IT
- 13540 .LVL1212:
- 917:Src/main.c **** while(1);
- 13541 .loc 1 917 7 is_stmt 1 view .LVU4308
- 917:Src/main.c **** while(1);
- 13542 .loc 1 917 10 is_stmt 0 view .LVU4309
- 13543 0abe 78BB cbnz r0, .L716
- 922:Src/main.c **** uint32_t i = 10000; while (--i){}
- 13544 .loc 1 922 7 is_stmt 1 view .LVU4310
- 13545 0ac0 0122 movs r2, #1
- 13546 0ac2 8021 movs r1, #128
- 13547 0ac4 1D48 ldr r0, .L767+24
- 13548 .LVL1213:
- 922:Src/main.c **** uint32_t i = 10000; while (--i){}
- 13549 .loc 1 922 7 is_stmt 0 view .LVU4311
- 13550 0ac6 FFF7FEFF bl HAL_GPIO_WritePin
- 13551 .LVL1214:
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13552 .loc 1 923 7 is_stmt 1 view .LVU4312
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13553 .loc 1 923 27 view .LVU4313
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13554 .loc 1 923 16 is_stmt 0 view .LVU4314
- 13555 0aca 42F21073 movw r3, #10000
- 13556 .LVL1215:
- 13557 .L717:
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13558 .loc 1 923 39 is_stmt 1 discriminator 2 view .LVU4315
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13559 .loc 1 923 34 discriminator 2 view .LVU4316
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13560 .loc 1 923 34 is_stmt 0 discriminator 2 view .LVU4317
- 13561 0ace 013B subs r3, r3, #1
- 13562 .LVL1216:
- 923:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET);
- 13563 .loc 1 923 34 discriminator 2 view .LVU4318
- 13564 0ad0 FDD1 bne .L717
- 924:Src/main.c **** LD_blinker.state = 2;
- 13565 .loc 1 924 7 is_stmt 1 view .LVU4319
- 13566 0ad2 0022 movs r2, #0
- 13567 0ad4 8021 movs r1, #128
- 13568 0ad6 1948 ldr r0, .L767+24
- 13569 0ad8 FFF7FEFF bl HAL_GPIO_WritePin
- 13570 .LVL1217:
- 925:Src/main.c ****
- 13571 .loc 1 925 7 view .LVU4320
- 925:Src/main.c ****
- 13572 .loc 1 925 24 is_stmt 0 view .LVU4321
- 13573 0adc 1F4B ldr r3, .L767+56
- 13574 0ade 0222 movs r2, #2
- 13575 0ae0 9A72 strb r2, [r3, #10]
- 927:Src/main.c **** if (st != HAL_OK)
- 13576 .loc 1 927 7 is_stmt 1 view .LVU4322
- 927:Src/main.c **** if (st != HAL_OK)
- 13577 .loc 1 927 12 is_stmt 0 view .LVU4323
- 13578 0ae2 1748 ldr r0, .L767+28
- 13579 0ae4 FFF7FEFF bl HAL_TIM_Base_Start_IT
- ARM GAS /tmp/ccLSPxIe.s page 666
-
-
- 13580 .LVL1218:
- 928:Src/main.c **** while(1);
- 13581 .loc 1 928 7 is_stmt 1 view .LVU4324
- 928:Src/main.c **** while(1);
- 13582 .loc 1 928 10 is_stmt 0 view .LVU4325
- 13583 0ae8 D8B9 cbnz r0, .L719
- 13584 .L720:
- 930:Src/main.c **** {
- 13585 .loc 1 930 33 is_stmt 1 view .LVU4326
- 930:Src/main.c **** {
- 13586 .loc 1 930 18 is_stmt 0 view .LVU4327
- 13587 0aea 0E4B ldr r3, .L767
- 13588 0aec D3ED047A vldr.32 s15, [r3, #16]
- 930:Src/main.c **** {
- 13589 .loc 1 930 39 view .LVU4328
- 13590 0af0 93ED027A vldr.32 s14, [r3, #8]
- 930:Src/main.c **** {
- 13591 .loc 1 930 33 view .LVU4329
- 13592 0af4 F4EEC77A vcmpe.f32 s15, s14
- 13593 0af8 F1EE10FA vmrs APSR_nzcv, FPSCR
- 13594 0afc 3CD5 bpl .L760
- 932:Src/main.c **** {
- 13595 .loc 1 932 8 is_stmt 1 view .LVU4330
- 932:Src/main.c **** {
- 13596 .loc 1 932 12 is_stmt 0 view .LVU4331
- 13597 0afe 134B ldr r3, .L767+40
- 13598 0b00 1B78 ldrb r3, [r3] @ zero_extendqisi2
- 932:Src/main.c **** {
- 13599 .loc 1 932 11 view .LVU4332
- 13600 0b02 002B cmp r3, #0
- 13601 0b04 F1D0 beq .L720
- 937:Src/main.c **** TO10 = 0;
- 13602 .loc 1 937 9 is_stmt 1 view .LVU4333
- 937:Src/main.c **** TO10 = 0;
- 13603 .loc 1 937 35 is_stmt 0 view .LVU4334
- 13604 0b06 074B ldr r3, .L767
- 13605 0b08 93ED037A vldr.32 s14, [r3, #12]
- 937:Src/main.c **** TO10 = 0;
- 13606 .loc 1 937 28 view .LVU4335
- 13607 0b0c 77EE277A vadd.f32 s15, s14, s15
- 13608 0b10 C3ED047A vstr.32 s15, [r3, #16]
- 938:Src/main.c **** TIM10_coflag = 0;
- 13609 .loc 1 938 9 is_stmt 1 view .LVU4336
- 938:Src/main.c **** TIM10_coflag = 0;
- 13610 .loc 1 938 14 is_stmt 0 view .LVU4337
- 13611 0b14 0023 movs r3, #0
- 13612 0b16 0E4A ldr r2, .L767+44
- 13613 0b18 1360 str r3, [r2]
- 939:Src/main.c ****
- 13614 .loc 1 939 9 is_stmt 1 view .LVU4338
- 939:Src/main.c ****
- 13615 .loc 1 939 22 is_stmt 0 view .LVU4339
- 13616 0b1a 0C4A ldr r2, .L767+40
- 13617 0b1c 1370 strb r3, [r2]
- 13618 0b1e E4E7 b .L720
- 13619 .LVL1219:
- 13620 .L716:
- ARM GAS /tmp/ccLSPxIe.s page 667
-
-
- 918:Src/main.c **** // */
- 13621 .loc 1 918 8 is_stmt 1 view .LVU4340
- 918:Src/main.c **** // */
- 13622 .loc 1 918 13 view .LVU4341
- 13623 0b20 FEE7 b .L716
- 13624 .LVL1220:
- 13625 .L719:
- 929:Src/main.c **** while (task.current_param < task.max_param)
- 13626 .loc 1 929 8 view .LVU4342
- 929:Src/main.c **** while (task.current_param < task.max_param)
- 13627 .loc 1 929 13 view .LVU4343
- 13628 0b22 FEE7 b .L719
- 13629 .L768:
- 13630 .align 2
- 13631 .L767:
- 13632 0b24 00000000 .word task
- 13633 0b28 00000000 .word LD1_param
- 13634 0b2c 00000000 .word LD2_param
- 13635 0b30 00000000 .word LD1_curr_setup
- 13636 0b34 00000000 .word temp16
- 13637 0b38 00000000 .word LD2_curr_setup
- 13638 0b3c 000C0240 .word 1073875968
- 13639 0b40 00000000 .word htim10
- 13640 0b44 00480140 .word 1073825792
- 13641 0b48 00080040 .word 1073743872
- 13642 0b4c 00000000 .word TIM10_coflag
- 13643 0b50 00000000 .word TO10
- 13644 0b54 00000000 .word TIM10_period
- 13645 0b58 00000000 .word TO10_counter
- 13646 0b5c 00000000 .word LD_blinker
- 13647 0b60 00040240 .word 1073873920
- 13648 0b64 00040140 .word 1073808384
- 13649 0b68 00000000 .word htim8
- 13650 0b6c 00000000 .word htim11
- 13651 0b70 00000000 .word htim4
- 13652 0b74 00180240 .word 1073879040
- 13653 .L760:
- 944:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 13654 .loc 1 944 7 view .LVU4344
- 13655 0b78 6C48 ldr r0, .L769
- 13656 .LVL1221:
- 944:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET);
- 13657 .loc 1 944 7 is_stmt 0 view .LVU4345
- 13658 0b7a FFF7FEFF bl HAL_TIM_Base_Stop
- 13659 .LVL1222:
- 945:Src/main.c ****
- 13660 .loc 1 945 7 is_stmt 1 view .LVU4346
- 13661 0b7e 6C4C ldr r4, .L769+4
- 13662 0b80 0122 movs r2, #1
- 13663 0b82 8021 movs r1, #128
- 13664 0b84 2046 mov r0, r4
- 13665 0b86 FFF7FEFF bl HAL_GPIO_WritePin
- 13666 .LVL1223:
- 947:Src/main.c ****
- 13667 .loc 1 947 7 view .LVU4347
- 13668 0b8a 0022 movs r2, #0
- 13669 0b8c 8021 movs r1, #128
- ARM GAS /tmp/ccLSPxIe.s page 668
-
-
- 13670 0b8e 2046 mov r0, r4
- 13671 0b90 FFF7FEFF bl HAL_GPIO_WritePin
- 13672 .LVL1224:
- 949:Src/main.c **** TIM8->CNT = 0;
- 13673 .loc 1 949 7 view .LVU4348
- 13674 0b94 6748 ldr r0, .L769+8
- 13675 0b96 FFF7FEFF bl HAL_TIM_Base_Stop_IT
- 13676 .LVL1225:
- 950:Src/main.c ****
- 13677 .loc 1 950 7 view .LVU4349
- 950:Src/main.c ****
- 13678 .loc 1 950 17 is_stmt 0 view .LVU4350
- 13679 0b9a 674B ldr r3, .L769+12
- 13680 0b9c 0022 movs r2, #0
- 13681 0b9e 5A62 str r2, [r3, #36]
- 952:Src/main.c **** task.current_param = task.min_param;
- 13682 .loc 1 952 7 is_stmt 1 view .LVU4351
- 13683 0ba0 FFF7FEFF bl Stop_TIM10
- 13684 .LVL1226:
- 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 13685 .loc 1 953 7 view .LVU4352
- 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 13686 .loc 1 953 32 is_stmt 0 view .LVU4353
- 13687 0ba4 654C ldr r4, .L769+16
- 13688 0ba6 D4ED017A vldr.32 s15, [r4, #4]
- 953:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 13689 .loc 1 953 26 view .LVU4354
- 13690 0baa C4ED047A vstr.32 s15, [r4, #16]
- 954:Src/main.c **** if (task.tau > 3)
- 13691 .loc 1 954 7 is_stmt 1 view .LVU4355
- 13692 0bae FCEEE77A vcvt.u32.f32 s15, s15
- 13693 0bb2 17EE903A vmov r3, s15 @ int
- 13694 0bb6 99B2 uxth r1, r3
- 13695 0bb8 0220 movs r0, #2
- 13696 0bba FFF7FEFF bl Set_LTEC
- 13697 .LVL1227:
- 955:Src/main.c **** {
- 13698 .loc 1 955 7 view .LVU4356
- 955:Src/main.c **** {
- 13699 .loc 1 955 15 is_stmt 0 view .LVU4357
- 13700 0bbe E38A ldrh r3, [r4, #22]
- 955:Src/main.c **** {
- 13701 .loc 1 955 10 view .LVU4358
- 13702 0bc0 032B cmp r3, #3
- 13703 0bc2 0CD9 bls .L722
- 957:Src/main.c **** htim10.Init.Period = 9999;
- 13704 .loc 1 957 8 is_stmt 1 view .LVU4359
- 957:Src/main.c **** htim10.Init.Period = 9999;
- 13705 .loc 1 957 34 is_stmt 0 view .LVU4360
- 13706 0bc4 594A ldr r2, .L769
- 13707 0bc6 D068 ldr r0, [r2, #12]
- 957:Src/main.c **** htim10.Init.Period = 9999;
- 13708 .loc 1 957 21 view .LVU4361
- 13709 0bc8 5D49 ldr r1, .L769+20
- 13710 0bca 0860 str r0, [r1]
- 958:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- 13711 .loc 1 958 8 is_stmt 1 view .LVU4362
- ARM GAS /tmp/ccLSPxIe.s page 669
-
-
- 958:Src/main.c **** TO10_counter = (task.tau - 1) * 100;
- 13712 .loc 1 958 27 is_stmt 0 view .LVU4363
- 13713 0bcc 42F20F71 movw r1, #9999
- 13714 0bd0 D160 str r1, [r2, #12]
- 959:Src/main.c **** }
- 13715 .loc 1 959 8 is_stmt 1 view .LVU4364
- 959:Src/main.c **** }
- 13716 .loc 1 959 33 is_stmt 0 view .LVU4365
- 13717 0bd2 013B subs r3, r3, #1
- 959:Src/main.c **** }
- 13718 .loc 1 959 38 view .LVU4366
- 13719 0bd4 6422 movs r2, #100
- 13720 0bd6 02FB03F3 mul r3, r2, r3
- 959:Src/main.c **** }
- 13721 .loc 1 959 21 view .LVU4367
- 13722 0bda 5A4A ldr r2, .L769+24
- 13723 0bdc 1360 str r3, [r2]
- 13724 .L722:
- 961:Src/main.c ****
- 13725 .loc 1 961 7 is_stmt 1 view .LVU4368
- 13726 0bde 5348 ldr r0, .L769
- 13727 0be0 FFF7FEFF bl HAL_TIM_Base_Start_IT
- 13728 .LVL1228:
-1009:Src/main.c **** case TT_CHANGE_TEMP_1:
- 13729 .loc 1 1009 6 view .LVU4369
- 13730 0be4 FAE5 b .L707
- 13731 .LVL1229:
- 13732 .L757:
-1009:Src/main.c **** case TT_CHANGE_TEMP_1:
- 13733 .loc 1 1009 6 is_stmt 0 view .LVU4370
- 13734 .LBE721:
-1020:Src/main.c ****
- 13735 .loc 1 1020 7 is_stmt 1 view .LVU4371
-1020:Src/main.c ****
- 13736 .loc 1 1020 18 is_stmt 0 view .LVU4372
- 13737 0be6 584A ldr r2, .L769+28
- 13738 0be8 1360 str r3, [r2]
-1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 13739 .loc 1 1022 7 is_stmt 1 view .LVU4373
-1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 13740 .loc 1 1022 25 is_stmt 0 view .LVU4374
- 13741 0bea 0120 movs r0, #1
- 13742 0bec FFF7FEFF bl MPhD_T
- 13743 .LVL1230:
-1022:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1
- 13744 .loc 1 1022 23 discriminator 1 view .LVU4375
- 13745 0bf0 564E ldr r6, .L769+32
- 13746 0bf2 3081 strh r0, [r6, #8] @ movhi
-1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13747 .loc 1 1023 7 is_stmt 1 view .LVU4376
-1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13748 .loc 1 1023 25 is_stmt 0 view .LVU4377
- 13749 0bf4 0120 movs r0, #1
- 13750 0bf6 FFF7FEFF bl MPhD_T
- 13751 .LVL1231:
-1023:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13752 .loc 1 1023 23 discriminator 1 view .LVU4378
- ARM GAS /tmp/ccLSPxIe.s page 670
-
-
- 13753 0bfa 3081 strh r0, [r6, #8] @ movhi
-1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13754 .loc 1 1024 7 is_stmt 1 view .LVU4379
-1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13755 .loc 1 1024 25 is_stmt 0 view .LVU4380
- 13756 0bfc 0220 movs r0, #2
- 13757 0bfe FFF7FEFF bl MPhD_T
- 13758 .LVL1232:
-1024:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2
- 13759 .loc 1 1024 23 discriminator 1 view .LVU4381
- 13760 0c02 534F ldr r7, .L769+36
- 13761 0c04 3881 strh r0, [r7, #8] @ movhi
-1025:Src/main.c ****
- 13762 .loc 1 1025 7 is_stmt 1 view .LVU4382
-1025:Src/main.c ****
- 13763 .loc 1 1025 25 is_stmt 0 view .LVU4383
- 13764 0c06 0220 movs r0, #2
- 13765 0c08 FFF7FEFF bl MPhD_T
- 13766 .LVL1233:
-1025:Src/main.c ****
- 13767 .loc 1 1025 23 discriminator 1 view .LVU4384
- 13768 0c0c 3881 strh r0, [r7, #8] @ movhi
-1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 13769 .loc 1 1027 7 is_stmt 1 view .LVU4385
-1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 13770 .loc 1 1027 31 is_stmt 0 view .LVU4386
- 13771 0c0e 3389 ldrh r3, [r6, #8]
-1027:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data
- 13772 .loc 1 1027 20 view .LVU4387
- 13773 0c10 504C ldr r4, .L769+40
- 13774 0c12 6380 strh r3, [r4, #2] @ movhi
-1028:Src/main.c ****
- 13775 .loc 1 1028 7 is_stmt 1 view .LVU4388
-1028:Src/main.c ****
- 13776 .loc 1 1028 20 is_stmt 0 view .LVU4389
- 13777 0c14 A080 strh r0, [r4, #4] @ movhi
-1032:Src/main.c **** temp16 = Get_ADC(1);
- 13778 .loc 1 1032 7 is_stmt 1 view .LVU4390
-1032:Src/main.c **** temp16 = Get_ADC(1);
- 13779 .loc 1 1032 16 is_stmt 0 view .LVU4391
- 13780 0c16 0020 movs r0, #0
- 13781 0c18 FFF7FEFF bl Get_ADC
- 13782 .LVL1234:
-1032:Src/main.c **** temp16 = Get_ADC(1);
- 13783 .loc 1 1032 14 discriminator 1 view .LVU4392
- 13784 0c1c 4E4D ldr r5, .L769+44
- 13785 0c1e 2880 strh r0, [r5] @ movhi
-1033:Src/main.c **** Long_Data[7] = temp16;
- 13786 .loc 1 1033 7 is_stmt 1 view .LVU4393
-1033:Src/main.c **** Long_Data[7] = temp16;
- 13787 .loc 1 1033 16 is_stmt 0 view .LVU4394
- 13788 0c20 0120 movs r0, #1
- 13789 0c22 FFF7FEFF bl Get_ADC
- 13790 .LVL1235:
-1033:Src/main.c **** Long_Data[7] = temp16;
- 13791 .loc 1 1033 14 discriminator 1 view .LVU4395
- 13792 0c26 2880 strh r0, [r5] @ movhi
- ARM GAS /tmp/ccLSPxIe.s page 671
-
-
-1034:Src/main.c ****
- 13793 .loc 1 1034 7 is_stmt 1 view .LVU4396
-1034:Src/main.c ****
- 13794 .loc 1 1034 20 is_stmt 0 view .LVU4397
- 13795 0c28 E081 strh r0, [r4, #14] @ movhi
-1037:Src/main.c **** Long_Data[8] = temp16;
- 13796 .loc 1 1037 7 is_stmt 1 view .LVU4398
-1037:Src/main.c **** Long_Data[8] = temp16;
- 13797 .loc 1 1037 16 is_stmt 0 view .LVU4399
- 13798 0c2a 0120 movs r0, #1
- 13799 0c2c FFF7FEFF bl Get_ADC
- 13800 .LVL1236:
-1037:Src/main.c **** Long_Data[8] = temp16;
- 13801 .loc 1 1037 14 discriminator 1 view .LVU4400
- 13802 0c30 2880 strh r0, [r5] @ movhi
-1038:Src/main.c ****
- 13803 .loc 1 1038 7 is_stmt 1 view .LVU4401
-1038:Src/main.c ****
- 13804 .loc 1 1038 20 is_stmt 0 view .LVU4402
- 13805 0c32 2082 strh r0, [r4, #16] @ movhi
-1041:Src/main.c **** Long_Data[9] = temp16;
- 13806 .loc 1 1041 7 is_stmt 1 view .LVU4403
-1041:Src/main.c **** Long_Data[9] = temp16;
- 13807 .loc 1 1041 16 is_stmt 0 view .LVU4404
- 13808 0c34 0120 movs r0, #1
- 13809 0c36 FFF7FEFF bl Get_ADC
- 13810 .LVL1237:
-1041:Src/main.c **** Long_Data[9] = temp16;
- 13811 .loc 1 1041 14 discriminator 1 view .LVU4405
- 13812 0c3a 2880 strh r0, [r5] @ movhi
-1042:Src/main.c ****
- 13813 .loc 1 1042 7 is_stmt 1 view .LVU4406
-1042:Src/main.c ****
- 13814 .loc 1 1042 20 is_stmt 0 view .LVU4407
- 13815 0c3c 6082 strh r0, [r4, #18] @ movhi
-1045:Src/main.c **** Long_Data[10] = temp16;
- 13816 .loc 1 1045 7 is_stmt 1 view .LVU4408
-1045:Src/main.c **** Long_Data[10] = temp16;
- 13817 .loc 1 1045 16 is_stmt 0 view .LVU4409
- 13818 0c3e 0120 movs r0, #1
- 13819 0c40 FFF7FEFF bl Get_ADC
- 13820 .LVL1238:
-1045:Src/main.c **** Long_Data[10] = temp16;
- 13821 .loc 1 1045 14 discriminator 1 view .LVU4410
- 13822 0c44 2880 strh r0, [r5] @ movhi
-1046:Src/main.c ****
- 13823 .loc 1 1046 7 is_stmt 1 view .LVU4411
-1046:Src/main.c ****
- 13824 .loc 1 1046 21 is_stmt 0 view .LVU4412
- 13825 0c46 A082 strh r0, [r4, #20] @ movhi
-1049:Src/main.c **** Long_Data[11] = temp16;
- 13826 .loc 1 1049 7 is_stmt 1 view .LVU4413
-1049:Src/main.c **** Long_Data[11] = temp16;
- 13827 .loc 1 1049 16 is_stmt 0 view .LVU4414
- 13828 0c48 0120 movs r0, #1
- 13829 0c4a FFF7FEFF bl Get_ADC
- 13830 .LVL1239:
- ARM GAS /tmp/ccLSPxIe.s page 672
-
-
-1049:Src/main.c **** Long_Data[11] = temp16;
- 13831 .loc 1 1049 14 discriminator 1 view .LVU4415
- 13832 0c4e 2880 strh r0, [r5] @ movhi
-1050:Src/main.c **** temp16 = Get_ADC(2);
- 13833 .loc 1 1050 7 is_stmt 1 view .LVU4416
-1050:Src/main.c **** temp16 = Get_ADC(2);
- 13834 .loc 1 1050 21 is_stmt 0 view .LVU4417
- 13835 0c50 E082 strh r0, [r4, #22] @ movhi
-1051:Src/main.c ****
- 13836 .loc 1 1051 7 is_stmt 1 view .LVU4418
-1051:Src/main.c ****
- 13837 .loc 1 1051 16 is_stmt 0 view .LVU4419
- 13838 0c52 0220 movs r0, #2
- 13839 0c54 FFF7FEFF bl Get_ADC
- 13840 .LVL1240:
-1051:Src/main.c ****
- 13841 .loc 1 1051 14 discriminator 1 view .LVU4420
- 13842 0c58 2880 strh r0, [r5] @ movhi
-1054:Src/main.c **** temp16 = Get_ADC(4);
- 13843 .loc 1 1054 7 is_stmt 1 view .LVU4421
-1054:Src/main.c **** temp16 = Get_ADC(4);
- 13844 .loc 1 1054 16 is_stmt 0 view .LVU4422
- 13845 0c5a 0320 movs r0, #3
- 13846 0c5c FFF7FEFF bl Get_ADC
- 13847 .LVL1241:
-1054:Src/main.c **** temp16 = Get_ADC(4);
- 13848 .loc 1 1054 14 discriminator 1 view .LVU4423
- 13849 0c60 2880 strh r0, [r5] @ movhi
-1055:Src/main.c **** Long_Data[12] = temp16;
- 13850 .loc 1 1055 7 is_stmt 1 view .LVU4424
-1055:Src/main.c **** Long_Data[12] = temp16;
- 13851 .loc 1 1055 16 is_stmt 0 view .LVU4425
- 13852 0c62 0420 movs r0, #4
- 13853 0c64 FFF7FEFF bl Get_ADC
- 13854 .LVL1242:
-1055:Src/main.c **** Long_Data[12] = temp16;
- 13855 .loc 1 1055 14 discriminator 1 view .LVU4426
- 13856 0c68 2880 strh r0, [r5] @ movhi
-1056:Src/main.c **** temp16 = Get_ADC(5);
- 13857 .loc 1 1056 7 is_stmt 1 view .LVU4427
-1056:Src/main.c **** temp16 = Get_ADC(5);
- 13858 .loc 1 1056 21 is_stmt 0 view .LVU4428
- 13859 0c6a 2083 strh r0, [r4, #24] @ movhi
-1057:Src/main.c ****
- 13860 .loc 1 1057 7 is_stmt 1 view .LVU4429
-1057:Src/main.c ****
- 13861 .loc 1 1057 16 is_stmt 0 view .LVU4430
- 13862 0c6c 0520 movs r0, #5
- 13863 0c6e FFF7FEFF bl Get_ADC
- 13864 .LVL1243:
-1057:Src/main.c ****
- 13865 .loc 1 1057 14 discriminator 1 view .LVU4431
- 13866 0c72 2880 strh r0, [r5] @ movhi
-1060:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
- 13867 .loc 1 1060 7 is_stmt 1 view .LVU4432
-1060:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff;
- 13868 .loc 1 1060 16 is_stmt 0 view .LVU4433
- ARM GAS /tmp/ccLSPxIe.s page 673
-
-
- 13869 0c74 394B ldr r3, .L769+48
- 13870 0c76 1B68 ldr r3, [r3]
- 13871 0c78 394A ldr r2, .L769+52
- 13872 0c7a 1360 str r3, [r2]
-1061:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
- 13873 .loc 1 1061 7 is_stmt 1 view .LVU4434
-1061:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff;
- 13874 .loc 1 1061 20 is_stmt 0 view .LVU4435
- 13875 0c7c E380 strh r3, [r4, #6] @ movhi
-1062:Src/main.c ****
- 13876 .loc 1 1062 7 is_stmt 1 view .LVU4436
-1062:Src/main.c ****
- 13877 .loc 1 1062 31 is_stmt 0 view .LVU4437
- 13878 0c7e 1B0C lsrs r3, r3, #16
-1062:Src/main.c ****
- 13879 .loc 1 1062 20 view .LVU4438
- 13880 0c80 2381 strh r3, [r4, #8] @ movhi
-1065:Src/main.c ****
- 13881 .loc 1 1065 7 is_stmt 1 view .LVU4439
-1065:Src/main.c ****
- 13882 .loc 1 1065 31 is_stmt 0 view .LVU4440
- 13883 0c82 3388 ldrh r3, [r6]
-1065:Src/main.c ****
- 13884 .loc 1 1065 20 view .LVU4441
- 13885 0c84 6381 strh r3, [r4, #10] @ movhi
-1068:Src/main.c **** }
- 13886 .loc 1 1068 7 is_stmt 1 view .LVU4442
-1068:Src/main.c **** }
- 13887 .loc 1 1068 31 is_stmt 0 view .LVU4443
- 13888 0c86 3B88 ldrh r3, [r7]
-1068:Src/main.c **** }
- 13889 .loc 1 1068 20 view .LVU4444
- 13890 0c88 A381 strh r3, [r4, #12] @ movhi
- 13891 0c8a AEE5 b .L724
- 13892 .L726:
-1096:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 13893 .loc 1 1096 5 is_stmt 1 view .LVU4445
-1096:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 13894 .loc 1 1096 17 is_stmt 0 view .LVU4446
- 13895 0c8c 354C ldr r4, .L769+56
- 13896 0c8e 0D21 movs r1, #13
- 13897 0c90 2046 mov r0, r4
- 13898 0c92 FFF7FEFF bl CalculateChecksum
- 13899 .LVL1244:
-1096:Src/main.c **** Long_Data[DL_16-1] = CS_result;
- 13900 .loc 1 1096 15 discriminator 1 view .LVU4447
- 13901 0c96 344B ldr r3, .L769+60
- 13902 0c98 1880 strh r0, [r3] @ movhi
-1097:Src/main.c ****
- 13903 .loc 1 1097 5 is_stmt 1 view .LVU4448
-1097:Src/main.c ****
- 13904 .loc 1 1097 24 is_stmt 0 view .LVU4449
- 13905 0c9a 6083 strh r0, [r4, #26] @ movhi
-1099:Src/main.c **** {
- 13906 .loc 1 1099 5 is_stmt 1 view .LVU4450
- 13907 .LBB722:
-1099:Src/main.c **** {
- ARM GAS /tmp/ccLSPxIe.s page 674
-
-
- 13908 .loc 1 1099 10 view .LVU4451
- 13909 .LVL1245:
-1099:Src/main.c **** {
- 13910 .loc 1 1099 19 is_stmt 0 view .LVU4452
- 13911 0c9c 0023 movs r3, #0
-1099:Src/main.c **** {
- 13912 .loc 1 1099 5 view .LVU4453
- 13913 0c9e 0BE0 b .L729
- 13914 .LVL1246:
- 13915 .L730:
-1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13916 .loc 1 1101 6 is_stmt 1 view .LVU4454
-1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13917 .loc 1 1101 33 is_stmt 0 view .LVU4455
- 13918 0ca0 2C4A ldr r2, .L769+40
- 13919 0ca2 32F81320 ldrh r2, [r2, r3, lsl #1]
-1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13920 .loc 1 1101 17 view .LVU4456
- 13921 0ca6 5900 lsls r1, r3, #1
-1101:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13922 .loc 1 1101 21 view .LVU4457
- 13923 0ca8 3048 ldr r0, .L769+64
- 13924 0caa 00F81320 strb r2, [r0, r3, lsl #1]
-1102:Src/main.c **** }
- 13925 .loc 1 1102 6 is_stmt 1 view .LVU4458
-1102:Src/main.c **** }
- 13926 .loc 1 1102 19 is_stmt 0 view .LVU4459
- 13927 0cae 0131 adds r1, r1, #1
-1102:Src/main.c **** }
- 13928 .loc 1 1102 23 view .LVU4460
- 13929 0cb0 120A lsrs r2, r2, #8
- 13930 0cb2 4254 strb r2, [r0, r1]
-1099:Src/main.c **** {
- 13931 .loc 1 1099 38 is_stmt 1 discriminator 3 view .LVU4461
- 13932 0cb4 0133 adds r3, r3, #1
- 13933 .LVL1247:
-1099:Src/main.c **** {
- 13934 .loc 1 1099 38 is_stmt 0 discriminator 3 view .LVU4462
- 13935 0cb6 9BB2 uxth r3, r3
- 13936 .LVL1248:
- 13937 .L729:
-1099:Src/main.c **** {
- 13938 .loc 1 1099 28 is_stmt 1 discriminator 1 view .LVU4463
- 13939 0cb8 0E2B cmp r3, #14
- 13940 0cba F1D9 bls .L730
- 13941 .LBE722:
-1109:Src/main.c **** UART_transmission_request = NO_MESS;
- 13942 .loc 1 1109 5 view .LVU4464
- 13943 0cbc 1E20 movs r0, #30
- 13944 0cbe FFF7FEFF bl USART_TX_DMA
- 13945 .LVL1249:
-1110:Src/main.c **** break;
- 13946 .loc 1 1110 5 view .LVU4465
-1110:Src/main.c **** break;
- 13947 .loc 1 1110 31 is_stmt 0 view .LVU4466
- 13948 0cc2 2B4B ldr r3, .L769+68
- 13949 0cc4 0022 movs r2, #0
- ARM GAS /tmp/ccLSPxIe.s page 675
-
-
- 13950 0cc6 1A70 strb r2, [r3]
-1111:Src/main.c **** case MESS_03://Transmith saved packet
- 13951 .loc 1 1111 4 is_stmt 1 view .LVU4467
- 13952 0cc8 FFF72FBA b .L728
- 13953 .LVL1250:
- 13954 .L731:
- 13955 .LBB723:
-1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13956 .loc 1 1115 6 view .LVU4468
-1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13957 .loc 1 1115 33 is_stmt 0 view .LVU4469
- 13958 0ccc 214A ldr r2, .L769+40
- 13959 0cce 32F81320 ldrh r2, [r2, r3, lsl #1]
-1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13960 .loc 1 1115 17 view .LVU4470
- 13961 0cd2 5900 lsls r1, r3, #1
-1115:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff;
- 13962 .loc 1 1115 21 view .LVU4471
- 13963 0cd4 2548 ldr r0, .L769+64
- 13964 0cd6 00F81320 strb r2, [r0, r3, lsl #1]
-1116:Src/main.c **** }
- 13965 .loc 1 1116 6 is_stmt 1 view .LVU4472
-1116:Src/main.c **** }
- 13966 .loc 1 1116 19 is_stmt 0 view .LVU4473
- 13967 0cda 0131 adds r1, r1, #1
-1116:Src/main.c **** }
- 13968 .loc 1 1116 23 view .LVU4474
- 13969 0cdc 120A lsrs r2, r2, #8
- 13970 0cde 4254 strb r2, [r0, r1]
-1113:Src/main.c **** {
- 13971 .loc 1 1113 38 is_stmt 1 discriminator 3 view .LVU4475
- 13972 0ce0 0133 adds r3, r3, #1
- 13973 .LVL1251:
-1113:Src/main.c **** {
- 13974 .loc 1 1113 38 is_stmt 0 discriminator 3 view .LVU4476
- 13975 0ce2 9BB2 uxth r3, r3
- 13976 .LVL1252:
- 13977 .L727:
-1113:Src/main.c **** {
- 13978 .loc 1 1113 28 is_stmt 1 discriminator 1 view .LVU4477
- 13979 0ce4 0E2B cmp r3, #14
- 13980 0ce6 F1D9 bls .L731
- 13981 .LBE723:
-1122:Src/main.c **** UART_transmission_request = NO_MESS;
- 13982 .loc 1 1122 5 view .LVU4478
- 13983 0ce8 1E20 movs r0, #30
- 13984 0cea FFF7FEFF bl USART_TX_DMA
- 13985 .LVL1253:
-1123:Src/main.c **** break;
- 13986 .loc 1 1123 5 view .LVU4479
-1123:Src/main.c **** break;
- 13987 .loc 1 1123 31 is_stmt 0 view .LVU4480
- 13988 0cee 204B ldr r3, .L769+68
- 13989 0cf0 0022 movs r2, #0
- 13990 0cf2 1A70 strb r2, [r3]
-1124:Src/main.c **** }
- 13991 .loc 1 1124 4 is_stmt 1 view .LVU4481
- ARM GAS /tmp/ccLSPxIe.s page 676
-
-
- 13992 0cf4 FFF719BA b .L728
- 13993 .LVL1254:
- 13994 .L742:
-1084:Src/main.c **** {
- 13995 .loc 1 1084 3 is_stmt 0 view .LVU4482
- 13996 0cf8 0023 movs r3, #0
- 13997 0cfa F3E7 b .L727
- 13998 .L745:
-1126:Src/main.c **** {
- 13999 .loc 1 1126 28 discriminator 1 view .LVU4483
- 14000 0cfc 174B ldr r3, .L769+48
- 14001 0cfe 1B68 ldr r3, [r3]
- 14002 0d00 1C4A ldr r2, .L769+72
- 14003 0d02 1268 ldr r2, [r2]
- 14004 0d04 9B1A subs r3, r3, r2
-1126:Src/main.c **** {
- 14005 .loc 1 1126 21 discriminator 1 view .LVU4484
- 14006 0d06 642B cmp r3, #100
- 14007 0d08 7FF614AA bls .L647
-1128:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error!
- 14008 .loc 1 1128 4 is_stmt 1 view .LVU4485
-1128:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error!
- 14009 .loc 1 1128 18 is_stmt 0 view .LVU4486
- 14010 0d0c 0022 movs r2, #0
- 14011 0d0e 1A4B ldr r3, .L769+76
- 14012 0d10 1A80 strh r2, [r3] @ movhi
-1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status
- 14013 .loc 1 1129 4 is_stmt 1 view .LVU4487
-1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status
- 14014 .loc 1 1129 14 is_stmt 0 view .LVU4488
- 14015 0d12 1A49 ldr r1, .L769+80
- 14016 0d14 0B78 ldrb r3, [r1] @ zero_extendqisi2
-1129:Src/main.c **** UART_transmission_request = MESS_01;//Send status
- 14017 .loc 1 1129 18 view .LVU4489
- 14018 0d16 43F00203 orr r3, r3, #2
- 14019 0d1a 0B70 strb r3, [r1]
-1130:Src/main.c **** flg_tmt = 0;//Reset timeout flag
- 14020 .loc 1 1130 4 is_stmt 1 view .LVU4490
-1130:Src/main.c **** flg_tmt = 0;//Reset timeout flag
- 14021 .loc 1 1130 30 is_stmt 0 view .LVU4491
- 14022 0d1c 144B ldr r3, .L769+68
- 14023 0d1e 0121 movs r1, #1
- 14024 0d20 1970 strb r1, [r3]
-1131:Src/main.c **** }
- 14025 .loc 1 1131 4 is_stmt 1 view .LVU4492
-1131:Src/main.c **** }
- 14026 .loc 1 1131 12 is_stmt 0 view .LVU4493
- 14027 0d22 174B ldr r3, .L769+84
- 14028 0d24 1A70 strb r2, [r3]
- 14029 0d26 FFF705BA b .L647
- 14030 .L770:
- 14031 0d2a 00BF .align 2
- 14032 .L769:
- 14033 0d2c 00000000 .word htim10
- 14034 0d30 000C0240 .word 1073875968
- 14035 0d34 00000000 .word htim8
- 14036 0d38 00040140 .word 1073808384
- ARM GAS /tmp/ccLSPxIe.s page 677
-
-
- 14037 0d3c 00000000 .word task
- 14038 0d40 00000000 .word TIM10_period
- 14039 0d44 00000000 .word TO10_counter
- 14040 0d48 00000000 .word TO7_before
- 14041 0d4c 00000000 .word LD1_param
- 14042 0d50 00000000 .word LD2_param
- 14043 0d54 00000000 .word Long_Data
- 14044 0d58 00000000 .word temp16
- 14045 0d5c 00000000 .word TO6
- 14046 0d60 00000000 .word TO6_stop
- 14047 0d64 02000000 .word Long_Data+2
- 14048 0d68 00000000 .word CS_result
- 14049 0d6c 00000000 .word UART_DATA
- 14050 0d70 00000000 .word UART_transmission_request
- 14051 0d74 00000000 .word TO6_uart
- 14052 0d78 00000000 .word UART_rec_incr
- 14053 0d7c 00000000 .word State_Data
- 14054 0d80 00000000 .word flg_tmt
- 14055 .cfi_endproc
- 14056 .LFE1186:
- 14058 .section .bss.ad9102_wave_written_samples,"aw",%nobits
- 14059 .align 1
- 14062 ad9102_wave_written_samples:
- 14063 0000 0000 .space 2
- 14064 .section .bss.ad9102_wave_expected_samples,"aw",%nobits
- 14065 .align 1
- 14068 ad9102_wave_expected_samples:
- 14069 0000 0000 .space 2
- 14070 .section .bss.ad9102_wave_upload_active,"aw",%nobits
- 14073 ad9102_wave_upload_active:
- 14074 0000 00 .space 1
- 14075 .section .rodata.ad9102_example2_regval,"a"
- 14076 .align 2
- 14079 ad9102_example2_regval:
- 14080 0000 0000 .short 0
- 14081 0002 000E .short 3584
- 14082 0004 0000 .short 0
- 14083 0006 0000 .short 0
- 14084 0008 0000 .short 0
- 14085 000a 0000 .short 0
- 14086 000c 0000 .short 0
- 14087 000e 0040 .short 16384
- 14088 0010 0000 .short 0
- 14089 0012 0000 .short 0
- 14090 0014 0000 .short 0
- 14091 0016 0000 .short 0
- 14092 0018 001F .short 7936
- 14093 001a 0000 .short 0
- 14094 001c 0000 .short 0
- 14095 001e 0000 .short 0
- 14096 0020 0E00 .short 14
- 14097 0022 0000 .short 0
- 14098 0024 0000 .short 0
- 14099 0026 0000 .short 0
- 14100 0028 0000 .short 0
- 14101 002a 0000 .short 0
- 14102 002c 3030 .short 12336
- ARM GAS /tmp/ccLSPxIe.s page 678
-
-
- 14103 002e 1101 .short 273
- 14104 0030 FFFF .short -1
- 14105 0032 0000 .short 0
- 14106 0034 0101 .short 257
- 14107 0036 0300 .short 3
- 14108 0038 0000 .short 0
- 14109 003a 0000 .short 0
- 14110 003c 0000 .short 0
- 14111 003e 0000 .short 0
- 14112 0040 0000 .short 0
- 14113 0042 0000 .short 0
- 14114 0044 0000 .short 0
- 14115 0046 0000 .short 0
- 14116 0048 0040 .short 16384
- 14117 004a 0000 .short 0
- 14118 004c 0002 .short 512
- 14119 004e 0000 .short 0
- 14120 0050 0000 .short 0
- 14121 0052 0000 .short 0
- 14122 0054 0000 .short 0
- 14123 0056 0000 .short 0
- 14124 0058 0000 .short 0
- 14125 005a 0000 .short 0
- 14126 005c 0000 .short 0
- 14127 005e 0000 .short 0
- 14128 0060 0000 .short 0
- 14129 0062 0000 .short 0
- 14130 0064 0000 .short 0
- 14131 0066 0000 .short 0
- 14132 0068 0000 .short 0
- 14133 006a 0000 .short 0
- 14134 006c 0000 .short 0
- 14135 006e 0000 .short 0
- 14136 0070 0000 .short 0
- 14137 0072 0000 .short 0
- 14138 0074 0000 .short 0
- 14139 0076 0000 .short 0
- 14140 0078 A00F .short 4000
- 14141 007a 0000 .short 0
- 14142 007c F03F .short 16368
- 14143 007e 0001 .short 256
- 14144 0080 0100 .short 1
- 14145 0082 0100 .short 1
- 14146 .section .rodata.ad9102_example4_regval,"a"
- 14147 .align 2
- 14150 ad9102_example4_regval:
- 14151 0000 0000 .short 0
- 14152 0002 0000 .short 0
- 14153 0004 0000 .short 0
- 14154 0006 0000 .short 0
- 14155 0008 0000 .short 0
- 14156 000a 0000 .short 0
- 14157 000c 0000 .short 0
- 14158 000e 0040 .short 16384
- 14159 0010 0000 .short 0
- 14160 0012 0000 .short 0
- 14161 0014 0000 .short 0
- ARM GAS /tmp/ccLSPxIe.s page 679
-
-
- 14162 0016 0000 .short 0
- 14163 0018 001F .short 7936
- 14164 001a 0000 .short 0
- 14165 001c 0000 .short 0
- 14166 001e 0000 .short 0
- 14167 0020 0E00 .short 14
- 14168 0022 0000 .short 0
- 14169 0024 0000 .short 0
- 14170 0026 0000 .short 0
- 14171 0028 0000 .short 0
- 14172 002a 0000 .short 0
- 14173 002c 1232 .short 12818
- 14174 002e 2101 .short 289
- 14175 0030 FFFF .short -1
- 14176 0032 0000 .short 0
- 14177 0034 0101 .short 257
- 14178 0036 0300 .short 3
- 14179 0038 0000 .short 0
- 14180 003a 0000 .short 0
- 14181 003c 0000 .short 0
- 14182 003e 0000 .short 0
- 14183 0040 0000 .short 0
- 14184 0042 0000 .short 0
- 14185 0044 0000 .short 0
- 14186 0046 0000 .short 0
- 14187 0048 0040 .short 16384
- 14188 004a 0000 .short 0
- 14189 004c 0606 .short 1542
- 14190 004e 9919 .short 6553
- 14191 0050 009A .short -26112
- 14192 0052 0000 .short 0
- 14193 0054 0000 .short 0
- 14194 0056 0000 .short 0
- 14195 0058 0000 .short 0
- 14196 005a 0000 .short 0
- 14197 005c 0000 .short 0
- 14198 005e 0000 .short 0
- 14199 0060 A00F .short 4000
- 14200 0062 0000 .short 0
- 14201 0064 0000 .short 0
- 14202 0066 0000 .short 0
- 14203 0068 0000 .short 0
- 14204 006a 0000 .short 0
- 14205 006c 0000 .short 0
- 14206 006e 0000 .short 0
- 14207 0070 0000 .short 0
- 14208 0072 0000 .short 0
- 14209 0074 0000 .short 0
- 14210 0076 0000 .short 0
- 14211 0078 0000 .short 0
- 14212 007a 0000 .short 0
- 14213 007c 0000 .short 0
- 14214 007e FF16 .short 5887
- 14215 0080 0100 .short 1
- 14216 0082 0100 .short 1
- 14217 .section .rodata.ad9102_reg_addr,"a"
- 14218 .align 2
- ARM GAS /tmp/ccLSPxIe.s page 680
-
-
- 14221 ad9102_reg_addr:
- 14222 0000 0000 .short 0
- 14223 0002 0100 .short 1
- 14224 0004 0200 .short 2
- 14225 0006 0300 .short 3
- 14226 0008 0400 .short 4
- 14227 000a 0500 .short 5
- 14228 000c 0600 .short 6
- 14229 000e 0700 .short 7
- 14230 0010 0800 .short 8
- 14231 0012 0900 .short 9
- 14232 0014 0A00 .short 10
- 14233 0016 0B00 .short 11
- 14234 0018 0C00 .short 12
- 14235 001a 0D00 .short 13
- 14236 001c 0E00 .short 14
- 14237 001e 1F00 .short 31
- 14238 0020 2000 .short 32
- 14239 0022 2200 .short 34
- 14240 0024 2300 .short 35
- 14241 0026 2400 .short 36
- 14242 0028 2500 .short 37
- 14243 002a 2600 .short 38
- 14244 002c 2700 .short 39
- 14245 002e 2800 .short 40
- 14246 0030 2900 .short 41
- 14247 0032 2A00 .short 42
- 14248 0034 2B00 .short 43
- 14249 0036 2C00 .short 44
- 14250 0038 2D00 .short 45
- 14251 003a 2E00 .short 46
- 14252 003c 2F00 .short 47
- 14253 003e 3000 .short 48
- 14254 0040 3100 .short 49
- 14255 0042 3200 .short 50
- 14256 0044 3300 .short 51
- 14257 0046 3400 .short 52
- 14258 0048 3500 .short 53
- 14259 004a 3600 .short 54
- 14260 004c 3700 .short 55
- 14261 004e 3E00 .short 62
- 14262 0050 3F00 .short 63
- 14263 0052 4000 .short 64
- 14264 0054 4100 .short 65
- 14265 0056 4200 .short 66
- 14266 0058 4300 .short 67
- 14267 005a 4400 .short 68
- 14268 005c 4500 .short 69
- 14269 005e 4700 .short 71
- 14270 0060 5000 .short 80
- 14271 0062 5100 .short 81
- 14272 0064 5200 .short 82
- 14273 0066 5300 .short 83
- 14274 0068 5400 .short 84
- 14275 006a 5500 .short 85
- 14276 006c 5600 .short 86
- 14277 006e 5700 .short 87
- ARM GAS /tmp/ccLSPxIe.s page 681
-
-
- 14278 0070 5800 .short 88
- 14279 0072 5900 .short 89
- 14280 0074 5A00 .short 90
- 14281 0076 5B00 .short 91
- 14282 0078 5C00 .short 92
- 14283 007a 5D00 .short 93
- 14284 007c 5E00 .short 94
- 14285 007e 5F00 .short 95
- 14286 0080 1E00 .short 30
- 14287 0082 1D00 .short 29
- 14288 .global task
- 14289 .section .bss.task,"aw",%nobits
- 14290 .align 2
- 14293 task:
- 14294 0000 00000000 .space 52
- 14294 00000000
- 14294 00000000
- 14294 00000000
- 14294 00000000
- 14295 .global LD_blinker
- 14296 .section .bss.LD_blinker,"aw",%nobits
- 14297 .align 2
- 14300 LD_blinker:
- 14301 0000 00000000 .space 12
- 14301 00000000
- 14301 00000000
- 14302 .global LD2_param
- 14303 .section .bss.LD2_param,"aw",%nobits
- 14304 .align 2
- 14307 LD2_param:
- 14308 0000 00000000 .space 12
- 14308 00000000
- 14308 00000000
- 14309 .global LD1_param
- 14310 .section .bss.LD1_param,"aw",%nobits
- 14311 .align 2
- 14314 LD1_param:
- 14315 0000 00000000 .space 12
- 14315 00000000
- 14315 00000000
- 14316 .global Def_setup
- 14317 .section .bss.Def_setup,"aw",%nobits
- 14318 .align 2
- 14321 Def_setup:
- 14322 0000 00000000 .space 18
- 14322 00000000
- 14322 00000000
- 14322 00000000
- 14322 0000
- 14323 .global Curr_setup
- 14324 .section .bss.Curr_setup,"aw",%nobits
- 14325 .align 2
- 14328 Curr_setup:
- 14329 0000 00000000 .space 18
- 14329 00000000
- 14329 00000000
- 14329 00000000
- ARM GAS /tmp/ccLSPxIe.s page 682
-
-
- 14329 0000
- 14330 .global LD2_def_setup
- 14331 .section .bss.LD2_def_setup,"aw",%nobits
- 14332 .align 2
- 14335 LD2_def_setup:
- 14336 0000 00000000 .space 16
- 14336 00000000
- 14336 00000000
- 14336 00000000
- 14337 .global LD1_def_setup
- 14338 .section .bss.LD1_def_setup,"aw",%nobits
- 14339 .align 2
- 14342 LD1_def_setup:
- 14343 0000 00000000 .space 16
- 14343 00000000
- 14343 00000000
- 14343 00000000
- 14344 .global LD2_curr_setup
- 14345 .section .bss.LD2_curr_setup,"aw",%nobits
- 14346 .align 2
- 14349 LD2_curr_setup:
- 14350 0000 00000000 .space 16
- 14350 00000000
- 14350 00000000
- 14350 00000000
- 14351 .global LD1_curr_setup
- 14352 .section .bss.LD1_curr_setup,"aw",%nobits
- 14353 .align 2
- 14356 LD1_curr_setup:
- 14357 0000 00000000 .space 16
- 14357 00000000
- 14357 00000000
- 14357 00000000
- 14358 .global sizeoffile
- 14359 .section .bss.sizeoffile,"aw",%nobits
- 14360 .align 2
- 14363 sizeoffile:
- 14364 0000 00000000 .space 4
- 14365 .global fgoto
- 14366 .section .bss.fgoto,"aw",%nobits
- 14367 .align 2
- 14370 fgoto:
- 14371 0000 00000000 .space 4
- 14372 .global test
- 14373 .section .bss.test,"aw",%nobits
- 14374 .align 2
- 14377 test:
- 14378 0000 00000000 .space 4
- 14379 .global fresult
- 14380 .section .bss.fresult,"aw",%nobits
- 14383 fresult:
- 14384 0000 00 .space 1
- 14385 .global COMMAND
- 14386 .section .bss.COMMAND,"aw",%nobits
- 14387 .align 2
- 14390 COMMAND:
- 14391 0000 00000000 .space 30
- ARM GAS /tmp/ccLSPxIe.s page 683
-
-
- 14391 00000000
- 14391 00000000
- 14391 00000000
- 14391 00000000
- 14392 .global Long_Data
- 14393 .section .bss.Long_Data,"aw",%nobits
- 14394 .align 2
- 14397 Long_Data:
- 14398 0000 00000000 .space 30
- 14398 00000000
- 14398 00000000
- 14398 00000000
- 14398 00000000
- 14399 .global temp16
- 14400 .section .bss.temp16,"aw",%nobits
- 14401 .align 1
- 14404 temp16:
- 14405 0000 0000 .space 2
- 14406 .global CS_result
- 14407 .section .bss.CS_result,"aw",%nobits
- 14408 .align 1
- 14411 CS_result:
- 14412 0000 0000 .space 2
- 14413 .global UART_header
- 14414 .section .bss.UART_header,"aw",%nobits
- 14415 .align 1
- 14418 UART_header:
- 14419 0000 0000 .space 2
- 14420 .global UART_rec_incr
- 14421 .section .bss.UART_rec_incr,"aw",%nobits
- 14422 .align 1
- 14425 UART_rec_incr:
- 14426 0000 0000 .space 2
- 14427 .global TIM10_coflag
- 14428 .section .bss.TIM10_coflag,"aw",%nobits
- 14431 TIM10_coflag:
- 14432 0000 00 .space 1
- 14433 .global u_rx_flg
- 14434 .section .bss.u_rx_flg,"aw",%nobits
- 14437 u_rx_flg:
- 14438 0000 00 .space 1
- 14439 .global u_tx_flg
- 14440 .section .bss.u_tx_flg,"aw",%nobits
- 14443 u_tx_flg:
- 14444 0000 00 .space 1
- 14445 .global flg_tmt
- 14446 .section .bss.flg_tmt,"aw",%nobits
- 14449 flg_tmt:
- 14450 0000 00 .space 1
- 14451 .global UART_DATA
- 14452 .section .bss.UART_DATA,"aw",%nobits
- 14453 .align 2
- 14456 UART_DATA:
- 14457 0000 00000000 .space 30
- 14457 00000000
- 14457 00000000
- 14457 00000000
- ARM GAS /tmp/ccLSPxIe.s page 684
-
-
- 14457 00000000
- 14458 .global State_Data
- 14459 .section .bss.State_Data,"aw",%nobits
- 14460 .align 2
- 14463 State_Data:
- 14464 0000 0000 .space 2
- 14465 .global UART_transmission_request
- 14466 .section .bss.UART_transmission_request,"aw",%nobits
- 14469 UART_transmission_request:
- 14470 0000 00 .space 1
- 14471 .global CPU_state_old
- 14472 .section .bss.CPU_state_old,"aw",%nobits
- 14475 CPU_state_old:
- 14476 0000 00 .space 1
- 14477 .global CPU_state
- 14478 .section .bss.CPU_state,"aw",%nobits
- 14481 CPU_state:
- 14482 0000 00 .space 1
- 14483 .global uart_buf
- 14484 .section .bss.uart_buf,"aw",%nobits
- 14487 uart_buf:
- 14488 0000 00 .space 1
- 14489 .global TIM10_period
- 14490 .section .bss.TIM10_period,"aw",%nobits
- 14491 .align 2
- 14494 TIM10_period:
- 14495 0000 00000000 .space 4
- 14496 .global TO10_counter
- 14497 .section .bss.TO10_counter,"aw",%nobits
- 14498 .align 2
- 14501 TO10_counter:
- 14502 0000 00000000 .space 4
- 14503 .global TO10
- 14504 .section .bss.TO10,"aw",%nobits
- 14505 .align 2
- 14508 TO10:
- 14509 0000 00000000 .space 4
- 14510 .global TO7_PID
- 14511 .section .bss.TO7_PID,"aw",%nobits
- 14512 .align 2
- 14515 TO7_PID:
- 14516 0000 00000000 .space 4
- 14517 .global TO7_before
- 14518 .section .bss.TO7_before,"aw",%nobits
- 14519 .align 2
- 14522 TO7_before:
- 14523 0000 00000000 .space 4
- 14524 .global TO7
- 14525 .section .bss.TO7,"aw",%nobits
- 14526 .align 2
- 14529 TO7:
- 14530 0000 00000000 .space 4
- 14531 .global temp32
- 14532 .section .bss.temp32,"aw",%nobits
- 14533 .align 2
- 14536 temp32:
- 14537 0000 00000000 .space 4
- ARM GAS /tmp/ccLSPxIe.s page 685
-
-
- 14538 .global SD_SLIDE
- 14539 .section .bss.SD_SLIDE,"aw",%nobits
- 14540 .align 2
- 14543 SD_SLIDE:
- 14544 0000 00000000 .space 4
- 14545 .global SD_SEEK
- 14546 .section .bss.SD_SEEK,"aw",%nobits
- 14547 .align 2
- 14550 SD_SEEK:
- 14551 0000 00000000 .space 4
- 14552 .global TO6_uart
- 14553 .section .bss.TO6_uart,"aw",%nobits
- 14554 .align 2
- 14557 TO6_uart:
- 14558 0000 00000000 .space 4
- 14559 .global TO6_stop
- 14560 .section .bss.TO6_stop,"aw",%nobits
- 14561 .align 2
- 14564 TO6_stop:
- 14565 0000 00000000 .space 4
- 14566 .global TO6_before
- 14567 .section .bss.TO6_before,"aw",%nobits
- 14568 .align 2
- 14571 TO6_before:
- 14572 0000 00000000 .space 4
- 14573 .global TO6
- 14574 .section .bss.TO6,"aw",%nobits
- 14575 .align 2
- 14578 TO6:
- 14579 0000 00000000 .space 4
- 14580 .global huart8
- 14581 .section .bss.huart8,"aw",%nobits
- 14582 .align 2
- 14585 huart8:
- 14586 0000 00000000 .space 136
- 14586 00000000
- 14586 00000000
- 14586 00000000
- 14586 00000000
- 14587 .global htim11
- 14588 .section .bss.htim11,"aw",%nobits
- 14589 .align 2
- 14592 htim11:
- 14593 0000 00000000 .space 76
- 14593 00000000
- 14593 00000000
- 14593 00000000
- 14593 00000000
- 14594 .global htim10
- 14595 .section .bss.htim10,"aw",%nobits
- 14596 .align 2
- 14599 htim10:
- 14600 0000 00000000 .space 76
- 14600 00000000
- 14600 00000000
- 14600 00000000
- 14600 00000000
- ARM GAS /tmp/ccLSPxIe.s page 686
-
-
- 14601 .global htim1
- 14602 .section .bss.htim1,"aw",%nobits
- 14603 .align 2
- 14606 htim1:
- 14607 0000 00000000 .space 76
- 14607 00000000
- 14607 00000000
- 14607 00000000
- 14607 00000000
- 14608 .global htim8
- 14609 .section .bss.htim8,"aw",%nobits
- 14610 .align 2
- 14613 htim8:
- 14614 0000 00000000 .space 76
- 14614 00000000
- 14614 00000000
- 14614 00000000
- 14614 00000000
- 14615 .global htim4
- 14616 .section .bss.htim4,"aw",%nobits
- 14617 .align 2
- 14620 htim4:
- 14621 0000 00000000 .space 76
- 14621 00000000
- 14621 00000000
- 14621 00000000
- 14621 00000000
- 14622 .global hsd1
- 14623 .section .bss.hsd1,"aw",%nobits
- 14624 .align 2
- 14627 hsd1:
- 14628 0000 00000000 .space 132
- 14628 00000000
- 14628 00000000
- 14628 00000000
- 14628 00000000
- 14629 .global hadc3
- 14630 .section .bss.hadc3,"aw",%nobits
- 14631 .align 2
- 14634 hadc3:
- 14635 0000 00000000 .space 72
- 14635 00000000
- 14635 00000000
- 14635 00000000
- 14635 00000000
- 14636 .global hadc1
- 14637 .section .bss.hadc1,"aw",%nobits
- 14638 .align 2
- 14641 hadc1:
- 14642 0000 00000000 .space 72
- 14642 00000000
- 14642 00000000
- 14642 00000000
- 14642 00000000
- 14643 .text
- 14644 .Letext0:
- 14645 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- ARM GAS /tmp/ccLSPxIe.s page 687
-
-
- 14646 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 14647 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- 14648 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 14649 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
- 14650 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
- 14651 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- 14652 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 14653 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
- 14654 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
- 14655 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
- 14656 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
- 14657 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
- 14658 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 14659 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h"
- 14660 .file 24 "Inc/main.h"
- 14661 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h"
- 14662 .file 26 "Inc/File_Handling.h"
- 14663 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
- 14664 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- 14665 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h"
- 14666 .file 30 "Inc/fatfs.h"
- 14667 .file 31 ""
- ARM GAS /tmp/ccLSPxIe.s page 688
+ 3128 .loc 8 562 3 is_stmt 0 view .LVU1040
+ 3129 .LBE277:
+ 3130 .LBE276:
+ 967:Src/main.c ****
+ 3131 .loc 1 967 1 view .LVU1041
+ 3132 0170 34B0 add sp, sp, #208
+ 3133 .LCFI41:
+ 3134 .cfi_remember_state
+ 3135 .cfi_def_cfa_offset 24
+ 3136 @ sp needed
+ 3137 0172 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
+ 3138 .L77:
+ 3139 .LCFI42:
+ 3140 .cfi_restore_state
+ 898:Src/main.c **** }
+ 3141 .loc 1 898 5 is_stmt 1 view .LVU1042
+ 3142 0176 FFF7FEFF bl Error_Handler
+ 3143 .LVL161:
+ 3144 .L79:
+ 3145 017a 00BF .align 2
+ 3146 .L78:
+ 3147 017c 00380240 .word 1073887232
+ 3148 0180 00000240 .word 1073872896
+ ARM GAS /tmp/ccDGOsZt.s page 292
+
+
+ 3149 0184 00640240 .word 1073898496
+ 3150 0188 00ED00E0 .word -536810240
+ 3151 018c 00E100E0 .word -536813312
+ 3152 .cfi_endproc
+ 3153 .LFE1198:
+ 3155 .section .text.MX_UART8_Init,"ax",%progbits
+ 3156 .align 1
+ 3157 .syntax unified
+ 3158 .thumb
+ 3159 .thumb_func
+ 3161 MX_UART8_Init:
+ 3162 .LFB1197:
+ 846:Src/main.c ****
+ 3163 .loc 1 846 1 view -0
+ 3164 .cfi_startproc
+ 3165 @ args = 0, pretend = 0, frame = 0
+ 3166 @ frame_needed = 0, uses_anonymous_args = 0
+ 3167 0000 08B5 push {r3, lr}
+ 3168 .LCFI43:
+ 3169 .cfi_def_cfa_offset 8
+ 3170 .cfi_offset 3, -8
+ 3171 .cfi_offset 14, -4
+ 855:Src/main.c **** huart8.Init.BaudRate = 115200;
+ 3172 .loc 1 855 3 view .LVU1044
+ 855:Src/main.c **** huart8.Init.BaudRate = 115200;
+ 3173 .loc 1 855 19 is_stmt 0 view .LVU1045
+ 3174 0002 0B48 ldr r0, .L84
+ 3175 0004 0B4B ldr r3, .L84+4
+ 3176 0006 0360 str r3, [r0]
+ 856:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
+ 3177 .loc 1 856 3 is_stmt 1 view .LVU1046
+ 856:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B;
+ 3178 .loc 1 856 24 is_stmt 0 view .LVU1047
+ 3179 0008 4FF4E133 mov r3, #115200
+ 3180 000c 4360 str r3, [r0, #4]
+ 857:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
+ 3181 .loc 1 857 3 is_stmt 1 view .LVU1048
+ 857:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1;
+ 3182 .loc 1 857 26 is_stmt 0 view .LVU1049
+ 3183 000e 0023 movs r3, #0
+ 3184 0010 8360 str r3, [r0, #8]
+ 858:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
+ 3185 .loc 1 858 3 is_stmt 1 view .LVU1050
+ 858:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE;
+ 3186 .loc 1 858 24 is_stmt 0 view .LVU1051
+ 3187 0012 C360 str r3, [r0, #12]
+ 859:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
+ 3188 .loc 1 859 3 is_stmt 1 view .LVU1052
+ 859:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX;
+ 3189 .loc 1 859 22 is_stmt 0 view .LVU1053
+ 3190 0014 0361 str r3, [r0, #16]
+ 860:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 3191 .loc 1 860 3 is_stmt 1 view .LVU1054
+ 860:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE;
+ 3192 .loc 1 860 20 is_stmt 0 view .LVU1055
+ 3193 0016 0C22 movs r2, #12
+ 3194 0018 4261 str r2, [r0, #20]
+ ARM GAS /tmp/ccDGOsZt.s page 293
+
+
+ 861:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+ 3195 .loc 1 861 3 is_stmt 1 view .LVU1056
+ 861:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16;
+ 3196 .loc 1 861 25 is_stmt 0 view .LVU1057
+ 3197 001a 8361 str r3, [r0, #24]
+ 862:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 3198 .loc 1 862 3 is_stmt 1 view .LVU1058
+ 862:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
+ 3199 .loc 1 862 28 is_stmt 0 view .LVU1059
+ 3200 001c C361 str r3, [r0, #28]
+ 863:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 3201 .loc 1 863 3 is_stmt 1 view .LVU1060
+ 863:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
+ 3202 .loc 1 863 30 is_stmt 0 view .LVU1061
+ 3203 001e 0362 str r3, [r0, #32]
+ 864:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
+ 3204 .loc 1 864 3 is_stmt 1 view .LVU1062
+ 864:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK)
+ 3205 .loc 1 864 38 is_stmt 0 view .LVU1063
+ 3206 0020 4362 str r3, [r0, #36]
+ 865:Src/main.c **** {
+ 3207 .loc 1 865 3 is_stmt 1 view .LVU1064
+ 865:Src/main.c **** {
+ 3208 .loc 1 865 7 is_stmt 0 view .LVU1065
+ 3209 0022 FFF7FEFF bl HAL_UART_Init
+ 3210 .LVL162:
+ 865:Src/main.c **** {
+ 3211 .loc 1 865 6 discriminator 1 view .LVU1066
+ 3212 0026 00B9 cbnz r0, .L83
+ 873:Src/main.c ****
+ 3213 .loc 1 873 1 view .LVU1067
+ 3214 0028 08BD pop {r3, pc}
+ 3215 .L83:
+ 867:Src/main.c **** }
+ 3216 .loc 1 867 5 is_stmt 1 view .LVU1068
+ 3217 002a FFF7FEFF bl Error_Handler
+ 3218 .LVL163:
+ 3219 .L85:
+ 3220 002e 00BF .align 2
+ 3221 .L84:
+ 3222 0030 00000000 .word huart8
+ 3223 0034 007C0040 .word 1073773568
+ 3224 .cfi_endproc
+ 3225 .LFE1197:
+ 3227 .section .text.MX_TIM1_Init,"ax",%progbits
+ 3228 .align 1
+ 3229 .syntax unified
+ 3230 .thumb
+ 3231 .thumb_func
+ 3233 MX_TIM1_Init:
+ 3234 .LFB1196:
+ 777:Src/main.c ****
+ 3235 .loc 1 777 1 view -0
+ 3236 .cfi_startproc
+ 3237 @ args = 0, pretend = 0, frame = 88
+ 3238 @ frame_needed = 0, uses_anonymous_args = 0
+ 3239 0000 10B5 push {r4, lr}
+ ARM GAS /tmp/ccDGOsZt.s page 294
+
+
+ 3240 .LCFI44:
+ 3241 .cfi_def_cfa_offset 8
+ 3242 .cfi_offset 4, -8
+ 3243 .cfi_offset 14, -4
+ 3244 0002 96B0 sub sp, sp, #88
+ 3245 .LCFI45:
+ 3246 .cfi_def_cfa_offset 96
+ 783:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
+ 3247 .loc 1 783 3 view .LVU1070
+ 783:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0};
+ 3248 .loc 1 783 26 is_stmt 0 view .LVU1071
+ 3249 0004 0024 movs r4, #0
+ 3250 0006 1294 str r4, [sp, #72]
+ 3251 0008 1394 str r4, [sp, #76]
+ 3252 000a 1494 str r4, [sp, #80]
+ 3253 000c 1594 str r4, [sp, #84]
+ 784:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 3254 .loc 1 784 3 is_stmt 1 view .LVU1072
+ 784:Src/main.c **** TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
+ 3255 .loc 1 784 22 is_stmt 0 view .LVU1073
+ 3256 000e 0B94 str r4, [sp, #44]
+ 3257 0010 0C94 str r4, [sp, #48]
+ 3258 0012 0D94 str r4, [sp, #52]
+ 3259 0014 0E94 str r4, [sp, #56]
+ 3260 0016 0F94 str r4, [sp, #60]
+ 3261 0018 1094 str r4, [sp, #64]
+ 3262 001a 1194 str r4, [sp, #68]
+ 785:Src/main.c ****
+ 3263 .loc 1 785 3 is_stmt 1 view .LVU1074
+ 785:Src/main.c ****
+ 3264 .loc 1 785 34 is_stmt 0 view .LVU1075
+ 3265 001c 2C22 movs r2, #44
+ 3266 001e 2146 mov r1, r4
+ 3267 0020 6846 mov r0, sp
+ 3268 0022 FFF7FEFF bl memset
+ 3269 .LVL164:
+ 790:Src/main.c **** htim1.Init.Prescaler = 0;
+ 3270 .loc 1 790 3 is_stmt 1 view .LVU1076
+ 790:Src/main.c **** htim1.Init.Prescaler = 0;
+ 3271 .loc 1 790 18 is_stmt 0 view .LVU1077
+ 3272 0026 2548 ldr r0, .L98
+ 3273 0028 254B ldr r3, .L98+4
+ 3274 002a 0360 str r3, [r0]
+ 791:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 3275 .loc 1 791 3 is_stmt 1 view .LVU1078
+ 791:Src/main.c **** htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+ 3276 .loc 1 791 24 is_stmt 0 view .LVU1079
+ 3277 002c 4460 str r4, [r0, #4]
+ 792:Src/main.c **** htim1.Init.Period = 8;
+ 3278 .loc 1 792 3 is_stmt 1 view .LVU1080
+ 792:Src/main.c **** htim1.Init.Period = 8;
+ 3279 .loc 1 792 26 is_stmt 0 view .LVU1081
+ 3280 002e 8460 str r4, [r0, #8]
+ 793:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 3281 .loc 1 793 3 is_stmt 1 view .LVU1082
+ 793:Src/main.c **** htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+ 3282 .loc 1 793 21 is_stmt 0 view .LVU1083
+ ARM GAS /tmp/ccDGOsZt.s page 295
+
+
+ 3283 0030 0823 movs r3, #8
+ 3284 0032 C360 str r3, [r0, #12]
+ 794:Src/main.c **** htim1.Init.RepetitionCounter = 0;
+ 3285 .loc 1 794 3 is_stmt 1 view .LVU1084
+ 794:Src/main.c **** htim1.Init.RepetitionCounter = 0;
+ 3286 .loc 1 794 28 is_stmt 0 view .LVU1085
+ 3287 0034 0461 str r4, [r0, #16]
+ 795:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 3288 .loc 1 795 3 is_stmt 1 view .LVU1086
+ 795:Src/main.c **** htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+ 3289 .loc 1 795 32 is_stmt 0 view .LVU1087
+ 3290 0036 4461 str r4, [r0, #20]
+ 796:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 3291 .loc 1 796 3 is_stmt 1 view .LVU1088
+ 796:Src/main.c **** if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
+ 3292 .loc 1 796 32 is_stmt 0 view .LVU1089
+ 3293 0038 8461 str r4, [r0, #24]
+ 797:Src/main.c **** {
+ 3294 .loc 1 797 3 is_stmt 1 view .LVU1090
+ 797:Src/main.c **** {
+ 3295 .loc 1 797 7 is_stmt 0 view .LVU1091
+ 3296 003a FFF7FEFF bl HAL_TIM_Base_Init
+ 3297 .LVL165:
+ 797:Src/main.c **** {
+ 3298 .loc 1 797 6 discriminator 1 view .LVU1092
+ 3299 003e 0028 cmp r0, #0
+ 3300 0040 32D1 bne .L93
+ 801:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 3301 .loc 1 801 3 is_stmt 1 view .LVU1093
+ 801:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
+ 3302 .loc 1 801 34 is_stmt 0 view .LVU1094
+ 3303 0042 4FF48053 mov r3, #4096
+ 3304 0046 1293 str r3, [sp, #72]
+ 802:Src/main.c **** {
+ 3305 .loc 1 802 3 is_stmt 1 view .LVU1095
+ 802:Src/main.c **** {
+ 3306 .loc 1 802 7 is_stmt 0 view .LVU1096
+ 3307 0048 12A9 add r1, sp, #72
+ 3308 004a 1C48 ldr r0, .L98
+ 3309 004c FFF7FEFF bl HAL_TIM_ConfigClockSource
+ 3310 .LVL166:
+ 802:Src/main.c **** {
+ 3311 .loc 1 802 6 discriminator 1 view .LVU1097
+ 3312 0050 0028 cmp r0, #0
+ 3313 0052 2BD1 bne .L94
+ 806:Src/main.c **** {
+ 3314 .loc 1 806 3 is_stmt 1 view .LVU1098
+ 806:Src/main.c **** {
+ 3315 .loc 1 806 7 is_stmt 0 view .LVU1099
+ 3316 0054 1948 ldr r0, .L98
+ 3317 0056 FFF7FEFF bl HAL_TIM_PWM_Init
+ 3318 .LVL167:
+ 806:Src/main.c **** {
+ 3319 .loc 1 806 6 discriminator 1 view .LVU1100
+ 3320 005a 48BB cbnz r0, .L95
+ 810:Src/main.c **** sConfigOC.Pulse = 4;
+ 3321 .loc 1 810 3 is_stmt 1 view .LVU1101
+ ARM GAS /tmp/ccDGOsZt.s page 296
+
+
+ 810:Src/main.c **** sConfigOC.Pulse = 4;
+ 3322 .loc 1 810 20 is_stmt 0 view .LVU1102
+ 3323 005c 6023 movs r3, #96
+ 3324 005e 0B93 str r3, [sp, #44]
+ 811:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 3325 .loc 1 811 3 is_stmt 1 view .LVU1103
+ 811:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
+ 3326 .loc 1 811 19 is_stmt 0 view .LVU1104
+ 3327 0060 0423 movs r3, #4
+ 3328 0062 0C93 str r3, [sp, #48]
+ 812:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 3329 .loc 1 812 3 is_stmt 1 view .LVU1105
+ 812:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
+ 3330 .loc 1 812 24 is_stmt 0 view .LVU1106
+ 3331 0064 0022 movs r2, #0
+ 3332 0066 0D92 str r2, [sp, #52]
+ 813:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 3333 .loc 1 813 3 is_stmt 1 view .LVU1107
+ 813:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
+ 3334 .loc 1 813 24 is_stmt 0 view .LVU1108
+ 3335 0068 0F92 str r2, [sp, #60]
+ 814:Src/main.c **** {
+ 3336 .loc 1 814 3 is_stmt 1 view .LVU1109
+ 814:Src/main.c **** {
+ 3337 .loc 1 814 7 is_stmt 0 view .LVU1110
+ 3338 006a 0BA9 add r1, sp, #44
+ 3339 006c 1348 ldr r0, .L98
+ 3340 006e FFF7FEFF bl HAL_TIM_PWM_ConfigChannel
+ 3341 .LVL168:
+ 814:Src/main.c **** {
+ 3342 .loc 1 814 6 discriminator 1 view .LVU1111
+ 3343 0072 F8B9 cbnz r0, .L96
+ 818:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 3344 .loc 1 818 3 is_stmt 1 view .LVU1112
+ 818:Src/main.c **** sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
+ 3345 .loc 1 818 40 is_stmt 0 view .LVU1113
+ 3346 0074 0023 movs r3, #0
+ 3347 0076 0093 str r3, [sp]
+ 819:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 3348 .loc 1 819 3 is_stmt 1 view .LVU1114
+ 819:Src/main.c **** sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
+ 3349 .loc 1 819 41 is_stmt 0 view .LVU1115
+ 3350 0078 0193 str r3, [sp, #4]
+ 820:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
+ 3351 .loc 1 820 3 is_stmt 1 view .LVU1116
+ 820:Src/main.c **** sBreakDeadTimeConfig.DeadTime = 0;
+ 3352 .loc 1 820 34 is_stmt 0 view .LVU1117
+ 3353 007a 0293 str r3, [sp, #8]
+ 821:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 3354 .loc 1 821 3 is_stmt 1 view .LVU1118
+ 821:Src/main.c **** sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
+ 3355 .loc 1 821 33 is_stmt 0 view .LVU1119
+ 3356 007c 0393 str r3, [sp, #12]
+ 822:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ 3357 .loc 1 822 3 is_stmt 1 view .LVU1120
+ 822:Src/main.c **** sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
+ 3358 .loc 1 822 35 is_stmt 0 view .LVU1121
+ ARM GAS /tmp/ccDGOsZt.s page 297
+
+
+ 3359 007e 0493 str r3, [sp, #16]
+ 823:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
+ 3360 .loc 1 823 3 is_stmt 1 view .LVU1122
+ 823:Src/main.c **** sBreakDeadTimeConfig.BreakFilter = 0;
+ 3361 .loc 1 823 38 is_stmt 0 view .LVU1123
+ 3362 0080 4FF40052 mov r2, #8192
+ 3363 0084 0592 str r2, [sp, #20]
+ 824:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 3364 .loc 1 824 3 is_stmt 1 view .LVU1124
+ 824:Src/main.c **** sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
+ 3365 .loc 1 824 36 is_stmt 0 view .LVU1125
+ 3366 0086 0693 str r3, [sp, #24]
+ 825:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 3367 .loc 1 825 3 is_stmt 1 view .LVU1126
+ 825:Src/main.c **** sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
+ 3368 .loc 1 825 36 is_stmt 0 view .LVU1127
+ 3369 0088 0793 str r3, [sp, #28]
+ 826:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
+ 3370 .loc 1 826 3 is_stmt 1 view .LVU1128
+ 826:Src/main.c **** sBreakDeadTimeConfig.Break2Filter = 0;
+ 3371 .loc 1 826 39 is_stmt 0 view .LVU1129
+ 3372 008a 4FF00072 mov r2, #33554432
+ 3373 008e 0892 str r2, [sp, #32]
+ 827:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 3374 .loc 1 827 3 is_stmt 1 view .LVU1130
+ 827:Src/main.c **** sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
+ 3375 .loc 1 827 37 is_stmt 0 view .LVU1131
+ 3376 0090 0993 str r3, [sp, #36]
+ 828:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+ 3377 .loc 1 828 3 is_stmt 1 view .LVU1132
+ 828:Src/main.c **** if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
+ 3378 .loc 1 828 40 is_stmt 0 view .LVU1133
+ 3379 0092 0A93 str r3, [sp, #40]
+ 829:Src/main.c **** {
+ 3380 .loc 1 829 3 is_stmt 1 view .LVU1134
+ 829:Src/main.c **** {
+ 3381 .loc 1 829 7 is_stmt 0 view .LVU1135
+ 3382 0094 6946 mov r1, sp
+ 3383 0096 0948 ldr r0, .L98
+ 3384 0098 FFF7FEFF bl HAL_TIMEx_ConfigBreakDeadTime
+ 3385 .LVL169:
+ 829:Src/main.c **** {
+ 3386 .loc 1 829 6 discriminator 1 view .LVU1136
+ 3387 009c 60B9 cbnz r0, .L97
+ 836:Src/main.c ****
+ 3388 .loc 1 836 3 is_stmt 1 view .LVU1137
+ 3389 009e 0748 ldr r0, .L98
+ 3390 00a0 FFF7FEFF bl HAL_TIM_MspPostInit
+ 3391 .LVL170:
+ 838:Src/main.c ****
+ 3392 .loc 1 838 1 is_stmt 0 view .LVU1138
+ 3393 00a4 16B0 add sp, sp, #88
+ 3394 .LCFI46:
+ 3395 .cfi_remember_state
+ 3396 .cfi_def_cfa_offset 8
+ 3397 @ sp needed
+ 3398 00a6 10BD pop {r4, pc}
+ ARM GAS /tmp/ccDGOsZt.s page 298
+
+
+ 3399 .L93:
+ 3400 .LCFI47:
+ 3401 .cfi_restore_state
+ 799:Src/main.c **** }
+ 3402 .loc 1 799 5 is_stmt 1 view .LVU1139
+ 3403 00a8 FFF7FEFF bl Error_Handler
+ 3404 .LVL171:
+ 3405 .L94:
+ 804:Src/main.c **** }
+ 3406 .loc 1 804 5 view .LVU1140
+ 3407 00ac FFF7FEFF bl Error_Handler
+ 3408 .LVL172:
+ 3409 .L95:
+ 808:Src/main.c **** }
+ 3410 .loc 1 808 5 view .LVU1141
+ 3411 00b0 FFF7FEFF bl Error_Handler
+ 3412 .LVL173:
+ 3413 .L96:
+ 816:Src/main.c **** }
+ 3414 .loc 1 816 5 view .LVU1142
+ 3415 00b4 FFF7FEFF bl Error_Handler
+ 3416 .LVL174:
+ 3417 .L97:
+ 831:Src/main.c **** }
+ 3418 .loc 1 831 5 view .LVU1143
+ 3419 00b8 FFF7FEFF bl Error_Handler
+ 3420 .LVL175:
+ 3421 .L99:
+ 3422 .align 2
+ 3423 .L98:
+ 3424 00bc 00000000 .word htim1
+ 3425 00c0 00000140 .word 1073807360
+ 3426 .cfi_endproc
+ 3427 .LFE1196:
+ 3429 .section .text.SystemClock_Config,"ax",%progbits
+ 3430 .align 1
+ 3431 .global SystemClock_Config
+ 3432 .syntax unified
+ 3433 .thumb
+ 3434 .thumb_func
+ 3436 SystemClock_Config:
+ 3437 .LFB1184:
+ 142:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+ 3438 .loc 1 142 1 view -0
+ 3439 .cfi_startproc
+ 3440 @ args = 0, pretend = 0, frame = 80
+ 3441 @ frame_needed = 0, uses_anonymous_args = 0
+ 3442 0000 00B5 push {lr}
+ 3443 .LCFI48:
+ 3444 .cfi_def_cfa_offset 4
+ 3445 .cfi_offset 14, -4
+ 3446 0002 95B0 sub sp, sp, #84
+ 3447 .LCFI49:
+ 3448 .cfi_def_cfa_offset 88
+ 143:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ 3449 .loc 1 143 3 view .LVU1145
+ 143:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+ ARM GAS /tmp/ccDGOsZt.s page 299
+
+
+ 3450 .loc 1 143 22 is_stmt 0 view .LVU1146
+ 3451 0004 3422 movs r2, #52
+ 3452 0006 0021 movs r1, #0
+ 3453 0008 07A8 add r0, sp, #28
+ 3454 000a FFF7FEFF bl memset
+ 3455 .LVL176:
+ 144:Src/main.c ****
+ 3456 .loc 1 144 3 is_stmt 1 view .LVU1147
+ 144:Src/main.c ****
+ 3457 .loc 1 144 22 is_stmt 0 view .LVU1148
+ 3458 000e 0023 movs r3, #0
+ 3459 0010 0293 str r3, [sp, #8]
+ 3460 0012 0393 str r3, [sp, #12]
+ 3461 0014 0493 str r3, [sp, #16]
+ 3462 0016 0593 str r3, [sp, #20]
+ 3463 0018 0693 str r3, [sp, #24]
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3464 .loc 1 148 3 is_stmt 1 view .LVU1149
+ 3465 .LBB278:
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3466 .loc 1 148 3 view .LVU1150
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3467 .loc 1 148 3 view .LVU1151
+ 3468 001a 244B ldr r3, .L108
+ 3469 001c 1A6C ldr r2, [r3, #64]
+ 3470 001e 42F08052 orr r2, r2, #268435456
+ 3471 0022 1A64 str r2, [r3, #64]
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3472 .loc 1 148 3 view .LVU1152
+ 3473 0024 1B6C ldr r3, [r3, #64]
+ 3474 0026 03F08053 and r3, r3, #268435456
+ 3475 002a 0093 str r3, [sp]
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3476 .loc 1 148 3 view .LVU1153
+ 3477 002c 009B ldr r3, [sp]
+ 3478 .LBE278:
+ 148:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+ 3479 .loc 1 148 3 view .LVU1154
+ 149:Src/main.c ****
+ 3480 .loc 1 149 3 view .LVU1155
+ 3481 .LBB279:
+ 149:Src/main.c ****
+ 3482 .loc 1 149 3 view .LVU1156
+ 149:Src/main.c ****
+ 3483 .loc 1 149 3 view .LVU1157
+ 3484 002e 204B ldr r3, .L108+4
+ 3485 0030 1A68 ldr r2, [r3]
+ 3486 0032 42F44042 orr r2, r2, #49152
+ 3487 0036 1A60 str r2, [r3]
+ 149:Src/main.c ****
+ 3488 .loc 1 149 3 view .LVU1158
+ 3489 0038 1B68 ldr r3, [r3]
+ 3490 003a 03F44043 and r3, r3, #49152
+ 3491 003e 0193 str r3, [sp, #4]
+ 149:Src/main.c ****
+ 3492 .loc 1 149 3 view .LVU1159
+ 3493 0040 019B ldr r3, [sp, #4]
+ ARM GAS /tmp/ccDGOsZt.s page 300
+
+
+ 3494 .LBE279:
+ 149:Src/main.c ****
+ 3495 .loc 1 149 3 view .LVU1160
+ 154:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 3496 .loc 1 154 3 view .LVU1161
+ 154:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+ 3497 .loc 1 154 36 is_stmt 0 view .LVU1162
+ 3498 0042 0123 movs r3, #1
+ 3499 0044 0793 str r3, [sp, #28]
+ 155:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 3500 .loc 1 155 3 is_stmt 1 view .LVU1163
+ 155:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ 3501 .loc 1 155 30 is_stmt 0 view .LVU1164
+ 3502 0046 4FF48033 mov r3, #65536
+ 3503 004a 0893 str r3, [sp, #32]
+ 156:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 3504 .loc 1 156 3 is_stmt 1 view .LVU1165
+ 156:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+ 3505 .loc 1 156 34 is_stmt 0 view .LVU1166
+ 3506 004c 0223 movs r3, #2
+ 3507 004e 0D93 str r3, [sp, #52]
+ 157:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
+ 3508 .loc 1 157 3 is_stmt 1 view .LVU1167
+ 157:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25;
+ 3509 .loc 1 157 35 is_stmt 0 view .LVU1168
+ 3510 0050 4FF48002 mov r2, #4194304
+ 3511 0054 0E92 str r2, [sp, #56]
+ 158:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
+ 3512 .loc 1 158 3 is_stmt 1 view .LVU1169
+ 158:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368;
+ 3513 .loc 1 158 30 is_stmt 0 view .LVU1170
+ 3514 0056 1922 movs r2, #25
+ 3515 0058 0F92 str r2, [sp, #60]
+ 159:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 3516 .loc 1 159 3 is_stmt 1 view .LVU1171
+ 159:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ 3517 .loc 1 159 30 is_stmt 0 view .LVU1172
+ 3518 005a 4FF4B872 mov r2, #368
+ 3519 005e 1092 str r2, [sp, #64]
+ 160:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
+ 3520 .loc 1 160 3 is_stmt 1 view .LVU1173
+ 160:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8;
+ 3521 .loc 1 160 30 is_stmt 0 view .LVU1174
+ 3522 0060 1193 str r3, [sp, #68]
+ 161:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
+ 3523 .loc 1 161 3 is_stmt 1 view .LVU1175
+ 161:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2;
+ 3524 .loc 1 161 30 is_stmt 0 view .LVU1176
+ 3525 0062 0822 movs r2, #8
+ 3526 0064 1292 str r2, [sp, #72]
+ 162:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 3527 .loc 1 162 3 is_stmt 1 view .LVU1177
+ 162:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+ 3528 .loc 1 162 30 is_stmt 0 view .LVU1178
+ 3529 0066 1393 str r3, [sp, #76]
+ 163:Src/main.c **** {
+ 3530 .loc 1 163 3 is_stmt 1 view .LVU1179
+ ARM GAS /tmp/ccDGOsZt.s page 301
+
+
+ 163:Src/main.c **** {
+ 3531 .loc 1 163 7 is_stmt 0 view .LVU1180
+ 3532 0068 07A8 add r0, sp, #28
+ 3533 006a FFF7FEFF bl HAL_RCC_OscConfig
+ 3534 .LVL177:
+ 163:Src/main.c **** {
+ 3535 .loc 1 163 6 discriminator 1 view .LVU1181
+ 3536 006e B0B9 cbnz r0, .L105
+ 170:Src/main.c **** {
+ 3537 .loc 1 170 3 is_stmt 1 view .LVU1182
+ 170:Src/main.c **** {
+ 3538 .loc 1 170 7 is_stmt 0 view .LVU1183
+ 3539 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive
+ 3540 .LVL178:
+ 170:Src/main.c **** {
+ 3541 .loc 1 170 6 discriminator 1 view .LVU1184
+ 3542 0074 A8B9 cbnz r0, .L106
+ 177:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 3543 .loc 1 177 3 is_stmt 1 view .LVU1185
+ 177:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+ 3544 .loc 1 177 31 is_stmt 0 view .LVU1186
+ 3545 0076 0F23 movs r3, #15
+ 3546 0078 0293 str r3, [sp, #8]
+ 179:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 3547 .loc 1 179 3 is_stmt 1 view .LVU1187
+ 179:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ 3548 .loc 1 179 34 is_stmt 0 view .LVU1188
+ 3549 007a 0223 movs r3, #2
+ 3550 007c 0393 str r3, [sp, #12]
+ 180:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 3551 .loc 1 180 3 is_stmt 1 view .LVU1189
+ 180:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ 3552 .loc 1 180 35 is_stmt 0 view .LVU1190
+ 3553 007e 0023 movs r3, #0
+ 3554 0080 0493 str r3, [sp, #16]
+ 181:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 3555 .loc 1 181 3 is_stmt 1 view .LVU1191
+ 181:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ 3556 .loc 1 181 36 is_stmt 0 view .LVU1192
+ 3557 0082 4FF4A053 mov r3, #5120
+ 3558 0086 0593 str r3, [sp, #20]
+ 182:Src/main.c ****
+ 3559 .loc 1 182 3 is_stmt 1 view .LVU1193
+ 182:Src/main.c ****
+ 3560 .loc 1 182 36 is_stmt 0 view .LVU1194
+ 3561 0088 4FF48053 mov r3, #4096
+ 3562 008c 0693 str r3, [sp, #24]
+ 184:Src/main.c **** {
+ 3563 .loc 1 184 3 is_stmt 1 view .LVU1195
+ 184:Src/main.c **** {
+ 3564 .loc 1 184 7 is_stmt 0 view .LVU1196
+ 3565 008e 0621 movs r1, #6
+ 3566 0090 02A8 add r0, sp, #8
+ 3567 0092 FFF7FEFF bl HAL_RCC_ClockConfig
+ 3568 .LVL179:
+ 184:Src/main.c **** {
+ 3569 .loc 1 184 6 discriminator 1 view .LVU1197
+ ARM GAS /tmp/ccDGOsZt.s page 302
+
+
+ 3570 0096 30B9 cbnz r0, .L107
+ 188:Src/main.c ****
+ 3571 .loc 1 188 1 view .LVU1198
+ 3572 0098 15B0 add sp, sp, #84
+ 3573 .LCFI50:
+ 3574 .cfi_remember_state
+ 3575 .cfi_def_cfa_offset 4
+ 3576 @ sp needed
+ 3577 009a 5DF804FB ldr pc, [sp], #4
+ 3578 .L105:
+ 3579 .LCFI51:
+ 3580 .cfi_restore_state
+ 165:Src/main.c **** }
+ 3581 .loc 1 165 5 is_stmt 1 view .LVU1199
+ 3582 009e FFF7FEFF bl Error_Handler
+ 3583 .LVL180:
+ 3584 .L106:
+ 172:Src/main.c **** }
+ 3585 .loc 1 172 5 view .LVU1200
+ 3586 00a2 FFF7FEFF bl Error_Handler
+ 3587 .LVL181:
+ 3588 .L107:
+ 186:Src/main.c **** }
+ 3589 .loc 1 186 5 view .LVU1201
+ 3590 00a6 FFF7FEFF bl Error_Handler
+ 3591 .LVL182:
+ 3592 .L109:
+ 3593 00aa 00BF .align 2
+ 3594 .L108:
+ 3595 00ac 00380240 .word 1073887232
+ 3596 00b0 00700040 .word 1073770496
+ 3597 .cfi_endproc
+ 3598 .LFE1184:
+ 3600 .section .text.main,"ax",%progbits
+ 3601 .align 1
+ 3602 .global main
+ 3603 .syntax unified
+ 3604 .thumb
+ 3605 .thumb_func
+ 3607 main:
+ 3608 .LFB1183:
+ 86:Src/main.c **** /* MCU Configuration--------------------------------------------------------*/
+ 3609 .loc 1 86 1 view -0
+ 3610 .cfi_startproc
+ 3611 @ Volatile: function does not return.
+ 3612 @ args = 0, pretend = 0, frame = 0
+ 3613 @ frame_needed = 0, uses_anonymous_args = 0
+ 3614 0000 08B5 push {r3, lr}
+ 3615 .LCFI52:
+ 3616 .cfi_def_cfa_offset 8
+ 3617 .cfi_offset 3, -8
+ 3618 .cfi_offset 14, -4
+ 90:Src/main.c ****
+ 3619 .loc 1 90 3 view .LVU1203
+ 3620 0002 FFF7FEFF bl HAL_Init
+ 3621 .LVL183:
+ 97:Src/main.c ****
+ ARM GAS /tmp/ccDGOsZt.s page 303
+
+
+ 3622 .loc 1 97 3 view .LVU1204
+ 3623 0006 FFF7FEFF bl SystemClock_Config
+ 3624 .LVL184:
+ 104:Src/main.c **** MX_DMA_Init();
+ 3625 .loc 1 104 3 view .LVU1205
+ 3626 000a FFF7FEFF bl MX_GPIO_Init
+ 3627 .LVL185:
+ 105:Src/main.c **** MX_SPI4_Init();
+ 3628 .loc 1 105 3 view .LVU1206
+ 3629 000e FFF7FEFF bl MX_DMA_Init
+ 3630 .LVL186:
+ 106:Src/main.c **** MX_FATFS_Init();
+ 3631 .loc 1 106 3 view .LVU1207
+ 3632 0012 FFF7FEFF bl MX_SPI4_Init
+ 3633 .LVL187:
+ 107:Src/main.c **** MX_TIM2_Init();
+ 3634 .loc 1 107 3 view .LVU1208
+ 3635 0016 FFF7FEFF bl MX_FATFS_Init
+ 3636 .LVL188:
+ 108:Src/main.c **** MX_TIM5_Init();
+ 3637 .loc 1 108 3 view .LVU1209
+ 3638 001a FFF7FEFF bl MX_TIM2_Init
+ 3639 .LVL189:
+ 109:Src/main.c **** MX_ADC1_Init();
+ 3640 .loc 1 109 3 view .LVU1210
+ 3641 001e FFF7FEFF bl MX_TIM5_Init
+ 3642 .LVL190:
+ 110:Src/main.c **** MX_ADC3_Init();
+ 3643 .loc 1 110 3 view .LVU1211
+ 3644 0022 FFF7FEFF bl MX_ADC1_Init
+ 3645 .LVL191:
+ 111:Src/main.c **** MX_SPI2_Init();
+ 3646 .loc 1 111 3 view .LVU1212
+ 3647 0026 FFF7FEFF bl MX_ADC3_Init
+ 3648 .LVL192:
+ 112:Src/main.c **** MX_SPI5_Init();
+ 3649 .loc 1 112 3 view .LVU1213
+ 3650 002a FFF7FEFF bl MX_SPI2_Init
+ 3651 .LVL193:
+ 113:Src/main.c **** MX_SPI6_Init();
+ 3652 .loc 1 113 3 view .LVU1214
+ 3653 002e FFF7FEFF bl MX_SPI5_Init
+ 3654 .LVL194:
+ 114:Src/main.c **** MX_USART1_UART_Init();
+ 3655 .loc 1 114 3 view .LVU1215
+ 3656 0032 FFF7FEFF bl MX_SPI6_Init
+ 3657 .LVL195:
+ 115:Src/main.c **** MX_SDMMC1_SD_Init();
+ 3658 .loc 1 115 3 view .LVU1216
+ 3659 0036 FFF7FEFF bl MX_USART1_UART_Init
+ 3660 .LVL196:
+ 116:Src/main.c **** MX_TIM7_Init();
+ 3661 .loc 1 116 3 view .LVU1217
+ 3662 003a FFF7FEFF bl MX_SDMMC1_SD_Init
+ 3663 .LVL197:
+ 117:Src/main.c **** MX_TIM6_Init();
+ 3664 .loc 1 117 3 view .LVU1218
+ ARM GAS /tmp/ccDGOsZt.s page 304
+
+
+ 3665 003e FFF7FEFF bl MX_TIM7_Init
+ 3666 .LVL198:
+ 118:Src/main.c **** MX_UART8_Init();
+ 3667 .loc 1 118 3 view .LVU1219
+ 3668 0042 FFF7FEFF bl MX_TIM6_Init
+ 3669 .LVL199:
+ 119:Src/main.c **** MX_TIM1_Init();
+ 3670 .loc 1 119 3 view .LVU1220
+ 3671 0046 FFF7FEFF bl MX_UART8_Init
+ 3672 .LVL200:
+ 120:Src/main.c **** /* USER CODE BEGIN 2 */
+ 3673 .loc 1 120 3 view .LVU1221
+ 3674 004a FFF7FEFF bl MX_TIM1_Init
+ 3675 .LVL201:
+ 122:Src/main.c **** /* USER CODE END 2 */
+ 3676 .loc 1 122 3 view .LVU1222
+ 3677 004e FFF7FEFF bl app_init
+ 3678 .LVL202:
+ 3679 .L111:
+ 127:Src/main.c **** {
+ 3680 .loc 1 127 3 view .LVU1223
+ 129:Src/main.c **** /* USER CODE END WHILE */
+ 3681 .loc 1 129 5 discriminator 1 view .LVU1224
+ 3682 0052 FFF7FEFF bl app_run_once
+ 3683 .LVL203:
+ 127:Src/main.c **** {
+ 3684 .loc 1 127 9 view .LVU1225
+ 3685 0056 FCE7 b .L111
+ 3686 .cfi_endproc
+ 3687 .LFE1183:
+ 3689 .global huart8
+ 3690 .section .bss.huart8,"aw",%nobits
+ 3691 .align 2
+ 3694 huart8:
+ 3695 0000 00000000 .space 136
+ 3695 00000000
+ 3695 00000000
+ 3695 00000000
+ 3695 00000000
+ 3696 .global htim1
+ 3697 .section .bss.htim1,"aw",%nobits
+ 3698 .align 2
+ 3701 htim1:
+ 3702 0000 00000000 .space 76
+ 3702 00000000
+ 3702 00000000
+ 3702 00000000
+ 3702 00000000
+ 3703 .global hsd1
+ 3704 .section .bss.hsd1,"aw",%nobits
+ 3705 .align 2
+ 3708 hsd1:
+ 3709 0000 00000000 .space 132
+ 3709 00000000
+ 3709 00000000
+ 3709 00000000
+ 3709 00000000
+ ARM GAS /tmp/ccDGOsZt.s page 305
+
+
+ 3710 .global hadc3
+ 3711 .section .bss.hadc3,"aw",%nobits
+ 3712 .align 2
+ 3715 hadc3:
+ 3716 0000 00000000 .space 72
+ 3716 00000000
+ 3716 00000000
+ 3716 00000000
+ 3716 00000000
+ 3717 .global hadc1
+ 3718 .section .bss.hadc1,"aw",%nobits
+ 3719 .align 2
+ 3722 hadc1:
+ 3723 0000 00000000 .space 72
+ 3723 00000000
+ 3723 00000000
+ 3723 00000000
+ 3723 00000000
+ 3724 .text
+ 3725 .Letext0:
+ 3726 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 3727 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 3728 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
+ 3729 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 3730 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
+ 3731 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
+ 3732 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
+ 3733 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 3734 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
+ 3735 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
+ 3736 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
+ 3737 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
+ 3738 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
+ 3739 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 3740 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h"
+ 3741 .file 24 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
+ 3742 .file 25 "Inc/main.h"
+ 3743 .file 26 "App/Core/app_core.h"
+ 3744 .file 27 "Inc/fatfs.h"
+ 3745 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h"
+ 3746 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
+ 3747 .file 30 ""
+ ARM GAS /tmp/ccDGOsZt.s page 306
DEFINED SYMBOLS
*ABS*:00000000 main.c
- /tmp/ccLSPxIe.s:20 .text.NVIC_EncodePriority:00000000 $t
- /tmp/ccLSPxIe.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
- /tmp/ccLSPxIe.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t
- /tmp/ccLSPxIe.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init
- /tmp/ccLSPxIe.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d
- /tmp/ccLSPxIe.s:14627 .bss.hsd1:00000000 hsd1
- /tmp/ccLSPxIe.s:137 .text.MX_DMA_Init:00000000 $t
- /tmp/ccLSPxIe.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init
- /tmp/ccLSPxIe.s:238 .text.MX_DMA_Init:0000003c $d
- /tmp/ccLSPxIe.s:245 .text.Decode_task:00000000 $t
- /tmp/ccLSPxIe.s:250 .text.Decode_task:00000000 Decode_task
- /tmp/ccLSPxIe.s:527 .text.Decode_task:00000150 $d
- /tmp/ccLSPxIe.s:14293 .bss.task:00000000 task
- /tmp/ccLSPxIe.s:14501 .bss.TO10_counter:00000000 TO10_counter
- /tmp/ccLSPxIe.s:537 .text.SPI2_SetMode:00000000 $t
- /tmp/ccLSPxIe.s:542 .text.SPI2_SetMode:00000000 SPI2_SetMode
- /tmp/ccLSPxIe.s:650 .text.SPI2_SetMode:00000040 $d
- /tmp/ccLSPxIe.s:655 .text.PA4_DAC_Set:00000000 $t
- /tmp/ccLSPxIe.s:660 .text.PA4_DAC_Set:00000000 PA4_DAC_Set
- /tmp/ccLSPxIe.s:704 .text.PA4_DAC_Set:00000028 $d
- /tmp/ccLSPxIe.s:709 .text.AD9102_ResetWaveUploadState:00000000 $t
- /tmp/ccLSPxIe.s:714 .text.AD9102_ResetWaveUploadState:00000000 AD9102_ResetWaveUploadState
- /tmp/ccLSPxIe.s:739 .text.AD9102_ResetWaveUploadState:00000010 $d
- /tmp/ccLSPxIe.s:14073 .bss.ad9102_wave_upload_active:00000000 ad9102_wave_upload_active
- /tmp/ccLSPxIe.s:14068 .bss.ad9102_wave_expected_samples:00000000 ad9102_wave_expected_samples
- /tmp/ccLSPxIe.s:14062 .bss.ad9102_wave_written_samples:00000000 ad9102_wave_written_samples
- /tmp/ccLSPxIe.s:746 .text.PID_Controller_Temp:00000000 $t
- /tmp/ccLSPxIe.s:751 .text.PID_Controller_Temp:00000000 PID_Controller_Temp
- /tmp/ccLSPxIe.s:920 .text.PID_Controller_Temp:000000cc $d
- /tmp/ccLSPxIe.s:14529 .bss.TO7:00000000 TO7
- /tmp/ccLSPxIe.s:14515 .bss.TO7_PID:00000000 TO7_PID
- /tmp/ccLSPxIe.s:930 .text.AD9102_WriteReg:00000000 $t
- /tmp/ccLSPxIe.s:935 .text.AD9102_WriteReg:00000000 AD9102_WriteReg
- /tmp/ccLSPxIe.s:1198 .text.AD9102_WriteReg:000000c8 $d
- /tmp/ccLSPxIe.s:1205 .text.AD9102_WriteRegTable:00000000 $t
- /tmp/ccLSPxIe.s:1210 .text.AD9102_WriteRegTable:00000000 AD9102_WriteRegTable
- /tmp/ccLSPxIe.s:1261 .text.AD9102_WriteRegTable:00000024 $d
- /tmp/ccLSPxIe.s:14221 .rodata.ad9102_reg_addr:00000000 ad9102_reg_addr
- /tmp/ccLSPxIe.s:1266 .text.AD9102_LoadSramRamp:00000000 $t
- /tmp/ccLSPxIe.s:1271 .text.AD9102_LoadSramRamp:00000000 AD9102_LoadSramRamp
- /tmp/ccLSPxIe.s:1555 .text.AD9102_LoadSramRamp:000000d4 $d
- /tmp/ccLSPxIe.s:1560 .text.AD9102_WriteWaveUploadChunk:00000000 $t
- /tmp/ccLSPxIe.s:1565 .text.AD9102_WriteWaveUploadChunk:00000000 AD9102_WriteWaveUploadChunk
- /tmp/ccLSPxIe.s:1695 .text.AD9102_WriteWaveUploadChunk:0000006c $d
- /tmp/ccLSPxIe.s:1704 .text.AD9102_Init:00000000 $t
- /tmp/ccLSPxIe.s:1709 .text.AD9102_Init:00000000 AD9102_Init
- /tmp/ccLSPxIe.s:1790 .text.AD9102_Init:00000064 $d
- /tmp/ccLSPxIe.s:14150 .rodata.ad9102_example4_regval:00000000 ad9102_example4_regval
- /tmp/ccLSPxIe.s:1798 .text.AD9102_StartOutput:00000000 $t
- /tmp/ccLSPxIe.s:1803 .text.AD9102_StartOutput:00000000 AD9102_StartOutput
- /tmp/ccLSPxIe.s:1867 .text.AD9102_StartOutput:00000048 $d
- /tmp/ccLSPxIe.s:1872 .text.AD9102_StopOutput:00000000 $t
- /tmp/ccLSPxIe.s:1877 .text.AD9102_StopOutput:00000000 AD9102_StopOutput
- /tmp/ccLSPxIe.s:1904 .text.AD9102_StopOutput:00000018 $d
- /tmp/ccLSPxIe.s:1909 .text.AD9102_ConfigureSramPlayback:00000000 $t
- ARM GAS /tmp/ccLSPxIe.s page 689
+ /tmp/ccDGOsZt.s:20 .text.NVIC_EncodePriority:00000000 $t
+ /tmp/ccDGOsZt.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
+ /tmp/ccDGOsZt.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t
+ /tmp/ccDGOsZt.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init
+ /tmp/ccDGOsZt.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d
+ /tmp/ccDGOsZt.s:3708 .bss.hsd1:00000000 hsd1
+ /tmp/ccDGOsZt.s:137 .text.MX_DMA_Init:00000000 $t
+ /tmp/ccDGOsZt.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init
+ /tmp/ccDGOsZt.s:238 .text.MX_DMA_Init:0000003c $d
+ /tmp/ccDGOsZt.s:245 .text.MX_GPIO_Init:00000000 $t
+ /tmp/ccDGOsZt.s:250 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
+ /tmp/ccDGOsZt.s:748 .text.MX_GPIO_Init:00000274 $d
+ /tmp/ccDGOsZt.s:760 .text.MX_SPI4_Init:00000000 $t
+ /tmp/ccDGOsZt.s:765 .text.MX_SPI4_Init:00000000 MX_SPI4_Init
+ /tmp/ccDGOsZt.s:971 .text.MX_SPI4_Init:000000c8 $d
+ /tmp/ccDGOsZt.s:978 .text.MX_SPI2_Init:00000000 $t
+ /tmp/ccDGOsZt.s:983 .text.MX_SPI2_Init:00000000 MX_SPI2_Init
+ /tmp/ccDGOsZt.s:1211 .text.MX_SPI2_Init:000000dc $d
+ /tmp/ccDGOsZt.s:1218 .text.MX_SPI5_Init:00000000 $t
+ /tmp/ccDGOsZt.s:1223 .text.MX_SPI5_Init:00000000 MX_SPI5_Init
+ /tmp/ccDGOsZt.s:1428 .text.MX_SPI5_Init:000000c4 $d
+ /tmp/ccDGOsZt.s:1435 .text.MX_SPI6_Init:00000000 $t
+ /tmp/ccDGOsZt.s:1440 .text.MX_SPI6_Init:00000000 MX_SPI6_Init
+ /tmp/ccDGOsZt.s:1645 .text.MX_SPI6_Init:000000c4 $d
+ /tmp/ccDGOsZt.s:1652 .text.MX_TIM2_Init:00000000 $t
+ /tmp/ccDGOsZt.s:1657 .text.MX_TIM2_Init:00000000 MX_TIM2_Init
+ /tmp/ccDGOsZt.s:1835 .text.MX_TIM2_Init:00000088 $d
+ /tmp/ccDGOsZt.s:1844 .text.MX_TIM5_Init:00000000 $t
+ /tmp/ccDGOsZt.s:1849 .text.MX_TIM5_Init:00000000 MX_TIM5_Init
+ /tmp/ccDGOsZt.s:2026 .text.MX_TIM5_Init:00000084 $d
+ /tmp/ccDGOsZt.s:2035 .text.MX_TIM7_Init:00000000 $t
+ /tmp/ccDGOsZt.s:2040 .text.MX_TIM7_Init:00000000 MX_TIM7_Init
+ /tmp/ccDGOsZt.s:2201 .text.MX_TIM7_Init:0000007c $d
+ /tmp/ccDGOsZt.s:2209 .text.MX_TIM6_Init:00000000 $t
+ /tmp/ccDGOsZt.s:2214 .text.MX_TIM6_Init:00000000 MX_TIM6_Init
+ /tmp/ccDGOsZt.s:2375 .text.MX_TIM6_Init:0000007c $d
+ /tmp/ccDGOsZt.s:2383 .text.Error_Handler:00000000 $t
+ /tmp/ccDGOsZt.s:2389 .text.Error_Handler:00000000 Error_Handler
+ /tmp/ccDGOsZt.s:2421 .text.MX_ADC1_Init:00000000 $t
+ /tmp/ccDGOsZt.s:2426 .text.MX_ADC1_Init:00000000 MX_ADC1_Init
+ /tmp/ccDGOsZt.s:2615 .text.MX_ADC1_Init:000000bc $d
+ /tmp/ccDGOsZt.s:3722 .bss.hadc1:00000000 hadc1
+ /tmp/ccDGOsZt.s:2622 .text.MX_ADC3_Init:00000000 $t
+ /tmp/ccDGOsZt.s:2627 .text.MX_ADC3_Init:00000000 MX_ADC3_Init
+ /tmp/ccDGOsZt.s:2734 .text.MX_ADC3_Init:00000060 $d
+ /tmp/ccDGOsZt.s:3715 .bss.hadc3:00000000 hadc3
+ /tmp/ccDGOsZt.s:2741 .text.MX_USART1_UART_Init:00000000 $t
+ /tmp/ccDGOsZt.s:2746 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
+ /tmp/ccDGOsZt.s:3147 .text.MX_USART1_UART_Init:0000017c $d
+ /tmp/ccDGOsZt.s:3156 .text.MX_UART8_Init:00000000 $t
+ /tmp/ccDGOsZt.s:3161 .text.MX_UART8_Init:00000000 MX_UART8_Init
+ /tmp/ccDGOsZt.s:3222 .text.MX_UART8_Init:00000030 $d
+ /tmp/ccDGOsZt.s:3694 .bss.huart8:00000000 huart8
+ /tmp/ccDGOsZt.s:3228 .text.MX_TIM1_Init:00000000 $t
+ /tmp/ccDGOsZt.s:3233 .text.MX_TIM1_Init:00000000 MX_TIM1_Init
+ ARM GAS /tmp/ccDGOsZt.s page 307
- /tmp/ccLSPxIe.s:1914 .text.AD9102_ConfigureSramPlayback:00000000 AD9102_ConfigureSramPlayback
- /tmp/ccLSPxIe.s:2065 .text.AD9102_ConfigureSramPlayback:000000b0 $d
- /tmp/ccLSPxIe.s:14079 .rodata.ad9102_example2_regval:00000000 ad9102_example2_regval
- /tmp/ccLSPxIe.s:2070 .text.AD9102_BeginWaveUpload:00000000 $t
- /tmp/ccLSPxIe.s:2075 .text.AD9102_BeginWaveUpload:00000000 AD9102_BeginWaveUpload
- /tmp/ccLSPxIe.s:2140 .text.AD9102_BeginWaveUpload:00000040 $d
- /tmp/ccLSPxIe.s:2147 .text.AD9102_CancelWaveUpload:00000000 $t
- /tmp/ccLSPxIe.s:2152 .text.AD9102_CancelWaveUpload:00000000 AD9102_CancelWaveUpload
- /tmp/ccLSPxIe.s:2183 .text.AD9102_CancelWaveUpload:00000014 $d
- /tmp/ccLSPxIe.s:2188 .text.AD9102_ReadReg:00000000 $t
- /tmp/ccLSPxIe.s:2193 .text.AD9102_ReadReg:00000000 AD9102_ReadReg
- /tmp/ccLSPxIe.s:2465 .text.AD9102_ReadReg:000000c8 $d
- /tmp/ccLSPxIe.s:2472 .text.AD9102_ApplySram:00000000 $t
- /tmp/ccLSPxIe.s:2477 .text.AD9102_ApplySram:00000000 AD9102_ApplySram
- /tmp/ccLSPxIe.s:2594 .text.AD9102_Apply:00000000 $t
- /tmp/ccLSPxIe.s:2599 .text.AD9102_Apply:00000000 AD9102_Apply
- /tmp/ccLSPxIe.s:2715 .text.AD9102_CheckFlags:00000000 $t
- /tmp/ccLSPxIe.s:2720 .text.AD9102_CheckFlags:00000000 AD9102_CheckFlags
- /tmp/ccLSPxIe.s:2950 .text.AD9102_CommitWaveUpload:00000000 $t
- /tmp/ccLSPxIe.s:2955 .text.AD9102_CommitWaveUpload:00000000 AD9102_CommitWaveUpload
- /tmp/ccLSPxIe.s:3068 .text.AD9102_CommitWaveUpload:00000074 $d
- /tmp/ccLSPxIe.s:3075 .text.AD9102_CheckFlagsSram:00000000 $t
- /tmp/ccLSPxIe.s:3080 .text.AD9102_CheckFlagsSram:00000000 AD9102_CheckFlagsSram
- /tmp/ccLSPxIe.s:3378 .text.AD9833_WriteWord:00000000 $t
- /tmp/ccLSPxIe.s:3383 .text.AD9833_WriteWord:00000000 AD9833_WriteWord
- /tmp/ccLSPxIe.s:3531 .text.AD9833_WriteWord:00000088 $d
- /tmp/ccLSPxIe.s:3538 .text.AD9833_Apply:00000000 $t
- /tmp/ccLSPxIe.s:3543 .text.AD9833_Apply:00000000 AD9833_Apply
- /tmp/ccLSPxIe.s:3628 .text.OUT_trigger:00000000 $t
- /tmp/ccLSPxIe.s:3633 .text.OUT_trigger:00000000 OUT_trigger
- /tmp/ccLSPxIe.s:3651 .text.OUT_trigger:0000000a $d
- /tmp/ccLSPxIe.s:3661 .text.OUT_trigger:00000014 $t
- /tmp/ccLSPxIe.s:3857 .text.OUT_trigger:0000011c $d
- /tmp/ccLSPxIe.s:3863 .text.MPhD_T:00000000 $t
- /tmp/ccLSPxIe.s:3868 .text.MPhD_T:00000000 MPhD_T
- /tmp/ccLSPxIe.s:3952 .text.MPhD_T:00000056 $d
- /tmp/ccLSPxIe.s:3956 .text.MPhD_T:0000005a $t
- /tmp/ccLSPxIe.s:4499 .text.MPhD_T:00000210 $d
- /tmp/ccLSPxIe.s:4509 .text.Stop_TIM10:00000000 $t
- /tmp/ccLSPxIe.s:4514 .text.Stop_TIM10:00000000 Stop_TIM10
- /tmp/ccLSPxIe.s:4543 .text.Stop_TIM10:00000014 $d
- /tmp/ccLSPxIe.s:14599 .bss.htim10:00000000 htim10
- /tmp/ccLSPxIe.s:14431 .bss.TIM10_coflag:00000000 TIM10_coflag
- /tmp/ccLSPxIe.s:14508 .bss.TO10:00000000 TO10
- /tmp/ccLSPxIe.s:4550 .text.MX_GPIO_Init:00000000 $t
- /tmp/ccLSPxIe.s:4555 .text.MX_GPIO_Init:00000000 MX_GPIO_Init
- /tmp/ccLSPxIe.s:5053 .text.MX_GPIO_Init:00000274 $d
- /tmp/ccLSPxIe.s:5065 .text.PA4_DAC_Init:00000000 $t
- /tmp/ccLSPxIe.s:5070 .text.PA4_DAC_Init:00000000 PA4_DAC_Init
- /tmp/ccLSPxIe.s:5157 .text.PA4_DAC_Init:00000058 $d
- /tmp/ccLSPxIe.s:5165 .text.MX_SPI4_Init:00000000 $t
- /tmp/ccLSPxIe.s:5170 .text.MX_SPI4_Init:00000000 MX_SPI4_Init
- /tmp/ccLSPxIe.s:5375 .text.MX_SPI4_Init:000000c8 $d
- /tmp/ccLSPxIe.s:5382 .text.MX_SPI2_Init:00000000 $t
- /tmp/ccLSPxIe.s:5387 .text.MX_SPI2_Init:00000000 MX_SPI2_Init
- /tmp/ccLSPxIe.s:5615 .text.MX_SPI2_Init:000000dc $d
- /tmp/ccLSPxIe.s:5622 .text.MX_SPI5_Init:00000000 $t
- ARM GAS /tmp/ccLSPxIe.s page 690
-
-
- /tmp/ccLSPxIe.s:5627 .text.MX_SPI5_Init:00000000 MX_SPI5_Init
- /tmp/ccLSPxIe.s:5832 .text.MX_SPI5_Init:000000c4 $d
- /tmp/ccLSPxIe.s:5839 .text.MX_SPI6_Init:00000000 $t
- /tmp/ccLSPxIe.s:5844 .text.MX_SPI6_Init:00000000 MX_SPI6_Init
- /tmp/ccLSPxIe.s:6049 .text.MX_SPI6_Init:000000c4 $d
- /tmp/ccLSPxIe.s:6056 .text.MX_TIM2_Init:00000000 $t
- /tmp/ccLSPxIe.s:6061 .text.MX_TIM2_Init:00000000 MX_TIM2_Init
- /tmp/ccLSPxIe.s:6239 .text.MX_TIM2_Init:00000088 $d
- /tmp/ccLSPxIe.s:6248 .text.MX_TIM5_Init:00000000 $t
- /tmp/ccLSPxIe.s:6253 .text.MX_TIM5_Init:00000000 MX_TIM5_Init
- /tmp/ccLSPxIe.s:6430 .text.MX_TIM5_Init:00000084 $d
- /tmp/ccLSPxIe.s:6439 .text.MX_TIM7_Init:00000000 $t
- /tmp/ccLSPxIe.s:6444 .text.MX_TIM7_Init:00000000 MX_TIM7_Init
- /tmp/ccLSPxIe.s:6605 .text.MX_TIM7_Init:0000007c $d
- /tmp/ccLSPxIe.s:6613 .text.MX_TIM6_Init:00000000 $t
- /tmp/ccLSPxIe.s:6618 .text.MX_TIM6_Init:00000000 MX_TIM6_Init
- /tmp/ccLSPxIe.s:6779 .text.MX_TIM6_Init:0000007c $d
- /tmp/ccLSPxIe.s:6787 .rodata.Init_params.str1.4:00000000 $d
- /tmp/ccLSPxIe.s:6794 .text.Init_params:00000000 $t
- /tmp/ccLSPxIe.s:6799 .text.Init_params:00000000 Init_params
- /tmp/ccLSPxIe.s:7442 .text.Init_params:00000294 $d
- /tmp/ccLSPxIe.s:14578 .bss.TO6:00000000 TO6
- /tmp/ccLSPxIe.s:14522 .bss.TO7_before:00000000 TO7_before
- /tmp/ccLSPxIe.s:14571 .bss.TO6_before:00000000 TO6_before
- /tmp/ccLSPxIe.s:14557 .bss.TO6_uart:00000000 TO6_uart
- /tmp/ccLSPxIe.s:14449 .bss.flg_tmt:00000000 flg_tmt
- /tmp/ccLSPxIe.s:14425 .bss.UART_rec_incr:00000000 UART_rec_incr
- /tmp/ccLSPxIe.s:14370 .bss.fgoto:00000000 fgoto
- /tmp/ccLSPxIe.s:14363 .bss.sizeoffile:00000000 sizeoffile
- /tmp/ccLSPxIe.s:14443 .bss.u_tx_flg:00000000 u_tx_flg
- /tmp/ccLSPxIe.s:14437 .bss.u_rx_flg:00000000 u_rx_flg
- /tmp/ccLSPxIe.s:14397 .bss.Long_Data:00000000 Long_Data
- /tmp/ccLSPxIe.s:14321 .bss.Def_setup:00000000 Def_setup
- /tmp/ccLSPxIe.s:14342 .bss.LD1_def_setup:00000000 LD1_def_setup
- /tmp/ccLSPxIe.s:14335 .bss.LD2_def_setup:00000000 LD2_def_setup
- /tmp/ccLSPxIe.s:14328 .bss.Curr_setup:00000000 Curr_setup
- /tmp/ccLSPxIe.s:14356 .bss.LD1_curr_setup:00000000 LD1_curr_setup
- /tmp/ccLSPxIe.s:14349 .bss.LD2_curr_setup:00000000 LD2_curr_setup
- /tmp/ccLSPxIe.s:14456 .bss.UART_DATA:00000000 UART_DATA
- /tmp/ccLSPxIe.s:14550 .bss.SD_SEEK:00000000 SD_SEEK
- /tmp/ccLSPxIe.s:14543 .bss.SD_SLIDE:00000000 SD_SLIDE
- /tmp/ccLSPxIe.s:14377 .bss.test:00000000 test
- /tmp/ccLSPxIe.s:14481 .bss.CPU_state:00000000 CPU_state
- /tmp/ccLSPxIe.s:14390 .bss.COMMAND:00000000 COMMAND
- /tmp/ccLSPxIe.s:7481 .text.DS1809_Pulse:00000000 $t
- /tmp/ccLSPxIe.s:7486 .text.DS1809_Pulse:00000000 DS1809_Pulse
- /tmp/ccLSPxIe.s:7595 .text.DS1809_Pulse:00000068 $d
- /tmp/ccLSPxIe.s:7600 .text.Get_ADC:00000000 $t
- /tmp/ccLSPxIe.s:7605 .text.Get_ADC:00000000 Get_ADC
- /tmp/ccLSPxIe.s:7625 .text.Get_ADC:0000000c $d
- /tmp/ccLSPxIe.s:7631 .text.Get_ADC:00000012 $t
- /tmp/ccLSPxIe.s:7729 .text.Get_ADC:00000068 $d
- /tmp/ccLSPxIe.s:14641 .bss.hadc1:00000000 hadc1
- /tmp/ccLSPxIe.s:14634 .bss.hadc3:00000000 hadc3
- /tmp/ccLSPxIe.s:7735 .text.Set_LTEC:00000000 $t
- /tmp/ccLSPxIe.s:7741 .text.Set_LTEC:00000000 Set_LTEC
- /tmp/ccLSPxIe.s:7775 .text.Set_LTEC:00000018 $d
- ARM GAS /tmp/ccLSPxIe.s page 691
-
-
- /tmp/ccLSPxIe.s:7780 .text.Set_LTEC:0000001c $t
- /tmp/ccLSPxIe.s:8196 .text.Set_LTEC:00000168 $d
- /tmp/ccLSPxIe.s:8206 .text.Decode_uart:00000000 $t
- /tmp/ccLSPxIe.s:8211 .text.Decode_uart:00000000 Decode_uart
- /tmp/ccLSPxIe.s:8774 .text.Decode_uart:000002cc $d
- /tmp/ccLSPxIe.s:8789 .text.Advanced_Controller_Temp:00000000 $t
- /tmp/ccLSPxIe.s:8795 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp
- /tmp/ccLSPxIe.s:8964 .text.Advanced_Controller_Temp:000000cc $d
- /tmp/ccLSPxIe.s:8974 .text.CalculateChecksum:00000000 $t
- /tmp/ccLSPxIe.s:8980 .text.CalculateChecksum:00000000 CalculateChecksum
- /tmp/ccLSPxIe.s:9025 .text.CheckChecksum:00000000 $t
- /tmp/ccLSPxIe.s:9031 .text.CheckChecksum:00000000 CheckChecksum
- /tmp/ccLSPxIe.s:9093 .text.CheckChecksum:0000003c $d
- /tmp/ccLSPxIe.s:14418 .bss.UART_header:00000000 UART_header
- /tmp/ccLSPxIe.s:14411 .bss.CS_result:00000000 CS_result
- /tmp/ccLSPxIe.s:9100 .rodata.SD_SAVE.str1.4:00000000 $d
- /tmp/ccLSPxIe.s:9104 .text.SD_SAVE:00000000 $t
- /tmp/ccLSPxIe.s:9110 .text.SD_SAVE:00000000 SD_SAVE
- /tmp/ccLSPxIe.s:9179 .text.SD_SAVE:00000030 $d
- /tmp/ccLSPxIe.s:9186 .text.SD_READ:00000000 $t
- /tmp/ccLSPxIe.s:9192 .text.SD_READ:00000000 SD_READ
- /tmp/ccLSPxIe.s:9270 .text.SD_READ:0000003c $d
- /tmp/ccLSPxIe.s:9278 .text.SD_REMOVE:00000000 $t
- /tmp/ccLSPxIe.s:9284 .text.SD_REMOVE:00000000 SD_REMOVE
- /tmp/ccLSPxIe.s:9352 .text.SD_REMOVE:00000034 $d
- /tmp/ccLSPxIe.s:9359 .text.USART_TX:00000000 $t
- /tmp/ccLSPxIe.s:9365 .text.USART_TX:00000000 USART_TX
- /tmp/ccLSPxIe.s:9440 .text.USART_TX:00000028 $d
- /tmp/ccLSPxIe.s:9445 .text.USART_TX_DMA:00000000 $t
- /tmp/ccLSPxIe.s:9451 .text.USART_TX_DMA:00000000 USART_TX_DMA
- /tmp/ccLSPxIe.s:9520 .text.USART_TX_DMA:00000038 $d
- /tmp/ccLSPxIe.s:9526 .text.Error_Handler:00000000 $t
- /tmp/ccLSPxIe.s:9532 .text.Error_Handler:00000000 Error_Handler
- /tmp/ccLSPxIe.s:9563 .text.MX_ADC1_Init:00000000 $t
- /tmp/ccLSPxIe.s:9568 .text.MX_ADC1_Init:00000000 MX_ADC1_Init
- /tmp/ccLSPxIe.s:9757 .text.MX_ADC1_Init:000000bc $d
- /tmp/ccLSPxIe.s:9764 .text.MX_ADC3_Init:00000000 $t
- /tmp/ccLSPxIe.s:9769 .text.MX_ADC3_Init:00000000 MX_ADC3_Init
- /tmp/ccLSPxIe.s:9876 .text.MX_ADC3_Init:00000060 $d
- /tmp/ccLSPxIe.s:9883 .text.MX_USART1_UART_Init:00000000 $t
- /tmp/ccLSPxIe.s:9888 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init
- /tmp/ccLSPxIe.s:10287 .text.MX_USART1_UART_Init:0000017c $d
- /tmp/ccLSPxIe.s:10296 .text.MX_TIM10_Init:00000000 $t
- /tmp/ccLSPxIe.s:10301 .text.MX_TIM10_Init:00000000 MX_TIM10_Init
- /tmp/ccLSPxIe.s:10350 .text.MX_TIM10_Init:00000024 $d
- /tmp/ccLSPxIe.s:10356 .text.MX_UART8_Init:00000000 $t
- /tmp/ccLSPxIe.s:10361 .text.MX_UART8_Init:00000000 MX_UART8_Init
- /tmp/ccLSPxIe.s:10422 .text.MX_UART8_Init:00000030 $d
- /tmp/ccLSPxIe.s:14585 .bss.huart8:00000000 huart8
- /tmp/ccLSPxIe.s:10428 .text.MX_TIM8_Init:00000000 $t
- /tmp/ccLSPxIe.s:10433 .text.MX_TIM8_Init:00000000 MX_TIM8_Init
- /tmp/ccLSPxIe.s:10542 .text.MX_TIM8_Init:00000064 $d
- /tmp/ccLSPxIe.s:14613 .bss.htim8:00000000 htim8
- /tmp/ccLSPxIe.s:10548 .text.MX_TIM11_Init:00000000 $t
- /tmp/ccLSPxIe.s:10553 .text.MX_TIM11_Init:00000000 MX_TIM11_Init
- /tmp/ccLSPxIe.s:10663 .text.MX_TIM11_Init:00000068 $d
- /tmp/ccLSPxIe.s:14592 .bss.htim11:00000000 htim11
- ARM GAS /tmp/ccLSPxIe.s page 692
-
-
- /tmp/ccLSPxIe.s:10669 .text.MX_TIM4_Init:00000000 $t
- /tmp/ccLSPxIe.s:10674 .text.MX_TIM4_Init:00000000 MX_TIM4_Init
- /tmp/ccLSPxIe.s:10829 .text.MX_TIM4_Init:0000009c $d
- /tmp/ccLSPxIe.s:14620 .bss.htim4:00000000 htim4
- /tmp/ccLSPxIe.s:10835 .text.MX_TIM1_Init:00000000 $t
- /tmp/ccLSPxIe.s:10840 .text.MX_TIM1_Init:00000000 MX_TIM1_Init
- /tmp/ccLSPxIe.s:11031 .text.MX_TIM1_Init:000000bc $d
- /tmp/ccLSPxIe.s:14606 .bss.htim1:00000000 htim1
- /tmp/ccLSPxIe.s:11037 .text.SystemClock_Config:00000000 $t
- /tmp/ccLSPxIe.s:11043 .text.SystemClock_Config:00000000 SystemClock_Config
- /tmp/ccLSPxIe.s:11202 .text.SystemClock_Config:000000ac $d
- /tmp/ccLSPxIe.s:11208 .text.main:00000000 $t
- /tmp/ccLSPxIe.s:11214 .text.main:00000000 main
- /tmp/ccLSPxIe.s:11629 .text.main:00000150 $d
- /tmp/ccLSPxIe.s:11645 .text.main:00000190 $t
- /tmp/ccLSPxIe.s:11901 .text.main:000002a0 $d
- /tmp/ccLSPxIe.s:14475 .bss.CPU_state_old:00000000 CPU_state_old
- /tmp/ccLSPxIe.s:14469 .bss.UART_transmission_request:00000000 UART_transmission_request
- /tmp/ccLSPxIe.s:14463 .bss.State_Data:00000000 State_Data
- /tmp/ccLSPxIe.s:14404 .bss.temp16:00000000 temp16
- /tmp/ccLSPxIe.s:11926 .text.main:000002f8 $t
- /tmp/ccLSPxIe.s:12586 .text.main:000005c4 $d
- /tmp/ccLSPxIe.s:14314 .bss.LD1_param:00000000 LD1_param
- /tmp/ccLSPxIe.s:14307 .bss.LD2_param:00000000 LD2_param
- /tmp/ccLSPxIe.s:14564 .bss.TO6_stop:00000000 TO6_stop
- /tmp/ccLSPxIe.s:12608 .text.main:0000060c $t
- /tmp/ccLSPxIe.s:13097 .text.main:00000820 $d
- /tmp/ccLSPxIe.s:14494 .bss.TIM10_period:00000000 TIM10_period
- /tmp/ccLSPxIe.s:13120 .text.main:0000086c $t
- /tmp/ccLSPxIe.s:13632 .text.main:00000b24 $d
- /tmp/ccLSPxIe.s:14300 .bss.LD_blinker:00000000 LD_blinker
- /tmp/ccLSPxIe.s:13655 .text.main:00000b78 $t
- /tmp/ccLSPxIe.s:14033 .text.main:00000d2c $d
- /tmp/ccLSPxIe.s:14059 .bss.ad9102_wave_written_samples:00000000 $d
- /tmp/ccLSPxIe.s:14065 .bss.ad9102_wave_expected_samples:00000000 $d
- /tmp/ccLSPxIe.s:14074 .bss.ad9102_wave_upload_active:00000000 $d
- /tmp/ccLSPxIe.s:14076 .rodata.ad9102_example2_regval:00000000 $d
- /tmp/ccLSPxIe.s:14147 .rodata.ad9102_example4_regval:00000000 $d
- /tmp/ccLSPxIe.s:14218 .rodata.ad9102_reg_addr:00000000 $d
- /tmp/ccLSPxIe.s:14290 .bss.task:00000000 $d
- /tmp/ccLSPxIe.s:14297 .bss.LD_blinker:00000000 $d
- /tmp/ccLSPxIe.s:14304 .bss.LD2_param:00000000 $d
- /tmp/ccLSPxIe.s:14311 .bss.LD1_param:00000000 $d
- /tmp/ccLSPxIe.s:14318 .bss.Def_setup:00000000 $d
- /tmp/ccLSPxIe.s:14325 .bss.Curr_setup:00000000 $d
- /tmp/ccLSPxIe.s:14332 .bss.LD2_def_setup:00000000 $d
- /tmp/ccLSPxIe.s:14339 .bss.LD1_def_setup:00000000 $d
- /tmp/ccLSPxIe.s:14346 .bss.LD2_curr_setup:00000000 $d
- /tmp/ccLSPxIe.s:14353 .bss.LD1_curr_setup:00000000 $d
- /tmp/ccLSPxIe.s:14360 .bss.sizeoffile:00000000 $d
- /tmp/ccLSPxIe.s:14367 .bss.fgoto:00000000 $d
- /tmp/ccLSPxIe.s:14374 .bss.test:00000000 $d
- /tmp/ccLSPxIe.s:14383 .bss.fresult:00000000 fresult
- /tmp/ccLSPxIe.s:14384 .bss.fresult:00000000 $d
- /tmp/ccLSPxIe.s:14387 .bss.COMMAND:00000000 $d
- /tmp/ccLSPxIe.s:14394 .bss.Long_Data:00000000 $d
- /tmp/ccLSPxIe.s:14401 .bss.temp16:00000000 $d
- ARM GAS /tmp/ccLSPxIe.s page 693
-
-
- /tmp/ccLSPxIe.s:14408 .bss.CS_result:00000000 $d
- /tmp/ccLSPxIe.s:14415 .bss.UART_header:00000000 $d
- /tmp/ccLSPxIe.s:14422 .bss.UART_rec_incr:00000000 $d
- /tmp/ccLSPxIe.s:14432 .bss.TIM10_coflag:00000000 $d
- /tmp/ccLSPxIe.s:14438 .bss.u_rx_flg:00000000 $d
- /tmp/ccLSPxIe.s:14444 .bss.u_tx_flg:00000000 $d
- /tmp/ccLSPxIe.s:14450 .bss.flg_tmt:00000000 $d
- /tmp/ccLSPxIe.s:14453 .bss.UART_DATA:00000000 $d
- /tmp/ccLSPxIe.s:14460 .bss.State_Data:00000000 $d
- /tmp/ccLSPxIe.s:14470 .bss.UART_transmission_request:00000000 $d
- /tmp/ccLSPxIe.s:14476 .bss.CPU_state_old:00000000 $d
- /tmp/ccLSPxIe.s:14482 .bss.CPU_state:00000000 $d
- /tmp/ccLSPxIe.s:14487 .bss.uart_buf:00000000 uart_buf
- /tmp/ccLSPxIe.s:14488 .bss.uart_buf:00000000 $d
- /tmp/ccLSPxIe.s:14491 .bss.TIM10_period:00000000 $d
- /tmp/ccLSPxIe.s:14498 .bss.TO10_counter:00000000 $d
- /tmp/ccLSPxIe.s:14505 .bss.TO10:00000000 $d
- /tmp/ccLSPxIe.s:14512 .bss.TO7_PID:00000000 $d
- /tmp/ccLSPxIe.s:14519 .bss.TO7_before:00000000 $d
- /tmp/ccLSPxIe.s:14526 .bss.TO7:00000000 $d
- /tmp/ccLSPxIe.s:14536 .bss.temp32:00000000 temp32
- /tmp/ccLSPxIe.s:14533 .bss.temp32:00000000 $d
- /tmp/ccLSPxIe.s:14540 .bss.SD_SLIDE:00000000 $d
- /tmp/ccLSPxIe.s:14547 .bss.SD_SEEK:00000000 $d
- /tmp/ccLSPxIe.s:14554 .bss.TO6_uart:00000000 $d
- /tmp/ccLSPxIe.s:14561 .bss.TO6_stop:00000000 $d
- /tmp/ccLSPxIe.s:14568 .bss.TO6_before:00000000 $d
- /tmp/ccLSPxIe.s:14575 .bss.TO6:00000000 $d
- /tmp/ccLSPxIe.s:14582 .bss.huart8:00000000 $d
- /tmp/ccLSPxIe.s:14589 .bss.htim11:00000000 $d
- /tmp/ccLSPxIe.s:14596 .bss.htim10:00000000 $d
- /tmp/ccLSPxIe.s:14603 .bss.htim1:00000000 $d
- /tmp/ccLSPxIe.s:14610 .bss.htim8:00000000 $d
- /tmp/ccLSPxIe.s:14617 .bss.htim4:00000000 $d
- /tmp/ccLSPxIe.s:14624 .bss.hsd1:00000000 $d
- /tmp/ccLSPxIe.s:14631 .bss.hadc3:00000000 $d
- /tmp/ccLSPxIe.s:14638 .bss.hadc1:00000000 $d
+ /tmp/ccDGOsZt.s:3424 .text.MX_TIM1_Init:000000bc $d
+ /tmp/ccDGOsZt.s:3701 .bss.htim1:00000000 htim1
+ /tmp/ccDGOsZt.s:3430 .text.SystemClock_Config:00000000 $t
+ /tmp/ccDGOsZt.s:3436 .text.SystemClock_Config:00000000 SystemClock_Config
+ /tmp/ccDGOsZt.s:3595 .text.SystemClock_Config:000000ac $d
+ /tmp/ccDGOsZt.s:3601 .text.main:00000000 $t
+ /tmp/ccDGOsZt.s:3607 .text.main:00000000 main
+ /tmp/ccDGOsZt.s:3691 .bss.huart8:00000000 $d
+ /tmp/ccDGOsZt.s:3698 .bss.htim1:00000000 $d
+ /tmp/ccDGOsZt.s:3705 .bss.hsd1:00000000 $d
+ /tmp/ccDGOsZt.s:3712 .bss.hadc3:00000000 $d
+ /tmp/ccDGOsZt.s:3719 .bss.hadc1:00000000 $d
UNDEFINED SYMBOLS
HAL_GPIO_WritePin
-HAL_TIM_Base_Stop_IT
HAL_GPIO_Init
memset
LL_GPIO_Init
LL_SPI_Init
LL_TIM_Init
-HAL_GPIO_ReadPin
-Mount_SD
-Seek_Read_File
-Unmount_SD
-HAL_Delay
-HAL_ADC_Start
-HAL_ADC_PollForConversion
-HAL_ADC_GetValue
-HAL_ADC_Stop
-Remove_File
-Create_File
- ARM GAS /tmp/ccLSPxIe.s page 694
-
-
-Write_File_byte
-Update_File_byte
HAL_ADC_Init
HAL_ADC_ConfigChannel
HAL_RCCEx_PeriphCLKConfig
LL_USART_Init
-HAL_TIM_Base_Init
HAL_UART_Init
+HAL_TIM_Base_Init
HAL_TIM_ConfigClockSource
-HAL_TIMEx_MasterConfigSynchronization
HAL_TIM_PWM_Init
HAL_TIM_PWM_ConfigChannel
-HAL_TIM_MspPostInit
HAL_TIMEx_ConfigBreakDeadTime
+HAL_TIM_MspPostInit
HAL_RCC_OscConfig
HAL_PWREx_EnableOverDrive
HAL_RCC_ClockConfig
HAL_Init
MX_FATFS_Init
-HAL_TIM_PWM_Start
-HAL_TIM_Base_Start_IT
-HAL_TIM_PWM_Stop
-HAL_TIM_Base_Stop
+app_init
+app_run_once
diff --git a/build/main.o b/build/main.o
index ff09498..7c12d2f 100644
Binary files a/build/main.o and b/build/main.o differ
diff --git a/build/sd_diskio.lst b/build/sd_diskio.lst
index 0e3f477..172641c 100644
--- a/build/sd_diskio.lst
+++ b/build/sd_diskio.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccHqyWEZ.s page 1
+ARM GAS /tmp/cc1MJofu.s page 1
1 .cpu cortex-m7
@@ -26,7 +26,7 @@ ARM GAS /tmp/ccHqyWEZ.s page 1
23 .thumb_func
25 SD_CheckStatus:
26 .LVL0:
- 27 .LFB1183:
+ 27 .LFB1185:
1:Src/sd_diskio.c **** /* USER CODE BEGIN Header */
2:Src/sd_diskio.c **** /**
3:Src/sd_diskio.c **** ******************************************************************************
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccHqyWEZ.s page 1
29:Src/sd_diskio.c **** #include "sd_diskio.h"
30:Src/sd_diskio.c ****
31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/
- ARM GAS /tmp/ccHqyWEZ.s page 2
+ ARM GAS /tmp/cc1MJofu.s page 2
32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/
@@ -86,653 +86,763 @@ ARM GAS /tmp/ccHqyWEZ.s page 1
54:Src/sd_diskio.c **** /* Private variables ---------------------------------------------------------*/
55:Src/sd_diskio.c **** /* Disk status */
56:Src/sd_diskio.c **** static volatile DSTATUS Stat = STA_NOINIT;
- 57:Src/sd_diskio.c ****
- 58:Src/sd_diskio.c **** /* Private function prototypes -----------------------------------------------*/
- 59:Src/sd_diskio.c **** static DSTATUS SD_CheckStatus(BYTE lun);
- 60:Src/sd_diskio.c **** DSTATUS SD_initialize (BYTE);
- 61:Src/sd_diskio.c **** DSTATUS SD_status (BYTE);
- 62:Src/sd_diskio.c **** DRESULT SD_read (BYTE, BYTE*, DWORD, UINT);
- 63:Src/sd_diskio.c **** #if _USE_WRITE == 1
- 64:Src/sd_diskio.c **** DRESULT SD_write (BYTE, const BYTE*, DWORD, UINT);
- 65:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
- 66:Src/sd_diskio.c **** #if _USE_IOCTL == 1
- 67:Src/sd_diskio.c **** DRESULT SD_ioctl (BYTE, BYTE, void*);
- 68:Src/sd_diskio.c **** #endif /* _USE_IOCTL == 1 */
- 69:Src/sd_diskio.c ****
- 70:Src/sd_diskio.c **** const Diskio_drvTypeDef SD_Driver =
- 71:Src/sd_diskio.c **** {
- 72:Src/sd_diskio.c **** SD_initialize,
- 73:Src/sd_diskio.c **** SD_status,
- 74:Src/sd_diskio.c **** SD_read,
- 75:Src/sd_diskio.c **** #if _USE_WRITE == 1
- 76:Src/sd_diskio.c **** SD_write,
- 77:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
- 78:Src/sd_diskio.c ****
- 79:Src/sd_diskio.c **** #if _USE_IOCTL == 1
- 80:Src/sd_diskio.c **** SD_ioctl,
- 81:Src/sd_diskio.c **** #endif /* _USE_IOCTL == 1 */
- 82:Src/sd_diskio.c **** };
- 83:Src/sd_diskio.c ****
- 84:Src/sd_diskio.c **** /* USER CODE BEGIN beforeFunctionSection */
- 85:Src/sd_diskio.c **** /* can be used to modify / undefine following code or add new code */
- 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
- 87:Src/sd_diskio.c ****
- 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/
- ARM GAS /tmp/ccHqyWEZ.s page 3
+ 57:Src/sd_diskio.c **** static volatile DSTATUS g_last_initialize_status = STA_NOINIT;
+ 58:Src/sd_diskio.c **** static volatile DSTATUS g_last_status_result = STA_NOINIT;
+ 59:Src/sd_diskio.c ****
+ 60:Src/sd_diskio.c **** /* Private function prototypes -----------------------------------------------*/
+ 61:Src/sd_diskio.c **** static DSTATUS SD_CheckStatus(BYTE lun);
+ 62:Src/sd_diskio.c **** DSTATUS SD_initialize (BYTE);
+ 63:Src/sd_diskio.c **** DSTATUS SD_status (BYTE);
+ 64:Src/sd_diskio.c **** DRESULT SD_read (BYTE, BYTE*, DWORD, UINT);
+ 65:Src/sd_diskio.c **** #if _USE_WRITE == 1
+ 66:Src/sd_diskio.c **** DRESULT SD_write (BYTE, const BYTE*, DWORD, UINT);
+ 67:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
+ 68:Src/sd_diskio.c **** #if _USE_IOCTL == 1
+ 69:Src/sd_diskio.c **** DRESULT SD_ioctl (BYTE, BYTE, void*);
+ 70:Src/sd_diskio.c **** #endif /* _USE_IOCTL == 1 */
+ 71:Src/sd_diskio.c ****
+ 72:Src/sd_diskio.c **** const Diskio_drvTypeDef SD_Driver =
+ 73:Src/sd_diskio.c **** {
+ 74:Src/sd_diskio.c **** SD_initialize,
+ 75:Src/sd_diskio.c **** SD_status,
+ 76:Src/sd_diskio.c **** SD_read,
+ 77:Src/sd_diskio.c **** #if _USE_WRITE == 1
+ 78:Src/sd_diskio.c **** SD_write,
+ 79:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
+ 80:Src/sd_diskio.c ****
+ 81:Src/sd_diskio.c **** #if _USE_IOCTL == 1
+ 82:Src/sd_diskio.c **** SD_ioctl,
+ 83:Src/sd_diskio.c **** #endif /* _USE_IOCTL == 1 */
+ 84:Src/sd_diskio.c **** };
+ 85:Src/sd_diskio.c ****
+ 86:Src/sd_diskio.c **** /* USER CODE BEGIN beforeFunctionSection */
+ 87:Src/sd_diskio.c **** /* can be used to modify / undefine following code or add new code */
+ 88:Src/sd_diskio.c **** DSTATUS sd_diskio_debug_get_last_initialize_status(void)
+ ARM GAS /tmp/cc1MJofu.s page 3
- 89:Src/sd_diskio.c ****
- 90:Src/sd_diskio.c **** static DSTATUS SD_CheckStatus(BYTE lun)
- 91:Src/sd_diskio.c **** {
- 28 .loc 1 91 1 view -0
+ 89:Src/sd_diskio.c **** {
+ 90:Src/sd_diskio.c **** return g_last_initialize_status;
+ 91:Src/sd_diskio.c **** }
+ 92:Src/sd_diskio.c ****
+ 93:Src/sd_diskio.c **** DSTATUS sd_diskio_debug_get_last_status_result(void)
+ 94:Src/sd_diskio.c **** {
+ 95:Src/sd_diskio.c **** return g_last_status_result;
+ 96:Src/sd_diskio.c **** }
+ 97:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
+ 98:Src/sd_diskio.c ****
+ 99:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/
+ 100:Src/sd_diskio.c ****
+ 101:Src/sd_diskio.c **** static DSTATUS SD_CheckStatus(BYTE lun)
+ 102:Src/sd_diskio.c **** {
+ 28 .loc 1 102 1 view -0
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
- 32 .loc 1 91 1 is_stmt 0 view .LVU1
+ 32 .loc 1 102 1 is_stmt 0 view .LVU1
33 0000 08B5 push {r3, lr}
34 .LCFI0:
35 .cfi_def_cfa_offset 8
36 .cfi_offset 3, -8
37 .cfi_offset 14, -4
- 92:Src/sd_diskio.c **** Stat = STA_NOINIT;
- 38 .loc 1 92 3 is_stmt 1 view .LVU2
- 39 .loc 1 92 8 is_stmt 0 view .LVU3
+ 103:Src/sd_diskio.c **** Stat = STA_NOINIT;
+ 38 .loc 1 103 3 is_stmt 1 view .LVU2
+ 39 .loc 1 103 8 is_stmt 0 view .LVU3
40 0002 074B ldr r3, .L4
41 0004 0122 movs r2, #1
42 0006 1A70 strb r2, [r3]
- 93:Src/sd_diskio.c ****
- 94:Src/sd_diskio.c **** if(BSP_SD_GetCardState() == MSD_OK)
- 43 .loc 1 94 3 is_stmt 1 view .LVU4
- 44 .loc 1 94 6 is_stmt 0 view .LVU5
+ 104:Src/sd_diskio.c ****
+ 105:Src/sd_diskio.c **** if(BSP_SD_GetCardState() == MSD_OK)
+ 43 .loc 1 105 3 is_stmt 1 view .LVU4
+ 44 .loc 1 105 6 is_stmt 0 view .LVU5
45 0008 FFF7FEFF bl BSP_SD_GetCardState
46 .LVL1:
- 47 .loc 1 94 5 discriminator 1 view .LVU6
+ 47 .loc 1 105 5 discriminator 1 view .LVU6
48 000c 20B9 cbnz r0, .L2
- 95:Src/sd_diskio.c **** {
- 96:Src/sd_diskio.c **** Stat &= ~STA_NOINIT;
- 49 .loc 1 96 5 is_stmt 1 view .LVU7
- 50 .loc 1 96 10 is_stmt 0 view .LVU8
+ 106:Src/sd_diskio.c **** {
+ 107:Src/sd_diskio.c **** Stat &= ~STA_NOINIT;
+ 49 .loc 1 107 5 is_stmt 1 view .LVU7
+ 50 .loc 1 107 10 is_stmt 0 view .LVU8
51 000e 044A ldr r2, .L4
52 0010 1378 ldrb r3, [r2] @ zero_extendqisi2
53 0012 03F0FE03 and r3, r3, #254
54 0016 1370 strb r3, [r2]
55 .L2:
- 97:Src/sd_diskio.c **** }
- 98:Src/sd_diskio.c ****
- 99:Src/sd_diskio.c **** return Stat;
- 56 .loc 1 99 3 is_stmt 1 view .LVU9
- 57 .loc 1 99 10 is_stmt 0 view .LVU10
+ 108:Src/sd_diskio.c **** }
+ 109:Src/sd_diskio.c ****
+ 110:Src/sd_diskio.c **** return Stat;
+ 56 .loc 1 110 3 is_stmt 1 view .LVU9
+ 57 .loc 1 110 10 is_stmt 0 view .LVU10
58 0018 014B ldr r3, .L4
59 001a 1878 ldrb r0, [r3] @ zero_extendqisi2
- 100:Src/sd_diskio.c **** }
- 60 .loc 1 100 1 view .LVU11
+ 111:Src/sd_diskio.c **** }
+ 60 .loc 1 111 1 view .LVU11
61 001c 08BD pop {r3, pc}
+ ARM GAS /tmp/cc1MJofu.s page 4
+
+
62 .L5:
63 001e 00BF .align 2
64 .L4:
65 0020 00000000 .word Stat
66 .cfi_endproc
- 67 .LFE1183:
+ 67 .LFE1185:
69 .section .text.SD_initialize,"ax",%progbits
70 .align 1
71 .global SD_initialize
72 .syntax unified
73 .thumb
- ARM GAS /tmp/ccHqyWEZ.s page 4
-
-
74 .thumb_func
76 SD_initialize:
77 .LVL2:
- 78 .LFB1184:
- 101:Src/sd_diskio.c ****
- 102:Src/sd_diskio.c **** /**
- 103:Src/sd_diskio.c **** * @brief Initializes a Drive
- 104:Src/sd_diskio.c **** * @param lun : not used
- 105:Src/sd_diskio.c **** * @retval DSTATUS: Operation status
- 106:Src/sd_diskio.c **** */
- 107:Src/sd_diskio.c **** DSTATUS SD_initialize(BYTE lun)
- 108:Src/sd_diskio.c **** {
- 79 .loc 1 108 1 is_stmt 1 view -0
+ 78 .LFB1186:
+ 112:Src/sd_diskio.c ****
+ 113:Src/sd_diskio.c **** /**
+ 114:Src/sd_diskio.c **** * @brief Initializes a Drive
+ 115:Src/sd_diskio.c **** * @param lun : not used
+ 116:Src/sd_diskio.c **** * @retval DSTATUS: Operation status
+ 117:Src/sd_diskio.c **** */
+ 118:Src/sd_diskio.c **** DSTATUS SD_initialize(BYTE lun)
+ 119:Src/sd_diskio.c **** {
+ 79 .loc 1 119 1 is_stmt 1 view -0
80 .cfi_startproc
81 @ args = 0, pretend = 0, frame = 0
82 @ frame_needed = 0, uses_anonymous_args = 0
- 83 .loc 1 108 1 is_stmt 0 view .LVU13
+ 83 .loc 1 119 1 is_stmt 0 view .LVU13
84 0000 10B5 push {r4, lr}
85 .LCFI1:
86 .cfi_def_cfa_offset 8
87 .cfi_offset 4, -8
88 .cfi_offset 14, -4
89 0002 0446 mov r4, r0
- 109:Src/sd_diskio.c **** Stat = STA_NOINIT;
- 90 .loc 1 109 1 is_stmt 1 view .LVU14
- 91 .loc 1 109 6 is_stmt 0 view .LVU15
- 92 0004 074B ldr r3, .L10
+ 120:Src/sd_diskio.c **** Stat = STA_NOINIT;
+ 90 .loc 1 120 1 is_stmt 1 view .LVU14
+ 91 .loc 1 120 6 is_stmt 0 view .LVU15
+ 92 0004 094B ldr r3, .L10
93 0006 0122 movs r2, #1
94 0008 1A70 strb r2, [r3]
- 110:Src/sd_diskio.c ****
- 111:Src/sd_diskio.c **** #if !defined(DISABLE_SD_INIT)
- 112:Src/sd_diskio.c ****
- 113:Src/sd_diskio.c **** if(BSP_SD_Init() == MSD_OK)
- 95 .loc 1 113 3 is_stmt 1 view .LVU16
- 96 .loc 1 113 6 is_stmt 0 view .LVU17
+ 121:Src/sd_diskio.c ****
+ 122:Src/sd_diskio.c **** #if !defined(DISABLE_SD_INIT)
+ 123:Src/sd_diskio.c ****
+ 124:Src/sd_diskio.c **** if(BSP_SD_Init() == MSD_OK)
+ 95 .loc 1 124 3 is_stmt 1 view .LVU16
+ 96 .loc 1 124 6 is_stmt 0 view .LVU17
97 000a FFF7FEFF bl BSP_SD_Init
98 .LVL3:
- 99 .loc 1 113 5 discriminator 1 view .LVU18
- 100 000e 10B1 cbz r0, .L9
+ 99 .loc 1 124 5 discriminator 1 view .LVU18
+ 100 000e 30B1 cbz r0, .L9
101 .L7:
- 114:Src/sd_diskio.c **** {
- 115:Src/sd_diskio.c **** Stat = SD_CheckStatus(lun);
- 116:Src/sd_diskio.c **** }
- 117:Src/sd_diskio.c ****
- 118:Src/sd_diskio.c **** #else
- 119:Src/sd_diskio.c **** Stat = SD_CheckStatus(lun);
- 120:Src/sd_diskio.c **** #endif
- 121:Src/sd_diskio.c ****
- 122:Src/sd_diskio.c **** return Stat;
- 102 .loc 1 122 3 is_stmt 1 view .LVU19
- 103 .loc 1 122 10 is_stmt 0 view .LVU20
- 104 0010 044B ldr r3, .L10
- 105 0012 1878 ldrb r0, [r3] @ zero_extendqisi2
- 123:Src/sd_diskio.c **** }
- 106 .loc 1 123 1 view .LVU21
- 107 0014 10BD pop {r4, pc}
- 108 .LVL4:
- ARM GAS /tmp/ccHqyWEZ.s page 5
+ 125:Src/sd_diskio.c **** {
+ 126:Src/sd_diskio.c **** Stat = SD_CheckStatus(lun);
+ 127:Src/sd_diskio.c **** }
+ 128:Src/sd_diskio.c ****
+ 129:Src/sd_diskio.c **** #else
+ 130:Src/sd_diskio.c **** Stat = SD_CheckStatus(lun);
+ ARM GAS /tmp/cc1MJofu.s page 5
- 109 .L9:
- 115:Src/sd_diskio.c **** }
- 110 .loc 1 115 5 is_stmt 1 view .LVU22
- 115:Src/sd_diskio.c **** }
- 111 .loc 1 115 12 is_stmt 0 view .LVU23
- 112 0016 2046 mov r0, r4
- 113 0018 FFF7FEFF bl SD_CheckStatus
- 114 .LVL5:
- 115:Src/sd_diskio.c **** }
- 115 .loc 1 115 10 discriminator 1 view .LVU24
- 116 001c 014B ldr r3, .L10
- 117 001e 1870 strb r0, [r3]
- 118 0020 F6E7 b .L7
- 119 .L11:
- 120 0022 00BF .align 2
- 121 .L10:
- 122 0024 00000000 .word Stat
- 123 .cfi_endproc
- 124 .LFE1184:
- 126 .section .text.SD_status,"ax",%progbits
- 127 .align 1
- 128 .global SD_status
- 129 .syntax unified
- 130 .thumb
- 131 .thumb_func
- 133 SD_status:
- 134 .LVL6:
- 135 .LFB1185:
- 124:Src/sd_diskio.c ****
- 125:Src/sd_diskio.c **** /**
- 126:Src/sd_diskio.c **** * @brief Gets Disk Status
- 127:Src/sd_diskio.c **** * @param lun : not used
- 128:Src/sd_diskio.c **** * @retval DSTATUS: Operation status
- 129:Src/sd_diskio.c **** */
- 130:Src/sd_diskio.c **** DSTATUS SD_status(BYTE lun)
- 131:Src/sd_diskio.c **** {
- 136 .loc 1 131 1 is_stmt 1 view -0
- 137 .cfi_startproc
- 138 @ args = 0, pretend = 0, frame = 0
- 139 @ frame_needed = 0, uses_anonymous_args = 0
- 140 .loc 1 131 1 is_stmt 0 view .LVU26
- 141 0000 08B5 push {r3, lr}
- 142 .LCFI2:
- 143 .cfi_def_cfa_offset 8
- 144 .cfi_offset 3, -8
- 145 .cfi_offset 14, -4
- 132:Src/sd_diskio.c **** return SD_CheckStatus(lun);
- 146 .loc 1 132 3 is_stmt 1 view .LVU27
- 147 .loc 1 132 10 is_stmt 0 view .LVU28
- 148 0002 FFF7FEFF bl SD_CheckStatus
- 149 .LVL7:
- 133:Src/sd_diskio.c **** }
- 150 .loc 1 133 1 view .LVU29
- 151 0006 08BD pop {r3, pc}
- 152 .cfi_endproc
- 153 .LFE1185:
- 155 .section .text.SD_read,"ax",%progbits
- ARM GAS /tmp/ccHqyWEZ.s page 6
-
-
- 156 .align 1
- 157 .global SD_read
- 158 .syntax unified
- 159 .thumb
- 160 .thumb_func
- 162 SD_read:
- 163 .LVL8:
- 164 .LFB1186:
+ 131:Src/sd_diskio.c **** #endif
+ 132:Src/sd_diskio.c ****
+ 133:Src/sd_diskio.c **** g_last_initialize_status = Stat;
+ 102 .loc 1 133 3 is_stmt 1 view .LVU19
+ 103 .loc 1 133 28 is_stmt 0 view .LVU20
+ 104 0010 064A ldr r2, .L10
+ 105 0012 1378 ldrb r3, [r2] @ zero_extendqisi2
+ 106 0014 DBB2 uxtb r3, r3
+ 107 0016 0649 ldr r1, .L10+4
+ 108 0018 0B70 strb r3, [r1]
134:Src/sd_diskio.c ****
- 135:Src/sd_diskio.c **** /* USER CODE BEGIN beforeReadSection */
- 136:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
- 137:Src/sd_diskio.c **** /* USER CODE END beforeReadSection */
+ 135:Src/sd_diskio.c **** return Stat;
+ 109 .loc 1 135 3 is_stmt 1 view .LVU21
+ 110 .loc 1 135 10 is_stmt 0 view .LVU22
+ 111 001a 1078 ldrb r0, [r2] @ zero_extendqisi2
+ 136:Src/sd_diskio.c **** }
+ 112 .loc 1 136 1 view .LVU23
+ 113 001c 10BD pop {r4, pc}
+ 114 .LVL4:
+ 115 .L9:
+ 126:Src/sd_diskio.c **** }
+ 116 .loc 1 126 5 is_stmt 1 view .LVU24
+ 126:Src/sd_diskio.c **** }
+ 117 .loc 1 126 12 is_stmt 0 view .LVU25
+ 118 001e 2046 mov r0, r4
+ 119 0020 FFF7FEFF bl SD_CheckStatus
+ 120 .LVL5:
+ 126:Src/sd_diskio.c **** }
+ 121 .loc 1 126 10 discriminator 1 view .LVU26
+ 122 0024 014B ldr r3, .L10
+ 123 0026 1870 strb r0, [r3]
+ 124 0028 F2E7 b .L7
+ 125 .L11:
+ 126 002a 00BF .align 2
+ 127 .L10:
+ 128 002c 00000000 .word Stat
+ 129 0030 00000000 .word g_last_initialize_status
+ 130 .cfi_endproc
+ 131 .LFE1186:
+ 133 .section .text.SD_status,"ax",%progbits
+ 134 .align 1
+ 135 .global SD_status
+ 136 .syntax unified
+ 137 .thumb
+ 138 .thumb_func
+ 140 SD_status:
+ 141 .LVL6:
+ 142 .LFB1187:
+ 137:Src/sd_diskio.c ****
138:Src/sd_diskio.c **** /**
- 139:Src/sd_diskio.c **** * @brief Reads Sector(s)
+ 139:Src/sd_diskio.c **** * @brief Gets Disk Status
140:Src/sd_diskio.c **** * @param lun : not used
- 141:Src/sd_diskio.c **** * @param *buff: Data buffer to store read data
- 142:Src/sd_diskio.c **** * @param sector: Sector address (LBA)
- 143:Src/sd_diskio.c **** * @param count: Number of sectors to read (1..128)
- 144:Src/sd_diskio.c **** * @retval DRESULT: Operation result
- 145:Src/sd_diskio.c **** */
- 146:Src/sd_diskio.c ****
- 147:Src/sd_diskio.c **** DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
- 148:Src/sd_diskio.c **** {
- 165 .loc 1 148 1 is_stmt 1 view -0
- 166 .cfi_startproc
- 167 @ args = 0, pretend = 0, frame = 0
- 168 @ frame_needed = 0, uses_anonymous_args = 0
- 169 .loc 1 148 1 is_stmt 0 view .LVU31
- 170 0000 08B5 push {r3, lr}
- 171 .LCFI3:
- 172 .cfi_def_cfa_offset 8
- 173 .cfi_offset 3, -8
- 174 .cfi_offset 14, -4
- 175 0002 0846 mov r0, r1
- 176 .LVL9:
- 177 .loc 1 148 1 view .LVU32
- 178 0004 1146 mov r1, r2
- 179 .LVL10:
- 180 .loc 1 148 1 view .LVU33
- 181 0006 1A46 mov r2, r3
- 182 .LVL11:
- 149:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
- 183 .loc 1 149 3 is_stmt 1 view .LVU34
- 150:Src/sd_diskio.c ****
- 151:Src/sd_diskio.c **** if(BSP_SD_ReadBlocks((uint32_t*)buff,
- 184 .loc 1 151 3 view .LVU35
- 185 .loc 1 151 6 is_stmt 0 view .LVU36
- 186 0008 4FF0FF33 mov r3, #-1
- 187 .LVL12:
- 188 .loc 1 151 6 view .LVU37
- 189 000c FFF7FEFF bl BSP_SD_ReadBlocks
- 190 .LVL13:
- 191 .loc 1 151 5 discriminator 1 view .LVU38
- 192 0010 30B9 cbnz r0, .L17
- 193 .L16:
- 152:Src/sd_diskio.c **** (uint32_t) (sector),
- 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
- ARM GAS /tmp/ccHqyWEZ.s page 7
+ 141:Src/sd_diskio.c **** * @retval DSTATUS: Operation status
+ 142:Src/sd_diskio.c **** */
+ 143:Src/sd_diskio.c **** DSTATUS SD_status(BYTE lun)
+ 144:Src/sd_diskio.c **** {
+ 143 .loc 1 144 1 is_stmt 1 view -0
+ ARM GAS /tmp/cc1MJofu.s page 6
- 154:Src/sd_diskio.c **** {
- 155:Src/sd_diskio.c **** /* wait until the read operation is finished */
- 156:Src/sd_diskio.c **** while(BSP_SD_GetCardState()!= MSD_OK)
- 157:Src/sd_diskio.c **** {
- 158:Src/sd_diskio.c **** }
- 194 .loc 1 158 5 is_stmt 1 view .LVU39
- 156:Src/sd_diskio.c **** {
- 195 .loc 1 156 32 discriminator 1 view .LVU40
- 156:Src/sd_diskio.c **** {
- 196 .loc 1 156 11 is_stmt 0 discriminator 1 view .LVU41
- 197 0012 FFF7FEFF bl BSP_SD_GetCardState
- 198 .LVL14:
- 156:Src/sd_diskio.c **** {
- 199 .loc 1 156 32 discriminator 1 view .LVU42
- 200 0016 0346 mov r3, r0
- 201 0018 0028 cmp r0, #0
- 202 001a FAD1 bne .L16
- 203 .L15:
- 204 .LVL15:
- 159:Src/sd_diskio.c **** res = RES_OK;
- 160:Src/sd_diskio.c **** }
- 161:Src/sd_diskio.c ****
- 162:Src/sd_diskio.c **** return res;
- 205 .loc 1 162 3 is_stmt 1 view .LVU43
- 163:Src/sd_diskio.c **** }
- 206 .loc 1 163 1 is_stmt 0 view .LVU44
- 207 001c 1846 mov r0, r3
- 208 001e 08BD pop {r3, pc}
- 209 .LVL16:
- 210 .L17:
- 149:Src/sd_diskio.c ****
- 211 .loc 1 149 11 view .LVU45
- 212 0020 0123 movs r3, #1
- 213 0022 FBE7 b .L15
- 214 .cfi_endproc
- 215 .LFE1186:
- 217 .section .text.SD_write,"ax",%progbits
- 218 .align 1
- 219 .global SD_write
- 220 .syntax unified
- 221 .thumb
- 222 .thumb_func
- 224 SD_write:
- 225 .LVL17:
- 226 .LFB1187:
+ 144 .cfi_startproc
+ 145 @ args = 0, pretend = 0, frame = 0
+ 146 @ frame_needed = 0, uses_anonymous_args = 0
+ 147 .loc 1 144 1 is_stmt 0 view .LVU28
+ 148 0000 08B5 push {r3, lr}
+ 149 .LCFI2:
+ 150 .cfi_def_cfa_offset 8
+ 151 .cfi_offset 3, -8
+ 152 .cfi_offset 14, -4
+ 145:Src/sd_diskio.c **** g_last_status_result = SD_CheckStatus(lun);
+ 153 .loc 1 145 3 is_stmt 1 view .LVU29
+ 154 .loc 1 145 26 is_stmt 0 view .LVU30
+ 155 0002 FFF7FEFF bl SD_CheckStatus
+ 156 .LVL7:
+ 157 .loc 1 145 24 discriminator 1 view .LVU31
+ 158 0006 024B ldr r3, .L14
+ 159 0008 1870 strb r0, [r3]
+ 146:Src/sd_diskio.c **** return g_last_status_result;
+ 160 .loc 1 146 3 is_stmt 1 view .LVU32
+ 161 .loc 1 146 10 is_stmt 0 view .LVU33
+ 162 000a 1878 ldrb r0, [r3] @ zero_extendqisi2
+ 147:Src/sd_diskio.c **** }
+ 163 .loc 1 147 1 view .LVU34
+ 164 000c 08BD pop {r3, pc}
+ 165 .L15:
+ 166 000e 00BF .align 2
+ 167 .L14:
+ 168 0010 00000000 .word g_last_status_result
+ 169 .cfi_endproc
+ 170 .LFE1187:
+ 172 .section .text.SD_read,"ax",%progbits
+ 173 .align 1
+ 174 .global SD_read
+ 175 .syntax unified
+ 176 .thumb
+ 177 .thumb_func
+ 179 SD_read:
+ 180 .LVL8:
+ 181 .LFB1188:
+ 148:Src/sd_diskio.c ****
+ 149:Src/sd_diskio.c **** /* USER CODE BEGIN beforeReadSection */
+ 150:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
+ 151:Src/sd_diskio.c **** /* USER CODE END beforeReadSection */
+ 152:Src/sd_diskio.c **** /**
+ 153:Src/sd_diskio.c **** * @brief Reads Sector(s)
+ 154:Src/sd_diskio.c **** * @param lun : not used
+ 155:Src/sd_diskio.c **** * @param *buff: Data buffer to store read data
+ 156:Src/sd_diskio.c **** * @param sector: Sector address (LBA)
+ 157:Src/sd_diskio.c **** * @param count: Number of sectors to read (1..128)
+ 158:Src/sd_diskio.c **** * @retval DRESULT: Operation result
+ 159:Src/sd_diskio.c **** */
+ 160:Src/sd_diskio.c ****
+ 161:Src/sd_diskio.c **** DRESULT SD_read(BYTE lun, BYTE *buff, DWORD sector, UINT count)
+ 162:Src/sd_diskio.c **** {
+ 182 .loc 1 162 1 is_stmt 1 view -0
+ 183 .cfi_startproc
+ 184 @ args = 0, pretend = 0, frame = 0
+ ARM GAS /tmp/cc1MJofu.s page 7
+
+
+ 185 @ frame_needed = 0, uses_anonymous_args = 0
+ 186 .loc 1 162 1 is_stmt 0 view .LVU36
+ 187 0000 08B5 push {r3, lr}
+ 188 .LCFI3:
+ 189 .cfi_def_cfa_offset 8
+ 190 .cfi_offset 3, -8
+ 191 .cfi_offset 14, -4
+ 192 0002 0846 mov r0, r1
+ 193 .LVL9:
+ 194 .loc 1 162 1 view .LVU37
+ 195 0004 1146 mov r1, r2
+ 196 .LVL10:
+ 197 .loc 1 162 1 view .LVU38
+ 198 0006 1A46 mov r2, r3
+ 199 .LVL11:
+ 163:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
+ 200 .loc 1 163 3 is_stmt 1 view .LVU39
164:Src/sd_diskio.c ****
- 165:Src/sd_diskio.c **** /* USER CODE BEGIN beforeWriteSection */
- 166:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
- 167:Src/sd_diskio.c **** /* USER CODE END beforeWriteSection */
- 168:Src/sd_diskio.c **** /**
- 169:Src/sd_diskio.c **** * @brief Writes Sector(s)
- 170:Src/sd_diskio.c **** * @param lun : not used
- 171:Src/sd_diskio.c **** * @param *buff: Data to be written
- 172:Src/sd_diskio.c **** * @param sector: Sector address (LBA)
- 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128)
- 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result
- 175:Src/sd_diskio.c **** */
- ARM GAS /tmp/ccHqyWEZ.s page 8
+ 165:Src/sd_diskio.c **** if(BSP_SD_ReadBlocks((uint32_t*)buff,
+ 201 .loc 1 165 3 view .LVU40
+ 202 .loc 1 165 6 is_stmt 0 view .LVU41
+ 203 0008 4FF0FF33 mov r3, #-1
+ 204 .LVL12:
+ 205 .loc 1 165 6 view .LVU42
+ 206 000c FFF7FEFF bl BSP_SD_ReadBlocks
+ 207 .LVL13:
+ 208 .loc 1 165 5 discriminator 1 view .LVU43
+ 209 0010 30B9 cbnz r0, .L19
+ 210 .L18:
+ 166:Src/sd_diskio.c **** (uint32_t) (sector),
+ 167:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
+ 168:Src/sd_diskio.c **** {
+ 169:Src/sd_diskio.c **** /* wait until the read operation is finished */
+ 170:Src/sd_diskio.c **** while(BSP_SD_GetCardState()!= MSD_OK)
+ 171:Src/sd_diskio.c **** {
+ 172:Src/sd_diskio.c **** }
+ 211 .loc 1 172 5 is_stmt 1 view .LVU44
+ 170:Src/sd_diskio.c **** {
+ 212 .loc 1 170 32 discriminator 1 view .LVU45
+ 170:Src/sd_diskio.c **** {
+ 213 .loc 1 170 11 is_stmt 0 discriminator 1 view .LVU46
+ 214 0012 FFF7FEFF bl BSP_SD_GetCardState
+ 215 .LVL14:
+ 170:Src/sd_diskio.c **** {
+ 216 .loc 1 170 32 discriminator 1 view .LVU47
+ 217 0016 0346 mov r3, r0
+ 218 0018 0028 cmp r0, #0
+ 219 001a FAD1 bne .L18
+ 220 .L17:
+ 221 .LVL15:
+ 173:Src/sd_diskio.c **** res = RES_OK;
+ 174:Src/sd_diskio.c **** }
+ 175:Src/sd_diskio.c ****
+ 176:Src/sd_diskio.c **** return res;
+ 222 .loc 1 176 3 is_stmt 1 view .LVU48
+ 177:Src/sd_diskio.c **** }
+ 223 .loc 1 177 1 is_stmt 0 view .LVU49
+ ARM GAS /tmp/cc1MJofu.s page 8
- 176:Src/sd_diskio.c **** #if _USE_WRITE == 1
- 177:Src/sd_diskio.c ****
- 178:Src/sd_diskio.c **** DRESULT SD_write(BYTE lun, const BYTE *buff, DWORD sector, UINT count)
- 179:Src/sd_diskio.c **** {
- 227 .loc 1 179 1 is_stmt 1 view -0
- 228 .cfi_startproc
- 229 @ args = 0, pretend = 0, frame = 0
- 230 @ frame_needed = 0, uses_anonymous_args = 0
- 231 .loc 1 179 1 is_stmt 0 view .LVU47
- 232 0000 08B5 push {r3, lr}
- 233 .LCFI4:
- 234 .cfi_def_cfa_offset 8
- 235 .cfi_offset 3, -8
- 236 .cfi_offset 14, -4
- 237 0002 0846 mov r0, r1
- 238 .LVL18:
- 239 .loc 1 179 1 view .LVU48
- 240 0004 1146 mov r1, r2
- 241 .LVL19:
- 242 .loc 1 179 1 view .LVU49
- 243 0006 1A46 mov r2, r3
- 244 .LVL20:
- 180:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
- 245 .loc 1 180 3 is_stmt 1 view .LVU50
- 181:Src/sd_diskio.c ****
- 182:Src/sd_diskio.c **** if(BSP_SD_WriteBlocks((uint32_t*)buff,
- 246 .loc 1 182 3 view .LVU51
- 247 .loc 1 182 6 is_stmt 0 view .LVU52
- 248 0008 4FF0FF33 mov r3, #-1
- 249 .LVL21:
- 250 .loc 1 182 6 view .LVU53
- 251 000c FFF7FEFF bl BSP_SD_WriteBlocks
- 252 .LVL22:
- 253 .loc 1 182 5 discriminator 1 view .LVU54
- 254 0010 30B9 cbnz r0, .L22
- 255 .L21:
- 183:Src/sd_diskio.c **** (uint32_t)(sector),
- 184:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
- 185:Src/sd_diskio.c **** {
- 186:Src/sd_diskio.c **** /* wait until the Write operation is finished */
- 187:Src/sd_diskio.c **** while(BSP_SD_GetCardState() != MSD_OK)
- 188:Src/sd_diskio.c **** {
- 189:Src/sd_diskio.c **** }
- 256 .loc 1 189 5 is_stmt 1 view .LVU55
- 187:Src/sd_diskio.c **** {
- 257 .loc 1 187 33 discriminator 1 view .LVU56
- 187:Src/sd_diskio.c **** {
- 258 .loc 1 187 11 is_stmt 0 discriminator 1 view .LVU57
- 259 0012 FFF7FEFF bl BSP_SD_GetCardState
- 260 .LVL23:
- 187:Src/sd_diskio.c **** {
- 261 .loc 1 187 33 discriminator 1 view .LVU58
- 262 0016 0346 mov r3, r0
- 263 0018 0028 cmp r0, #0
- 264 001a FAD1 bne .L21
- 265 .L20:
- 266 .LVL24:
- ARM GAS /tmp/ccHqyWEZ.s page 9
+ 224 001c 1846 mov r0, r3
+ 225 001e 08BD pop {r3, pc}
+ 226 .LVL16:
+ 227 .L19:
+ 163:Src/sd_diskio.c ****
+ 228 .loc 1 163 11 view .LVU50
+ 229 0020 0123 movs r3, #1
+ 230 0022 FBE7 b .L17
+ 231 .cfi_endproc
+ 232 .LFE1188:
+ 234 .section .text.SD_write,"ax",%progbits
+ 235 .align 1
+ 236 .global SD_write
+ 237 .syntax unified
+ 238 .thumb
+ 239 .thumb_func
+ 241 SD_write:
+ 242 .LVL17:
+ 243 .LFB1189:
+ 178:Src/sd_diskio.c ****
+ 179:Src/sd_diskio.c **** /* USER CODE BEGIN beforeWriteSection */
+ 180:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
+ 181:Src/sd_diskio.c **** /* USER CODE END beforeWriteSection */
+ 182:Src/sd_diskio.c **** /**
+ 183:Src/sd_diskio.c **** * @brief Writes Sector(s)
+ 184:Src/sd_diskio.c **** * @param lun : not used
+ 185:Src/sd_diskio.c **** * @param *buff: Data to be written
+ 186:Src/sd_diskio.c **** * @param sector: Sector address (LBA)
+ 187:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128)
+ 188:Src/sd_diskio.c **** * @retval DRESULT: Operation result
+ 189:Src/sd_diskio.c **** */
+ 190:Src/sd_diskio.c **** #if _USE_WRITE == 1
+ 191:Src/sd_diskio.c ****
+ 192:Src/sd_diskio.c **** DRESULT SD_write(BYTE lun, const BYTE *buff, DWORD sector, UINT count)
+ 193:Src/sd_diskio.c **** {
+ 244 .loc 1 193 1 is_stmt 1 view -0
+ 245 .cfi_startproc
+ 246 @ args = 0, pretend = 0, frame = 0
+ 247 @ frame_needed = 0, uses_anonymous_args = 0
+ 248 .loc 1 193 1 is_stmt 0 view .LVU52
+ 249 0000 08B5 push {r3, lr}
+ 250 .LCFI4:
+ 251 .cfi_def_cfa_offset 8
+ 252 .cfi_offset 3, -8
+ 253 .cfi_offset 14, -4
+ 254 0002 0846 mov r0, r1
+ 255 .LVL18:
+ 256 .loc 1 193 1 view .LVU53
+ 257 0004 1146 mov r1, r2
+ 258 .LVL19:
+ 259 .loc 1 193 1 view .LVU54
+ 260 0006 1A46 mov r2, r3
+ 261 .LVL20:
+ 194:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
+ 262 .loc 1 194 3 is_stmt 1 view .LVU55
+ 195:Src/sd_diskio.c ****
+ 196:Src/sd_diskio.c **** if(BSP_SD_WriteBlocks((uint32_t*)buff,
+ ARM GAS /tmp/cc1MJofu.s page 9
- 190:Src/sd_diskio.c **** res = RES_OK;
- 191:Src/sd_diskio.c **** }
- 192:Src/sd_diskio.c ****
- 193:Src/sd_diskio.c **** return res;
- 267 .loc 1 193 3 is_stmt 1 view .LVU59
- 194:Src/sd_diskio.c **** }
- 268 .loc 1 194 1 is_stmt 0 view .LVU60
- 269 001c 1846 mov r0, r3
- 270 001e 08BD pop {r3, pc}
- 271 .LVL25:
- 272 .L22:
- 180:Src/sd_diskio.c ****
- 273 .loc 1 180 11 view .LVU61
- 274 0020 0123 movs r3, #1
- 275 0022 FBE7 b .L20
- 276 .cfi_endproc
- 277 .LFE1187:
- 279 .section .text.SD_ioctl,"ax",%progbits
- 280 .align 1
- 281 .global SD_ioctl
- 282 .syntax unified
- 283 .thumb
- 284 .thumb_func
- 286 SD_ioctl:
- 287 .LVL26:
- 288 .LFB1188:
- 195:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
- 196:Src/sd_diskio.c ****
- 197:Src/sd_diskio.c **** /* USER CODE BEGIN beforeIoctlSection */
- 198:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
- 199:Src/sd_diskio.c **** /* USER CODE END beforeIoctlSection */
- 200:Src/sd_diskio.c **** /**
- 201:Src/sd_diskio.c **** * @brief I/O control operation
- 202:Src/sd_diskio.c **** * @param lun : not used
- 203:Src/sd_diskio.c **** * @param cmd: Control code
- 204:Src/sd_diskio.c **** * @param *buff: Buffer to send/receive control data
- 205:Src/sd_diskio.c **** * @retval DRESULT: Operation result
- 206:Src/sd_diskio.c **** */
- 207:Src/sd_diskio.c **** #if _USE_IOCTL == 1
- 208:Src/sd_diskio.c **** DRESULT SD_ioctl(BYTE lun, BYTE cmd, void *buff)
- 209:Src/sd_diskio.c **** {
- 289 .loc 1 209 1 is_stmt 1 view -0
- 290 .cfi_startproc
- 291 @ args = 0, pretend = 0, frame = 32
- 292 @ frame_needed = 0, uses_anonymous_args = 0
- 293 .loc 1 209 1 is_stmt 0 view .LVU63
- 294 0000 30B5 push {r4, r5, lr}
- 295 .LCFI5:
- 296 .cfi_def_cfa_offset 12
- 297 .cfi_offset 4, -12
- 298 .cfi_offset 5, -8
- 299 .cfi_offset 14, -4
- 300 0002 89B0 sub sp, sp, #36
- 301 .LCFI6:
- 302 .cfi_def_cfa_offset 48
- 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
- 303 .loc 1 210 3 is_stmt 1 view .LVU64
- ARM GAS /tmp/ccHqyWEZ.s page 10
-
-
- 304 .LVL27:
- 211:Src/sd_diskio.c **** BSP_SD_CardInfo CardInfo;
- 305 .loc 1 211 3 view .LVU65
- 212:Src/sd_diskio.c ****
- 213:Src/sd_diskio.c **** if (Stat & STA_NOINIT) return RES_NOTRDY;
- 306 .loc 1 213 3 view .LVU66
- 307 .loc 1 213 12 is_stmt 0 view .LVU67
- 308 0004 134B ldr r3, .L34
- 309 0006 1878 ldrb r0, [r3] @ zero_extendqisi2
- 310 .LVL28:
- 311 .loc 1 213 6 view .LVU68
- 312 0008 10F00104 ands r4, r0, #1
- 313 000c 1BD1 bne .L31
- 314 000e 1546 mov r5, r2
- 214:Src/sd_diskio.c ****
- 215:Src/sd_diskio.c **** switch (cmd)
- 315 .loc 1 215 3 is_stmt 1 view .LVU69
- 316 0010 0329 cmp r1, #3
- 317 0012 1CD8 bhi .L32
- 318 0014 DFE801F0 tbb [pc, r1]
- 319 .L27:
- 320 0018 02 .byte (.L30-.L27)/2
- 321 0019 04 .byte (.L29-.L27)/2
- 322 001a 0A .byte (.L28-.L27)/2
- 323 001b 10 .byte (.L26-.L27)/2
- 324 .p2align 1
- 325 .L30:
- 326 001c 0C46 mov r4, r1
- 327 001e 13E0 b .L25
- 328 .L29:
- 216:Src/sd_diskio.c **** {
- 217:Src/sd_diskio.c **** /* Make sure that no pending write process */
- 218:Src/sd_diskio.c **** case CTRL_SYNC :
- 219:Src/sd_diskio.c **** res = RES_OK;
- 220:Src/sd_diskio.c **** break;
- 221:Src/sd_diskio.c ****
- 222:Src/sd_diskio.c **** /* Get number of sectors on the disk (DWORD) */
- 223:Src/sd_diskio.c **** case GET_SECTOR_COUNT :
- 224:Src/sd_diskio.c **** BSP_SD_GetCardInfo(&CardInfo);
- 329 .loc 1 224 5 view .LVU70
- 330 0020 6846 mov r0, sp
- 331 0022 FFF7FEFF bl BSP_SD_GetCardInfo
- 332 .LVL29:
- 225:Src/sd_diskio.c **** *(DWORD*)buff = CardInfo.LogBlockNbr;
- 333 .loc 1 225 5 view .LVU71
- 334 .loc 1 225 29 is_stmt 0 view .LVU72
- 335 0026 069B ldr r3, [sp, #24]
- 336 .loc 1 225 19 view .LVU73
- 337 0028 2B60 str r3, [r5]
- 226:Src/sd_diskio.c **** res = RES_OK;
- 338 .loc 1 226 5 is_stmt 1 view .LVU74
- 339 .LVL30:
- 227:Src/sd_diskio.c **** break;
- 340 .loc 1 227 5 view .LVU75
- 341 002a 0DE0 b .L25
- 342 .LVL31:
- 343 .L28:
- ARM GAS /tmp/ccHqyWEZ.s page 11
+ 263 .loc 1 196 3 view .LVU56
+ 264 .loc 1 196 6 is_stmt 0 view .LVU57
+ 265 0008 4FF0FF33 mov r3, #-1
+ 266 .LVL21:
+ 267 .loc 1 196 6 view .LVU58
+ 268 000c FFF7FEFF bl BSP_SD_WriteBlocks
+ 269 .LVL22:
+ 270 .loc 1 196 5 discriminator 1 view .LVU59
+ 271 0010 30B9 cbnz r0, .L24
+ 272 .L23:
+ 197:Src/sd_diskio.c **** (uint32_t)(sector),
+ 198:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
+ 199:Src/sd_diskio.c **** {
+ 200:Src/sd_diskio.c **** /* wait until the Write operation is finished */
+ 201:Src/sd_diskio.c **** while(BSP_SD_GetCardState() != MSD_OK)
+ 202:Src/sd_diskio.c **** {
+ 203:Src/sd_diskio.c **** }
+ 273 .loc 1 203 5 is_stmt 1 view .LVU60
+ 201:Src/sd_diskio.c **** {
+ 274 .loc 1 201 33 discriminator 1 view .LVU61
+ 201:Src/sd_diskio.c **** {
+ 275 .loc 1 201 11 is_stmt 0 discriminator 1 view .LVU62
+ 276 0012 FFF7FEFF bl BSP_SD_GetCardState
+ 277 .LVL23:
+ 201:Src/sd_diskio.c **** {
+ 278 .loc 1 201 33 discriminator 1 view .LVU63
+ 279 0016 0346 mov r3, r0
+ 280 0018 0028 cmp r0, #0
+ 281 001a FAD1 bne .L23
+ 282 .L22:
+ 283 .LVL24:
+ 204:Src/sd_diskio.c **** res = RES_OK;
+ 205:Src/sd_diskio.c **** }
+ 206:Src/sd_diskio.c ****
+ 207:Src/sd_diskio.c **** return res;
+ 284 .loc 1 207 3 is_stmt 1 view .LVU64
+ 208:Src/sd_diskio.c **** }
+ 285 .loc 1 208 1 is_stmt 0 view .LVU65
+ 286 001c 1846 mov r0, r3
+ 287 001e 08BD pop {r3, pc}
+ 288 .LVL25:
+ 289 .L24:
+ 194:Src/sd_diskio.c ****
+ 290 .loc 1 194 11 view .LVU66
+ 291 0020 0123 movs r3, #1
+ 292 0022 FBE7 b .L22
+ 293 .cfi_endproc
+ 294 .LFE1189:
+ 296 .section .text.SD_ioctl,"ax",%progbits
+ 297 .align 1
+ 298 .global SD_ioctl
+ 299 .syntax unified
+ 300 .thumb
+ 301 .thumb_func
+ 303 SD_ioctl:
+ 304 .LVL26:
+ 305 .LFB1190:
+ ARM GAS /tmp/cc1MJofu.s page 10
+ 209:Src/sd_diskio.c **** #endif /* _USE_WRITE == 1 */
+ 210:Src/sd_diskio.c ****
+ 211:Src/sd_diskio.c **** /* USER CODE BEGIN beforeIoctlSection */
+ 212:Src/sd_diskio.c **** /* can be used to modify previous code / undefine following code / add new code */
+ 213:Src/sd_diskio.c **** /* USER CODE END beforeIoctlSection */
+ 214:Src/sd_diskio.c **** /**
+ 215:Src/sd_diskio.c **** * @brief I/O control operation
+ 216:Src/sd_diskio.c **** * @param lun : not used
+ 217:Src/sd_diskio.c **** * @param cmd: Control code
+ 218:Src/sd_diskio.c **** * @param *buff: Buffer to send/receive control data
+ 219:Src/sd_diskio.c **** * @retval DRESULT: Operation result
+ 220:Src/sd_diskio.c **** */
+ 221:Src/sd_diskio.c **** #if _USE_IOCTL == 1
+ 222:Src/sd_diskio.c **** DRESULT SD_ioctl(BYTE lun, BYTE cmd, void *buff)
+ 223:Src/sd_diskio.c **** {
+ 306 .loc 1 223 1 is_stmt 1 view -0
+ 307 .cfi_startproc
+ 308 @ args = 0, pretend = 0, frame = 32
+ 309 @ frame_needed = 0, uses_anonymous_args = 0
+ 310 .loc 1 223 1 is_stmt 0 view .LVU68
+ 311 0000 30B5 push {r4, r5, lr}
+ 312 .LCFI5:
+ 313 .cfi_def_cfa_offset 12
+ 314 .cfi_offset 4, -12
+ 315 .cfi_offset 5, -8
+ 316 .cfi_offset 14, -4
+ 317 0002 89B0 sub sp, sp, #36
+ 318 .LCFI6:
+ 319 .cfi_def_cfa_offset 48
+ 224:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
+ 320 .loc 1 224 3 is_stmt 1 view .LVU69
+ 321 .LVL27:
+ 225:Src/sd_diskio.c **** BSP_SD_CardInfo CardInfo;
+ 322 .loc 1 225 3 view .LVU70
+ 226:Src/sd_diskio.c ****
+ 227:Src/sd_diskio.c **** if (Stat & STA_NOINIT) return RES_NOTRDY;
+ 323 .loc 1 227 3 view .LVU71
+ 324 .loc 1 227 12 is_stmt 0 view .LVU72
+ 325 0004 134B ldr r3, .L36
+ 326 0006 1878 ldrb r0, [r3] @ zero_extendqisi2
+ 327 .LVL28:
+ 328 .loc 1 227 6 view .LVU73
+ 329 0008 10F00104 ands r4, r0, #1
+ 330 000c 1BD1 bne .L33
+ 331 000e 1546 mov r5, r2
228:Src/sd_diskio.c ****
- 229:Src/sd_diskio.c **** /* Get R/W sector size (WORD) */
- 230:Src/sd_diskio.c **** case GET_SECTOR_SIZE :
- 231:Src/sd_diskio.c **** BSP_SD_GetCardInfo(&CardInfo);
- 344 .loc 1 231 5 view .LVU76
- 345 002c 6846 mov r0, sp
- 346 002e FFF7FEFF bl BSP_SD_GetCardInfo
- 347 .LVL32:
- 232:Src/sd_diskio.c **** *(WORD*)buff = CardInfo.LogBlockSize;
- 348 .loc 1 232 5 view .LVU77
- 349 .loc 1 232 28 is_stmt 0 view .LVU78
- 350 0032 079B ldr r3, [sp, #28]
- 351 .loc 1 232 18 view .LVU79
- 352 0034 2B80 strh r3, [r5] @ movhi
+ 229:Src/sd_diskio.c **** switch (cmd)
+ 332 .loc 1 229 3 is_stmt 1 view .LVU74
+ 333 0010 0329 cmp r1, #3
+ 334 0012 1CD8 bhi .L34
+ 335 0014 DFE801F0 tbb [pc, r1]
+ 336 .L29:
+ 337 0018 02 .byte (.L32-.L29)/2
+ 338 0019 04 .byte (.L31-.L29)/2
+ 339 001a 0A .byte (.L30-.L29)/2
+ 340 001b 10 .byte (.L28-.L29)/2
+ 341 .p2align 1
+ ARM GAS /tmp/cc1MJofu.s page 11
+
+
+ 342 .L32:
+ 343 001c 0C46 mov r4, r1
+ 344 001e 13E0 b .L27
+ 345 .L31:
+ 230:Src/sd_diskio.c **** {
+ 231:Src/sd_diskio.c **** /* Make sure that no pending write process */
+ 232:Src/sd_diskio.c **** case CTRL_SYNC :
233:Src/sd_diskio.c **** res = RES_OK;
- 353 .loc 1 233 5 is_stmt 1 view .LVU80
- 354 .LVL33:
234:Src/sd_diskio.c **** break;
- 355 .loc 1 234 5 view .LVU81
- 356 0036 07E0 b .L25
- 357 .LVL34:
- 358 .L26:
235:Src/sd_diskio.c ****
- 236:Src/sd_diskio.c **** /* Get erase block size in unit of sector (DWORD) */
- 237:Src/sd_diskio.c **** case GET_BLOCK_SIZE :
+ 236:Src/sd_diskio.c **** /* Get number of sectors on the disk (DWORD) */
+ 237:Src/sd_diskio.c **** case GET_SECTOR_COUNT :
238:Src/sd_diskio.c **** BSP_SD_GetCardInfo(&CardInfo);
- 359 .loc 1 238 5 view .LVU82
- 360 0038 6846 mov r0, sp
- 361 003a FFF7FEFF bl BSP_SD_GetCardInfo
- 362 .LVL35:
- 239:Src/sd_diskio.c **** *(DWORD*)buff = CardInfo.LogBlockSize / SD_DEFAULT_BLOCK_SIZE;
- 363 .loc 1 239 5 view .LVU83
- 364 .loc 1 239 29 is_stmt 0 view .LVU84
- 365 003e 079B ldr r3, [sp, #28]
- 366 .loc 1 239 43 view .LVU85
- 367 0040 5B0A lsrs r3, r3, #9
- 368 .loc 1 239 19 view .LVU86
- 369 0042 2B60 str r3, [r5]
+ 346 .loc 1 238 5 view .LVU75
+ 347 0020 6846 mov r0, sp
+ 348 0022 FFF7FEFF bl BSP_SD_GetCardInfo
+ 349 .LVL29:
+ 239:Src/sd_diskio.c **** *(DWORD*)buff = CardInfo.LogBlockNbr;
+ 350 .loc 1 239 5 view .LVU76
+ 351 .loc 1 239 29 is_stmt 0 view .LVU77
+ 352 0026 069B ldr r3, [sp, #24]
+ 353 .loc 1 239 19 view .LVU78
+ 354 0028 2B60 str r3, [r5]
240:Src/sd_diskio.c **** res = RES_OK;
- 370 .loc 1 240 5 is_stmt 1 view .LVU87
- 371 .LVL36:
+ 355 .loc 1 240 5 is_stmt 1 view .LVU79
+ 356 .LVL30:
241:Src/sd_diskio.c **** break;
- 372 .loc 1 241 5 view .LVU88
- 373 0044 00E0 b .L25
- 374 .LVL37:
- 375 .L31:
- 213:Src/sd_diskio.c ****
- 376 .loc 1 213 33 is_stmt 0 discriminator 1 view .LVU89
- 377 0046 0324 movs r4, #3
- 378 .LVL38:
- 379 .L25:
+ 357 .loc 1 241 5 view .LVU80
+ 358 002a 0DE0 b .L27
+ 359 .LVL31:
+ 360 .L30:
242:Src/sd_diskio.c ****
- 243:Src/sd_diskio.c **** default:
- 244:Src/sd_diskio.c **** res = RES_PARERR;
- 245:Src/sd_diskio.c **** }
- 246:Src/sd_diskio.c ****
- 247:Src/sd_diskio.c **** return res;
- ARM GAS /tmp/ccHqyWEZ.s page 12
+ 243:Src/sd_diskio.c **** /* Get R/W sector size (WORD) */
+ 244:Src/sd_diskio.c **** case GET_SECTOR_SIZE :
+ 245:Src/sd_diskio.c **** BSP_SD_GetCardInfo(&CardInfo);
+ 361 .loc 1 245 5 view .LVU81
+ 362 002c 6846 mov r0, sp
+ 363 002e FFF7FEFF bl BSP_SD_GetCardInfo
+ 364 .LVL32:
+ 246:Src/sd_diskio.c **** *(WORD*)buff = CardInfo.LogBlockSize;
+ 365 .loc 1 246 5 view .LVU82
+ 366 .loc 1 246 28 is_stmt 0 view .LVU83
+ 367 0032 079B ldr r3, [sp, #28]
+ 368 .loc 1 246 18 view .LVU84
+ 369 0034 2B80 strh r3, [r5] @ movhi
+ 247:Src/sd_diskio.c **** res = RES_OK;
+ 370 .loc 1 247 5 is_stmt 1 view .LVU85
+ 371 .LVL33:
+ 248:Src/sd_diskio.c **** break;
+ 372 .loc 1 248 5 view .LVU86
+ 373 0036 07E0 b .L27
+ 374 .LVL34:
+ 375 .L28:
+ 249:Src/sd_diskio.c ****
+ 250:Src/sd_diskio.c **** /* Get erase block size in unit of sector (DWORD) */
+ 251:Src/sd_diskio.c **** case GET_BLOCK_SIZE :
+ 252:Src/sd_diskio.c **** BSP_SD_GetCardInfo(&CardInfo);
+ ARM GAS /tmp/cc1MJofu.s page 12
- 248:Src/sd_diskio.c **** }
- 380 .loc 1 248 1 view .LVU90
- 381 0048 2046 mov r0, r4
- 382 004a 09B0 add sp, sp, #36
- 383 .LCFI7:
- 384 .cfi_remember_state
- 385 .cfi_def_cfa_offset 12
- 386 @ sp needed
- 387 004c 30BD pop {r4, r5, pc}
- 388 .LVL39:
- 389 .L32:
- 390 .LCFI8:
- 391 .cfi_restore_state
- 244:Src/sd_diskio.c **** }
- 392 .loc 1 244 9 view .LVU91
- 393 004e 0424 movs r4, #4
- 394 0050 FAE7 b .L25
- 395 .L35:
- 396 0052 00BF .align 2
- 397 .L34:
- 398 0054 00000000 .word Stat
- 399 .cfi_endproc
- 400 .LFE1188:
- 402 .global SD_Driver
- 403 .section .rodata.SD_Driver,"a"
- 404 .align 2
- 407 SD_Driver:
- 408 0000 00000000 .word SD_initialize
- 409 0004 00000000 .word SD_status
- 410 0008 00000000 .word SD_read
- 411 000c 00000000 .word SD_write
- 412 0010 00000000 .word SD_ioctl
- 413 .section .data.Stat,"aw"
- 416 Stat:
- 417 0000 01 .byte 1
- 418 .text
- 419 .Letext0:
- 420 .file 2 "Middlewares/Third_Party/FatFs/src/integer.h"
- 421 .file 3 "Middlewares/Third_Party/FatFs/src/diskio.h"
- 422 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 423 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
- 424 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
- 425 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
- 426 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
- 428 .file 10 "Inc/bsp_driver_sd.h"
- 429 .file 11 "Inc/sd_diskio.h"
- ARM GAS /tmp/ccHqyWEZ.s page 13
+ 376 .loc 1 252 5 view .LVU87
+ 377 0038 6846 mov r0, sp
+ 378 003a FFF7FEFF bl BSP_SD_GetCardInfo
+ 379 .LVL35:
+ 253:Src/sd_diskio.c **** *(DWORD*)buff = CardInfo.LogBlockSize / SD_DEFAULT_BLOCK_SIZE;
+ 380 .loc 1 253 5 view .LVU88
+ 381 .loc 1 253 29 is_stmt 0 view .LVU89
+ 382 003e 079B ldr r3, [sp, #28]
+ 383 .loc 1 253 43 view .LVU90
+ 384 0040 5B0A lsrs r3, r3, #9
+ 385 .loc 1 253 19 view .LVU91
+ 386 0042 2B60 str r3, [r5]
+ 254:Src/sd_diskio.c **** res = RES_OK;
+ 387 .loc 1 254 5 is_stmt 1 view .LVU92
+ 388 .LVL36:
+ 255:Src/sd_diskio.c **** break;
+ 389 .loc 1 255 5 view .LVU93
+ 390 0044 00E0 b .L27
+ 391 .LVL37:
+ 392 .L33:
+ 227:Src/sd_diskio.c ****
+ 393 .loc 1 227 33 is_stmt 0 discriminator 1 view .LVU94
+ 394 0046 0324 movs r4, #3
+ 395 .LVL38:
+ 396 .L27:
+ 256:Src/sd_diskio.c ****
+ 257:Src/sd_diskio.c **** default:
+ 258:Src/sd_diskio.c **** res = RES_PARERR;
+ 259:Src/sd_diskio.c **** }
+ 260:Src/sd_diskio.c ****
+ 261:Src/sd_diskio.c **** return res;
+ 262:Src/sd_diskio.c **** }
+ 397 .loc 1 262 1 view .LVU95
+ 398 0048 2046 mov r0, r4
+ 399 004a 09B0 add sp, sp, #36
+ 400 .LCFI7:
+ 401 .cfi_remember_state
+ 402 .cfi_def_cfa_offset 12
+ 403 @ sp needed
+ 404 004c 30BD pop {r4, r5, pc}
+ 405 .LVL39:
+ 406 .L34:
+ 407 .LCFI8:
+ 408 .cfi_restore_state
+ 258:Src/sd_diskio.c **** }
+ 409 .loc 1 258 9 view .LVU96
+ 410 004e 0424 movs r4, #4
+ 411 0050 FAE7 b .L27
+ 412 .L37:
+ 413 0052 00BF .align 2
+ 414 .L36:
+ 415 0054 00000000 .word Stat
+ 416 .cfi_endproc
+ 417 .LFE1190:
+ 419 .section .text.sd_diskio_debug_get_last_initialize_status,"ax",%progbits
+ 420 .align 1
+ 421 .global sd_diskio_debug_get_last_initialize_status
+ ARM GAS /tmp/cc1MJofu.s page 13
+
+
+ 422 .syntax unified
+ 423 .thumb
+ 424 .thumb_func
+ 426 sd_diskio_debug_get_last_initialize_status:
+ 427 .LFB1183:
+ 89:Src/sd_diskio.c **** return g_last_initialize_status;
+ 428 .loc 1 89 1 is_stmt 1 view -0
+ 429 .cfi_startproc
+ 430 @ args = 0, pretend = 0, frame = 0
+ 431 @ frame_needed = 0, uses_anonymous_args = 0
+ 432 @ link register save eliminated.
+ 90:Src/sd_diskio.c **** }
+ 433 .loc 1 90 3 view .LVU98
+ 90:Src/sd_diskio.c **** }
+ 434 .loc 1 90 10 is_stmt 0 view .LVU99
+ 435 0000 014B ldr r3, .L39
+ 436 0002 1878 ldrb r0, [r3] @ zero_extendqisi2
+ 91:Src/sd_diskio.c ****
+ 437 .loc 1 91 1 view .LVU100
+ 438 0004 7047 bx lr
+ 439 .L40:
+ 440 0006 00BF .align 2
+ 441 .L39:
+ 442 0008 00000000 .word g_last_initialize_status
+ 443 .cfi_endproc
+ 444 .LFE1183:
+ 446 .section .text.sd_diskio_debug_get_last_status_result,"ax",%progbits
+ 447 .align 1
+ 448 .global sd_diskio_debug_get_last_status_result
+ 449 .syntax unified
+ 450 .thumb
+ 451 .thumb_func
+ 453 sd_diskio_debug_get_last_status_result:
+ 454 .LFB1184:
+ 94:Src/sd_diskio.c **** return g_last_status_result;
+ 455 .loc 1 94 1 is_stmt 1 view -0
+ 456 .cfi_startproc
+ 457 @ args = 0, pretend = 0, frame = 0
+ 458 @ frame_needed = 0, uses_anonymous_args = 0
+ 459 @ link register save eliminated.
+ 95:Src/sd_diskio.c **** }
+ 460 .loc 1 95 3 view .LVU102
+ 95:Src/sd_diskio.c **** }
+ 461 .loc 1 95 10 is_stmt 0 view .LVU103
+ 462 0000 014B ldr r3, .L42
+ 463 0002 1878 ldrb r0, [r3] @ zero_extendqisi2
+ 96:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
+ 464 .loc 1 96 1 view .LVU104
+ 465 0004 7047 bx lr
+ 466 .L43:
+ 467 0006 00BF .align 2
+ 468 .L42:
+ 469 0008 00000000 .word g_last_status_result
+ 470 .cfi_endproc
+ 471 .LFE1184:
+ 473 .global SD_Driver
+ 474 .section .rodata.SD_Driver,"a"
+ ARM GAS /tmp/cc1MJofu.s page 14
+
+
+ 475 .align 2
+ 478 SD_Driver:
+ 479 0000 00000000 .word SD_initialize
+ 480 0004 00000000 .word SD_status
+ 481 0008 00000000 .word SD_read
+ 482 000c 00000000 .word SD_write
+ 483 0010 00000000 .word SD_ioctl
+ 484 .section .data.g_last_status_result,"aw"
+ 487 g_last_status_result:
+ 488 0000 01 .byte 1
+ 489 .section .data.g_last_initialize_status,"aw"
+ 492 g_last_initialize_status:
+ 493 0000 01 .byte 1
+ 494 .section .data.Stat,"aw"
+ 497 Stat:
+ 498 0000 01 .byte 1
+ 499 .text
+ 500 .Letext0:
+ 501 .file 2 "Middlewares/Third_Party/FatFs/src/integer.h"
+ 502 .file 3 "Middlewares/Third_Party/FatFs/src/diskio.h"
+ 503 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 504 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
+ 505 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 506 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
+ 507 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 508 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
+ 509 .file 10 "Inc/bsp_driver_sd.h"
+ 510 .file 11 "Inc/sd_diskio.h"
+ ARM GAS /tmp/cc1MJofu.s page 15
DEFINED SYMBOLS
*ABS*:00000000 sd_diskio.c
- /tmp/ccHqyWEZ.s:20 .text.SD_CheckStatus:00000000 $t
- /tmp/ccHqyWEZ.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus
- /tmp/ccHqyWEZ.s:65 .text.SD_CheckStatus:00000020 $d
- /tmp/ccHqyWEZ.s:416 .data.Stat:00000000 Stat
- /tmp/ccHqyWEZ.s:70 .text.SD_initialize:00000000 $t
- /tmp/ccHqyWEZ.s:76 .text.SD_initialize:00000000 SD_initialize
- /tmp/ccHqyWEZ.s:122 .text.SD_initialize:00000024 $d
- /tmp/ccHqyWEZ.s:127 .text.SD_status:00000000 $t
- /tmp/ccHqyWEZ.s:133 .text.SD_status:00000000 SD_status
- /tmp/ccHqyWEZ.s:156 .text.SD_read:00000000 $t
- /tmp/ccHqyWEZ.s:162 .text.SD_read:00000000 SD_read
- /tmp/ccHqyWEZ.s:218 .text.SD_write:00000000 $t
- /tmp/ccHqyWEZ.s:224 .text.SD_write:00000000 SD_write
- /tmp/ccHqyWEZ.s:280 .text.SD_ioctl:00000000 $t
- /tmp/ccHqyWEZ.s:286 .text.SD_ioctl:00000000 SD_ioctl
- /tmp/ccHqyWEZ.s:320 .text.SD_ioctl:00000018 $d
- /tmp/ccHqyWEZ.s:324 .text.SD_ioctl:0000001c $t
- /tmp/ccHqyWEZ.s:398 .text.SD_ioctl:00000054 $d
- /tmp/ccHqyWEZ.s:407 .rodata.SD_Driver:00000000 SD_Driver
- /tmp/ccHqyWEZ.s:404 .rodata.SD_Driver:00000000 $d
+ /tmp/cc1MJofu.s:20 .text.SD_CheckStatus:00000000 $t
+ /tmp/cc1MJofu.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus
+ /tmp/cc1MJofu.s:65 .text.SD_CheckStatus:00000020 $d
+ /tmp/cc1MJofu.s:497 .data.Stat:00000000 Stat
+ /tmp/cc1MJofu.s:70 .text.SD_initialize:00000000 $t
+ /tmp/cc1MJofu.s:76 .text.SD_initialize:00000000 SD_initialize
+ /tmp/cc1MJofu.s:128 .text.SD_initialize:0000002c $d
+ /tmp/cc1MJofu.s:492 .data.g_last_initialize_status:00000000 g_last_initialize_status
+ /tmp/cc1MJofu.s:134 .text.SD_status:00000000 $t
+ /tmp/cc1MJofu.s:140 .text.SD_status:00000000 SD_status
+ /tmp/cc1MJofu.s:168 .text.SD_status:00000010 $d
+ /tmp/cc1MJofu.s:487 .data.g_last_status_result:00000000 g_last_status_result
+ /tmp/cc1MJofu.s:173 .text.SD_read:00000000 $t
+ /tmp/cc1MJofu.s:179 .text.SD_read:00000000 SD_read
+ /tmp/cc1MJofu.s:235 .text.SD_write:00000000 $t
+ /tmp/cc1MJofu.s:241 .text.SD_write:00000000 SD_write
+ /tmp/cc1MJofu.s:297 .text.SD_ioctl:00000000 $t
+ /tmp/cc1MJofu.s:303 .text.SD_ioctl:00000000 SD_ioctl
+ /tmp/cc1MJofu.s:337 .text.SD_ioctl:00000018 $d
+ /tmp/cc1MJofu.s:341 .text.SD_ioctl:0000001c $t
+ /tmp/cc1MJofu.s:415 .text.SD_ioctl:00000054 $d
+ /tmp/cc1MJofu.s:420 .text.sd_diskio_debug_get_last_initialize_status:00000000 $t
+ /tmp/cc1MJofu.s:426 .text.sd_diskio_debug_get_last_initialize_status:00000000 sd_diskio_debug_get_last_initialize_status
+ /tmp/cc1MJofu.s:442 .text.sd_diskio_debug_get_last_initialize_status:00000008 $d
+ /tmp/cc1MJofu.s:447 .text.sd_diskio_debug_get_last_status_result:00000000 $t
+ /tmp/cc1MJofu.s:453 .text.sd_diskio_debug_get_last_status_result:00000000 sd_diskio_debug_get_last_status_result
+ /tmp/cc1MJofu.s:469 .text.sd_diskio_debug_get_last_status_result:00000008 $d
+ /tmp/cc1MJofu.s:478 .rodata.SD_Driver:00000000 SD_Driver
+ /tmp/cc1MJofu.s:475 .rodata.SD_Driver:00000000 $d
UNDEFINED SYMBOLS
BSP_SD_GetCardState
diff --git a/build/sd_diskio.o b/build/sd_diskio.o
index 181af8a..f89b1af 100644
Binary files a/build/sd_diskio.o and b/build/sd_diskio.o differ
diff --git a/build/stm32f7xx_hal.lst b/build/stm32f7xx_hal.lst
index 528fbb7..c6f5960 100644
--- a/build/stm32f7xx_hal.lst
+++ b/build/stm32f7xx_hal.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccqG5zDC.s page 1
+ARM GAS /tmp/ccvRXtb2.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Services HAL APIs
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** @endverbatim
- ARM GAS /tmp/ccqG5zDC.s page 2
+ ARM GAS /tmp/ccvRXtb2.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** ******************************************************************************
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /** @defgroup HAL_Exported_Functions_Group1 Initialization and de-initialization Functions
- ARM GAS /tmp/ccqG5zDC.s page 3
+ ARM GAS /tmp/ccvRXtb2.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Initialization and de-initialization functions
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** #endif /* ART_ACCELERATOR_ENABLE */
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Configure Flash prefetch */
- ARM GAS /tmp/ccqG5zDC.s page 4
+ ARM GAS /tmp/ccvRXtb2.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** #if (PREFETCH_ENABLE != 0U)
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
29 .cfi_startproc
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccqG5zDC.s page 5
+ ARM GAS /tmp/ccvRXtb2.s page 5
32 @ link register save eliminated.
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
74 .cfi_offset 14, -4
171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** __HAL_RCC_APB1_RELEASE_RESET();
75 .loc 1 171 3 view .LVU5
- ARM GAS /tmp/ccqG5zDC.s page 6
+ ARM GAS /tmp/ccvRXtb2.s page 6
76 0002 094B ldr r3, .L5
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
120 .LVL1:
121 .LFB145:
214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
- ARM GAS /tmp/ccqG5zDC.s page 7
+ ARM GAS /tmp/ccvRXtb2.s page 7
215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /**
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
150 .loc 1 240 6 is_stmt 0 view .LVU26
151 001e 0F2C cmp r4, #15
152 0020 01D9 bls .L12
- ARM GAS /tmp/ccqG5zDC.s page 8
+ ARM GAS /tmp/ccvRXtb2.s page 8
241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** {
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
192 .thumb
193 .thumb_func
195 HAL_Init:
- ARM GAS /tmp/ccqG5zDC.s page 9
+ ARM GAS /tmp/ccvRXtb2.s page 9
196 .LFB141:
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Provide a tick value in millisecond
267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Provide a blocking delay in millisecond
268:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Suspend the time base source interrupt
- ARM GAS /tmp/ccqG5zDC.s page 10
+ ARM GAS /tmp/ccvRXtb2.s page 10
269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** (+) Resume the time base source interrupt
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
264 .LFB147:
294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /**
- ARM GAS /tmp/ccqG5zDC.s page 11
+ ARM GAS /tmp/ccvRXtb2.s page 11
296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Provides a tick value in millisecond.
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
303 0006 00BF .align 2
304 .L24:
305 0008 00000000 .word uwTickPrio
- ARM GAS /tmp/ccqG5zDC.s page 12
+ ARM GAS /tmp/ccvRXtb2.s page 12
306 .cfi_endproc
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Update uwTickFreq global variable used by HAL_InitTick() */
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** uwTickFreq = Freq;
333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
- ARM GAS /tmp/ccqG5zDC.s page 13
+ ARM GAS /tmp/ccvRXtb2.s page 13
334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /* Apply the new tick Freq */
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
376 .LFE149:
378 .section .text.HAL_GetTickFreq,"ax",%progbits
379 .align 1
- ARM GAS /tmp/ccqG5zDC.s page 14
+ ARM GAS /tmp/ccvRXtb2.s page 14
380 .global HAL_GetTickFreq
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** {
414 .loc 1 369 1 is_stmt 1 view -0
415 .cfi_startproc
- ARM GAS /tmp/ccqG5zDC.s page 15
+ ARM GAS /tmp/ccvRXtb2.s page 15
416 @ args = 0, pretend = 0, frame = 0
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
454 .loc 1 379 38 discriminator 1 view .LVU92
455 001c A042 cmp r0, r4
456 001e FAD3 bcc .L38
- ARM GAS /tmp/ccqG5zDC.s page 16
+ ARM GAS /tmp/ccvRXtb2.s page 16
382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** }
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
497 .syntax unified
498 .thumb
499 .thumb_func
- ARM GAS /tmp/ccqG5zDC.s page 17
+ ARM GAS /tmp/ccvRXtb2.s page 17
501 HAL_ResumeTick:
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** return __STM32F7xx_HAL_VERSION;
534 .loc 1 422 3 view .LVU106
423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** }
- ARM GAS /tmp/ccqG5zDC.s page 18
+ ARM GAS /tmp/ccvRXtb2.s page 18
535 .loc 1 423 1 is_stmt 0 view .LVU107
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Returns the device identifier.
436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @retval Device identifier
437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */
- ARM GAS /tmp/ccqG5zDC.s page 19
+ ARM GAS /tmp/ccvRXtb2.s page 19
438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** uint32_t HAL_GetDEVID(void)
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
625 .LFE157:
627 .section .text.HAL_GetUIDw1,"ax",%progbits
628 .align 1
- ARM GAS /tmp/ccqG5zDC.s page 20
+ ARM GAS /tmp/ccvRXtb2.s page 20
629 .global HAL_GetUIDw1
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
668 .loc 1 468 1 is_stmt 0 view .LVU124
669 0000 014B ldr r3, .L60
670 0002 D3F82804 ldr r0, [r3, #1064]
- ARM GAS /tmp/ccqG5zDC.s page 21
+ ARM GAS /tmp/ccvRXtb2.s page 21
671 0006 7047 bx lr
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */
483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** void HAL_DBGMCU_DisableDBGSleepMode(void)
484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** {
- ARM GAS /tmp/ccqG5zDC.s page 22
+ ARM GAS /tmp/ccvRXtb2.s page 22
716 .loc 1 484 1 is_stmt 1 view -0
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
761 .LFE162:
763 .section .text.HAL_DBGMCU_DisableDBGStopMode,"ax",%progbits
764 .align 1
- ARM GAS /tmp/ccqG5zDC.s page 23
+ ARM GAS /tmp/ccvRXtb2.s page 23
765 .global HAL_DBGMCU_DisableDBGStopMode
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
805 .loc 1 512 3 view .LVU138
806 0000 024A ldr r2, .L75
807 0002 5368 ldr r3, [r2, #4]
- ARM GAS /tmp/ccqG5zDC.s page 24
+ ARM GAS /tmp/ccvRXtb2.s page 24
808 0004 43F00403 orr r3, r3, #4
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
523:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c ****
524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** /**
525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @brief Enables the I/O Compensation Cell.
- ARM GAS /tmp/ccqG5zDC.s page 25
+ ARM GAS /tmp/ccvRXtb2.s page 25
526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** * @note The I/O compensation cell can be used only when the device supply
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
894 0002 136A ldr r3, [r2, #32]
895 .loc 1 543 17 view .LVU151
896 0004 23F00103 bic r3, r3, #1
- ARM GAS /tmp/ccqG5zDC.s page 26
+ ARM GAS /tmp/ccvRXtb2.s page 26
897 0008 1362 str r3, [r2, #32]
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
940 .syntax unified
941 .thumb
942 .thumb_func
- ARM GAS /tmp/ccqG5zDC.s page 27
+ ARM GAS /tmp/ccvRXtb2.s page 27
944 HAL_DisableFMCMemorySwapping:
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** */
583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** void HAL_EnableMemorySwappingBank(void)
584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal.c **** {
- ARM GAS /tmp/ccqG5zDC.s page 28
+ ARM GAS /tmp/ccvRXtb2.s page 28
976 .loc 1 584 1 is_stmt 1 view -0
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccqG5zDC.s page 1
1015 000a 7047 bx lr
1016 .L97:
1017 .align 2
- ARM GAS /tmp/ccqG5zDC.s page 29
+ ARM GAS /tmp/ccvRXtb2.s page 29
1018 .L96:
@@ -1708,107 +1708,107 @@ ARM GAS /tmp/ccqG5zDC.s page 1
1049 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
1050 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
1051 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
- ARM GAS /tmp/ccqG5zDC.s page 30
+ ARM GAS /tmp/ccvRXtb2.s page 30
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal.c
- /tmp/ccqG5zDC.s:20 .text.HAL_MspInit:00000000 $t
- /tmp/ccqG5zDC.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
- /tmp/ccqG5zDC.s:39 .text.HAL_MspDeInit:00000000 $t
- /tmp/ccqG5zDC.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit
- /tmp/ccqG5zDC.s:58 .text.HAL_DeInit:00000000 $t
- /tmp/ccqG5zDC.s:64 .text.HAL_DeInit:00000000 HAL_DeInit
- /tmp/ccqG5zDC.s:108 .text.HAL_DeInit:00000028 $d
- /tmp/ccqG5zDC.s:113 .text.HAL_InitTick:00000000 $t
- /tmp/ccqG5zDC.s:119 .text.HAL_InitTick:00000000 HAL_InitTick
- /tmp/ccqG5zDC.s:182 .text.HAL_InitTick:00000040 $d
- /tmp/ccqG5zDC.s:1027 .data.uwTickFreq:00000000 uwTickFreq
- /tmp/ccqG5zDC.s:1034 .data.uwTickPrio:00000000 uwTickPrio
- /tmp/ccqG5zDC.s:189 .text.HAL_Init:00000000 $t
- /tmp/ccqG5zDC.s:195 .text.HAL_Init:00000000 HAL_Init
- /tmp/ccqG5zDC.s:225 .text.HAL_IncTick:00000000 $t
- /tmp/ccqG5zDC.s:231 .text.HAL_IncTick:00000000 HAL_IncTick
- /tmp/ccqG5zDC.s:251 .text.HAL_IncTick:00000010 $d
- /tmp/ccqG5zDC.s:1041 .bss.uwTick:00000000 uwTick
- /tmp/ccqG5zDC.s:257 .text.HAL_GetTick:00000000 $t
- /tmp/ccqG5zDC.s:263 .text.HAL_GetTick:00000000 HAL_GetTick
- /tmp/ccqG5zDC.s:279 .text.HAL_GetTick:00000008 $d
- /tmp/ccqG5zDC.s:284 .text.HAL_GetTickPrio:00000000 $t
- /tmp/ccqG5zDC.s:290 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio
- /tmp/ccqG5zDC.s:305 .text.HAL_GetTickPrio:00000008 $d
- /tmp/ccqG5zDC.s:310 .text.HAL_SetTickFreq:00000000 $t
- /tmp/ccqG5zDC.s:316 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq
- /tmp/ccqG5zDC.s:373 .text.HAL_SetTickFreq:00000024 $d
- /tmp/ccqG5zDC.s:379 .text.HAL_GetTickFreq:00000000 $t
- /tmp/ccqG5zDC.s:385 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq
- /tmp/ccqG5zDC.s:400 .text.HAL_GetTickFreq:00000008 $d
- /tmp/ccqG5zDC.s:405 .text.HAL_Delay:00000000 $t
- /tmp/ccqG5zDC.s:411 .text.HAL_Delay:00000000 HAL_Delay
- /tmp/ccqG5zDC.s:464 .text.HAL_Delay:00000024 $d
- /tmp/ccqG5zDC.s:469 .text.HAL_SuspendTick:00000000 $t
- /tmp/ccqG5zDC.s:475 .text.HAL_SuspendTick:00000000 HAL_SuspendTick
- /tmp/ccqG5zDC.s:495 .text.HAL_ResumeTick:00000000 $t
- /tmp/ccqG5zDC.s:501 .text.HAL_ResumeTick:00000000 HAL_ResumeTick
- /tmp/ccqG5zDC.s:521 .text.HAL_GetHalVersion:00000000 $t
- /tmp/ccqG5zDC.s:527 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion
- /tmp/ccqG5zDC.s:541 .text.HAL_GetHalVersion:00000004 $d
- /tmp/ccqG5zDC.s:546 .text.HAL_GetREVID:00000000 $t
- /tmp/ccqG5zDC.s:552 .text.HAL_GetREVID:00000000 HAL_GetREVID
- /tmp/ccqG5zDC.s:569 .text.HAL_GetREVID:00000008 $d
- /tmp/ccqG5zDC.s:574 .text.HAL_GetDEVID:00000000 $t
- /tmp/ccqG5zDC.s:580 .text.HAL_GetDEVID:00000000 HAL_GetDEVID
- /tmp/ccqG5zDC.s:597 .text.HAL_GetDEVID:0000000c $d
- /tmp/ccqG5zDC.s:602 .text.HAL_GetUIDw0:00000000 $t
- /tmp/ccqG5zDC.s:608 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0
- /tmp/ccqG5zDC.s:623 .text.HAL_GetUIDw0:00000008 $d
- /tmp/ccqG5zDC.s:628 .text.HAL_GetUIDw1:00000000 $t
- /tmp/ccqG5zDC.s:634 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1
- /tmp/ccqG5zDC.s:649 .text.HAL_GetUIDw1:00000008 $d
- /tmp/ccqG5zDC.s:654 .text.HAL_GetUIDw2:00000000 $t
- /tmp/ccqG5zDC.s:660 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2
- /tmp/ccqG5zDC.s:675 .text.HAL_GetUIDw2:00000008 $d
- ARM GAS /tmp/ccqG5zDC.s page 31
+ /tmp/ccvRXtb2.s:20 .text.HAL_MspInit:00000000 $t
+ /tmp/ccvRXtb2.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
+ /tmp/ccvRXtb2.s:39 .text.HAL_MspDeInit:00000000 $t
+ /tmp/ccvRXtb2.s:45 .text.HAL_MspDeInit:00000000 HAL_MspDeInit
+ /tmp/ccvRXtb2.s:58 .text.HAL_DeInit:00000000 $t
+ /tmp/ccvRXtb2.s:64 .text.HAL_DeInit:00000000 HAL_DeInit
+ /tmp/ccvRXtb2.s:108 .text.HAL_DeInit:00000028 $d
+ /tmp/ccvRXtb2.s:113 .text.HAL_InitTick:00000000 $t
+ /tmp/ccvRXtb2.s:119 .text.HAL_InitTick:00000000 HAL_InitTick
+ /tmp/ccvRXtb2.s:182 .text.HAL_InitTick:00000040 $d
+ /tmp/ccvRXtb2.s:1027 .data.uwTickFreq:00000000 uwTickFreq
+ /tmp/ccvRXtb2.s:1034 .data.uwTickPrio:00000000 uwTickPrio
+ /tmp/ccvRXtb2.s:189 .text.HAL_Init:00000000 $t
+ /tmp/ccvRXtb2.s:195 .text.HAL_Init:00000000 HAL_Init
+ /tmp/ccvRXtb2.s:225 .text.HAL_IncTick:00000000 $t
+ /tmp/ccvRXtb2.s:231 .text.HAL_IncTick:00000000 HAL_IncTick
+ /tmp/ccvRXtb2.s:251 .text.HAL_IncTick:00000010 $d
+ /tmp/ccvRXtb2.s:1041 .bss.uwTick:00000000 uwTick
+ /tmp/ccvRXtb2.s:257 .text.HAL_GetTick:00000000 $t
+ /tmp/ccvRXtb2.s:263 .text.HAL_GetTick:00000000 HAL_GetTick
+ /tmp/ccvRXtb2.s:279 .text.HAL_GetTick:00000008 $d
+ /tmp/ccvRXtb2.s:284 .text.HAL_GetTickPrio:00000000 $t
+ /tmp/ccvRXtb2.s:290 .text.HAL_GetTickPrio:00000000 HAL_GetTickPrio
+ /tmp/ccvRXtb2.s:305 .text.HAL_GetTickPrio:00000008 $d
+ /tmp/ccvRXtb2.s:310 .text.HAL_SetTickFreq:00000000 $t
+ /tmp/ccvRXtb2.s:316 .text.HAL_SetTickFreq:00000000 HAL_SetTickFreq
+ /tmp/ccvRXtb2.s:373 .text.HAL_SetTickFreq:00000024 $d
+ /tmp/ccvRXtb2.s:379 .text.HAL_GetTickFreq:00000000 $t
+ /tmp/ccvRXtb2.s:385 .text.HAL_GetTickFreq:00000000 HAL_GetTickFreq
+ /tmp/ccvRXtb2.s:400 .text.HAL_GetTickFreq:00000008 $d
+ /tmp/ccvRXtb2.s:405 .text.HAL_Delay:00000000 $t
+ /tmp/ccvRXtb2.s:411 .text.HAL_Delay:00000000 HAL_Delay
+ /tmp/ccvRXtb2.s:464 .text.HAL_Delay:00000024 $d
+ /tmp/ccvRXtb2.s:469 .text.HAL_SuspendTick:00000000 $t
+ /tmp/ccvRXtb2.s:475 .text.HAL_SuspendTick:00000000 HAL_SuspendTick
+ /tmp/ccvRXtb2.s:495 .text.HAL_ResumeTick:00000000 $t
+ /tmp/ccvRXtb2.s:501 .text.HAL_ResumeTick:00000000 HAL_ResumeTick
+ /tmp/ccvRXtb2.s:521 .text.HAL_GetHalVersion:00000000 $t
+ /tmp/ccvRXtb2.s:527 .text.HAL_GetHalVersion:00000000 HAL_GetHalVersion
+ /tmp/ccvRXtb2.s:541 .text.HAL_GetHalVersion:00000004 $d
+ /tmp/ccvRXtb2.s:546 .text.HAL_GetREVID:00000000 $t
+ /tmp/ccvRXtb2.s:552 .text.HAL_GetREVID:00000000 HAL_GetREVID
+ /tmp/ccvRXtb2.s:569 .text.HAL_GetREVID:00000008 $d
+ /tmp/ccvRXtb2.s:574 .text.HAL_GetDEVID:00000000 $t
+ /tmp/ccvRXtb2.s:580 .text.HAL_GetDEVID:00000000 HAL_GetDEVID
+ /tmp/ccvRXtb2.s:597 .text.HAL_GetDEVID:0000000c $d
+ /tmp/ccvRXtb2.s:602 .text.HAL_GetUIDw0:00000000 $t
+ /tmp/ccvRXtb2.s:608 .text.HAL_GetUIDw0:00000000 HAL_GetUIDw0
+ /tmp/ccvRXtb2.s:623 .text.HAL_GetUIDw0:00000008 $d
+ /tmp/ccvRXtb2.s:628 .text.HAL_GetUIDw1:00000000 $t
+ /tmp/ccvRXtb2.s:634 .text.HAL_GetUIDw1:00000000 HAL_GetUIDw1
+ /tmp/ccvRXtb2.s:649 .text.HAL_GetUIDw1:00000008 $d
+ /tmp/ccvRXtb2.s:654 .text.HAL_GetUIDw2:00000000 $t
+ /tmp/ccvRXtb2.s:660 .text.HAL_GetUIDw2:00000000 HAL_GetUIDw2
+ /tmp/ccvRXtb2.s:675 .text.HAL_GetUIDw2:00000008 $d
+ ARM GAS /tmp/ccvRXtb2.s page 31
- /tmp/ccqG5zDC.s:680 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t
- /tmp/ccqG5zDC.s:686 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode
- /tmp/ccqG5zDC.s:703 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d
- /tmp/ccqG5zDC.s:708 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t
- /tmp/ccqG5zDC.s:714 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode
- /tmp/ccqG5zDC.s:731 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d
- /tmp/ccqG5zDC.s:736 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t
- /tmp/ccqG5zDC.s:742 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode
- /tmp/ccqG5zDC.s:759 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d
- /tmp/ccqG5zDC.s:764 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t
- /tmp/ccqG5zDC.s:770 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode
- /tmp/ccqG5zDC.s:787 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d
- /tmp/ccqG5zDC.s:792 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t
- /tmp/ccqG5zDC.s:798 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode
- /tmp/ccqG5zDC.s:815 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d
- /tmp/ccqG5zDC.s:820 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t
- /tmp/ccqG5zDC.s:826 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode
- /tmp/ccqG5zDC.s:843 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d
- /tmp/ccqG5zDC.s:848 .text.HAL_EnableCompensationCell:00000000 $t
- /tmp/ccqG5zDC.s:854 .text.HAL_EnableCompensationCell:00000000 HAL_EnableCompensationCell
- /tmp/ccqG5zDC.s:873 .text.HAL_EnableCompensationCell:0000000c $d
- /tmp/ccqG5zDC.s:878 .text.HAL_DisableCompensationCell:00000000 $t
- /tmp/ccqG5zDC.s:884 .text.HAL_DisableCompensationCell:00000000 HAL_DisableCompensationCell
- /tmp/ccqG5zDC.s:903 .text.HAL_DisableCompensationCell:0000000c $d
- /tmp/ccqG5zDC.s:908 .text.HAL_EnableFMCMemorySwapping:00000000 $t
- /tmp/ccqG5zDC.s:914 .text.HAL_EnableFMCMemorySwapping:00000000 HAL_EnableFMCMemorySwapping
- /tmp/ccqG5zDC.s:933 .text.HAL_EnableFMCMemorySwapping:0000000c $d
- /tmp/ccqG5zDC.s:938 .text.HAL_DisableFMCMemorySwapping:00000000 $t
- /tmp/ccqG5zDC.s:944 .text.HAL_DisableFMCMemorySwapping:00000000 HAL_DisableFMCMemorySwapping
- /tmp/ccqG5zDC.s:963 .text.HAL_DisableFMCMemorySwapping:0000000c $d
- /tmp/ccqG5zDC.s:968 .text.HAL_EnableMemorySwappingBank:00000000 $t
- /tmp/ccqG5zDC.s:974 .text.HAL_EnableMemorySwappingBank:00000000 HAL_EnableMemorySwappingBank
- /tmp/ccqG5zDC.s:991 .text.HAL_EnableMemorySwappingBank:0000000c $d
- /tmp/ccqG5zDC.s:996 .text.HAL_DisableMemorySwappingBank:00000000 $t
- /tmp/ccqG5zDC.s:1002 .text.HAL_DisableMemorySwappingBank:00000000 HAL_DisableMemorySwappingBank
- /tmp/ccqG5zDC.s:1019 .text.HAL_DisableMemorySwappingBank:0000000c $d
- /tmp/ccqG5zDC.s:1031 .data.uwTickPrio:00000000 $d
- /tmp/ccqG5zDC.s:1038 .bss.uwTick:00000000 $d
+ /tmp/ccvRXtb2.s:680 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 $t
+ /tmp/ccvRXtb2.s:686 .text.HAL_DBGMCU_EnableDBGSleepMode:00000000 HAL_DBGMCU_EnableDBGSleepMode
+ /tmp/ccvRXtb2.s:703 .text.HAL_DBGMCU_EnableDBGSleepMode:0000000c $d
+ /tmp/ccvRXtb2.s:708 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 $t
+ /tmp/ccvRXtb2.s:714 .text.HAL_DBGMCU_DisableDBGSleepMode:00000000 HAL_DBGMCU_DisableDBGSleepMode
+ /tmp/ccvRXtb2.s:731 .text.HAL_DBGMCU_DisableDBGSleepMode:0000000c $d
+ /tmp/ccvRXtb2.s:736 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 $t
+ /tmp/ccvRXtb2.s:742 .text.HAL_DBGMCU_EnableDBGStopMode:00000000 HAL_DBGMCU_EnableDBGStopMode
+ /tmp/ccvRXtb2.s:759 .text.HAL_DBGMCU_EnableDBGStopMode:0000000c $d
+ /tmp/ccvRXtb2.s:764 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 $t
+ /tmp/ccvRXtb2.s:770 .text.HAL_DBGMCU_DisableDBGStopMode:00000000 HAL_DBGMCU_DisableDBGStopMode
+ /tmp/ccvRXtb2.s:787 .text.HAL_DBGMCU_DisableDBGStopMode:0000000c $d
+ /tmp/ccvRXtb2.s:792 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 $t
+ /tmp/ccvRXtb2.s:798 .text.HAL_DBGMCU_EnableDBGStandbyMode:00000000 HAL_DBGMCU_EnableDBGStandbyMode
+ /tmp/ccvRXtb2.s:815 .text.HAL_DBGMCU_EnableDBGStandbyMode:0000000c $d
+ /tmp/ccvRXtb2.s:820 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 $t
+ /tmp/ccvRXtb2.s:826 .text.HAL_DBGMCU_DisableDBGStandbyMode:00000000 HAL_DBGMCU_DisableDBGStandbyMode
+ /tmp/ccvRXtb2.s:843 .text.HAL_DBGMCU_DisableDBGStandbyMode:0000000c $d
+ /tmp/ccvRXtb2.s:848 .text.HAL_EnableCompensationCell:00000000 $t
+ /tmp/ccvRXtb2.s:854 .text.HAL_EnableCompensationCell:00000000 HAL_EnableCompensationCell
+ /tmp/ccvRXtb2.s:873 .text.HAL_EnableCompensationCell:0000000c $d
+ /tmp/ccvRXtb2.s:878 .text.HAL_DisableCompensationCell:00000000 $t
+ /tmp/ccvRXtb2.s:884 .text.HAL_DisableCompensationCell:00000000 HAL_DisableCompensationCell
+ /tmp/ccvRXtb2.s:903 .text.HAL_DisableCompensationCell:0000000c $d
+ /tmp/ccvRXtb2.s:908 .text.HAL_EnableFMCMemorySwapping:00000000 $t
+ /tmp/ccvRXtb2.s:914 .text.HAL_EnableFMCMemorySwapping:00000000 HAL_EnableFMCMemorySwapping
+ /tmp/ccvRXtb2.s:933 .text.HAL_EnableFMCMemorySwapping:0000000c $d
+ /tmp/ccvRXtb2.s:938 .text.HAL_DisableFMCMemorySwapping:00000000 $t
+ /tmp/ccvRXtb2.s:944 .text.HAL_DisableFMCMemorySwapping:00000000 HAL_DisableFMCMemorySwapping
+ /tmp/ccvRXtb2.s:963 .text.HAL_DisableFMCMemorySwapping:0000000c $d
+ /tmp/ccvRXtb2.s:968 .text.HAL_EnableMemorySwappingBank:00000000 $t
+ /tmp/ccvRXtb2.s:974 .text.HAL_EnableMemorySwappingBank:00000000 HAL_EnableMemorySwappingBank
+ /tmp/ccvRXtb2.s:991 .text.HAL_EnableMemorySwappingBank:0000000c $d
+ /tmp/ccvRXtb2.s:996 .text.HAL_DisableMemorySwappingBank:00000000 $t
+ /tmp/ccvRXtb2.s:1002 .text.HAL_DisableMemorySwappingBank:00000000 HAL_DisableMemorySwappingBank
+ /tmp/ccvRXtb2.s:1019 .text.HAL_DisableMemorySwappingBank:0000000c $d
+ /tmp/ccvRXtb2.s:1031 .data.uwTickPrio:00000000 $d
+ /tmp/ccvRXtb2.s:1038 .bss.uwTick:00000000 $d
UNDEFINED SYMBOLS
HAL_SYSTICK_Config
diff --git a/build/stm32f7xx_hal_adc.lst b/build/stm32f7xx_hal_adc.lst
index 24b17c5..32f67f5 100644
--- a/build/stm32f7xx_hal_adc.lst
+++ b/build/stm32f7xx_hal_adc.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccYW4wvq.s page 1
+ARM GAS /tmp/cciWciU4.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** and in case of analog watchdog or overrun events
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Single and continuous conversion modes.
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Scan mode for automatic conversion of channel 0 to channel x.
- ARM GAS /tmp/ccYW4wvq.s page 2
+ ARM GAS /tmp/cciWciU4.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Data alignment with in-built data coherency.
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Optionally, configure the analog watchdog parameters (channels
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** monitored, thresholds, ...) using function HAL_ADC_AnalogWDGConfig().
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 3
+ ARM GAS /tmp/cciWciU4.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (#) Optionally, for devices with several ADC instances: configure the
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** *** Callback functions ***
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ==============================
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** [..]
- ARM GAS /tmp/ccYW4wvq.s page 4
+ ARM GAS /tmp/cciWciU4.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (@) Callback functions must be implemented in user program:
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) MspInitCallback : ADC Msp Init callback
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) MspDeInitCallback : ADC Msp DeInit callback
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** This function takes as parameters the HAL peripheral handle, the Callback ID
- ARM GAS /tmp/ccYW4wvq.s page 5
+ ARM GAS /tmp/cciWciU4.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** and a pointer to the user callback function.
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Includes ------------------------------------------------------------------*/
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #include "stm32f7xx_hal.h"
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 6
+ ARM GAS /tmp/cciWciU4.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /** @addtogroup STM32F7xx_HAL_Driver
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * channels group (scan mode activation, continuous mode activation,
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * External trigger source and edge, DMA continuous request after the
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * last transfer and End of conversion selection).
- ARM GAS /tmp/ccYW4wvq.s page 7
+ ARM GAS /tmp/cciWciU4.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** *
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Initialize ADC error code */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_CLEAR_ERRORCODE(hadc);
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 8
+ ARM GAS /tmp/cciWciU4.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Allocate lock resource and initialize it */
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Set ADC state */
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** SET_BIT(hadc->State, HAL_ADC_STATE_BUSY_INTERNAL);
- ARM GAS /tmp/ccYW4wvq.s page 9
+ ARM GAS /tmp/cciWciU4.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * the configuration information for the specified ADC.
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval None
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
- ARM GAS /tmp/ccYW4wvq.s page 10
+ ARM GAS /tmp/cciWciU4.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __weak void HAL_ADC_MspDeInit(ADC_HandleTypeDef* hadc)
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** break;
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** case HAL_ADC_ERROR_CB_ID :
- ARM GAS /tmp/ccYW4wvq.s page 11
+ ARM GAS /tmp/cciWciU4.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCallback = pCallback;
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** return status;
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 12
+ ARM GAS /tmp/cciWciU4.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /**
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update the error code */
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCode |= HAL_ADC_ERROR_INVALID_CALLBACK;
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 13
+ ARM GAS /tmp/cciWciU4.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Return error status */
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Stop conversion of regular channel.
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Start conversion of regular channel and enable interrupt.
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Stop conversion of regular channel and disable interrupt.
- ARM GAS /tmp/ccYW4wvq.s page 14
+ ARM GAS /tmp/cciWciU4.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (+) Start conversion of regular channel and enable DMA transfer.
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
- ARM GAS /tmp/ccYW4wvq.s page 15
+ ARM GAS /tmp/cciWciU4.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** else
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 16
+ ARM GAS /tmp/cciWciU4.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update ADC state machine to error */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * in DMA mode and polling for end of each conversion (ADC init
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * parameter "EOCSelection" set to ADC_EOC_SINGLE_CONV).
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * In this case, DMA resets the flag EOC and polling cannot be
- ARM GAS /tmp/ccYW4wvq.s page 17
+ ARM GAS /tmp/cciWciU4.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * performed on each conversion. Nevertheless, polling can still
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Clear regular group conversion flag */
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_STRT | ADC_FLAG_EOC);
- ARM GAS /tmp/ccYW4wvq.s page 18
+ ARM GAS /tmp/cciWciU4.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if(Timeout != HAL_MAX_DELAY)
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if((Timeout == 0) || ((HAL_GetTick() - tickstart ) > Timeout))
- ARM GAS /tmp/ccYW4wvq.s page 19
+ ARM GAS /tmp/cciWciU4.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Process locked */
- ARM GAS /tmp/ccYW4wvq.s page 20
+ ARM GAS /tmp/cciWciU4.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_LOCK(hadc);
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* (To ensure of no unknown state from potential previous ADC operations) */
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC | ADC_FLAG_OVR);
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 21
+ ARM GAS /tmp/cciWciU4.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable end of conversion interrupt for regular group */
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * the configuration information for the specified ADC.
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval HAL status.
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
- ARM GAS /tmp/ccYW4wvq.s page 22
+ ARM GAS /tmp/cciWciU4.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_IT(ADC_HandleTypeDef* hadc)
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Update state machine on conversion status if not in error state */
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL))
- ARM GAS /tmp/ccYW4wvq.s page 23
+ ARM GAS /tmp/cciWciU4.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Determine whether any further conversion upcoming on group injected */
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* by external trigger, scan sequence on going or by automatic injected */
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* conversion from group regular (same conditions as group regular */
- ARM GAS /tmp/ccYW4wvq.s page 24
+ ARM GAS /tmp/cciWciU4.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* interruption disabling above). */
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp1 = tmp_sr & ADC_FLAG_OVR;
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp2 = tmp_cr1 & ADC_IT_OVR;
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Check Overrun flag */
- ARM GAS /tmp/ccYW4wvq.s page 25
+ ARM GAS /tmp/cciWciU4.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if(tmp1 && tmp2)
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** while(counter != 0)
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** counter--;
- ARM GAS /tmp/ccYW4wvq.s page 26
+ ARM GAS /tmp/cciWciU4.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable ADC overrun interrupt */
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 27
+ ARM GAS /tmp/cciWciU4.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable ADC DMA mode */
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @retval HAL status
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_Stop_DMA(ADC_HandleTypeDef* hadc)
- ARM GAS /tmp/ccYW4wvq.s page 28
+ ARM GAS /tmp/cciWciU4.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** uint32_t HAL_ADC_GetValue(ADC_HandleTypeDef* hadc)
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 29
+ ARM GAS /tmp/cciWciU4.s page 29
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Return the selected ADC converted value */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * - If needed, restart a new ADC conversion using function
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * "HAL_ADC_Start_DMA()"
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * (this function is also clearing overrun flag)
- ARM GAS /tmp/ccYW4wvq.s page 30
+ ARM GAS /tmp/cciWciU4.s page 30
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* if ADC_Channel_10 ... ADC_Channel_18 is selected */
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** if ((sConfig->Channel > ADC_CHANNEL_9) && (sConfig->Channel != ADC_INTERNAL_NONE))
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 31
+ ARM GAS /tmp/cciWciU4.s page 31
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Clear the old sample time */
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Disable the VBAT & TSVREFE channel*/
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC->CCR &= ~(ADC_CCR_VBATE | ADC_CCR_TSVREFE);
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
- ARM GAS /tmp/ccYW4wvq.s page 32
+ ARM GAS /tmp/cciWciU4.s page 32
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef* hadc, ADC_AnalogWDGConfTypeDef* Analog
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 33
+ ARM GAS /tmp/cciWciU4.s page 33
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #ifdef USE_FULL_ASSERT
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /**
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @}
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** */
- ARM GAS /tmp/ccYW4wvq.s page 34
+ ARM GAS /tmp/cciWciU4.s page 34
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /**
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @brief Initializes the ADCx peripheral according to the specified parameters
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * in the ADC_InitStruct without initializing the ADC MSP.
- ARM GAS /tmp/ccYW4wvq.s page 35
+ ARM GAS /tmp/cciWciU4.s page 35
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR1 &= ~(ADC_CR1_RES);
66 .loc 1 1929 3 is_stmt 1 view .LVU17
67 .loc 1 1929 7 is_stmt 0 view .LVU18
- ARM GAS /tmp/ccYW4wvq.s page 36
+ ARM GAS /tmp/cciWciU4.s page 36
68 0028 0268 ldr r2, [r0]
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Select external trigger to start conversion */
1944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR2 &= ~(ADC_CR2_EXTSEL);
109 .loc 1 1944 5 is_stmt 1 view .LVU38
- ARM GAS /tmp/ccYW4wvq.s page 37
+ ARM GAS /tmp/cciWciU4.s page 37
110 .loc 1 1944 9 is_stmt 0 view .LVU39
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
149 .loc 1 1959 17 view .LVU58
150 0082 9368 ldr r3, [r2, #8]
151 .loc 1 1959 23 view .LVU59
- ARM GAS /tmp/ccYW4wvq.s page 38
+ ARM GAS /tmp/cciWciU4.s page 38
152 0084 23F00203 bic r3, r3, #2
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
194 00b8 013A subs r2, r2, #1
195 .loc 1 1971 25 view .LVU81
196 00ba 43EA4233 orr r3, r3, r2, lsl #13
- ARM GAS /tmp/ccYW4wvq.s page 39
+ ARM GAS /tmp/cciWciU4.s page 39
197 00be 4B60 str r3, [r1, #4]
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1987:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Enable or disable ADC end of conversion selection */
1988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->Instance->CR2 &= ~(ADC_CR2_EOCS);
236 .loc 1 1988 3 is_stmt 1 view .LVU100
- ARM GAS /tmp/ccYW4wvq.s page 40
+ ARM GAS /tmp/cciWciU4.s page 40
237 .loc 1 1988 7 is_stmt 0 view .LVU101
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
278 .loc 1 1976 19 view .LVU120
279 0120 5368 ldr r3, [r2, #4]
1976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
- ARM GAS /tmp/ccYW4wvq.s page 41
+ ARM GAS /tmp/cciWciU4.s page 41
280 .loc 1 1976 25 view .LVU121
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
323:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
331 .loc 1 323 1 view .LVU129
332 0002 10B5 push {r4, lr}
- ARM GAS /tmp/ccYW4wvq.s page 42
+ ARM GAS /tmp/cciWciU4.s page 42
333 .LCFI0:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
367 .LVL4:
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
368 .loc 1 404 3 is_stmt 1 view .LVU150
- ARM GAS /tmp/ccYW4wvq.s page 43
+ ARM GAS /tmp/cciWciU4.s page 43
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
411 .cfi_def_cfa_offset 0
412 .cfi_restore 4
413 .cfi_restore 14
- ARM GAS /tmp/ccYW4wvq.s page 44
+ ARM GAS /tmp/cciWciU4.s page 44
329:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
463 .loc 1 421 5 is_stmt 0 view .LVU171
464 0000 C8B1 cbz r0, .L27
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_StatusTypeDef tmp_hal_status = HAL_OK;
- ARM GAS /tmp/ccYW4wvq.s page 45
+ ARM GAS /tmp/cciWciU4.s page 45
465 .loc 1 417 1 view .LVU172
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
506 0030 6364 str r3, [r4, #68]
457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
507 .loc 1 457 5 view .LVU186
- ARM GAS /tmp/ccYW4wvq.s page 46
+ ARM GAS /tmp/cciWciU4.s page 46
457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
553 000a 012B cmp r3, #1
554 000c 7ED0 beq .L44
739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 47
+ ARM GAS /tmp/cciWciU4.s page 47
555 .loc 1 739 3 discriminator 2 view .LVU198
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
594 0042 002B cmp r3, #0
595 0044 F9D1 bne .L37
596 .L35:
- ARM GAS /tmp/ccYW4wvq.s page 48
+ ARM GAS /tmp/cciWciU4.s page 48
759:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
637 .loc 1 790 5 view .LVU228
794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 49
+ ARM GAS /tmp/cciWciU4.s page 49
638 .loc 1 794 5 view .LVU229
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
677 .loc 1 809 9 view .LVU245
678 00b4 1D4A ldr r2, .L52+16
- ARM GAS /tmp/ccYW4wvq.s page 50
+ ARM GAS /tmp/cciWciU4.s page 50
679 00b6 9342 cmp r3, r2
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
718 .loc 1 820 37 discriminator 1 view .LVU260
719 00e4 12F0405F tst r2, #805306368
720 00e8 16D1 bne .L48
- ARM GAS /tmp/ccYW4wvq.s page 51
+ ARM GAS /tmp/cciWciU4.s page 51
823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
764 .loc 1 838 10 view .LVU272
765 0110 0020 movs r0, #0
- ARM GAS /tmp/ccYW4wvq.s page 52
+ ARM GAS /tmp/cciWciU4.s page 52
766 .LVL28:
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
813 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2
814 0004 012B cmp r3, #1
815 0006 17D0 beq .L57
- ARM GAS /tmp/ccYW4wvq.s page 53
+ ARM GAS /tmp/cciWciU4.s page 53
857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
855 .loc 1 877 1 view .LVU296
856 003a 7047 bx lr
857 .L59:
- ARM GAS /tmp/ccYW4wvq.s page 54
+ ARM GAS /tmp/cciWciU4.s page 54
858 .align 2
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
904 .loc 1 917 15 is_stmt 0 view .LVU306
905 0018 FFF7FEFF bl HAL_GetTick
906 .LVL39:
- ARM GAS /tmp/ccYW4wvq.s page 55
+ ARM GAS /tmp/cciWciU4.s page 55
917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
944 .loc 1 936 18 is_stmt 0 view .LVU324
945 0048 0320 movs r0, #3
- ARM GAS /tmp/ccYW4wvq.s page 56
+ ARM GAS /tmp/cciWciU4.s page 56
946 004a 33E0 b .L62
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
986 007a 9A68 ldr r2, [r3, #8]
954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) &&
987 .loc 1 954 5 view .LVU339
- ARM GAS /tmp/ccYW4wvq.s page 57
+ ARM GAS /tmp/cciWciU4.s page 57
988 007c 12F0405F tst r2, #805306368
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1028 00b4 70BD pop {r4, r5, r6, pc}
1029 .LVL46:
1030 .L70:
- ARM GAS /tmp/ccYW4wvq.s page 58
+ ARM GAS /tmp/cciWciU4.s page 58
969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1078 .LVL49:
992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
1079 .loc 1 992 15 view .LVU363
- ARM GAS /tmp/ccYW4wvq.s page 59
+ ARM GAS /tmp/cciWciU4.s page 59
1080 000e 8046 mov r8, r0
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1117 003a 0320 movs r0, #3
1118 003c 14E0 b .L82
1119 .L87:
- ARM GAS /tmp/ccYW4wvq.s page 60
+ ARM GAS /tmp/cciWciU4.s page 60
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1161 007c F4E7 b .L82
1162 .cfi_endproc
1163 .LFE148:
- ARM GAS /tmp/ccYW4wvq.s page 61
+ ARM GAS /tmp/cciWciU4.s page 61
1165 .section .text.HAL_ADC_Start_IT,"ax",%progbits
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1206 001e 13D1 bne .L91
1066:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
1207 .loc 1 1066 5 is_stmt 1 view .LVU408
- ARM GAS /tmp/ccYW4wvq.s page 62
+ ARM GAS /tmp/cciWciU4.s page 62
1208 0020 9A68 ldr r2, [r3, #8]
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1249 005c 0264 str r2, [r0, #64]
1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1250 .loc 1 1089 5 view .LVU422
- ARM GAS /tmp/ccYW4wvq.s page 63
+ ARM GAS /tmp/cciWciU4.s page 63
1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1119:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1291 .loc 1 1119 7 view .LVU437
1292 009c 13F01F0F tst r3, #31
- ARM GAS /tmp/ccYW4wvq.s page 64
+ ARM GAS /tmp/cciWciU4.s page 64
1293 00a0 0DD1 bne .L98
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1332 .loc 1 1139 9 view .LVU453
1333 00ca 13F0100F tst r3, #16
- ARM GAS /tmp/ccYW4wvq.s page 65
+ ARM GAS /tmp/cciWciU4.s page 65
1334 00ce 27D1 bne .L102
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
1373 .loc 1 1160 10 view .LVU469
1374 00fe 0020 movs r0, #0
- ARM GAS /tmp/ccYW4wvq.s page 66
+ ARM GAS /tmp/cciWciU4.s page 66
1375 .LVL58:
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1419 .LVL66:
1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
1420 .loc 1 1160 10 view .LVU480
- ARM GAS /tmp/ccYW4wvq.s page 67
+ ARM GAS /tmp/cciWciU4.s page 67
1421 0122 F7E7 b .L90
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1468 000e 0268 ldr r2, [r0]
1469 0010 9368 ldr r3, [r2, #8]
1470 0012 23F00103 bic r3, r3, #1
- ARM GAS /tmp/ccYW4wvq.s page 68
+ ARM GAS /tmp/cciWciU4.s page 68
1471 0016 9360 str r3, [r2, #8]
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1512 0044 DFFFFFFB .word -67108897
1513 0048 FEEEFFFF .word -4354
1514 .cfi_endproc
- ARM GAS /tmp/ccYW4wvq.s page 69
+ ARM GAS /tmp/cciWciU4.s page 69
1515 .LFE150:
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1560 .loc 1 1389 3 view .LVU514
1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 70
+ ARM GAS /tmp/cciWciU4.s page 70
1561 .loc 1 1389 11 is_stmt 0 view .LVU515
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1601 004e 2068 ldr r0, [r4]
1602 0050 8268 ldr r2, [r0, #8]
1404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 71
+ ARM GAS /tmp/cciWciU4.s page 71
1603 .loc 1 1404 5 view .LVU530
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1438:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
1643 .loc 1 1438 40 view .LVU545
1644 0090 3548 ldr r0, .L135+12
- ARM GAS /tmp/ccYW4wvq.s page 72
+ ARM GAS /tmp/cciWciU4.s page 72
1645 0092 D063 str r0, [r2, #60]
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1683 00c4 A06B ldr r0, [r4, #56]
1684 00c6 FFF7FEFF bl HAL_DMA_Start_IT
1685 .LVL77:
- ARM GAS /tmp/ccYW4wvq.s page 73
+ ARM GAS /tmp/cciWciU4.s page 73
1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1725 .L126:
1483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
1726 .loc 1 1483 7 is_stmt 1 view .LVU577
- ARM GAS /tmp/ccYW4wvq.s page 74
+ ARM GAS /tmp/cciWciU4.s page 74
1483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1765 .loc 1 1489 31 view .LVU593
1766 012a 42F08042 orr r2, r2, #1073741824
1767 012e 9A60 str r2, [r3, #8]
- ARM GAS /tmp/ccYW4wvq.s page 75
+ ARM GAS /tmp/cciWciU4.s page 75
1504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1812 .L131:
1504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
1813 .loc 1 1504 10 view .LVU604
- ARM GAS /tmp/ccYW4wvq.s page 76
+ ARM GAS /tmp/cciWciU4.s page 76
1814 0156 0020 movs r0, #0
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1862 .loc 1 1521 3 discriminator 2 view .LVU612
1525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
1863 .loc 1 1525 3 view .LVU613
- ARM GAS /tmp/ccYW4wvq.s page 77
+ ARM GAS /tmp/cciWciU4.s page 77
1864 0012 0268 ldr r2, [r0]
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1905 0050 2364 str r3, [r4, #64]
1906 0052 09E0 b .L139
1907 .LVL89:
- ARM GAS /tmp/ccYW4wvq.s page 78
+ ARM GAS /tmp/cciWciU4.s page 78
1908 .L148:
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1949 .L149:
1950 0074 FEEEFFFF .word -4354
1951 .cfi_endproc
- ARM GAS /tmp/ccYW4wvq.s page 79
+ ARM GAS /tmp/cciWciU4.s page 79
1952 .LFE153:
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2003 .weak HAL_ADC_ConvHalfCpltCallback
2004 .syntax unified
2005 .thumb
- ARM GAS /tmp/ccYW4wvq.s page 80
+ ARM GAS /tmp/cciWciU4.s page 80
2006 .thumb_func
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Disable ADC end of single conversion interrupt on group regular */
2021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* Note: Overrun interrupt was enabled with EOC interrupt in */
2022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* HAL_ADC_Start_IT(), but is not disabled here because can be used */
- ARM GAS /tmp/ccYW4wvq.s page 81
+ ARM GAS /tmp/cciWciU4.s page 81
2023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* by overrun IRQ process below. */
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2039 .cfi_offset 3, -8
2040 .cfi_offset 14, -4
2069:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
- ARM GAS /tmp/ccYW4wvq.s page 82
+ ARM GAS /tmp/cciWciU4.s page 82
2041 .loc 1 2069 3 is_stmt 1 view .LVU653
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2088 @ frame_needed = 0, uses_anonymous_args = 0
2089 @ link register save eliminated.
1635:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** /* NOTE : This function Should not be modified, when the callback is needed,
- ARM GAS /tmp/ccYW4wvq.s page 83
+ ARM GAS /tmp/cciWciU4.s page 83
2090 .loc 1 1635 3 view .LVU661
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** tmp2 = tmp_cr1 & ADC_IT_EOC;
2134 .loc 1 1221 3 view .LVU674
1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 84
+ ARM GAS /tmp/cciWciU4.s page 84
2135 .loc 1 1222 3 view .LVU675
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2173 .L162:
1249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
2174 .loc 1 1249 7 is_stmt 1 view .LVU692
- ARM GAS /tmp/ccYW4wvq.s page 85
+ ARM GAS /tmp/cciWciU4.s page 85
2175 0040 5A68 ldr r2, [r3, #4]
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2214 .loc 1 1277 9 is_stmt 0 view .LVU707
2215 0078 236C ldr r3, [r4, #64]
1277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 86
+ ARM GAS /tmp/cciWciU4.s page 86
2216 .loc 1 1277 8 view .LVU708
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
2256 .loc 1 1295 7 is_stmt 1 view .LVU723
2257 00b6 5A68 ldr r2, [r3, #4]
- ARM GAS /tmp/ccYW4wvq.s page 87
+ ARM GAS /tmp/cciWciU4.s page 87
2258 00b8 22F08002 bic r2, r2, #128
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2297 .loc 1 1322 7 view .LVU738
2298 00f0 13F0010F tst r3, #1
2299 00f4 05D1 bne .L170
- ARM GAS /tmp/ccYW4wvq.s page 88
+ ARM GAS /tmp/cciWciU4.s page 88
2300 .L167:
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2342 .LVL119:
1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
2343 .loc 1 1363 5 view .LVU751
- ARM GAS /tmp/ccYW4wvq.s page 89
+ ARM GAS /tmp/cciWciU4.s page 89
2344 0130 2368 ldr r3, [r4]
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2092:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** hadc->ErrorCallback(hadc);
2093:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** #else
2094:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** HAL_ADC_ErrorCallback(hadc);
- ARM GAS /tmp/ccYW4wvq.s page 90
+ ARM GAS /tmp/cciWciU4.s page 90
2384 .loc 1 2094 3 is_stmt 1 view .LVU762
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2428 .loc 1 2015 5 is_stmt 1 view .LVU773
2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** (hadc->Init.ContinuousConvMode == DISABLE) &&
2429 .loc 1 2015 8 is_stmt 0 view .LVU774
- ARM GAS /tmp/ccYW4wvq.s page 91
+ ARM GAS /tmp/cciWciU4.s page 91
2430 0016 0368 ldr r3, [r0]
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2470 0054 FFF7FEFF bl HAL_ADC_ConvCpltCallback
2471 .LVL126:
2472 .L174:
- ARM GAS /tmp/ccYW4wvq.s page 92
+ ARM GAS /tmp/cciWciU4.s page 92
2059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2516 .loc 1 1671 1 is_stmt 1 view -0
2517 .cfi_startproc
2518 @ args = 0, pretend = 0, frame = 8
- ARM GAS /tmp/ccYW4wvq.s page 93
+ ARM GAS /tmp/cciWciU4.s page 93
2519 @ frame_needed = 0, uses_anonymous_args = 0
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
2558 .loc 1 1686 19 view .LVU817
2559 0028 E068 ldr r0, [r4, #12]
- ARM GAS /tmp/ccYW4wvq.s page 94
+ ARM GAS /tmp/cciWciU4.s page 94
2560 .LVL133:
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1691:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** }
2600 .loc 1 1691 29 view .LVU832
2601 0064 42EA0462 orr r2, r2, r4, lsl #24
- ARM GAS /tmp/ccYW4wvq.s page 95
+ ARM GAS /tmp/cciWciU4.s page 95
2602 0068 C260 str r2, [r0, #12]
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2641 .loc 1 1712 9 is_stmt 0 view .LVU847
2642 009e 1C68 ldr r4, [r3]
1712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
- ARM GAS /tmp/ccYW4wvq.s page 96
+ ARM GAS /tmp/cciWciU4.s page 96
2643 .loc 1 1712 19 view .LVU848
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
2684 .loc 1 1754 3 is_stmt 1 view .LVU862
1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 97
+ ARM GAS /tmp/cciWciU4.s page 97
2685 .loc 1 1754 12 is_stmt 0 view .LVU863
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2727 00fa 02EB8202 add r2, r2, r2, lsl #2
2728 00fe 233A subs r2, r2, #35
2729 0100 1F24 movs r4, #31
- ARM GAS /tmp/ccYW4wvq.s page 98
+ ARM GAS /tmp/cciWciU4.s page 98
2730 0102 04FA02F2 lsl r2, r4, r2
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2769 013e 4A68 ldr r2, [r1, #4]
2770 0140 02EB8202 add r2, r2, r2, lsl #2
2771 0144 413A subs r2, r2, #65
- ARM GAS /tmp/ccYW4wvq.s page 99
+ ARM GAS /tmp/cciWciU4.s page 99
2772 0146 0C88 ldrh r4, [r1]
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2812 .L200:
1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
2813 .loc 1 1754 44 discriminator 1 view .LVU905
- ARM GAS /tmp/ccYW4wvq.s page 100
+ ARM GAS /tmp/cciWciU4.s page 100
2814 0180 0A68 ldr r2, [r1]
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
2854 .loc 1 1767 7 is_stmt 1 view .LVU920
1767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c **** {
- ARM GAS /tmp/ccYW4wvq.s page 101
+ ARM GAS /tmp/cciWciU4.s page 101
2855 .loc 1 1767 12 is_stmt 0 view .LVU921
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2903 .loc 1 1805 3 view .LVU929
1806:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
2904 .loc 1 1806 3 view .LVU930
- ARM GAS /tmp/ccYW4wvq.s page 102
+ ARM GAS /tmp/cciWciU4.s page 102
1815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
1832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
2944 .loc 1 1832 7 is_stmt 0 view .LVU946
2945 002c 1868 ldr r0, [r3]
- ARM GAS /tmp/ccYW4wvq.s page 103
+ ARM GAS /tmp/cciWciU4.s page 103
1832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
2981 0050 8A89 ldrh r2, [r1, #12]
2982 0052 2243 orrs r2, r2, r4
2983 0054 4260 str r2, [r0, #4]
- ARM GAS /tmp/ccYW4wvq.s page 104
+ ARM GAS /tmp/cciWciU4.s page 104
1847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc.c ****
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccYW4wvq.s page 1
3030 .thumb
3031 .thumb_func
3033 HAL_ADC_GetState:
- ARM GAS /tmp/ccYW4wvq.s page 105
+ ARM GAS /tmp/cciWciU4.s page 105
3034 .LVL148:
@@ -6297,76 +6297,76 @@ ARM GAS /tmp/ccYW4wvq.s page 1
3082 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
3083 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h"
3084 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccYW4wvq.s page 106
+ ARM GAS /tmp/cciWciU4.s page 106
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_adc.c
- /tmp/ccYW4wvq.s:20 .text.ADC_Init:00000000 $t
- /tmp/ccYW4wvq.s:25 .text.ADC_Init:00000000 ADC_Init
- /tmp/ccYW4wvq.s:287 .text.ADC_Init:0000012c $d
- /tmp/ccYW4wvq.s:293 .text.HAL_ADC_MspInit:00000000 $t
- /tmp/ccYW4wvq.s:299 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
- /tmp/ccYW4wvq.s:314 .text.HAL_ADC_Init:00000000 $t
- /tmp/ccYW4wvq.s:320 .text.HAL_ADC_Init:00000000 HAL_ADC_Init
- /tmp/ccYW4wvq.s:422 .text.HAL_ADC_Init:00000054 $d
- /tmp/ccYW4wvq.s:427 .text.HAL_ADC_MspDeInit:00000000 $t
- /tmp/ccYW4wvq.s:433 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
- /tmp/ccYW4wvq.s:448 .text.HAL_ADC_DeInit:00000000 $t
- /tmp/ccYW4wvq.s:454 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit
- /tmp/ccYW4wvq.s:526 .text.HAL_ADC_Start:00000000 $t
- /tmp/ccYW4wvq.s:532 .text.HAL_ADC_Start:00000000 HAL_ADC_Start
- /tmp/ccYW4wvq.s:786 .text.HAL_ADC_Start:0000011c $d
- /tmp/ccYW4wvq.s:796 .text.HAL_ADC_Stop:00000000 $t
- /tmp/ccYW4wvq.s:802 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop
- /tmp/ccYW4wvq.s:860 .text.HAL_ADC_Stop:0000003c $d
- /tmp/ccYW4wvq.s:865 .text.HAL_ADC_PollForConversion:00000000 $t
- /tmp/ccYW4wvq.s:871 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion
- /tmp/ccYW4wvq.s:1045 .text.HAL_ADC_PollForEvent:00000000 $t
- /tmp/ccYW4wvq.s:1051 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent
- /tmp/ccYW4wvq.s:1166 .text.HAL_ADC_Start_IT:00000000 $t
- /tmp/ccYW4wvq.s:1172 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT
- /tmp/ccYW4wvq.s:1432 .text.HAL_ADC_Start_IT:00000128 $d
- /tmp/ccYW4wvq.s:1443 .text.HAL_ADC_Stop_IT:00000000 $t
- /tmp/ccYW4wvq.s:1449 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT
- /tmp/ccYW4wvq.s:1512 .text.HAL_ADC_Stop_IT:00000044 $d
- /tmp/ccYW4wvq.s:1518 .text.HAL_ADC_Start_DMA:00000000 $t
- /tmp/ccYW4wvq.s:1524 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA
- /tmp/ccYW4wvq.s:1819 .text.HAL_ADC_Start_DMA:0000015c $d
- /tmp/ccYW4wvq.s:2398 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt
- /tmp/ccYW4wvq.s:2028 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt
- /tmp/ccYW4wvq.s:2357 .text.ADC_DMAError:00000000 ADC_DMAError
- /tmp/ccYW4wvq.s:1832 .text.HAL_ADC_Stop_DMA:00000000 $t
- /tmp/ccYW4wvq.s:1838 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA
- /tmp/ccYW4wvq.s:1950 .text.HAL_ADC_Stop_DMA:00000074 $d
- /tmp/ccYW4wvq.s:1955 .text.HAL_ADC_GetValue:00000000 $t
- /tmp/ccYW4wvq.s:1961 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue
- /tmp/ccYW4wvq.s:1981 .text.HAL_ADC_ConvCpltCallback:00000000 $t
- /tmp/ccYW4wvq.s:1987 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
- /tmp/ccYW4wvq.s:2002 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t
- /tmp/ccYW4wvq.s:2008 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback
- /tmp/ccYW4wvq.s:2023 .text.ADC_DMAHalfConvCplt:00000000 $t
- /tmp/ccYW4wvq.s:2055 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t
- /tmp/ccYW4wvq.s:2061 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback
- /tmp/ccYW4wvq.s:2076 .text.HAL_ADC_ErrorCallback:00000000 $t
- /tmp/ccYW4wvq.s:2082 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback
- /tmp/ccYW4wvq.s:2097 .text.HAL_ADC_IRQHandler:00000000 $t
- /tmp/ccYW4wvq.s:2103 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler
- /tmp/ccYW4wvq.s:2352 .text.ADC_DMAError:00000000 $t
- /tmp/ccYW4wvq.s:2393 .text.ADC_DMAConvCplt:00000000 $t
- /tmp/ccYW4wvq.s:2507 .text.HAL_ADC_ConfigChannel:00000000 $t
- /tmp/ccYW4wvq.s:2513 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel
- /tmp/ccYW4wvq.s:2879 .text.HAL_ADC_ConfigChannel:000001d0 $d
- ARM GAS /tmp/ccYW4wvq.s page 107
+ /tmp/cciWciU4.s:20 .text.ADC_Init:00000000 $t
+ /tmp/cciWciU4.s:25 .text.ADC_Init:00000000 ADC_Init
+ /tmp/cciWciU4.s:287 .text.ADC_Init:0000012c $d
+ /tmp/cciWciU4.s:293 .text.HAL_ADC_MspInit:00000000 $t
+ /tmp/cciWciU4.s:299 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
+ /tmp/cciWciU4.s:314 .text.HAL_ADC_Init:00000000 $t
+ /tmp/cciWciU4.s:320 .text.HAL_ADC_Init:00000000 HAL_ADC_Init
+ /tmp/cciWciU4.s:422 .text.HAL_ADC_Init:00000054 $d
+ /tmp/cciWciU4.s:427 .text.HAL_ADC_MspDeInit:00000000 $t
+ /tmp/cciWciU4.s:433 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
+ /tmp/cciWciU4.s:448 .text.HAL_ADC_DeInit:00000000 $t
+ /tmp/cciWciU4.s:454 .text.HAL_ADC_DeInit:00000000 HAL_ADC_DeInit
+ /tmp/cciWciU4.s:526 .text.HAL_ADC_Start:00000000 $t
+ /tmp/cciWciU4.s:532 .text.HAL_ADC_Start:00000000 HAL_ADC_Start
+ /tmp/cciWciU4.s:786 .text.HAL_ADC_Start:0000011c $d
+ /tmp/cciWciU4.s:796 .text.HAL_ADC_Stop:00000000 $t
+ /tmp/cciWciU4.s:802 .text.HAL_ADC_Stop:00000000 HAL_ADC_Stop
+ /tmp/cciWciU4.s:860 .text.HAL_ADC_Stop:0000003c $d
+ /tmp/cciWciU4.s:865 .text.HAL_ADC_PollForConversion:00000000 $t
+ /tmp/cciWciU4.s:871 .text.HAL_ADC_PollForConversion:00000000 HAL_ADC_PollForConversion
+ /tmp/cciWciU4.s:1045 .text.HAL_ADC_PollForEvent:00000000 $t
+ /tmp/cciWciU4.s:1051 .text.HAL_ADC_PollForEvent:00000000 HAL_ADC_PollForEvent
+ /tmp/cciWciU4.s:1166 .text.HAL_ADC_Start_IT:00000000 $t
+ /tmp/cciWciU4.s:1172 .text.HAL_ADC_Start_IT:00000000 HAL_ADC_Start_IT
+ /tmp/cciWciU4.s:1432 .text.HAL_ADC_Start_IT:00000128 $d
+ /tmp/cciWciU4.s:1443 .text.HAL_ADC_Stop_IT:00000000 $t
+ /tmp/cciWciU4.s:1449 .text.HAL_ADC_Stop_IT:00000000 HAL_ADC_Stop_IT
+ /tmp/cciWciU4.s:1512 .text.HAL_ADC_Stop_IT:00000044 $d
+ /tmp/cciWciU4.s:1518 .text.HAL_ADC_Start_DMA:00000000 $t
+ /tmp/cciWciU4.s:1524 .text.HAL_ADC_Start_DMA:00000000 HAL_ADC_Start_DMA
+ /tmp/cciWciU4.s:1819 .text.HAL_ADC_Start_DMA:0000015c $d
+ /tmp/cciWciU4.s:2398 .text.ADC_DMAConvCplt:00000000 ADC_DMAConvCplt
+ /tmp/cciWciU4.s:2028 .text.ADC_DMAHalfConvCplt:00000000 ADC_DMAHalfConvCplt
+ /tmp/cciWciU4.s:2357 .text.ADC_DMAError:00000000 ADC_DMAError
+ /tmp/cciWciU4.s:1832 .text.HAL_ADC_Stop_DMA:00000000 $t
+ /tmp/cciWciU4.s:1838 .text.HAL_ADC_Stop_DMA:00000000 HAL_ADC_Stop_DMA
+ /tmp/cciWciU4.s:1950 .text.HAL_ADC_Stop_DMA:00000074 $d
+ /tmp/cciWciU4.s:1955 .text.HAL_ADC_GetValue:00000000 $t
+ /tmp/cciWciU4.s:1961 .text.HAL_ADC_GetValue:00000000 HAL_ADC_GetValue
+ /tmp/cciWciU4.s:1981 .text.HAL_ADC_ConvCpltCallback:00000000 $t
+ /tmp/cciWciU4.s:1987 .text.HAL_ADC_ConvCpltCallback:00000000 HAL_ADC_ConvCpltCallback
+ /tmp/cciWciU4.s:2002 .text.HAL_ADC_ConvHalfCpltCallback:00000000 $t
+ /tmp/cciWciU4.s:2008 .text.HAL_ADC_ConvHalfCpltCallback:00000000 HAL_ADC_ConvHalfCpltCallback
+ /tmp/cciWciU4.s:2023 .text.ADC_DMAHalfConvCplt:00000000 $t
+ /tmp/cciWciU4.s:2055 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 $t
+ /tmp/cciWciU4.s:2061 .text.HAL_ADC_LevelOutOfWindowCallback:00000000 HAL_ADC_LevelOutOfWindowCallback
+ /tmp/cciWciU4.s:2076 .text.HAL_ADC_ErrorCallback:00000000 $t
+ /tmp/cciWciU4.s:2082 .text.HAL_ADC_ErrorCallback:00000000 HAL_ADC_ErrorCallback
+ /tmp/cciWciU4.s:2097 .text.HAL_ADC_IRQHandler:00000000 $t
+ /tmp/cciWciU4.s:2103 .text.HAL_ADC_IRQHandler:00000000 HAL_ADC_IRQHandler
+ /tmp/cciWciU4.s:2352 .text.ADC_DMAError:00000000 $t
+ /tmp/cciWciU4.s:2393 .text.ADC_DMAConvCplt:00000000 $t
+ /tmp/cciWciU4.s:2507 .text.HAL_ADC_ConfigChannel:00000000 $t
+ /tmp/cciWciU4.s:2513 .text.HAL_ADC_ConfigChannel:00000000 HAL_ADC_ConfigChannel
+ /tmp/cciWciU4.s:2879 .text.HAL_ADC_ConfigChannel:000001d0 $d
+ ARM GAS /tmp/cciWciU4.s page 107
- /tmp/ccYW4wvq.s:2888 .text.HAL_ADC_AnalogWDGConfig:00000000 $t
- /tmp/ccYW4wvq.s:2894 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig
- /tmp/ccYW4wvq.s:3022 .text.HAL_ADC_AnalogWDGConfig:00000074 $d
- /tmp/ccYW4wvq.s:3027 .text.HAL_ADC_GetState:00000000 $t
- /tmp/ccYW4wvq.s:3033 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState
- /tmp/ccYW4wvq.s:3051 .text.HAL_ADC_GetError:00000000 $t
- /tmp/ccYW4wvq.s:3057 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError
+ /tmp/cciWciU4.s:2888 .text.HAL_ADC_AnalogWDGConfig:00000000 $t
+ /tmp/cciWciU4.s:2894 .text.HAL_ADC_AnalogWDGConfig:00000000 HAL_ADC_AnalogWDGConfig
+ /tmp/cciWciU4.s:3022 .text.HAL_ADC_AnalogWDGConfig:00000074 $d
+ /tmp/cciWciU4.s:3027 .text.HAL_ADC_GetState:00000000 $t
+ /tmp/cciWciU4.s:3033 .text.HAL_ADC_GetState:00000000 HAL_ADC_GetState
+ /tmp/cciWciU4.s:3051 .text.HAL_ADC_GetError:00000000 $t
+ /tmp/cciWciU4.s:3057 .text.HAL_ADC_GetError:00000000 HAL_ADC_GetError
UNDEFINED SYMBOLS
SystemCoreClock
diff --git a/build/stm32f7xx_hal_adc_ex.lst b/build/stm32f7xx_hal_adc_ex.lst
index b716521..4ff884c 100644
--- a/build/stm32f7xx_hal_adc_ex.lst
+++ b/build/stm32f7xx_hal_adc_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccGev6kP.s page 1
+ARM GAS /tmp/ccKephAI.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_RCC_GPIOx_CLK_ENABLE()
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init()
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (##) In case of using interrupts (e.g. HAL_ADC_Start_IT())
- ARM GAS /tmp/ccGev6kP.s page 2
+ ARM GAS /tmp/ccKephAI.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority()
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Includes ------------------------------------------------------------------*/
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** #include "stm32f7xx_hal.h"
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 3
+ ARM GAS /tmp/ccKephAI.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /** @addtogroup STM32F7xx_HAL_Driver
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @param hadc pointer to a ADC_HandleTypeDef structure that contains
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * the configuration information for the specified ADC.
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @retval HAL status
- ARM GAS /tmp/ccGev6kP.s page 4
+ ARM GAS /tmp/ccKephAI.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** */
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if Multimode enabled */
- ARM GAS /tmp/ccGev6kP.s page 5
+ ARM GAS /tmp/ccKephAI.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI))
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Enable the Peripheral */
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_ENABLE(hadc);
- ARM GAS /tmp/ccGev6kP.s page 6
+ ARM GAS /tmp/ccKephAI.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN);
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
- ARM GAS /tmp/ccGev6kP.s page 7
+ ARM GAS /tmp/ccKephAI.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if((hadc->Instance == ADC1) && tmp1 && tmp2)
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if ADC is effectively disabled */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_ADON))
- ARM GAS /tmp/ccGev6kP.s page 8
+ ARM GAS /tmp/ccKephAI.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear injected group conversion flag */
- ARM GAS /tmp/ccGev6kP.s page 9
+ ARM GAS /tmp/ccKephAI.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JSTRT | ADC_FLAG_JEOC);
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Conditioned to: */
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* - No conversion on the other group (regular group) is intended to */
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* continue (injected and regular groups stop conversion and ADC disable */
- ARM GAS /tmp/ccGev6kP.s page 10
+ ARM GAS /tmp/ccKephAI.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* are common) */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear injected group conversion flag to have similar behaviour as */
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* regular group: reading data register also clears end of conversion flag. */
- ARM GAS /tmp/ccGev6kP.s page 11
+ ARM GAS /tmp/ccKephAI.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check if ADC peripheral is disabled in order to enable it and wait during
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** Tstab time the ADC's stabilization */
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON)
- ARM GAS /tmp/ccGev6kP.s page 12
+ ARM GAS /tmp/ccKephAI.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ;
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
- ARM GAS /tmp/ccGev6kP.s page 13
+ ARM GAS /tmp/ccKephAI.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* start (in case of SW start): */
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Process locked */
- ARM GAS /tmp/ccGev6kP.s page 14
+ ARM GAS /tmp/ccKephAI.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __HAL_LOCK(hadc);
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc)
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Prevent unused argument(s) compilation warning */
- ARM GAS /tmp/ccGev6kP.s page 15
+ ARM GAS /tmp/ccKephAI.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** UNUSED(hadc);
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Clear the old sample time */
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->Instance->SMPR2 &= ~ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel);
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 16
+ ARM GAS /tmp/ccKephAI.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Set the new sample time */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** else
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Disable the selected ADC injected discontinuous mode */
- ARM GAS /tmp/ccGev6kP.s page 17
+ ARM GAS /tmp/ccKephAI.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN);
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** * @retval HAL status
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** */
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* m
- ARM GAS /tmp/ccGev6kP.s page 18
+ ARM GAS /tmp/ccKephAI.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* of end of sequence. */
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) &&
- ARM GAS /tmp/ccGev6kP.s page 19
+ ARM GAS /tmp/ccKephAI.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (HAL_IS_BIT_CLR(hadc->Instance->SQR1, ADC_SQR1_L) ||
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
33 0000 08B5 push {r3, lr}
34 .LCFI0:
35 .cfi_def_cfa_offset 8
- ARM GAS /tmp/ccGev6kP.s page 20
+ ARM GAS /tmp/ccKephAI.s page 20
36 .cfi_offset 3, -8
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
82 0002 806B ldr r0, [r0, #56]
83 .LVL5:
1039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
- ARM GAS /tmp/ccGev6kP.s page 21
+ ARM GAS /tmp/ccKephAI.s page 21
84 .loc 1 1039 5 is_stmt 0 view .LVU15
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) &&
129 .loc 1 999 7 view .LVU27
130 0018 11F0405F tst r1, #805306368
- ARM GAS /tmp/ccGev6kP.s page 22
+ ARM GAS /tmp/ccKephAI.s page 22
131 001c 19D1 bne .L7
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
171 .LVL10:
172 .L5:
1027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 23
+ ARM GAS /tmp/ccKephAI.s page 23
173 .loc 1 1027 1 view .LVU42
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
217 .loc 1 153 3 view .LVU54
218 0006 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2
219 000a 012B cmp r3, #1
- ARM GAS /tmp/ccGev6kP.s page 24
+ ARM GAS /tmp/ccKephAI.s page 24
220 000c 65D0 beq .L19
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
258 .loc 1 167 19 is_stmt 1 view .LVU70
259 0040 019B ldr r3, [sp, #4]
260 0042 002B cmp r3, #0
- ARM GAS /tmp/ccGev6kP.s page 25
+ ARM GAS /tmp/ccKephAI.s page 25
261 0044 F9D1 bne .L15
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
300 007c 0ED1 bne .L18
205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
301 .loc 1 205 7 is_stmt 1 view .LVU86
- ARM GAS /tmp/ccGev6kP.s page 26
+ ARM GAS /tmp/ccKephAI.s page 26
205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO);
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
341 .LVL22:
217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
342 .loc 1 217 7 is_stmt 1 view .LVU102
- ARM GAS /tmp/ccGev6kP.s page 27
+ ARM GAS /tmp/ccKephAI.s page 27
217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
384 .cfi_remember_state
385 .cfi_def_cfa_offset 0
386 @ sp needed
- ARM GAS /tmp/ccGev6kP.s page 28
+ ARM GAS /tmp/ccKephAI.s page 28
387 00d8 7047 bx lr
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
436 0000 82B0 sub sp, sp, #8
437 .LCFI6:
438 .cfi_def_cfa_offset 8
- ARM GAS /tmp/ccGev6kP.s page 29
+ ARM GAS /tmp/ccKephAI.s page 29
246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** uint32_t tmp1 = 0, tmp2 = 0;
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
477 .loc 1 264 5 is_stmt 1 view .LVU139
264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
- ARM GAS /tmp/ccGev6kP.s page 30
+ ARM GAS /tmp/ccKephAI.s page 30
478 .loc 1 264 10 is_stmt 0 view .LVU140
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
519 .loc 1 293 5 view .LVU154
297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 31
+ ARM GAS /tmp/ccKephAI.s page 31
520 .loc 1 297 5 view .LVU155
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
559 00a2 0020 movs r0, #0
560 .LVL37:
334:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
- ARM GAS /tmp/ccGev6kP.s page 32
+ ARM GAS /tmp/ccKephAI.s page 32
561 .loc 1 334 10 view .LVU171
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
601 .LVL43:
602 .L32:
327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 33
+ ARM GAS /tmp/ccKephAI.s page 33
603 .loc 1 327 5 is_stmt 1 view .LVU186
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
649 00fc 00230140 .word 1073816320
650 0100 00200140 .word 1073815552
651 .cfi_endproc
- ARM GAS /tmp/ccGev6kP.s page 34
+ ARM GAS /tmp/ccKephAI.s page 34
652 .LFE142:
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
695 .loc 1 370 5 is_stmt 1 view .LVU208
696 0022 9168 ldr r1, [r2, #8]
- ARM GAS /tmp/ccGev6kP.s page 35
+ ARM GAS /tmp/ccKephAI.s page 35
697 0024 21F00101 bic r1, r1, #1
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
737 .LVL56:
738 .L48:
351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 36
+ ARM GAS /tmp/ccKephAI.s page 36
739 .loc 1 351 21 view .LVU223
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
787 .LVL62:
408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
788 .loc 1 408 15 view .LVU232
- ARM GAS /tmp/ccGev6kP.s page 37
+ ARM GAS /tmp/ccKephAI.s page 37
789 000a 0646 mov r6, r0
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
825 .loc 1 424 18 is_stmt 0 view .LVU250
826 0032 0320 movs r0, #3
827 0034 32E0 b .L56
- ARM GAS /tmp/ccGev6kP.s page 38
+ ARM GAS /tmp/ccKephAI.s page 38
828 .L67:
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
868 0070 17D1 bne .L61
446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** (hadc->Init.ContinuousConvMode == DISABLE) ) ) )
869 .loc 1 446 8 view .LVU265
- ARM GAS /tmp/ccGev6kP.s page 39
+ ARM GAS /tmp/ccKephAI.s page 39
870 0072 9B68 ldr r3, [r3, #8]
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
912 .L63:
459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
913 .loc 1 459 10 view .LVU278
- ARM GAS /tmp/ccGev6kP.s page 40
+ ARM GAS /tmp/ccKephAI.s page 40
914 00aa 0020 movs r0, #0
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
958 0018 0268 ldr r2, [r0]
959 001a 5168 ldr r1, [r2, #4]
490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO) )
- ARM GAS /tmp/ccGev6kP.s page 41
+ ARM GAS /tmp/ccKephAI.s page 41
960 .loc 1 490 57 discriminator 1 view .LVU291
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1002 .loc 1 518 3 view .LVU304
1003 0056 0022 movs r2, #0
- ARM GAS /tmp/ccGev6kP.s page 42
+ ARM GAS /tmp/ccKephAI.s page 42
1004 0058 83F83C20 strb r2, [r3, #60]
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1050 .loc 1 538 17 is_stmt 0 view .LVU315
1051 0002 0023 movs r3, #0
- ARM GAS /tmp/ccGev6kP.s page 43
+ ARM GAS /tmp/ccKephAI.s page 43
1052 0004 0193 str r3, [sp, #4]
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1094 .LCFI12:
1095 .cfi_restore_state
557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
- ARM GAS /tmp/ccGev6kP.s page 44
+ ARM GAS /tmp/ccKephAI.s page 44
1096 .loc 1 557 7 is_stmt 1 view .LVU328
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** __IO uint32_t counter = 0;
1138 .loc 1 588 1 view -0
1139 .cfi_startproc
- ARM GAS /tmp/ccGev6kP.s page 45
+ ARM GAS /tmp/ccKephAI.s page 45
1140 @ args = 0, pretend = 0, frame = 8
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1179 001e 10F0010F tst r0, #1
1180 0022 13D1 bne .L87
604:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 46
+ ARM GAS /tmp/ccKephAI.s page 46
1181 .loc 1 604 5 is_stmt 1 view .LVU359
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1222 005c 42F48072 orr r2, r2, #256
1223 0060 2264 str r2, [r4, #64]
627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
- ARM GAS /tmp/ccGev6kP.s page 47
+ ARM GAS /tmp/ccKephAI.s page 47
1224 .loc 1 627 5 view .LVU373
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1262 0094 2248 ldr r0, .L99+16
1263 0096 1064 str r0, [r2, #64]
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 48
+ ARM GAS /tmp/ccKephAI.s page 48
1264 .loc 1 656 5 is_stmt 1 view .LVU390
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1303 .loc 1 683 23 view .LVU405
1304 00cc 9A68 ldr r2, [r3, #8]
683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
- ARM GAS /tmp/ccGev6kP.s page 49
+ ARM GAS /tmp/ccKephAI.s page 49
1305 .loc 1 683 7 view .LVU406
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1347 .loc 1 700 1 view .LVU419
1348 0104 03B0 add sp, sp, #12
- ARM GAS /tmp/ccGev6kP.s page 50
+ ARM GAS /tmp/ccKephAI.s page 50
1349 .LCFI15:
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1398 .loc 1 716 3 view .LVU426
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1399 .loc 1 716 3 view .LVU427
- ARM GAS /tmp/ccGev6kP.s page 51
+ ARM GAS /tmp/ccKephAI.s page 51
1400 0000 90F83C30 ldrb r3, [r0, #60] @ zero_extendqisi2
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1440 .loc 1 726 5 is_stmt 1 view .LVU441
726:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1441 .loc 1 726 8 is_stmt 0 view .LVU442
- ARM GAS /tmp/ccGev6kP.s page 52
+ ARM GAS /tmp/ccKephAI.s page 52
1442 0030 0A4A ldr r2, .L111
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1489 .thumb
1490 .thumb_func
1492 HAL_ADCEx_MultiModeGetValue:
- ARM GAS /tmp/ccGev6kP.s page 53
+ ARM GAS /tmp/ccKephAI.s page 53
1493 .LVL98:
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1543 HAL_ADCEx_InjectedConfigChannel:
1544 .LVL101:
1545 .LFB151:
- ARM GAS /tmp/ccGev6kP.s page 54
+ ARM GAS /tmp/ccKephAI.s page 54
788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1582 .loc 1 820 5 is_stmt 1 view .LVU477
820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
- ARM GAS /tmp/ccGev6kP.s page 55
+ ARM GAS /tmp/ccKephAI.s page 55
1583 .loc 1 820 9 is_stmt 0 view .LVU478
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
1623 .loc 1 836 17 view .LVU493
1624 0054 A26B ldr r2, [r4, #56]
- ARM GAS /tmp/ccGev6kP.s page 56
+ ARM GAS /tmp/ccKephAI.s page 56
836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
1667 .loc 1 851 3 is_stmt 1 view .LVU506
851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
- ARM GAS /tmp/ccGev6kP.s page 57
+ ARM GAS /tmp/ccKephAI.s page 57
1668 .loc 1 851 21 is_stmt 0 view .LVU507
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
1705 .loc 1 859 43 view .LVU525
1706 00cc CC69 ldr r4, [r1, #28]
- ARM GAS /tmp/ccGev6kP.s page 58
+ ARM GAS /tmp/ccKephAI.s page 58
859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
890:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** {
1744 .loc 1 890 3 view .LVU543
1745 00f4 022A cmp r2, #2
- ARM GAS /tmp/ccGev6kP.s page 59
+ ARM GAS /tmp/ccKephAI.s page 59
1746 00f6 46D0 beq .L127
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1784 0120 9042 cmp r0, r2
1785 0122 5AD0 beq .L139
1786 .LVL103:
- ARM GAS /tmp/ccGev6kP.s page 60
+ ARM GAS /tmp/ccKephAI.s page 60
1787 .L132:
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1827 014a 0A88 ldrh r2, [r1]
1828 014c 02EB4202 add r2, r2, r2, lsl #1
1829 0150 9440 lsls r4, r4, r2
- ARM GAS /tmp/ccGev6kP.s page 61
+ ARM GAS /tmp/ccKephAI.s page 61
831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** }
1868 .loc 1 887 25 view .LVU590
1869 017e 22F48052 bic r2, r2, #4096
- ARM GAS /tmp/ccGev6kP.s page 62
+ ARM GAS /tmp/ccKephAI.s page 62
1870 0182 4260 str r2, [r0, #4]
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** break;
1907 .loc 1 905 47 view .LVU608
1908 01aa CC68 ldr r4, [r1, #12]
- ARM GAS /tmp/ccGev6kP.s page 63
+ ARM GAS /tmp/ccKephAI.s page 63
905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** break;
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1946 01d2 42F48002 orr r2, r2, #4194304
1947 01d6 4260 str r2, [r0, #4]
1948 01d8 A0E7 b .L131
- ARM GAS /tmp/ccGev6kP.s page 64
+ ARM GAS /tmp/ccKephAI.s page 64
1949 .L139:
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
1997 .LVL109:
1998 .LFB152:
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** /* Check the parameters */
- ARM GAS /tmp/ccGev6kP.s page 65
+ ARM GAS /tmp/ccKephAI.s page 65
1999 .loc 1 944 1 is_stmt 1 view -0
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** ADC->CCR |= multimode->DMAAccessMode;
2038 .loc 1 958 6 is_stmt 0 view .LVU650
2039 0024 5868 ldr r0, [r3, #4]
- ARM GAS /tmp/ccGev6kP.s page 66
+ ARM GAS /tmp/ccKephAI.s page 66
958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c **** ADC->CCR |= multimode->DMAAccessMode;
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccGev6kP.s page 1
2078 .L144:
951:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_adc_ex.c ****
2079 .loc 1 951 3 discriminator 1 view .LVU667
- ARM GAS /tmp/ccGev6kP.s page 67
+ ARM GAS /tmp/ccKephAI.s page 67
2080 0050 0220 movs r0, #2
@@ -3983,52 +3983,52 @@ ARM GAS /tmp/ccGev6kP.s page 1
2099 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc_ex.h"
2100 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
2101 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccGev6kP.s page 68
+ ARM GAS /tmp/ccKephAI.s page 68
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_adc_ex.c
- /tmp/ccGev6kP.s:20 .text.ADC_MultiModeDMAError:00000000 $t
- /tmp/ccGev6kP.s:25 .text.ADC_MultiModeDMAError:00000000 ADC_MultiModeDMAError
- /tmp/ccGev6kP.s:61 .text.ADC_MultiModeDMAHalfConvCplt:00000000 $t
- /tmp/ccGev6kP.s:66 .text.ADC_MultiModeDMAHalfConvCplt:00000000 ADC_MultiModeDMAHalfConvCplt
- /tmp/ccGev6kP.s:93 .text.ADC_MultiModeDMAConvCplt:00000000 $t
- /tmp/ccGev6kP.s:98 .text.ADC_MultiModeDMAConvCplt:00000000 ADC_MultiModeDMAConvCplt
- /tmp/ccGev6kP.s:192 .text.HAL_ADCEx_InjectedStart:00000000 $t
- /tmp/ccGev6kP.s:198 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart
- /tmp/ccGev6kP.s:412 .text.HAL_ADCEx_InjectedStart:000000e8 $d
- /tmp/ccGev6kP.s:421 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t
- /tmp/ccGev6kP.s:427 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT
- /tmp/ccGev6kP.s:646 .text.HAL_ADCEx_InjectedStart_IT:000000f0 $d
- /tmp/ccGev6kP.s:655 .text.HAL_ADCEx_InjectedStop:00000000 $t
- /tmp/ccGev6kP.s:661 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop
- /tmp/ccGev6kP.s:754 .text.HAL_ADCEx_InjectedStop:00000060 $d
- /tmp/ccGev6kP.s:759 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t
- /tmp/ccGev6kP.s:765 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion
- /tmp/ccGev6kP.s:923 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t
- /tmp/ccGev6kP.s:929 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT
- /tmp/ccGev6kP.s:1026 .text.HAL_ADCEx_InjectedStop_IT:00000068 $d
- /tmp/ccGev6kP.s:1031 .text.HAL_ADCEx_InjectedGetValue:00000000 $t
- /tmp/ccGev6kP.s:1037 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue
- /tmp/ccGev6kP.s:1066 .text.HAL_ADCEx_InjectedGetValue:00000018 $d
- /tmp/ccGev6kP.s:1070 .text.HAL_ADCEx_InjectedGetValue:0000001c $t
- /tmp/ccGev6kP.s:1129 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t
- /tmp/ccGev6kP.s:1135 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA
- /tmp/ccGev6kP.s:1371 .text.HAL_ADCEx_MultiModeStart_DMA:00000110 $d
- /tmp/ccGev6kP.s:1383 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t
- /tmp/ccGev6kP.s:1389 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA
- /tmp/ccGev6kP.s:1480 .text.HAL_ADCEx_MultiModeStop_DMA:0000005c $d
- /tmp/ccGev6kP.s:1486 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t
- /tmp/ccGev6kP.s:1492 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue
- /tmp/ccGev6kP.s:1511 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d
- /tmp/ccGev6kP.s:1516 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t
- /tmp/ccGev6kP.s:1522 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback
- /tmp/ccGev6kP.s:1537 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t
- /tmp/ccGev6kP.s:1543 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel
- /tmp/ccGev6kP.s:1982 .text.HAL_ADCEx_InjectedConfigChannel:000001f8 $d
- /tmp/ccGev6kP.s:1990 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t
- /tmp/ccGev6kP.s:1996 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel
- /tmp/ccGev6kP.s:2087 .text.HAL_ADCEx_MultiModeConfigChannel:00000054 $d
+ /tmp/ccKephAI.s:20 .text.ADC_MultiModeDMAError:00000000 $t
+ /tmp/ccKephAI.s:25 .text.ADC_MultiModeDMAError:00000000 ADC_MultiModeDMAError
+ /tmp/ccKephAI.s:61 .text.ADC_MultiModeDMAHalfConvCplt:00000000 $t
+ /tmp/ccKephAI.s:66 .text.ADC_MultiModeDMAHalfConvCplt:00000000 ADC_MultiModeDMAHalfConvCplt
+ /tmp/ccKephAI.s:93 .text.ADC_MultiModeDMAConvCplt:00000000 $t
+ /tmp/ccKephAI.s:98 .text.ADC_MultiModeDMAConvCplt:00000000 ADC_MultiModeDMAConvCplt
+ /tmp/ccKephAI.s:192 .text.HAL_ADCEx_InjectedStart:00000000 $t
+ /tmp/ccKephAI.s:198 .text.HAL_ADCEx_InjectedStart:00000000 HAL_ADCEx_InjectedStart
+ /tmp/ccKephAI.s:412 .text.HAL_ADCEx_InjectedStart:000000e8 $d
+ /tmp/ccKephAI.s:421 .text.HAL_ADCEx_InjectedStart_IT:00000000 $t
+ /tmp/ccKephAI.s:427 .text.HAL_ADCEx_InjectedStart_IT:00000000 HAL_ADCEx_InjectedStart_IT
+ /tmp/ccKephAI.s:646 .text.HAL_ADCEx_InjectedStart_IT:000000f0 $d
+ /tmp/ccKephAI.s:655 .text.HAL_ADCEx_InjectedStop:00000000 $t
+ /tmp/ccKephAI.s:661 .text.HAL_ADCEx_InjectedStop:00000000 HAL_ADCEx_InjectedStop
+ /tmp/ccKephAI.s:754 .text.HAL_ADCEx_InjectedStop:00000060 $d
+ /tmp/ccKephAI.s:759 .text.HAL_ADCEx_InjectedPollForConversion:00000000 $t
+ /tmp/ccKephAI.s:765 .text.HAL_ADCEx_InjectedPollForConversion:00000000 HAL_ADCEx_InjectedPollForConversion
+ /tmp/ccKephAI.s:923 .text.HAL_ADCEx_InjectedStop_IT:00000000 $t
+ /tmp/ccKephAI.s:929 .text.HAL_ADCEx_InjectedStop_IT:00000000 HAL_ADCEx_InjectedStop_IT
+ /tmp/ccKephAI.s:1026 .text.HAL_ADCEx_InjectedStop_IT:00000068 $d
+ /tmp/ccKephAI.s:1031 .text.HAL_ADCEx_InjectedGetValue:00000000 $t
+ /tmp/ccKephAI.s:1037 .text.HAL_ADCEx_InjectedGetValue:00000000 HAL_ADCEx_InjectedGetValue
+ /tmp/ccKephAI.s:1066 .text.HAL_ADCEx_InjectedGetValue:00000018 $d
+ /tmp/ccKephAI.s:1070 .text.HAL_ADCEx_InjectedGetValue:0000001c $t
+ /tmp/ccKephAI.s:1129 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 $t
+ /tmp/ccKephAI.s:1135 .text.HAL_ADCEx_MultiModeStart_DMA:00000000 HAL_ADCEx_MultiModeStart_DMA
+ /tmp/ccKephAI.s:1371 .text.HAL_ADCEx_MultiModeStart_DMA:00000110 $d
+ /tmp/ccKephAI.s:1383 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 $t
+ /tmp/ccKephAI.s:1389 .text.HAL_ADCEx_MultiModeStop_DMA:00000000 HAL_ADCEx_MultiModeStop_DMA
+ /tmp/ccKephAI.s:1480 .text.HAL_ADCEx_MultiModeStop_DMA:0000005c $d
+ /tmp/ccKephAI.s:1486 .text.HAL_ADCEx_MultiModeGetValue:00000000 $t
+ /tmp/ccKephAI.s:1492 .text.HAL_ADCEx_MultiModeGetValue:00000000 HAL_ADCEx_MultiModeGetValue
+ /tmp/ccKephAI.s:1511 .text.HAL_ADCEx_MultiModeGetValue:00000008 $d
+ /tmp/ccKephAI.s:1516 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 $t
+ /tmp/ccKephAI.s:1522 .text.HAL_ADCEx_InjectedConvCpltCallback:00000000 HAL_ADCEx_InjectedConvCpltCallback
+ /tmp/ccKephAI.s:1537 .text.HAL_ADCEx_InjectedConfigChannel:00000000 $t
+ /tmp/ccKephAI.s:1543 .text.HAL_ADCEx_InjectedConfigChannel:00000000 HAL_ADCEx_InjectedConfigChannel
+ /tmp/ccKephAI.s:1982 .text.HAL_ADCEx_InjectedConfigChannel:000001f8 $d
+ /tmp/ccKephAI.s:1990 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 $t
+ /tmp/ccKephAI.s:1996 .text.HAL_ADCEx_MultiModeConfigChannel:00000000 HAL_ADCEx_MultiModeConfigChannel
+ /tmp/ccKephAI.s:2087 .text.HAL_ADCEx_MultiModeConfigChannel:00000054 $d
UNDEFINED SYMBOLS
HAL_ADC_ErrorCallback
diff --git a/build/stm32f7xx_hal_cortex.lst b/build/stm32f7xx_hal_cortex.lst
index 4109199..7751df8 100644
--- a/build/stm32f7xx_hal_cortex.lst
+++ b/build/stm32f7xx_hal_cortex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccjFay11.s page 1
+ARM GAS /tmp/ccgpby4N.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccjFay11.s page 1
28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */
29:Drivers/CMSIS/Include/core_cm7.h **** #endif
30:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 2
+ ARM GAS /tmp/ccgpby4N.s page 2
31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccjFay11.s page 1
85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
86:Drivers/CMSIS/Include/core_cm7.h **** #endif
87:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 3
+ ARM GAS /tmp/ccgpby4N.s page 3
88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccjFay11.s page 1
142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
143:Drivers/CMSIS/Include/core_cm7.h **** #endif
144:Drivers/CMSIS/Include/core_cm7.h **** #else
- ARM GAS /tmp/ccjFay11.s page 4
+ ARM GAS /tmp/ccgpby4N.s page 4
145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccjFay11.s page 1
199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!"
200:Drivers/CMSIS/Include/core_cm7.h **** #endif
201:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 5
+ ARM GAS /tmp/ccgpby4N.s page 5
202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccjFay11.s page 1
256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register
257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register
258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/
- ARM GAS /tmp/ccjFay11.s page 6
+ ARM GAS /tmp/ccgpby4N.s page 6
259:Drivers/CMSIS/Include/core_cm7.h **** /**
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccjFay11.s page 1
313:Drivers/CMSIS/Include/core_cm7.h **** typedef union
314:Drivers/CMSIS/Include/core_cm7.h **** {
315:Drivers/CMSIS/Include/core_cm7.h **** struct
- ARM GAS /tmp/ccjFay11.s page 7
+ ARM GAS /tmp/ccgpby4N.s page 7
316:Drivers/CMSIS/Include/core_cm7.h **** {
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccjFay11.s page 1
370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR
371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR
372:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 8
+ ARM GAS /tmp/ccgpby4N.s page 8
373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccjFay11.s page 1
427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register *
428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U];
429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register
- ARM GAS /tmp/ccjFay11.s page 9
+ ARM GAS /tmp/ccgpby4N.s page 9
430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U];
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccjFay11.s page 1
484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U];
485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0
486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1
- ARM GAS /tmp/ccjFay11.s page 10
+ ARM GAS /tmp/ccgpby4N.s page 10
487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccjFay11.s page 1
541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB
542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB
543:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 11
+ ARM GAS /tmp/ccgpby4N.s page 11
544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccjFay11.s page 1
598:Drivers/CMSIS/Include/core_cm7.h ****
599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB
600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB
- ARM GAS /tmp/ccjFay11.s page 12
+ ARM GAS /tmp/ccgpby4N.s page 12
601:Drivers/CMSIS/Include/core_cm7.h ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccjFay11.s page 1
655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB
656:Drivers/CMSIS/Include/core_cm7.h ****
657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB
- ARM GAS /tmp/ccjFay11.s page 13
+ ARM GAS /tmp/ccgpby4N.s page 13
658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccjFay11.s page 1
712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB
713:Drivers/CMSIS/Include/core_cm7.h ****
714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
- ARM GAS /tmp/ccjFay11.s page 14
+ ARM GAS /tmp/ccgpby4N.s page 14
715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccjFay11.s page 1
769:Drivers/CMSIS/Include/core_cm7.h ****
770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB
771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB
- ARM GAS /tmp/ccjFay11.s page 15
+ ARM GAS /tmp/ccgpby4N.s page 15
772:Drivers/CMSIS/Include/core_cm7.h ****
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccjFay11.s page 1
826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB
827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB
828:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 16
+ ARM GAS /tmp/ccgpby4N.s page 16
829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccjFay11.s page 1
883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB
884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB
885:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 17
+ ARM GAS /tmp/ccgpby4N.s page 17
886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccjFay11.s page 1
940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR:
941:Drivers/CMSIS/Include/core_cm7.h ****
942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR:
- ARM GAS /tmp/ccjFay11.s page 18
+ ARM GAS /tmp/ccgpby4N.s page 18
943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR:
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccjFay11.s page 1
997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT
998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT
999:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 19
+ ARM GAS /tmp/ccgpby4N.s page 19
1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM
1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM
1056:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 20
+ ARM GAS /tmp/ccgpby4N.s page 20
1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1111:Drivers/CMSIS/Include/core_cm7.h **** */
1112:Drivers/CMSIS/Include/core_cm7.h ****
1113:Drivers/CMSIS/Include/core_cm7.h **** /**
- ARM GAS /tmp/ccjFay11.s page 21
+ ARM GAS /tmp/ccgpby4N.s page 21
1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT).
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR
1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR
1170:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 22
+ ARM GAS /tmp/ccgpby4N.s page 22
1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */
1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN
1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN
- ARM GAS /tmp/ccjFay11.s page 23
+ ARM GAS /tmp/ccgpby4N.s page 23
1228:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U];
1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */
1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */
- ARM GAS /tmp/ccjFay11.s page 24
+ ARM GAS /tmp/ccgpby4N.s page 24
1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF
1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF
1341:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 25
+ ARM GAS /tmp/ccgpby4N.s page 25
1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV
1397:Drivers/CMSIS/Include/core_cm7.h ****
1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV
- ARM GAS /tmp/ccjFay11.s page 26
+ ARM GAS /tmp/ccgpby4N.s page 26
1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU
1454:Drivers/CMSIS/Include/core_cm7.h ****
1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */
- ARM GAS /tmp/ccjFay11.s page 27
+ ARM GAS /tmp/ccgpby4N.s page 27
1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */
1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
1512:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 28
+ ARM GAS /tmp/ccgpby4N.s page 28
1513:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */
1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS
1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS
- ARM GAS /tmp/ccjFay11.s page 29
+ ARM GAS /tmp/ccgpby4N.s page 29
1570:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register
1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug)
1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers
- ARM GAS /tmp/ccjFay11.s page 30
+ ARM GAS /tmp/ccgpby4N.s page 30
1627:Drivers/CMSIS/Include/core_cm7.h **** @{
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1681:Drivers/CMSIS/Include/core_cm7.h ****
1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core
1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core
- ARM GAS /tmp/ccjFay11.s page 31
+ ARM GAS /tmp/ccgpby4N.s page 31
1684:Drivers/CMSIS/Include/core_cm7.h ****
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type.
1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value.
1740:Drivers/CMSIS/Include/core_cm7.h **** */
- ARM GAS /tmp/ccjFay11.s page 32
+ ARM GAS /tmp/ccgpby4N.s page 32
1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions
1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions
1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions
- ARM GAS /tmp/ccjFay11.s page 33
+ ARM GAS /tmp/ccgpby4N.s page 33
1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu
1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu
1854:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 34
+ ARM GAS /tmp/ccgpby4N.s page 34
1855:Drivers/CMSIS/Include/core_cm7.h ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled.
1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled.
1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative.
- ARM GAS /tmp/ccjFay11.s page 35
+ ARM GAS /tmp/ccgpby4N.s page 35
1912:Drivers/CMSIS/Include/core_cm7.h **** */
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
- ARM GAS /tmp/ccjFay11.s page 36
+ ARM GAS /tmp/ccgpby4N.s page 36
5:Drivers/CMSIS/Include/cmsis_gcc.h **** * @date 09. April 2018
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccjFay11.s page 1
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
- ARM GAS /tmp/ccjFay11.s page 37
+ ARM GAS /tmp/ccgpby4N.s page 37
62:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED __attribute__((packed, aligned(1)))
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccjFay11.s page 1
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
- ARM GAS /tmp/ccjFay11.s page 38
+ ARM GAS /tmp/ccgpby4N.s page 38
119:Drivers/CMSIS/Include/cmsis_gcc.h **** /** \ingroup CMSIS_Core_FunctionInterface
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccjFay11.s page 1
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccjFay11.s page 39
+ ARM GAS /tmp/ccgpby4N.s page 39
176:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccjFay11.s page 1
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccjFay11.s page 40
+ ARM GAS /tmp/ccgpby4N.s page 40
233:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_xPSR(void)
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccjFay11.s page 1
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
- ARM GAS /tmp/ccjFay11.s page 41
+ ARM GAS /tmp/ccgpby4N.s page 41
290:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccjFay11.s page 1
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccjFay11.s page 42
+ ARM GAS /tmp/ccgpby4N.s page 42
347:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccjFay11.s page 1
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccjFay11.s page 43
+ ARM GAS /tmp/ccgpby4N.s page 43
404:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccjFay11.s page 1
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccjFay11.s page 44
+ ARM GAS /tmp/ccgpby4N.s page 44
461:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccjFay11.s page 1
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccjFay11.s page 45
+ ARM GAS /tmp/ccgpby4N.s page 45
518:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccjFay11.s page 1
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccjFay11.s page 46
+ ARM GAS /tmp/ccgpby4N.s page 46
575:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccjFay11.s page 1
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
- ARM GAS /tmp/ccjFay11.s page 47
+ ARM GAS /tmp/ccgpby4N.s page 47
632:Drivers/CMSIS/Include/cmsis_gcc.h **** mode.
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccjFay11.s page 1
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- ARM GAS /tmp/ccjFay11.s page 48
+ ARM GAS /tmp/ccgpby4N.s page 48
689:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccjFay11.s page 1
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccjFay11.s page 49
+ ARM GAS /tmp/ccgpby4N.s page 49
746:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccjFay11.s page 1
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
- ARM GAS /tmp/ccjFay11.s page 50
+ ARM GAS /tmp/ccgpby4N.s page 50
803:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccjFay11.s page 1
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccjFay11.s page 51
+ ARM GAS /tmp/ccgpby4N.s page 51
860:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccjFay11.s page 1
85 .align 2
86 .L3:
87 0020 00E100E0 .word -536813312
- ARM GAS /tmp/ccjFay11.s page 52
+ ARM GAS /tmp/ccgpby4N.s page 52
88 .cfi_endproc
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1985:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
1986:Drivers/CMSIS/Include/core_cm7.h **** {
1987:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0)
- ARM GAS /tmp/ccjFay11.s page 53
+ ARM GAS /tmp/ccgpby4N.s page 53
1988:Drivers/CMSIS/Include/core_cm7.h **** {
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccjFay11.s page 1
113 .LVL3:
114 .loc 2 2028 49 view .LVU22
115 0006 C9B2 uxtb r1, r1
- ARM GAS /tmp/ccjFay11.s page 54
+ ARM GAS /tmp/ccgpby4N.s page 54
116 .loc 2 2028 47 view .LVU23
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccjFay11.s page 1
153 .loc 2 2047 1 is_stmt 1 view -0
154 .cfi_startproc
155 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccjFay11.s page 55
+ ARM GAS /tmp/ccgpby4N.s page 55
156 @ frame_needed = 0, uses_anonymous_args = 0
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2061:Drivers/CMSIS/Include/core_cm7.h **** \brief Encode Priority
2062:Drivers/CMSIS/Include/core_cm7.h **** \details Encodes the priority for an interrupt with the given priority group,
2063:Drivers/CMSIS/Include/core_cm7.h **** preemptive priority value, and subpriority value.
- ARM GAS /tmp/ccjFay11.s page 56
+ ARM GAS /tmp/ccgpby4N.s page 56
2064:Drivers/CMSIS/Include/core_cm7.h **** In case of a conflict between priority grouping and available
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccjFay11.s page 1
235 0020 0EFA0CF0 lsl r0, lr, ip
236 .LVL13:
237 .loc 2 2081 30 view .LVU57
- ARM GAS /tmp/ccjFay11.s page 57
+ ARM GAS /tmp/ccgpby4N.s page 57
238 0024 21EA0001 bic r1, r1, r0
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccjFay11.s page 1
275 .cfi_offset 14, -4
2100:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used
276 .loc 2 2100 3 is_stmt 1 view .LVU64
- ARM GAS /tmp/ccjFay11.s page 58
+ ARM GAS /tmp/ccgpby4N.s page 58
277 .loc 2 2100 12 is_stmt 0 view .LVU65
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccjFay11.s page 1
322 .L21:
2105:Drivers/CMSIS/Include/core_cm7.h ****
323 .loc 2 2105 109 discriminator 2 view .LVU84
- ARM GAS /tmp/ccjFay11.s page 59
+ ARM GAS /tmp/ccgpby4N.s page 59
324 003a 0021 movs r1, #0
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccjFay11.s page 1
340 .cfi_startproc
341 @ Volatile: function does not return.
342 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccjFay11.s page 60
+ ARM GAS /tmp/ccgpby4N.s page 60
343 @ frame_needed = 0, uses_anonymous_args = 0
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccjFay11.s page 1
385 .loc 2 2156 3 view .LVU98
2157:Drivers/CMSIS/Include/core_cm7.h **** {
2158:Drivers/CMSIS/Include/core_cm7.h **** __NOP();
- ARM GAS /tmp/ccjFay11.s page 61
+ ARM GAS /tmp/ccgpby4N.s page 61
386 .loc 2 2158 5 discriminator 1 view .LVU99
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccjFay11.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** -@- When the NVIC_PRIORITYGROUP_0 is selected, IRQ preemption is no more possible.
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** The pending IRQ priority will be managed only by the sub priority.
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
- ARM GAS /tmp/ccjFay11.s page 62
+ ARM GAS /tmp/ccgpby4N.s page 62
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** -@- IRQ priority order (sorted by highest to lowest priority):
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccjFay11.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** */
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /** @defgroup CORTEX CORTEX
- ARM GAS /tmp/ccjFay11.s page 63
+ ARM GAS /tmp/ccgpby4N.s page 63
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief CORTEX HAL module driver
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccjFay11.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** {
413 .loc 1 143 1 view -0
414 .cfi_startproc
- ARM GAS /tmp/ccjFay11.s page 64
+ ARM GAS /tmp/ccgpby4N.s page 64
415 @ args = 0, pretend = 0, frame = 0
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccjFay11.s page 1
451 .LVL32:
1875:Drivers/CMSIS/Include/core_cm7.h **** }
452 .loc 2 1875 3 is_stmt 1 view .LVU117
- ARM GAS /tmp/ccjFay11.s page 65
+ ARM GAS /tmp/ccgpby4N.s page 65
1875:Drivers/CMSIS/Include/core_cm7.h **** }
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccjFay11.s page 1
166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** uint32_t prioritygroup = 0x00;
490 .loc 1 166 3 is_stmt 1 view .LVU123
491 .LVL35:
- ARM GAS /tmp/ccjFay11.s page 66
+ ARM GAS /tmp/ccgpby4N.s page 66
167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccjFay11.s page 1
534 .thumb
535 .thumb_func
537 HAL_NVIC_EnableIRQ:
- ARM GAS /tmp/ccjFay11.s page 67
+ ARM GAS /tmp/ccgpby4N.s page 67
538 .LVL41:
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccjFay11.s page 1
566 000e 024A ldr r2, .L36
567 0010 42F82030 str r3, [r2, r0, lsl #2]
568 .LVL43:
- ARM GAS /tmp/ccjFay11.s page 68
+ ARM GAS /tmp/ccgpby4N.s page 68
569 .L34:
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccjFay11.s page 1
607 0006 08BD pop {r3, pc}
608 .cfi_endproc
609 .LFE144:
- ARM GAS /tmp/ccjFay11.s page 69
+ ARM GAS /tmp/ccgpby4N.s page 69
611 .section .text.HAL_NVIC_SystemReset,"ax",%progbits
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccjFay11.s page 1
648 @ args = 0, pretend = 0, frame = 0
649 @ frame_needed = 0, uses_anonymous_args = 0
650 @ link register save eliminated.
- ARM GAS /tmp/ccjFay11.s page 70
+ ARM GAS /tmp/ccgpby4N.s page 70
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** return SysTick_Config(TicksNumb);
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2209:Drivers/CMSIS/Include/core_cm7.h ****
2210:Drivers/CMSIS/Include/core_cm7.h ****
2211:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 71
+ ARM GAS /tmp/ccgpby4N.s page 71
2212:Drivers/CMSIS/Include/core_cm7.h **** /* ########################## Cache functions #################################### */
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2266:Drivers/CMSIS/Include/core_cm7.h **** {
2267:Drivers/CMSIS/Include/core_cm7.h **** #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
2268:Drivers/CMSIS/Include/core_cm7.h **** __DSB();
- ARM GAS /tmp/ccjFay11.s page 72
+ ARM GAS /tmp/ccgpby4N.s page 72
2269:Drivers/CMSIS/Include/core_cm7.h **** __ISB();
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2323:Drivers/CMSIS/Include/core_cm7.h **** uint32_t sets;
2324:Drivers/CMSIS/Include/core_cm7.h **** uint32_t ways;
2325:Drivers/CMSIS/Include/core_cm7.h ****
- ARM GAS /tmp/ccjFay11.s page 73
+ ARM GAS /tmp/ccgpby4N.s page 73
2326:Drivers/CMSIS/Include/core_cm7.h **** SCB->CSSELR = 0U; /*(0U << 1U) | 0U;*/ /* Level 1 data cache */
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2380:Drivers/CMSIS/Include/core_cm7.h **** } while(sets-- != 0U);
2381:Drivers/CMSIS/Include/core_cm7.h ****
2382:Drivers/CMSIS/Include/core_cm7.h **** __DSB();
- ARM GAS /tmp/ccjFay11.s page 74
+ ARM GAS /tmp/ccgpby4N.s page 74
2383:Drivers/CMSIS/Include/core_cm7.h **** __ISB();
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2437:Drivers/CMSIS/Include/core_cm7.h **** ccsidr = SCB->CCSIDR;
2438:Drivers/CMSIS/Include/core_cm7.h ****
2439:Drivers/CMSIS/Include/core_cm7.h **** /* clean & invalidate D-Cache */
- ARM GAS /tmp/ccjFay11.s page 75
+ ARM GAS /tmp/ccgpby4N.s page 75
2440:Drivers/CMSIS/Include/core_cm7.h **** sets = (uint32_t)(CCSIDR_SETS(ccsidr));
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2494:Drivers/CMSIS/Include/core_cm7.h **** int32_t op_size = dsize;
2495:Drivers/CMSIS/Include/core_cm7.h **** uint32_t op_addr = (uint32_t) addr;
2496:Drivers/CMSIS/Include/core_cm7.h **** int32_t linesize = 32; /* in Cortex-M7 size of cache line is fixed to 8 words (
- ARM GAS /tmp/ccjFay11.s page 76
+ ARM GAS /tmp/ccgpby4N.s page 76
2497:Drivers/CMSIS/Include/core_cm7.h ****
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccjFay11.s page 1
2551:Drivers/CMSIS/Include/core_cm7.h **** #if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
2552:Drivers/CMSIS/Include/core_cm7.h ****
2553:Drivers/CMSIS/Include/core_cm7.h **** /**
- ARM GAS /tmp/ccjFay11.s page 77
+ ARM GAS /tmp/ccgpby4N.s page 77
2554:Drivers/CMSIS/Include/core_cm7.h **** \brief System Tick Configuration
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccjFay11.s page 1
683 .loc 2 2573 3 is_stmt 1 view .LVU172
684 .loc 2 2573 18 is_stmt 0 view .LVU173
685 0016 0020 movs r0, #0
- ARM GAS /tmp/ccjFay11.s page 78
+ ARM GAS /tmp/ccgpby4N.s page 78
686 .LVL51:
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccjFay11.s page 1
246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** @endverbatim
- ARM GAS /tmp/ccjFay11.s page 79
+ ARM GAS /tmp/ccgpby4N.s page 79
249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @{
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccjFay11.s page 1
266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** MPU->CTRL = 0;
747 .loc 1 266 3 is_stmt 1 view .LVU189
748 .loc 1 266 13 is_stmt 0 view .LVU190
- ARM GAS /tmp/ccjFay11.s page 80
+ ARM GAS /tmp/ccgpby4N.s page 80
749 000e 0022 movs r2, #0
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccjFay11.s page 1
785 .loc 1 286 14 view .LVU198
786 000c 42F48032 orr r2, r2, #65536
787 0010 5A62 str r2, [r3, #36]
- ARM GAS /tmp/ccjFay11.s page 81
+ ARM GAS /tmp/ccgpby4N.s page 81
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccjFay11.s page 1
292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /**
294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Enables the MPU Region.
- ARM GAS /tmp/ccjFay11.s page 82
+ ARM GAS /tmp/ccgpby4N.s page 82
295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval None
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccjFay11.s page 1
871 @ frame_needed = 0, uses_anonymous_args = 0
872 @ link register save eliminated.
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /* Check the parameters */
- ARM GAS /tmp/ccjFay11.s page 83
+ ARM GAS /tmp/ccgpby4N.s page 83
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_REGION_NUMBER(RegionNumber));
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccjFay11.s page 1
908 .loc 1 336 3 view .LVU221
337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_REGION_PERMISSION_ATTRIBUTE(MPU_Init->AccessPermission));
909 .loc 1 337 3 view .LVU222
- ARM GAS /tmp/ccjFay11.s page 84
+ ARM GAS /tmp/ccgpby4N.s page 84
338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** assert_param(IS_MPU_TEX_LEVEL(MPU_Init->TypeExtField));
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccjFay11.s page 1
356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** ((uint32_t)MPU_Init->IsShareable << MPU_RASR_S_Pos) |
944 .loc 1 356 34 view .LVU243
945 002a 417B ldrb r1, [r0, #13] @ zero_extendqisi2
- ARM GAS /tmp/ccjFay11.s page 85
+ ARM GAS /tmp/ccgpby4N.s page 85
355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** ((uint32_t)MPU_Init->TypeExtField << MPU_RASR_TEX_Pos) |
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccjFay11.s page 1
364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
365:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /**
366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Gets the priority grouping field from the NVIC Interrupt Controller.
- ARM GAS /tmp/ccjFay11.s page 86
+ ARM GAS /tmp/ccgpby4N.s page 86
367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field)
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccjFay11.s page 1
384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_1: 1 bits for preemption priority
385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * 3 bits for subpriority
386:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @arg NVIC_PRIORITYGROUP_2: 2 bits for preemption priority
- ARM GAS /tmp/ccjFay11.s page 87
+ ARM GAS /tmp/ccgpby4N.s page 87
387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * 2 bits for subpriority
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1064 .LFB154:
403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c ****
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** /**
- ARM GAS /tmp/ccjFay11.s page 88
+ ARM GAS /tmp/ccgpby4N.s page 88
405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @brief Sets Pending bit of an external interrupt.
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1096 .loc 2 1974 43 view .LVU282
1097 .LBE65:
1098 .LBE64:
- ARM GAS /tmp/ccjFay11.s page 89
+ ARM GAS /tmp/ccgpby4N.s page 89
418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** }
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1133 0002 0BDB blt .L73
1955:Drivers/CMSIS/Include/core_cm7.h **** }
1134 .loc 2 1955 5 is_stmt 1 view .LVU291
- ARM GAS /tmp/ccjFay11.s page 90
+ ARM GAS /tmp/ccgpby4N.s page 90
1955:Drivers/CMSIS/Include/core_cm7.h **** }
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccjFay11.s page 1
445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn)
446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** {
1175 .loc 1 446 1 is_stmt 1 view -0
- ARM GAS /tmp/ccjFay11.s page 91
+ ARM GAS /tmp/ccgpby4N.s page 91
1176 .cfi_startproc
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1214 0018 00E100E0 .word -536813312
1215 .cfi_endproc
1216 .LFE156:
- ARM GAS /tmp/ccjFay11.s page 92
+ ARM GAS /tmp/ccgpby4N.s page 92
1218 .section .text.HAL_NVIC_GetActive,"ax",%progbits
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1250 000a 52F82330 ldr r3, [r2, r3, lsl #2]
2006:Drivers/CMSIS/Include/core_cm7.h **** }
1251 .loc 2 2006 91 view .LVU324
- ARM GAS /tmp/ccjFay11.s page 93
+ ARM GAS /tmp/ccgpby4N.s page 93
1252 000e 00F01F00 and r0, r0, #31
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccjFay11.s page 1
1290 .loc 1 482 3 view .LVU331
483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** if (CLKSource == SYSTICK_CLKSOURCE_HCLK)
1291 .loc 1 483 3 view .LVU332
- ARM GAS /tmp/ccjFay11.s page 94
+ ARM GAS /tmp/ccgpby4N.s page 94
1292 .loc 1 483 6 is_stmt 0 view .LVU333
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccjFay11.s page 1
504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** * @retval None
505:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** */
506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** __weak void HAL_SYSTICK_Callback(void)
- ARM GAS /tmp/ccjFay11.s page 95
+ ARM GAS /tmp/ccgpby4N.s page 95
507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_cortex.c **** {
@@ -5687,83 +5687,83 @@ ARM GAS /tmp/ccjFay11.s page 1
1363 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
1364 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
1365 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
- ARM GAS /tmp/ccjFay11.s page 96
+ ARM GAS /tmp/ccgpby4N.s page 96
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_cortex.c
- /tmp/ccjFay11.s:20 .text.__NVIC_DisableIRQ:00000000 $t
- /tmp/ccjFay11.s:25 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ
- /tmp/ccjFay11.s:87 .text.__NVIC_DisableIRQ:00000020 $d
- /tmp/ccjFay11.s:92 .text.__NVIC_SetPriority:00000000 $t
- /tmp/ccjFay11.s:97 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority
- /tmp/ccjFay11.s:139 .text.__NVIC_SetPriority:0000001c $d
- /tmp/ccjFay11.s:145 .text.__NVIC_GetPriority:00000000 $t
- /tmp/ccjFay11.s:150 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority
- /tmp/ccjFay11.s:185 .text.__NVIC_GetPriority:00000018 $d
- /tmp/ccjFay11.s:191 .text.NVIC_EncodePriority:00000000 $t
- /tmp/ccjFay11.s:196 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
- /tmp/ccjFay11.s:258 .text.NVIC_DecodePriority:00000000 $t
- /tmp/ccjFay11.s:263 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority
- /tmp/ccjFay11.s:332 .text.__NVIC_SystemReset:00000000 $t
- /tmp/ccjFay11.s:337 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset
- /tmp/ccjFay11.s:398 .text.__NVIC_SystemReset:0000001c $d
- /tmp/ccjFay11.s:404 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t
- /tmp/ccjFay11.s:410 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping
- /tmp/ccjFay11.s:464 .text.HAL_NVIC_SetPriorityGrouping:0000001c $d
- /tmp/ccjFay11.s:470 .text.HAL_NVIC_SetPriority:00000000 $t
- /tmp/ccjFay11.s:476 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority
- /tmp/ccjFay11.s:526 .text.HAL_NVIC_SetPriority:0000001c $d
- /tmp/ccjFay11.s:531 .text.HAL_NVIC_EnableIRQ:00000000 $t
- /tmp/ccjFay11.s:537 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ
- /tmp/ccjFay11.s:578 .text.HAL_NVIC_EnableIRQ:00000018 $d
- /tmp/ccjFay11.s:583 .text.HAL_NVIC_DisableIRQ:00000000 $t
- /tmp/ccjFay11.s:589 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ
- /tmp/ccjFay11.s:612 .text.HAL_NVIC_SystemReset:00000000 $t
- /tmp/ccjFay11.s:618 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset
- /tmp/ccjFay11.s:637 .text.HAL_SYSTICK_Config:00000000 $t
- /tmp/ccjFay11.s:643 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config
- /tmp/ccjFay11.s:708 .text.HAL_SYSTICK_Config:00000024 $d
- /tmp/ccjFay11.s:713 .text.HAL_MPU_Disable:00000000 $t
- /tmp/ccjFay11.s:719 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable
- /tmp/ccjFay11.s:756 .text.HAL_MPU_Disable:00000018 $d
- /tmp/ccjFay11.s:761 .text.HAL_MPU_Enable:00000000 $t
- /tmp/ccjFay11.s:767 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable
- /tmp/ccjFay11.s:821 .text.HAL_MPU_Enable:0000001c $d
- /tmp/ccjFay11.s:826 .text.HAL_MPU_EnableRegion:00000000 $t
- /tmp/ccjFay11.s:832 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion
- /tmp/ccjFay11.s:854 .text.HAL_MPU_EnableRegion:00000014 $d
- /tmp/ccjFay11.s:859 .text.HAL_MPU_DisableRegion:00000000 $t
- /tmp/ccjFay11.s:865 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion
- /tmp/ccjFay11.s:887 .text.HAL_MPU_DisableRegion:00000014 $d
- /tmp/ccjFay11.s:892 .text.HAL_MPU_ConfigRegion:00000000 $t
- /tmp/ccjFay11.s:898 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion
- /tmp/ccjFay11.s:975 .text.HAL_MPU_ConfigRegion:00000054 $d
- /tmp/ccjFay11.s:980 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t
- /tmp/ccjFay11.s:986 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping
- /tmp/ccjFay11.s:1010 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d
- /tmp/ccjFay11.s:1015 .text.HAL_NVIC_GetPriority:00000000 $t
- /tmp/ccjFay11.s:1021 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority
- /tmp/ccjFay11.s:1056 .text.HAL_NVIC_SetPendingIRQ:00000000 $t
- /tmp/ccjFay11.s:1062 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ
- /tmp/ccjFay11.s:1104 .text.HAL_NVIC_SetPendingIRQ:00000018 $d
- ARM GAS /tmp/ccjFay11.s page 97
+ /tmp/ccgpby4N.s:20 .text.__NVIC_DisableIRQ:00000000 $t
+ /tmp/ccgpby4N.s:25 .text.__NVIC_DisableIRQ:00000000 __NVIC_DisableIRQ
+ /tmp/ccgpby4N.s:87 .text.__NVIC_DisableIRQ:00000020 $d
+ /tmp/ccgpby4N.s:92 .text.__NVIC_SetPriority:00000000 $t
+ /tmp/ccgpby4N.s:97 .text.__NVIC_SetPriority:00000000 __NVIC_SetPriority
+ /tmp/ccgpby4N.s:139 .text.__NVIC_SetPriority:0000001c $d
+ /tmp/ccgpby4N.s:145 .text.__NVIC_GetPriority:00000000 $t
+ /tmp/ccgpby4N.s:150 .text.__NVIC_GetPriority:00000000 __NVIC_GetPriority
+ /tmp/ccgpby4N.s:185 .text.__NVIC_GetPriority:00000018 $d
+ /tmp/ccgpby4N.s:191 .text.NVIC_EncodePriority:00000000 $t
+ /tmp/ccgpby4N.s:196 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority
+ /tmp/ccgpby4N.s:258 .text.NVIC_DecodePriority:00000000 $t
+ /tmp/ccgpby4N.s:263 .text.NVIC_DecodePriority:00000000 NVIC_DecodePriority
+ /tmp/ccgpby4N.s:332 .text.__NVIC_SystemReset:00000000 $t
+ /tmp/ccgpby4N.s:337 .text.__NVIC_SystemReset:00000000 __NVIC_SystemReset
+ /tmp/ccgpby4N.s:398 .text.__NVIC_SystemReset:0000001c $d
+ /tmp/ccgpby4N.s:404 .text.HAL_NVIC_SetPriorityGrouping:00000000 $t
+ /tmp/ccgpby4N.s:410 .text.HAL_NVIC_SetPriorityGrouping:00000000 HAL_NVIC_SetPriorityGrouping
+ /tmp/ccgpby4N.s:464 .text.HAL_NVIC_SetPriorityGrouping:0000001c $d
+ /tmp/ccgpby4N.s:470 .text.HAL_NVIC_SetPriority:00000000 $t
+ /tmp/ccgpby4N.s:476 .text.HAL_NVIC_SetPriority:00000000 HAL_NVIC_SetPriority
+ /tmp/ccgpby4N.s:526 .text.HAL_NVIC_SetPriority:0000001c $d
+ /tmp/ccgpby4N.s:531 .text.HAL_NVIC_EnableIRQ:00000000 $t
+ /tmp/ccgpby4N.s:537 .text.HAL_NVIC_EnableIRQ:00000000 HAL_NVIC_EnableIRQ
+ /tmp/ccgpby4N.s:578 .text.HAL_NVIC_EnableIRQ:00000018 $d
+ /tmp/ccgpby4N.s:583 .text.HAL_NVIC_DisableIRQ:00000000 $t
+ /tmp/ccgpby4N.s:589 .text.HAL_NVIC_DisableIRQ:00000000 HAL_NVIC_DisableIRQ
+ /tmp/ccgpby4N.s:612 .text.HAL_NVIC_SystemReset:00000000 $t
+ /tmp/ccgpby4N.s:618 .text.HAL_NVIC_SystemReset:00000000 HAL_NVIC_SystemReset
+ /tmp/ccgpby4N.s:637 .text.HAL_SYSTICK_Config:00000000 $t
+ /tmp/ccgpby4N.s:643 .text.HAL_SYSTICK_Config:00000000 HAL_SYSTICK_Config
+ /tmp/ccgpby4N.s:708 .text.HAL_SYSTICK_Config:00000024 $d
+ /tmp/ccgpby4N.s:713 .text.HAL_MPU_Disable:00000000 $t
+ /tmp/ccgpby4N.s:719 .text.HAL_MPU_Disable:00000000 HAL_MPU_Disable
+ /tmp/ccgpby4N.s:756 .text.HAL_MPU_Disable:00000018 $d
+ /tmp/ccgpby4N.s:761 .text.HAL_MPU_Enable:00000000 $t
+ /tmp/ccgpby4N.s:767 .text.HAL_MPU_Enable:00000000 HAL_MPU_Enable
+ /tmp/ccgpby4N.s:821 .text.HAL_MPU_Enable:0000001c $d
+ /tmp/ccgpby4N.s:826 .text.HAL_MPU_EnableRegion:00000000 $t
+ /tmp/ccgpby4N.s:832 .text.HAL_MPU_EnableRegion:00000000 HAL_MPU_EnableRegion
+ /tmp/ccgpby4N.s:854 .text.HAL_MPU_EnableRegion:00000014 $d
+ /tmp/ccgpby4N.s:859 .text.HAL_MPU_DisableRegion:00000000 $t
+ /tmp/ccgpby4N.s:865 .text.HAL_MPU_DisableRegion:00000000 HAL_MPU_DisableRegion
+ /tmp/ccgpby4N.s:887 .text.HAL_MPU_DisableRegion:00000014 $d
+ /tmp/ccgpby4N.s:892 .text.HAL_MPU_ConfigRegion:00000000 $t
+ /tmp/ccgpby4N.s:898 .text.HAL_MPU_ConfigRegion:00000000 HAL_MPU_ConfigRegion
+ /tmp/ccgpby4N.s:975 .text.HAL_MPU_ConfigRegion:00000054 $d
+ /tmp/ccgpby4N.s:980 .text.HAL_NVIC_GetPriorityGrouping:00000000 $t
+ /tmp/ccgpby4N.s:986 .text.HAL_NVIC_GetPriorityGrouping:00000000 HAL_NVIC_GetPriorityGrouping
+ /tmp/ccgpby4N.s:1010 .text.HAL_NVIC_GetPriorityGrouping:0000000c $d
+ /tmp/ccgpby4N.s:1015 .text.HAL_NVIC_GetPriority:00000000 $t
+ /tmp/ccgpby4N.s:1021 .text.HAL_NVIC_GetPriority:00000000 HAL_NVIC_GetPriority
+ /tmp/ccgpby4N.s:1056 .text.HAL_NVIC_SetPendingIRQ:00000000 $t
+ /tmp/ccgpby4N.s:1062 .text.HAL_NVIC_SetPendingIRQ:00000000 HAL_NVIC_SetPendingIRQ
+ /tmp/ccgpby4N.s:1104 .text.HAL_NVIC_SetPendingIRQ:00000018 $d
+ ARM GAS /tmp/ccgpby4N.s page 97
- /tmp/ccjFay11.s:1109 .text.HAL_NVIC_GetPendingIRQ:00000000 $t
- /tmp/ccjFay11.s:1115 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ
- /tmp/ccjFay11.s:1161 .text.HAL_NVIC_GetPendingIRQ:00000020 $d
- /tmp/ccjFay11.s:1166 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t
- /tmp/ccjFay11.s:1172 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ
- /tmp/ccjFay11.s:1214 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d
- /tmp/ccjFay11.s:1219 .text.HAL_NVIC_GetActive:00000000 $t
- /tmp/ccjFay11.s:1225 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive
- /tmp/ccjFay11.s:1271 .text.HAL_NVIC_GetActive:00000020 $d
- /tmp/ccjFay11.s:1276 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t
- /tmp/ccjFay11.s:1282 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig
- /tmp/ccjFay11.s:1317 .text.HAL_SYSTICK_Callback:00000000 $t
- /tmp/ccjFay11.s:1323 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback
- /tmp/ccjFay11.s:1336 .text.HAL_SYSTICK_IRQHandler:00000000 $t
- /tmp/ccjFay11.s:1342 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler
+ /tmp/ccgpby4N.s:1109 .text.HAL_NVIC_GetPendingIRQ:00000000 $t
+ /tmp/ccgpby4N.s:1115 .text.HAL_NVIC_GetPendingIRQ:00000000 HAL_NVIC_GetPendingIRQ
+ /tmp/ccgpby4N.s:1161 .text.HAL_NVIC_GetPendingIRQ:00000020 $d
+ /tmp/ccgpby4N.s:1166 .text.HAL_NVIC_ClearPendingIRQ:00000000 $t
+ /tmp/ccgpby4N.s:1172 .text.HAL_NVIC_ClearPendingIRQ:00000000 HAL_NVIC_ClearPendingIRQ
+ /tmp/ccgpby4N.s:1214 .text.HAL_NVIC_ClearPendingIRQ:00000018 $d
+ /tmp/ccgpby4N.s:1219 .text.HAL_NVIC_GetActive:00000000 $t
+ /tmp/ccgpby4N.s:1225 .text.HAL_NVIC_GetActive:00000000 HAL_NVIC_GetActive
+ /tmp/ccgpby4N.s:1271 .text.HAL_NVIC_GetActive:00000020 $d
+ /tmp/ccgpby4N.s:1276 .text.HAL_SYSTICK_CLKSourceConfig:00000000 $t
+ /tmp/ccgpby4N.s:1282 .text.HAL_SYSTICK_CLKSourceConfig:00000000 HAL_SYSTICK_CLKSourceConfig
+ /tmp/ccgpby4N.s:1317 .text.HAL_SYSTICK_Callback:00000000 $t
+ /tmp/ccgpby4N.s:1323 .text.HAL_SYSTICK_Callback:00000000 HAL_SYSTICK_Callback
+ /tmp/ccgpby4N.s:1336 .text.HAL_SYSTICK_IRQHandler:00000000 $t
+ /tmp/ccgpby4N.s:1342 .text.HAL_SYSTICK_IRQHandler:00000000 HAL_SYSTICK_IRQHandler
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_dma.lst b/build/stm32f7xx_hal_dma.lst
index 2c17c45..128f3e4 100644
--- a/build/stm32f7xx_hal_dma.lst
+++ b/build/stm32f7xx_hal_dma.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccbl0nwv.s page 1
+ARM GAS /tmp/ccgO0Rhu.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_RCC_DMA1_CLK_ENABLE() or __HAL_RCC_DMA2_CLK_ENABLE().
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** *** Polling mode IO operation ***
- ARM GAS /tmp/ccbl0nwv.s page 2
+ ARM GAS /tmp/ccgO0Rhu.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** =================================
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** *
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** * Copyright (c) 2017 STMicroelectronics.
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** * All rights reserved.
- ARM GAS /tmp/ccbl0nwv.s page 3
+ ARM GAS /tmp/ccgO0Rhu.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** *
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** * @{
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** */
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 4
+ ARM GAS /tmp/ccgO0Rhu.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /** @addtogroup DMA_Exported_Functions_Group1
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 5
+ ARM GAS /tmp/ccgO0Rhu.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Change DMA peripheral state */
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear Direct mode and FIFO threshold bits */
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** tmp &= (uint32_t)~(DMA_SxFCR_DMDIS | DMA_SxFCR_FTH);
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 6
+ ARM GAS /tmp/ccgO0Rhu.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Prepare the DMA Stream FIFO configuration */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Check the DMA peripheral state */
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(hdma == NULL)
- ARM GAS /tmp/ccbl0nwv.s page 7
+ ARM GAS /tmp/ccgO0Rhu.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Release Lock */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_UNLOCK(hdma);
- ARM GAS /tmp/ccbl0nwv.s page 8
+ ARM GAS /tmp/ccgO0Rhu.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Enable the Peripheral */
- ARM GAS /tmp/ccbl0nwv.s page 9
+ ARM GAS /tmp/ccgO0Rhu.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_DMA_ENABLE(hdma);
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->CR |= DMA_IT_HT;
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
- ARM GAS /tmp/ccbl0nwv.s page 10
+ ARM GAS /tmp/ccgO0Rhu.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Disable the stream */
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** __HAL_DMA_DISABLE(hdma);
- ARM GAS /tmp/ccbl0nwv.s page 11
+ ARM GAS /tmp/ccgO0Rhu.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** return HAL_OK;
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
- ARM GAS /tmp/ccbl0nwv.s page 12
+ ARM GAS /tmp/ccgO0Rhu.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Check for the Timeout (Not applicable in circular mode)*/
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(Timeout != HAL_MAX_DELAY)
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
- ARM GAS /tmp/ccbl0nwv.s page 13
+ ARM GAS /tmp/ccgO0Rhu.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Change the DMA state */
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->State= HAL_DMA_STATE_READY;
- ARM GAS /tmp/ccbl0nwv.s page 14
+ ARM GAS /tmp/ccgO0Rhu.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear the transfer error flag */
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** regs->IFCR = DMA_FLAG_TEIF0_4 << hdma->StreamIndex;
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 15
+ ARM GAS /tmp/ccgO0Rhu.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Update error code */
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1HalfCpltCallback(hdma);
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
- ARM GAS /tmp/ccbl0nwv.s page 16
+ ARM GAS /tmp/ccgO0Rhu.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Current memory buffer used is Memory 0 */
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if((hdma->Instance->CR & DMA_SxCR_CT) == RESET)
- ARM GAS /tmp/ccbl0nwv.s page 17
+ ARM GAS /tmp/ccgO0Rhu.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if (++count > timeout)
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break;
- ARM GAS /tmp/ccbl0nwv.s page 18
+ ARM GAS /tmp/ccgO0Rhu.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case HAL_DMA_XFER_M1HALFCPLT_CB_ID:
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1HalfCpltCallback = pCallback;
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break;
- ARM GAS /tmp/ccbl0nwv.s page 19
+ ARM GAS /tmp/ccgO0Rhu.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case HAL_DMA_XFER_M1CPLT_CB_ID:
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferM1CpltCallback = NULL;
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break;
- ARM GAS /tmp/ccbl0nwv.s page 20
+ ARM GAS /tmp/ccgO0Rhu.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** * @{
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** */
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 21
+ ARM GAS /tmp/ccgO0Rhu.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /**
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
37 .cfi_offset 4, -8
38 .cfi_offset 5, -4
1160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Clear DBM bit */
- ARM GAS /tmp/ccbl0nwv.s page 22
+ ARM GAS /tmp/ccgO0Rhu.s page 22
1161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->CR &= (uint32_t)(~DMA_SxCR_DBM);
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
71 .loc 1 1184 1 view .LVU18
- ARM GAS /tmp/ccbl0nwv.s page 23
+ ARM GAS /tmp/ccgO0Rhu.s page 23
72 001e 30BC pop {r4, r5}
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
113 0000 10B4 push {r4}
114 .LCFI3:
115 .cfi_def_cfa_offset 4
- ARM GAS /tmp/ccbl0nwv.s page 24
+ ARM GAS /tmp/ccgO0Rhu.s page 24
116 .cfi_offset 4, -4
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
151 0022 806D ldr r0, [r0, #88]
152 .LVL8:
153 .loc 1 1212 1 view .LVU44
- ARM GAS /tmp/ccbl0nwv.s page 25
+ ARM GAS /tmp/ccgO0Rhu.s page 25
154 0024 5DF8044B ldr r4, [sp], #4
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
196 .LVL11:
1224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** /* Memory Data size equal to Byte */
- ARM GAS /tmp/ccbl0nwv.s page 26
+ ARM GAS /tmp/ccgO0Rhu.s page 26
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** if(hdma->Init.MemDataAlignment == DMA_MDATAALIGN_BYTE)
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
235 .loc 1 1222 21 view .LVU65
236 0028 0020 movs r0, #0
237 .LVL18:
- ARM GAS /tmp/ccbl0nwv.s page 27
+ ARM GAS /tmp/ccgO0Rhu.s page 27
1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = hdma->Init.FIFOThreshold;
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
250 0038 25D1 bne .L29
1280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case DMA_FIFO_THRESHOLD_1QUARTERFULL:
- ARM GAS /tmp/ccbl0nwv.s page 28
+ ARM GAS /tmp/ccgO0Rhu.s page 28
1282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** case DMA_FIFO_THRESHOLD_HALFFULL:
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
291 .LVL26:
1222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = hdma->Init.FIFOThreshold;
292 .loc 1 1222 21 view .LVU81
- ARM GAS /tmp/ccbl0nwv.s page 29
+ ARM GAS /tmp/ccgO0Rhu.s page 29
293 0060 7047 bx lr
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
334 .loc 1 1262 16 view .LVU94
335 007c 7047 bx lr
336 .LVL38:
- ARM GAS /tmp/ccbl0nwv.s page 30
+ ARM GAS /tmp/ccgO0Rhu.s page 30
337 .L27:
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
376 .LVL46:
377 .LFB141:
172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** uint32_t tmp = 0U;
- ARM GAS /tmp/ccbl0nwv.s page 31
+ ARM GAS /tmp/ccgO0Rhu.s page 31
378 .loc 1 172 1 is_stmt 1 view -0
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** assert_param(IS_DMA_MEMORY_BURST(hdma->Init.MemBurst));
414 .loc 1 198 5 view .LVU123
199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** assert_param(IS_DMA_PERIPHERAL_BURST(hdma->Init.PeriphBurst));
- ARM GAS /tmp/ccbl0nwv.s page 32
+ ARM GAS /tmp/ccgO0Rhu.s page 32
415 .loc 1 199 5 view .LVU124
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
452 .loc 1 220 23 is_stmt 0 view .LVU142
453 0038 2023 movs r3, #32
- ARM GAS /tmp/ccbl0nwv.s page 33
+ ARM GAS /tmp/ccgO0Rhu.s page 33
454 003a 6365 str r3, [r4, #84]
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
491 0058 6069 ldr r0, [r4, #20]
240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
492 .loc 1 240 72 view .LVU160
- ARM GAS /tmp/ccbl0nwv.s page 34
+ ARM GAS /tmp/ccgO0Rhu.s page 34
493 005a 0243 orrs r2, r2, r0
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
529 .loc 1 261 3 is_stmt 1 view .LVU178
261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
530 .loc 1 261 20 is_stmt 0 view .LVU179
- ARM GAS /tmp/ccbl0nwv.s page 35
+ ARM GAS /tmp/ccgO0Rhu.s page 35
531 007a 636A ldr r3, [r4, #36]
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
567 .loc 1 294 29 is_stmt 0 view .LVU197
568 009a E26D ldr r2, [r4, #92]
294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 36
+ ARM GAS /tmp/ccgO0Rhu.s page 36
569 .loc 1 294 22 view .LVU198
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
607 .loc 1 279 9 is_stmt 1 view .LVU215
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 37
+ ARM GAS /tmp/ccgO0Rhu.s page 37
608 .loc 1 279 21 is_stmt 0 view .LVU216
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
655 .cfi_offset 14, -4
656 0006 0546 mov r5, r0
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
- ARM GAS /tmp/ccbl0nwv.s page 38
+ ARM GAS /tmp/ccgO0Rhu.s page 38
657 .loc 1 322 3 is_stmt 1 view .LVU226
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
693 .loc 1 347 3 is_stmt 1 view .LVU244
347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
694 .loc 1 347 7 is_stmt 0 view .LVU245
- ARM GAS /tmp/ccbl0nwv.s page 39
+ ARM GAS /tmp/ccgO0Rhu.s page 39
695 002e 2B68 ldr r3, [r5]
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
730 .loc 1 363 27 is_stmt 0 view .LVU265
731 004e EC64 str r4, [r5, #76]
- ARM GAS /tmp/ccbl0nwv.s page 40
+ ARM GAS /tmp/ccgO0Rhu.s page 40
364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
773 .thumb_func
775 HAL_DMA_Start:
776 .LVL74:
- ARM GAS /tmp/ccbl0nwv.s page 41
+ ARM GAS /tmp/ccgO0Rhu.s page 41
777 .LFB143:
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
816 .loc 1 436 5 is_stmt 0 view .LVU294
817 001e 84F83430 strb r3, [r4, #52]
436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 42
+ ARM GAS /tmp/ccgO0Rhu.s page 42
818 .loc 1 436 5 is_stmt 1 view .LVU295
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
862 .thumb_func
864 HAL_DMA_Start_IT:
865 .LVL83:
- ARM GAS /tmp/ccbl0nwv.s page 43
+ ARM GAS /tmp/ccgO0Rhu.s page 43
866 .LFB144:
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
905 .loc 1 495 5 is_stmt 1 view .LVU321
495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
906 .loc 1 495 5 view .LVU322
- ARM GAS /tmp/ccbl0nwv.s page 44
+ ARM GAS /tmp/ccgO0Rhu.s page 44
907 001e 0023 movs r3, #0
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->FCR |= DMA_IT_FE;
945 .loc 1 481 19 view .LVU339
946 0042 1368 ldr r3, [r2]
- ARM GAS /tmp/ccbl0nwv.s page 45
+ ARM GAS /tmp/ccgO0Rhu.s page 45
481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->Instance->FCR |= DMA_IT_FE;
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
986 .LFE144:
988 .section .text.HAL_DMA_Abort,"ax",%progbits
989 .align 1
- ARM GAS /tmp/ccbl0nwv.s page 46
+ ARM GAS /tmp/ccgO0Rhu.s page 46
990 .global HAL_DMA_Abort
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1032 0018 0023 movs r3, #0
1033 001a 84F83430 strb r3, [r4, #52]
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 47
+ ARM GAS /tmp/ccgO0Rhu.s page 47
1034 .loc 1 528 5 view .LVU368
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1071 .loc 1 540 21 view .LVU386
1072 003e 1368 ldr r3, [r2]
- ARM GAS /tmp/ccbl0nwv.s page 48
+ ARM GAS /tmp/ccgO0Rhu.s page 48
540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1111 .loc 1 559 9 view .LVU403
1112 006e 0023 movs r3, #0
- ARM GAS /tmp/ccbl0nwv.s page 49
+ ARM GAS /tmp/ccgO0Rhu.s page 49
1113 0070 84F83430 strb r3, [r4, #52]
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1152 .align 1
1153 .global HAL_DMA_Abort_IT
1154 .syntax unified
- ARM GAS /tmp/ccbl0nwv.s page 50
+ ARM GAS /tmp/ccgO0Rhu.s page 50
1155 .thumb
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1196 0022 0020 movs r0, #0
1197 .LVL105:
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 51
+ ARM GAS /tmp/ccgO0Rhu.s page 51
1198 .loc 1 601 1 view .LVU434
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1244 0012 DBB2 uxtb r3, r3
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1245 .loc 1 624 5 view .LVU445
- ARM GAS /tmp/ccbl0nwv.s page 52
+ ARM GAS /tmp/ccgO0Rhu.s page 52
1246 0014 022B cmp r3, #2
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1283 .loc 1 643 20 view .LVU463
1284 003c 4FF0200A mov r10, #32
- ARM GAS /tmp/ccbl0nwv.s page 53
+ ARM GAS /tmp/ccgO0Rhu.s page 53
1285 0040 0AFA03FA lsl r10, r10, r3
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1324 .loc 1 675 5 is_stmt 1 view .LVU479
675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 54
+ ARM GAS /tmp/ccgO0Rhu.s page 54
1325 .loc 1 675 12 is_stmt 0 view .LVU480
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1362 .loc 1 692 7 is_stmt 1 view .LVU497
692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1363 .loc 1 692 18 is_stmt 0 view .LVU498
- ARM GAS /tmp/ccbl0nwv.s page 55
+ ARM GAS /tmp/ccgO0Rhu.s page 55
1364 0094 BA60 str r2, [r7, #8]
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1402 .loc 1 648 20 view .LVU515
1403 00b8 4FF0100A mov r10, #16
- ARM GAS /tmp/ccbl0nwv.s page 56
+ ARM GAS /tmp/ccgO0Rhu.s page 56
1404 00bc 0AFA03FA lsl r10, r10, r3
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
725:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1441 .loc 1 725 5 is_stmt 0 view .LVU533
1442 00e2 B8F1000F cmp r8, #0
- ARM GAS /tmp/ccbl0nwv.s page 57
+ ARM GAS /tmp/ccgO0Rhu.s page 57
1443 00e6 19D1 bne .L93
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1480 0110 84F83500 strb r0, [r4, #53]
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1481 .loc 1 718 7 is_stmt 1 view .LVU551
- ARM GAS /tmp/ccbl0nwv.s page 58
+ ARM GAS /tmp/ccgO0Rhu.s page 58
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1527 0002 83B0 sub sp, sp, #12
1528 .LCFI14:
1529 .cfi_def_cfa_offset 32
- ARM GAS /tmp/ccbl0nwv.s page 59
+ ARM GAS /tmp/ccgO0Rhu.s page 59
1530 0004 0446 mov r4, r0
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1567 0028 12F0040F tst r2, #4
1568 002c 0BD0 beq .L98
768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 60
+ ARM GAS /tmp/ccgO0Rhu.s page 60
1569 .loc 1 768 7 is_stmt 1 view .LVU580
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1606 .loc 1 783 7 is_stmt 1 view .LVU597
783:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1607 .loc 1 783 18 is_stmt 0 view .LVU598
- ARM GAS /tmp/ccbl0nwv.s page 61
+ ARM GAS /tmp/ccgO0Rhu.s page 61
1608 005a BB60 str r3, [r7, #8]
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1645 .loc 1 802 35 view .LVU616
1646 0084 1023 movs r3, #16
- ARM GAS /tmp/ccbl0nwv.s page 62
+ ARM GAS /tmp/ccgO0Rhu.s page 62
1647 0086 9340 lsls r3, r3, r2
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1683 .loc 1 818 13 is_stmt 0 view .LVU634
1684 00b0 9847 blx r3
1685 .LVL128:
- ARM GAS /tmp/ccbl0nwv.s page 63
+ ARM GAS /tmp/ccgO0Rhu.s page 63
1686 00b2 10E0 b .L101
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1724 .loc 1 843 11 is_stmt 0 view .LVU650
1725 00d4 9847 blx r3
1726 .LVL134:
- ARM GAS /tmp/ccbl0nwv.s page 64
+ ARM GAS /tmp/ccgO0Rhu.s page 64
1727 .L101:
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1763 .loc 1 886 27 is_stmt 0 view .LVU668
1764 0100 1B68 ldr r3, [r3]
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
- ARM GAS /tmp/ccbl0nwv.s page 65
+ ARM GAS /tmp/ccgO0Rhu.s page 65
1765 .loc 1 886 11 view .LVU669
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
864:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
1803 .loc 1 864 15 is_stmt 0 view .LVU686
1804 012c 2268 ldr r2, [r4]
- ARM GAS /tmp/ccbl0nwv.s page 66
+ ARM GAS /tmp/ccgO0Rhu.s page 66
864:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** }
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1842 0156 A36C ldr r3, [r4, #72]
862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1843 .loc 1 862 49 discriminator 1 view .LVU704
- ARM GAS /tmp/ccbl0nwv.s page 67
+ ARM GAS /tmp/ccgO0Rhu.s page 67
1844 0158 002B cmp r3, #0
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
1882 .loc 1 920 16 is_stmt 0 view .LVU721
1883 0184 E36B ldr r3, [r4, #60]
- ARM GAS /tmp/ccbl0nwv.s page 68
+ ARM GAS /tmp/ccgO0Rhu.s page 68
920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** {
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
1922 .loc 1 946 18 is_stmt 0 view .LVU738
1923 01b2 2368 ldr r3, [r4]
- ARM GAS /tmp/ccbl0nwv.s page 69
+ ARM GAS /tmp/ccgO0Rhu.s page 69
946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1966 .section .text.HAL_DMA_RegisterCallback,"ax",%progbits
1967 .align 1
1968 .global HAL_DMA_RegisterCallback
- ARM GAS /tmp/ccbl0nwv.s page 70
+ ARM GAS /tmp/ccgO0Rhu.s page 70
1969 .syntax unified
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
2010 .LVL145:
1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
2011 .loc 1 1023 3 is_stmt 0 view .LVU766
- ARM GAS /tmp/ccbl0nwv.s page 71
+ ARM GAS /tmp/ccgO0Rhu.s page 71
2012 001e 83F83420 strb r2, [r3, #52]
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break;
2051 .loc 1 995 32 is_stmt 0 view .LVU782
2052 003e 5A64 str r2, [r3, #68]
- ARM GAS /tmp/ccbl0nwv.s page 72
+ ARM GAS /tmp/ccgO0Rhu.s page 72
996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
2088 .loc 1 1026 1 view .LVU802
2089 0058 7047 bx lr
- ARM GAS /tmp/ccbl0nwv.s page 73
+ ARM GAS /tmp/ccgO0Rhu.s page 73
2090 .cfi_endproc
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
2134 .loc 1 1091 3 is_stmt 1 view .LVU815
1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c ****
- ARM GAS /tmp/ccbl0nwv.s page 74
+ ARM GAS /tmp/ccgO0Rhu.s page 74
2135 .loc 1 1091 3 view .LVU816
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** break;
2176 .loc 1 1056 32 is_stmt 0 view .LVU830
2177 0042 0020 movs r0, #0
- ARM GAS /tmp/ccbl0nwv.s page 75
+ ARM GAS /tmp/ccgO0Rhu.s page 75
2178 0044 5864 str r0, [r3, #68]
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
2214 .loc 1 1075 36 is_stmt 0 view .LVU848
2215 0062 9864 str r0, [r3, #72]
1076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma.c **** hdma->XferAbortCallback = NULL;
- ARM GAS /tmp/ccbl0nwv.s page 76
+ ARM GAS /tmp/ccgO0Rhu.s page 76
2216 .loc 1 1076 7 is_stmt 1 view .LVU849
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccbl0nwv.s page 1
2263 .thumb_func
2265 HAL_DMA_GetError:
2266 .LVL156:
- ARM GAS /tmp/ccbl0nwv.s page 77
+ ARM GAS /tmp/ccgO0Rhu.s page 77
2267 .LFB152:
@@ -4593,53 +4593,53 @@ ARM GAS /tmp/ccbl0nwv.s page 1
2294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
2295 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
2296 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccbl0nwv.s page 78
+ ARM GAS /tmp/ccgO0Rhu.s page 78
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_dma.c
- /tmp/ccbl0nwv.s:20 .text.DMA_SetConfig:00000000 $t
- /tmp/ccbl0nwv.s:25 .text.DMA_SetConfig:00000000 DMA_SetConfig
- /tmp/ccbl0nwv.s:99 .text.DMA_CalcBaseAndBitshift:00000000 $t
- /tmp/ccbl0nwv.s:104 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift
- /tmp/ccbl0nwv.s:173 .text.DMA_CalcBaseAndBitshift:00000034 $d
- /tmp/ccbl0nwv.s:2286 .rodata.flagBitshiftOffset.0:00000000 flagBitshiftOffset.0
- /tmp/ccbl0nwv.s:179 .text.DMA_CheckFifoParam:00000000 $t
- /tmp/ccbl0nwv.s:184 .text.DMA_CheckFifoParam:00000000 DMA_CheckFifoParam
- /tmp/ccbl0nwv.s:270 .text.DMA_CheckFifoParam:0000004e $d
- /tmp/ccbl0nwv.s:274 .text.DMA_CheckFifoParam:00000052 $t
- /tmp/ccbl0nwv.s:369 .text.HAL_DMA_Init:00000000 $t
- /tmp/ccbl0nwv.s:375 .text.HAL_DMA_Init:00000000 HAL_DMA_Init
- /tmp/ccbl0nwv.s:625 .text.HAL_DMA_Init:000000cc $d
- /tmp/ccbl0nwv.s:630 .text.HAL_DMA_DeInit:00000000 $t
- /tmp/ccbl0nwv.s:636 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit
- /tmp/ccbl0nwv.s:769 .text.HAL_DMA_Start:00000000 $t
- /tmp/ccbl0nwv.s:775 .text.HAL_DMA_Start:00000000 HAL_DMA_Start
- /tmp/ccbl0nwv.s:858 .text.HAL_DMA_Start_IT:00000000 $t
- /tmp/ccbl0nwv.s:864 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT
- /tmp/ccbl0nwv.s:989 .text.HAL_DMA_Abort:00000000 $t
- /tmp/ccbl0nwv.s:995 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort
- /tmp/ccbl0nwv.s:1152 .text.HAL_DMA_Abort_IT:00000000 $t
- /tmp/ccbl0nwv.s:1158 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT
- /tmp/ccbl0nwv.s:1204 .text.HAL_DMA_PollForTransfer:00000000 $t
- /tmp/ccbl0nwv.s:1210 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer
- /tmp/ccbl0nwv.s:1505 .text.HAL_DMA_IRQHandler:00000000 $t
- /tmp/ccbl0nwv.s:1511 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler
- /tmp/ccbl0nwv.s:1961 .text.HAL_DMA_IRQHandler:000001d4 $d
- /tmp/ccbl0nwv.s:1967 .text.HAL_DMA_RegisterCallback:00000000 $t
- /tmp/ccbl0nwv.s:1973 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback
- /tmp/ccbl0nwv.s:2024 .text.HAL_DMA_RegisterCallback:0000002c $d
- /tmp/ccbl0nwv.s:2030 .text.HAL_DMA_RegisterCallback:00000032 $t
- /tmp/ccbl0nwv.s:2094 .text.HAL_DMA_UnRegisterCallback:00000000 $t
- /tmp/ccbl0nwv.s:2100 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback
- /tmp/ccbl0nwv.s:2149 .text.HAL_DMA_UnRegisterCallback:0000002c $d
- /tmp/ccbl0nwv.s:2235 .text.HAL_DMA_GetState:00000000 $t
- /tmp/ccbl0nwv.s:2241 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState
- /tmp/ccbl0nwv.s:2259 .text.HAL_DMA_GetError:00000000 $t
- /tmp/ccbl0nwv.s:2265 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError
- /tmp/ccbl0nwv.s:2283 .rodata.flagBitshiftOffset.0:00000000 $d
- /tmp/ccbl0nwv.s:2156 .text.HAL_DMA_UnRegisterCallback:00000033 $d
- /tmp/ccbl0nwv.s:2156 .text.HAL_DMA_UnRegisterCallback:00000034 $t
+ /tmp/ccgO0Rhu.s:20 .text.DMA_SetConfig:00000000 $t
+ /tmp/ccgO0Rhu.s:25 .text.DMA_SetConfig:00000000 DMA_SetConfig
+ /tmp/ccgO0Rhu.s:99 .text.DMA_CalcBaseAndBitshift:00000000 $t
+ /tmp/ccgO0Rhu.s:104 .text.DMA_CalcBaseAndBitshift:00000000 DMA_CalcBaseAndBitshift
+ /tmp/ccgO0Rhu.s:173 .text.DMA_CalcBaseAndBitshift:00000034 $d
+ /tmp/ccgO0Rhu.s:2286 .rodata.flagBitshiftOffset.0:00000000 flagBitshiftOffset.0
+ /tmp/ccgO0Rhu.s:179 .text.DMA_CheckFifoParam:00000000 $t
+ /tmp/ccgO0Rhu.s:184 .text.DMA_CheckFifoParam:00000000 DMA_CheckFifoParam
+ /tmp/ccgO0Rhu.s:270 .text.DMA_CheckFifoParam:0000004e $d
+ /tmp/ccgO0Rhu.s:274 .text.DMA_CheckFifoParam:00000052 $t
+ /tmp/ccgO0Rhu.s:369 .text.HAL_DMA_Init:00000000 $t
+ /tmp/ccgO0Rhu.s:375 .text.HAL_DMA_Init:00000000 HAL_DMA_Init
+ /tmp/ccgO0Rhu.s:625 .text.HAL_DMA_Init:000000cc $d
+ /tmp/ccgO0Rhu.s:630 .text.HAL_DMA_DeInit:00000000 $t
+ /tmp/ccgO0Rhu.s:636 .text.HAL_DMA_DeInit:00000000 HAL_DMA_DeInit
+ /tmp/ccgO0Rhu.s:769 .text.HAL_DMA_Start:00000000 $t
+ /tmp/ccgO0Rhu.s:775 .text.HAL_DMA_Start:00000000 HAL_DMA_Start
+ /tmp/ccgO0Rhu.s:858 .text.HAL_DMA_Start_IT:00000000 $t
+ /tmp/ccgO0Rhu.s:864 .text.HAL_DMA_Start_IT:00000000 HAL_DMA_Start_IT
+ /tmp/ccgO0Rhu.s:989 .text.HAL_DMA_Abort:00000000 $t
+ /tmp/ccgO0Rhu.s:995 .text.HAL_DMA_Abort:00000000 HAL_DMA_Abort
+ /tmp/ccgO0Rhu.s:1152 .text.HAL_DMA_Abort_IT:00000000 $t
+ /tmp/ccgO0Rhu.s:1158 .text.HAL_DMA_Abort_IT:00000000 HAL_DMA_Abort_IT
+ /tmp/ccgO0Rhu.s:1204 .text.HAL_DMA_PollForTransfer:00000000 $t
+ /tmp/ccgO0Rhu.s:1210 .text.HAL_DMA_PollForTransfer:00000000 HAL_DMA_PollForTransfer
+ /tmp/ccgO0Rhu.s:1505 .text.HAL_DMA_IRQHandler:00000000 $t
+ /tmp/ccgO0Rhu.s:1511 .text.HAL_DMA_IRQHandler:00000000 HAL_DMA_IRQHandler
+ /tmp/ccgO0Rhu.s:1961 .text.HAL_DMA_IRQHandler:000001d4 $d
+ /tmp/ccgO0Rhu.s:1967 .text.HAL_DMA_RegisterCallback:00000000 $t
+ /tmp/ccgO0Rhu.s:1973 .text.HAL_DMA_RegisterCallback:00000000 HAL_DMA_RegisterCallback
+ /tmp/ccgO0Rhu.s:2024 .text.HAL_DMA_RegisterCallback:0000002c $d
+ /tmp/ccgO0Rhu.s:2030 .text.HAL_DMA_RegisterCallback:00000032 $t
+ /tmp/ccgO0Rhu.s:2094 .text.HAL_DMA_UnRegisterCallback:00000000 $t
+ /tmp/ccgO0Rhu.s:2100 .text.HAL_DMA_UnRegisterCallback:00000000 HAL_DMA_UnRegisterCallback
+ /tmp/ccgO0Rhu.s:2149 .text.HAL_DMA_UnRegisterCallback:0000002c $d
+ /tmp/ccgO0Rhu.s:2235 .text.HAL_DMA_GetState:00000000 $t
+ /tmp/ccgO0Rhu.s:2241 .text.HAL_DMA_GetState:00000000 HAL_DMA_GetState
+ /tmp/ccgO0Rhu.s:2259 .text.HAL_DMA_GetError:00000000 $t
+ /tmp/ccgO0Rhu.s:2265 .text.HAL_DMA_GetError:00000000 HAL_DMA_GetError
+ /tmp/ccgO0Rhu.s:2283 .rodata.flagBitshiftOffset.0:00000000 $d
+ /tmp/ccgO0Rhu.s:2156 .text.HAL_DMA_UnRegisterCallback:00000033 $d
+ /tmp/ccgO0Rhu.s:2156 .text.HAL_DMA_UnRegisterCallback:00000034 $t
UNDEFINED SYMBOLS
HAL_GetTick
diff --git a/build/stm32f7xx_hal_dma_ex.lst b/build/stm32f7xx_hal_dma_ex.lst
index 6e9a878..3815399 100644
--- a/build/stm32f7xx_hal_dma_ex.lst
+++ b/build/stm32f7xx_hal_dma_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccCv1Rv2.s page 1
+ARM GAS /tmp/cc6a55aL.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * All rights reserved.
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** *
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * This software is licensed under terms that can be found in the LICENSE file in
- ARM GAS /tmp/ccCv1Rv2.s page 2
+ ARM GAS /tmp/cc6a55aL.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * the root directory of this software component.
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** @endverbatim
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * @{
- ARM GAS /tmp/ccCv1Rv2.s page 3
+ ARM GAS /tmp/cc6a55aL.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** */
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** return status;
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
- ARM GAS /tmp/ccCv1Rv2.s page 4
+ ARM GAS /tmp/cc6a55aL.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** /**
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** if((hdma->XferHalfCpltCallback != NULL) || (hdma->XferM1HalfCpltCallback != NULL))
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** {
- ARM GAS /tmp/ccCv1Rv2.s page 5
+ ARM GAS /tmp/cc6a55aL.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** hdma->Instance->CR |= DMA_IT_HT;
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** /** @addtogroup DMAEx_Private_Functions
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** * @{
- ARM GAS /tmp/ccCv1Rv2.s page 6
+ ARM GAS /tmp/cc6a55aL.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
52 .loc 1 289 25 view .LVU9
53 000e 9960 str r1, [r3, #8]
54 .LVL2:
- ARM GAS /tmp/ccCv1Rv2.s page 7
+ ARM GAS /tmp/cc6a55aL.s page 7
290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
99 @ args = 4, pretend = 0, frame = 0
100 @ frame_needed = 0, uses_anonymous_args = 0
103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** HAL_StatusTypeDef status = HAL_OK;
- ARM GAS /tmp/ccCv1Rv2.s page 8
+ ARM GAS /tmp/cc6a55aL.s page 8
101 .loc 1 103 1 is_stmt 0 view .LVU21
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
141 0024 38BD pop {r3, r4, r5, pc}
142 .LVL9:
143 .L12:
- ARM GAS /tmp/ccCv1Rv2.s page 9
+ ARM GAS /tmp/cc6a55aL.s page 9
112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** status = HAL_ERROR;
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
181 0048 FFF7FEFF bl DMA_MultiBufferSetConfig
182 .LVL15:
135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
- ARM GAS /tmp/ccCv1Rv2.s page 10
+ ARM GAS /tmp/cc6a55aL.s page 10
183 .loc 1 135 7 is_stmt 1 view .LVU53
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
230 0006 8028 cmp r0, #128
231 0008 11D0 beq .L302
171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
- ARM GAS /tmp/ccCv1Rv2.s page 11
+ ARM GAS /tmp/cc6a55aL.s page 11
232 .loc 1 171 3 is_stmt 1 view .LVU63
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
270 0032 6365 str r3, [r4, #84]
167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
271 .loc 1 167 5 is_stmt 1 view .LVU80
- ARM GAS /tmp/ccCv1Rv2.s page 12
+ ARM GAS /tmp/cc6a55aL.s page 12
167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
310 005c 9342 cmp r3, r2
311 005e 40F29880 bls .L18
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 13
+ ARM GAS /tmp/cc6a55aL.s page 13
312 .loc 1 191 5 is_stmt 0 discriminator 1 view .LVU97
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
356 .loc 1 191 5 discriminator 23 view .LVU108
357 00ba 02F58062 add r2, r2, #1024
- ARM GAS /tmp/ccCv1Rv2.s page 14
+ ARM GAS /tmp/cc6a55aL.s page 14
358 00be 9342 cmp r3, r2
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
401 .loc 1 192 5 discriminator 11 view .LVU119
402 0110 02F58062 add r2, r2, #1024
403 0114 9342 cmp r3, r2
- ARM GAS /tmp/ccCv1Rv2.s page 15
+ ARM GAS /tmp/cc6a55aL.s page 15
404 0116 00F09C81 beq .L114
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
447 0168 4FF40062 mov r2, #2048
448 016c B0E7 b .L19
449 .L66:
- ARM GAS /tmp/ccCv1Rv2.s page 16
+ ARM GAS /tmp/cc6a55aL.s page 16
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
493 01b4 2DD0 beq .L76
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
494 .loc 1 191 5 discriminator 59 view .LVU142
- ARM GAS /tmp/ccCv1Rv2.s page 17
+ ARM GAS /tmp/cc6a55aL.s page 17
495 01b6 A2F58962 sub r2, r2, #1096
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
538 0204 3B4B ldr r3, .L325+4
539 0206 9A60 str r2, [r3, #8]
540 .LVL31:
- ARM GAS /tmp/ccCv1Rv2.s page 18
+ ARM GAS /tmp/cc6a55aL.s page 18
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
584 .L21:
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
585 .loc 1 191 5 discriminator 52 view .LVU165
- ARM GAS /tmp/ccCv1Rv2.s page 19
+ ARM GAS /tmp/cc6a55aL.s page 19
586 0240 2E4A ldr r2, .L325+12
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
629 .loc 1 191 5 discriminator 122 view .LVU176
630 0294 A2F56872 sub r2, r2, #928
631 0298 9342 cmp r3, r2
- ARM GAS /tmp/ccCv1Rv2.s page 20
+ ARM GAS /tmp/cc6a55aL.s page 20
632 029a 25D0 beq .L95
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
675 .L91:
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
676 .loc 1 191 5 discriminator 117 view .LVU188
- ARM GAS /tmp/ccCv1Rv2.s page 21
+ ARM GAS /tmp/cc6a55aL.s page 21
677 02d0 4FF40063 mov r3, #2048
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
722 0326 9342 cmp r3, r2
723 0328 2BD0 beq .L101
191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 22
+ ARM GAS /tmp/cc6a55aL.s page 22
724 .loc 1 191 5 discriminator 161 view .LVU198
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
767 .loc 1 191 5 discriminator 200 view .LVU209
768 0374 AEE6 b .L20
769 .LVL36:
- ARM GAS /tmp/ccCv1Rv2.s page 23
+ ARM GAS /tmp/cc6a55aL.s page 23
770 .L98:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
813 03ac 4FF48012 mov r2, #1048576
814 03b0 00E0 b .L27
815 .L109:
- ARM GAS /tmp/ccCv1Rv2.s page 24
+ ARM GAS /tmp/cc6a55aL.s page 24
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
859 040e 00F09981 beq .L164
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
860 .loc 1 193 5 discriminator 17 view .LVU232
- ARM GAS /tmp/ccCv1Rv2.s page 25
+ ARM GAS /tmp/cc6a55aL.s page 25
861 0412 A2F58962 sub r2, r2, #1096
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
904 .loc 1 192 5 discriminator 18 view .LVU243
905 045e 4FF48062 mov r2, #1024
906 0462 A7E7 b .L27
- ARM GAS /tmp/ccCv1Rv2.s page 26
+ ARM GAS /tmp/cc6a55aL.s page 26
907 .L117:
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
950 04ae 9342 cmp r3, r2
951 04b0 29D0 beq .L127
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 27
+ ARM GAS /tmp/cc6a55aL.s page 27
952 .loc 1 192 5 discriminator 65 view .LVU255
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
996 .loc 1 192 5 discriminator 60 view .LVU266
997 04f6 1022 movs r2, #16
- ARM GAS /tmp/ccCv1Rv2.s page 28
+ ARM GAS /tmp/cc6a55aL.s page 28
998 04f8 F6E7 b .L30
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1041 0538 A2F56872 sub r2, r2, #928
1042 053c 9342 cmp r3, r2
1043 053e 2FD0 beq .L135
- ARM GAS /tmp/ccCv1Rv2.s page 29
+ ARM GAS /tmp/cc6a55aL.s page 29
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1087 .L133:
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
1088 .loc 1 192 5 discriminator 105 view .LVU289
- ARM GAS /tmp/ccCv1Rv2.s page 30
+ ARM GAS /tmp/cc6a55aL.s page 30
1089 0594 1023 movs r3, #16
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1133 .L327:
1134 05cc 10600240 .word 1073897488
1135 05d0 00600240 .word 1073897472
- ARM GAS /tmp/ccCv1Rv2.s page 31
+ ARM GAS /tmp/cc6a55aL.s page 31
1136 05d4 00640240 .word 1073898496
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1180 062e 27D0 beq .L153
192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_TE_FLAG_INDEX(hdma));
1181 .loc 1 192 5 discriminator 169 view .LVU310
- ARM GAS /tmp/ccCv1Rv2.s page 32
+ ARM GAS /tmp/cc6a55aL.s page 32
1182 0630 02F58062 add r2, r2, #1024
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1225 .loc 1 192 5 discriminator 164 view .LVU321
1226 066e 4FF48063 mov r3, #1024
1227 0672 F0E7 b .L33
- ARM GAS /tmp/ccCv1Rv2.s page 33
+ ARM GAS /tmp/cc6a55aL.s page 33
1228 .L151:
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1271 06b6 9342 cmp r3, r2
1272 06b8 00F0A981 beq .L206
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 34
+ ARM GAS /tmp/cc6a55aL.s page 34
1273 .loc 1 194 5 discriminator 5 view .LVU333
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
1317 .loc 1 193 5 discriminator 6 view .LVU344
1318 0726 0822 movs r2, #8
- ARM GAS /tmp/ccCv1Rv2.s page 35
+ ARM GAS /tmp/cc6a55aL.s page 35
1319 0728 B7E7 b .L35
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1362 0762 A83A subs r2, r2, #168
1363 0764 9342 cmp r3, r2
1364 0766 31D0 beq .L169
- ARM GAS /tmp/ccCv1Rv2.s page 36
+ ARM GAS /tmp/cc6a55aL.s page 36
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1408 07be 02D0 beq .L314
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
1409 .loc 1 193 5 discriminator 76 view .LVU367
- ARM GAS /tmp/ccCv1Rv2.s page 37
+ ARM GAS /tmp/cc6a55aL.s page 37
1410 07c0 4FF00072 mov r2, #33554432
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1453 .loc 1 193 5 discriminator 70 view .LVU378
1454 07f8 4FF40022 mov r2, #524288
1455 07fc E7E7 b .L38
- ARM GAS /tmp/ccCv1Rv2.s page 38
+ ARM GAS /tmp/cc6a55aL.s page 38
1456 .L178:
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1499 084a 9342 cmp r3, r2
1500 084c 28D0 beq .L188
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 39
+ ARM GAS /tmp/cc6a55aL.s page 39
1501 .loc 1 193 5 discriminator 118 view .LVU390
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
1545 .loc 1 193 5 discriminator 113 view .LVU401
1546 088e 4FF40073 mov r3, #512
- ARM GAS /tmp/ccCv1Rv2.s page 40
+ ARM GAS /tmp/cc6a55aL.s page 40
1547 0892 F3E7 b .L40
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1592 08e4 9342 cmp r3, r2
1593 08e6 2FD0 beq .L195
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 41
+ ARM GAS /tmp/cc6a55aL.s page 41
1594 .loc 1 193 5 discriminator 157 view .LVU411
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_DME_FLAG_INDEX(hdma));
1638 .loc 1 193 5 discriminator 154 view .LVU422
1639 093c 0823 movs r3, #8
- ARM GAS /tmp/ccCv1Rv2.s page 42
+ ARM GAS /tmp/cc6a55aL.s page 42
1640 .L41:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1683 0974 4FF40023 mov r3, #524288
1684 0978 E1E7 b .L41
1685 .L313:
- ARM GAS /tmp/ccCv1Rv2.s page 43
+ ARM GAS /tmp/cc6a55aL.s page 43
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1729 09d2 00F07181 beq .L259
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
1730 .loc 1 195 5 discriminator 15 view .LVU445
- ARM GAS /tmp/ccCv1Rv2.s page 44
+ ARM GAS /tmp/cc6a55aL.s page 44
1731 09d6 02F58062 add r2, r2, #1024
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1774 .loc 1 194 5 discriminator 16 view .LVU456
1775 0a26 4FF48072 mov r2, #256
1776 0a2a AAE7 b .L43
- ARM GAS /tmp/ccCv1Rv2.s page 45
+ ARM GAS /tmp/cc6a55aL.s page 45
1777 .L212:
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1820 0a74 9342 cmp r3, r2
1821 0a76 2AD0 beq .L222
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
- ARM GAS /tmp/ccCv1Rv2.s page 46
+ ARM GAS /tmp/cc6a55aL.s page 46
1822 .loc 1 194 5 discriminator 63 view .LVU468
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
1866 .loc 1 194 5 discriminator 58 view .LVU479
1867 0ac0 0422 movs r2, #4
- ARM GAS /tmp/ccCv1Rv2.s page 47
+ ARM GAS /tmp/cc6a55aL.s page 47
1868 0ac2 F8E7 b .L46
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1911 0afe 02F58062 add r2, r2, #1024
1912 0b02 9342 cmp r3, r2
1913 0b04 31D0 beq .L230
- ARM GAS /tmp/ccCv1Rv2.s page 48
+ ARM GAS /tmp/cc6a55aL.s page 48
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
1957 .L319:
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
1958 .loc 1 194 5 discriminator 126 view .LVU502
- ARM GAS /tmp/ccCv1Rv2.s page 49
+ ARM GAS /tmp/cc6a55aL.s page 49
1959 0b5c 4FF48023 mov r3, #262144
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2002 .loc 1 194 5 discriminator 123 view .LVU513
2003 0b94 4FF48023 mov r3, #262144
2004 0b98 E4E7 b .L48
- ARM GAS /tmp/ccCv1Rv2.s page 50
+ ARM GAS /tmp/cc6a55aL.s page 50
2005 .L332:
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2050 0bf6 28D0 beq .L248
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** __HAL_DMA_CLEAR_FLAG (hdma, __HAL_DMA_GET_FE_FLAG_INDEX(hdma));
2051 .loc 1 194 5 discriminator 167 view .LVU523
- ARM GAS /tmp/ccCv1Rv2.s page 51
+ ARM GAS /tmp/cc6a55aL.s page 51
2052 0bf8 A2F58962 sub r2, r2, #1096
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2095 .loc 1 194 5 discriminator 162 view .LVU534
2096 0c38 4FF48073 mov r3, #256
2097 0c3c F3E7 b .L49
- ARM GAS /tmp/ccCv1Rv2.s page 52
+ ARM GAS /tmp/cc6a55aL.s page 52
2098 .L246:
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2139 .loc 1 198 25 view .LVU547
2140 0c72 43F01603 orr r3, r3, #22
2141 0c76 1360 str r3, [r2]
- ARM GAS /tmp/ccCv1Rv2.s page 53
+ ARM GAS /tmp/cc6a55aL.s page 53
199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2181 0caa DEE7 b .L51
2182 .L256:
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
- ARM GAS /tmp/ccCv1Rv2.s page 54
+ ARM GAS /tmp/cc6a55aL.s page 54
2183 .loc 1 195 5 discriminator 10 view .LVU563
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
2227 .loc 1 195 5 discriminator 55 view .LVU574
2228 0ce6 A2F56872 sub r2, r2, #928
- ARM GAS /tmp/ccCv1Rv2.s page 55
+ ARM GAS /tmp/cc6a55aL.s page 55
2229 0cea 9342 cmp r3, r2
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2272 0d3c 4FF48032 mov r2, #65536
2273 0d40 00E0 b .L54
2274 .L265:
- ARM GAS /tmp/ccCv1Rv2.s page 56
+ ARM GAS /tmp/cc6a55aL.s page 56
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2318 .L275:
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
2319 .loc 1 195 5 discriminator 74 view .LVU597
- ARM GAS /tmp/ccCv1Rv2.s page 57
+ ARM GAS /tmp/cc6a55aL.s page 57
2320 0d72 4FF48032 mov r2, #65536
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2363 .loc 1 195 5 discriminator 120 view .LVU608
2364 0dc4 02F58062 add r2, r2, #1024
2365 0dc8 9342 cmp r3, r2
- ARM GAS /tmp/ccCv1Rv2.s page 58
+ ARM GAS /tmp/cc6a55aL.s page 58
2366 0dca 22D0 beq .L286
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2409 0e02 F2E7 b .L56
2410 .L283:
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
- ARM GAS /tmp/ccCv1Rv2.s page 59
+ ARM GAS /tmp/cc6a55aL.s page 59
2411 .loc 1 195 5 discriminator 117 view .LVU620
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2456 0e52 A2F58962 sub r2, r2, #1096
2457 0e56 9342 cmp r3, r2
2458 0e58 2BD0 beq .L293
- ARM GAS /tmp/ccCv1Rv2.s page 60
+ ARM GAS /tmp/cc6a55aL.s page 60
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2502 .L290:
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c ****
2503 .loc 1 195 5 discriminator 156 view .LVU641
- ARM GAS /tmp/ccCv1Rv2.s page 61
+ ARM GAS /tmp/cc6a55aL.s page 61
2504 0ea6 0123 movs r3, #1
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2547 0ed8 7FF4D7AE bne .L58
2548 0edc DAE6 b .L59
2549 .LVL38:
- ARM GAS /tmp/ccCv1Rv2.s page 62
+ ARM GAS /tmp/cc6a55aL.s page 62
2550 .L60:
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
2595 .loc 1 244 9 is_stmt 0 view .LVU664
2596 000a 0368 ldr r3, [r0]
- ARM GAS /tmp/ccCv1Rv2.s page 63
+ ARM GAS /tmp/cc6a55aL.s page 63
244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_dma_ex.c **** }
@@ -3734,29 +3734,29 @@ ARM GAS /tmp/ccCv1Rv2.s page 1
2607 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
2608 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
2609 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma_ex.h"
- ARM GAS /tmp/ccCv1Rv2.s page 64
+ ARM GAS /tmp/cc6a55aL.s page 64
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_dma_ex.c
- /tmp/ccCv1Rv2.s:20 .text.DMA_MultiBufferSetConfig:00000000 $t
- /tmp/ccCv1Rv2.s:25 .text.DMA_MultiBufferSetConfig:00000000 DMA_MultiBufferSetConfig
- /tmp/ccCv1Rv2.s:88 .text.HAL_DMAEx_MultiBufferStart:00000000 $t
- /tmp/ccCv1Rv2.s:94 .text.HAL_DMAEx_MultiBufferStart:00000000 HAL_DMAEx_MultiBufferStart
- /tmp/ccCv1Rv2.s:200 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 $t
- /tmp/ccCv1Rv2.s:206 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 HAL_DMAEx_MultiBufferStart_IT
- /tmp/ccCv1Rv2.s:698 .text.HAL_DMAEx_MultiBufferStart_IT:000002f0 $d
- /tmp/ccCv1Rv2.s:705 .text.HAL_DMAEx_MultiBufferStart_IT:00000304 $t
- /tmp/ccCv1Rv2.s:1134 .text.HAL_DMAEx_MultiBufferStart_IT:000005cc $d
- /tmp/ccCv1Rv2.s:1142 .text.HAL_DMAEx_MultiBufferStart_IT:000005e4 $t
- /tmp/ccCv1Rv2.s:1571 .text.HAL_DMAEx_MultiBufferStart_IT:000008b4 $d
- /tmp/ccCv1Rv2.s:1579 .text.HAL_DMAEx_MultiBufferStart_IT:000008cc $t
- /tmp/ccCv1Rv2.s:2008 .text.HAL_DMAEx_MultiBufferStart_IT:00000b9c $d
- /tmp/ccCv1Rv2.s:2016 .text.HAL_DMAEx_MultiBufferStart_IT:00000bb4 $t
- /tmp/ccCv1Rv2.s:2433 .text.HAL_DMAEx_MultiBufferStart_IT:00000e20 $d
- /tmp/ccCv1Rv2.s:2440 .text.HAL_DMAEx_MultiBufferStart_IT:00000e34 $t
- /tmp/ccCv1Rv2.s:2557 .text.HAL_DMAEx_MultiBufferStart_IT:00000ee4 $d
- /tmp/ccCv1Rv2.s:2563 .text.HAL_DMAEx_ChangeMemory:00000000 $t
- /tmp/ccCv1Rv2.s:2569 .text.HAL_DMAEx_ChangeMemory:00000000 HAL_DMAEx_ChangeMemory
+ /tmp/cc6a55aL.s:20 .text.DMA_MultiBufferSetConfig:00000000 $t
+ /tmp/cc6a55aL.s:25 .text.DMA_MultiBufferSetConfig:00000000 DMA_MultiBufferSetConfig
+ /tmp/cc6a55aL.s:88 .text.HAL_DMAEx_MultiBufferStart:00000000 $t
+ /tmp/cc6a55aL.s:94 .text.HAL_DMAEx_MultiBufferStart:00000000 HAL_DMAEx_MultiBufferStart
+ /tmp/cc6a55aL.s:200 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 $t
+ /tmp/cc6a55aL.s:206 .text.HAL_DMAEx_MultiBufferStart_IT:00000000 HAL_DMAEx_MultiBufferStart_IT
+ /tmp/cc6a55aL.s:698 .text.HAL_DMAEx_MultiBufferStart_IT:000002f0 $d
+ /tmp/cc6a55aL.s:705 .text.HAL_DMAEx_MultiBufferStart_IT:00000304 $t
+ /tmp/cc6a55aL.s:1134 .text.HAL_DMAEx_MultiBufferStart_IT:000005cc $d
+ /tmp/cc6a55aL.s:1142 .text.HAL_DMAEx_MultiBufferStart_IT:000005e4 $t
+ /tmp/cc6a55aL.s:1571 .text.HAL_DMAEx_MultiBufferStart_IT:000008b4 $d
+ /tmp/cc6a55aL.s:1579 .text.HAL_DMAEx_MultiBufferStart_IT:000008cc $t
+ /tmp/cc6a55aL.s:2008 .text.HAL_DMAEx_MultiBufferStart_IT:00000b9c $d
+ /tmp/cc6a55aL.s:2016 .text.HAL_DMAEx_MultiBufferStart_IT:00000bb4 $t
+ /tmp/cc6a55aL.s:2433 .text.HAL_DMAEx_MultiBufferStart_IT:00000e20 $d
+ /tmp/cc6a55aL.s:2440 .text.HAL_DMAEx_MultiBufferStart_IT:00000e34 $t
+ /tmp/cc6a55aL.s:2557 .text.HAL_DMAEx_MultiBufferStart_IT:00000ee4 $d
+ /tmp/cc6a55aL.s:2563 .text.HAL_DMAEx_ChangeMemory:00000000 $t
+ /tmp/cc6a55aL.s:2569 .text.HAL_DMAEx_ChangeMemory:00000000 HAL_DMAEx_ChangeMemory
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_exti.lst b/build/stm32f7xx_hal_exti.lst
index 652b36b..334f1d7 100644
--- a/build/stm32f7xx_hal_exti.lst
+++ b/build/stm32f7xx_hal_exti.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cc8tFyty.s page 1
+ARM GAS /tmp/cctJtPJc.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** (+) Exti line can be configured in 3 different modes
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** (++) Interrupt
- ARM GAS /tmp/cc8tFyty.s page 2
+ ARM GAS /tmp/cctJtPJc.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** (++) Event
@@ -118,7 +118,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Includes ------------------------------------------------------------------*/
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** #include "stm32f7xx_hal.h"
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
- ARM GAS /tmp/cc8tFyty.s page 3
+ ARM GAS /tmp/cctJtPJc.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /** @addtogroup STM32F7xx_HAL_Driver
@@ -178,7 +178,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** {
29 .loc 1 143 1 view -0
- ARM GAS /tmp/cc8tFyty.s page 4
+ ARM GAS /tmp/cctJtPJc.s page 4
30 .cfi_startproc
@@ -238,7 +238,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
63 .loc 1 163 3 is_stmt 1 view .LVU14
64 .loc 1 163 12 is_stmt 0 view .LVU15
65 0014 0122 movs r2, #1
- ARM GAS /tmp/cc8tFyty.s page 5
+ ARM GAS /tmp/cctJtPJc.s page 5
66 0016 8240 lsls r2, r2, r0
@@ -298,7 +298,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
98 003a 1443 orrs r4, r4, r2
99 003c EC60 str r4, [r5, #12]
100 .L7:
- ARM GAS /tmp/cc8tFyty.s page 6
+ ARM GAS /tmp/cctJtPJc.s page 6
186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** }
@@ -358,7 +358,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Configure event mode : read current mode */
218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Mask or set line */
219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** if ((pExtiConfig->Mode & EXTI_MODE_EVENT) != 0x00u)
- ARM GAS /tmp/cc8tFyty.s page 7
+ ARM GAS /tmp/cctJtPJc.s page 7
124 .loc 1 219 3 is_stmt 1 view .LVU40
@@ -418,7 +418,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
189:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** }
164 .loc 1 189 11 is_stmt 0 view .LVU52
165 007c 134D ldr r5, .L17
- ARM GAS /tmp/cc8tFyty.s page 8
+ ARM GAS /tmp/cctJtPJc.s page 8
166 007e EC68 ldr r4, [r5, #12]
@@ -478,7 +478,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
204 00a8 46F82010 str r1, [r6, r0, lsl #2]
205 00ac CDE7 b .L3
206 .LVL12:
- ARM GAS /tmp/cc8tFyty.s page 9
+ ARM GAS /tmp/cctJtPJc.s page 9
207 .L8:
@@ -538,7 +538,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
255 HAL_EXTI_GetConfigLine:
256 .LVL16:
257 .LFB142:
- ARM GAS /tmp/cc8tFyty.s page 10
+ ARM GAS /tmp/cctJtPJc.s page 10
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
@@ -598,7 +598,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
284 .loc 1 256 3 is_stmt 1 view .LVU89
285 .loc 1 256 11 is_stmt 0 view .LVU90
286 0010 04F01F0C and ip, r4, #31
- ARM GAS /tmp/cc8tFyty.s page 11
+ ARM GAS /tmp/cctJtPJc.s page 11
287 .LVL17:
@@ -658,7 +658,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
322 .L23:
276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** }
277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
- ARM GAS /tmp/cc8tFyty.s page 12
+ ARM GAS /tmp/cctJtPJc.s page 12
278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Get default Trigger and GPIOSel configuration */
@@ -718,7 +718,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
359 005c 9A60 str r2, [r3, #8]
360 .L25:
296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** }
- ARM GAS /tmp/cc8tFyty.s page 13
+ ARM GAS /tmp/cctJtPJc.s page 13
297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
@@ -778,7 +778,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
393 .loc 1 304 67 view .LVU136
394 0082 9200 lsls r2, r2, #2
304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** }
- ARM GAS /tmp/cc8tFyty.s page 14
+ ARM GAS /tmp/cctJtPJc.s page 14
395 .loc 1 304 38 view .LVU137
@@ -838,7 +838,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
446 .LFB143:
310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /**
- ARM GAS /tmp/cc8tFyty.s page 15
+ ARM GAS /tmp/cctJtPJc.s page 15
312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @brief Clear whole configuration of a dedicated Exti line.
@@ -898,7 +898,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* 1] Clear interrupt mode */
336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->IMR = (EXTI->IMR & ~maskline);
477 .loc 1 336 3 is_stmt 1 view .LVU158
- ARM GAS /tmp/cc8tFyty.s page 16
+ ARM GAS /tmp/cctJtPJc.s page 16
478 .loc 1 336 20 is_stmt 0 view .LVU159
@@ -958,7 +958,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
520 .loc 1 348 8 view .LVU181
521 004a B3F1C06F cmp r3, #100663296
522 004e 01D0 beq .L45
- ARM GAS /tmp/cc8tFyty.s page 17
+ ARM GAS /tmp/cctJtPJc.s page 17
349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** {
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
556 0070 0020 movs r0, #0
557 0072 02E0 b .L37
558 .LVL40:
- ARM GAS /tmp/cc8tFyty.s page 18
+ ARM GAS /tmp/cctJtPJc.s page 18
559 .L38:
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
601 @ args = 0, pretend = 0, frame = 0
602 @ frame_needed = 0, uses_anonymous_args = 0
603 @ link register save eliminated.
- ARM GAS /tmp/cc8tFyty.s page 19
+ ARM GAS /tmp/cctJtPJc.s page 19
604 .loc 1 370 1 is_stmt 0 view .LVU201
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */
394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine)
395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** {
- ARM GAS /tmp/cc8tFyty.s page 20
+ ARM GAS /tmp/cctJtPJc.s page 20
638 .loc 1 395 1 is_stmt 1 view -0
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /**
414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @}
415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */
- ARM GAS /tmp/cc8tFyty.s page 21
+ ARM GAS /tmp/cctJtPJc.s page 21
416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** if (regval != 0x00u)
702 .loc 1 444 3 is_stmt 1 view .LVU232
703 .loc 1 444 6 is_stmt 0 view .LVU233
- ARM GAS /tmp/cc8tFyty.s page 22
+ ARM GAS /tmp/cctJtPJc.s page 22
704 0010 1A42 tst r2, r3
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** * @retval 1 if interrupt is pending else 0.
465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** */
466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge)
- ARM GAS /tmp/cc8tFyty.s page 23
+ ARM GAS /tmp/cctJtPJc.s page 23
467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
777 .loc 1 484 1 view .LVU260
778 0012 7047 bx lr
779 .L61:
- ARM GAS /tmp/cc8tFyty.s page 24
+ ARM GAS /tmp/cctJtPJc.s page 24
780 .align 2
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Clear Pending bit */
508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->PR = maskline;
814 .loc 1 508 3 is_stmt 1 view .LVU270
- ARM GAS /tmp/cc8tFyty.s page 25
+ ARM GAS /tmp/cctJtPJc.s page 25
815 .loc 1 508 12 is_stmt 0 view .LVU271
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc8tFyty.s page 1
526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c ****
527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** /* Generate Software interrupt */
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_exti.c **** EXTI->SWIER = maskline;
- ARM GAS /tmp/cc8tFyty.s page 26
+ ARM GAS /tmp/cctJtPJc.s page 26
854 .loc 1 528 3 is_stmt 1 view .LVU281
@@ -1520,35 +1520,35 @@ ARM GAS /tmp/cc8tFyty.s page 1
870 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
871 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
872 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_exti.h"
- ARM GAS /tmp/cc8tFyty.s page 27
+ ARM GAS /tmp/cctJtPJc.s page 27
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_exti.c
- /tmp/cc8tFyty.s:20 .text.HAL_EXTI_SetConfigLine:00000000 $t
- /tmp/cc8tFyty.s:26 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine
- /tmp/cc8tFyty.s:243 .text.HAL_EXTI_SetConfigLine:000000cc $d
- /tmp/cc8tFyty.s:249 .text.HAL_EXTI_GetConfigLine:00000000 $t
- /tmp/cc8tFyty.s:255 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine
- /tmp/cc8tFyty.s:432 .text.HAL_EXTI_GetConfigLine:000000a0 $d
- /tmp/cc8tFyty.s:438 .text.HAL_EXTI_ClearConfigLine:00000000 $t
- /tmp/cc8tFyty.s:444 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine
- /tmp/cc8tFyty.s:584 .text.HAL_EXTI_ClearConfigLine:0000007c $d
- /tmp/cc8tFyty.s:590 .text.HAL_EXTI_RegisterCallback:00000000 $t
- /tmp/cc8tFyty.s:596 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback
- /tmp/cc8tFyty.s:629 .text.HAL_EXTI_GetHandle:00000000 $t
- /tmp/cc8tFyty.s:635 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle
- /tmp/cc8tFyty.s:667 .text.HAL_EXTI_IRQHandler:00000000 $t
- /tmp/cc8tFyty.s:673 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler
- /tmp/cc8tFyty.s:727 .text.HAL_EXTI_IRQHandler:00000020 $d
- /tmp/cc8tFyty.s:732 .text.HAL_EXTI_GetPending:00000000 $t
- /tmp/cc8tFyty.s:738 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending
- /tmp/cc8tFyty.s:782 .text.HAL_EXTI_GetPending:00000014 $d
- /tmp/cc8tFyty.s:787 .text.HAL_EXTI_ClearPending:00000000 $t
- /tmp/cc8tFyty.s:793 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending
- /tmp/cc8tFyty.s:823 .text.HAL_EXTI_ClearPending:00000010 $d
- /tmp/cc8tFyty.s:828 .text.HAL_EXTI_GenerateSWI:00000000 $t
- /tmp/cc8tFyty.s:834 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI
- /tmp/cc8tFyty.s:863 .text.HAL_EXTI_GenerateSWI:00000010 $d
+ /tmp/cctJtPJc.s:20 .text.HAL_EXTI_SetConfigLine:00000000 $t
+ /tmp/cctJtPJc.s:26 .text.HAL_EXTI_SetConfigLine:00000000 HAL_EXTI_SetConfigLine
+ /tmp/cctJtPJc.s:243 .text.HAL_EXTI_SetConfigLine:000000cc $d
+ /tmp/cctJtPJc.s:249 .text.HAL_EXTI_GetConfigLine:00000000 $t
+ /tmp/cctJtPJc.s:255 .text.HAL_EXTI_GetConfigLine:00000000 HAL_EXTI_GetConfigLine
+ /tmp/cctJtPJc.s:432 .text.HAL_EXTI_GetConfigLine:000000a0 $d
+ /tmp/cctJtPJc.s:438 .text.HAL_EXTI_ClearConfigLine:00000000 $t
+ /tmp/cctJtPJc.s:444 .text.HAL_EXTI_ClearConfigLine:00000000 HAL_EXTI_ClearConfigLine
+ /tmp/cctJtPJc.s:584 .text.HAL_EXTI_ClearConfigLine:0000007c $d
+ /tmp/cctJtPJc.s:590 .text.HAL_EXTI_RegisterCallback:00000000 $t
+ /tmp/cctJtPJc.s:596 .text.HAL_EXTI_RegisterCallback:00000000 HAL_EXTI_RegisterCallback
+ /tmp/cctJtPJc.s:629 .text.HAL_EXTI_GetHandle:00000000 $t
+ /tmp/cctJtPJc.s:635 .text.HAL_EXTI_GetHandle:00000000 HAL_EXTI_GetHandle
+ /tmp/cctJtPJc.s:667 .text.HAL_EXTI_IRQHandler:00000000 $t
+ /tmp/cctJtPJc.s:673 .text.HAL_EXTI_IRQHandler:00000000 HAL_EXTI_IRQHandler
+ /tmp/cctJtPJc.s:727 .text.HAL_EXTI_IRQHandler:00000020 $d
+ /tmp/cctJtPJc.s:732 .text.HAL_EXTI_GetPending:00000000 $t
+ /tmp/cctJtPJc.s:738 .text.HAL_EXTI_GetPending:00000000 HAL_EXTI_GetPending
+ /tmp/cctJtPJc.s:782 .text.HAL_EXTI_GetPending:00000014 $d
+ /tmp/cctJtPJc.s:787 .text.HAL_EXTI_ClearPending:00000000 $t
+ /tmp/cctJtPJc.s:793 .text.HAL_EXTI_ClearPending:00000000 HAL_EXTI_ClearPending
+ /tmp/cctJtPJc.s:823 .text.HAL_EXTI_ClearPending:00000010 $d
+ /tmp/cctJtPJc.s:828 .text.HAL_EXTI_GenerateSWI:00000000 $t
+ /tmp/cctJtPJc.s:834 .text.HAL_EXTI_GenerateSWI:00000000 HAL_EXTI_GenerateSWI
+ /tmp/cctJtPJc.s:863 .text.HAL_EXTI_GenerateSWI:00000010 $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_flash.lst b/build/stm32f7xx_hal_flash.lst
index fb7a8cd..abc9524 100644
--- a/build/stm32f7xx_hal_flash.lst
+++ b/build/stm32f7xx_hal_flash.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccz3aC71.s page 1
+ARM GAS /tmp/cc94BtXA.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** (+) 64 cache lines of 128 bits on I-Code
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** (+) 8 cache lines of 128 bits on D-Code
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
- ARM GAS /tmp/ccz3aC71.s page 2
+ ARM GAS /tmp/cc94BtXA.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** ##### How to use this driver #####
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** * @{
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** */
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
- ARM GAS /tmp/ccz3aC71.s page 3
+ ARM GAS /tmp/cc94BtXA.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /** @defgroup FLASH FLASH
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** ##### Programming operation functions #####
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** ===============================================================================
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** [..]
- ARM GAS /tmp/ccz3aC71.s page 4
+ ARM GAS /tmp/cc94BtXA.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** This subsection provides a set of functions allowing to manage the FLASH
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** case FLASH_TYPEPROGRAM_DOUBLEWORD :
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /*Program double word (64-bit) at a specified address.*/
- ARM GAS /tmp/ccz3aC71.s page 5
+ ARM GAS /tmp/cc94BtXA.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH_Program_DoubleWord(Address, Data);
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /*Program byte (8-bit) at a specified address.*/
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH_Program_Byte(Address, (uint8_t) Data);
- ARM GAS /tmp/ccz3aC71.s page 6
+ ARM GAS /tmp/cc94BtXA.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break;
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** case FLASH_PROC_SECTERASE :
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
- ARM GAS /tmp/ccz3aC71.s page 7
+ ARM GAS /tmp/cc94BtXA.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Nb of sector to erased can be decreased */
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** switch (pFlash.ProcedureOnGoing)
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** case FLASH_PROC_SECTERASE :
- ARM GAS /tmp/ccz3aC71.s page 8
+ ARM GAS /tmp/cc94BtXA.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** __weak void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue)
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Prevent unused argument(s) compilation warning */
- ARM GAS /tmp/ccz3aC71.s page 9
+ ARM GAS /tmp/cc94BtXA.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** UNUSED(ReturnValue);
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY1);
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** WRITE_REG(FLASH->KEYR, FLASH_KEY2);
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
- ARM GAS /tmp/ccz3aC71.s page 10
+ ARM GAS /tmp/cc94BtXA.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Verify Flash is unlocked */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /**
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** * @brief Launch the option byte loading.
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** * @retval HAL Status
- ARM GAS /tmp/ccz3aC71.s page 11
+ ARM GAS /tmp/cc94BtXA.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** */
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** /* Clear Error Code */
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
- ARM GAS /tmp/ccz3aC71.s page 12
+ ARM GAS /tmp/cc94BtXA.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
31 @ frame_needed = 0, uses_anonymous_args = 0
32 @ link register save eliminated.
33 .loc 1 652 1 is_stmt 0 view .LVU1
- ARM GAS /tmp/ccz3aC71.s page 13
+ ARM GAS /tmp/cc94BtXA.s page 13
34 0000 10B4 push {r4}
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
13:Drivers/CMSIS/Include/cmsis_gcc.h **** * not use this file except in compliance with the License.
- ARM GAS /tmp/ccz3aC71.s page 14
+ ARM GAS /tmp/cc94BtXA.s page 14
14:Drivers/CMSIS/Include/cmsis_gcc.h **** * You may obtain a copy of the License at
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
70:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32 /* deprecated */
- ARM GAS /tmp/ccz3aC71.s page 15
+ ARM GAS /tmp/cc94BtXA.s page 15
71:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
127:Drivers/CMSIS/Include/cmsis_gcc.h **** Can only be executed in Privileged modes.
- ARM GAS /tmp/ccz3aC71.s page 16
+ ARM GAS /tmp/cc94BtXA.s page 16
128:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
184:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccz3aC71.s page 17
+ ARM GAS /tmp/cc94BtXA.s page 17
185:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
241:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccz3aC71.s page 18
+ ARM GAS /tmp/cc94BtXA.s page 18
242:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
298:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Main Stack Pointer (MSP).
- ARM GAS /tmp/ccz3aC71.s page 19
+ ARM GAS /tmp/cc94BtXA.s page 19
299:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
355:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccz3aC71.s page 20
+ ARM GAS /tmp/cc94BtXA.s page 20
356:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
412:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
- ARM GAS /tmp/ccz3aC71.s page 21
+ ARM GAS /tmp/cc94BtXA.s page 21
413:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
469:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccz3aC71.s page 22
+ ARM GAS /tmp/cc94BtXA.s page 22
470:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
526:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccz3aC71.s page 23
+ ARM GAS /tmp/cc94BtXA.s page 23
527:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
583:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccz3aC71.s page 24
+ ARM GAS /tmp/cc94BtXA.s page 24
584:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer Limit
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
640:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
- ARM GAS /tmp/ccz3aC71.s page 25
+ ARM GAS /tmp/cc94BtXA.s page 25
641:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
697:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always.
- ARM GAS /tmp/ccz3aC71.s page 26
+ ARM GAS /tmp/cc94BtXA.s page 26
698:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
754:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccz3aC71.s page 27
+ ARM GAS /tmp/cc94BtXA.s page 27
755:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
811:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccz3aC71.s page 28
+ ARM GAS /tmp/cc94BtXA.s page 28
812:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
65 .loc 2 866 27 view .LVU15
66 .LBB13:
- ARM GAS /tmp/ccz3aC71.s page 29
+ ARM GAS /tmp/cc94BtXA.s page 29
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
100 002e 00BF .align 2
101 .L3:
102 0030 003C0240 .word 1073888256
- ARM GAS /tmp/ccz3aC71.s page 30
+ ARM GAS /tmp/cc94BtXA.s page 30
103 .cfi_endproc
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
136 0012 1A69 ldr r2, [r3, #16]
137 .loc 1 696 13 view .LVU33
138 0014 42F00102 orr r2, r2, #1
- ARM GAS /tmp/ccz3aC71.s page 31
+ ARM GAS /tmp/cc94BtXA.s page 31
139 0018 1A61 str r2, [r3, #16]
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** */
717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
- ARM GAS /tmp/ccz3aC71.s page 32
+ ARM GAS /tmp/cc94BtXA.s page 32
175 .loc 1 718 1 is_stmt 1 view -0
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
215 .LBE19:
216 .LBE18:
732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
- ARM GAS /tmp/ccz3aC71.s page 33
+ ARM GAS /tmp/cc94BtXA.s page 33
733:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** }
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
251 .loc 1 754 13 view .LVU64
252 000c 1A61 str r2, [r3, #16]
755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH->CR |= FLASH_CR_PG;
- ARM GAS /tmp/ccz3aC71.s page 34
+ ARM GAS /tmp/cc94BtXA.s page 34
253 .loc 1 755 3 is_stmt 1 view .LVU65
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
294 .cfi_startproc
295 @ args = 0, pretend = 0, frame = 0
296 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccz3aC71.s page 35
+ ARM GAS /tmp/cc94BtXA.s page 35
297 @ link register save eliminated.
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
338 0034 9369 ldr r3, [r2, #24]
339 .loc 1 782 21 view .LVU92
340 0036 43F00803 orr r3, r3, #8
- ARM GAS /tmp/ccz3aC71.s page 36
+ ARM GAS /tmp/cc94BtXA.s page 36
341 003a 9361 str r3, [r2, #24]
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
374 0064 014B ldr r3, .L20
375 0066 F222 movs r2, #242
376 0068 DA60 str r2, [r3, #12]
- ARM GAS /tmp/ccz3aC71.s page 37
+ ARM GAS /tmp/cc94BtXA.s page 37
804:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** }
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
425 0012 2975 strb r1, [r5, #20]
236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
426 .loc 1 236 3 is_stmt 1 discriminator 2 view .LVU114
- ARM GAS /tmp/ccz3aC71.s page 38
+ ARM GAS /tmp/cc94BtXA.s page 38
239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
468 .LVL9:
469 .L27:
266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break;
- ARM GAS /tmp/ccz3aC71.s page 39
+ ARM GAS /tmp/cc94BtXA.s page 39
470 .loc 1 266 7 is_stmt 1 view .LVU128
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
510 0068 0020 movs r0, #0
511 .LVL18:
254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
- ARM GAS /tmp/ccz3aC71.s page 40
+ ARM GAS /tmp/cc94BtXA.s page 40
512 .loc 1 254 3 view .LVU143
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
565 .align 1
566 .global HAL_FLASH_IRQHandler
567 .syntax unified
- ARM GAS /tmp/ccz3aC71.s page 41
+ ARM GAS /tmp/cc94BtXA.s page 41
568 .thumb
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
609 001e 384A ldr r2, .L48+4
610 0020 0A40 ands r2, r2, r1
611 0022 1A61 str r2, [r3, #16]
- ARM GAS /tmp/ccz3aC71.s page 42
+ ARM GAS /tmp/cc94BtXA.s page 42
308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
650 .loc 1 325 11 is_stmt 1 view .LVU179
651 0052 FFF7FEFF bl HAL_FLASH_EndOfOperationCallback
652 .LVL23:
- ARM GAS /tmp/ccz3aC71.s page 43
+ ARM GAS /tmp/cc94BtXA.s page 43
328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** FLASH_Erase_Sector(temp, pFlash.VoltageForErase);
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
692 .loc 1 350 33 is_stmt 0 view .LVU194
693 0080 0020 movs r0, #0
694 0082 204B ldr r3, .L48+8
- ARM GAS /tmp/ccz3aC71.s page 44
+ ARM GAS /tmp/cc94BtXA.s page 44
695 0084 1870 strb r0, [r3]
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
735 .loc 1 399 5 view .LVU209
736 00b2 2046 mov r0, r4
- ARM GAS /tmp/ccz3aC71.s page 45
+ ARM GAS /tmp/cc94BtXA.s page 45
737 00b4 FFF7FEFF bl HAL_FLASH_OperationErrorCallback
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
777 .LVL36:
360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break;
778 .loc 1 360 9 is_stmt 1 view .LVU224
- ARM GAS /tmp/ccz3aC71.s page 46
+ ARM GAS /tmp/cc94BtXA.s page 46
360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** break;
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
824 .loc 1 479 1 is_stmt 1 view -0
825 .cfi_startproc
826 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccz3aC71.s page 47
+ ARM GAS /tmp/cc94BtXA.s page 47
827 @ frame_needed = 0, uses_anonymous_args = 0
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
867 .L55:
868 0028 003C0240 .word 1073888256
869 002c 23016745 .word 1164378403
- ARM GAS /tmp/ccz3aC71.s page 48
+ ARM GAS /tmp/cc94BtXA.s page 48
870 .cfi_endproc
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
920 .loc 1 516 12 is_stmt 0 view .LVU258
921 0000 074B ldr r3, .L63
- ARM GAS /tmp/ccz3aC71.s page 49
+ ARM GAS /tmp/cc94BtXA.s page 49
922 0002 5B69 ldr r3, [r3, #20]
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
967 .loc 1 537 8 is_stmt 0 view .LVU270
968 0000 034A ldr r2, .L66
- ARM GAS /tmp/ccz3aC71.s page 50
+ ARM GAS /tmp/cc94BtXA.s page 50
969 0002 5369 ldr r3, [r2, #20]
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
1020 .LFB152:
597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** uint32_t tickstart = 0;
1021 .loc 1 597 1 is_stmt 1 view -0
- ARM GAS /tmp/ccz3aC71.s page 51
+ ARM GAS /tmp/cc94BtXA.s page 51
1022 .cfi_startproc
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
1062 .loc 1 613 9 is_stmt 0 view .LVU293
1063 0020 24B1 cbz r4, .L74
- ARM GAS /tmp/ccz3aC71.s page 52
+ ARM GAS /tmp/cc94BtXA.s page 52
613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** {
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
1103 .loc 1 623 5 is_stmt 1 view .LVU308
1104 004e FFF7FEFF bl FLASH_SetErrorCode
1105 .LVL48:
- ARM GAS /tmp/ccz3aC71.s page 53
+ ARM GAS /tmp/cc94BtXA.s page 53
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** }
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
1153 .loc 1 167 3 is_stmt 0 view .LVU317
1154 0006 127D ldrb r2, [r2, #20] @ zero_extendqisi2
1155 0008 012A cmp r2, #1
- ARM GAS /tmp/ccz3aC71.s page 54
+ ARM GAS /tmp/cc94BtXA.s page 54
1156 000a 31D0 beq .L93
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
1197 .loc 1 210 14 is_stmt 0 view .LVU331
1198 0036 4CF25030 movw r0, #50000
- ARM GAS /tmp/ccz3aC71.s page 55
+ ARM GAS /tmp/cc94BtXA.s page 55
1199 003a FFF7FEFF bl FLASH_WaitForLastOperation
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c **** }
1240 .loc 1 197 9 is_stmt 1 view .LVU345
1241 0062 E8E7 b .L87
- ARM GAS /tmp/ccz3aC71.s page 56
+ ARM GAS /tmp/cc94BtXA.s page 56
1242 .LVL64:
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccz3aC71.s page 1
1290 0004 5369 ldr r3, [r2, #20]
549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash.c ****
1291 .loc 1 549 16 view .LVU354
- ARM GAS /tmp/ccz3aC71.s page 57
+ ARM GAS /tmp/cc94BtXA.s page 57
1292 0006 43F00203 orr r3, r3, #2
@@ -3397,67 +3397,67 @@ ARM GAS /tmp/ccz3aC71.s page 1
1321 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h"
1322 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
1323 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h"
- ARM GAS /tmp/ccz3aC71.s page 58
+ ARM GAS /tmp/cc94BtXA.s page 58
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_flash.c
- /tmp/ccz3aC71.s:20 .text.FLASH_Program_DoubleWord:00000000 $t
- /tmp/ccz3aC71.s:25 .text.FLASH_Program_DoubleWord:00000000 FLASH_Program_DoubleWord
- /tmp/ccz3aC71.s:102 .text.FLASH_Program_DoubleWord:00000030 $d
- /tmp/ccz3aC71.s:107 .text.FLASH_Program_Word:00000000 $t
- /tmp/ccz3aC71.s:112 .text.FLASH_Program_Word:00000000 FLASH_Program_Word
- /tmp/ccz3aC71.s:162 .text.FLASH_Program_Word:00000024 $d
- /tmp/ccz3aC71.s:167 .text.FLASH_Program_HalfWord:00000000 $t
- /tmp/ccz3aC71.s:172 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord
- /tmp/ccz3aC71.s:222 .text.FLASH_Program_HalfWord:00000024 $d
- /tmp/ccz3aC71.s:227 .text.FLASH_Program_Byte:00000000 $t
- /tmp/ccz3aC71.s:232 .text.FLASH_Program_Byte:00000000 FLASH_Program_Byte
- /tmp/ccz3aC71.s:281 .text.FLASH_Program_Byte:00000020 $d
- /tmp/ccz3aC71.s:286 .text.FLASH_SetErrorCode:00000000 $t
- /tmp/ccz3aC71.s:291 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode
- /tmp/ccz3aC71.s:382 .text.FLASH_SetErrorCode:0000006c $d
- /tmp/ccz3aC71.s:1313 .bss.pFlash:00000000 pFlash
- /tmp/ccz3aC71.s:388 .text.HAL_FLASH_Program_IT:00000000 $t
- /tmp/ccz3aC71.s:394 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT
- /tmp/ccz3aC71.s:452 .text.HAL_FLASH_Program_IT:0000003a $d
- /tmp/ccz3aC71.s:456 .text.HAL_FLASH_Program_IT:0000003e $t
- /tmp/ccz3aC71.s:517 .text.HAL_FLASH_Program_IT:0000006c $d
- /tmp/ccz3aC71.s:523 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t
- /tmp/ccz3aC71.s:529 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback
- /tmp/ccz3aC71.s:544 .text.HAL_FLASH_OperationErrorCallback:00000000 $t
- /tmp/ccz3aC71.s:550 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback
- /tmp/ccz3aC71.s:565 .text.HAL_FLASH_IRQHandler:00000000 $t
- /tmp/ccz3aC71.s:571 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler
- /tmp/ccz3aC71.s:809 .text.HAL_FLASH_IRQHandler:000000fc $d
- /tmp/ccz3aC71.s:816 .text.HAL_FLASH_Unlock:00000000 $t
- /tmp/ccz3aC71.s:822 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock
- /tmp/ccz3aC71.s:868 .text.HAL_FLASH_Unlock:00000028 $d
- /tmp/ccz3aC71.s:874 .text.HAL_FLASH_Lock:00000000 $t
- /tmp/ccz3aC71.s:880 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock
- /tmp/ccz3aC71.s:901 .text.HAL_FLASH_Lock:00000010 $d
- /tmp/ccz3aC71.s:906 .text.HAL_FLASH_OB_Unlock:00000000 $t
- /tmp/ccz3aC71.s:912 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock
- /tmp/ccz3aC71.s:947 .text.HAL_FLASH_OB_Unlock:00000020 $d
- /tmp/ccz3aC71.s:953 .text.HAL_FLASH_OB_Lock:00000000 $t
- /tmp/ccz3aC71.s:959 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock
- /tmp/ccz3aC71.s:980 .text.HAL_FLASH_OB_Lock:00000010 $d
- /tmp/ccz3aC71.s:985 .text.HAL_FLASH_GetError:00000000 $t
- /tmp/ccz3aC71.s:991 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError
- /tmp/ccz3aC71.s:1007 .text.HAL_FLASH_GetError:00000008 $d
- /tmp/ccz3aC71.s:1012 .text.FLASH_WaitForLastOperation:00000000 $t
- /tmp/ccz3aC71.s:1018 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation
- /tmp/ccz3aC71.s:1117 .text.FLASH_WaitForLastOperation:0000005c $d
- /tmp/ccz3aC71.s:1123 .text.HAL_FLASH_Program:00000000 $t
- /tmp/ccz3aC71.s:1129 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program
- /tmp/ccz3aC71.s:1181 .text.HAL_FLASH_Program:0000002a $d
- /tmp/ccz3aC71.s:1185 .text.HAL_FLASH_Program:0000002e $t
- /tmp/ccz3aC71.s:1264 .text.HAL_FLASH_Program:00000074 $d
- /tmp/ccz3aC71.s:1270 .text.HAL_FLASH_OB_Launch:00000000 $t
- /tmp/ccz3aC71.s:1276 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch
- /tmp/ccz3aC71.s:1304 .text.HAL_FLASH_OB_Launch:00000018 $d
- /tmp/ccz3aC71.s:1310 .bss.pFlash:00000000 $d
- ARM GAS /tmp/ccz3aC71.s page 59
+ /tmp/cc94BtXA.s:20 .text.FLASH_Program_DoubleWord:00000000 $t
+ /tmp/cc94BtXA.s:25 .text.FLASH_Program_DoubleWord:00000000 FLASH_Program_DoubleWord
+ /tmp/cc94BtXA.s:102 .text.FLASH_Program_DoubleWord:00000030 $d
+ /tmp/cc94BtXA.s:107 .text.FLASH_Program_Word:00000000 $t
+ /tmp/cc94BtXA.s:112 .text.FLASH_Program_Word:00000000 FLASH_Program_Word
+ /tmp/cc94BtXA.s:162 .text.FLASH_Program_Word:00000024 $d
+ /tmp/cc94BtXA.s:167 .text.FLASH_Program_HalfWord:00000000 $t
+ /tmp/cc94BtXA.s:172 .text.FLASH_Program_HalfWord:00000000 FLASH_Program_HalfWord
+ /tmp/cc94BtXA.s:222 .text.FLASH_Program_HalfWord:00000024 $d
+ /tmp/cc94BtXA.s:227 .text.FLASH_Program_Byte:00000000 $t
+ /tmp/cc94BtXA.s:232 .text.FLASH_Program_Byte:00000000 FLASH_Program_Byte
+ /tmp/cc94BtXA.s:281 .text.FLASH_Program_Byte:00000020 $d
+ /tmp/cc94BtXA.s:286 .text.FLASH_SetErrorCode:00000000 $t
+ /tmp/cc94BtXA.s:291 .text.FLASH_SetErrorCode:00000000 FLASH_SetErrorCode
+ /tmp/cc94BtXA.s:382 .text.FLASH_SetErrorCode:0000006c $d
+ /tmp/cc94BtXA.s:1313 .bss.pFlash:00000000 pFlash
+ /tmp/cc94BtXA.s:388 .text.HAL_FLASH_Program_IT:00000000 $t
+ /tmp/cc94BtXA.s:394 .text.HAL_FLASH_Program_IT:00000000 HAL_FLASH_Program_IT
+ /tmp/cc94BtXA.s:452 .text.HAL_FLASH_Program_IT:0000003a $d
+ /tmp/cc94BtXA.s:456 .text.HAL_FLASH_Program_IT:0000003e $t
+ /tmp/cc94BtXA.s:517 .text.HAL_FLASH_Program_IT:0000006c $d
+ /tmp/cc94BtXA.s:523 .text.HAL_FLASH_EndOfOperationCallback:00000000 $t
+ /tmp/cc94BtXA.s:529 .text.HAL_FLASH_EndOfOperationCallback:00000000 HAL_FLASH_EndOfOperationCallback
+ /tmp/cc94BtXA.s:544 .text.HAL_FLASH_OperationErrorCallback:00000000 $t
+ /tmp/cc94BtXA.s:550 .text.HAL_FLASH_OperationErrorCallback:00000000 HAL_FLASH_OperationErrorCallback
+ /tmp/cc94BtXA.s:565 .text.HAL_FLASH_IRQHandler:00000000 $t
+ /tmp/cc94BtXA.s:571 .text.HAL_FLASH_IRQHandler:00000000 HAL_FLASH_IRQHandler
+ /tmp/cc94BtXA.s:809 .text.HAL_FLASH_IRQHandler:000000fc $d
+ /tmp/cc94BtXA.s:816 .text.HAL_FLASH_Unlock:00000000 $t
+ /tmp/cc94BtXA.s:822 .text.HAL_FLASH_Unlock:00000000 HAL_FLASH_Unlock
+ /tmp/cc94BtXA.s:868 .text.HAL_FLASH_Unlock:00000028 $d
+ /tmp/cc94BtXA.s:874 .text.HAL_FLASH_Lock:00000000 $t
+ /tmp/cc94BtXA.s:880 .text.HAL_FLASH_Lock:00000000 HAL_FLASH_Lock
+ /tmp/cc94BtXA.s:901 .text.HAL_FLASH_Lock:00000010 $d
+ /tmp/cc94BtXA.s:906 .text.HAL_FLASH_OB_Unlock:00000000 $t
+ /tmp/cc94BtXA.s:912 .text.HAL_FLASH_OB_Unlock:00000000 HAL_FLASH_OB_Unlock
+ /tmp/cc94BtXA.s:947 .text.HAL_FLASH_OB_Unlock:00000020 $d
+ /tmp/cc94BtXA.s:953 .text.HAL_FLASH_OB_Lock:00000000 $t
+ /tmp/cc94BtXA.s:959 .text.HAL_FLASH_OB_Lock:00000000 HAL_FLASH_OB_Lock
+ /tmp/cc94BtXA.s:980 .text.HAL_FLASH_OB_Lock:00000010 $d
+ /tmp/cc94BtXA.s:985 .text.HAL_FLASH_GetError:00000000 $t
+ /tmp/cc94BtXA.s:991 .text.HAL_FLASH_GetError:00000000 HAL_FLASH_GetError
+ /tmp/cc94BtXA.s:1007 .text.HAL_FLASH_GetError:00000008 $d
+ /tmp/cc94BtXA.s:1012 .text.FLASH_WaitForLastOperation:00000000 $t
+ /tmp/cc94BtXA.s:1018 .text.FLASH_WaitForLastOperation:00000000 FLASH_WaitForLastOperation
+ /tmp/cc94BtXA.s:1117 .text.FLASH_WaitForLastOperation:0000005c $d
+ /tmp/cc94BtXA.s:1123 .text.HAL_FLASH_Program:00000000 $t
+ /tmp/cc94BtXA.s:1129 .text.HAL_FLASH_Program:00000000 HAL_FLASH_Program
+ /tmp/cc94BtXA.s:1181 .text.HAL_FLASH_Program:0000002a $d
+ /tmp/cc94BtXA.s:1185 .text.HAL_FLASH_Program:0000002e $t
+ /tmp/cc94BtXA.s:1264 .text.HAL_FLASH_Program:00000074 $d
+ /tmp/cc94BtXA.s:1270 .text.HAL_FLASH_OB_Launch:00000000 $t
+ /tmp/cc94BtXA.s:1276 .text.HAL_FLASH_OB_Launch:00000000 HAL_FLASH_OB_Launch
+ /tmp/cc94BtXA.s:1304 .text.HAL_FLASH_OB_Launch:00000018 $d
+ /tmp/cc94BtXA.s:1310 .bss.pFlash:00000000 $d
+ ARM GAS /tmp/cc94BtXA.s page 59
diff --git a/build/stm32f7xx_hal_flash_ex.lst b/build/stm32f7xx_hal_flash_ex.lst
index 89c3612..f20c13e 100644
--- a/build/stm32f7xx_hal_flash_ex.lst
+++ b/build/stm32f7xx_hal_flash_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccWTTAKN.s page 1
+ARM GAS /tmp/ccS9tck3.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** HAL_FLASH_Lock() functions
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) Erase function: Erase sector, erase all sectors
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (++) There are two modes of erase :
- ARM GAS /tmp/ccWTTAKN.s page 2
+ ARM GAS /tmp/ccS9tck3.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** (+++) Polling Mode using HAL_FLASHEx_Erase()
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @}
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 3
+ ARM GAS /tmp/ccS9tck3.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Private function prototypes -----------------------------------------------*/
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @{
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /**
- ARM GAS /tmp/ccWTTAKN.s page 4
+ ARM GAS /tmp/ccS9tck3.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Perform a mass erase or erase the specified FLASH memory sectors
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 5
+ ARM GAS /tmp/ccS9tck3.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* If the erase operation is completed, disable the SER Bit and SNB Bits */
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** #endif /* FLASH_OPTCR_nDBANK */
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** else
- ARM GAS /tmp/ccWTTAKN.s page 6
+ ARM GAS /tmp/ccS9tck3.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** {
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 7
+ ARM GAS /tmp/ccS9tck3.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* USER configuration */
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Process Unlocked */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __HAL_UNLOCK(&pFlash);
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 8
+ ARM GAS /tmp/ccS9tck3.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status;
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by word (32-bit)
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
- ARM GAS /tmp/ccWTTAKN.s page 9
+ ARM GAS /tmp/ccS9tck3.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * the operation will be done by double word (64-bit)
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** {
460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /*Only bank1 will be erased*/
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_MER1;
- ARM GAS /tmp/ccWTTAKN.s page 10
+ ARM GAS /tmp/ccS9tck3.s page 10
54 .loc 1 461 5 is_stmt 1 view .LVU12
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
- ARM GAS /tmp/ccWTTAKN.s page 11
+ ARM GAS /tmp/ccS9tck3.s page 11
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- ARM GAS /tmp/ccWTTAKN.s page 12
+ ARM GAS /tmp/ccS9tck3.s page 12
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccWTTAKN.s page 13
+ ARM GAS /tmp/ccS9tck3.s page 13
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
- ARM GAS /tmp/ccWTTAKN.s page 14
+ ARM GAS /tmp/ccS9tck3.s page 14
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
- ARM GAS /tmp/ccWTTAKN.s page 15
+ ARM GAS /tmp/ccS9tck3.s page 15
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccWTTAKN.s page 16
+ ARM GAS /tmp/ccS9tck3.s page 16
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
- ARM GAS /tmp/ccWTTAKN.s page 17
+ ARM GAS /tmp/ccS9tck3.s page 17
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccWTTAKN.s page 18
+ ARM GAS /tmp/ccS9tck3.s page 18
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccWTTAKN.s page 19
+ ARM GAS /tmp/ccS9tck3.s page 19
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccWTTAKN.s page 20
+ ARM GAS /tmp/ccS9tck3.s page 20
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- ARM GAS /tmp/ccWTTAKN.s page 21
+ ARM GAS /tmp/ccS9tck3.s page 21
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccWTTAKN.s page 22
+ ARM GAS /tmp/ccS9tck3.s page 22
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccWTTAKN.s page 23
+ ARM GAS /tmp/ccS9tck3.s page 23
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
- ARM GAS /tmp/ccWTTAKN.s page 24
+ ARM GAS /tmp/ccS9tck3.s page 24
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
- ARM GAS /tmp/ccWTTAKN.s page 25
+ ARM GAS /tmp/ccS9tck3.s page 25
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
79 .syntax unified
80 @ 879 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
81 002c BFF34F8F dsb 0xF
- ARM GAS /tmp/ccWTTAKN.s page 26
+ ARM GAS /tmp/ccS9tck3.s page 26
82 @ 0 "" 2
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /**
470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Erase the specified FLASH memory sector
- ARM GAS /tmp/ccWTTAKN.s page 27
+ ARM GAS /tmp/ccS9tck3.s page 27
471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Sector FLASH sector to erase
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** This will force the CPU to respect the sequence of instruction (no optimization).*/
526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** __DSB();
527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
- ARM GAS /tmp/ccWTTAKN.s page 28
+ ARM GAS /tmp/ccS9tck3.s page 28
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
555:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @param Iwdgstop Independent watchdog counter freeze in Stop mode.
- ARM GAS /tmp/ccWTTAKN.s page 29
+ ARM GAS /tmp/ccS9tck3.s page 29
558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * This parameter can be one of the following values:
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
612:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /**
613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Return the FLASH User Option Byte value.
614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval uint32_t FLASH User Option Bytes values: WWDG_SW(Bit4), IWDG_SW(Bit5), nRST_STOP(Bit6),
- ARM GAS /tmp/ccWTTAKN.s page 30
+ ARM GAS /tmp/ccS9tck3.s page 30
615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * nRST_STDBY(Bit7), nDBOOT(Bit28), nDBANK(Bit29), IWDG_STDBY(Bit30) and IWDG_STOP(Bit31).
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Check the parameters */
642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange));
643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 31
+ ARM GAS /tmp/ccS9tck3.s page 31
644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* if the previous operation is completed, proceed to erase all sectors */
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR &= SECTOR_MASK;
699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_SER | (Sector << FLASH_CR_SNB_Pos);
700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** FLASH->CR |= FLASH_CR_STRT;
- ARM GAS /tmp/ccWTTAKN.s page 32
+ ARM GAS /tmp/ccS9tck3.s page 32
701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STOP_SOURCE(Stop));
756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_STDBY_SOURCE(Stdby));
757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STOP_FREEZE(Iwdgstop));
- ARM GAS /tmp/ccWTTAKN.s page 33
+ ARM GAS /tmp/ccS9tck3.s page 33
758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_OB_IWDG_STDBY_FREEZE(Iwdgstdby));
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
812:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /* Wait for last operation to be completed */
814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
- ARM GAS /tmp/ccWTTAKN.s page 34
+ ARM GAS /tmp/ccS9tck3.s page 34
815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** *
871:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @retval HAL Status
- ARM GAS /tmp/ccWTTAKN.s page 35
+ ARM GAS /tmp/ccS9tck3.s page 35
872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** */
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
203 .loc 1 911 1 is_stmt 0 view .LVU44
204 000c 0020 movs r0, #0
- ARM GAS /tmp/ccWTTAKN.s page 36
+ ARM GAS /tmp/ccS9tck3.s page 36
205 000e 7047 bx lr
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
952:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** return status;
- ARM GAS /tmp/ccWTTAKN.s page 37
+ ARM GAS /tmp/ccS9tck3.s page 37
955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
247 .loc 1 982 3 is_stmt 1 view .LVU54
983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
248 .loc 1 983 1 is_stmt 0 view .LVU55
- ARM GAS /tmp/ccWTTAKN.s page 38
+ ARM GAS /tmp/ccS9tck3.s page 38
249 0014 7047 bx lr
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** /**
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** * @brief Configure Boot base address.
- ARM GAS /tmp/ccWTTAKN.s page 39
+ ARM GAS /tmp/ccS9tck3.s page 39
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** *
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
316 .loc 1 1023 5 is_stmt 1 view .LVU69
1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
- ARM GAS /tmp/ccWTTAKN.s page 40
+ ARM GAS /tmp/ccS9tck3.s page 40
317 .loc 1 1023 20 is_stmt 0 view .LVU70
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
363 .loc 1 816 3 is_stmt 1 view .LVU80
816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** {
364 .loc 1 816 5 is_stmt 0 view .LVU81
- ARM GAS /tmp/ccWTTAKN.s page 41
+ ARM GAS /tmp/ccS9tck3.s page 41
365 000c 20B9 cbnz r0, .L33
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
410 .loc 1 850 12 is_stmt 0 view .LVU93
411 0004 4CF25030 movw r0, #50000
- ARM GAS /tmp/ccWTTAKN.s page 42
+ ARM GAS /tmp/ccS9tck3.s page 42
412 .LVL24:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
457 .cfi_offset 14, -4
458 0002 0446 mov r4, r0
875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 43
+ ARM GAS /tmp/ccS9tck3.s page 43
459 .loc 1 875 3 is_stmt 1 view .LVU105
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
502 .loc 1 578 1 is_stmt 0 view .LVU118
503 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
504 .LCFI3:
- ARM GAS /tmp/ccWTTAKN.s page 44
+ ARM GAS /tmp/ccS9tck3.s page 44
505 .cfi_def_cfa_offset 24
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
541 .loc 1 603 29 is_stmt 0 view .LVU137
542 0014 44EA0701 orr r1, r4, r7
- ARM GAS /tmp/ccWTTAKN.s page 45
+ ARM GAS /tmp/ccS9tck3.s page 45
603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
587 .thumb
588 .thumb_func
590 FLASH_OB_BootAddressConfig:
- ARM GAS /tmp/ccWTTAKN.s page 46
+ ARM GAS /tmp/ccS9tck3.s page 46
591 .LVL41:
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
632 .loc 1 955 1 is_stmt 0 view .LVU162
633 0020 38BD pop {r3, r4, r5, pc}
- ARM GAS /tmp/ccWTTAKN.s page 47
+ ARM GAS /tmp/ccS9tck3.s page 47
634 .LVL45:
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
683 0010 0122 movs r2, #1
684 0012 1A75 strb r2, [r3, #20]
290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
- ARM GAS /tmp/ccWTTAKN.s page 48
+ ARM GAS /tmp/ccS9tck3.s page 48
685 .loc 1 290 3 discriminator 2 view .LVU170
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
722 .loc 1 287 21 view .LVU187
723 0032 0120 movs r0, #1
724 .LVL53:
- ARM GAS /tmp/ccWTTAKN.s page 49
+ ARM GAS /tmp/ccS9tck3.s page 49
725 .L61:
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
762 .loc 1 372 3 view .LVU204
763 005c 184B ldr r3, .L80
764 005e 0022 movs r2, #0
- ARM GAS /tmp/ccWTTAKN.s page 50
+ ARM GAS /tmp/ccS9tck3.s page 50
765 0060 1A75 strb r2, [r3, #20]
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
808 .loc 1 321 14 view .LVU215
809 009c D2E7 b .L64
810 .L77:
- ARM GAS /tmp/ccWTTAKN.s page 51
+ ARM GAS /tmp/ccS9tck3.s page 51
342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** }
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
851 .loc 1 375 1 view .LVU229
852 00bc 7047 bx lr
853 .L81:
- ARM GAS /tmp/ccWTTAKN.s page 52
+ ARM GAS /tmp/ccS9tck3.s page 52
854 00be 00BF .align 2
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
898 .loc 1 396 25 is_stmt 0 view .LVU241
899 0014 FFF7FEFF bl FLASH_OB_GetUser
900 .LVL70:
- ARM GAS /tmp/ccWTTAKN.s page 53
+ ARM GAS /tmp/ccS9tck3.s page 53
396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
944 .loc 1 488 3 view .LVU255
491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** assert_param(IS_VOLTAGERANGE(VoltageRange));
- ARM GAS /tmp/ccWTTAKN.s page 54
+ ARM GAS /tmp/ccS9tck3.s page 54
945 .loc 1 491 3 view .LVU256
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
985 0024 22F44072 bic r2, r2, #768
986 0028 1A61 str r2, [r3, #16]
519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
- ARM GAS /tmp/ccWTTAKN.s page 55
+ ARM GAS /tmp/ccS9tck3.s page 55
987 .loc 1 519 3 is_stmt 1 view .LVU271
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1029 0054 003C0240 .word 1073888256
1030 .cfi_endproc
1031 .LFE146:
- ARM GAS /tmp/ccWTTAKN.s page 56
+ ARM GAS /tmp/ccS9tck3.s page 56
1033 .section .text.HAL_FLASHEx_Erase,"ax",%progbits
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1076 0018 FFF7FEFF bl FLASH_WaitForLastOperation
1077 .LVL83:
170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** {
- ARM GAS /tmp/ccWTTAKN.s page 57
+ ARM GAS /tmp/ccS9tck3.s page 57
1078 .loc 1 170 3 is_stmt 1 view .LVU297
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1115 .loc 1 201 9 is_stmt 1 view .LVU314
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c ****
1116 .loc 1 201 18 is_stmt 0 view .LVU315
- ARM GAS /tmp/ccWTTAKN.s page 58
+ ARM GAS /tmp/ccS9tck3.s page 58
1117 0040 4CF25030 movw r0, #50000
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1159 .LVL94:
1160 .L105:
209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** break;
- ARM GAS /tmp/ccWTTAKN.s page 59
+ ARM GAS /tmp/ccS9tck3.s page 59
1161 .loc 1 209 11 is_stmt 1 view .LVU328
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1206 .thumb
1207 .thumb_func
1209 HAL_FLASHEx_Erase_IT:
- ARM GAS /tmp/ccWTTAKN.s page 60
+ ARM GAS /tmp/ccS9tck3.s page 60
1210 .LVL99:
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_flash_ex.c **** {
1251 .loc 1 249 5 view .LVU352
1252 0028 012B cmp r3, #1
- ARM GAS /tmp/ccWTTAKN.s page 61
+ ARM GAS /tmp/ccS9tck3.s page 61
1253 002a 0DD0 beq .L113
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1289 .loc 1 252 29 is_stmt 0 view .LVU370
1290 0048 054B ldr r3, .L114
1291 004a 0222 movs r2, #2
- ARM GAS /tmp/ccWTTAKN.s page 62
+ ARM GAS /tmp/ccS9tck3.s page 62
1292 004c 1A70 strb r2, [r3]
@@ -3698,61 +3698,61 @@ ARM GAS /tmp/ccWTTAKN.s page 1
1322 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
1323 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash.h"
1324 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_flash_ex.h"
- ARM GAS /tmp/ccWTTAKN.s page 63
+ ARM GAS /tmp/ccS9tck3.s page 63
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_flash_ex.c
- /tmp/ccWTTAKN.s:20 .text.FLASH_MassErase:00000000 $t
- /tmp/ccWTTAKN.s:25 .text.FLASH_MassErase:00000000 FLASH_MassErase
- /tmp/ccWTTAKN.s:117 .text.FLASH_MassErase:0000004c $d
- /tmp/ccWTTAKN.s:122 .text.FLASH_OB_GetWRP:00000000 $t
- /tmp/ccWTTAKN.s:127 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP
- /tmp/ccWTTAKN.s:145 .text.FLASH_OB_GetWRP:0000000c $d
- /tmp/ccWTTAKN.s:151 .text.FLASH_OB_GetUser:00000000 $t
- /tmp/ccWTTAKN.s:156 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser
- /tmp/ccWTTAKN.s:174 .text.FLASH_OB_GetUser:0000000c $d
- /tmp/ccWTTAKN.s:180 .text.FLASH_OB_BOR_LevelConfig:00000000 $t
- /tmp/ccWTTAKN.s:185 .text.FLASH_OB_BOR_LevelConfig:00000000 FLASH_OB_BOR_LevelConfig
- /tmp/ccWTTAKN.s:209 .text.FLASH_OB_BOR_LevelConfig:00000010 $d
- /tmp/ccWTTAKN.s:214 .text.FLASH_OB_GetRDP:00000000 $t
- /tmp/ccWTTAKN.s:219 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP
- /tmp/ccWTTAKN.s:253 .text.FLASH_OB_GetRDP:00000018 $d
- /tmp/ccWTTAKN.s:258 .text.FLASH_OB_GetBOR:00000000 $t
- /tmp/ccWTTAKN.s:263 .text.FLASH_OB_GetBOR:00000000 FLASH_OB_GetBOR
- /tmp/ccWTTAKN.s:280 .text.FLASH_OB_GetBOR:0000000c $d
- /tmp/ccWTTAKN.s:285 .text.FLASH_OB_GetBootAddress:00000000 $t
- /tmp/ccWTTAKN.s:290 .text.FLASH_OB_GetBootAddress:00000000 FLASH_OB_GetBootAddress
- /tmp/ccWTTAKN.s:329 .text.FLASH_OB_GetBootAddress:00000014 $d
- /tmp/ccWTTAKN.s:334 .text.FLASH_OB_EnableWRP:00000000 $t
- /tmp/ccWTTAKN.s:339 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP
- /tmp/ccWTTAKN.s:382 .text.FLASH_OB_EnableWRP:0000001c $d
- /tmp/ccWTTAKN.s:387 .text.FLASH_OB_DisableWRP:00000000 $t
- /tmp/ccWTTAKN.s:392 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP
- /tmp/ccWTTAKN.s:435 .text.FLASH_OB_DisableWRP:00000018 $d
- /tmp/ccWTTAKN.s:440 .text.FLASH_OB_RDP_LevelConfig:00000000 $t
- /tmp/ccWTTAKN.s:445 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig
- /tmp/ccWTTAKN.s:485 .text.FLASH_OB_RDP_LevelConfig:00000014 $d
- /tmp/ccWTTAKN.s:490 .text.FLASH_OB_UserConfig:00000000 $t
- /tmp/ccWTTAKN.s:495 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig
- /tmp/ccWTTAKN.s:579 .text.FLASH_OB_UserConfig:00000040 $d
- /tmp/ccWTTAKN.s:585 .text.FLASH_OB_BootAddressConfig:00000000 $t
- /tmp/ccWTTAKN.s:590 .text.FLASH_OB_BootAddressConfig:00000000 FLASH_OB_BootAddressConfig
- /tmp/ccWTTAKN.s:646 .text.FLASH_OB_BootAddressConfig:00000030 $d
- /tmp/ccWTTAKN.s:651 .text.HAL_FLASHEx_OBProgram:00000000 $t
- /tmp/ccWTTAKN.s:657 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram
- /tmp/ccWTTAKN.s:856 .text.HAL_FLASHEx_OBProgram:000000c0 $d
- /tmp/ccWTTAKN.s:861 .text.HAL_FLASHEx_OBGetConfig:00000000 $t
- /tmp/ccWTTAKN.s:867 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig
- /tmp/ccWTTAKN.s:930 .text.FLASH_Erase_Sector:00000000 $t
- /tmp/ccWTTAKN.s:936 .text.FLASH_Erase_Sector:00000000 FLASH_Erase_Sector
- /tmp/ccWTTAKN.s:1029 .text.FLASH_Erase_Sector:00000054 $d
- /tmp/ccWTTAKN.s:1034 .text.HAL_FLASHEx_Erase:00000000 $t
- /tmp/ccWTTAKN.s:1040 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase
- /tmp/ccWTTAKN.s:1196 .text.HAL_FLASHEx_Erase:0000008c $d
- /tmp/ccWTTAKN.s:1203 .text.HAL_FLASHEx_Erase_IT:00000000 $t
- /tmp/ccWTTAKN.s:1209 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT
- /tmp/ccWTTAKN.s:1313 .text.HAL_FLASHEx_Erase_IT:00000060 $d
+ /tmp/ccS9tck3.s:20 .text.FLASH_MassErase:00000000 $t
+ /tmp/ccS9tck3.s:25 .text.FLASH_MassErase:00000000 FLASH_MassErase
+ /tmp/ccS9tck3.s:117 .text.FLASH_MassErase:0000004c $d
+ /tmp/ccS9tck3.s:122 .text.FLASH_OB_GetWRP:00000000 $t
+ /tmp/ccS9tck3.s:127 .text.FLASH_OB_GetWRP:00000000 FLASH_OB_GetWRP
+ /tmp/ccS9tck3.s:145 .text.FLASH_OB_GetWRP:0000000c $d
+ /tmp/ccS9tck3.s:151 .text.FLASH_OB_GetUser:00000000 $t
+ /tmp/ccS9tck3.s:156 .text.FLASH_OB_GetUser:00000000 FLASH_OB_GetUser
+ /tmp/ccS9tck3.s:174 .text.FLASH_OB_GetUser:0000000c $d
+ /tmp/ccS9tck3.s:180 .text.FLASH_OB_BOR_LevelConfig:00000000 $t
+ /tmp/ccS9tck3.s:185 .text.FLASH_OB_BOR_LevelConfig:00000000 FLASH_OB_BOR_LevelConfig
+ /tmp/ccS9tck3.s:209 .text.FLASH_OB_BOR_LevelConfig:00000010 $d
+ /tmp/ccS9tck3.s:214 .text.FLASH_OB_GetRDP:00000000 $t
+ /tmp/ccS9tck3.s:219 .text.FLASH_OB_GetRDP:00000000 FLASH_OB_GetRDP
+ /tmp/ccS9tck3.s:253 .text.FLASH_OB_GetRDP:00000018 $d
+ /tmp/ccS9tck3.s:258 .text.FLASH_OB_GetBOR:00000000 $t
+ /tmp/ccS9tck3.s:263 .text.FLASH_OB_GetBOR:00000000 FLASH_OB_GetBOR
+ /tmp/ccS9tck3.s:280 .text.FLASH_OB_GetBOR:0000000c $d
+ /tmp/ccS9tck3.s:285 .text.FLASH_OB_GetBootAddress:00000000 $t
+ /tmp/ccS9tck3.s:290 .text.FLASH_OB_GetBootAddress:00000000 FLASH_OB_GetBootAddress
+ /tmp/ccS9tck3.s:329 .text.FLASH_OB_GetBootAddress:00000014 $d
+ /tmp/ccS9tck3.s:334 .text.FLASH_OB_EnableWRP:00000000 $t
+ /tmp/ccS9tck3.s:339 .text.FLASH_OB_EnableWRP:00000000 FLASH_OB_EnableWRP
+ /tmp/ccS9tck3.s:382 .text.FLASH_OB_EnableWRP:0000001c $d
+ /tmp/ccS9tck3.s:387 .text.FLASH_OB_DisableWRP:00000000 $t
+ /tmp/ccS9tck3.s:392 .text.FLASH_OB_DisableWRP:00000000 FLASH_OB_DisableWRP
+ /tmp/ccS9tck3.s:435 .text.FLASH_OB_DisableWRP:00000018 $d
+ /tmp/ccS9tck3.s:440 .text.FLASH_OB_RDP_LevelConfig:00000000 $t
+ /tmp/ccS9tck3.s:445 .text.FLASH_OB_RDP_LevelConfig:00000000 FLASH_OB_RDP_LevelConfig
+ /tmp/ccS9tck3.s:485 .text.FLASH_OB_RDP_LevelConfig:00000014 $d
+ /tmp/ccS9tck3.s:490 .text.FLASH_OB_UserConfig:00000000 $t
+ /tmp/ccS9tck3.s:495 .text.FLASH_OB_UserConfig:00000000 FLASH_OB_UserConfig
+ /tmp/ccS9tck3.s:579 .text.FLASH_OB_UserConfig:00000040 $d
+ /tmp/ccS9tck3.s:585 .text.FLASH_OB_BootAddressConfig:00000000 $t
+ /tmp/ccS9tck3.s:590 .text.FLASH_OB_BootAddressConfig:00000000 FLASH_OB_BootAddressConfig
+ /tmp/ccS9tck3.s:646 .text.FLASH_OB_BootAddressConfig:00000030 $d
+ /tmp/ccS9tck3.s:651 .text.HAL_FLASHEx_OBProgram:00000000 $t
+ /tmp/ccS9tck3.s:657 .text.HAL_FLASHEx_OBProgram:00000000 HAL_FLASHEx_OBProgram
+ /tmp/ccS9tck3.s:856 .text.HAL_FLASHEx_OBProgram:000000c0 $d
+ /tmp/ccS9tck3.s:861 .text.HAL_FLASHEx_OBGetConfig:00000000 $t
+ /tmp/ccS9tck3.s:867 .text.HAL_FLASHEx_OBGetConfig:00000000 HAL_FLASHEx_OBGetConfig
+ /tmp/ccS9tck3.s:930 .text.FLASH_Erase_Sector:00000000 $t
+ /tmp/ccS9tck3.s:936 .text.FLASH_Erase_Sector:00000000 FLASH_Erase_Sector
+ /tmp/ccS9tck3.s:1029 .text.FLASH_Erase_Sector:00000054 $d
+ /tmp/ccS9tck3.s:1034 .text.HAL_FLASHEx_Erase:00000000 $t
+ /tmp/ccS9tck3.s:1040 .text.HAL_FLASHEx_Erase:00000000 HAL_FLASHEx_Erase
+ /tmp/ccS9tck3.s:1196 .text.HAL_FLASHEx_Erase:0000008c $d
+ /tmp/ccS9tck3.s:1203 .text.HAL_FLASHEx_Erase_IT:00000000 $t
+ /tmp/ccS9tck3.s:1209 .text.HAL_FLASHEx_Erase_IT:00000000 HAL_FLASHEx_Erase_IT
+ /tmp/ccS9tck3.s:1313 .text.HAL_FLASHEx_Erase_IT:00000060 $d
UNDEFINED SYMBOLS
FLASH_WaitForLastOperation
diff --git a/build/stm32f7xx_hal_gpio.lst b/build/stm32f7xx_hal_gpio.lst
index 9f969e6..3b7d3b5 100644
--- a/build/stm32f7xx_hal_gpio.lst
+++ b/build/stm32f7xx_hal_gpio.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cc6OeYuT.s page 1
+ARM GAS /tmp/cclpnSBX.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** in several modes:
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (+) Input mode
- ARM GAS /tmp/cc6OeYuT.s page 2
+ ARM GAS /tmp/cclpnSBX.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (+) Analog mode
@@ -118,7 +118,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (#) To set/reset the level of a pin configured in output mode use
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
- ARM GAS /tmp/cc6OeYuT.s page 3
+ ARM GAS /tmp/cclpnSBX.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
@@ -178,7 +178,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** *
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** @verbatim
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** ===============================================================================
- ARM GAS /tmp/cc6OeYuT.s page 4
+ ARM GAS /tmp/cclpnSBX.s page 4
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** ##### Initialization and de-initialization functions #####
@@ -238,7 +238,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
51 .cfi_offset 4, -16
52 .cfi_offset 5, -12
53 .cfi_offset 6, -8
- ARM GAS /tmp/cc6OeYuT.s page 5
+ ARM GAS /tmp/cclpnSBX.s page 5
54 .cfi_offset 14, -4
@@ -298,7 +298,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
86 .loc 1 197 9 is_stmt 1 view .LVU25
87 .loc 1 197 14 is_stmt 0 view .LVU26
88 0028 4468 ldr r4, [r0, #4]
- ARM GAS /tmp/cc6OeYuT.s page 6
+ ARM GAS /tmp/cclpnSBX.s page 6
89 .LVL6:
@@ -358,7 +358,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
118 .LVL11:
223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ;
119 .loc 1 223 9 is_stmt 1 view .LVU40
- ARM GAS /tmp/cc6OeYuT.s page 7
+ ARM GAS /tmp/cclpnSBX.s page 7
120 .loc 1 223 37 is_stmt 0 view .LVU41
@@ -418,7 +418,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
154 006e 2A43 orrs r2, r2, r5
155 .LVL15:
244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** SYSCFG->EXTICR[position >> 2] = temp;
- ARM GAS /tmp/cc6OeYuT.s page 8
+ ARM GAS /tmp/cclpnSBX.s page 8
156 .loc 1 244 9 is_stmt 1 view .LVU55
@@ -478,7 +478,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
197 .loc 1 257 12 is_stmt 0 view .LVU74
198 009a 4E68 ldr r6, [r1, #4]
199 009c 16F4001F tst r6, #2097152
- ARM GAS /tmp/cc6OeYuT.s page 9
+ ARM GAS /tmp/cclpnSBX.s page 9
200 00a0 01D0 beq .L9
@@ -538,7 +538,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
238 00c2 2240 ands r2, r2, r4
239 .LVL27:
274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** if ((GPIO_Init->Mode & EXTI_IT) != 0x00u)
- ARM GAS /tmp/cc6OeYuT.s page 10
+ ARM GAS /tmp/cclpnSBX.s page 10
240 .loc 1 274 9 is_stmt 1 view .LVU93
@@ -598,7 +598,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
280 .loc 1 186 7 is_stmt 1 view .LVU109
186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** {
281 .loc 1 186 22 is_stmt 0 view .LVU110
- ARM GAS /tmp/cc6OeYuT.s page 11
+ ARM GAS /tmp/cclpnSBX.s page 11
282 00ec 4C68 ldr r4, [r1, #4]
@@ -658,7 +658,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** GPIOx->PUPDR = temp;
319 .loc 1 211 14 view .LVU128
320 0112 2243 orrs r2, r2, r4
- ARM GAS /tmp/cc6OeYuT.s page 12
+ ARM GAS /tmp/cclpnSBX.s page 12
321 .LVL37:
@@ -718,7 +718,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
358 .LVL41:
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
359 .loc 1 232 7 is_stmt 1 view .LVU146
- ARM GAS /tmp/cc6OeYuT.s page 13
+ ARM GAS /tmp/cclpnSBX.s page 13
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
@@ -778,7 +778,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
398 0168 4FEA8E0E lsl lr, lr, #2
242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03)));
399 .loc 1 242 36 view .LVU163
- ARM GAS /tmp/cc6OeYuT.s page 14
+ ARM GAS /tmp/cclpnSBX.s page 14
400 016c 0F22 movs r2, #15
@@ -838,7 +838,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
442 .loc 1 243 29 discriminator 17 view .LVU175
443 01be 02F58062 add r2, r2, #1024
444 01c2 9042 cmp r0, r2
- ARM GAS /tmp/cc6OeYuT.s page 15
+ ARM GAS /tmp/cclpnSBX.s page 15
445 01c4 3FF44EAF beq .L30
@@ -898,7 +898,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** }
486 .loc 1 282 1 view .LVU186
487 01ec 02B0 add sp, sp, #8
- ARM GAS /tmp/cc6OeYuT.s page 16
+ ARM GAS /tmp/cclpnSBX.s page 16
488 .LCFI2:
@@ -958,7 +958,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
297:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Check the parameters */
299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
- ARM GAS /tmp/cc6OeYuT.s page 17
+ ARM GAS /tmp/cclpnSBX.s page 17
530 .loc 1 299 3 view .LVU193
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Clear Rising Falling edge configuration */
321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->FTSR &= ~((uint32_t)iocurrent);
- ARM GAS /tmp/cc6OeYuT.s page 18
+ ARM GAS /tmp/cclpnSBX.s page 18
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->RTSR &= ~((uint32_t)iocurrent);
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
600 0054 24EA0202 bic r2, r4, r2
601 .LVL54:
602 .loc 1 339 22 view .LVU219
- ARM GAS /tmp/cc6OeYuT.s page 19
+ ARM GAS /tmp/cclpnSBX.s page 19
603 0058 4260 str r2, [r0, #4]
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
641 .loc 1 313 50 is_stmt 0 view .LVU235
642 0084 03F0030C and ip, r3, #3
313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** if (tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))))
- ARM GAS /tmp/cc6OeYuT.s page 20
+ ARM GAS /tmp/cclpnSBX.s page 20
643 .loc 1 313 38 view .LVU236
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
685 00d2 05F58065 add r5, r5, #1024
686 00d6 A842 cmp r0, r5
687 00d8 13D0 beq .L47
- ARM GAS /tmp/cc6OeYuT.s page 21
+ ARM GAS /tmp/cclpnSBX.s page 21
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** {
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
730 0106 104C ldr r4, .L56+8
731 .LVL61:
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** EXTI->EMR &= ~((uint32_t)iocurrent);
- ARM GAS /tmp/cc6OeYuT.s page 22
+ ARM GAS /tmp/cclpnSBX.s page 22
732 .loc 1 317 13 view .LVU261
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** }
345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** }
770 .loc 1 345 1 view .LVU277
- ARM GAS /tmp/cc6OeYuT.s page 23
+ ARM GAS /tmp/cclpnSBX.s page 23
771 013c F0BD pop {r4, r5, r6, r7, pc}
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** {
802 .loc 1 371 1 is_stmt 1 view -0
803 .cfi_startproc
- ARM GAS /tmp/cc6OeYuT.s page 24
+ ARM GAS /tmp/cclpnSBX.s page 24
804 @ args = 0, pretend = 0, frame = 0
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * @note This function uses GPIOx_BSRR register to allow atomic read/modify
392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * accesses. In this way, there is no risk of an IRQ occurring between
393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** * the read and the modify access.
- ARM GAS /tmp/cc6OeYuT.s page 25
+ ARM GAS /tmp/cclpnSBX.s page 25
394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** *
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
871 .thumb
872 .thumb_func
874 HAL_GPIO_TogglePin:
- ARM GAS /tmp/cc6OeYuT.s page 26
+ ARM GAS /tmp/cclpnSBX.s page 26
875 .LVL72:
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
910 HAL_GPIO_LockPin:
911 .LVL75:
912 .LFB146:
- ARM GAS /tmp/cc6OeYuT.s page 27
+ ARM GAS /tmp/cclpnSBX.s page 27
440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
940 .loc 1 466 15 is_stmt 0 view .LVU324
941 0014 019B ldr r3, [sp, #4]
942 0016 C361 str r3, [r0, #28]
- ARM GAS /tmp/cc6OeYuT.s page 28
+ ARM GAS /tmp/cclpnSBX.s page 28
467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* Read LCKR register. This read is mandatory to complete key lock sequence */
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
984 HAL_GPIO_EXTI_Callback:
985 .LVL79:
986 .LFB148:
- ARM GAS /tmp/cc6OeYuT.s page 29
+ ARM GAS /tmp/cclpnSBX.s page 29
480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc6OeYuT.s page 1
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_gpio.c **** /* EXTI line interrupt detected */
1012 .loc 1 487 1 is_stmt 0 view .LVU339
1013 0000 08B5 push {r3, lr}
- ARM GAS /tmp/cc6OeYuT.s page 30
+ ARM GAS /tmp/cclpnSBX.s page 30
1014 .LCFI9:
@@ -1786,29 +1786,29 @@ ARM GAS /tmp/cc6OeYuT.s page 1
1050 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
1051 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
1052 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- ARM GAS /tmp/cc6OeYuT.s page 31
+ ARM GAS /tmp/cclpnSBX.s page 31
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_gpio.c
- /tmp/cc6OeYuT.s:20 .text.HAL_GPIO_Init:00000000 $t
- /tmp/cc6OeYuT.s:26 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init
- /tmp/cc6OeYuT.s:505 .text.HAL_GPIO_Init:000001f4 $d
- /tmp/cc6OeYuT.s:513 .text.HAL_GPIO_DeInit:00000000 $t
- /tmp/cc6OeYuT.s:519 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit
- /tmp/cc6OeYuT.s:786 .text.HAL_GPIO_DeInit:00000140 $d
- /tmp/cc6OeYuT.s:793 .text.HAL_GPIO_ReadPin:00000000 $t
- /tmp/cc6OeYuT.s:799 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin
- /tmp/cc6OeYuT.s:832 .text.HAL_GPIO_WritePin:00000000 $t
- /tmp/cc6OeYuT.s:838 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin
- /tmp/cc6OeYuT.s:868 .text.HAL_GPIO_TogglePin:00000000 $t
- /tmp/cc6OeYuT.s:874 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin
- /tmp/cc6OeYuT.s:904 .text.HAL_GPIO_LockPin:00000000 $t
- /tmp/cc6OeYuT.s:910 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin
- /tmp/cc6OeYuT.s:978 .text.HAL_GPIO_EXTI_Callback:00000000 $t
- /tmp/cc6OeYuT.s:984 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback
- /tmp/cc6OeYuT.s:999 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t
- /tmp/cc6OeYuT.s:1005 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler
- /tmp/cc6OeYuT.s:1042 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d
+ /tmp/cclpnSBX.s:20 .text.HAL_GPIO_Init:00000000 $t
+ /tmp/cclpnSBX.s:26 .text.HAL_GPIO_Init:00000000 HAL_GPIO_Init
+ /tmp/cclpnSBX.s:505 .text.HAL_GPIO_Init:000001f4 $d
+ /tmp/cclpnSBX.s:513 .text.HAL_GPIO_DeInit:00000000 $t
+ /tmp/cclpnSBX.s:519 .text.HAL_GPIO_DeInit:00000000 HAL_GPIO_DeInit
+ /tmp/cclpnSBX.s:786 .text.HAL_GPIO_DeInit:00000140 $d
+ /tmp/cclpnSBX.s:793 .text.HAL_GPIO_ReadPin:00000000 $t
+ /tmp/cclpnSBX.s:799 .text.HAL_GPIO_ReadPin:00000000 HAL_GPIO_ReadPin
+ /tmp/cclpnSBX.s:832 .text.HAL_GPIO_WritePin:00000000 $t
+ /tmp/cclpnSBX.s:838 .text.HAL_GPIO_WritePin:00000000 HAL_GPIO_WritePin
+ /tmp/cclpnSBX.s:868 .text.HAL_GPIO_TogglePin:00000000 $t
+ /tmp/cclpnSBX.s:874 .text.HAL_GPIO_TogglePin:00000000 HAL_GPIO_TogglePin
+ /tmp/cclpnSBX.s:904 .text.HAL_GPIO_LockPin:00000000 $t
+ /tmp/cclpnSBX.s:910 .text.HAL_GPIO_LockPin:00000000 HAL_GPIO_LockPin
+ /tmp/cclpnSBX.s:978 .text.HAL_GPIO_EXTI_Callback:00000000 $t
+ /tmp/cclpnSBX.s:984 .text.HAL_GPIO_EXTI_Callback:00000000 HAL_GPIO_EXTI_Callback
+ /tmp/cclpnSBX.s:999 .text.HAL_GPIO_EXTI_IRQHandler:00000000 $t
+ /tmp/cclpnSBX.s:1005 .text.HAL_GPIO_EXTI_IRQHandler:00000000 HAL_GPIO_EXTI_IRQHandler
+ /tmp/cclpnSBX.s:1042 .text.HAL_GPIO_EXTI_IRQHandler:00000018 $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_i2c.lst b/build/stm32f7xx_hal_i2c.lst
index 23beea8..512637a 100644
--- a/build/stm32f7xx_hal_i2c.lst
+++ b/build/stm32f7xx_hal_i2c.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccloipGv.s page 1
+ARM GAS /tmp/cckyvfTO.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccloipGv.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (#) Declare a I2C_HandleTypeDef handle structure, for example:
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_HandleTypeDef hi2c;
- ARM GAS /tmp/ccloipGv.s page 2
+ ARM GAS /tmp/cckyvfTO.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_SlaveTxCpltCallback() is executed and users can
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_SlaveTxCpltCallback()
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) Receive in slave mode an amount of data in non-blocking mode using HAL_I2C_Slave_Receive_
- ARM GAS /tmp/ccloipGv.s page 3
+ ARM GAS /tmp/cckyvfTO.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At reception end of transfer, HAL_I2C_SlaveRxCpltCallback() is executed and users can
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_IT
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Transmit_DMA
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** or HAL_I2C_Master_Seq_Receive_DMA
- ARM GAS /tmp/ccloipGv.s page 4
+ ARM GAS /tmp/cckyvfTO.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** with option I2C_FIRST_FRAME then I2C_OTHER_FRAME.
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_Master_Transmit_DMA()
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) At transmission end of transfer, HAL_I2C_MasterTxCpltCallback() is executed and users can
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** add their own code by customization of function pointer HAL_I2C_MasterTxCpltCallback()
- ARM GAS /tmp/ccloipGv.s page 5
+ ARM GAS /tmp/cckyvfTO.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) Receive in master mode an amount of data in non-blocking mode (DMA) using
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to register an interrupt callback.
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..]
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** Function HAL_I2C_RegisterCallback() allows to register following callbacks:
- ARM GAS /tmp/ccloipGv.s page 6
+ ARM GAS /tmp/cckyvfTO.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (+) MasterTxCpltCallback : callback for Master transmission end of transfer.
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** are set to the corresponding weak functions.
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..]
- ARM GAS /tmp/ccloipGv.s page 7
+ ARM GAS /tmp/cckyvfTO.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (@) You can refer to the I2C HAL driver header file for more useful macros
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE))
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /*!< Slave Busy TX, combinaison of State LSB and Mode enum */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #define I2C_STATE_SLAVE_BUSY_RX ((uint32_t)(((uint32_t)HAL_I2C_STATE_BUSY_RX & I2C_STATE_MSK) | \
- ARM GAS /tmp/ccloipGv.s page 8
+ ARM GAS /tmp/cckyvfTO.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)HAL_I2C_MODE_SLAVE))
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Private functions to handle IT transfer */
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags);
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITMasterSeqCplt(I2C_HandleTypeDef *hi2c);
- ARM GAS /tmp/ccloipGv.s page 9
+ ARM GAS /tmp/cckyvfTO.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITSlaveSeqCplt(I2C_HandleTypeDef *hi2c);
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Private function to Convert Specific options */
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c);
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
- ARM GAS /tmp/ccloipGv.s page 10
+ ARM GAS /tmp/cckyvfTO.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @}
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
- ARM GAS /tmp/ccloipGv.s page 11
+ ARM GAS /tmp/cckyvfTO.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_OWN_ADDRESS1(hi2c->Init.OwnAddress1));
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1);
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 12
+ ARM GAS /tmp/cckyvfTO.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else /* I2C_ADDRESSINGMODE_10BIT */
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */
- ARM GAS /tmp/ccloipGv.s page 13
+ ARM GAS /tmp/cckyvfTO.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance));
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prevent unused argument(s) compilation warning */
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(hi2c);
- ARM GAS /tmp/ccloipGv.s page 14
+ ARM GAS /tmp/cckyvfTO.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_SLAVE_TX_COMPLETE_CB_ID :
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->SlaveTxCpltCallback = pCallback;
- ARM GAS /tmp/ccloipGv.s page 15
+ ARM GAS /tmp/cckyvfTO.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break;
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** default :
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update the error code */
- ARM GAS /tmp/ccloipGv.s page 16
+ ARM GAS /tmp/cckyvfTO.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_INVALID_CALLBACK;
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_MASTER_RX_COMPLETE_CB_ID :
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MasterRxCpltCallback = HAL_I2C_MasterRxCpltCallback; /* Legacy weak MasterRxCpltCallb
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break;
- ARM GAS /tmp/ccloipGv.s page 17
+ ARM GAS /tmp/cckyvfTO.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** case HAL_I2C_MSPDEINIT_CB_ID :
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MspDeInitCallback = HAL_I2C_MspDeInit; /* Legacy weak MspDeInit
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** break;
- ARM GAS /tmp/ccloipGv.s page 18
+ ARM GAS /tmp/cckyvfTO.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return status;
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 19
+ ARM GAS /tmp/cckyvfTO.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (#) Blocking mode functions are :
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (++) HAL_I2C_Master_Transmit()
- ARM GAS /tmp/ccloipGv.s page 20
+ ARM GAS /tmp/cckyvfTO.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (++) HAL_I2C_Master_Receive()
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param pData Pointer to data buffer
- ARM GAS /tmp/ccloipGv.s page 21
+ ARM GAS /tmp/cckyvfTO.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Send Slave Address */
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
- ARM GAS /tmp/ccloipGv.s page 22
+ ARM GAS /tmp/cckyvfTO.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)(hi2c->XferSize + 1U), xfermode,
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 23
+ ARM GAS /tmp/cckyvfTO.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr = pData;
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size;
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL;
- ARM GAS /tmp/ccloipGv.s page 24
+ ARM GAS /tmp/cckyvfTO.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
- ARM GAS /tmp/ccloipGv.s page 25
+ ARM GAS /tmp/cckyvfTO.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until STOPF flag is set */
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX;
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE;
- ARM GAS /tmp/ccloipGv.s page 26
+ ARM GAS /tmp/cckyvfTO.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 27
+ ARM GAS /tmp/cckyvfTO.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until DIR flag is set Transmitter mode */
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Flush TX register */
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Flush_TXDR(hi2c);
- ARM GAS /tmp/ccloipGv.s page 28
+ ARM GAS /tmp/cckyvfTO.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tickstart;
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY)
- ARM GAS /tmp/ccloipGv.s page 29
+ ARM GAS /tmp/cckyvfTO.s page 29
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Read data from RXDR */
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR;
- ARM GAS /tmp/ccloipGv.s page 30
+ ARM GAS /tmp/cckyvfTO.s page 30
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 31
+ ARM GAS /tmp/cckyvfTO.s page 31
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++;
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 32
+ ARM GAS /tmp/cckyvfTO.s page 32
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--;
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
- ARM GAS /tmp/ccloipGv.s page 33
+ ARM GAS /tmp/cckyvfTO.s page 33
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size)
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 34
+ ARM GAS /tmp/cckyvfTO.s page 34
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY)
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Receive in slave mode an amount of data in non-blocking mode with Interrupt
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- ARM GAS /tmp/ccloipGv.s page 35
+ ARM GAS /tmp/cckyvfTO.s page 35
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C.
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent
1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval HAL status
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
- ARM GAS /tmp/ccloipGv.s page 36
+ ARM GAS /tmp/cckyvfTO.s page 36
1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->hdmatx != NULL)
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */
- ARM GAS /tmp/ccloipGv.s page 37
+ ARM GAS /tmp/cckyvfTO.s page 37
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmatx->XferCpltCallback = I2C_DMAMasterTransmitCplt;
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C error code */
- ARM GAS /tmp/ccloipGv.s page 38
+ ARM GAS /tmp/cckyvfTO.s page 38
2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY)
2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 39
+ ARM GAS /tmp/cckyvfTO.s page 39
2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) == SET)
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA_PARAM;
2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
- ARM GAS /tmp/ccloipGv.s page 40
+ ARM GAS /tmp/cckyvfTO.s page 40
2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c);
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Note : The I2C interrupts must be enabled after unlocking current process
2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current
2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */
- ARM GAS /tmp/ccloipGv.s page 41
+ ARM GAS /tmp/cckyvfTO.s page 41
2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, RXI interrupt */
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */
2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++;
- ARM GAS /tmp/ccloipGv.s page 42
+ ARM GAS /tmp/cckyvfTO.s page 42
2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_TXDMAEN;
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
- ARM GAS /tmp/ccloipGv.s page 43
+ ARM GAS /tmp/cckyvfTO.s page 43
2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
- ARM GAS /tmp/ccloipGv.s page 44
+ ARM GAS /tmp/cckyvfTO.s page 44
2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */
2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, STOP, NACK, ADDR interrupts */
2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_LISTEN_IT);
- ARM GAS /tmp/ccloipGv.s page 45
+ ARM GAS /tmp/cckyvfTO.s page 45
2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
- ARM GAS /tmp/ccloipGv.s page 46
+ ARM GAS /tmp/cckyvfTO.s page 46
2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
- ARM GAS /tmp/ccloipGv.s page 47
+ ARM GAS /tmp/cckyvfTO.s page 47
2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value
2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface
2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address
- ARM GAS /tmp/ccloipGv.s page 48
+ ARM GAS /tmp/cckyvfTO.s page 48
2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 1U;
2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE,
2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_READ);
- ARM GAS /tmp/ccloipGv.s page 49
+ ARM GAS /tmp/cckyvfTO.s page 49
2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */
2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
- ARM GAS /tmp/ccloipGv.s page 50
+ ARM GAS /tmp/cckyvfTO.s page 50
2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prepare transfer parameters */
2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 0U;
- ARM GAS /tmp/ccloipGv.s page 51
+ ARM GAS /tmp/cckyvfTO.s page 51
2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr = pData;
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address
2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address
2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param pData Pointer to data buffer
- ARM GAS /tmp/ccloipGv.s page 52
+ ARM GAS /tmp/cckyvfTO.s page 52
2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Size Amount of data to be sent
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Send Slave Address and Memory Address */
2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_
2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 53
+ ARM GAS /tmp/cckyvfTO.s page 53
2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 54
+ ARM GAS /tmp/cckyvfTO.s page 54
2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_BUSY_TX;
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3050:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 55
+ ARM GAS /tmp/cckyvfTO.s page 55
3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C state */
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Reads an amount of data in non-blocking mode with DMA from a specific memory address.
3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C.
- ARM GAS /tmp/ccloipGv.s page 56
+ ARM GAS /tmp/cckyvfTO.s page 56
3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Prefetch Memory Address */
3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress);
- ARM GAS /tmp/ccloipGv.s page 57
+ ARM GAS /tmp/cckyvfTO.s page 57
3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** to avoid the risk of I2C interrupt handle execution before current
3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** process unlock */
3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable ERR, TC, STOP, NACK, TXI interrupt */
- ARM GAS /tmp/ccloipGv.s page 58
+ ARM GAS /tmp/cckyvfTO.s page 58
3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* possible to enable all of these */
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
- ARM GAS /tmp/ccloipGv.s page 59
+ ARM GAS /tmp/cckyvfTO.s page 59
3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c);
- ARM GAS /tmp/ccloipGv.s page 60
+ ARM GAS /tmp/cckyvfTO.s page 60
3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode;
3393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U;
- ARM GAS /tmp/ccloipGv.s page 61
+ ARM GAS /tmp/cckyvfTO.s page 61
3395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
3450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */
- ARM GAS /tmp/ccloipGv.s page 62
+ ARM GAS /tmp/cckyvfTO.s page 62
3452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_ConvertOtherXferOptions(hi2c);
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode;
3507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_WRITE;
3508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus;
- ARM GAS /tmp/ccloipGv.s page 63
+ ARM GAS /tmp/cckyvfTO.s page 63
3509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U;
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
3564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
3565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 64
+ ARM GAS /tmp/cckyvfTO.s page 64
3566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Convert OTHER_xxx XferOptions if any */
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3621:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update XferCount value */
3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize;
- ARM GAS /tmp/ccloipGv.s page 65
+ ARM GAS /tmp/cckyvfTO.s page 65
3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Enable_IRQ(hi2c, I2C_XFER_TX_IT);
3678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
3679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 66
+ ARM GAS /tmp/cckyvfTO.s page 66
3680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_OK;
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
3735:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* If transfer direction not change and there is no request to start another frame,
- ARM GAS /tmp/ccloipGv.s page 67
+ ARM GAS /tmp/cckyvfTO.s page 67
3737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** do not generate Restart Condition */
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xferrequest = I2C_GENERATE_START_READ;
3792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus;
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 68
+ ARM GAS /tmp/cckyvfTO.s page 68
3794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the I2C DMA transfer complete callback */
3849:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferCpltCallback = I2C_DMAMasterReceiveCplt;
3850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 69
+ ARM GAS /tmp/cckyvfTO.s page 69
3851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set the DMA error callback */
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c);
- ARM GAS /tmp/ccloipGv.s page 70
+ ARM GAS /tmp/cckyvfTO.s page 70
3908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (((uint32_t)hi2c->State & (uint32_t)HAL_I2C_STATE_LISTEN) == (uint32_t)HAL_I2C_STATE_LISTEN)
3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U))
- ARM GAS /tmp/ccloipGv.s page 71
+ ARM GAS /tmp/cckyvfTO.s page 71
3965:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((I2C_GET_DIR(hi2c) == I2C_DIRECTION_RECEIVE) && (tmp != RESET))
4020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */
- ARM GAS /tmp/ccloipGv.s page 72
+ ARM GAS /tmp/cckyvfTO.s page 72
4022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
4078:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* and then toggle the HAL slave RX state to TX state */
- ARM GAS /tmp/ccloipGv.s page 73
+ ARM GAS /tmp/cckyvfTO.s page 73
4079:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX_LISTEN)
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
4134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable Address Acknowledge */
- ARM GAS /tmp/ccloipGv.s page 74
+ ARM GAS /tmp/cckyvfTO.s page 74
4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Update I2C error code */
4191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
4192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 75
+ ARM GAS /tmp/cckyvfTO.s page 75
4193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((pData == NULL) || (Size == 0U))
4249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 76
+ ARM GAS /tmp/cckyvfTO.s page 76
4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM;
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear ADDR flag after prepare the transfer parameters */
4306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* This action will generate an acknowledge to the Master */
- ARM GAS /tmp/ccloipGv.s page 77
+ ARM GAS /tmp/cckyvfTO.s page 77
4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ADDR);
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* I2C cannot manage full duplex exchange so disable previous IT enabled if any */
4362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* and then toggle the HAL slave TX state to RX state */
4363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
- ARM GAS /tmp/ccloipGv.s page 78
+ ARM GAS /tmp/cckyvfTO.s page 78
4364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable Address Acknowledge */
4420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 &= ~I2C_CR2_NACK;
- ARM GAS /tmp/ccloipGv.s page 79
+ ARM GAS /tmp/cckyvfTO.s page 79
4421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_DMA;
4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
- ARM GAS /tmp/ccloipGv.s page 80
+ ARM GAS /tmp/cckyvfTO.s page 80
4478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c);
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
4533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
4534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 81
+ ARM GAS /tmp/cckyvfTO.s page 81
4535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
4590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_Disable_IRQ(hi2c, I2C_XFER_RX_IT);
- ARM GAS /tmp/ccloipGv.s page 82
+ ARM GAS /tmp/cckyvfTO.s page 82
4592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4647:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR(hi2c, itflags, itsources);
4648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 83
+ ARM GAS /tmp/cckyvfTO.s page 83
4649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
4704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Master Tx Transfer completed callback.
4705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- ARM GAS /tmp/ccloipGv.s page 84
+ ARM GAS /tmp/cckyvfTO.s page 84
4706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C.
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4761:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* NOTE : This function should not be modified, when the callback is needed,
4762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** the HAL_I2C_SlaveRxCpltCallback could be implemented in the user file
- ARM GAS /tmp/ccloipGv.s page 85
+ ARM GAS /tmp/cckyvfTO.s page 85
4763:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
4819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Memory Rx Transfer completed callback.
- ARM GAS /tmp/ccloipGv.s page 86
+ ARM GAS /tmp/cckyvfTO.s page 86
4820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** ===============================================================================
4875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** ##### Peripheral State, Mode and Error functions #####
4876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** ===============================================================================
- ARM GAS /tmp/ccloipGv.s page 87
+ ARM GAS /tmp/cckyvfTO.s page 87
4877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** [..]
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
4932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with Interrupt.
4933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
- ARM GAS /tmp/ccloipGv.s page 88
+ ARM GAS /tmp/cckyvfTO.s page 88
4934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C.
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++;
4989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
- ARM GAS /tmp/ccloipGv.s page 89
+ ARM GAS /tmp/cckyvfTO.s page 89
4991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--;
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TC) != RESET) && \
5046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
5047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 90
+ ARM GAS /tmp/cckyvfTO.s page 90
5048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferCount == 0U)
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags;
5103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Locked */
- ARM GAS /tmp/ccloipGv.s page 91
+ ARM GAS /tmp/cckyvfTO.s page 91
5105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_LOCK(hi2c);
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_TCR) != RESET) && \
5160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
5161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 92
+ ARM GAS /tmp/cckyvfTO.s page 92
5162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U))
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
5217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */
- ARM GAS /tmp/ccloipGv.s page 93
+ ARM GAS /tmp/cckyvfTO.s page 93
5219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize,
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \
5274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_NACKI) != RESET))
5275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 94
+ ARM GAS /tmp/cckyvfTO.s page 94
5276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check that I2C transfer finished */
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Increment Buffer pointer */
5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->pBuffPtr++;
- ARM GAS /tmp/ccloipGv.s page 95
+ ARM GAS /tmp/cckyvfTO.s page 95
5333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
5388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
- ARM GAS /tmp/ccloipGv.s page 96
+ ARM GAS /tmp/cckyvfTO.s page 96
5390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode with DMA.
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = MAX_NBYTE_SIZE;
5445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
5446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** xfermode = I2C_RELOAD_MODE;
- ARM GAS /tmp/ccloipGv.s page 97
+ ARM GAS /tmp/cckyvfTO.s page 97
5447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions == I2C_NO_OPTION_FRAME)
5502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
5503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Generate Stop */
- ARM GAS /tmp/ccloipGv.s page 98
+ ARM GAS /tmp/cckyvfTO.s page 98
5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR2 |= I2C_CR2_STOP;
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Set corresponding Error Code */
5560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
- ARM GAS /tmp/ccloipGv.s page 99
+ ARM GAS /tmp/cckyvfTO.s page 99
5561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable DMA Request */
5616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
5617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 100
+ ARM GAS /tmp/cckyvfTO.s page 100
5618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Instance->CR1 |= I2C_CR1_RXDMAEN;
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount -= hi2c->XferSize;
5673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Enable DMA Request */
- ARM GAS /tmp/ccloipGv.s page 101
+ ARM GAS /tmp/cckyvfTO.s page 101
5675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_RX)
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check that I2C transfer finished */
5730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* if yes, normal use case, a NACK is sent by the MASTER when Transfer is finished */
5731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Mean XferCount == 0 */
- ARM GAS /tmp/ccloipGv.s page 102
+ ARM GAS /tmp/cckyvfTO.s page 102
5732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* So clear Flag NACKF only */
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5786:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
5787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
5788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 103
+ ARM GAS /tmp/cckyvfTO.s page 103
5789:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
5844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * the configuration information for the specified I2C.
5845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value
- ARM GAS /tmp/ccloipGv.s page 104
+ ARM GAS /tmp/cckyvfTO.s page 104
5846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param DevAddress Target device address: The device 7 bits address value
5901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * in datasheet must be shifted to the left before calling the interface
5902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddress Internal memory address
- ARM GAS /tmp/ccloipGv.s page 105
+ ARM GAS /tmp/cckyvfTO.s page 105
5903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param MemAddSize Size of internal memory address
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_ITAddrCplt(I2C_HandleTypeDef *hi2c, uint32_t ITFlags)
5958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
5959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint8_t transferdirection;
- ARM GAS /tmp/ccloipGv.s page 106
+ ARM GAS /tmp/cckyvfTO.s page 106
5960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t slaveaddrcode;
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #else
6015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_AddrCallback(hi2c, transferdirection, slaveaddrcode);
6016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- ARM GAS /tmp/ccloipGv.s page 107
+ ARM GAS /tmp/cckyvfTO.s page 107
6017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */
6072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1)
6073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->MasterTxCpltCallback(hi2c);
- ARM GAS /tmp/ccloipGv.s page 108
+ ARM GAS /tmp/cckyvfTO.s page 108
6074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #else
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_BUSY_TX_LISTEN)
6129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
6130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Remove HAL_I2C_STATE_SLAVE_BUSY_TX, keep only HAL_I2C_STATE_LISTEN */
- ARM GAS /tmp/ccloipGv.s page 109
+ ARM GAS /tmp/cckyvfTO.s page 109
6131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_LISTEN;
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear STOP Flag */
6186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF);
6187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 110
+ ARM GAS /tmp/cckyvfTO.s page 110
6188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Disable Interrupts and Store Previous state */
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY;
6244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE;
- ARM GAS /tmp/ccloipGv.s page 111
+ ARM GAS /tmp/cckyvfTO.s page 111
6245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Process Unlocked */
6300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** __HAL_UNLOCK(hi2c);
6301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 112
+ ARM GAS /tmp/cckyvfTO.s page 112
6302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear Configuration Register 2 */
6357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_RESET_CR2(hi2c);
6358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 113
+ ARM GAS /tmp/cckyvfTO.s page 113
6359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Flush TX register */
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if ((I2C_CHECK_FLAG(tmpITFlags, I2C_FLAG_AF) != RESET) && \
6415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(tmpcr1value, I2C_IT_NACKI) != RESET))
- ARM GAS /tmp/ccloipGv.s page 114
+ ARM GAS /tmp/cckyvfTO.s page 114
6416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the corresponding callback to inform upper layer of End of Transfer */
6471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_ITError(hi2c, hi2c->ErrorCode);
6472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 115
+ ARM GAS /tmp/cckyvfTO.s page 115
6473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call the Listen Complete callback, to inform upper layer of the end of Listen usecase */
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_I2C_SlaveTxCpltCallback(hi2c);
6528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
6529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 116
+ ARM GAS /tmp/cckyvfTO.s page 116
6530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief I2C interrupts error process.
6585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c I2C handle.
6586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param ErrorCode Error code to handle.
- ARM GAS /tmp/ccloipGv.s page 117
+ ARM GAS /tmp/cckyvfTO.s page 117
6587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 118
+ ARM GAS /tmp/cckyvfTO.s page 118
6644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL;
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (HAL_DMA_Abort_IT(hi2c->hdmarx) != HAL_OK)
6699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
6700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Call Directly hi2c->hdmarx->XferAbortCallback function in case of error */
- ARM GAS /tmp/ccloipGv.s page 119
+ ARM GAS /tmp/cckyvfTO.s page 119
6701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback(hi2c->hdmarx);
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hi2c I2C handle.
6756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None
6757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
- ARM GAS /tmp/ccloipGv.s page 120
+ ARM GAS /tmp/cckyvfTO.s page 120
6758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c)
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
69 .LVL1:
70 .LFB218:
6773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 121
+ ARM GAS /tmp/cckyvfTO.s page 121
6774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None
6829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
6830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static void I2C_DMASlaveTransmitCplt(DMA_HandleTypeDef *hdma)
- ARM GAS /tmp/ccloipGv.s page 122
+ ARM GAS /tmp/cckyvfTO.s page 122
6831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = 1U;
6886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** else
- ARM GAS /tmp/ccloipGv.s page 123
+ ARM GAS /tmp/cckyvfTO.s page 123
6888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /**
6943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @brief DMA I2C communication error callback.
6944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param hdma DMA handle
- ARM GAS /tmp/ccloipGv.s page 124
+ ARM GAS /tmp/cckyvfTO.s page 124
6945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @retval None
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL;
7000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
7001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 125
+ ARM GAS /tmp/cckyvfTO.s page 125
7002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TreatErrorCallback(hi2c);
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** */
7057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout,
7058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t Tickstart)
- ARM GAS /tmp/ccloipGv.s page 126
+ ARM GAS /tmp/cckyvfTO.s page 126
7059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT;
7115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY;
- ARM GAS /tmp/ccloipGv.s page 127
+ ARM GAS /tmp/cckyvfTO.s page 127
7116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Clear Configuration Register 2 */
7171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_RESET_CR2(hi2c);
7172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 128
+ ARM GAS /tmp/cckyvfTO.s page 128
7173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY;
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Wait until STOP Flag is set or timeout occurred */
7228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* AutoEnd should be initiate after AF */
7229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK))
- ARM GAS /tmp/ccloipGv.s page 129
+ ARM GAS /tmp/cckyvfTO.s page 129
7230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR))
7285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** error_code |= HAL_I2C_ERROR_BERR;
- ARM GAS /tmp/ccloipGv.s page 130
+ ARM GAS /tmp/cckyvfTO.s page 130
7287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @param Mode New state of the I2C START condition generation.
7342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * This parameter can be one of the following values:
7343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @arg @ref I2C_RELOAD_MODE Enable Reload mode .
- ARM GAS /tmp/ccloipGv.s page 131
+ ARM GAS /tmp/cckyvfTO.s page 131
7344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** * @arg @ref I2C_AUTOEND_MODE Enable Automatic end mode.
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
98 .loc 1 7368 3 is_stmt 1 view .LVU22
99 0014 0268 ldr r2, [r0]
100 .LVL4:
- ARM GAS /tmp/ccloipGv.s page 132
+ ARM GAS /tmp/cckyvfTO.s page 132
101 .loc 1 7368 3 is_stmt 0 view .LVU23
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
140 .loc 1 7385 3 view .LVU29
141 .loc 1 7385 12 is_stmt 0 view .LVU30
142 0000 436B ldr r3, [r0, #52]
- ARM GAS /tmp/ccloipGv.s page 133
+ ARM GAS /tmp/cckyvfTO.s page 133
143 .loc 1 7385 6 view .LVU31
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
177 .loc 1 7404 14 is_stmt 0 view .LVU44
178 002c 43F0F403 orr r3, r3, #244
179 .LVL10:
- ARM GAS /tmp/ccloipGv.s page 134
+ ARM GAS /tmp/cckyvfTO.s page 134
180 .L10:
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
212 .loc 1 7422 8 is_stmt 0 view .LVU57
213 0048 11F4004F tst r1, #32768
214 004c 15D1 bne .L19
- ARM GAS /tmp/ccloipGv.s page 135
+ ARM GAS /tmp/cckyvfTO.s page 135
7383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
244 0068 2029 cmp r1, #32
245 006a 0BD0 beq .L22
246 .L17:
- ARM GAS /tmp/ccloipGv.s page 136
+ ARM GAS /tmp/cckyvfTO.s page 136
7447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
278 .loc 1 7449 14 is_stmt 0 view .LVU82
279 0084 43F06003 orr r3, r3, #96
280 .LVL24:
- ARM GAS /tmp/ccloipGv.s page 137
+ ARM GAS /tmp/cckyvfTO.s page 137
7449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7479:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** tmpisr |= I2C_IT_TCI | I2C_IT_TXI;
318 .loc 1 7479 5 is_stmt 1 view .LVU91
319 .LVL27:
- ARM GAS /tmp/ccloipGv.s page 138
+ ARM GAS /tmp/cckyvfTO.s page 138
7480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
355 .loc 1 7496 7 is_stmt 1 view .LVU105
356 .loc 1 7496 14 is_stmt 0 view .LVU106
357 0032 43F0F403 orr r3, r3, #244
- ARM GAS /tmp/ccloipGv.s page 139
+ ARM GAS /tmp/cckyvfTO.s page 139
358 .LVL31:
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
381 0048 0168 ldr r1, [r0]
382 .LVL32:
383 .loc 1 7527 3 is_stmt 0 view .LVU116
- ARM GAS /tmp/ccloipGv.s page 140
+ ARM GAS /tmp/cckyvfTO.s page 140
384 004a 0A68 ldr r2, [r1]
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
424 006e EBE7 b .L32
425 .cfi_endproc
426 .LFE220:
- ARM GAS /tmp/ccloipGv.s page 141
+ ARM GAS /tmp/cckyvfTO.s page 141
428 .section .text.I2C_ConvertOtherXferOptions,"ax",%progbits
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
455 .loc 1 7556 1 view .LVU139
456 000e 7047 bx lr
457 .L44:
- ARM GAS /tmp/ccloipGv.s page 142
+ ARM GAS /tmp/cckyvfTO.s page 142
7542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
503 .loc 1 7216 12 view .LVU151
504 0008 9E69 ldr r6, [r3, #24]
505 .LVL43:
- ARM GAS /tmp/ccloipGv.s page 143
+ ARM GAS /tmp/cckyvfTO.s page 143
7217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tickstart = Tickstart;
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
542 002c F6D0 beq .L49
7234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
543 .loc 1 7234 9 is_stmt 1 view .LVU170
- ARM GAS /tmp/ccloipGv.s page 144
+ ARM GAS /tmp/cckyvfTO.s page 144
7234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
582 .loc 1 7241 38 view .LVU186
583 005a 02B9 cbnz r2, .L53
584 005c 73B9 cbnz r3, .L65
- ARM GAS /tmp/ccloipGv.s page 145
+ ARM GAS /tmp/cckyvfTO.s page 145
585 .LVL52:
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
622 .loc 1 7248 25 is_stmt 0 view .LVU204
623 0084 FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccloipGv.s page 146
+ ARM GAS /tmp/cckyvfTO.s page 146
624 .LVL56:
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
662 .loc 1 7289 5 is_stmt 1 view .LVU221
663 00a6 4FF48071 mov r1, #256
- ARM GAS /tmp/ccloipGv.s page 147
+ ARM GAS /tmp/cckyvfTO.s page 147
664 00aa D161 str r1, [r2, #28]
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
703 .loc 1 7313 5 is_stmt 1 view .LVU237
704 .LVL70:
- ARM GAS /tmp/ccloipGv.s page 148
+ ARM GAS /tmp/cckyvfTO.s page 148
7316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
743 0108 2846 mov r0, r5
744 010a BDE8F081 pop {r4, r5, r6, r7, r8, pc}
745 .LVL73:
- ARM GAS /tmp/ccloipGv.s page 149
+ ARM GAS /tmp/cckyvfTO.s page 149
746 .L63:
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
793 0010 22D1 bne .L74
7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
794 .loc 1 7063 5 is_stmt 1 view .LVU263
- ARM GAS /tmp/ccloipGv.s page 150
+ ARM GAS /tmp/cckyvfTO.s page 150
7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
833 .loc 1 7076 11 is_stmt 1 view .LVU279
7076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
834 .loc 1 7076 23 is_stmt 0 view .LVU280
- ARM GAS /tmp/ccloipGv.s page 151
+ ARM GAS /tmp/cckyvfTO.s page 151
835 0044 2023 movs r3, #32
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
879 .cfi_def_cfa_offset 32
880 .cfi_offset 3, -32
881 .cfi_offset 4, -28
- ARM GAS /tmp/ccloipGv.s page 152
+ ARM GAS /tmp/cckyvfTO.s page 152
882 .cfi_offset 5, -24
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
924 .loc 1 7031 27 discriminator 1 view .LVU304
925 0038 A0EB0900 sub r0, r0, r9
7031:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 153
+ ARM GAS /tmp/cckyvfTO.s page 153
926 .loc 1 7031 10 discriminator 1 view .LVU305
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
964 006e 0120 movs r0, #1
965 0070 00E0 b .L77
966 .L83:
- ARM GAS /tmp/ccloipGv.s page 154
+ ARM GAS /tmp/cckyvfTO.s page 154
7046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1016 0014 4FF08073 mov r3, #16777216
1017 0018 EAB2 uxtb r2, r5
1018 .LVL87:
- ARM GAS /tmp/ccloipGv.s page 155
+ ARM GAS /tmp/cckyvfTO.s page 155
5857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1059 .cfi_def_cfa_offset 24
1060 @ sp needed
1061 0048 BDE8F081 pop {r4, r5, r6, r7, r8, pc}
- ARM GAS /tmp/ccloipGv.s page 156
+ ARM GAS /tmp/cckyvfTO.s page 156
1062 .LVL91:
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1102 .L94:
1103 0076 00BF .align 2
1104 .L93:
- ARM GAS /tmp/ccloipGv.s page 157
+ ARM GAS /tmp/cckyvfTO.s page 157
1105 0078 00200080 .word -2147475456
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1154 001e 3146 mov r1, r6
1155 0020 2046 mov r0, r4
1156 0022 FFF7FEFF bl I2C_WaitOnTXISFlagUntilTimeout
- ARM GAS /tmp/ccloipGv.s page 158
+ ARM GAS /tmp/cckyvfTO.s page 158
1157 .LVL97:
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1198 .loc 1 5930 28 view .LVU377
1199 004c 4FEA1822 lsr r2, r8, #8
- ARM GAS /tmp/ccloipGv.s page 159
+ ARM GAS /tmp/cckyvfTO.s page 159
5930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1245 .LVL101:
1246 .LFB215:
7100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET)
- ARM GAS /tmp/ccloipGv.s page 160
+ ARM GAS /tmp/cckyvfTO.s page 160
1247 .loc 1 7100 1 is_stmt 1 view -0
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1289 .loc 1 7104 8 discriminator 1 view .LVU401
1290 0028 B8B9 cbnz r0, .L111
7110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 161
+ ARM GAS /tmp/cckyvfTO.s page 161
1291 .loc 1 7110 5 is_stmt 1 view .LVU402
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1328 .loc 1 7125 10 view .LVU419
1329 0056 0020 movs r0, #0
1330 .L108:
- ARM GAS /tmp/ccloipGv.s page 162
+ ARM GAS /tmp/cckyvfTO.s page 162
7126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1377 .loc 1 7183 25 is_stmt 0 view .LVU429
1378 000c 0023 movs r3, #0
1379 000e 6364 str r3, [r4, #68]
- ARM GAS /tmp/ccloipGv.s page 163
+ ARM GAS /tmp/cckyvfTO.s page 163
1380 .LVL109:
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1417 .loc 1 7196 9 view .LVU446
7198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1418 .loc 1 7198 9 view .LVU447
- ARM GAS /tmp/ccloipGv.s page 164
+ ARM GAS /tmp/cckyvfTO.s page 164
1419 .LVL111:
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1458 0066 9A69 ldr r2, [r3, #24]
7158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1459 .loc 1 7158 9 is_stmt 1 view .LVU463
- ARM GAS /tmp/ccloipGv.s page 165
+ ARM GAS /tmp/cckyvfTO.s page 165
7162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1498 .loc 1 7179 16 is_stmt 0 view .LVU480
1499 00a2 0125 movs r5, #1
- ARM GAS /tmp/ccloipGv.s page 166
+ ARM GAS /tmp/cckyvfTO.s page 166
1500 00a4 B4E7 b .L118
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1549 0002 5DD0 beq .L134
536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the I2C handle allocation */
1550 .loc 1 536 1 view .LVU490
- ARM GAS /tmp/ccloipGv.s page 167
+ ARM GAS /tmp/cckyvfTO.s page 167
1551 0004 10B5 push {r4, lr}
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1587 .loc 1 591 47 view .LVU508
1588 0024 23F07063 bic r3, r3, #251658240
591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 168
+ ARM GAS /tmp/cckyvfTO.s page 168
1589 .loc 1 591 27 view .LVU509
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
619:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1627 .loc 1 619 3 view .LVU526
619:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 169
+ ARM GAS /tmp/cckyvfTO.s page 169
1628 .loc 1 619 7 is_stmt 0 view .LVU527
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1664 .loc 1 631 7 view .LVU545
1665 007c 2268 ldr r2, [r4]
631:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 170
+ ARM GAS /tmp/cckyvfTO.s page 170
1666 .loc 1 631 53 view .LVU546
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1703 .loc 1 600 5 is_stmt 1 view .LVU563
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
1704 .loc 1 600 56 is_stmt 0 view .LVU564
- ARM GAS /tmp/ccloipGv.s page 171
+ ARM GAS /tmp/cckyvfTO.s page 171
1705 00a8 A368 ldr r3, [r4, #8]
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1753 .loc 1 715 3 view .LVU572
720:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
1754 .loc 1 720 1 is_stmt 0 view .LVU573
- ARM GAS /tmp/ccloipGv.s page 172
+ ARM GAS /tmp/cckyvfTO.s page 172
1755 0000 7047 bx lr
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE;
1800 .loc 1 680 3 is_stmt 1 view .LVU585
680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE;
- ARM GAS /tmp/ccloipGv.s page 173
+ ARM GAS /tmp/cckyvfTO.s page 173
1801 .loc 1 680 15 is_stmt 0 view .LVU586
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1844 .loc 1 1121 1 is_stmt 0 view .LVU599
1845 0000 2DE9F047 push {r4, r5, r6, r7, r8, r9, r10, lr}
1846 .LCFI19:
- ARM GAS /tmp/ccloipGv.s page 174
+ ARM GAS /tmp/cckyvfTO.s page 174
1847 .cfi_def_cfa_offset 32
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1888 002e FFF7FEFF bl HAL_GetTick
1889 .LVL132:
1131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 175
+ ARM GAS /tmp/cckyvfTO.s page 175
1890 .loc 1 1131 17 view .LVU613
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
1928 .loc 1 1147 5 is_stmt 1 view .LVU630
1147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 176
+ ARM GAS /tmp/cckyvfTO.s page 176
1929 .loc 1 1147 13 is_stmt 0 view .LVU631
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1966 0088 92B2 uxth r2, r2
1167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
1967 .loc 1 1167 22 view .LVU649
- ARM GAS /tmp/ccloipGv.s page 177
+ ARM GAS /tmp/cckyvfTO.s page 177
1968 008a 013A subs r2, r2, #1
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_WRITE);
2011 .loc 1 1179 7 is_stmt 0 view .LVU661
2012 00c2 0BE0 b .L158
- ARM GAS /tmp/ccloipGv.s page 178
+ ARM GAS /tmp/cckyvfTO.s page 178
2013 .L160:
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2053 00f6 1278 ldrb r2, [r2] @ zero_extendqisi2
1191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2054 .loc 1 1191 28 view .LVU676
- ARM GAS /tmp/ccloipGv.s page 179
+ ARM GAS /tmp/cckyvfTO.s page 179
2055 00f8 9A62 str r2, [r3, #40]
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2094 0128 FFF7FEFF bl I2C_WaitOnFlagUntilTimeout
2095 .LVL145:
1202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 180
+ ARM GAS /tmp/cckyvfTO.s page 180
2096 .loc 1 1202 12 discriminator 1 view .LVU692
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2139 0172 4B60 str r3, [r1, #4]
1235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
2140 .loc 1 1235 5 view .LVU704
- ARM GAS /tmp/ccloipGv.s page 181
+ ARM GAS /tmp/cckyvfTO.s page 181
1235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2182 .L165:
1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
2183 .loc 1 1188 16 view .LVU718
- ARM GAS /tmp/ccloipGv.s page 182
+ ARM GAS /tmp/cckyvfTO.s page 182
2184 0194 0120 movs r0, #1
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2234 .loc 1 1265 11 is_stmt 0 view .LVU725
2235 000a 90F84110 ldrb r1, [r0, #65] @ zero_extendqisi2
- ARM GAS /tmp/ccloipGv.s page 183
+ ARM GAS /tmp/cckyvfTO.s page 183
2236 .LVL155:
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2276 0046 40F08F80 bne .L182
1278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER;
2277 .loc 1 1278 5 is_stmt 1 view .LVU740
- ARM GAS /tmp/ccloipGv.s page 184
+ ARM GAS /tmp/cckyvfTO.s page 184
1278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER;
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2315 007e FFF7FEFF bl I2C_TransferConfig
2316 .LVL161:
2317 0082 18E0 b .L176
- ARM GAS /tmp/ccloipGv.s page 185
+ ARM GAS /tmp/cckyvfTO.s page 185
2318 .L174:
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2360 .loc 1 1305 11 is_stmt 0 view .LVU770
2361 00be 2A46 mov r2, r5
- ARM GAS /tmp/ccloipGv.s page 186
+ ARM GAS /tmp/cckyvfTO.s page 186
2362 00c0 3146 mov r1, r6
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2400 .loc 1 1319 16 is_stmt 0 view .LVU787
2401 00ec 638D ldrh r3, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 187
+ ARM GAS /tmp/cckyvfTO.s page 187
2402 00ee 9BB2 uxth r3, r3
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2443 0126 3146 mov r1, r6
2444 0128 2046 mov r0, r4
2445 012a FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout
- ARM GAS /tmp/ccloipGv.s page 188
+ ARM GAS /tmp/cckyvfTO.s page 188
2446 .LVL167:
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2486 @ sp needed
2487 0160 BDE8F087 pop {r4, r5, r6, r7, r8, r9, r10, pc}
2488 .LVL170:
- ARM GAS /tmp/ccloipGv.s page 189
+ ARM GAS /tmp/cckyvfTO.s page 189
2489 .L181:
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2537 .LCFI27:
2538 .cfi_def_cfa_offset 24
2539 .cfi_offset 4, -24
- ARM GAS /tmp/ccloipGv.s page 190
+ ARM GAS /tmp/cckyvfTO.s page 190
2540 .cfi_offset 5, -20
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2580 .loc 1 1396 17 is_stmt 0 view .LVU837
2581 0032 FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccloipGv.s page 191
+ ARM GAS /tmp/cckyvfTO.s page 191
2582 .LVL175:
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2617 005a 236A ldr r3, [r4, #32]
1411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2618 .loc 1 1411 8 view .LVU857
- ARM GAS /tmp/ccloipGv.s page 192
+ ARM GAS /tmp/cckyvfTO.s page 192
2619 005c B3F5003F cmp r3, #131072
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1469:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
2661 .loc 1 1469 16 is_stmt 0 view .LVU870
2662 0094 628D ldrh r2, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 193
+ ARM GAS /tmp/cckyvfTO.s page 193
2663 0096 92B2 uxth r2, r2
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2702 .L208:
1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
2703 .loc 1 1389 7 is_stmt 1 view .LVU886
- ARM GAS /tmp/ccloipGv.s page 194
+ ARM GAS /tmp/cckyvfTO.s page 194
1389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2742 .loc 1 1427 11 is_stmt 0 view .LVU903
2743 00f2 2268 ldr r2, [r4]
- ARM GAS /tmp/ccloipGv.s page 195
+ ARM GAS /tmp/cckyvfTO.s page 195
1427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2784 0128 2046 mov r0, r4
2785 012a FFF7FEFF bl I2C_Flush_TXDR
2786 .LVL187:
- ARM GAS /tmp/ccloipGv.s page 196
+ ARM GAS /tmp/cckyvfTO.s page 196
1450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2824 0154 0096 str r6, [sp]
2825 0156 2B46 mov r3, r5
2826 0158 1021 movs r1, #16
- ARM GAS /tmp/ccloipGv.s page 197
+ ARM GAS /tmp/cckyvfTO.s page 197
2827 015a 2046 mov r0, r4
@@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2865 .loc 1 1535 21 view .LVU950
2866 0184 5368 ldr r3, [r2, #4]
1535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
- ARM GAS /tmp/ccloipGv.s page 198
+ ARM GAS /tmp/cckyvfTO.s page 198
2867 .loc 1 1535 27 view .LVU951
@@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2907 01ae 2046 mov r0, r4
2908 01b0 FFF7FEFF bl I2C_WaitOnSTOPFlagUntilTimeout
2909 .LVL199:
- ARM GAS /tmp/ccloipGv.s page 199
+ ARM GAS /tmp/cckyvfTO.s page 199
1519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2947 .loc 1 1546 5 is_stmt 1 view .LVU982
1546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
2948 .loc 1 1546 5 view .LVU983
- ARM GAS /tmp/ccloipGv.s page 200
+ ARM GAS /tmp/cckyvfTO.s page 200
2949 01e2 84F84030 strb r3, [r4, #64]
@@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2996 .cfi_def_cfa_offset 24
2997 .cfi_offset 4, -24
2998 .cfi_offset 5, -20
- ARM GAS /tmp/ccloipGv.s page 201
+ ARM GAS /tmp/cckyvfTO.s page 201
2999 .cfi_offset 6, -16
@@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3039 .loc 1 1581 17 view .LVU1006
3040 0036 0646 mov r6, r0
3041 .LVL207:
- ARM GAS /tmp/ccloipGv.s page 202
+ ARM GAS /tmp/cckyvfTO.s page 202
1583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_SLAVE;
@@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3076 .loc 1 1597 5 is_stmt 1 view .LVU1026
1597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3077 .loc 1 1597 9 is_stmt 0 view .LVU1027
- ARM GAS /tmp/ccloipGv.s page 203
+ ARM GAS /tmp/cckyvfTO.s page 203
3078 005e 0090 str r0, [sp]
@@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3118 .loc 1 1608 5 view .LVU1042
1608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 204
+ ARM GAS /tmp/cckyvfTO.s page 204
3119 .loc 1 1608 9 is_stmt 0 view .LVU1043
@@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3158 .loc 1 1643 21 view .LVU1058
3159 00ba 0133 adds r3, r3, #1
3160 00bc 6362 str r3, [r4, #36]
- ARM GAS /tmp/ccloipGv.s page 205
+ ARM GAS /tmp/cckyvfTO.s page 205
1645:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
@@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3198 .loc 1 1624 9 is_stmt 1 view .LVU1075
1624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3199 .loc 1 1624 13 is_stmt 0 view .LVU1076
- ARM GAS /tmp/ccloipGv.s page 206
+ ARM GAS /tmp/cckyvfTO.s page 206
3200 00f2 2368 ldr r3, [r4]
@@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3238 .loc 1 1650 5 is_stmt 1 view .LVU1093
1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 207
+ ARM GAS /tmp/cckyvfTO.s page 207
3239 .loc 1 1650 9 is_stmt 0 view .LVU1094
@@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3279 0150 5368 ldr r3, [r2, #4]
1664:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
3280 .loc 1 1664 27 view .LVU1109
- ARM GAS /tmp/ccloipGv.s page 208
+ ARM GAS /tmp/cckyvfTO.s page 208
3281 0152 43F40043 orr r3, r3, #32768
@@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3318 017a 02B0 add sp, sp, #8
3319 .LCFI33:
3320 .cfi_remember_state
- ARM GAS /tmp/ccloipGv.s page 209
+ ARM GAS /tmp/cckyvfTO.s page 209
3321 .cfi_def_cfa_offset 24
@@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3368 .loc 1 1700 6 view .LVU1135
3369 000c 2028 cmp r0, #32
3370 000e 4ED1 bne .L240
- ARM GAS /tmp/ccloipGv.s page 210
+ ARM GAS /tmp/cckyvfTO.s page 210
1702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3406 .loc 1 1717 23 is_stmt 0 view .LVU1154
3407 003c 1F4B ldr r3, .L244
3408 .LVL223:
- ARM GAS /tmp/ccloipGv.s page 211
+ ARM GAS /tmp/cckyvfTO.s page 211
1717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_IT;
@@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3446 .loc 1 1740 11 is_stmt 0 view .LVU1172
3447 005c 626A ldr r2, [r4, #36]
- ARM GAS /tmp/ccloipGv.s page 212
+ ARM GAS /tmp/cckyvfTO.s page 212
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3488 .LVL231:
3489 .L235:
1773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 213
+ ARM GAS /tmp/cckyvfTO.s page 213
3490 .loc 1 1773 1 view .LVU1187
@@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3533 00b2 0220 movs r0, #2
3534 00b4 EDE7 b .L235
3535 .L242:
- ARM GAS /tmp/ccloipGv.s page 214
+ ARM GAS /tmp/cckyvfTO.s page 214
1708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3583 .loc 1 1792 5 is_stmt 1 view .LVU1207
1792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3584 .loc 1 1792 9 is_stmt 0 view .LVU1208
- ARM GAS /tmp/ccloipGv.s page 215
+ ARM GAS /tmp/cckyvfTO.s page 215
3585 0010 2068 ldr r0, [r4]
@@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3621 .loc 1 1807 23 view .LVU1226
3622 003e E362 str r3, [r4, #44]
3623 .LVL242:
- ARM GAS /tmp/ccloipGv.s page 216
+ ARM GAS /tmp/cckyvfTO.s page 216
1808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3662 0068 0221 movs r1, #2
3663 006a 2046 mov r0, r4
3664 006c FFF7FEFF bl I2C_Enable_IRQ
- ARM GAS /tmp/ccloipGv.s page 217
+ ARM GAS /tmp/cckyvfTO.s page 217
3665 .LVL248:
@@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3708 008c 0000FFFF .word -65536
3709 0090 00000000 .word I2C_Master_ISR_IT
3710 0094 00240080 .word -2147474432
- ARM GAS /tmp/ccloipGv.s page 218
+ ARM GAS /tmp/cckyvfTO.s page 218
3711 .cfi_endproc
@@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
3755 .loc 1 1862 23 is_stmt 0 view .LVU1266
3756 0020 2023 movs r3, #32
- ARM GAS /tmp/ccloipGv.s page 219
+ ARM GAS /tmp/cckyvfTO.s page 219
3757 0022 80F84230 strb r3, [r0, #66]
@@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
3792 .loc 1 1876 8 view .LVU1286
3793 0046 B3F5003F cmp r3, #131072
- ARM GAS /tmp/ccloipGv.s page 220
+ ARM GAS /tmp/cckyvfTO.s page 220
3794 004a 08D0 beq .L265
@@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3831 006a 438D ldrh r3, [r0, #42]
3832 006c 9BB2 uxth r3, r3
1885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
- ARM GAS /tmp/ccloipGv.s page 221
+ ARM GAS /tmp/cckyvfTO.s page 221
3833 .loc 1 1885 22 view .LVU1304
@@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3881 .cfi_startproc
3882 @ args = 0, pretend = 0, frame = 0
3883 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccloipGv.s page 222
+ ARM GAS /tmp/cckyvfTO.s page 222
1919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->State == HAL_I2C_STATE_READY)
@@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3922 002a 0568 ldr r5, [r0]
1930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
3923 .loc 1 1930 19 view .LVU1329
- ARM GAS /tmp/ccloipGv.s page 223
+ ARM GAS /tmp/cckyvfTO.s page 223
3924 002c 6B68 ldr r3, [r5, #4]
@@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3959 0050 2046 mov r0, r4
3960 .L269:
1958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 224
+ ARM GAS /tmp/cckyvfTO.s page 224
3961 .loc 1 1958 1 view .LVU1349
@@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus;
4011 .loc 1 1973 3 is_stmt 1 view .LVU1356
1974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t sizetoxfer = 0U;
- ARM GAS /tmp/ccloipGv.s page 225
+ ARM GAS /tmp/cckyvfTO.s page 225
4012 .loc 1 1974 3 view .LVU1357
@@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
1989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4050 .loc 1 1989 5 is_stmt 1 view .LVU1374
1989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 226
+ ARM GAS /tmp/cckyvfTO.s page 226
4051 .loc 1 1989 23 is_stmt 0 view .LVU1375
@@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4088 .loc 1 2008 5 is_stmt 1 view .LVU1392
2008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4089 .loc 1 2008 13 is_stmt 0 view .LVU1393
- ARM GAS /tmp/ccloipGv.s page 227
+ ARM GAS /tmp/cckyvfTO.s page 227
4090 005c 238D ldrh r3, [r4, #40]
@@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4127 007e 51D0 beq .L280
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4128 .loc 1 2024 7 is_stmt 1 view .LVU1411
- ARM GAS /tmp/ccloipGv.s page 228
+ ARM GAS /tmp/cckyvfTO.s page 228
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4165 00a0 A06B ldr r0, [r4, #56]
4166 00a2 FFF7FEFF bl HAL_DMA_Start_IT
4167 .LVL282:
- ARM GAS /tmp/ccloipGv.s page 229
+ ARM GAS /tmp/cckyvfTO.s page 229
2055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4203 .LVL285:
2005:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
4204 .loc 1 2005 16 is_stmt 0 view .LVU1449
- ARM GAS /tmp/ccloipGv.s page 230
+ ARM GAS /tmp/cckyvfTO.s page 230
4205 00c8 4FF00076 mov r6, #33554432
@@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4243 00f4 D2B2 uxtb r2, r2
4244 00f6 2946 mov r1, r5
4245 00f8 2046 mov r0, r4
- ARM GAS /tmp/ccloipGv.s page 231
+ ARM GAS /tmp/cckyvfTO.s page 231
4246 .LVL289:
@@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2099:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_WRITE);
4285 .loc 1 2099 7 is_stmt 1 view .LVU1481
4286 0128 104B ldr r3, .L291+16
- ARM GAS /tmp/ccloipGv.s page 232
+ ARM GAS /tmp/cckyvfTO.s page 232
4287 012a 0093 str r3, [sp]
@@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4330 .loc 1 1981 14 view .LVU1492
4331 0152 0220 movs r0, #2
4332 0154 FBE7 b .L276
- ARM GAS /tmp/ccloipGv.s page 233
+ ARM GAS /tmp/cckyvfTO.s page 233
4333 .L287:
@@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4381 .loc 1 2139 11 view .LVU1500
4382 000a C0B2 uxtb r0, r0
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 234
+ ARM GAS /tmp/cckyvfTO.s page 234
4383 .loc 1 2139 6 view .LVU1501
@@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4420 .loc 1 2155 5 is_stmt 1 view .LVU1518
2155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = I2C_NO_OPTION_FRAME;
4421 .loc 1 2155 23 is_stmt 0 view .LVU1519
- ARM GAS /tmp/ccloipGv.s page 235
+ ARM GAS /tmp/cckyvfTO.s page 235
4422 0042 6385 strh r3, [r4, #42] @ movhi
@@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4459 0062 E36B ldr r3, [r4, #60]
2172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4460 .loc 1 2172 10 view .LVU1537
- ARM GAS /tmp/ccloipGv.s page 236
+ ARM GAS /tmp/cckyvfTO.s page 236
4461 0064 1BB3 cbz r3, .L298
@@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4497 0088 2023 movs r3, #32
4498 008a 84F84130 strb r3, [r4, #65]
2228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 237
+ ARM GAS /tmp/cckyvfTO.s page 237
4499 .loc 1 2228 9 is_stmt 1 view .LVU1556
@@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4536 00b0 84F84130 strb r3, [r4, #65]
2192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4537 .loc 1 2192 9 is_stmt 1 view .LVU1574
- ARM GAS /tmp/ccloipGv.s page 238
+ ARM GAS /tmp/cckyvfTO.s page 238
2192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4576 .loc 1 2210 25 view .LVU1590
4577 00e2 9B1A subs r3, r3, r2
4578 00e4 9BB2 uxth r3, r3
- ARM GAS /tmp/ccloipGv.s page 239
+ ARM GAS /tmp/cckyvfTO.s page 239
4579 00e6 6385 strh r3, [r4, #42] @ movhi
@@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4619 011a 84F84030 strb r3, [r4, #64]
2250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
4620 .loc 1 2250 7 view .LVU1605
- ARM GAS /tmp/ccloipGv.s page 240
+ ARM GAS /tmp/cckyvfTO.s page 240
2259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4669 .global HAL_I2C_Slave_Transmit_DMA
4670 .syntax unified
4671 .thumb
- ARM GAS /tmp/ccloipGv.s page 241
+ ARM GAS /tmp/cckyvfTO.s page 241
4672 .thumb_func
@@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4713 0028 2123 movs r3, #33
4714 002a 80F84130 strb r3, [r0, #65]
2293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
- ARM GAS /tmp/ccloipGv.s page 242
+ ARM GAS /tmp/cckyvfTO.s page 242
4715 .loc 1 2293 5 is_stmt 1 view .LVU1627
@@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
4751 .loc 1 2317 13 is_stmt 0 view .LVU1646
4752 0050 638D ldrh r3, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 243
+ ARM GAS /tmp/cckyvfTO.s page 243
4753 0052 9BB2 uxth r3, r3
@@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4789 0076 2832 adds r2, r2, #40
4790 0078 616A ldr r1, [r4, #36]
4791 .LVL326:
- ARM GAS /tmp/ccloipGv.s page 244
+ ARM GAS /tmp/cckyvfTO.s page 244
2332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)hi2c->pBuffPtr, (uint32_t)&hi2c->Instance->TXDR,
@@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
4828 .loc 1 2286 23 is_stmt 0 view .LVU1683
4829 009e 4FF40073 mov r3, #512
- ARM GAS /tmp/ccloipGv.s page 245
+ ARM GAS /tmp/cckyvfTO.s page 245
4830 00a2 4364 str r3, [r0, #68]
@@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4868 00c4 C4E7 b .L313
4869 .L315:
2339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_NONE;
- ARM GAS /tmp/ccloipGv.s page 246
+ ARM GAS /tmp/cckyvfTO.s page 246
4870 .loc 1 2339 9 is_stmt 1 view .LVU1700
@@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4906 00ec 0023 movs r3, #0
4907 00ee 84F84030 strb r3, [r4, #64]
2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 247
+ ARM GAS /tmp/cckyvfTO.s page 247
4908 .loc 1 2357 9 view .LVU1719
@@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4946 .loc 1 2395 7 view .LVU1735
4947 011e FFF7FEFF bl I2C_Enable_IRQ
4948 .LVL341:
- ARM GAS /tmp/ccloipGv.s page 248
+ ARM GAS /tmp/cckyvfTO.s page 248
4949 .L318:
@@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4998 @ args = 0, pretend = 0, frame = 0
4999 @ frame_needed = 0, uses_anonymous_args = 0
2415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** HAL_StatusTypeDef dmaxferstatus;
- ARM GAS /tmp/ccloipGv.s page 249
+ ARM GAS /tmp/cckyvfTO.s page 249
5000 .loc 1 2415 1 is_stmt 0 view .LVU1743
@@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5040 .loc 1 2430 5 is_stmt 1 view .LVU1758
2430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 250
+ ARM GAS /tmp/cckyvfTO.s page 250
5041 .loc 1 2430 23 is_stmt 0 view .LVU1759
@@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5076 004c C36B ldr r3, [r0, #60]
2445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5077 .loc 1 2445 39 view .LVU1779
- ARM GAS /tmp/ccloipGv.s page 251
+ ARM GAS /tmp/cckyvfTO.s page 251
5078 004e 284A ldr r2, .L343+12
@@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5116 .loc 1 2494 7 is_stmt 1 view .LVU1796
2494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 252
+ ARM GAS /tmp/cckyvfTO.s page 252
5117 .loc 1 2494 11 is_stmt 0 view .LVU1797
@@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5154 .loc 1 2462 23 view .LVU1815
5155 00a4 43F08003 orr r3, r3, #128
- ARM GAS /tmp/ccloipGv.s page 253
+ ARM GAS /tmp/cckyvfTO.s page 253
5156 00a8 4364 str r3, [r0, #68]
@@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5192 .loc 1 2485 27 view .LVU1833
5193 00d0 43F40043 orr r3, r3, #32768
5194 00d4 1360 str r3, [r2]
- ARM GAS /tmp/ccloipGv.s page 254
+ ARM GAS /tmp/cckyvfTO.s page 254
2502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5244 .cfi_offset 8, -20
5245 .cfi_offset 9, -16
5246 .cfi_offset 10, -12
- ARM GAS /tmp/ccloipGv.s page 255
+ ARM GAS /tmp/cckyvfTO.s page 255
5247 .cfi_offset 11, -8
@@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5287 .loc 1 2543 5 view .LVU1854
2543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5288 .loc 1 2543 17 is_stmt 0 view .LVU1855
- ARM GAS /tmp/ccloipGv.s page 256
+ ARM GAS /tmp/cckyvfTO.s page 256
5289 003e FFF7FEFF bl HAL_GetTick
@@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
5329 .loc 1 2551 21 is_stmt 0 view .LVU1870
5330 006a 4023 movs r3, #64
- ARM GAS /tmp/ccloipGv.s page 257
+ ARM GAS /tmp/cckyvfTO.s page 257
5331 006c 84F84230 strb r3, [r4, #66]
@@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
5369 .loc 1 2571 7 is_stmt 1 view .LVU1887
5370 009c 0023 movs r3, #0
- ARM GAS /tmp/ccloipGv.s page 258
+ ARM GAS /tmp/cckyvfTO.s page 258
5371 009e 0093 str r3, [sp]
@@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5412 .loc 1 2613 11 is_stmt 1 view .LVU1900
5413 00d8 0023 movs r3, #0
5414 00da 0093 str r3, [sp]
- ARM GAS /tmp/ccloipGv.s page 259
+ ARM GAS /tmp/cckyvfTO.s page 259
5415 00dc 4FF00073 mov r3, #33554432
@@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5454 010a 0133 adds r3, r3, #1
5455 010c 6362 str r3, [r4, #36]
2593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize--;
- ARM GAS /tmp/ccloipGv.s page 260
+ ARM GAS /tmp/cckyvfTO.s page 260
5456 .loc 1 2593 7 is_stmt 1 view .LVU1916
@@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2604:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
5496 .loc 1 2604 12 view .LVU1931
5497 0140 FF2B cmp r3, #255
- ARM GAS /tmp/ccloipGv.s page 261
+ ARM GAS /tmp/cckyvfTO.s page 261
5498 0142 C6D9 bls .L352
@@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5540 0188 84F84230 strb r3, [r4, #66]
2637:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5541 .loc 1 2637 5 is_stmt 1 view .LVU1944
- ARM GAS /tmp/ccloipGv.s page 262
+ ARM GAS /tmp/cckyvfTO.s page 262
2637:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5586 .section .text.HAL_I2C_Mem_Read,"ax",%progbits
5587 .align 1
5588 .global HAL_I2C_Mem_Read
- ARM GAS /tmp/ccloipGv.s page 263
+ ARM GAS /tmp/cckyvfTO.s page 263
5589 .syntax unified
@@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5634 .loc 1 2670 8 is_stmt 0 view .LVU1965
5635 0020 0C9B ldr r3, [sp, #48]
5636 .LVL384:
- ARM GAS /tmp/ccloipGv.s page 264
+ ARM GAS /tmp/cckyvfTO.s page 264
2670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** return HAL_ERROR;
5677 .loc 1 2672 23 is_stmt 0 view .LVU1980
5678 005a 4FF40073 mov r3, #512
- ARM GAS /tmp/ccloipGv.s page 265
+ ARM GAS /tmp/cckyvfTO.s page 265
5679 005e 4364 str r3, [r0, #68]
@@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5716 0086 2946 mov r1, r5
5717 0088 2046 mov r0, r4
5718 008a FFF7FEFF bl I2C_RequestMemoryRead
- ARM GAS /tmp/ccloipGv.s page 266
+ ARM GAS /tmp/cckyvfTO.s page 266
5719 .LVL392:
@@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5758 00bc 2285 strh r2, [r4, #40] @ movhi
2715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_GENERATE_START_READ);
5759 .loc 1 2715 7 is_stmt 1 view .LVU2013
- ARM GAS /tmp/ccloipGv.s page 267
+ ARM GAS /tmp/cckyvfTO.s page 267
5760 00be 3B4B ldr r3, .L385
@@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
5804 .loc 1 2722 10 discriminator 1 view .LVU2024
5805 0100 0028 cmp r0, #0
- ARM GAS /tmp/ccloipGv.s page 268
+ ARM GAS /tmp/cckyvfTO.s page 268
5806 0102 4DD1 bne .L377
@@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5843 012a DED0 beq .L371
2736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
5844 .loc 1 2736 35 discriminator 1 view .LVU2042
- ARM GAS /tmp/ccloipGv.s page 269
+ ARM GAS /tmp/cckyvfTO.s page 269
5845 012c 002A cmp r2, #0
@@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5887 .loc 1 2767 5 is_stmt 1 view .LVU2055
5888 0168 2368 ldr r3, [r4]
- ARM GAS /tmp/ccloipGv.s page 270
+ ARM GAS /tmp/cckyvfTO.s page 270
5889 016a 2022 movs r2, #32
@@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5930 .loc 1 2677 5 discriminator 1 view .LVU2068
5931 019c 0220 movs r0, #2
5932 .LVL403:
- ARM GAS /tmp/ccloipGv.s page 271
+ ARM GAS /tmp/cckyvfTO.s page 271
2677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5983 .LVL406:
2801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
5984 .loc 1 2801 3 is_stmt 1 view .LVU2075
- ARM GAS /tmp/ccloipGv.s page 272
+ ARM GAS /tmp/cckyvfTO.s page 272
2803:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6022 .loc 1 2820 23 is_stmt 0 view .LVU2092
6023 003e 4026 movs r6, #64
6024 0040 84F84260 strb r6, [r4, #66]
- ARM GAS /tmp/ccloipGv.s page 273
+ ARM GAS /tmp/cckyvfTO.s page 273
2821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6059 .loc 1 2847 7 is_stmt 1 view .LVU2112
2847:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6060 .loc 1 2847 26 is_stmt 0 view .LVU2113
- ARM GAS /tmp/ccloipGv.s page 274
+ ARM GAS /tmp/cckyvfTO.s page 274
6061 0062 D2B2 uxtb r2, r2
@@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6101 .loc 1 2835 7 is_stmt 1 view .LVU2127
2835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6102 .loc 1 2835 30 is_stmt 0 view .LVU2128
- ARM GAS /tmp/ccloipGv.s page 275
+ ARM GAS /tmp/cckyvfTO.s page 275
6103 0092 D2B2 uxtb r2, r2
@@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6152 HAL_I2C_Mem_Read_IT:
6153 .LVL417:
6154 .LFB160:
- ARM GAS /tmp/ccloipGv.s page 276
+ ARM GAS /tmp/cckyvfTO.s page 276
2887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Check the parameters */
@@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6197 0028 3AD1 bne .L406
2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6198 .loc 1 2905 5 is_stmt 1 view .LVU2148
- ARM GAS /tmp/ccloipGv.s page 277
+ ARM GAS /tmp/cckyvfTO.s page 277
2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2916:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6235 .loc 1 2916 23 is_stmt 0 view .LVU2167
6236 0056 E164 str r1, [r4, #76]
- ARM GAS /tmp/ccloipGv.s page 278
+ ARM GAS /tmp/cckyvfTO.s page 278
2919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6275 0080 2846 mov r0, r5
6276 0082 0BE0 b .L401
6277 .LVL424:
- ARM GAS /tmp/ccloipGv.s page 279
+ ARM GAS /tmp/cckyvfTO.s page 279
6278 .L409:
@@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6320 .loc 1 2905 5 discriminator 1 view .LVU2196
6321 00a4 0220 movs r0, #2
- ARM GAS /tmp/ccloipGv.s page 280
+ ARM GAS /tmp/cckyvfTO.s page 280
6322 00a6 F9E7 b .L401
@@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6371 .LVL432:
2980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
6372 .loc 1 2980 11 view .LVU2204
- ARM GAS /tmp/ccloipGv.s page 281
+ ARM GAS /tmp/cckyvfTO.s page 281
6373 0014 C0B2 uxtb r0, r0
@@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size;
6411 .loc 1 3001 5 is_stmt 1 view .LVU2221
3001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size;
- ARM GAS /tmp/ccloipGv.s page 282
+ ARM GAS /tmp/cckyvfTO.s page 282
6412 .loc 1 3001 23 is_stmt 0 view .LVU2222
@@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6448 006a 8362 str r3, [r0, #40]
3032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6449 .loc 1 3032 7 is_stmt 1 view .LVU2241
- ARM GAS /tmp/ccloipGv.s page 283
+ ARM GAS /tmp/cckyvfTO.s page 283
3032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize);
6486 .loc 1 3048 23 view .LVU2260
6487 008c 238D ldrh r3, [r4, #40]
- ARM GAS /tmp/ccloipGv.s page 284
+ ARM GAS /tmp/cckyvfTO.s page 284
6488 008e 2832 adds r2, r2, #40
@@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
2985:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6525 .loc 1 2985 15 is_stmt 0 view .LVU2278
6526 00bc 0125 movs r5, #1
- ARM GAS /tmp/ccloipGv.s page 285
+ ARM GAS /tmp/cckyvfTO.s page 285
6527 00be 28E0 b .L414
@@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6564 00e6 84F84020 strb r2, [r4, #64]
3061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6565 .loc 1 3061 7 view .LVU2296
- ARM GAS /tmp/ccloipGv.s page 286
+ ARM GAS /tmp/cckyvfTO.s page 286
3063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6608 @ sp needed
6609 0116 F0BD pop {r4, r5, r6, r7, pc}
6610 .LVL443:
- ARM GAS /tmp/ccloipGv.s page 287
+ ARM GAS /tmp/cckyvfTO.s page 287
6611 .L424:
@@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6663 .loc 1 3121 3 is_stmt 1 view .LVU2313
3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 288
+ ARM GAS /tmp/cckyvfTO.s page 288
6664 .loc 1 3124 3 view .LVU2314
@@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6702 003c 84F84100 strb r0, [r4, #65]
3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
6703 .loc 1 3143 5 is_stmt 1 view .LVU2331
- ARM GAS /tmp/ccloipGv.s page 289
+ ARM GAS /tmp/cckyvfTO.s page 289
3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->ErrorCode = HAL_I2C_ERROR_NONE;
@@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
6740 .loc 1 3163 5 is_stmt 1 view .LVU2350
3163:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 290
+ ARM GAS /tmp/cckyvfTO.s page 290
6741 .loc 1 3163 8 is_stmt 0 view .LVU2351
@@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6778 .loc 1 3191 7 is_stmt 1 view .LVU2369
3191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 291
+ ARM GAS /tmp/cckyvfTO.s page 291
6779 .loc 1 3191 11 is_stmt 0 view .LVU2370
@@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
6816 .loc 1 3241 14 is_stmt 0 view .LVU2388
6817 00b4 0125 movs r5, #1
- ARM GAS /tmp/ccloipGv.s page 292
+ ARM GAS /tmp/cckyvfTO.s page 292
6818 00b6 2CE0 b .L434
@@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6856 00da 0022 movs r2, #0
6857 00dc 84F84220 strb r2, [r4, #66]
3204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 293
+ ARM GAS /tmp/cckyvfTO.s page 293
6858 .loc 1 3204 7 is_stmt 1 view .LVU2405
@@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6897 010e 00E0 b .L434
6898 .LVL457:
6899 .L443:
- ARM GAS /tmp/ccloipGv.s page 294
+ ARM GAS /tmp/cckyvfTO.s page 294
3248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6950 .LCFI82:
6951 .cfi_def_cfa_offset 28
6952 .cfi_offset 4, -28
- ARM GAS /tmp/ccloipGv.s page 295
+ ARM GAS /tmp/cckyvfTO.s page 295
6953 .cfi_offset 5, -24
@@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6993 002e 7AD0 beq .L465
3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
6994 .loc 1 3281 5 discriminator 2 view .LVU2441
- ARM GAS /tmp/ccloipGv.s page 296
+ ARM GAS /tmp/cckyvfTO.s page 296
6995 0030 0123 movs r3, #1
@@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7034 .LVL465:
3296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
7035 .loc 1 3296 7 is_stmt 1 view .LVU2457
- ARM GAS /tmp/ccloipGv.s page 297
+ ARM GAS /tmp/cckyvfTO.s page 297
3296:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7076 .LVL472:
3302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7077 .loc 1 3302 31 discriminator 1 view .LVU2472
- ARM GAS /tmp/ccloipGv.s page 298
+ ARM GAS /tmp/cckyvfTO.s page 298
7078 0090 C01B subs r0, r0, r7
@@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7118 .loc 1 3322 11 is_stmt 0 view .LVU2487
7119 00b6 3368 ldr r3, [r6]
- ARM GAS /tmp/ccloipGv.s page 299
+ ARM GAS /tmp/cckyvfTO.s page 299
7120 .LVL475:
@@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
7160 .loc 1 3364 21 view .LVU2502
7161 00ee 1343 orrs r3, r3, r2
- ARM GAS /tmp/ccloipGv.s page 300
+ ARM GAS /tmp/cckyvfTO.s page 300
7162 00f0 7364 str r3, [r6, #68]
@@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7200 .L463:
3373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
7201 .loc 1 3373 12 view .LVU2519
- ARM GAS /tmp/ccloipGv.s page 301
+ ARM GAS /tmp/cckyvfTO.s page 301
7202 011e 0220 movs r0, #2
@@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7250 @ frame_needed = 0, uses_anonymous_args = 0
3391:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t xfermode;
7251 .loc 1 3391 1 is_stmt 0 view .LVU2528
- ARM GAS /tmp/ccloipGv.s page 302
+ ARM GAS /tmp/cckyvfTO.s page 302
7252 0000 2DE9F041 push {r4, r5, r6, r7, r8, lr}
@@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7292 .loc 1 3404 5 view .LVU2542
3404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->Mode = HAL_I2C_MODE_MASTER;
7293 .loc 1 3404 21 is_stmt 0 view .LVU2543
- ARM GAS /tmp/ccloipGv.s page 303
+ ARM GAS /tmp/cckyvfTO.s page 303
7294 0024 2121 movs r1, #33
@@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
7330 .loc 1 3418 7 is_stmt 1 view .LVU2562
7331 .LVL490:
- ARM GAS /tmp/ccloipGv.s page 304
+ ARM GAS /tmp/cckyvfTO.s page 304
3418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7369 .loc 1 3437 22 view .LVU2579
7370 0070 013B subs r3, r3, #1
7371 0072 9BB2 uxth r3, r3
- ARM GAS /tmp/ccloipGv.s page 305
+ ARM GAS /tmp/cckyvfTO.s page 305
7372 0074 6385 strh r3, [r4, #42] @ movhi
@@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7412 .loc 1 3455 7 view .LVU2594
3455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 306
+ ARM GAS /tmp/cckyvfTO.s page 306
7413 .loc 1 3455 15 is_stmt 0 view .LVU2595
@@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7454 00d0 FFF7FEFF bl I2C_Enable_IRQ
7455 .LVL504:
3483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 307
+ ARM GAS /tmp/cckyvfTO.s page 307
7456 .loc 1 3483 5 view .LVU2609
@@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7501 00fc 0220 movs r0, #2
7502 00fe EAE7 b .L475
7503 .LVL512:
- ARM GAS /tmp/ccloipGv.s page 308
+ ARM GAS /tmp/cckyvfTO.s page 308
7504 .L484:
@@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
7552 .loc 1 3514 3 view .LVU2627
3514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 309
+ ARM GAS /tmp/cckyvfTO.s page 309
7553 .loc 1 3514 11 is_stmt 0 view .LVU2628
@@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7590 003a 6385 strh r3, [r4, #42] @ movhi
3526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA;
7591 .loc 1 3526 5 is_stmt 1 view .LVU2646
- ARM GAS /tmp/ccloipGv.s page 310
+ ARM GAS /tmp/cckyvfTO.s page 310
3526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA;
@@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7629 0060 2368 ldr r3, [r4]
3546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
7630 .loc 1 3546 30 view .LVU2664
- ARM GAS /tmp/ccloipGv.s page 311
+ ARM GAS /tmp/cckyvfTO.s page 311
7631 0062 1278 ldrb r2, [r2] @ zero_extendqisi2
@@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7669 .LVL524:
3538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
7670 .loc 1 3538 16 view .LVU2681
- ARM GAS /tmp/ccloipGv.s page 312
+ ARM GAS /tmp/cckyvfTO.s page 312
7671 0088 E3E7 b .L495
@@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7712 .LVL529:
7713 .L512:
3562:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 313
+ ARM GAS /tmp/cckyvfTO.s page 313
7714 .loc 1 3562 19 view .LVU2695
@@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7751 00de A26B ldr r2, [r4, #56]
3588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
7752 .loc 1 3588 41 view .LVU2713
- ARM GAS /tmp/ccloipGv.s page 314
+ ARM GAS /tmp/cckyvfTO.s page 314
7753 00e0 1365 str r3, [r2, #80]
@@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7789 .loc 1 3648 16 view .LVU2731
7790 010c 5BE0 b .L493
7791 .LVL533:
- ARM GAS /tmp/ccloipGv.s page 315
+ ARM GAS /tmp/cckyvfTO.s page 315
7792 .L500:
@@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7830 .loc 1 3614 11 is_stmt 0 view .LVU2747
7831 0142 FFF7FEFF bl I2C_TransferConfig
7832 .LVL536:
- ARM GAS /tmp/ccloipGv.s page 316
+ ARM GAS /tmp/cckyvfTO.s page 316
7833 .L504:
@@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7873 017a FFF7FEFF bl I2C_TransferConfig
7874 .LVL540:
7875 017e E2E7 b .L504
- ARM GAS /tmp/ccloipGv.s page 317
+ ARM GAS /tmp/cckyvfTO.s page 317
7876 .LVL541:
@@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7918 01bc 2046 mov r0, r4
7919 01be FFF7FEFF bl I2C_TransferConfig
7920 .LVL544:
- ARM GAS /tmp/ccloipGv.s page 318
+ ARM GAS /tmp/cckyvfTO.s page 318
7921 01c2 EDE7 b .L507
@@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
7972 .cfi_offset 5, -12
7973 .cfi_offset 6, -8
7974 .cfi_offset 14, -4
- ARM GAS /tmp/ccloipGv.s page 319
+ ARM GAS /tmp/cckyvfTO.s page 319
7975 0002 82B0 sub sp, sp, #8
@@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8012 .loc 1 3716 21 is_stmt 0 view .LVU2795
8013 002e 0020 movs r0, #0
8014 0030 6064 str r0, [r4, #68]
- ARM GAS /tmp/ccloipGv.s page 320
+ ARM GAS /tmp/cckyvfTO.s page 320
3719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount = Size;
@@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8050 .loc 1 3739 8 view .LVU2814
8051 004e 122B cmp r3, #18
8052 0050 04D1 bne .L522
- ARM GAS /tmp/ccloipGv.s page 321
+ ARM GAS /tmp/cckyvfTO.s page 321
3739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (IS_I2C_TRANSFER_OTHER_OPTIONS_REQUEST(XferOptions) == 0))
@@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8094 .loc 1 3760 5 is_stmt 1 view .LVU2828
3765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 322
+ ARM GAS /tmp/cckyvfTO.s page 322
8095 .loc 1 3765 5 view .LVU2829
@@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
8138 .loc 1 3771 12 view .LVU2841
8139 00a2 0220 movs r0, #2
- ARM GAS /tmp/ccloipGv.s page 323
+ ARM GAS /tmp/cckyvfTO.s page 323
8140 00a4 F3E7 b .L519
@@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8188 .loc 1 3797 3 view .LVU2849
3797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
8189 .loc 1 3797 11 is_stmt 0 view .LVU2850
- ARM GAS /tmp/ccloipGv.s page 324
+ ARM GAS /tmp/cckyvfTO.s page 324
8190 000c 90F84100 ldrb r0, [r0, #65] @ zero_extendqisi2
@@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA;
8227 .loc 1 3809 5 is_stmt 1 view .LVU2868
3809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = I2C_Master_ISR_DMA;
- ARM GAS /tmp/ccloipGv.s page 325
+ ARM GAS /tmp/cckyvfTO.s page 325
8228 .loc 1 3809 23 is_stmt 0 view .LVU2869
@@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8267 0066 FFF7FEFF bl I2C_ConvertOtherXferOptions
8268 .LVL573:
3838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 326
+ ARM GAS /tmp/cckyvfTO.s page 326
8269 .loc 1 3838 7 view .LVU2885
@@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL;
8306 .loc 1 3855 13 is_stmt 0 view .LVU2903
8307 008c E26B ldr r2, [r4, #60]
- ARM GAS /tmp/ccloipGv.s page 327
+ ARM GAS /tmp/cckyvfTO.s page 327
3855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->hdmarx->XferAbortCallback = NULL;
@@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8344 .loc 1 3907 9 view .LVU2921
8345 00ba 84F84020 strb r2, [r4, #64]
3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 328
+ ARM GAS /tmp/cckyvfTO.s page 328
8346 .loc 1 3907 9 view .LVU2922
@@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8384 .loc 1 3869 9 is_stmt 1 view .LVU2938
3869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8385 .loc 1 3869 13 is_stmt 0 view .LVU2939
- ARM GAS /tmp/ccloipGv.s page 329
+ ARM GAS /tmp/cckyvfTO.s page 329
8386 00e2 636C ldr r3, [r4, #68]
@@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8425 .loc 1 3892 9 view .LVU2955
8426 0116 1021 movs r1, #16
- ARM GAS /tmp/ccloipGv.s page 330
+ ARM GAS /tmp/cckyvfTO.s page 330
8427 0118 2046 mov r0, r4
@@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8468 0150 00E0 b .L532
8469 .LVL588:
8470 .L542:
- ARM GAS /tmp/ccloipGv.s page 331
+ ARM GAS /tmp/cckyvfTO.s page 331
3939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8522 .cfi_offset 7, -8
8523 .cfi_offset 14, -4
8524 0002 0446 mov r4, r0
- ARM GAS /tmp/ccloipGv.s page 332
+ ARM GAS /tmp/cckyvfTO.s page 332
3957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
3974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8564 .loc 1 3974 5 view .LVU2989
8565 0032 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2
- ARM GAS /tmp/ccloipGv.s page 333
+ ARM GAS /tmp/cckyvfTO.s page 333
8566 0036 012B cmp r3, #1
@@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount;
8603 .loc 1 4013 5 is_stmt 1 view .LVU3007
4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize = hi2c->XferCount;
- ARM GAS /tmp/ccloipGv.s page 334
+ ARM GAS /tmp/cckyvfTO.s page 334
8604 .loc 1 4013 23 is_stmt 0 view .LVU3008
@@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8641 .LVL599:
4027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8642 .loc 1 4027 5 is_stmt 0 view .LVU3026
- ARM GAS /tmp/ccloipGv.s page 335
+ ARM GAS /tmp/cckyvfTO.s page 335
8643 008a 84F84050 strb r5, [r4, #64]
@@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8681 .loc 1 3992 11 is_stmt 1 view .LVU3042
3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8682 .loc 1 3992 43 is_stmt 0 view .LVU3043
- ARM GAS /tmp/ccloipGv.s page 336
+ ARM GAS /tmp/cckyvfTO.s page 336
8683 00bc 084A ldr r2, .L560+4
@@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8728 .thumb_func
8730 HAL_I2C_Slave_Seq_Transmit_DMA:
8731 .LVL608:
- ARM GAS /tmp/ccloipGv.s page 337
+ ARM GAS /tmp/cckyvfTO.s page 337
8732 .LFB169:
@@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8773 0024 012B cmp r3, #1
8774 0026 00F0B780 beq .L573
4072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 338
+ ARM GAS /tmp/cckyvfTO.s page 338
8775 .loc 1 4072 5 is_stmt 1 discriminator 2 view .LVU3067
@@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8813 005c 6364 str r3, [r4, #68]
4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8814 .loc 1 4136 5 is_stmt 1 view .LVU3084
- ARM GAS /tmp/ccloipGv.s page 339
+ ARM GAS /tmp/cckyvfTO.s page 339
4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8850 .loc 1 4151 7 is_stmt 1 view .LVU3104
4151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 340
+ ARM GAS /tmp/cckyvfTO.s page 340
8851 .loc 1 4151 11 is_stmt 0 view .LVU3105
@@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
8889 .loc 1 4188 23 is_stmt 0 view .LVU3122
8890 00aa 0022 movs r2, #0
- ARM GAS /tmp/ccloipGv.s page 341
+ ARM GAS /tmp/cckyvfTO.s page 341
8891 00ac 84F84220 strb r2, [r4, #66]
@@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8928 .loc 1 4084 16 is_stmt 0 view .LVU3139
8929 00d2 2368 ldr r3, [r4]
4084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 342
+ ARM GAS /tmp/cckyvfTO.s page 342
8930 .loc 1 4084 26 view .LVU3140
@@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
8967 00fe 9847 blx r3
8968 .LVL621:
8969 0100 A5E7 b .L566
- ARM GAS /tmp/ccloipGv.s page 343
+ ARM GAS /tmp/cckyvfTO.s page 343
8970 .L578:
@@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9006 .loc 1 4121 25 view .LVU3175
9007 012a 036D ldr r3, [r0, #80]
4121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 344
+ ARM GAS /tmp/cckyvfTO.s page 344
9008 .loc 1 4121 13 view .LVU3176
@@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9045 .loc 1 4179 23 view .LVU3193
9046 0152 9B1A subs r3, r3, r2
9047 0154 9BB2 uxth r3, r3
- ARM GAS /tmp/ccloipGv.s page 345
+ ARM GAS /tmp/cckyvfTO.s page 345
9048 0156 6385 strh r3, [r4, #42] @ movhi
@@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9086 .LVL629:
4219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
9087 .loc 1 4219 5 is_stmt 1 view .LVU3210
- ARM GAS /tmp/ccloipGv.s page 346
+ ARM GAS /tmp/cckyvfTO.s page 346
4219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9136 .LFB170:
4239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Declaration of tmp to prevent undefined behavior of volatile usage */
9137 .loc 1 4239 1 is_stmt 1 view -0
- ARM GAS /tmp/ccloipGv.s page 347
+ ARM GAS /tmp/cckyvfTO.s page 347
9138 .cfi_startproc
@@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9179 0024 0120 movs r0, #1
9180 0026 55E0 b .L582
9181 .LVL639:
- ARM GAS /tmp/ccloipGv.s page 348
+ ARM GAS /tmp/cckyvfTO.s page 348
9182 .L583:
@@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
9220 .loc 1 4293 9 is_stmt 0 view .LVU3249
9221 005a 2268 ldr r2, [r4]
- ARM GAS /tmp/ccloipGv.s page 349
+ ARM GAS /tmp/cckyvfTO.s page 349
4293:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9257 .loc 1 4303 55 discriminator 1 view .LVU3268
9258 0082 0BB1 cbz r3, .L585
4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 350
+ ARM GAS /tmp/cckyvfTO.s page 350
9259 .loc 1 4307 7 is_stmt 1 view .LVU3269
@@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9298 00ae 1A68 ldr r2, [r3]
4269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
9299 .loc 1 4269 29 view .LVU3285
- ARM GAS /tmp/ccloipGv.s page 351
+ ARM GAS /tmp/cckyvfTO.s page 351
9300 00b0 22F48042 bic r2, r2, #16384
@@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9339 .loc 1 4258 5 discriminator 1 view .LVU3300
9340 00d6 0220 movs r0, #2
9341 00d8 FCE7 b .L582
- ARM GAS /tmp/ccloipGv.s page 352
+ ARM GAS /tmp/cckyvfTO.s page 352
9342 .L591:
@@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9389 .loc 1 4349 5 is_stmt 1 view .LVU3309
4349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
9390 .loc 1 4349 8 is_stmt 0 view .LVU3310
- ARM GAS /tmp/ccloipGv.s page 353
+ ARM GAS /tmp/cckyvfTO.s page 353
9391 0018 002A cmp r2, #0
@@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9430 004a 292B cmp r3, #41
9431 004c 3DD0 beq .L606
4388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 354
+ ARM GAS /tmp/cckyvfTO.s page 354
9432 .loc 1 4388 10 is_stmt 1 view .LVU3326
@@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = XferOptions;
9468 .loc 1 4425 29 is_stmt 0 view .LVU3345
9469 0076 638D ldrh r3, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 355
+ ARM GAS /tmp/cckyvfTO.s page 355
4425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions = XferOptions;
@@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9505 0098 1365 str r3, [r2, #80]
4442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize);
9506 .loc 1 4442 7 is_stmt 1 view .LVU3365
- ARM GAS /tmp/ccloipGv.s page 356
+ ARM GAS /tmp/cckyvfTO.s page 356
4442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (uint32_t)pData, hi2c->XferSize);
@@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9544 00c8 64E0 b .L593
9545 .LVL662:
9546 .L606:
- ARM GAS /tmp/ccloipGv.s page 357
+ ARM GAS /tmp/cckyvfTO.s page 357
4366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9584 00f6 0028 cmp r0, #0
9585 00f8 AED0 beq .L596
4383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 358
+ ARM GAS /tmp/cckyvfTO.s page 358
9586 .loc 1 4383 13 is_stmt 1 view .LVU3400
@@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9623 0120 FFF7FEFF bl HAL_DMA_Abort_IT
9624 .LVL666:
4402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 359
+ ARM GAS /tmp/cckyvfTO.s page 359
9625 .loc 1 4402 14 discriminator 1 view .LVU3418
@@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9662 .LVL669:
9663 .L598:
4463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 360
+ ARM GAS /tmp/cckyvfTO.s page 360
9664 .loc 1 4463 7 is_stmt 1 view .LVU3436
@@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
9702 .loc 1 4495 25 view .LVU3453
9703 0176 43F40043 orr r3, r3, #32768
- ARM GAS /tmp/ccloipGv.s page 361
+ ARM GAS /tmp/cckyvfTO.s page 361
9704 017a 1360 str r3, [r2]
@@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9747 01a4 00000000 .word I2C_DMAError
9748 01a8 00000000 .word I2C_DMAAbort
9749 .cfi_endproc
- ARM GAS /tmp/ccloipGv.s page 362
+ ARM GAS /tmp/cckyvfTO.s page 362
9750 .LFE171:
@@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
9795 .loc 1 4525 5 is_stmt 1 view .LVU3476
9796 001a 4FF40041 mov r1, #32768
- ARM GAS /tmp/ccloipGv.s page 363
+ ARM GAS /tmp/cckyvfTO.s page 363
9797 001e FFF7FEFF bl I2C_Enable_IRQ
@@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9843 .cfi_offset 4, -8
9844 .cfi_offset 14, -4
4549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = tmp | (uint32_t)(hi2c->Mode);
- ARM GAS /tmp/ccloipGv.s page 364
+ ARM GAS /tmp/cckyvfTO.s page 364
9845 .loc 1 4549 5 is_stmt 1 view .LVU3487
@@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9884 .global HAL_I2C_Master_Abort_IT
9885 .syntax unified
9886 .thumb
- ARM GAS /tmp/ccloipGv.s page 365
+ ARM GAS /tmp/cckyvfTO.s page 365
9887 .thumb_func
@@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9930 .loc 1 4584 5 view .LVU3515
4584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
9931 .loc 1 4584 13 is_stmt 0 view .LVU3516
- ARM GAS /tmp/ccloipGv.s page 366
+ ARM GAS /tmp/cckyvfTO.s page 366
9932 0024 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2
@@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
9972 .loc 1 4614 5 view .LVU3530
4614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
9973 .loc 1 4614 12 is_stmt 0 view .LVU3531
- ARM GAS /tmp/ccloipGv.s page 367
+ ARM GAS /tmp/cckyvfTO.s page 367
9974 005e 2846 mov r0, r5
@@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10018 .loc 1 4620 12 view .LVU3541
10019 007c 0120 movs r0, #1
10020 .LVL704:
- ARM GAS /tmp/ccloipGv.s page 368
+ ARM GAS /tmp/cckyvfTO.s page 368
4622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10068 .loc 1 4642 3 is_stmt 1 view .LVU3550
4642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
10069 .loc 1 4642 12 is_stmt 0 view .LVU3551
- ARM GAS /tmp/ccloipGv.s page 369
+ ARM GAS /tmp/cckyvfTO.s page 369
10070 0006 1A68 ldr r2, [r3]
@@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10119 @ args = 0, pretend = 0, frame = 0
10120 @ frame_needed = 0, uses_anonymous_args = 0
10121 @ link register save eliminated.
- ARM GAS /tmp/ccloipGv.s page 370
+ ARM GAS /tmp/cckyvfTO.s page 370
4728:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferISR = NULL;
10166 .loc 1 6082 25 is_stmt 0 view .LVU3573
10167 001a 1223 movs r3, #18
- ARM GAS /tmp/ccloipGv.s page 371
+ ARM GAS /tmp/cckyvfTO.s page 371
10168 001c 0363 str r3, [r0, #48]
@@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10206 .loc 1 6069 5 view .LVU3589
6069:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
10207 .loc 1 6069 5 view .LVU3590
- ARM GAS /tmp/ccloipGv.s page 372
+ ARM GAS /tmp/cckyvfTO.s page 372
10208 0048 84F84050 strb r5, [r4, #64]
@@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10258 .LFE180:
10260 .section .text.I2C_ITSlaveSeqCplt,"ax",%progbits
10261 .align 1
- ARM GAS /tmp/ccloipGv.s page 373
+ ARM GAS /tmp/cckyvfTO.s page 373
10262 .syntax unified
@@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10303 .loc 1 6128 3 view .LVU3612
6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
10304 .loc 1 6128 11 is_stmt 0 view .LVU3613
- ARM GAS /tmp/ccloipGv.s page 374
+ ARM GAS /tmp/cckyvfTO.s page 374
10305 001c 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2
@@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10344 .loc 1 6135 5 is_stmt 1 view .LVU3628
10345 004c 0121 movs r1, #1
10346 004e 2046 mov r0, r4
- ARM GAS /tmp/ccloipGv.s page 375
+ ARM GAS /tmp/cckyvfTO.s page 375
10347 .LVL727:
@@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10386 .LVL733:
6170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
10387 .loc 1 6170 3 view .LVU3644
- ARM GAS /tmp/ccloipGv.s page 376
+ ARM GAS /tmp/cckyvfTO.s page 376
6171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -22558,7 +22558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
10433 .loc 1 6839 9 is_stmt 0 view .LVU3656
10434 0012 0268 ldr r2, [r0]
- ARM GAS /tmp/ccloipGv.s page 377
+ ARM GAS /tmp/cckyvfTO.s page 377
6839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -22618,7 +22618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10478 .loc 1 6924 8 is_stmt 0 view .LVU3669
10479 0006 C36B ldr r3, [r0, #60]
10480 0008 1B68 ldr r3, [r3]
- ARM GAS /tmp/ccloipGv.s page 378
+ ARM GAS /tmp/cckyvfTO.s page 378
10481 000a 5B68 ldr r3, [r3, #4]
@@ -22678,7 +22678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4777:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(TransferDirection);
10526 .loc 1 4777 3 view .LVU3681
4778:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** UNUSED(AddrMatchCode);
- ARM GAS /tmp/ccloipGv.s page 379
+ ARM GAS /tmp/cckyvfTO.s page 379
10527 .loc 1 4778 3 view .LVU3682
@@ -22738,7 +22738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10570 .loc 1 6040 5 is_stmt 1 view .LVU3695
10571 0010 0368 ldr r3, [r0]
10572 0012 0822 movs r2, #8
- ARM GAS /tmp/ccloipGv.s page 380
+ ARM GAS /tmp/cckyvfTO.s page 380
10573 0014 DA61 str r2, [r3, #28]
@@ -22798,7 +22798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
10611 .loc 1 5976 5 is_stmt 1 view .LVU3712
5976:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 381
+ ARM GAS /tmp/cckyvfTO.s page 381
10612 .loc 1 5976 19 is_stmt 0 view .LVU3713
@@ -22858,7 +22858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10649 .loc 1 5991 11 view .LVU3730
10650 005e 84F84010 strb r1, [r4, #64]
5991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 382
+ ARM GAS /tmp/cckyvfTO.s page 382
10651 .loc 1 5991 11 view .LVU3731
@@ -22918,7 +22918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10692 0098 2046 mov r0, r4
10693 009a FFF7FEFF bl HAL_I2C_AddrCallback
10694 .LVL766:
- ARM GAS /tmp/ccloipGv.s page 383
+ ARM GAS /tmp/cckyvfTO.s page 383
10695 009e BDE7 b .L668
@@ -22978,7 +22978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->State = HAL_I2C_STATE_READY;
10745 .loc 1 6542 23 is_stmt 0 view .LVU3753
10746 0008 0023 movs r3, #0
- ARM GAS /tmp/ccloipGv.s page 384
+ ARM GAS /tmp/cckyvfTO.s page 384
10747 000a 0363 str r3, [r0, #48]
@@ -23038,7 +23038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--;
10782 .loc 1 6558 7 is_stmt 1 view .LVU3773
6558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--;
- ARM GAS /tmp/ccloipGv.s page 385
+ ARM GAS /tmp/cckyvfTO.s page 385
10783 .loc 1 6558 21 is_stmt 0 view .LVU3774
@@ -23098,7 +23098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
10823 .loc 1 6581 1 is_stmt 0 view .LVU3789
10824 0062 10BD pop {r4, pc}
- ARM GAS /tmp/ccloipGv.s page 386
+ ARM GAS /tmp/cckyvfTO.s page 386
10825 .LVL773:
@@ -23158,7 +23158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10877 .align 1
10878 .weak HAL_I2C_ErrorCallback
10879 .syntax unified
- ARM GAS /tmp/ccloipGv.s page 387
+ ARM GAS /tmp/cckyvfTO.s page 387
10880 .thumb
@@ -23218,7 +23218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10931 .loc 1 6721 1 is_stmt 0 view .LVU3804
10932 0000 08B5 push {r3, lr}
10933 .LCFI121:
- ARM GAS /tmp/ccloipGv.s page 388
+ ARM GAS /tmp/cckyvfTO.s page 388
10934 .cfi_def_cfa_offset 8
@@ -23278,7 +23278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
10971 .loc 1 6728 5 view .LVU3821
6734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
10972 .loc 1 6734 5 view .LVU3822
- ARM GAS /tmp/ccloipGv.s page 389
+ ARM GAS /tmp/cckyvfTO.s page 389
10973 0028 FFF7FEFF bl HAL_I2C_AbortCpltCallback
@@ -23338,7 +23338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11016 .loc 1 6598 23 is_stmt 0 view .LVU3835
11017 0012 6285 strh r2, [r4, #42] @ movhi
6601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 390
+ ARM GAS /tmp/cckyvfTO.s page 390
11018 .loc 1 6601 3 is_stmt 1 view .LVU3836
@@ -23398,7 +23398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11056 0036 A26B ldr r2, [r4, #56]
6650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_TX)))
11057 .loc 1 6650 6 view .LVU3853
- ARM GAS /tmp/ccloipGv.s page 391
+ ARM GAS /tmp/cckyvfTO.s page 391
11058 0038 002A cmp r2, #0
@@ -23458,7 +23458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11096 .loc 1 6665 7 view .LVU3869
11097 0066 0023 movs r3, #0
11098 0068 84F84030 strb r3, [r4, #64]
- ARM GAS /tmp/ccloipGv.s page 392
+ ARM GAS /tmp/cckyvfTO.s page 392
6665:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -23518,7 +23518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
11138 .loc 1 6628 27 is_stmt 0 view .LVU3885
11139 0098 2023 movs r3, #32
- ARM GAS /tmp/ccloipGv.s page 393
+ ARM GAS /tmp/cckyvfTO.s page 393
11140 009a 84F84130 strb r3, [r4, #65]
@@ -23578,7 +23578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11180 00ce 28E0 b .L690
11181 .LVL800:
11182 .L695:
- ARM GAS /tmp/ccloipGv.s page 394
+ ARM GAS /tmp/cckyvfTO.s page 394
6680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (tmppreviousstate == I2C_STATE_SLAVE_BUSY_RX)))
@@ -23638,7 +23638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11220 .loc 1 6692 39 view .LVU3916
11221 00fa 0C4A ldr r2, .L703+8
11222 00fc 1A65 str r2, [r3, #80]
- ARM GAS /tmp/ccloipGv.s page 395
+ ARM GAS /tmp/cckyvfTO.s page 395
6695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -23698,7 +23698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11263 .L703:
11264 0124 0000FFFF .word -65536
11265 0128 00000000 .word I2C_Slave_ISR_IT
- ARM GAS /tmp/ccloipGv.s page 396
+ ARM GAS /tmp/cckyvfTO.s page 396
11266 012c 00000000 .word I2C_DMAAbort
@@ -23758,7 +23758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11311 0010 2021 movs r1, #32
11312 .LVL813:
6330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 397
+ ARM GAS /tmp/cckyvfTO.s page 397
11313 .loc 1 6330 3 is_stmt 0 view .LVU3942
@@ -23818,7 +23818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11356 0042 23F0FF73 bic r3, r3, #33423360
11357 0046 23F48B33 bic r3, r3, #71168
11358 004a 23F4FF73 bic r3, r3, #510
- ARM GAS /tmp/ccloipGv.s page 398
+ ARM GAS /tmp/cckyvfTO.s page 398
11359 004e 23F00103 bic r3, r3, #1
@@ -23878,7 +23878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
11396 .loc 1 6392 5 is_stmt 1 view .LVU3971
6392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 399
+ ARM GAS /tmp/cckyvfTO.s page 399
11397 .loc 1 6392 16 is_stmt 0 view .LVU3972
@@ -23938,7 +23938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
11434 .loc 1 6408 11 is_stmt 0 view .LVU3990
11435 00a0 638D ldrh r3, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 400
+ ARM GAS /tmp/cckyvfTO.s page 400
11436 00a2 9BB2 uxth r3, r3
@@ -23998,7 +23998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11474 00d4 43D0 beq .L726
11475 .L718:
6445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 401
+ ARM GAS /tmp/cckyvfTO.s page 401
11476 .loc 1 6445 9 is_stmt 1 view .LVU4007
@@ -24058,7 +24058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11513 0102 0023 movs r3, #0
11514 0104 2363 str r3, [r4, #48]
6521:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 402
+ ARM GAS /tmp/cckyvfTO.s page 402
11515 .loc 1 6521 5 is_stmt 1 view .LVU4025
@@ -24118,7 +24118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
11555 .loc 1 6376 19 view .LVU4040
11556 0136 1368 ldr r3, [r2]
- ARM GAS /tmp/ccloipGv.s page 403
+ ARM GAS /tmp/cckyvfTO.s page 403
6376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -24178,7 +24178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
11598 .loc 1 6440 9 view .LVU4054
11599 0170 2046 mov r0, r4
- ARM GAS /tmp/ccloipGv.s page 404
+ ARM GAS /tmp/cckyvfTO.s page 404
11600 0172 FFF7FEFF bl I2C_ITSlaveSeqCplt
@@ -24238,7 +24238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
11640 .loc 1 6474 8 view .LVU4069
11641 01a8 282B cmp r3, #40
- ARM GAS /tmp/ccloipGv.s page 405
+ ARM GAS /tmp/cckyvfTO.s page 405
11642 01aa 13D1 bne .L705
@@ -24298,7 +24298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11681 01d6 2023 movs r3, #32
11682 01d8 84F84130 strb r3, [r4, #65]
6503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 406
+ ARM GAS /tmp/cckyvfTO.s page 406
11683 .loc 1 6503 5 is_stmt 1 view .LVU4085
@@ -24358,7 +24358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11728 .loc 1 5264 3 view .LVU4096
5264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
11729 .loc 1 5264 3 view .LVU4097
- ARM GAS /tmp/ccloipGv.s page 407
+ ARM GAS /tmp/cckyvfTO.s page 407
11730 0006 94F84030 ldrb r3, [r4, #64] @ zero_extendqisi2
@@ -24418,7 +24418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11768 003e 94F84130 ldrb r3, [r4, #65] @ zero_extendqisi2
11769 0042 DBB2 uxtb r3, r3
5289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 408
+ ARM GAS /tmp/cckyvfTO.s page 408
11770 .loc 1 5289 15 view .LVU4114
@@ -24478,7 +24478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
11811 .loc 1 5287 9 view .LVU4128
11812 006a F4E7 b .L735
- ARM GAS /tmp/ccloipGv.s page 409
+ ARM GAS /tmp/cckyvfTO.s page 409
11813 .LVL843:
@@ -24538,7 +24538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11854 009c DBD1 bne .L735
5319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
11855 .loc 1 5319 9 is_stmt 1 view .LVU4142
- ARM GAS /tmp/ccloipGv.s page 410
+ ARM GAS /tmp/cckyvfTO.s page 410
5319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -24598,7 +24598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
11894 .loc 1 5332 21 view .LVU4159
11895 00c4 0133 adds r3, r3, #1
- ARM GAS /tmp/ccloipGv.s page 411
+ ARM GAS /tmp/cckyvfTO.s page 411
11896 00c6 6362 str r3, [r4, #36]
@@ -24658,7 +24658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11935 00f2 02D0 beq .L742
5345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_ADDRI) != RESET))
11936 .loc 1 5345 65 discriminator 1 view .LVU4175
- ARM GAS /tmp/ccloipGv.s page 412
+ ARM GAS /tmp/cckyvfTO.s page 412
11937 00f4 12F0080F tst r2, #8
@@ -24718,7 +24718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
11974 011e 013B subs r3, r3, #1
11975 0120 9BB2 uxth r3, r3
11976 0122 6385 strh r3, [r4, #42] @ movhi
- ARM GAS /tmp/ccloipGv.s page 413
+ ARM GAS /tmp/cckyvfTO.s page 413
5366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -24778,7 +24778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12018 .LFE192:
12020 .section .text.I2C_ITMasterCplt,"ax",%progbits
12021 .align 1
- ARM GAS /tmp/ccloipGv.s page 414
+ ARM GAS /tmp/cckyvfTO.s page 414
12022 .syntax unified
@@ -24838,7 +24838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12065 001e 222B cmp r3, #34
12066 0020 34D0 beq .L763
12067 .LVL869:
- ARM GAS /tmp/ccloipGv.s page 415
+ ARM GAS /tmp/cckyvfTO.s page 415
12068 .L752:
@@ -24898,7 +24898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12107 005e 1BD0 beq .L764
12108 .L754:
6229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 416
+ ARM GAS /tmp/cckyvfTO.s page 416
12109 .loc 1 6229 3 is_stmt 1 view .LVU4233
@@ -24958,7 +24958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12151 .LVL875:
6192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
12152 .loc 1 6192 5 is_stmt 1 view .LVU4246
- ARM GAS /tmp/ccloipGv.s page 417
+ ARM GAS /tmp/cckyvfTO.s page 417
6192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -25018,7 +25018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12193 00b2 17D0 beq .L765
6276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
12194 .loc 1 6276 8 is_stmt 1 view .LVU4261
- ARM GAS /tmp/ccloipGv.s page 418
+ ARM GAS /tmp/cckyvfTO.s page 418
6276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -25078,7 +25078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12232 .L765:
6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE;
12233 .loc 1 6243 5 is_stmt 1 view .LVU4279
- ARM GAS /tmp/ccloipGv.s page 419
+ ARM GAS /tmp/cckyvfTO.s page 419
6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->PreviousState = I2C_STATE_NONE;
@@ -25138,7 +25138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
12271 .loc 1 6251 7 view .LVU4297
6257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
- ARM GAS /tmp/ccloipGv.s page 420
+ ARM GAS /tmp/cckyvfTO.s page 420
12272 .loc 1 6257 7 view .LVU4298
@@ -25198,7 +25198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12315 0004 012B cmp r3, #1
12316 0006 00F0CF80 beq .L784
4941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t devaddress;
- ARM GAS /tmp/ccloipGv.s page 421
+ ARM GAS /tmp/cckyvfTO.s page 421
12317 .loc 1 4941 1 is_stmt 0 view .LVU4312
@@ -25258,7 +25258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12358 0038 5A6A ldr r2, [r3, #36]
12359 .LVL889:
4969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 422
+ ARM GAS /tmp/cckyvfTO.s page 422
12360 .loc 1 4969 10 view .LVU4326
@@ -25318,7 +25318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12398 0064 84F84000 strb r0, [r4, #64]
5085:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
12399 .loc 1 5085 3 view .LVU4343
- ARM GAS /tmp/ccloipGv.s page 423
+ ARM GAS /tmp/cckyvfTO.s page 423
5087:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
@@ -25378,7 +25378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12441 0094 13D0 beq .L773
4982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
12442 .loc 1 4982 5 is_stmt 1 view .LVU4357
- ARM GAS /tmp/ccloipGv.s page 424
+ ARM GAS /tmp/cckyvfTO.s page 424
4982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -25438,7 +25438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12481 .L773:
4994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
12482 .loc 1 4994 8 is_stmt 1 view .LVU4374
- ARM GAS /tmp/ccloipGv.s page 425
+ ARM GAS /tmp/cckyvfTO.s page 425
4994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TCI) != RESET))
@@ -25498,7 +25498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5004:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
12521 .loc 1 5004 12 view .LVU4391
12522 00ea 13F4803F tst r3, #65536
- ARM GAS /tmp/ccloipGv.s page 426
+ ARM GAS /tmp/cckyvfTO.s page 426
12523 00ee 0BD0 beq .L777
@@ -25558,7 +25558,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12562 .loc 1 5020 34 is_stmt 0 view .LVU4406
12563 011c E36A ldr r3, [r4, #44]
5019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferOptions, I2C_NO_STARTSTOP);
- ARM GAS /tmp/ccloipGv.s page 427
+ ARM GAS /tmp/cckyvfTO.s page 427
12564 .loc 1 5019 11 view .LVU4407
@@ -25618,7 +25618,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12607 .L780:
5041:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
12608 .loc 1 5041 9 is_stmt 1 view .LVU4419
- ARM GAS /tmp/ccloipGv.s page 428
+ ARM GAS /tmp/cckyvfTO.s page 428
12609 0150 4021 movs r1, #64
@@ -25678,7 +25678,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
12648 .loc 1 5056 11 is_stmt 1 view .LVU4435
5056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 429
+ ARM GAS /tmp/cckyvfTO.s page 429
12649 .loc 1 5056 25 is_stmt 0 view .LVU4436
@@ -25738,7 +25738,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12693 .loc 1 4946 3 is_stmt 0 discriminator 1 view .LVU4446
12694 01a8 0220 movs r0, #2
12695 .LVL926:
- ARM GAS /tmp/ccloipGv.s page 430
+ ARM GAS /tmp/cckyvfTO.s page 430
5088:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -25798,7 +25798,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12741 .L793:
5570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
12742 .loc 1 5570 8 is_stmt 1 view .LVU4458
- ARM GAS /tmp/ccloipGv.s page 431
+ ARM GAS /tmp/cckyvfTO.s page 431
5570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
@@ -25858,7 +25858,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12782 0044 0368 ldr r3, [r0]
12783 0046 1022 movs r2, #16
12784 .LVL931:
- ARM GAS /tmp/ccloipGv.s page 432
+ ARM GAS /tmp/cckyvfTO.s page 432
5557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -25918,7 +25918,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12824 0078 11F0200F tst r1, #32
12825 007c DDD0 beq .L794
5684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
- ARM GAS /tmp/ccloipGv.s page 433
+ ARM GAS /tmp/cckyvfTO.s page 433
12826 .loc 1 5684 63 discriminator 1 view .LVU4489
@@ -25978,7 +25978,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
12867 .loc 1 5594 9 is_stmt 1 view .LVU4503
5594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 434
+ ARM GAS /tmp/cckyvfTO.s page 434
12868 .loc 1 5594 13 is_stmt 0 view .LVU4504
@@ -26038,7 +26038,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
12909 .loc 1 5622 9 is_stmt 1 view .LVU4518
5622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 435
+ ARM GAS /tmp/cckyvfTO.s page 435
12910 .loc 1 5622 13 is_stmt 0 view .LVU4519
@@ -26098,7 +26098,7 @@ ARM GAS /tmp/ccloipGv.s page 1
12950 .loc 1 5618 29 view .LVU4533
12951 0118 43F40043 orr r3, r3, #32768
12952 011c 1360 str r3, [r2]
- ARM GAS /tmp/ccloipGv.s page 436
+ ARM GAS /tmp/cckyvfTO.s page 436
12953 011e 8CE7 b .L794
@@ -26158,7 +26158,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
12995 .loc 1 5649 7 is_stmt 1 view .LVU4546
5649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 437
+ ARM GAS /tmp/cckyvfTO.s page 437
12996 .loc 1 5649 11 is_stmt 0 view .LVU4547
@@ -26218,7 +26218,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13036 0182 222B cmp r3, #34
13037 0184 17D0 beq .L820
5681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 438
+ ARM GAS /tmp/cckyvfTO.s page 438
13038 .loc 1 5681 7 is_stmt 1 view .LVU4562
@@ -26278,7 +26278,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_AUTOEND_MODE, direction);
13079 .loc 1 5667 7 view .LVU4576
13080 01b4 DCE7 b .L808
- ARM GAS /tmp/ccloipGv.s page 439
+ ARM GAS /tmp/cckyvfTO.s page 439
13081 .L820:
@@ -26338,7 +26338,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13129 .cfi_offset 6, -8
13130 .cfi_offset 14, -4
13131 0002 0446 mov r4, r0
- ARM GAS /tmp/ccloipGv.s page 440
+ ARM GAS /tmp/cckyvfTO.s page 440
5712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t treatdmanack = 0U;
@@ -26398,7 +26398,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13169 003c 5ED0 beq .L829
13170 .L828:
5737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 441
+ ARM GAS /tmp/cckyvfTO.s page 441
13171 .loc 1 5737 7 is_stmt 1 view .LVU4602
@@ -26458,7 +26458,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5751:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
13210 .loc 1 5751 9 is_stmt 1 view .LVU4618
5751:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 442
+ ARM GAS /tmp/cckyvfTO.s page 442
13211 .loc 1 5751 12 is_stmt 0 view .LVU4619
@@ -26518,7 +26518,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13249 .loc 1 5801 11 is_stmt 0 view .LVU4635
13250 008e 092B cmp r3, #9
13251 0090 2CD8 bhi .L836
- ARM GAS /tmp/ccloipGv.s page 443
+ ARM GAS /tmp/cckyvfTO.s page 443
13252 0092 DFE803F0 tbb [pc, r3]
@@ -26578,7 +26578,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** /* Same action must be done for (tmpoptions == I2C_LAST_FRAME) which removed for
13297 .loc 1 5762 51 discriminator 1 view .LVU4645
13298 00c0 B0F1007F cmp r0, #33554432
- ARM GAS /tmp/ccloipGv.s page 444
+ ARM GAS /tmp/cckyvfTO.s page 444
13299 00c4 F3D1 bne .L834
@@ -26638,7 +26638,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
13340 .loc 1 5815 11 view .LVU4659
5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 445
+ ARM GAS /tmp/cckyvfTO.s page 445
13341 .loc 1 5815 33 is_stmt 0 view .LVU4660
@@ -26698,7 +26698,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13382 .loc 1 5836 3 view .LVU4673
13383 0110 0020 movs r0, #0
13384 0112 84F84000 strb r0, [r4, #64]
- ARM GAS /tmp/ccloipGv.s page 446
+ ARM GAS /tmp/cckyvfTO.s page 446
5836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -26758,7 +26758,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13428 0004 012B cmp r3, #1
13429 0006 00F0A380 beq .L863
5399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint16_t devaddress;
- ARM GAS /tmp/ccloipGv.s page 447
+ ARM GAS /tmp/cckyvfTO.s page 447
13430 .loc 1 5399 1 is_stmt 0 view .LVU4687
@@ -26818,7 +26818,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13471 003c 002B cmp r3, #0
13472 003e 4FD0 beq .L854
5432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 448
+ ARM GAS /tmp/cckyvfTO.s page 448
13473 .loc 1 5432 7 is_stmt 1 view .LVU4701
@@ -26878,7 +26878,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13511 .loc 1 5413 9 is_stmt 0 view .LVU4717
13512 0068 436C ldr r3, [r0, #68]
5413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 449
+ ARM GAS /tmp/cckyvfTO.s page 449
13513 .loc 1 5413 21 view .LVU4718
@@ -26938,7 +26938,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
13554 .loc 1 5450 30 is_stmt 0 view .LVU4732
13555 0090 638D ldrh r3, [r4, #42]
- ARM GAS /tmp/ccloipGv.s page 450
+ ARM GAS /tmp/cckyvfTO.s page 450
5450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** if (hi2c->XferOptions != I2C_NO_OPTION_FRAME)
@@ -26998,7 +26998,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
13595 .loc 1 5474 9 is_stmt 1 view .LVU4748
5474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 451
+ ARM GAS /tmp/cckyvfTO.s page 451
13596 .loc 1 5474 13 is_stmt 0 view .LVU4749
@@ -27058,7 +27058,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13637 .LVL1014:
13638 .L859:
5489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
- ARM GAS /tmp/ccloipGv.s page 452
+ ARM GAS /tmp/cckyvfTO.s page 452
13639 .loc 1 5489 9 is_stmt 1 view .LVU4763
@@ -27118,7 +27118,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13678 .loc 1 5504 11 is_stmt 1 view .LVU4778
5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
13679 .loc 1 5504 25 is_stmt 0 view .LVU4779
- ARM GAS /tmp/ccloipGv.s page 453
+ ARM GAS /tmp/cckyvfTO.s page 453
13680 0120 5A68 ldr r2, [r3, #4]
@@ -27178,7 +27178,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13721 .LVL1028:
5524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
13722 .loc 1 5524 5 view .LVU4793
- ARM GAS /tmp/ccloipGv.s page 454
+ ARM GAS /tmp/cckyvfTO.s page 454
13723 014e 95E7 b .L852
@@ -27238,7 +27238,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13769 0006 7BB1 cbz r3, .L875
6955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
13770 .loc 1 6955 5 is_stmt 1 view .LVU4804
- ARM GAS /tmp/ccloipGv.s page 455
+ ARM GAS /tmp/cckyvfTO.s page 455
6955:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
@@ -27298,7 +27298,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13809 .loc 1 6949 12 view .LVU4820
13810 0028 0025 movs r5, #0
13811 002a F1E7 b .L872
- ARM GAS /tmp/ccloipGv.s page 456
+ ARM GAS /tmp/cckyvfTO.s page 456
13812 .L876:
@@ -27358,7 +27358,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13857 0002 846B ldr r4, [r0, #56]
13858 .LVL1041:
6785:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
- ARM GAS /tmp/ccloipGv.s page 457
+ ARM GAS /tmp/cckyvfTO.s page 457
13859 .loc 1 6785 3 is_stmt 1 view .LVU4832
@@ -27418,7 +27418,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6810:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferSize) != HAL_OK)
13896 .loc 1 6810 9 view .LVU4850
13897 002a 238D ldrh r3, [r4, #40]
- ARM GAS /tmp/ccloipGv.s page 458
+ ARM GAS /tmp/cckyvfTO.s page 458
13898 002c 2832 adds r2, r2, #40
@@ -27478,7 +27478,7 @@ ARM GAS /tmp/ccloipGv.s page 1
13941 .cfi_endproc
13942 .LFE207:
13944 .section .text.I2C_DMAMasterReceiveCplt,"ax",%progbits
- ARM GAS /tmp/ccloipGv.s page 459
+ ARM GAS /tmp/cckyvfTO.s page 459
13945 .align 1
@@ -27538,7 +27538,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
13986 .loc 1 6877 20 view .LVU4876
13987 0018 1A44 add r2, r2, r3
- ARM GAS /tmp/ccloipGv.s page 460
+ ARM GAS /tmp/cckyvfTO.s page 460
13988 001a 6262 str r2, [r4, #36]
@@ -27598,7 +27598,7 @@ ARM GAS /tmp/ccloipGv.s page 1
6894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** }
14028 .loc 1 6894 22 view .LVU4891
14029 0046 2385 strh r3, [r4, #40] @ movhi
- ARM GAS /tmp/ccloipGv.s page 461
+ ARM GAS /tmp/cckyvfTO.s page 461
14030 .L893:
@@ -27658,7 +27658,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14076 @ frame_needed = 0, uses_anonymous_args = 0
5101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t tmpITFlags = ITFlags;
14077 .loc 1 5101 3 view .LVU4902
- ARM GAS /tmp/ccloipGv.s page 462
+ ARM GAS /tmp/cckyvfTO.s page 462
5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -27718,7 +27718,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14118 .loc 1 5125 16 is_stmt 0 view .LVU4916
14119 0032 25F00405 bic r5, r5, #4
14120 .LVL1062:
- ARM GAS /tmp/ccloipGv.s page 463
+ ARM GAS /tmp/cckyvfTO.s page 463
5128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -27778,7 +27778,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_STOPI) != RESET))
14158 .loc 1 5236 61 discriminator 1 view .LVU4934
14159 005a 16F0200F tst r6, #32
- ARM GAS /tmp/ccloipGv.s page 464
+ ARM GAS /tmp/cckyvfTO.s page 464
14160 005e 40F0A480 bne .L921
@@ -27838,7 +27838,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14200 0080 15F0020F tst r5, #2
14201 0084 1DD0 beq .L902
5136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** (I2C_CHECK_IT_SOURCE(ITSources, I2C_IT_TXI) != RESET))
- ARM GAS /tmp/ccloipGv.s page 465
+ ARM GAS /tmp/cckyvfTO.s page 465
14202 .loc 1 5136 65 discriminator 1 view .LVU4949
@@ -27898,7 +27898,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14239 .loc 1 5145 21 view .LVU4966
14240 00ac 0133 adds r3, r3, #1
14241 00ae 6362 str r3, [r4, #36]
- ARM GAS /tmp/ccloipGv.s page 466
+ ARM GAS /tmp/cckyvfTO.s page 466
5147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** hi2c->XferCount--;
@@ -27958,7 +27958,7 @@ ARM GAS /tmp/ccloipGv.s page 1
5164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
14280 .loc 1 5164 10 view .LVU4983
14281 00dc FF2B cmp r3, #255
- ARM GAS /tmp/ccloipGv.s page 467
+ ARM GAS /tmp/cckyvfTO.s page 467
14282 00de 15D9 bls .L906
@@ -28018,7 +28018,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14322 .loc 1 5180 30 is_stmt 0 view .LVU4997
14323 010c 628D ldrh r2, [r4, #42]
14324 .LVL1078:
- ARM GAS /tmp/ccloipGv.s page 468
+ ARM GAS /tmp/cckyvfTO.s page 468
5180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** I2C_TransferConfig(hi2c, (uint16_t)hi2c->Devaddress, (uint8_t)hi2c->XferSize,
@@ -28078,7 +28078,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14366 013c 8AD0 beq .L900
5196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
14367 .loc 1 5196 5 is_stmt 1 view .LVU5011
- ARM GAS /tmp/ccloipGv.s page 469
+ ARM GAS /tmp/cckyvfTO.s page 469
14368 013e 0121 movs r1, #1
@@ -28138,7 +28138,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14407 .loc 1 5211 24 is_stmt 0 view .LVU5026
14408 016c 0123 movs r3, #1
14409 016e 2385 strh r3, [r4, #40] @ movhi
- ARM GAS /tmp/ccloipGv.s page 470
+ ARM GAS /tmp/cckyvfTO.s page 470
14410 .L912:
@@ -28198,7 +28198,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14450 019a 4FF00073 mov r3, #33554432
14451 019e D2B2 uxtb r2, r2
14452 01a0 89B2 uxth r1, r1
- ARM GAS /tmp/ccloipGv.s page 471
+ ARM GAS /tmp/cckyvfTO.s page 471
14453 01a2 2046 mov r0, r4
@@ -28258,7 +28258,7 @@ ARM GAS /tmp/ccloipGv.s page 1
4658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** uint32_t itflags = READ_REG(hi2c->Instance->ISR);
14503 .loc 1 4658 1 is_stmt 0 view .LVU5047
14504 0000 10B5 push {r4, lr}
- ARM GAS /tmp/ccloipGv.s page 472
+ ARM GAS /tmp/cckyvfTO.s page 472
14505 .LCFI153:
@@ -28318,7 +28318,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14543 002c 07D0 beq .L927
4677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
14544 .loc 1 4677 5 is_stmt 1 view .LVU5064
- ARM GAS /tmp/ccloipGv.s page 473
+ ARM GAS /tmp/cckyvfTO.s page 473
4677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c ****
@@ -28378,7 +28378,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14584 .loc 1 4701 1 view .LVU5079
14585 0062 10BD pop {r4, pc}
14586 .LVL1108:
- ARM GAS /tmp/ccloipGv.s page 474
+ ARM GAS /tmp/cckyvfTO.s page 474
14587 .L931:
@@ -28438,7 +28438,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14630 .loc 1 6997 11 is_stmt 0 view .LVU5092
14631 000c C36B ldr r3, [r0, #60]
6997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c.c **** {
- ARM GAS /tmp/ccloipGv.s page 475
+ ARM GAS /tmp/cckyvfTO.s page 475
14632 .loc 1 6997 6 view .LVU5093
@@ -28498,7 +28498,7 @@ ARM GAS /tmp/ccloipGv.s page 1
14681 .loc 1 4904 1 is_stmt 1 view -0
14682 .cfi_startproc
14683 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccloipGv.s page 476
+ ARM GAS /tmp/cckyvfTO.s page 476
14684 @ frame_needed = 0, uses_anonymous_args = 0
@@ -28549,221 +28549,221 @@ ARM GAS /tmp/ccloipGv.s page 1
14725 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
14726 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h"
14727 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccloipGv.s page 477
+ ARM GAS /tmp/cckyvfTO.s page 477
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_i2c.c
- /tmp/ccloipGv.s:20 .text.I2C_Flush_TXDR:00000000 $t
- /tmp/ccloipGv.s:25 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR
- /tmp/ccloipGv.s:63 .text.I2C_TransferConfig:00000000 $t
- /tmp/ccloipGv.s:68 .text.I2C_TransferConfig:00000000 I2C_TransferConfig
- /tmp/ccloipGv.s:126 .text.I2C_Enable_IRQ:00000000 $t
- /tmp/ccloipGv.s:131 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ
- /tmp/ccloipGv.s:293 .text.I2C_Enable_IRQ:00000090 $d
- /tmp/ccloipGv.s:13416 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA
- /tmp/ccloipGv.s:13116 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA
- /tmp/ccloipGv.s:12707 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA
- /tmp/ccloipGv.s:300 .text.I2C_Disable_IRQ:00000000 $t
- /tmp/ccloipGv.s:305 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ
- /tmp/ccloipGv.s:429 .text.I2C_ConvertOtherXferOptions:00000000 $t
- /tmp/ccloipGv.s:434 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions
- /tmp/ccloipGv.s:475 .text.I2C_IsErrorOccurred:00000000 $t
- /tmp/ccloipGv.s:480 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred
- /tmp/ccloipGv.s:761 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t
- /tmp/ccloipGv.s:766 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout
- /tmp/ccloipGv.s:864 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t
- /tmp/ccloipGv.s:869 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout
- /tmp/ccloipGv.s:981 .text.I2C_RequestMemoryWrite:00000000 $t
- /tmp/ccloipGv.s:986 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite
- /tmp/ccloipGv.s:1105 .text.I2C_RequestMemoryWrite:00000078 $d
- /tmp/ccloipGv.s:1110 .text.I2C_RequestMemoryRead:00000000 $t
- /tmp/ccloipGv.s:1115 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead
- /tmp/ccloipGv.s:1234 .text.I2C_RequestMemoryRead:00000074 $d
- /tmp/ccloipGv.s:1239 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t
- /tmp/ccloipGv.s:1244 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout
- /tmp/ccloipGv.s:1342 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t
- /tmp/ccloipGv.s:1347 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout
- /tmp/ccloipGv.s:1512 .text.HAL_I2C_MspInit:00000000 $t
- /tmp/ccloipGv.s:1518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit
- /tmp/ccloipGv.s:1533 .text.HAL_I2C_Init:00000000 $t
- /tmp/ccloipGv.s:1539 .text.HAL_I2C_Init:00000000 HAL_I2C_Init
- /tmp/ccloipGv.s:1734 .text.HAL_I2C_Init:000000c4 $d
- /tmp/ccloipGv.s:1739 .text.HAL_I2C_MspDeInit:00000000 $t
- /tmp/ccloipGv.s:1745 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit
- /tmp/ccloipGv.s:1760 .text.HAL_I2C_DeInit:00000000 $t
- /tmp/ccloipGv.s:1766 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit
- /tmp/ccloipGv.s:1831 .text.HAL_I2C_Master_Transmit:00000000 $t
- /tmp/ccloipGv.s:1837 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit
- /tmp/ccloipGv.s:2197 .text.HAL_I2C_Master_Transmit:000001a0 $d
- /tmp/ccloipGv.s:2202 .text.HAL_I2C_Master_Receive:00000000 $t
- /tmp/ccloipGv.s:2208 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive
- /tmp/ccloipGv.s:2517 .text.HAL_I2C_Master_Receive:00000178 $d
- /tmp/ccloipGv.s:2522 .text.HAL_I2C_Slave_Transmit:00000000 $t
- /tmp/ccloipGv.s:2528 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit
- /tmp/ccloipGv.s:2980 .text.HAL_I2C_Slave_Receive:00000000 $t
- /tmp/ccloipGv.s:2986 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive
- /tmp/ccloipGv.s:3337 .text.HAL_I2C_Master_Transmit_IT:00000000 $t
- /tmp/ccloipGv.s:3343 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT
- /tmp/ccloipGv.s:3542 .text.HAL_I2C_Master_Transmit_IT:000000bc $d
- /tmp/ccloipGv.s:12303 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT
- /tmp/ccloipGv.s:3549 .text.HAL_I2C_Master_Receive_IT:00000000 $t
- /tmp/ccloipGv.s:3555 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT
- ARM GAS /tmp/ccloipGv.s page 478
+ /tmp/cckyvfTO.s:20 .text.I2C_Flush_TXDR:00000000 $t
+ /tmp/cckyvfTO.s:25 .text.I2C_Flush_TXDR:00000000 I2C_Flush_TXDR
+ /tmp/cckyvfTO.s:63 .text.I2C_TransferConfig:00000000 $t
+ /tmp/cckyvfTO.s:68 .text.I2C_TransferConfig:00000000 I2C_TransferConfig
+ /tmp/cckyvfTO.s:126 .text.I2C_Enable_IRQ:00000000 $t
+ /tmp/cckyvfTO.s:131 .text.I2C_Enable_IRQ:00000000 I2C_Enable_IRQ
+ /tmp/cckyvfTO.s:293 .text.I2C_Enable_IRQ:00000090 $d
+ /tmp/cckyvfTO.s:13416 .text.I2C_Master_ISR_DMA:00000000 I2C_Master_ISR_DMA
+ /tmp/cckyvfTO.s:13116 .text.I2C_Slave_ISR_DMA:00000000 I2C_Slave_ISR_DMA
+ /tmp/cckyvfTO.s:12707 .text.I2C_Mem_ISR_DMA:00000000 I2C_Mem_ISR_DMA
+ /tmp/cckyvfTO.s:300 .text.I2C_Disable_IRQ:00000000 $t
+ /tmp/cckyvfTO.s:305 .text.I2C_Disable_IRQ:00000000 I2C_Disable_IRQ
+ /tmp/cckyvfTO.s:429 .text.I2C_ConvertOtherXferOptions:00000000 $t
+ /tmp/cckyvfTO.s:434 .text.I2C_ConvertOtherXferOptions:00000000 I2C_ConvertOtherXferOptions
+ /tmp/cckyvfTO.s:475 .text.I2C_IsErrorOccurred:00000000 $t
+ /tmp/cckyvfTO.s:480 .text.I2C_IsErrorOccurred:00000000 I2C_IsErrorOccurred
+ /tmp/cckyvfTO.s:761 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 $t
+ /tmp/cckyvfTO.s:766 .text.I2C_WaitOnTXISFlagUntilTimeout:00000000 I2C_WaitOnTXISFlagUntilTimeout
+ /tmp/cckyvfTO.s:864 .text.I2C_WaitOnFlagUntilTimeout:00000000 $t
+ /tmp/cckyvfTO.s:869 .text.I2C_WaitOnFlagUntilTimeout:00000000 I2C_WaitOnFlagUntilTimeout
+ /tmp/cckyvfTO.s:981 .text.I2C_RequestMemoryWrite:00000000 $t
+ /tmp/cckyvfTO.s:986 .text.I2C_RequestMemoryWrite:00000000 I2C_RequestMemoryWrite
+ /tmp/cckyvfTO.s:1105 .text.I2C_RequestMemoryWrite:00000078 $d
+ /tmp/cckyvfTO.s:1110 .text.I2C_RequestMemoryRead:00000000 $t
+ /tmp/cckyvfTO.s:1115 .text.I2C_RequestMemoryRead:00000000 I2C_RequestMemoryRead
+ /tmp/cckyvfTO.s:1234 .text.I2C_RequestMemoryRead:00000074 $d
+ /tmp/cckyvfTO.s:1239 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 $t
+ /tmp/cckyvfTO.s:1244 .text.I2C_WaitOnSTOPFlagUntilTimeout:00000000 I2C_WaitOnSTOPFlagUntilTimeout
+ /tmp/cckyvfTO.s:1342 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 $t
+ /tmp/cckyvfTO.s:1347 .text.I2C_WaitOnRXNEFlagUntilTimeout:00000000 I2C_WaitOnRXNEFlagUntilTimeout
+ /tmp/cckyvfTO.s:1512 .text.HAL_I2C_MspInit:00000000 $t
+ /tmp/cckyvfTO.s:1518 .text.HAL_I2C_MspInit:00000000 HAL_I2C_MspInit
+ /tmp/cckyvfTO.s:1533 .text.HAL_I2C_Init:00000000 $t
+ /tmp/cckyvfTO.s:1539 .text.HAL_I2C_Init:00000000 HAL_I2C_Init
+ /tmp/cckyvfTO.s:1734 .text.HAL_I2C_Init:000000c4 $d
+ /tmp/cckyvfTO.s:1739 .text.HAL_I2C_MspDeInit:00000000 $t
+ /tmp/cckyvfTO.s:1745 .text.HAL_I2C_MspDeInit:00000000 HAL_I2C_MspDeInit
+ /tmp/cckyvfTO.s:1760 .text.HAL_I2C_DeInit:00000000 $t
+ /tmp/cckyvfTO.s:1766 .text.HAL_I2C_DeInit:00000000 HAL_I2C_DeInit
+ /tmp/cckyvfTO.s:1831 .text.HAL_I2C_Master_Transmit:00000000 $t
+ /tmp/cckyvfTO.s:1837 .text.HAL_I2C_Master_Transmit:00000000 HAL_I2C_Master_Transmit
+ /tmp/cckyvfTO.s:2197 .text.HAL_I2C_Master_Transmit:000001a0 $d
+ /tmp/cckyvfTO.s:2202 .text.HAL_I2C_Master_Receive:00000000 $t
+ /tmp/cckyvfTO.s:2208 .text.HAL_I2C_Master_Receive:00000000 HAL_I2C_Master_Receive
+ /tmp/cckyvfTO.s:2517 .text.HAL_I2C_Master_Receive:00000178 $d
+ /tmp/cckyvfTO.s:2522 .text.HAL_I2C_Slave_Transmit:00000000 $t
+ /tmp/cckyvfTO.s:2528 .text.HAL_I2C_Slave_Transmit:00000000 HAL_I2C_Slave_Transmit
+ /tmp/cckyvfTO.s:2980 .text.HAL_I2C_Slave_Receive:00000000 $t
+ /tmp/cckyvfTO.s:2986 .text.HAL_I2C_Slave_Receive:00000000 HAL_I2C_Slave_Receive
+ /tmp/cckyvfTO.s:3337 .text.HAL_I2C_Master_Transmit_IT:00000000 $t
+ /tmp/cckyvfTO.s:3343 .text.HAL_I2C_Master_Transmit_IT:00000000 HAL_I2C_Master_Transmit_IT
+ /tmp/cckyvfTO.s:3542 .text.HAL_I2C_Master_Transmit_IT:000000bc $d
+ /tmp/cckyvfTO.s:12303 .text.I2C_Master_ISR_IT:00000000 I2C_Master_ISR_IT
+ /tmp/cckyvfTO.s:3549 .text.HAL_I2C_Master_Receive_IT:00000000 $t
+ /tmp/cckyvfTO.s:3555 .text.HAL_I2C_Master_Receive_IT:00000000 HAL_I2C_Master_Receive_IT
+ ARM GAS /tmp/cckyvfTO.s page 478
- /tmp/ccloipGv.s:3708 .text.HAL_I2C_Master_Receive_IT:0000008c $d
- /tmp/ccloipGv.s:3715 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t
- /tmp/ccloipGv.s:3721 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT
- /tmp/ccloipGv.s:3865 .text.HAL_I2C_Slave_Transmit_IT:00000084 $d
- /tmp/ccloipGv.s:11709 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT
- /tmp/ccloipGv.s:3871 .text.HAL_I2C_Slave_Receive_IT:00000000 $t
- /tmp/ccloipGv.s:3877 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT
- /tmp/ccloipGv.s:3980 .text.HAL_I2C_Slave_Receive_IT:0000005c $d
- /tmp/ccloipGv.s:3986 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t
- /tmp/ccloipGv.s:3992 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA
- /tmp/ccloipGv.s:4340 .text.HAL_I2C_Master_Transmit_DMA:0000015c $d
- /tmp/ccloipGv.s:13842 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt
- /tmp/ccloipGv.s:13744 .text.I2C_DMAError:00000000 I2C_DMAError
- /tmp/ccloipGv.s:4350 .text.HAL_I2C_Master_Receive_DMA:00000000 $t
- /tmp/ccloipGv.s:4356 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA
- /tmp/ccloipGv.s:4658 .text.HAL_I2C_Master_Receive_DMA:00000138 $d
- /tmp/ccloipGv.s:13950 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt
- /tmp/ccloipGv.s:4668 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t
- /tmp/ccloipGv.s:4674 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA
- /tmp/ccloipGv.s:4979 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d
- /tmp/ccloipGv.s:10399 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt
- /tmp/ccloipGv.s:4987 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t
- /tmp/ccloipGv.s:4993 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA
- /tmp/ccloipGv.s:5215 .text.HAL_I2C_Slave_Receive_DMA:000000e4 $d
- /tmp/ccloipGv.s:10456 .text.I2C_DMASlaveReceiveCplt:00000000 I2C_DMASlaveReceiveCplt
- /tmp/ccloipGv.s:5223 .text.HAL_I2C_Mem_Write:00000000 $t
- /tmp/ccloipGv.s:5229 .text.HAL_I2C_Mem_Write:00000000 HAL_I2C_Mem_Write
- /tmp/ccloipGv.s:5587 .text.HAL_I2C_Mem_Read:00000000 $t
- /tmp/ccloipGv.s:5593 .text.HAL_I2C_Mem_Read:00000000 HAL_I2C_Mem_Read
- /tmp/ccloipGv.s:5951 .text.HAL_I2C_Mem_Read:000001ac $d
- /tmp/ccloipGv.s:5956 .text.HAL_I2C_Mem_Write_IT:00000000 $t
- /tmp/ccloipGv.s:5962 .text.HAL_I2C_Mem_Write_IT:00000000 HAL_I2C_Mem_Write_IT
- /tmp/ccloipGv.s:6139 .text.HAL_I2C_Mem_Write_IT:000000ac $d
- /tmp/ccloipGv.s:14070 .text.I2C_Mem_ISR_IT:00000000 I2C_Mem_ISR_IT
- /tmp/ccloipGv.s:6146 .text.HAL_I2C_Mem_Read_IT:00000000 $t
- /tmp/ccloipGv.s:6152 .text.HAL_I2C_Mem_Read_IT:00000000 HAL_I2C_Mem_Read_IT
- /tmp/ccloipGv.s:6326 .text.HAL_I2C_Mem_Read_IT:000000a8 $d
- /tmp/ccloipGv.s:6333 .text.HAL_I2C_Mem_Write_DMA:00000000 $t
- /tmp/ccloipGv.s:6339 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA
- /tmp/ccloipGv.s:6624 .text.HAL_I2C_Mem_Write_DMA:00000120 $d
- /tmp/ccloipGv.s:6633 .text.HAL_I2C_Mem_Read_DMA:00000000 $t
- /tmp/ccloipGv.s:6639 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA
- /tmp/ccloipGv.s:6926 .text.HAL_I2C_Mem_Read_DMA:00000120 $d
- /tmp/ccloipGv.s:6935 .text.HAL_I2C_IsDeviceReady:00000000 $t
- /tmp/ccloipGv.s:6941 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady
- /tmp/ccloipGv.s:7232 .text.HAL_I2C_IsDeviceReady:00000134 $d
- /tmp/ccloipGv.s:7238 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t
- /tmp/ccloipGv.s:7244 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT
- /tmp/ccloipGv.s:7511 .text.HAL_I2C_Master_Seq_Transmit_IT:00000104 $d
- /tmp/ccloipGv.s:7517 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t
- /tmp/ccloipGv.s:7523 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA
- /tmp/ccloipGv.s:7945 .text.HAL_I2C_Master_Seq_Transmit_DMA:000001d0 $d
- /tmp/ccloipGv.s:7954 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t
- /tmp/ccloipGv.s:7960 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT
- /tmp/ccloipGv.s:8148 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d
- /tmp/ccloipGv.s:8154 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t
- /tmp/ccloipGv.s:8160 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA
- ARM GAS /tmp/ccloipGv.s page 479
+ /tmp/cckyvfTO.s:3708 .text.HAL_I2C_Master_Receive_IT:0000008c $d
+ /tmp/cckyvfTO.s:3715 .text.HAL_I2C_Slave_Transmit_IT:00000000 $t
+ /tmp/cckyvfTO.s:3721 .text.HAL_I2C_Slave_Transmit_IT:00000000 HAL_I2C_Slave_Transmit_IT
+ /tmp/cckyvfTO.s:3865 .text.HAL_I2C_Slave_Transmit_IT:00000084 $d
+ /tmp/cckyvfTO.s:11709 .text.I2C_Slave_ISR_IT:00000000 I2C_Slave_ISR_IT
+ /tmp/cckyvfTO.s:3871 .text.HAL_I2C_Slave_Receive_IT:00000000 $t
+ /tmp/cckyvfTO.s:3877 .text.HAL_I2C_Slave_Receive_IT:00000000 HAL_I2C_Slave_Receive_IT
+ /tmp/cckyvfTO.s:3980 .text.HAL_I2C_Slave_Receive_IT:0000005c $d
+ /tmp/cckyvfTO.s:3986 .text.HAL_I2C_Master_Transmit_DMA:00000000 $t
+ /tmp/cckyvfTO.s:3992 .text.HAL_I2C_Master_Transmit_DMA:00000000 HAL_I2C_Master_Transmit_DMA
+ /tmp/cckyvfTO.s:4340 .text.HAL_I2C_Master_Transmit_DMA:0000015c $d
+ /tmp/cckyvfTO.s:13842 .text.I2C_DMAMasterTransmitCplt:00000000 I2C_DMAMasterTransmitCplt
+ /tmp/cckyvfTO.s:13744 .text.I2C_DMAError:00000000 I2C_DMAError
+ /tmp/cckyvfTO.s:4350 .text.HAL_I2C_Master_Receive_DMA:00000000 $t
+ /tmp/cckyvfTO.s:4356 .text.HAL_I2C_Master_Receive_DMA:00000000 HAL_I2C_Master_Receive_DMA
+ /tmp/cckyvfTO.s:4658 .text.HAL_I2C_Master_Receive_DMA:00000138 $d
+ /tmp/cckyvfTO.s:13950 .text.I2C_DMAMasterReceiveCplt:00000000 I2C_DMAMasterReceiveCplt
+ /tmp/cckyvfTO.s:4668 .text.HAL_I2C_Slave_Transmit_DMA:00000000 $t
+ /tmp/cckyvfTO.s:4674 .text.HAL_I2C_Slave_Transmit_DMA:00000000 HAL_I2C_Slave_Transmit_DMA
+ /tmp/cckyvfTO.s:4979 .text.HAL_I2C_Slave_Transmit_DMA:00000130 $d
+ /tmp/cckyvfTO.s:10399 .text.I2C_DMASlaveTransmitCplt:00000000 I2C_DMASlaveTransmitCplt
+ /tmp/cckyvfTO.s:4987 .text.HAL_I2C_Slave_Receive_DMA:00000000 $t
+ /tmp/cckyvfTO.s:4993 .text.HAL_I2C_Slave_Receive_DMA:00000000 HAL_I2C_Slave_Receive_DMA
+ /tmp/cckyvfTO.s:5215 .text.HAL_I2C_Slave_Receive_DMA:000000e4 $d
+ /tmp/cckyvfTO.s:10456 .text.I2C_DMASlaveReceiveCplt:00000000 I2C_DMASlaveReceiveCplt
+ /tmp/cckyvfTO.s:5223 .text.HAL_I2C_Mem_Write:00000000 $t
+ /tmp/cckyvfTO.s:5229 .text.HAL_I2C_Mem_Write:00000000 HAL_I2C_Mem_Write
+ /tmp/cckyvfTO.s:5587 .text.HAL_I2C_Mem_Read:00000000 $t
+ /tmp/cckyvfTO.s:5593 .text.HAL_I2C_Mem_Read:00000000 HAL_I2C_Mem_Read
+ /tmp/cckyvfTO.s:5951 .text.HAL_I2C_Mem_Read:000001ac $d
+ /tmp/cckyvfTO.s:5956 .text.HAL_I2C_Mem_Write_IT:00000000 $t
+ /tmp/cckyvfTO.s:5962 .text.HAL_I2C_Mem_Write_IT:00000000 HAL_I2C_Mem_Write_IT
+ /tmp/cckyvfTO.s:6139 .text.HAL_I2C_Mem_Write_IT:000000ac $d
+ /tmp/cckyvfTO.s:14070 .text.I2C_Mem_ISR_IT:00000000 I2C_Mem_ISR_IT
+ /tmp/cckyvfTO.s:6146 .text.HAL_I2C_Mem_Read_IT:00000000 $t
+ /tmp/cckyvfTO.s:6152 .text.HAL_I2C_Mem_Read_IT:00000000 HAL_I2C_Mem_Read_IT
+ /tmp/cckyvfTO.s:6326 .text.HAL_I2C_Mem_Read_IT:000000a8 $d
+ /tmp/cckyvfTO.s:6333 .text.HAL_I2C_Mem_Write_DMA:00000000 $t
+ /tmp/cckyvfTO.s:6339 .text.HAL_I2C_Mem_Write_DMA:00000000 HAL_I2C_Mem_Write_DMA
+ /tmp/cckyvfTO.s:6624 .text.HAL_I2C_Mem_Write_DMA:00000120 $d
+ /tmp/cckyvfTO.s:6633 .text.HAL_I2C_Mem_Read_DMA:00000000 $t
+ /tmp/cckyvfTO.s:6639 .text.HAL_I2C_Mem_Read_DMA:00000000 HAL_I2C_Mem_Read_DMA
+ /tmp/cckyvfTO.s:6926 .text.HAL_I2C_Mem_Read_DMA:00000120 $d
+ /tmp/cckyvfTO.s:6935 .text.HAL_I2C_IsDeviceReady:00000000 $t
+ /tmp/cckyvfTO.s:6941 .text.HAL_I2C_IsDeviceReady:00000000 HAL_I2C_IsDeviceReady
+ /tmp/cckyvfTO.s:7232 .text.HAL_I2C_IsDeviceReady:00000134 $d
+ /tmp/cckyvfTO.s:7238 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 $t
+ /tmp/cckyvfTO.s:7244 .text.HAL_I2C_Master_Seq_Transmit_IT:00000000 HAL_I2C_Master_Seq_Transmit_IT
+ /tmp/cckyvfTO.s:7511 .text.HAL_I2C_Master_Seq_Transmit_IT:00000104 $d
+ /tmp/cckyvfTO.s:7517 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 $t
+ /tmp/cckyvfTO.s:7523 .text.HAL_I2C_Master_Seq_Transmit_DMA:00000000 HAL_I2C_Master_Seq_Transmit_DMA
+ /tmp/cckyvfTO.s:7945 .text.HAL_I2C_Master_Seq_Transmit_DMA:000001d0 $d
+ /tmp/cckyvfTO.s:7954 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 $t
+ /tmp/cckyvfTO.s:7960 .text.HAL_I2C_Master_Seq_Receive_IT:00000000 HAL_I2C_Master_Seq_Receive_IT
+ /tmp/cckyvfTO.s:8148 .text.HAL_I2C_Master_Seq_Receive_IT:000000ac $d
+ /tmp/cckyvfTO.s:8154 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 $t
+ /tmp/cckyvfTO.s:8160 .text.HAL_I2C_Master_Seq_Receive_DMA:00000000 HAL_I2C_Master_Seq_Receive_DMA
+ ARM GAS /tmp/cckyvfTO.s page 479
- /tmp/ccloipGv.s:8492 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d
- /tmp/ccloipGv.s:8501 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t
- /tmp/ccloipGv.s:8507 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT
- /tmp/ccloipGv.s:8718 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000dc $d
- /tmp/ccloipGv.s:14602 .text.I2C_DMAAbort:00000000 I2C_DMAAbort
- /tmp/ccloipGv.s:8724 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t
- /tmp/ccloipGv.s:8730 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA
- /tmp/ccloipGv.s:9120 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d
- /tmp/ccloipGv.s:9128 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t
- /tmp/ccloipGv.s:9134 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT
- /tmp/ccloipGv.s:9345 .text.HAL_I2C_Slave_Seq_Receive_IT:000000dc $d
- /tmp/ccloipGv.s:9351 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t
- /tmp/ccloipGv.s:9357 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA
- /tmp/ccloipGv.s:9745 .text.HAL_I2C_Slave_Seq_Receive_DMA:0000019c $d
- /tmp/ccloipGv.s:9753 .text.HAL_I2C_EnableListen_IT:00000000 $t
- /tmp/ccloipGv.s:9759 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT
- /tmp/ccloipGv.s:9806 .text.HAL_I2C_EnableListen_IT:00000028 $d
- /tmp/ccloipGv.s:9811 .text.HAL_I2C_DisableListen_IT:00000000 $t
- /tmp/ccloipGv.s:9817 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT
- /tmp/ccloipGv.s:9883 .text.HAL_I2C_Master_Abort_IT:00000000 $t
- /tmp/ccloipGv.s:9889 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT
- /tmp/ccloipGv.s:10038 .text.HAL_I2C_Master_Abort_IT:00000084 $d
- /tmp/ccloipGv.s:10043 .text.HAL_I2C_EV_IRQHandler:00000000 $t
- /tmp/ccloipGv.s:10049 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler
- /tmp/ccloipGv.s:10087 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10093 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback
- /tmp/ccloipGv.s:10108 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10114 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback
- /tmp/ccloipGv.s:10129 .text.I2C_ITMasterSeqCplt:00000000 $t
- /tmp/ccloipGv.s:10134 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt
- /tmp/ccloipGv.s:10219 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10225 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback
- /tmp/ccloipGv.s:10240 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10246 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback
- /tmp/ccloipGv.s:10261 .text.I2C_ITSlaveSeqCplt:00000000 $t
- /tmp/ccloipGv.s:10266 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt
- /tmp/ccloipGv.s:10394 .text.I2C_DMASlaveTransmitCplt:00000000 $t
- /tmp/ccloipGv.s:10451 .text.I2C_DMASlaveReceiveCplt:00000000 $t
- /tmp/ccloipGv.s:10512 .text.HAL_I2C_AddrCallback:00000000 $t
- /tmp/ccloipGv.s:10518 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback
- /tmp/ccloipGv.s:10535 .text.I2C_ITAddrCplt:00000000 $t
- /tmp/ccloipGv.s:10540 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt
- /tmp/ccloipGv.s:10700 .text.HAL_I2C_ListenCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10706 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback
- /tmp/ccloipGv.s:10721 .text.I2C_ITListenCplt:00000000 $t
- /tmp/ccloipGv.s:10726 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt
- /tmp/ccloipGv.s:10830 .text.I2C_ITListenCplt:00000064 $d
- /tmp/ccloipGv.s:10835 .text.HAL_I2C_MemTxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10841 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback
- /tmp/ccloipGv.s:10856 .text.HAL_I2C_MemRxCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10862 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback
- /tmp/ccloipGv.s:10877 .text.HAL_I2C_ErrorCallback:00000000 $t
- /tmp/ccloipGv.s:10883 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback
- /tmp/ccloipGv.s:10898 .text.HAL_I2C_AbortCpltCallback:00000000 $t
- /tmp/ccloipGv.s:10904 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback
- /tmp/ccloipGv.s:10919 .text.I2C_TreatErrorCallback:00000000 $t
- /tmp/ccloipGv.s:10924 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback
- ARM GAS /tmp/ccloipGv.s page 480
+ /tmp/cckyvfTO.s:8492 .text.HAL_I2C_Master_Seq_Receive_DMA:00000160 $d
+ /tmp/cckyvfTO.s:8501 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 $t
+ /tmp/cckyvfTO.s:8507 .text.HAL_I2C_Slave_Seq_Transmit_IT:00000000 HAL_I2C_Slave_Seq_Transmit_IT
+ /tmp/cckyvfTO.s:8718 .text.HAL_I2C_Slave_Seq_Transmit_IT:000000dc $d
+ /tmp/cckyvfTO.s:14602 .text.I2C_DMAAbort:00000000 I2C_DMAAbort
+ /tmp/cckyvfTO.s:8724 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 $t
+ /tmp/cckyvfTO.s:8730 .text.HAL_I2C_Slave_Seq_Transmit_DMA:00000000 HAL_I2C_Slave_Seq_Transmit_DMA
+ /tmp/cckyvfTO.s:9120 .text.HAL_I2C_Slave_Seq_Transmit_DMA:0000019c $d
+ /tmp/cckyvfTO.s:9128 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 $t
+ /tmp/cckyvfTO.s:9134 .text.HAL_I2C_Slave_Seq_Receive_IT:00000000 HAL_I2C_Slave_Seq_Receive_IT
+ /tmp/cckyvfTO.s:9345 .text.HAL_I2C_Slave_Seq_Receive_IT:000000dc $d
+ /tmp/cckyvfTO.s:9351 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 $t
+ /tmp/cckyvfTO.s:9357 .text.HAL_I2C_Slave_Seq_Receive_DMA:00000000 HAL_I2C_Slave_Seq_Receive_DMA
+ /tmp/cckyvfTO.s:9745 .text.HAL_I2C_Slave_Seq_Receive_DMA:0000019c $d
+ /tmp/cckyvfTO.s:9753 .text.HAL_I2C_EnableListen_IT:00000000 $t
+ /tmp/cckyvfTO.s:9759 .text.HAL_I2C_EnableListen_IT:00000000 HAL_I2C_EnableListen_IT
+ /tmp/cckyvfTO.s:9806 .text.HAL_I2C_EnableListen_IT:00000028 $d
+ /tmp/cckyvfTO.s:9811 .text.HAL_I2C_DisableListen_IT:00000000 $t
+ /tmp/cckyvfTO.s:9817 .text.HAL_I2C_DisableListen_IT:00000000 HAL_I2C_DisableListen_IT
+ /tmp/cckyvfTO.s:9883 .text.HAL_I2C_Master_Abort_IT:00000000 $t
+ /tmp/cckyvfTO.s:9889 .text.HAL_I2C_Master_Abort_IT:00000000 HAL_I2C_Master_Abort_IT
+ /tmp/cckyvfTO.s:10038 .text.HAL_I2C_Master_Abort_IT:00000084 $d
+ /tmp/cckyvfTO.s:10043 .text.HAL_I2C_EV_IRQHandler:00000000 $t
+ /tmp/cckyvfTO.s:10049 .text.HAL_I2C_EV_IRQHandler:00000000 HAL_I2C_EV_IRQHandler
+ /tmp/cckyvfTO.s:10087 .text.HAL_I2C_MasterTxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10093 .text.HAL_I2C_MasterTxCpltCallback:00000000 HAL_I2C_MasterTxCpltCallback
+ /tmp/cckyvfTO.s:10108 .text.HAL_I2C_MasterRxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10114 .text.HAL_I2C_MasterRxCpltCallback:00000000 HAL_I2C_MasterRxCpltCallback
+ /tmp/cckyvfTO.s:10129 .text.I2C_ITMasterSeqCplt:00000000 $t
+ /tmp/cckyvfTO.s:10134 .text.I2C_ITMasterSeqCplt:00000000 I2C_ITMasterSeqCplt
+ /tmp/cckyvfTO.s:10219 .text.HAL_I2C_SlaveTxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10225 .text.HAL_I2C_SlaveTxCpltCallback:00000000 HAL_I2C_SlaveTxCpltCallback
+ /tmp/cckyvfTO.s:10240 .text.HAL_I2C_SlaveRxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10246 .text.HAL_I2C_SlaveRxCpltCallback:00000000 HAL_I2C_SlaveRxCpltCallback
+ /tmp/cckyvfTO.s:10261 .text.I2C_ITSlaveSeqCplt:00000000 $t
+ /tmp/cckyvfTO.s:10266 .text.I2C_ITSlaveSeqCplt:00000000 I2C_ITSlaveSeqCplt
+ /tmp/cckyvfTO.s:10394 .text.I2C_DMASlaveTransmitCplt:00000000 $t
+ /tmp/cckyvfTO.s:10451 .text.I2C_DMASlaveReceiveCplt:00000000 $t
+ /tmp/cckyvfTO.s:10512 .text.HAL_I2C_AddrCallback:00000000 $t
+ /tmp/cckyvfTO.s:10518 .text.HAL_I2C_AddrCallback:00000000 HAL_I2C_AddrCallback
+ /tmp/cckyvfTO.s:10535 .text.I2C_ITAddrCplt:00000000 $t
+ /tmp/cckyvfTO.s:10540 .text.I2C_ITAddrCplt:00000000 I2C_ITAddrCplt
+ /tmp/cckyvfTO.s:10700 .text.HAL_I2C_ListenCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10706 .text.HAL_I2C_ListenCpltCallback:00000000 HAL_I2C_ListenCpltCallback
+ /tmp/cckyvfTO.s:10721 .text.I2C_ITListenCplt:00000000 $t
+ /tmp/cckyvfTO.s:10726 .text.I2C_ITListenCplt:00000000 I2C_ITListenCplt
+ /tmp/cckyvfTO.s:10830 .text.I2C_ITListenCplt:00000064 $d
+ /tmp/cckyvfTO.s:10835 .text.HAL_I2C_MemTxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10841 .text.HAL_I2C_MemTxCpltCallback:00000000 HAL_I2C_MemTxCpltCallback
+ /tmp/cckyvfTO.s:10856 .text.HAL_I2C_MemRxCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10862 .text.HAL_I2C_MemRxCpltCallback:00000000 HAL_I2C_MemRxCpltCallback
+ /tmp/cckyvfTO.s:10877 .text.HAL_I2C_ErrorCallback:00000000 $t
+ /tmp/cckyvfTO.s:10883 .text.HAL_I2C_ErrorCallback:00000000 HAL_I2C_ErrorCallback
+ /tmp/cckyvfTO.s:10898 .text.HAL_I2C_AbortCpltCallback:00000000 $t
+ /tmp/cckyvfTO.s:10904 .text.HAL_I2C_AbortCpltCallback:00000000 HAL_I2C_AbortCpltCallback
+ /tmp/cckyvfTO.s:10919 .text.I2C_TreatErrorCallback:00000000 $t
+ /tmp/cckyvfTO.s:10924 .text.I2C_TreatErrorCallback:00000000 I2C_TreatErrorCallback
+ ARM GAS /tmp/cckyvfTO.s page 480
- /tmp/ccloipGv.s:10981 .text.I2C_ITError:00000000 $t
- /tmp/ccloipGv.s:10986 .text.I2C_ITError:00000000 I2C_ITError
- /tmp/ccloipGv.s:11264 .text.I2C_ITError:00000124 $d
- /tmp/ccloipGv.s:11271 .text.I2C_ITSlaveCplt:00000000 $t
- /tmp/ccloipGv.s:11276 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt
- /tmp/ccloipGv.s:11323 .text.I2C_ITSlaveCplt:0000001e $d
- /tmp/ccloipGv.s:11333 .text.I2C_ITSlaveCplt:00000028 $t
- /tmp/ccloipGv.s:11699 .text.I2C_ITSlaveCplt:000001ec $d
- /tmp/ccloipGv.s:11704 .text.I2C_Slave_ISR_IT:00000000 $t
- /tmp/ccloipGv.s:12021 .text.I2C_ITMasterCplt:00000000 $t
- /tmp/ccloipGv.s:12026 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt
- /tmp/ccloipGv.s:12298 .text.I2C_Master_ISR_IT:00000000 $t
- /tmp/ccloipGv.s:12702 .text.I2C_Mem_ISR_DMA:00000000 $t
- /tmp/ccloipGv.s:13105 .text.I2C_Mem_ISR_DMA:000001c8 $d
- /tmp/ccloipGv.s:13111 .text.I2C_Slave_ISR_DMA:00000000 $t
- /tmp/ccloipGv.s:13254 .text.I2C_Slave_ISR_DMA:00000096 $d
- /tmp/ccloipGv.s:13265 .text.I2C_Slave_ISR_DMA:000000a0 $t
- /tmp/ccloipGv.s:13411 .text.I2C_Master_ISR_DMA:00000000 $t
- /tmp/ccloipGv.s:13739 .text.I2C_DMAError:00000000 $t
- /tmp/ccloipGv.s:13837 .text.I2C_DMAMasterTransmitCplt:00000000 $t
- /tmp/ccloipGv.s:13945 .text.I2C_DMAMasterReceiveCplt:00000000 $t
- /tmp/ccloipGv.s:14065 .text.I2C_Mem_ISR_IT:00000000 $t
- /tmp/ccloipGv.s:14484 .text.I2C_Mem_ISR_IT:000001b8 $d
- /tmp/ccloipGv.s:14490 .text.HAL_I2C_ER_IRQHandler:00000000 $t
- /tmp/ccloipGv.s:14496 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler
- /tmp/ccloipGv.s:14597 .text.I2C_DMAAbort:00000000 $t
- /tmp/ccloipGv.s:14648 .text.HAL_I2C_GetState:00000000 $t
- /tmp/ccloipGv.s:14654 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState
- /tmp/ccloipGv.s:14672 .text.HAL_I2C_GetMode:00000000 $t
- /tmp/ccloipGv.s:14678 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode
- /tmp/ccloipGv.s:14696 .text.HAL_I2C_GetError:00000000 $t
- /tmp/ccloipGv.s:14702 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError
+ /tmp/cckyvfTO.s:10981 .text.I2C_ITError:00000000 $t
+ /tmp/cckyvfTO.s:10986 .text.I2C_ITError:00000000 I2C_ITError
+ /tmp/cckyvfTO.s:11264 .text.I2C_ITError:00000124 $d
+ /tmp/cckyvfTO.s:11271 .text.I2C_ITSlaveCplt:00000000 $t
+ /tmp/cckyvfTO.s:11276 .text.I2C_ITSlaveCplt:00000000 I2C_ITSlaveCplt
+ /tmp/cckyvfTO.s:11323 .text.I2C_ITSlaveCplt:0000001e $d
+ /tmp/cckyvfTO.s:11333 .text.I2C_ITSlaveCplt:00000028 $t
+ /tmp/cckyvfTO.s:11699 .text.I2C_ITSlaveCplt:000001ec $d
+ /tmp/cckyvfTO.s:11704 .text.I2C_Slave_ISR_IT:00000000 $t
+ /tmp/cckyvfTO.s:12021 .text.I2C_ITMasterCplt:00000000 $t
+ /tmp/cckyvfTO.s:12026 .text.I2C_ITMasterCplt:00000000 I2C_ITMasterCplt
+ /tmp/cckyvfTO.s:12298 .text.I2C_Master_ISR_IT:00000000 $t
+ /tmp/cckyvfTO.s:12702 .text.I2C_Mem_ISR_DMA:00000000 $t
+ /tmp/cckyvfTO.s:13105 .text.I2C_Mem_ISR_DMA:000001c8 $d
+ /tmp/cckyvfTO.s:13111 .text.I2C_Slave_ISR_DMA:00000000 $t
+ /tmp/cckyvfTO.s:13254 .text.I2C_Slave_ISR_DMA:00000096 $d
+ /tmp/cckyvfTO.s:13265 .text.I2C_Slave_ISR_DMA:000000a0 $t
+ /tmp/cckyvfTO.s:13411 .text.I2C_Master_ISR_DMA:00000000 $t
+ /tmp/cckyvfTO.s:13739 .text.I2C_DMAError:00000000 $t
+ /tmp/cckyvfTO.s:13837 .text.I2C_DMAMasterTransmitCplt:00000000 $t
+ /tmp/cckyvfTO.s:13945 .text.I2C_DMAMasterReceiveCplt:00000000 $t
+ /tmp/cckyvfTO.s:14065 .text.I2C_Mem_ISR_IT:00000000 $t
+ /tmp/cckyvfTO.s:14484 .text.I2C_Mem_ISR_IT:000001b8 $d
+ /tmp/cckyvfTO.s:14490 .text.HAL_I2C_ER_IRQHandler:00000000 $t
+ /tmp/cckyvfTO.s:14496 .text.HAL_I2C_ER_IRQHandler:00000000 HAL_I2C_ER_IRQHandler
+ /tmp/cckyvfTO.s:14597 .text.I2C_DMAAbort:00000000 $t
+ /tmp/cckyvfTO.s:14648 .text.HAL_I2C_GetState:00000000 $t
+ /tmp/cckyvfTO.s:14654 .text.HAL_I2C_GetState:00000000 HAL_I2C_GetState
+ /tmp/cckyvfTO.s:14672 .text.HAL_I2C_GetMode:00000000 $t
+ /tmp/cckyvfTO.s:14678 .text.HAL_I2C_GetMode:00000000 HAL_I2C_GetMode
+ /tmp/cckyvfTO.s:14696 .text.HAL_I2C_GetError:00000000 $t
+ /tmp/cckyvfTO.s:14702 .text.HAL_I2C_GetError:00000000 HAL_I2C_GetError
UNDEFINED SYMBOLS
HAL_GetTick
diff --git a/build/stm32f7xx_hal_i2c_ex.lst b/build/stm32f7xx_hal_i2c_ex.lst
index bce1078..8c6f029 100644
--- a/build/stm32f7xx_hal_i2c_ex.lst
+++ b/build/stm32f7xx_hal_i2c_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccn09zq7.s page 1
+ARM GAS /tmp/ccmumtoH.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** devices contains the following additional features
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** (+) Possibility to disable or enable Analog Noise Filter
- ARM GAS /tmp/ccn09zq7.s page 2
+ ARM GAS /tmp/ccmumtoH.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** (+) Use of a configured Digital Noise Filter
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @brief Configure I2C Analog noise filter.
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * the configuration information for the specified I2Cx peripheral.
- ARM GAS /tmp/ccn09zq7.s page 3
+ ARM GAS /tmp/ccmumtoH.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @param AnalogFilter New state of the Analog filter.
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
106:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c ****
107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Reset I2Cx ANOFF bit */
108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF);
- ARM GAS /tmp/ccn09zq7.s page 4
+ ARM GAS /tmp/ccmumtoH.s page 4
65 .loc 1 108 5 is_stmt 1 view .LVU15
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
103 0054 0220 movs r0, #2
104 .LVL4:
105 .loc 1 124 12 view .LVU33
- ARM GAS /tmp/ccn09zq7.s page 5
+ ARM GAS /tmp/ccmumtoH.s page 5
106 0056 7047 bx lr
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
142 0008 202A cmp r2, #32
143 000a 21D1 bne .L7
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** {
- ARM GAS /tmp/ccn09zq7.s page 6
+ ARM GAS /tmp/ccmumtoH.s page 6
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Process Locked */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
179 .loc 1 163 25 is_stmt 0 view .LVU60
180 0036 0260 str r2, [r0]
164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c ****
- ARM GAS /tmp/ccn09zq7.s page 7
+ ARM GAS /tmp/ccmumtoH.s page 7
165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** __HAL_I2C_ENABLE(hi2c);
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
221 .align 1
222 .global HAL_I2CEx_EnableFastModePlus
223 .syntax unified
- ARM GAS /tmp/ccn09zq7.s page 8
+ ARM GAS /tmp/ccmumtoH.s page 8
224 .thumb
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
239 .loc 1 218 3 is_stmt 1 view .LVU77
219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c ****
220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** /* Enable SYSCFG clock */
- ARM GAS /tmp/ccn09zq7.s page 9
+ ARM GAS /tmp/ccmumtoH.s page 9
221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** __HAL_RCC_SYSCFG_CLK_ENABLE();
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * I2C1 pins using I2C_FASTMODEPLUS_I2C1 parameter or independently
233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * on each one of the following pins PB6, PB7, PB8 and PB9.
234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * @note For remaining I2C1 pins (PA14, PA15...) fast mode plus driving capability
- ARM GAS /tmp/ccn09zq7.s page 10
+ ARM GAS /tmp/ccmumtoH.s page 10
235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_i2c_ex.c **** * can be disabled only by using I2C_FASTMODEPLUS_I2C1 parameter.
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccn09zq7.s page 1
319 .cfi_def_cfa_offset 0
320 @ sp needed
321 0022 7047 bx lr
- ARM GAS /tmp/ccn09zq7.s page 11
+ ARM GAS /tmp/ccmumtoH.s page 11
322 .L16:
@@ -615,20 +615,20 @@ ARM GAS /tmp/ccn09zq7.s page 1
334 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
335 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
336 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_i2c.h"
- ARM GAS /tmp/ccn09zq7.s page 12
+ ARM GAS /tmp/ccmumtoH.s page 12
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_i2c_ex.c
- /tmp/ccn09zq7.s:20 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t
- /tmp/ccn09zq7.s:26 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter
- /tmp/ccn09zq7.s:118 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t
- /tmp/ccn09zq7.s:124 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter
- /tmp/ccn09zq7.s:221 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t
- /tmp/ccn09zq7.s:227 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus
- /tmp/ccn09zq7.s:270 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d
- /tmp/ccn09zq7.s:276 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t
- /tmp/ccn09zq7.s:282 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus
- /tmp/ccn09zq7.s:325 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d
+ /tmp/ccmumtoH.s:20 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 $t
+ /tmp/ccmumtoH.s:26 .text.HAL_I2CEx_ConfigAnalogFilter:00000000 HAL_I2CEx_ConfigAnalogFilter
+ /tmp/ccmumtoH.s:118 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 $t
+ /tmp/ccmumtoH.s:124 .text.HAL_I2CEx_ConfigDigitalFilter:00000000 HAL_I2CEx_ConfigDigitalFilter
+ /tmp/ccmumtoH.s:221 .text.HAL_I2CEx_EnableFastModePlus:00000000 $t
+ /tmp/ccmumtoH.s:227 .text.HAL_I2CEx_EnableFastModePlus:00000000 HAL_I2CEx_EnableFastModePlus
+ /tmp/ccmumtoH.s:270 .text.HAL_I2CEx_EnableFastModePlus:00000024 $d
+ /tmp/ccmumtoH.s:276 .text.HAL_I2CEx_DisableFastModePlus:00000000 $t
+ /tmp/ccmumtoH.s:282 .text.HAL_I2CEx_DisableFastModePlus:00000000 HAL_I2CEx_DisableFastModePlus
+ /tmp/ccmumtoH.s:325 .text.HAL_I2CEx_DisableFastModePlus:00000024 $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_msp.lst b/build/stm32f7xx_hal_msp.lst
index 99e7c8a..1f0f877 100644
--- a/build/stm32f7xx_hal_msp.lst
+++ b/build/stm32f7xx_hal_msp.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccrhuFOa.s page 1
+ARM GAS /tmp/cc1PgQlt.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
29:Src/stm32f7xx_hal_msp.c ****
30:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TD */
31:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 2
+ ARM GAS /tmp/cc1PgQlt.s page 2
32:Src/stm32f7xx_hal_msp.c **** /* Private define ------------------------------------------------------------*/
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
41 0004 1A6C ldr r2, [r3, #64]
42 0006 42F08052 orr r2, r2, #268435456
43 000a 1A64 str r2, [r3, #64]
- ARM GAS /tmp/ccrhuFOa.s page 3
+ ARM GAS /tmp/cc1PgQlt.s page 3
44 .loc 1 72 3 view .LVU4
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
83:Src/stm32f7xx_hal_msp.c **** * @brief ADC MSP Initialization
84:Src/stm32f7xx_hal_msp.c **** * This function configures the hardware resources used in this example
85:Src/stm32f7xx_hal_msp.c **** * @param hadc: ADC handle pointer
- ARM GAS /tmp/ccrhuFOa.s page 4
+ ARM GAS /tmp/cc1PgQlt.s page 4
86:Src/stm32f7xx_hal_msp.c **** * @retval None
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
111:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
112:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
113:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 5
+ ARM GAS /tmp/cc1PgQlt.s page 5
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pin = GPIO_PIN_2;
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
130 .cfi_def_cfa_offset 12
131 @ sp needed
132 0020 30BD pop {r4, r5, pc}
- ARM GAS /tmp/ccrhuFOa.s page 6
+ ARM GAS /tmp/cc1PgQlt.s page 6
133 .LVL2:
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
172 0048 1A6B ldr r2, [r3, #48]
173 004a 42F00102 orr r2, r2, #1
174 004e 1A63 str r2, [r3, #48]
- ARM GAS /tmp/ccrhuFOa.s page 7
+ ARM GAS /tmp/cc1PgQlt.s page 7
100:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOB_CLK_ENABLE();
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
213 .loc 1 114 5 is_stmt 1 view .LVU55
114:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
- ARM GAS /tmp/ccrhuFOa.s page 8
+ ARM GAS /tmp/cc1PgQlt.s page 8
214 .loc 1 114 25 is_stmt 0 view .LVU56
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
254 .LVL9:
255 .L10:
137:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 9
+ ARM GAS /tmp/cc1PgQlt.s page 9
256 .loc 1 137 5 view .LVU71
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
145:Src/stm32f7xx_hal_msp.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
295 .loc 1 145 5 is_stmt 1 view .LVU87
146:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 10
+ ARM GAS /tmp/cc1PgQlt.s page 10
296 .loc 1 146 5 view .LVU88
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
340 @ args = 0, pretend = 0, frame = 0
341 @ frame_needed = 0, uses_anonymous_args = 0
342 .loc 1 165 1 is_stmt 0 view .LVU94
- ARM GAS /tmp/ccrhuFOa.s page 11
+ ARM GAS /tmp/cc1PgQlt.s page 11
343 0000 08B5 push {r3, lr}
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
201:Src/stm32f7xx_hal_msp.c **** {
202:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN ADC3_MspDeInit 0 */
203:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 12
+ ARM GAS /tmp/cc1PgQlt.s page 12
204:Src/stm32f7xx_hal_msp.c **** /* USER CODE END ADC3_MspDeInit 0 */
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
387 .LVL20:
388 0036 EBE7 b .L13
389 .LVL21:
- ARM GAS /tmp/ccrhuFOa.s page 13
+ ARM GAS /tmp/cc1PgQlt.s page 13
390 .L18:
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
434 .cfi_def_cfa_offset 20
435 .cfi_offset 4, -20
436 .cfi_offset 5, -16
- ARM GAS /tmp/ccrhuFOa.s page 14
+ ARM GAS /tmp/cc1PgQlt.s page 14
437 .cfi_offset 6, -12
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
259:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_GPIOD_CLK_ENABLE();
260:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
261:Src/stm32f7xx_hal_msp.c **** PC8 ------> SDMMC1_D0
- ARM GAS /tmp/ccrhuFOa.s page 15
+ ARM GAS /tmp/cc1PgQlt.s page 15
262:Src/stm32f7xx_hal_msp.c **** PC9 ------> SDMMC1_D1
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
489 002e FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig
490 .LVL29:
250:Src/stm32f7xx_hal_msp.c **** {
- ARM GAS /tmp/ccrhuFOa.s page 16
+ ARM GAS /tmp/cc1PgQlt.s page 16
491 .loc 1 250 8 discriminator 1 view .LVU127
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
530 005c 1A6B ldr r2, [r3, #48]
531 005e 42F00802 orr r2, r2, #8
532 0062 1A63 str r2, [r3, #48]
- ARM GAS /tmp/ccrhuFOa.s page 17
+ ARM GAS /tmp/cc1PgQlt.s page 17
259:Src/stm32f7xx_hal_msp.c **** /**SDMMC1 GPIO Configuration
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
570 008c 0423 movs r3, #4
571 008e 2793 str r3, [sp, #156]
277:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Pull = GPIO_NOPULL;
- ARM GAS /tmp/ccrhuFOa.s page 18
+ ARM GAS /tmp/cc1PgQlt.s page 18
572 .loc 1 277 5 is_stmt 1 view .LVU160
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
292:Src/stm32f7xx_hal_msp.c **** * @brief SD MSP De-Initialization
293:Src/stm32f7xx_hal_msp.c **** * This function freeze the hardware resources used in this example
294:Src/stm32f7xx_hal_msp.c **** * @param hsd: SD handle pointer
- ARM GAS /tmp/ccrhuFOa.s page 19
+ ARM GAS /tmp/cc1PgQlt.s page 19
295:Src/stm32f7xx_hal_msp.c **** * @retval None
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
305:Src/stm32f7xx_hal_msp.c ****
640 .loc 1 305 5 is_stmt 1 view .LVU177
641 000c 084A ldr r2, .L33+4
- ARM GAS /tmp/ccrhuFOa.s page 20
+ ARM GAS /tmp/cc1PgQlt.s page 20
642 000e 536C ldr r3, [r2, #68]
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
686 .cfi_def_cfa_offset 4
687 .cfi_offset 14, -4
688 0002 87B0 sub sp, sp, #28
- ARM GAS /tmp/ccrhuFOa.s page 21
+ ARM GAS /tmp/cc1PgQlt.s page 21
689 .LCFI13:
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
370:Src/stm32f7xx_hal_msp.c **** }
371:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM10)
708 .loc 1 371 8 is_stmt 1 view .LVU191
- ARM GAS /tmp/ccrhuFOa.s page 22
+ ARM GAS /tmp/cc1PgQlt.s page 22
709 .loc 1 371 10 is_stmt 0 view .LVU192
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
741 .LVL43:
394:Src/stm32f7xx_hal_msp.c **** HAL_NVIC_EnableIRQ(TIM1_TRG_COM_TIM11_IRQn);
742 .loc 1 394 5 is_stmt 1 view .LVU203
- ARM GAS /tmp/ccrhuFOa.s page 23
+ ARM GAS /tmp/cc1PgQlt.s page 23
743 0042 1A20 movs r0, #26
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
782 .loc 1 352 5 view .LVU214
783 0064 1D4B ldr r3, .L46+20
784 0066 5A6C ldr r2, [r3, #68]
- ARM GAS /tmp/ccrhuFOa.s page 24
+ ARM GAS /tmp/cc1PgQlt.s page 24
785 0068 42F00102 orr r2, r2, #1
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
827 .L45:
377:Src/stm32f7xx_hal_msp.c **** /* TIM10 interrupt Init */
828 .loc 1 377 5 view .LVU227
- ARM GAS /tmp/ccrhuFOa.s page 25
+ ARM GAS /tmp/cc1PgQlt.s page 25
829 .LBB17:
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
877 .LVL55:
878 .LFB1189:
401:Src/stm32f7xx_hal_msp.c ****
- ARM GAS /tmp/ccrhuFOa.s page 26
+ ARM GAS /tmp/cc1PgQlt.s page 26
402:Src/stm32f7xx_hal_msp.c **** void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
909 001a 9342 cmp r3, r2
910 001c 1AD0 beq .L54
426:Src/stm32f7xx_hal_msp.c **** {
- ARM GAS /tmp/ccrhuFOa.s page 27
+ ARM GAS /tmp/cc1PgQlt.s page 27
427:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM1_MspPostInit 0 */
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
923 @ sp needed
924 0026 5DF804FB ldr pc, [sp], #4
925 .LVL57:
- ARM GAS /tmp/ccrhuFOa.s page 28
+ ARM GAS /tmp/cc1PgQlt.s page 28
926 .L53:
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
964 .LVL59:
965 0052 E7E7 b .L48
966 .LVL60:
- ARM GAS /tmp/ccrhuFOa.s page 29
+ ARM GAS /tmp/cc1PgQlt.s page 29
967 .L54:
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
440:Src/stm32f7xx_hal_msp.c ****
1005 .loc 1 440 5 is_stmt 0 view .LVU280
1006 007e FFF7FEFF bl HAL_GPIO_Init
- ARM GAS /tmp/ccrhuFOa.s page 30
+ ARM GAS /tmp/cc1PgQlt.s page 30
1007 .LVL62:
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
1045 .loc 1 461 5 is_stmt 0 view .LVU296
1046 00aa FFF7FEFF bl HAL_GPIO_Init
1047 .LVL65:
- ARM GAS /tmp/ccrhuFOa.s page 31
+ ARM GAS /tmp/cc1PgQlt.s page 31
1048 .loc 1 468 1 view .LVU297
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
484:Src/stm32f7xx_hal_msp.c **** /* USER CODE BEGIN TIM4_MspDeInit 1 */
485:Src/stm32f7xx_hal_msp.c ****
486:Src/stm32f7xx_hal_msp.c **** /* USER CODE END TIM4_MspDeInit 1 */
- ARM GAS /tmp/ccrhuFOa.s page 32
+ ARM GAS /tmp/cc1PgQlt.s page 32
487:Src/stm32f7xx_hal_msp.c **** }
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
526:Src/stm32f7xx_hal_msp.c **** }
527:Src/stm32f7xx_hal_msp.c **** else if(htim_base->Instance==TIM11)
1104 .loc 1 527 8 is_stmt 1 view .LVU309
- ARM GAS /tmp/ccrhuFOa.s page 33
+ ARM GAS /tmp/cc1PgQlt.s page 33
1105 .loc 1 527 10 is_stmt 0 view .LVU310
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
505:Src/stm32f7xx_hal_msp.c ****
1142 .loc 1 505 5 view .LVU318
1143 0052 02F59A32 add r2, r2, #78848
- ARM GAS /tmp/ccrhuFOa.s page 34
+ ARM GAS /tmp/cc1PgQlt.s page 34
1144 0056 536C ldr r3, [r2, #68]
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
549:Src/stm32f7xx_hal_msp.c **** */
550:Src/stm32f7xx_hal_msp.c **** void HAL_UART_MspInit(UART_HandleTypeDef* huart)
551:Src/stm32f7xx_hal_msp.c **** {
- ARM GAS /tmp/ccrhuFOa.s page 35
+ ARM GAS /tmp/cc1PgQlt.s page 35
1189 .loc 1 551 1 is_stmt 1 view -0
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
568:Src/stm32f7xx_hal_msp.c ****
569:Src/stm32f7xx_hal_msp.c **** /* Peripheral clock enable */
570:Src/stm32f7xx_hal_msp.c **** __HAL_RCC_UART8_CLK_ENABLE();
- ARM GAS /tmp/ccrhuFOa.s page 36
+ ARM GAS /tmp/cc1PgQlt.s page 36
571:Src/stm32f7xx_hal_msp.c ****
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
1253 .loc 1 570 5 view .LVU342
570:Src/stm32f7xx_hal_msp.c ****
1254 .loc 1 570 5 view .LVU343
- ARM GAS /tmp/ccrhuFOa.s page 37
+ ARM GAS /tmp/cc1PgQlt.s page 37
1255 0034 124B ldr r3, .L77+4
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
1294 .loc 1 580 5 is_stmt 1 view .LVU359
580:Src/stm32f7xx_hal_msp.c **** GPIO_InitStruct.Alternate = GPIO_AF8_UART8;
- ARM GAS /tmp/ccrhuFOa.s page 38
+ ARM GAS /tmp/cc1PgQlt.s page 38
1295 .loc 1 580 27 is_stmt 0 view .LVU360
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
1338 .LCFI25:
1339 .cfi_def_cfa_offset 8
1340 .cfi_offset 3, -8
- ARM GAS /tmp/ccrhuFOa.s page 39
+ ARM GAS /tmp/cc1PgQlt.s page 39
1341 .cfi_offset 14, -4
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccrhuFOa.s page 1
1372 0020 007C0040 .word 1073773568
1373 0024 00380240 .word 1073887232
1374 0028 00100240 .word 1073876992
- ARM GAS /tmp/ccrhuFOa.s page 40
+ ARM GAS /tmp/cc1PgQlt.s page 40
1375 .cfi_endproc
@@ -2363,41 +2363,41 @@ ARM GAS /tmp/ccrhuFOa.s page 1
1395 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_cortex.h"
1396 .file 18 "Inc/main.h"
1397 .file 19 ""
- ARM GAS /tmp/ccrhuFOa.s page 41
+ ARM GAS /tmp/cc1PgQlt.s page 41
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_msp.c
- /tmp/ccrhuFOa.s:20 .text.HAL_MspInit:00000000 $t
- /tmp/ccrhuFOa.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
- /tmp/ccrhuFOa.s:76 .text.HAL_MspInit:0000002c $d
- /tmp/ccrhuFOa.s:81 .text.HAL_ADC_MspInit:00000000 $t
- /tmp/ccrhuFOa.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
- /tmp/ccrhuFOa.s:318 .text.HAL_ADC_MspInit:000000f4 $d
- /tmp/ccrhuFOa.s:329 .text.HAL_ADC_MspDeInit:00000000 $t
- /tmp/ccrhuFOa.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
- /tmp/ccrhuFOa.s:408 .text.HAL_ADC_MspDeInit:00000050 $d
- /tmp/ccrhuFOa.s:418 .text.HAL_SD_MspInit:00000000 $t
- /tmp/ccrhuFOa.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
- /tmp/ccrhuFOa.s:600 .text.HAL_SD_MspInit:000000a8 $d
- /tmp/ccrhuFOa.s:608 .text.HAL_SD_MspDeInit:00000000 $t
- /tmp/ccrhuFOa.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
- /tmp/ccrhuFOa.s:662 .text.HAL_SD_MspDeInit:0000002c $d
- /tmp/ccrhuFOa.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t
- /tmp/ccrhuFOa.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
- /tmp/ccrhuFOa.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d
- /tmp/ccrhuFOa.s:870 .text.HAL_TIM_MspPostInit:00000000 $t
- /tmp/ccrhuFOa.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
- /tmp/ccrhuFOa.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d
- /tmp/ccrhuFOa.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t
- /tmp/ccrhuFOa.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
- /tmp/ccrhuFOa.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d
- /tmp/ccrhuFOa.s:1180 .text.HAL_UART_MspInit:00000000 $t
- /tmp/ccrhuFOa.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
- /tmp/ccrhuFOa.s:1316 .text.HAL_UART_MspInit:0000007c $d
- /tmp/ccrhuFOa.s:1323 .text.HAL_UART_MspDeInit:00000000 $t
- /tmp/ccrhuFOa.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
- /tmp/ccrhuFOa.s:1372 .text.HAL_UART_MspDeInit:00000020 $d
+ /tmp/cc1PgQlt.s:20 .text.HAL_MspInit:00000000 $t
+ /tmp/cc1PgQlt.s:26 .text.HAL_MspInit:00000000 HAL_MspInit
+ /tmp/cc1PgQlt.s:76 .text.HAL_MspInit:0000002c $d
+ /tmp/cc1PgQlt.s:81 .text.HAL_ADC_MspInit:00000000 $t
+ /tmp/cc1PgQlt.s:87 .text.HAL_ADC_MspInit:00000000 HAL_ADC_MspInit
+ /tmp/cc1PgQlt.s:318 .text.HAL_ADC_MspInit:000000f4 $d
+ /tmp/cc1PgQlt.s:329 .text.HAL_ADC_MspDeInit:00000000 $t
+ /tmp/cc1PgQlt.s:335 .text.HAL_ADC_MspDeInit:00000000 HAL_ADC_MspDeInit
+ /tmp/cc1PgQlt.s:408 .text.HAL_ADC_MspDeInit:00000050 $d
+ /tmp/cc1PgQlt.s:418 .text.HAL_SD_MspInit:00000000 $t
+ /tmp/cc1PgQlt.s:424 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
+ /tmp/cc1PgQlt.s:600 .text.HAL_SD_MspInit:000000a8 $d
+ /tmp/cc1PgQlt.s:608 .text.HAL_SD_MspDeInit:00000000 $t
+ /tmp/cc1PgQlt.s:614 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
+ /tmp/cc1PgQlt.s:662 .text.HAL_SD_MspDeInit:0000002c $d
+ /tmp/cc1PgQlt.s:670 .text.HAL_TIM_Base_MspInit:00000000 $t
+ /tmp/cc1PgQlt.s:676 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
+ /tmp/cc1PgQlt.s:860 .text.HAL_TIM_Base_MspInit:000000c8 $d
+ /tmp/cc1PgQlt.s:870 .text.HAL_TIM_MspPostInit:00000000 $t
+ /tmp/cc1PgQlt.s:876 .text.HAL_TIM_MspPostInit:00000000 HAL_TIM_MspPostInit
+ /tmp/cc1PgQlt.s:1053 .text.HAL_TIM_MspPostInit:000000b0 $d
+ /tmp/cc1PgQlt.s:1063 .text.HAL_TIM_Base_MspDeInit:00000000 $t
+ /tmp/cc1PgQlt.s:1069 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
+ /tmp/cc1PgQlt.s:1171 .text.HAL_TIM_Base_MspDeInit:0000007c $d
+ /tmp/cc1PgQlt.s:1180 .text.HAL_UART_MspInit:00000000 $t
+ /tmp/cc1PgQlt.s:1186 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
+ /tmp/cc1PgQlt.s:1316 .text.HAL_UART_MspInit:0000007c $d
+ /tmp/cc1PgQlt.s:1323 .text.HAL_UART_MspDeInit:00000000 $t
+ /tmp/cc1PgQlt.s:1329 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
+ /tmp/cc1PgQlt.s:1372 .text.HAL_UART_MspDeInit:00000020 $d
UNDEFINED SYMBOLS
HAL_GPIO_Init
diff --git a/build/stm32f7xx_hal_msp.o b/build/stm32f7xx_hal_msp.o
index c8ac003..712e3dd 100644
Binary files a/build/stm32f7xx_hal_msp.o and b/build/stm32f7xx_hal_msp.o differ
diff --git a/build/stm32f7xx_hal_pwr.lst b/build/stm32f7xx_hal_pwr.lst
index 28766ee..8f3828d 100644
--- a/build/stm32f7xx_hal_pwr.lst
+++ b/build/stm32f7xx_hal_pwr.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccHX3azn.s page 1
+ARM GAS /tmp/ccZZmLL0.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** */
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /** @defgroup PWR PWR
- ARM GAS /tmp/ccHX3azn.s page 2
+ ARM GAS /tmp/ccZZmLL0.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @brief PWR HAL module driver
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** To enable access to the RTC Domain and RTC registers, proceed as follows:
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable the Power Controller (PWR) APB1 interface clock using the
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __HAL_RCC_PWR_CLK_ENABLE() macro.
- ARM GAS /tmp/ccHX3azn.s page 3
+ ARM GAS /tmp/ccZZmLL0.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Enable access to RTC domain using the HAL_PWR_EnableBkUpAccess() function.
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** {
60 .loc 1 113 1 is_stmt 1 view -0
61 .cfi_startproc
- ARM GAS /tmp/ccHX3azn.s page 4
+ ARM GAS /tmp/ccZZmLL0.s page 4
62 @ args = 0, pretend = 0, frame = 0
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
102 .L8:
103 000c 00700040 .word 1073770496
104 .cfi_endproc
- ARM GAS /tmp/ccHX3azn.s page 5
+ ARM GAS /tmp/ccZZmLL0.s page 5
105 .LFE143:
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) Entry:
175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** The Sleep mode is entered by using the HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLE
176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** functions with
- ARM GAS /tmp/ccHX3azn.s page 6
+ ARM GAS /tmp/ccZZmLL0.s page 6
177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** Wakeup event, a tamper event or a time-stamp event, without depending on
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** an external interrupt (Auto-wakeup mode).
233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
- ARM GAS /tmp/ccHX3azn.s page 7
+ ARM GAS /tmp/ccZZmLL0.s page 7
234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** (+) RTC auto-wakeup (AWU) from the Stop and Standby modes
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
135 0016 5A60 str r2, [r3, #4]
270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __HAL_PWR_PVD_EXTI_DISABLE_IT();
136 .loc 1 270 3 view .LVU15
- ARM GAS /tmp/ccHX3azn.s page 8
+ ARM GAS /tmp/ccZZmLL0.s page 8
137 0018 1A68 ldr r2, [r3]
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
174 0054 4368 ldr r3, [r0, #4]
175 .loc 1 287 5 view .LVU28
176 0056 13F0010F tst r3, #1
- ARM GAS /tmp/ccHX3azn.s page 9
+ ARM GAS /tmp/ccZZmLL0.s page 9
177 005a 04D0 beq .L13
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
217 @ args = 0, pretend = 0, frame = 0
218 @ frame_needed = 0, uses_anonymous_args = 0
219 @ link register save eliminated.
- ARM GAS /tmp/ccHX3azn.s page 10
+ ARM GAS /tmp/ccZZmLL0.s page 10
304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Enable the power voltage detector */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
264 .global HAL_PWR_EnableWakeUpPin
265 .syntax unified
266 .thumb
- ARM GAS /tmp/ccHX3azn.s page 11
+ ARM GAS /tmp/ccZZmLL0.s page 11
267 .thumb_func
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
293 .L25:
294 001a 00BF .align 2
295 .L24:
- ARM GAS /tmp/ccHX3azn.s page 12
+ ARM GAS /tmp/ccZZmLL0.s page 12
296 001c 00700040 .word 1073770496
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
334 .thumb
335 .thumb_func
337 HAL_PWR_EnterSLEEPMode:
- ARM GAS /tmp/ccHX3azn.s page 13
+ ARM GAS /tmp/ccZZmLL0.s page 13
338 .LVL4:
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
- ARM GAS /tmp/ccHX3azn.s page 14
+ ARM GAS /tmp/ccZZmLL0.s page 14
4:Drivers/CMSIS/Include/cmsis_gcc.h **** * @version V5.0.4
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK
59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak))
60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- ARM GAS /tmp/ccHX3azn.s page 15
+ ARM GAS /tmp/ccZZmLL0.s page 15
61:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
116:Drivers/CMSIS/Include/cmsis_gcc.h ****
117:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccHX3azn.s page 16
+ ARM GAS /tmp/ccZZmLL0.s page 16
118:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ########################### Core Function Access ########################### */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
172:Drivers/CMSIS/Include/cmsis_gcc.h **** }
173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
174:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccHX3azn.s page 17
+ ARM GAS /tmp/ccZZmLL0.s page 17
175:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register
230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register.
231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value
- ARM GAS /tmp/ccHX3azn.s page 18
+ ARM GAS /tmp/ccZZmLL0.s page 18
232:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta
287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set
288:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccHX3azn.s page 19
+ ARM GAS /tmp/ccZZmLL0.s page 19
289:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
344:Drivers/CMSIS/Include/cmsis_gcc.h **** {
345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
- ARM GAS /tmp/ccHX3azn.s page 20
+ ARM GAS /tmp/ccZZmLL0.s page 20
346:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
400:Drivers/CMSIS/Include/cmsis_gcc.h ****
401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccHX3azn.s page 21
+ ARM GAS /tmp/ccZZmLL0.s page 21
403:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority
458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register.
459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value
- ARM GAS /tmp/ccHX3azn.s page 22
+ ARM GAS /tmp/ccZZmLL0.s page 22
460:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
515:Drivers/CMSIS/Include/cmsis_gcc.h **** */
516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
- ARM GAS /tmp/ccHX3azn.s page 23
+ ARM GAS /tmp/ccZZmLL0.s page 23
517:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
572:Drivers/CMSIS/Include/cmsis_gcc.h **** }
573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
- ARM GAS /tmp/ccHX3azn.s page 24
+ ARM GAS /tmp/ccZZmLL0.s page 24
574:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
628:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit
630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- ARM GAS /tmp/ccHX3azn.s page 25
+ ARM GAS /tmp/ccZZmLL0.s page 25
631:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored in non-secure
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) );
- ARM GAS /tmp/ccHX3azn.s page 26
+ ARM GAS /tmp/ccZZmLL0.s page 26
688:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
742:Drivers/CMSIS/Include/cmsis_gcc.h ****
743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu
744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set
- ARM GAS /tmp/ccHX3azn.s page 27
+ ARM GAS /tmp/ccZZmLL0.s page 27
745:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr);
801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
- ARM GAS /tmp/ccHX3azn.s page 28
+ ARM GAS /tmp/ccZZmLL0.s page 28
802:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
856:Drivers/CMSIS/Include/cmsis_gcc.h **** */
857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev")
858:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccHX3azn.s page 29
+ ARM GAS /tmp/ccZZmLL0.s page 29
859:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
384 0012 0129 cmp r1, #1
385 0014 03D0 beq .L32
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** {
- ARM GAS /tmp/ccHX3azn.s page 30
+ ARM GAS /tmp/ccZZmLL0.s page 30
405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Request Wait For Interrupt */
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /**
418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @brief Enters Stop mode.
419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @note In Stop mode, all I/O pins keep the same state as in Run mode.
- ARM GAS /tmp/ccHX3azn.s page 31
+ ARM GAS /tmp/ccZZmLL0.s page 31
420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** PWR->CR1 = tmpreg;
450 .loc 1 453 3 is_stmt 1 view .LVU79
451 .loc 1 453 12 is_stmt 0 view .LVU80
- ARM GAS /tmp/ccHX3azn.s page 32
+ ARM GAS /tmp/ccZZmLL0.s page 32
452 000a 1360 str r3, [r2]
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
493 0020 08D0 beq .L38
464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** {
465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Request Wait For Interrupt */
- ARM GAS /tmp/ccHX3azn.s page 33
+ ARM GAS /tmp/ccZZmLL0.s page 33
466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** __WFI();
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
536 .section .text.HAL_PWR_EnterSTANDBYMode,"ax",%progbits
537 .align 1
538 .global HAL_PWR_EnterSTANDBYMode
- ARM GAS /tmp/ccHX3azn.s page 34
+ ARM GAS /tmp/ccZZmLL0.s page 34
539 .syntax unified
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** }
569 .loc 1 503 1 is_stmt 0 view .LVU108
570 .thumb
- ARM GAS /tmp/ccHX3azn.s page 35
+ ARM GAS /tmp/ccZZmLL0.s page 35
571 .syntax unified
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
598 .LFE153:
600 .section .text.HAL_PWR_PVD_IRQHandler,"ax",%progbits
601 .align 1
- ARM GAS /tmp/ccHX3azn.s page 36
+ ARM GAS /tmp/ccZZmLL0.s page 36
602 .global HAL_PWR_PVD_IRQHandler
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
650 .thumb_func
652 HAL_PWR_EnableSleepOnExit:
653 .LFB154:
- ARM GAS /tmp/ccHX3azn.s page 37
+ ARM GAS /tmp/ccZZmLL0.s page 37
533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c ****
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** /* Clear SLEEPONEXIT bit of Cortex System Control Register */
557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr.c **** CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
687 .loc 1 557 3 view .LVU123
- ARM GAS /tmp/ccHX3azn.s page 38
+ ARM GAS /tmp/ccZZmLL0.s page 38
688 0000 024A ldr r2, .L55
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccHX3azn.s page 1
732 .syntax unified
733 .thumb
734 .thumb_func
- ARM GAS /tmp/ccHX3azn.s page 39
+ ARM GAS /tmp/ccZZmLL0.s page 39
736 HAL_PWR_DisableSEVOnPend:
@@ -2320,60 +2320,60 @@ ARM GAS /tmp/ccHX3azn.s page 1
761 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
762 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr.h"
763 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/ccHX3azn.s page 40
+ ARM GAS /tmp/ccZZmLL0.s page 40
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_pwr.c
- /tmp/ccHX3azn.s:20 .text.HAL_PWR_DeInit:00000000 $t
- /tmp/ccHX3azn.s:26 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
- /tmp/ccHX3azn.s:47 .text.HAL_PWR_DeInit:00000014 $d
- /tmp/ccHX3azn.s:52 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
- /tmp/ccHX3azn.s:58 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
- /tmp/ccHX3azn.s:75 .text.HAL_PWR_EnableBkUpAccess:0000000c $d
- /tmp/ccHX3azn.s:80 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
- /tmp/ccHX3azn.s:86 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
- /tmp/ccHX3azn.s:103 .text.HAL_PWR_DisableBkUpAccess:0000000c $d
- /tmp/ccHX3azn.s:108 .text.HAL_PWR_ConfigPVD:00000000 $t
- /tmp/ccHX3azn.s:114 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
- /tmp/ccHX3azn.s:201 .text.HAL_PWR_ConfigPVD:0000007c $d
- /tmp/ccHX3azn.s:207 .text.HAL_PWR_EnablePVD:00000000 $t
- /tmp/ccHX3azn.s:213 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
- /tmp/ccHX3azn.s:230 .text.HAL_PWR_EnablePVD:0000000c $d
- /tmp/ccHX3azn.s:235 .text.HAL_PWR_DisablePVD:00000000 $t
- /tmp/ccHX3azn.s:241 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
- /tmp/ccHX3azn.s:258 .text.HAL_PWR_DisablePVD:0000000c $d
- /tmp/ccHX3azn.s:263 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
- /tmp/ccHX3azn.s:269 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
- /tmp/ccHX3azn.s:296 .text.HAL_PWR_EnableWakeUpPin:0000001c $d
- /tmp/ccHX3azn.s:301 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
- /tmp/ccHX3azn.s:307 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
- /tmp/ccHX3azn.s:326 .text.HAL_PWR_DisableWakeUpPin:0000000c $d
- /tmp/ccHX3azn.s:331 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
- /tmp/ccHX3azn.s:337 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
- /tmp/ccHX3azn.s:415 .text.HAL_PWR_EnterSLEEPMode:00000024 $d
- /tmp/ccHX3azn.s:420 .text.HAL_PWR_EnterSTOPMode:00000000 $t
- /tmp/ccHX3azn.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
- /tmp/ccHX3azn.s:531 .text.HAL_PWR_EnterSTOPMode:00000038 $d
- /tmp/ccHX3azn.s:537 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
- /tmp/ccHX3azn.s:543 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
- /tmp/ccHX3azn.s:576 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
- /tmp/ccHX3azn.s:582 .text.HAL_PWR_PVDCallback:00000000 $t
- /tmp/ccHX3azn.s:588 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
- /tmp/ccHX3azn.s:601 .text.HAL_PWR_PVD_IRQHandler:00000000 $t
- /tmp/ccHX3azn.s:607 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler
- /tmp/ccHX3azn.s:641 .text.HAL_PWR_PVD_IRQHandler:0000001c $d
- /tmp/ccHX3azn.s:646 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
- /tmp/ccHX3azn.s:652 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
- /tmp/ccHX3azn.s:669 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
- /tmp/ccHX3azn.s:674 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
- /tmp/ccHX3azn.s:680 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
- /tmp/ccHX3azn.s:697 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
- /tmp/ccHX3azn.s:702 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
- /tmp/ccHX3azn.s:708 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
- /tmp/ccHX3azn.s:725 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
- /tmp/ccHX3azn.s:730 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
- /tmp/ccHX3azn.s:736 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
- /tmp/ccHX3azn.s:753 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
+ /tmp/ccZZmLL0.s:20 .text.HAL_PWR_DeInit:00000000 $t
+ /tmp/ccZZmLL0.s:26 .text.HAL_PWR_DeInit:00000000 HAL_PWR_DeInit
+ /tmp/ccZZmLL0.s:47 .text.HAL_PWR_DeInit:00000014 $d
+ /tmp/ccZZmLL0.s:52 .text.HAL_PWR_EnableBkUpAccess:00000000 $t
+ /tmp/ccZZmLL0.s:58 .text.HAL_PWR_EnableBkUpAccess:00000000 HAL_PWR_EnableBkUpAccess
+ /tmp/ccZZmLL0.s:75 .text.HAL_PWR_EnableBkUpAccess:0000000c $d
+ /tmp/ccZZmLL0.s:80 .text.HAL_PWR_DisableBkUpAccess:00000000 $t
+ /tmp/ccZZmLL0.s:86 .text.HAL_PWR_DisableBkUpAccess:00000000 HAL_PWR_DisableBkUpAccess
+ /tmp/ccZZmLL0.s:103 .text.HAL_PWR_DisableBkUpAccess:0000000c $d
+ /tmp/ccZZmLL0.s:108 .text.HAL_PWR_ConfigPVD:00000000 $t
+ /tmp/ccZZmLL0.s:114 .text.HAL_PWR_ConfigPVD:00000000 HAL_PWR_ConfigPVD
+ /tmp/ccZZmLL0.s:201 .text.HAL_PWR_ConfigPVD:0000007c $d
+ /tmp/ccZZmLL0.s:207 .text.HAL_PWR_EnablePVD:00000000 $t
+ /tmp/ccZZmLL0.s:213 .text.HAL_PWR_EnablePVD:00000000 HAL_PWR_EnablePVD
+ /tmp/ccZZmLL0.s:230 .text.HAL_PWR_EnablePVD:0000000c $d
+ /tmp/ccZZmLL0.s:235 .text.HAL_PWR_DisablePVD:00000000 $t
+ /tmp/ccZZmLL0.s:241 .text.HAL_PWR_DisablePVD:00000000 HAL_PWR_DisablePVD
+ /tmp/ccZZmLL0.s:258 .text.HAL_PWR_DisablePVD:0000000c $d
+ /tmp/ccZZmLL0.s:263 .text.HAL_PWR_EnableWakeUpPin:00000000 $t
+ /tmp/ccZZmLL0.s:269 .text.HAL_PWR_EnableWakeUpPin:00000000 HAL_PWR_EnableWakeUpPin
+ /tmp/ccZZmLL0.s:296 .text.HAL_PWR_EnableWakeUpPin:0000001c $d
+ /tmp/ccZZmLL0.s:301 .text.HAL_PWR_DisableWakeUpPin:00000000 $t
+ /tmp/ccZZmLL0.s:307 .text.HAL_PWR_DisableWakeUpPin:00000000 HAL_PWR_DisableWakeUpPin
+ /tmp/ccZZmLL0.s:326 .text.HAL_PWR_DisableWakeUpPin:0000000c $d
+ /tmp/ccZZmLL0.s:331 .text.HAL_PWR_EnterSLEEPMode:00000000 $t
+ /tmp/ccZZmLL0.s:337 .text.HAL_PWR_EnterSLEEPMode:00000000 HAL_PWR_EnterSLEEPMode
+ /tmp/ccZZmLL0.s:415 .text.HAL_PWR_EnterSLEEPMode:00000024 $d
+ /tmp/ccZZmLL0.s:420 .text.HAL_PWR_EnterSTOPMode:00000000 $t
+ /tmp/ccZZmLL0.s:426 .text.HAL_PWR_EnterSTOPMode:00000000 HAL_PWR_EnterSTOPMode
+ /tmp/ccZZmLL0.s:531 .text.HAL_PWR_EnterSTOPMode:00000038 $d
+ /tmp/ccZZmLL0.s:537 .text.HAL_PWR_EnterSTANDBYMode:00000000 $t
+ /tmp/ccZZmLL0.s:543 .text.HAL_PWR_EnterSTANDBYMode:00000000 HAL_PWR_EnterSTANDBYMode
+ /tmp/ccZZmLL0.s:576 .text.HAL_PWR_EnterSTANDBYMode:00000018 $d
+ /tmp/ccZZmLL0.s:582 .text.HAL_PWR_PVDCallback:00000000 $t
+ /tmp/ccZZmLL0.s:588 .text.HAL_PWR_PVDCallback:00000000 HAL_PWR_PVDCallback
+ /tmp/ccZZmLL0.s:601 .text.HAL_PWR_PVD_IRQHandler:00000000 $t
+ /tmp/ccZZmLL0.s:607 .text.HAL_PWR_PVD_IRQHandler:00000000 HAL_PWR_PVD_IRQHandler
+ /tmp/ccZZmLL0.s:641 .text.HAL_PWR_PVD_IRQHandler:0000001c $d
+ /tmp/ccZZmLL0.s:646 .text.HAL_PWR_EnableSleepOnExit:00000000 $t
+ /tmp/ccZZmLL0.s:652 .text.HAL_PWR_EnableSleepOnExit:00000000 HAL_PWR_EnableSleepOnExit
+ /tmp/ccZZmLL0.s:669 .text.HAL_PWR_EnableSleepOnExit:0000000c $d
+ /tmp/ccZZmLL0.s:674 .text.HAL_PWR_DisableSleepOnExit:00000000 $t
+ /tmp/ccZZmLL0.s:680 .text.HAL_PWR_DisableSleepOnExit:00000000 HAL_PWR_DisableSleepOnExit
+ /tmp/ccZZmLL0.s:697 .text.HAL_PWR_DisableSleepOnExit:0000000c $d
+ /tmp/ccZZmLL0.s:702 .text.HAL_PWR_EnableSEVOnPend:00000000 $t
+ /tmp/ccZZmLL0.s:708 .text.HAL_PWR_EnableSEVOnPend:00000000 HAL_PWR_EnableSEVOnPend
+ /tmp/ccZZmLL0.s:725 .text.HAL_PWR_EnableSEVOnPend:0000000c $d
+ /tmp/ccZZmLL0.s:730 .text.HAL_PWR_DisableSEVOnPend:00000000 $t
+ /tmp/ccZZmLL0.s:736 .text.HAL_PWR_DisableSEVOnPend:00000000 HAL_PWR_DisableSEVOnPend
+ /tmp/ccZZmLL0.s:753 .text.HAL_PWR_DisableSEVOnPend:0000000c $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_hal_pwr_ex.lst b/build/stm32f7xx_hal_pwr_ex.lst
index c1d107f..debe8a7 100644
--- a/build/stm32f7xx_hal_pwr_ex.lst
+++ b/build/stm32f7xx_hal_pwr_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccOKVCkl.s page 1
+ARM GAS /tmp/ccD9vOwP.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /** @defgroup PWREx PWREx
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief PWR HAL module driver
- ARM GAS /tmp/ccOKVCkl.s page 2
+ ARM GAS /tmp/ccD9vOwP.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @{
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** -@- Refer to the description of Read protection (RDP) in the Flash
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** programming manual.
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
- ARM GAS /tmp/ccOKVCkl.s page 3
+ ARM GAS /tmp/ccD9vOwP.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** (+) The main internal regulator can be configured to have a tradeoff between
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
35 .cfi_offset 4, -8
36 .cfi_offset 14, -4
136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** uint32_t tickstart = 0;
- ARM GAS /tmp/ccOKVCkl.s page 4
+ ARM GAS /tmp/ccD9vOwP.s page 4
37 .loc 1 136 3 view .LVU1
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
76 .loc 1 153 14 view .LVU18
- ARM GAS /tmp/ccOKVCkl.s page 5
+ ARM GAS /tmp/ccD9vOwP.s page 5
77 0030 0320 movs r0, #3
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
118 .loc 1 168 13 view .LVU26
119 0006 22F40072 bic r2, r2, #512
120 000a 5A60 str r2, [r3, #4]
- ARM GAS /tmp/ccOKVCkl.s page 6
+ ARM GAS /tmp/ccD9vOwP.s page 6
169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
158 .loc 1 186 1 view .LVU42
159 0036 10BD pop {r4, pc}
- ARM GAS /tmp/ccOKVCkl.s page 7
+ ARM GAS /tmp/ccD9vOwP.s page 7
160 .LVL9:
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Disables the Flash Power Down in Stop mode.
- ARM GAS /tmp/ccOKVCkl.s page 8
+ ARM GAS /tmp/ccD9vOwP.s page 8
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
248 0004 43F40063 orr r3, r3, #2048
249 0008 1360 str r3, [r2]
216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
- ARM GAS /tmp/ccOKVCkl.s page 9
+ ARM GAS /tmp/ccD9vOwP.s page 9
250 .loc 1 216 1 view .LVU58
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /**
229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Enables Low Power Regulator low voltage mode.
- ARM GAS /tmp/ccOKVCkl.s page 10
+ ARM GAS /tmp/ccD9vOwP.s page 10
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @retval None
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
338 0004 23F48063 bic r3, r3, #1024
339 0008 1360 str r3, [r2]
246:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
- ARM GAS /tmp/ccOKVCkl.s page 11
+ ARM GAS /tmp/ccD9vOwP.s page 11
340 .loc 1 246 1 view .LVU73
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
380 .loc 1 262 3 view .LVU79
381 000e 1B6C ldr r3, [r3, #64]
382 0010 03F08053 and r3, r3, #268435456
- ARM GAS /tmp/ccOKVCkl.s page 12
+ ARM GAS /tmp/ccD9vOwP.s page 12
383 0014 0193 str r3, [sp, #4]
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** /* Get tick */
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** tickstart = HAL_GetTick();
- ARM GAS /tmp/ccOKVCkl.s page 13
+ ARM GAS /tmp/ccD9vOwP.s page 13
283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
455 .loc 1 286 23 discriminator 1 view .LVU104
456 0062 001B subs r0, r0, r4
- ARM GAS /tmp/ccOKVCkl.s page 14
+ ARM GAS /tmp/ccD9vOwP.s page 14
286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
496 .loc 1 306 3 view .LVU109
497 .LVL18:
307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c ****
- ARM GAS /tmp/ccOKVCkl.s page 15
+ ARM GAS /tmp/ccD9vOwP.s page 15
308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** return HAL_TIMEOUT;
541 .loc 1 320 14 view .LVU125
- ARM GAS /tmp/ccOKVCkl.s page 16
+ ARM GAS /tmp/ccD9vOwP.s page 16
542 003e 0320 movs r0, #3
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
572 005c 07D0 beq .L60
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
573 .loc 1 332 5 view .LVU132
- ARM GAS /tmp/ccOKVCkl.s page 17
+ ARM GAS /tmp/ccD9vOwP.s page 17
332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When exiting Stop mode by issuing an interrupt or a wakeup event,
359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * the HSI RC oscillator is selected as system clock.
360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** *
- ARM GAS /tmp/ccOKVCkl.s page 18
+ ARM GAS /tmp/ccD9vOwP.s page 18
361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @note When the voltage regulator operates in low power mode, an additional
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
633 0008 1E4B ldr r3, .L73
634 000a 1A6C ldr r2, [r3, #64]
635 000c 42F08052 orr r2, r2, #268435456
- ARM GAS /tmp/ccOKVCkl.s page 19
+ ARM GAS /tmp/ccD9vOwP.s page 19
636 0010 1A64 str r2, [r3, #64]
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
676 .loc 1 402 23 discriminator 1 view .LVU160
677 0046 001B subs r0, r0, r4
678 .loc 1 402 7 discriminator 1 view .LVU161
- ARM GAS /tmp/ccOKVCkl.s page 20
+ ARM GAS /tmp/ccD9vOwP.s page 20
679 0048 B0F57A7F cmp r0, #1000
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
712 .loc 1 423 5 is_stmt 0 view .LVU175
713 0068 012D cmp r5, #1
714 006a 08D0 beq .L72
- ARM GAS /tmp/ccOKVCkl.s page 21
+ ARM GAS /tmp/ccD9vOwP.s page 21
424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
754 .L74:
755 0082 00BF .align 2
756 .L73:
- ARM GAS /tmp/ccOKVCkl.s page 22
+ ARM GAS /tmp/ccD9vOwP.s page 22
757 0084 00380240 .word 1073887232
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @brief Configures the main internal regulator output voltage.
451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * @param VoltageScaling specifies the regulator output voltage to achieve
452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * a tradeoff between performance and power consumption.
- ARM GAS /tmp/ccOKVCkl.s page 23
+ ARM GAS /tmp/ccD9vOwP.s page 23
453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** * This parameter can be one of the following values:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
826 0008 42F08052 orr r2, r2, #268435456
827 000c 1A64 str r2, [r3, #64]
828 .loc 1 483 3 view .LVU195
- ARM GAS /tmp/ccOKVCkl.s page 24
+ ARM GAS /tmp/ccD9vOwP.s page 24
829 000e 1A6C ldr r2, [r3, #64]
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
870 0042 031B subs r3, r0, r4
871 .loc 1 496 9 discriminator 1 view .LVU212
872 0044 022B cmp r3, #2
- ARM GAS /tmp/ccOKVCkl.s page 25
+ ARM GAS /tmp/ccD9vOwP.s page 25
873 0046 F5D9 bls .L80
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
912 .loc 1 511 47 view .LVU226
913 0078 13F0007F tst r3, #33554432
914 007c 06D1 bne .L92
- ARM GAS /tmp/ccOKVCkl.s page 26
+ ARM GAS /tmp/ccD9vOwP.s page 26
512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** {
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccOKVCkl.s page 1
955 .L93:
526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
- ARM GAS /tmp/ccOKVCkl.s page 27
+ ARM GAS /tmp/ccD9vOwP.s page 27
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_pwr_ex.c **** }
@@ -1599,50 +1599,50 @@ ARM GAS /tmp/ccOKVCkl.s page 1
984 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
985 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
986 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccOKVCkl.s page 28
+ ARM GAS /tmp/ccD9vOwP.s page 28
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_pwr_ex.c
- /tmp/ccOKVCkl.s:20 .text.HAL_PWREx_EnableBkUpReg:00000000 $t
- /tmp/ccOKVCkl.s:26 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg
- /tmp/ccOKVCkl.s:90 .text.HAL_PWREx_EnableBkUpReg:00000038 $d
- /tmp/ccOKVCkl.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 $t
- /tmp/ccOKVCkl.s:101 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg
- /tmp/ccOKVCkl.s:165 .text.HAL_PWREx_DisableBkUpReg:00000038 $d
- /tmp/ccOKVCkl.s:170 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t
- /tmp/ccOKVCkl.s:176 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown
- /tmp/ccOKVCkl.s:195 .text.HAL_PWREx_EnableFlashPowerDown:0000000c $d
- /tmp/ccOKVCkl.s:200 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t
- /tmp/ccOKVCkl.s:206 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown
- /tmp/ccOKVCkl.s:225 .text.HAL_PWREx_DisableFlashPowerDown:0000000c $d
- /tmp/ccOKVCkl.s:230 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 $t
- /tmp/ccOKVCkl.s:236 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 HAL_PWREx_EnableMainRegulatorLowVoltage
- /tmp/ccOKVCkl.s:255 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000c $d
- /tmp/ccOKVCkl.s:260 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 $t
- /tmp/ccOKVCkl.s:266 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 HAL_PWREx_DisableMainRegulatorLowVoltage
- /tmp/ccOKVCkl.s:285 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000c $d
- /tmp/ccOKVCkl.s:290 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 $t
- /tmp/ccOKVCkl.s:296 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 HAL_PWREx_EnableLowRegulatorLowVoltage
- /tmp/ccOKVCkl.s:315 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000c $d
- /tmp/ccOKVCkl.s:320 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 $t
- /tmp/ccOKVCkl.s:326 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 HAL_PWREx_DisableLowRegulatorLowVoltage
- /tmp/ccOKVCkl.s:345 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000c $d
- /tmp/ccOKVCkl.s:350 .text.HAL_PWREx_EnableOverDrive:00000000 $t
- /tmp/ccOKVCkl.s:356 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive
- /tmp/ccOKVCkl.s:470 .text.HAL_PWREx_EnableOverDrive:00000074 $d
- /tmp/ccOKVCkl.s:476 .text.HAL_PWREx_DisableOverDrive:00000000 $t
- /tmp/ccOKVCkl.s:482 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive
- /tmp/ccOKVCkl.s:592 .text.HAL_PWREx_DisableOverDrive:00000074 $d
- /tmp/ccOKVCkl.s:598 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t
- /tmp/ccOKVCkl.s:604 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode
- /tmp/ccOKVCkl.s:757 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000084 $d
- /tmp/ccOKVCkl.s:766 .text.HAL_PWREx_GetVoltageRange:00000000 $t
- /tmp/ccOKVCkl.s:772 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange
- /tmp/ccOKVCkl.s:789 .text.HAL_PWREx_GetVoltageRange:0000000c $d
- /tmp/ccOKVCkl.s:794 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t
- /tmp/ccOKVCkl.s:800 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling
- /tmp/ccOKVCkl.s:974 .text.HAL_PWREx_ControlVoltageScaling:000000b8 $d
+ /tmp/ccD9vOwP.s:20 .text.HAL_PWREx_EnableBkUpReg:00000000 $t
+ /tmp/ccD9vOwP.s:26 .text.HAL_PWREx_EnableBkUpReg:00000000 HAL_PWREx_EnableBkUpReg
+ /tmp/ccD9vOwP.s:90 .text.HAL_PWREx_EnableBkUpReg:00000038 $d
+ /tmp/ccD9vOwP.s:95 .text.HAL_PWREx_DisableBkUpReg:00000000 $t
+ /tmp/ccD9vOwP.s:101 .text.HAL_PWREx_DisableBkUpReg:00000000 HAL_PWREx_DisableBkUpReg
+ /tmp/ccD9vOwP.s:165 .text.HAL_PWREx_DisableBkUpReg:00000038 $d
+ /tmp/ccD9vOwP.s:170 .text.HAL_PWREx_EnableFlashPowerDown:00000000 $t
+ /tmp/ccD9vOwP.s:176 .text.HAL_PWREx_EnableFlashPowerDown:00000000 HAL_PWREx_EnableFlashPowerDown
+ /tmp/ccD9vOwP.s:195 .text.HAL_PWREx_EnableFlashPowerDown:0000000c $d
+ /tmp/ccD9vOwP.s:200 .text.HAL_PWREx_DisableFlashPowerDown:00000000 $t
+ /tmp/ccD9vOwP.s:206 .text.HAL_PWREx_DisableFlashPowerDown:00000000 HAL_PWREx_DisableFlashPowerDown
+ /tmp/ccD9vOwP.s:225 .text.HAL_PWREx_DisableFlashPowerDown:0000000c $d
+ /tmp/ccD9vOwP.s:230 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 $t
+ /tmp/ccD9vOwP.s:236 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:00000000 HAL_PWREx_EnableMainRegulatorLowVoltage
+ /tmp/ccD9vOwP.s:255 .text.HAL_PWREx_EnableMainRegulatorLowVoltage:0000000c $d
+ /tmp/ccD9vOwP.s:260 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 $t
+ /tmp/ccD9vOwP.s:266 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:00000000 HAL_PWREx_DisableMainRegulatorLowVoltage
+ /tmp/ccD9vOwP.s:285 .text.HAL_PWREx_DisableMainRegulatorLowVoltage:0000000c $d
+ /tmp/ccD9vOwP.s:290 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 $t
+ /tmp/ccD9vOwP.s:296 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:00000000 HAL_PWREx_EnableLowRegulatorLowVoltage
+ /tmp/ccD9vOwP.s:315 .text.HAL_PWREx_EnableLowRegulatorLowVoltage:0000000c $d
+ /tmp/ccD9vOwP.s:320 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 $t
+ /tmp/ccD9vOwP.s:326 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:00000000 HAL_PWREx_DisableLowRegulatorLowVoltage
+ /tmp/ccD9vOwP.s:345 .text.HAL_PWREx_DisableLowRegulatorLowVoltage:0000000c $d
+ /tmp/ccD9vOwP.s:350 .text.HAL_PWREx_EnableOverDrive:00000000 $t
+ /tmp/ccD9vOwP.s:356 .text.HAL_PWREx_EnableOverDrive:00000000 HAL_PWREx_EnableOverDrive
+ /tmp/ccD9vOwP.s:470 .text.HAL_PWREx_EnableOverDrive:00000074 $d
+ /tmp/ccD9vOwP.s:476 .text.HAL_PWREx_DisableOverDrive:00000000 $t
+ /tmp/ccD9vOwP.s:482 .text.HAL_PWREx_DisableOverDrive:00000000 HAL_PWREx_DisableOverDrive
+ /tmp/ccD9vOwP.s:592 .text.HAL_PWREx_DisableOverDrive:00000074 $d
+ /tmp/ccD9vOwP.s:598 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 $t
+ /tmp/ccD9vOwP.s:604 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000000 HAL_PWREx_EnterUnderDriveSTOPMode
+ /tmp/ccD9vOwP.s:757 .text.HAL_PWREx_EnterUnderDriveSTOPMode:00000084 $d
+ /tmp/ccD9vOwP.s:766 .text.HAL_PWREx_GetVoltageRange:00000000 $t
+ /tmp/ccD9vOwP.s:772 .text.HAL_PWREx_GetVoltageRange:00000000 HAL_PWREx_GetVoltageRange
+ /tmp/ccD9vOwP.s:789 .text.HAL_PWREx_GetVoltageRange:0000000c $d
+ /tmp/ccD9vOwP.s:794 .text.HAL_PWREx_ControlVoltageScaling:00000000 $t
+ /tmp/ccD9vOwP.s:800 .text.HAL_PWREx_ControlVoltageScaling:00000000 HAL_PWREx_ControlVoltageScaling
+ /tmp/ccD9vOwP.s:974 .text.HAL_PWREx_ControlVoltageScaling:000000b8 $d
UNDEFINED SYMBOLS
HAL_GetTick
diff --git a/build/stm32f7xx_hal_rcc.lst b/build/stm32f7xx_hal_rcc.lst
index 1a2346f..7c12abf 100644
--- a/build/stm32f7xx_hal_rcc.lst
+++ b/build/stm32f7xx_hal_rcc.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccuLwTpp.s page 1
+ARM GAS /tmp/ccnjWXP5.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (if the application needs higher frequency/performance)
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Configure the System clock frequency and Flash settings
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Configure the AHB and APB buses prescalers
- ARM GAS /tmp/ccuLwTpp.s page 2
+ ARM GAS /tmp/ccnjWXP5.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (+) Enable the clock for the peripheral(s) to be used
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_GPIO_PORT GPIOA
- ARM GAS /tmp/ccuLwTpp.s page 3
+ ARM GAS /tmp/ccnjWXP5.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #define MCO1_PIN GPIO_PIN_8
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (#) CSS (Clock security system), once enable using the function HAL_RCC_EnableCSS()
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** and if a HSE clock failure occurs(HSE used directly or through PLL as System
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** clock source), the System clock is automatically switched to HSI and an interrupt
- ARM GAS /tmp/ccuLwTpp.s page 4
+ ARM GAS /tmp/ccnjWXP5.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** is generated if enabled. The interrupt is linked to the Cortex-M7 NMI
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
30 @ args = 0, pretend = 0, frame = 0
31 @ frame_needed = 0, uses_anonymous_args = 0
32 0000 38B5 push {r3, r4, r5, lr}
- ARM GAS /tmp/ccuLwTpp.s page 5
+ ARM GAS /tmp/ccnjWXP5.s page 5
33 .LCFI0:
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
- ARM GAS /tmp/ccuLwTpp.s page 6
+ ARM GAS /tmp/ccnjWXP5.s page 6
215:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Set HSITRIM[4:0] bits to the reset value */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Wait till PLLI2S is disabled */
270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (READ_BIT(RCC->CR, RCC_CR_PLLI2SRDY) != RESET)
271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 7
+ ARM GAS /tmp/ccnjWXP5.s page 7
272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE)
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
326:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
73 .loc 1 326 1 view .LVU14
74 0028 38BD pop {r3, r4, r5, pc}
- ARM GAS /tmp/ccuLwTpp.s page 8
+ ARM GAS /tmp/ccnjWXP5.s page 8
75 .LVL4:
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
115 .loc 1 234 3 is_stmt 1 view .LVU28
234:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
116 .loc 1 234 15 is_stmt 0 view .LVU29
- ARM GAS /tmp/ccuLwTpp.s page 9
+ ARM GAS /tmp/ccnjWXP5.s page 9
117 005a FFF7FEFF bl HAL_GetTick
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
158 008c 23F08073 bic r3, r3, #16777216
159 0090 1360 str r3, [r2]
255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 10
+ ARM GAS /tmp/ccnjWXP5.s page 10
160 .loc 1 255 3 view .LVU43
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
200 00bc 1B68 ldr r3, [r3]
270:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
201 .loc 1 270 46 view .LVU58
- ARM GAS /tmp/ccuLwTpp.s page 11
+ ARM GAS /tmp/ccnjWXP5.s page 11
202 00be 13F0006F tst r3, #134217728
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
242 .loc 1 287 24 discriminator 1 view .LVU73
243 00f0 001B subs r0, r0, r4
- ARM GAS /tmp/ccuLwTpp.s page 12
+ ARM GAS /tmp/ccnjWXP5.s page 12
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
284 .loc 1 318 3 is_stmt 1 view .LVU88
318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 13
+ ARM GAS /tmp/ccnjWXP5.s page 13
285 .loc 1 318 7 is_stmt 0 view .LVU89
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
321 .loc 1 344 3 view .LVU93
345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t pll_config;
322 .loc 1 345 3 view .LVU94
- ARM GAS /tmp/ccuLwTpp.s page 14
+ ARM GAS /tmp/ccnjWXP5.s page 14
346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** FlagStatus pwrclkchanged = RESET;
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
357 0020 924B ldr r3, .L124
358 0022 9B68 ldr r3, [r3, #8]
359 0024 03F00C03 and r3, r3, #12
- ARM GAS /tmp/ccuLwTpp.s page 15
+ ARM GAS /tmp/ccnjWXP5.s page 15
360 .loc 1 364 9 view .LVU108
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
398 0060 6368 ldr r3, [r4, #4]
366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
399 .loc 1 366 58 discriminator 1 view .LVU120
- ARM GAS /tmp/ccuLwTpp.s page 16
+ ARM GAS /tmp/ccnjWXP5.s page 16
400 0062 002B cmp r3, #0
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
413 .loc 1 415 10 is_stmt 0 view .LVU127
414 0070 7E4B ldr r3, .L124
415 0072 9B68 ldr r3, [r3, #8]
- ARM GAS /tmp/ccuLwTpp.s page 17
+ ARM GAS /tmp/ccnjWXP5.s page 17
416 .loc 1 415 8 view .LVU128
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
444 .loc 1 442 9 is_stmt 1 view .LVU137
445 .L49:
- ARM GAS /tmp/ccuLwTpp.s page 18
+ ARM GAS /tmp/ccnjWXP5.s page 18
446 .loc 1 442 52 view .LVU138
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
487 .L40:
383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
488 .loc 1 383 52 view .LVU155
- ARM GAS /tmp/ccuLwTpp.s page 19
+ ARM GAS /tmp/ccnjWXP5.s page 19
383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
531 010c 1A60 str r2, [r3]
532 010e D7E7 b .L36
533 .L39:
- ARM GAS /tmp/ccuLwTpp.s page 20
+ ARM GAS /tmp/ccnjWXP5.s page 20
394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
572 .loc 1 419 12 is_stmt 0 view .LVU183
573 0138 4C4B ldr r3, .L124
574 013a 1B68 ldr r3, [r3]
- ARM GAS /tmp/ccuLwTpp.s page 21
+ ARM GAS /tmp/ccnjWXP5.s page 21
419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
474:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Check the parameters */
476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
- ARM GAS /tmp/ccuLwTpp.s page 22
+ ARM GAS /tmp/ccnjWXP5.s page 22
598 .loc 1 476 5 is_stmt 1 view .LVU191
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
636 .L114:
451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
637 .loc 1 451 9 is_stmt 1 view .LVU207
- ARM GAS /tmp/ccuLwTpp.s page 23
+ ARM GAS /tmp/ccnjWXP5.s page 23
638 018e 374A ldr r2, .L124
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
680 .L54:
493:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
- ARM GAS /tmp/ccuLwTpp.s page 24
+ ARM GAS /tmp/ccnjWXP5.s page 24
495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
715 .loc 1 515 3 is_stmt 1 view .LVU232
716 .loc 1 515 26 is_stmt 0 view .LVU233
- ARM GAS /tmp/ccuLwTpp.s page 25
+ ARM GAS /tmp/ccnjWXP5.s page 25
717 01f0 2368 ldr r3, [r4]
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
757 0220 10D0 beq .L116
758 .L61:
530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 26
+ ARM GAS /tmp/ccnjWXP5.s page 26
531:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Enable write access to Backup domain */
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
791 .loc 1 535 7 is_stmt 1 view .LVU259
535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
792 .loc 1 535 19 is_stmt 0 view .LVU260
- ARM GAS /tmp/ccuLwTpp.s page 27
+ ARM GAS /tmp/ccnjWXP5.s page 27
793 024e FFF7FEFF bl HAL_GetTick
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
835 .loc 1 552 7 is_stmt 1 view .LVU273
836 .loc 1 552 19 is_stmt 0 view .LVU274
837 0282 FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccuLwTpp.s page 28
+ ARM GAS /tmp/ccnjWXP5.s page 28
838 .LVL60:
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
881 02be 1A6F ldr r2, [r3, #112]
882 02c0 42F00402 orr r2, r2, #4
883 02c4 1A67 str r2, [r3, #112]
- ARM GAS /tmp/ccuLwTpp.s page 29
+ ARM GAS /tmp/ccnjWXP5.s page 29
547:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Check the LSE State */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Restore clock configuration if changed */
579:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (pwrclkchanged == SET)
919 .loc 1 579 5 is_stmt 1 view .LVU300
- ARM GAS /tmp/ccuLwTpp.s page 30
+ ARM GAS /tmp/ccnjWXP5.s page 30
920 .loc 1 579 8 is_stmt 0 view .LVU301
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
612:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
- ARM GAS /tmp/ccuLwTpp.s page 31
+ ARM GAS /tmp/ccnjWXP5.s page 31
614:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Wait till PLL is ready */
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
- ARM GAS /tmp/ccuLwTpp.s page 32
+ ARM GAS /tmp/ccnjWXP5.s page 32
954 .loc 1 659 9 is_stmt 1 view .LVU314
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
996 .loc 1 608 9 view .LVU331
608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
- ARM GAS /tmp/ccuLwTpp.s page 33
+ ARM GAS /tmp/ccnjWXP5.s page 33
997 .loc 1 608 21 is_stmt 0 view .LVU332
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1040 .loc 1 636 9 view .LVU343
1041 038e 1368 ldr r3, [r2]
1042 0390 43F08073 orr r3, r3, #16777216
- ARM GAS /tmp/ccuLwTpp.s page 34
+ ARM GAS /tmp/ccnjWXP5.s page 34
1043 0394 1360 str r3, [r2]
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PL
679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PL
680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** #else
- ARM GAS /tmp/ccuLwTpp.s page 35
+ ARM GAS /tmp/ccnjWXP5.s page 35
681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) ||
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1103 03d6 29D1 bne .L101
676:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U)
1104 .loc 1 676 77 view .LVU367
- ARM GAS /tmp/ccuLwTpp.s page 36
+ ARM GAS /tmp/ccnjWXP5.s page 36
1105 03d8 616A ldr r1, [r4, #36]
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1147 .cfi_restore 14
351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
1148 .loc 1 351 12 view .LVU381
- ARM GAS /tmp/ccuLwTpp.s page 37
+ ARM GAS /tmp/ccnjWXP5.s page 37
1149 0412 0120 movs r0, #1
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1196 042e F7E7 b .L31
1197 .L102:
1198 0430 0120 movs r0, #1
- ARM GAS /tmp/ccuLwTpp.s page 38
+ ARM GAS /tmp/ccnjWXP5.s page 38
1199 0432 F5E7 b .L31
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
721:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */
722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
723:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 39
+ ARM GAS /tmp/ccnjWXP5.s page 39
724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t tickstart = 0;
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
778:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* HSE is selected as System Clock Source */
780:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
- ARM GAS /tmp/ccuLwTpp.s page 40
+ ARM GAS /tmp/ccnjWXP5.s page 40
781:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /*-------------------------- PCLK1 Configuration ---------------------------*/
836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
- ARM GAS /tmp/ccuLwTpp.s page 41
+ ARM GAS /tmp/ccnjWXP5.s page 41
838:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_HSE: HSE clock selected as MCO2 source
893:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @arg RCC_MCO2SOURCE_PLLCLK: main PLL clock selected as MCO2 source
894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @param RCC_MCODiv specifies the MCOx prescaler.
- ARM GAS /tmp/ccuLwTpp.s page 42
+ ARM GAS /tmp/ccnjWXP5.s page 42
895:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * This parameter can be one of the following values:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1261 0014 336B ldr r3, [r6, #48]
1262 0016 03F00103 and r3, r3, #1
1263 001a 0193 str r3, [sp, #4]
- ARM GAS /tmp/ccuLwTpp.s page 43
+ ARM GAS /tmp/ccnjWXP5.s page 43
1264 .loc 1 915 5 view .LVU403
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else
929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** assert_param(IS_RCC_MCO2SOURCE(RCC_MCOSource));
- ARM GAS /tmp/ccuLwTpp.s page 44
+ ARM GAS /tmp/ccnjWXP5.s page 44
931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1335 .loc 1 936 25 is_stmt 0 view .LVU429
1336 005e 4FF40073 mov r3, #512
1337 0062 0393 str r3, [sp, #12]
- ARM GAS /tmp/ccuLwTpp.s page 45
+ ARM GAS /tmp/ccnjWXP5.s page 45
937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1379 .LFE144:
1381 .section .text.HAL_RCC_EnableCSS,"ax",%progbits
1382 .align 1
- ARM GAS /tmp/ccuLwTpp.s page 46
+ ARM GAS /tmp/ccnjWXP5.s page 46
1383 .global HAL_RCC_EnableCSS
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1419 .cfi_startproc
1420 @ args = 0, pretend = 0, frame = 0
1421 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccuLwTpp.s page 47
+ ARM GAS /tmp/ccnjWXP5.s page 47
1422 @ link register save eliminated.
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @retval SYSCLK frequency
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** uint32_t HAL_RCC_GetSysClockFreq(void)
- ARM GAS /tmp/ccuLwTpp.s page 48
+ ARM GAS /tmp/ccnjWXP5.s page 48
1002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1478 .loc 1 1024 11 is_stmt 0 view .LVU461
1479 001a 5B68 ldr r3, [r3, #4]
1480 .loc 1 1024 10 view .LVU462
- ARM GAS /tmp/ccuLwTpp.s page 49
+ ARM GAS /tmp/ccnjWXP5.s page 49
1481 001c 13F4800F tst r3, #4194304
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
1514 .loc 1 1046 1 is_stmt 0 view .LVU476
1515 0046 08BD pop {r3, pc}
- ARM GAS /tmp/ccuLwTpp.s page 50
+ ARM GAS /tmp/ccnjWXP5.s page 50
1516 .LVL106:
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1560 009a 00BF .align 2
1561 .L147:
1562 009c 00380240 .word 1073887232
- ARM GAS /tmp/ccuLwTpp.s page 51
+ ARM GAS /tmp/ccnjWXP5.s page 51
1563 00a0 40787D01 .word 25000000
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1608 0018 4F4A ldr r2, .L177
1609 001a 1368 ldr r3, [r2]
1610 001c 23F00F03 bic r3, r3, #15
- ARM GAS /tmp/ccuLwTpp.s page 52
+ ARM GAS /tmp/ccnjWXP5.s page 52
1611 0020 0B43 orrs r3, r3, r1
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1650 .loc 1 771 5 view .LVU512
1651 005a 404A ldr r2, .L177+4
1652 005c 9368 ldr r3, [r2, #8]
- ARM GAS /tmp/ccuLwTpp.s page 53
+ ARM GAS /tmp/ccnjWXP5.s page 53
1653 005e 23F0F003 bic r3, r3, #240
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
810:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
1692 .loc 1 810 17 is_stmt 0 view .LVU528
1693 0090 FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccuLwTpp.s page 54
+ ARM GAS /tmp/ccnjWXP5.s page 54
1694 .LVL112:
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1733 00c2 0120 movs r0, #1
1734 .LVL116:
785:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
- ARM GAS /tmp/ccuLwTpp.s page 55
+ ARM GAS /tmp/ccnjWXP5.s page 55
1735 .loc 1 785 16 view .LVU544
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
1776 .loc 1 836 26 is_stmt 0 view .LVU558
1777 00f6 2368 ldr r3, [r4]
- ARM GAS /tmp/ccuLwTpp.s page 56
+ ARM GAS /tmp/ccnjWXP5.s page 56
836:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1818 0134 D840 lsrs r0, r0, r3
850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
1819 .loc 1 850 19 discriminator 1 view .LVU573
- ARM GAS /tmp/ccuLwTpp.s page 57
+ ARM GAS /tmp/ccnjWXP5.s page 57
1820 0136 0B4B ldr r3, .L177+12
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1864 .loc 1 803 16 view .LVU583
1865 0150 F8E7 b .L150
1866 .LVL128:
- ARM GAS /tmp/ccuLwTpp.s page 58
+ ARM GAS /tmp/ccnjWXP5.s page 58
1867 .L170:
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1911 .syntax unified
1912 .thumb
1913 .thumb_func
- ARM GAS /tmp/ccuLwTpp.s page 59
+ ARM GAS /tmp/ccnjWXP5.s page 59
1915 HAL_RCC_GetPCLK1Freq:
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /**
1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @brief Returns the PCLK2 frequency
1074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @note Each time PCLK2 changes, this function must be called to update the
- ARM GAS /tmp/ccuLwTpp.s page 60
+ ARM GAS /tmp/ccnjWXP5.s page 60
1075:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * right PCLK2 value. Otherwise, any configuration based on this function will be incorrec
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1089:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @retval None
1090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** */
1091:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
- ARM GAS /tmp/ccuLwTpp.s page 61
+ ARM GAS /tmp/ccnjWXP5.s page 61
1092:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2032 .L195:
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else
- ARM GAS /tmp/ccuLwTpp.s page 62
+ ARM GAS /tmp/ccnjWXP5.s page 62
1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2063 .L200:
1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
1141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** else
- ARM GAS /tmp/ccuLwTpp.s page 63
+ ARM GAS /tmp/ccnjWXP5.s page 63
1142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** {
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2101 .loc 1 1158 60 view .LVU648
2102 0070 03F44033 and r3, r3, #196608
2103 .loc 1 1158 80 view .LVU649
- ARM GAS /tmp/ccuLwTpp.s page 64
+ ARM GAS /tmp/ccnjWXP5.s page 64
2104 0074 03F58033 add r3, r3, #65536
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccuLwTpp.s page 65
+ ARM GAS /tmp/ccnjWXP5.s page 65
34:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Fallback for __has_builtin */
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
- ARM GAS /tmp/ccuLwTpp.s page 66
+ ARM GAS /tmp/ccnjWXP5.s page 66
91:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
- ARM GAS /tmp/ccuLwTpp.s page 67
+ ARM GAS /tmp/ccnjWXP5.s page 67
148:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the Control Register.
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccuLwTpp.s page 68
+ ARM GAS /tmp/ccnjWXP5.s page 68
205:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_IPSR(void)
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccuLwTpp.s page 69
+ ARM GAS /tmp/ccnjWXP5.s page 69
262:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- ARM GAS /tmp/ccuLwTpp.s page 70
+ ARM GAS /tmp/ccnjWXP5.s page 70
319:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccuLwTpp.s page 71
+ ARM GAS /tmp/ccnjWXP5.s page 71
376:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
- ARM GAS /tmp/ccuLwTpp.s page 72
+ ARM GAS /tmp/ccnjWXP5.s page 72
433:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
- ARM GAS /tmp/ccuLwTpp.s page 73
+ ARM GAS /tmp/ccnjWXP5.s page 73
490:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
- ARM GAS /tmp/ccuLwTpp.s page 74
+ ARM GAS /tmp/ccnjWXP5.s page 74
547:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccuLwTpp.s page 75
+ ARM GAS /tmp/ccnjWXP5.s page 75
604:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
- ARM GAS /tmp/ccuLwTpp.s page 76
+ ARM GAS /tmp/ccnjWXP5.s page 76
661:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure PSPLIM is RAZ/WI
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
- ARM GAS /tmp/ccuLwTpp.s page 77
+ ARM GAS /tmp/ccnjWXP5.s page 77
718:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
- ARM GAS /tmp/ccuLwTpp.s page 78
+ ARM GAS /tmp/ccnjWXP5.s page 78
775:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccuLwTpp.s page 79
+ ARM GAS /tmp/ccnjWXP5.s page 79
832:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
- ARM GAS /tmp/ccuLwTpp.s page 80
+ ARM GAS /tmp/ccnjWXP5.s page 80
889:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccuLwTpp.s page 81
+ ARM GAS /tmp/ccnjWXP5.s page 81
946:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
992:Drivers/CMSIS/Include/cmsis_gcc.h **** result = value; /* r will be reversed bits of v; first get LSB of v */
- ARM GAS /tmp/ccuLwTpp.s page 82
+ ARM GAS /tmp/ccnjWXP5.s page 82
993:Drivers/CMSIS/Include/cmsis_gcc.h **** for (value >>= 1U; value != 0U; value >>= 1U)
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2169 .loc 1 1117 33 is_stmt 0 view .LVU675
2170 00b4 0023 movs r3, #0
2171 00b6 C360 str r3, [r0, #12]
- ARM GAS /tmp/ccuLwTpp.s page 83
+ ARM GAS /tmp/ccnjWXP5.s page 83
2172 00b8 B3E7 b .L195
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2216 .thumb_func
2218 HAL_RCC_GetClockConfig:
2219 .LVL134:
- ARM GAS /tmp/ccuLwTpp.s page 84
+ ARM GAS /tmp/ccnjWXP5.s page 84
2220 .LFB152:
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /* Get the APB2 configuration ----------------------------------------------*/
1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3);
- ARM GAS /tmp/ccuLwTpp.s page 85
+ ARM GAS /tmp/ccnjWXP5.s page 85
2252 .loc 1 1188 3 is_stmt 1 view .LVU702
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c ****
1212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** /**
- ARM GAS /tmp/ccuLwTpp.s page 86
+ ARM GAS /tmp/ccnjWXP5.s page 86
1213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** * @brief RCC Clock Security System interrupt callback
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2328 .LVL135:
1208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c **** }
2329 .loc 1 1208 5 view .LVU719
- ARM GAS /tmp/ccuLwTpp.s page 87
+ ARM GAS /tmp/ccnjWXP5.s page 87
2330 0012 024B ldr r3, .L213
@@ -5184,54 +5184,54 @@ ARM GAS /tmp/ccuLwTpp.s page 1
2350 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
2351 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
2352 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccuLwTpp.s page 88
+ ARM GAS /tmp/ccnjWXP5.s page 88
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_rcc.c
- /tmp/ccuLwTpp.s:20 .text.HAL_RCC_DeInit:00000000 $t
- /tmp/ccuLwTpp.s:26 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
- /tmp/ccuLwTpp.s:299 .text.HAL_RCC_DeInit:00000144 $d
- /tmp/ccuLwTpp.s:308 .text.HAL_RCC_OscConfig:00000000 $t
- /tmp/ccuLwTpp.s:314 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
- /tmp/ccuLwTpp.s:819 .text.HAL_RCC_OscConfig:0000026c $d
- /tmp/ccuLwTpp.s:824 .text.HAL_RCC_OscConfig:00000274 $t
- /tmp/ccuLwTpp.s:1214 .text.HAL_RCC_OscConfig:00000440 $d
- /tmp/ccuLwTpp.s:1219 .text.HAL_RCC_MCOConfig:00000000 $t
- /tmp/ccuLwTpp.s:1225 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
- /tmp/ccuLwTpp.s:1375 .text.HAL_RCC_MCOConfig:0000008c $d
- /tmp/ccuLwTpp.s:1382 .text.HAL_RCC_EnableCSS:00000000 $t
- /tmp/ccuLwTpp.s:1388 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
- /tmp/ccuLwTpp.s:1405 .text.HAL_RCC_EnableCSS:0000000c $d
- /tmp/ccuLwTpp.s:1410 .text.HAL_RCC_DisableCSS:00000000 $t
- /tmp/ccuLwTpp.s:1416 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
- /tmp/ccuLwTpp.s:1433 .text.HAL_RCC_DisableCSS:0000000c $d
- /tmp/ccuLwTpp.s:1439 .text.HAL_RCC_GetSysClockFreq:00000000 $t
- /tmp/ccuLwTpp.s:1445 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
- /tmp/ccuLwTpp.s:1562 .text.HAL_RCC_GetSysClockFreq:0000009c $d
- /tmp/ccuLwTpp.s:1569 .text.HAL_RCC_ClockConfig:00000000 $t
- /tmp/ccuLwTpp.s:1575 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
- /tmp/ccuLwTpp.s:1874 .text.HAL_RCC_ClockConfig:00000158 $d
- /tmp/ccuLwTpp.s:1883 .text.HAL_RCC_GetHCLKFreq:00000000 $t
- /tmp/ccuLwTpp.s:1889 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
- /tmp/ccuLwTpp.s:1904 .text.HAL_RCC_GetHCLKFreq:00000008 $d
- /tmp/ccuLwTpp.s:1909 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
- /tmp/ccuLwTpp.s:1915 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
- /tmp/ccuLwTpp.s:1944 .text.HAL_RCC_GetPCLK1Freq:00000018 $d
- /tmp/ccuLwTpp.s:1950 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
- /tmp/ccuLwTpp.s:1956 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
- /tmp/ccuLwTpp.s:1985 .text.HAL_RCC_GetPCLK2Freq:00000018 $d
- /tmp/ccuLwTpp.s:1991 .text.HAL_RCC_GetOscConfig:00000000 $t
- /tmp/ccuLwTpp.s:1997 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
- /tmp/ccuLwTpp.s:2207 .text.HAL_RCC_GetOscConfig:000000dc $d
- /tmp/ccuLwTpp.s:2212 .text.HAL_RCC_GetClockConfig:00000000 $t
- /tmp/ccuLwTpp.s:2218 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
- /tmp/ccuLwTpp.s:2273 .text.HAL_RCC_GetClockConfig:00000034 $d
- /tmp/ccuLwTpp.s:2279 .text.HAL_RCC_CSSCallback:00000000 $t
- /tmp/ccuLwTpp.s:2285 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
- /tmp/ccuLwTpp.s:2298 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
- /tmp/ccuLwTpp.s:2304 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
- /tmp/ccuLwTpp.s:2338 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
+ /tmp/ccnjWXP5.s:20 .text.HAL_RCC_DeInit:00000000 $t
+ /tmp/ccnjWXP5.s:26 .text.HAL_RCC_DeInit:00000000 HAL_RCC_DeInit
+ /tmp/ccnjWXP5.s:299 .text.HAL_RCC_DeInit:00000144 $d
+ /tmp/ccnjWXP5.s:308 .text.HAL_RCC_OscConfig:00000000 $t
+ /tmp/ccnjWXP5.s:314 .text.HAL_RCC_OscConfig:00000000 HAL_RCC_OscConfig
+ /tmp/ccnjWXP5.s:819 .text.HAL_RCC_OscConfig:0000026c $d
+ /tmp/ccnjWXP5.s:824 .text.HAL_RCC_OscConfig:00000274 $t
+ /tmp/ccnjWXP5.s:1214 .text.HAL_RCC_OscConfig:00000440 $d
+ /tmp/ccnjWXP5.s:1219 .text.HAL_RCC_MCOConfig:00000000 $t
+ /tmp/ccnjWXP5.s:1225 .text.HAL_RCC_MCOConfig:00000000 HAL_RCC_MCOConfig
+ /tmp/ccnjWXP5.s:1375 .text.HAL_RCC_MCOConfig:0000008c $d
+ /tmp/ccnjWXP5.s:1382 .text.HAL_RCC_EnableCSS:00000000 $t
+ /tmp/ccnjWXP5.s:1388 .text.HAL_RCC_EnableCSS:00000000 HAL_RCC_EnableCSS
+ /tmp/ccnjWXP5.s:1405 .text.HAL_RCC_EnableCSS:0000000c $d
+ /tmp/ccnjWXP5.s:1410 .text.HAL_RCC_DisableCSS:00000000 $t
+ /tmp/ccnjWXP5.s:1416 .text.HAL_RCC_DisableCSS:00000000 HAL_RCC_DisableCSS
+ /tmp/ccnjWXP5.s:1433 .text.HAL_RCC_DisableCSS:0000000c $d
+ /tmp/ccnjWXP5.s:1439 .text.HAL_RCC_GetSysClockFreq:00000000 $t
+ /tmp/ccnjWXP5.s:1445 .text.HAL_RCC_GetSysClockFreq:00000000 HAL_RCC_GetSysClockFreq
+ /tmp/ccnjWXP5.s:1562 .text.HAL_RCC_GetSysClockFreq:0000009c $d
+ /tmp/ccnjWXP5.s:1569 .text.HAL_RCC_ClockConfig:00000000 $t
+ /tmp/ccnjWXP5.s:1575 .text.HAL_RCC_ClockConfig:00000000 HAL_RCC_ClockConfig
+ /tmp/ccnjWXP5.s:1874 .text.HAL_RCC_ClockConfig:00000158 $d
+ /tmp/ccnjWXP5.s:1883 .text.HAL_RCC_GetHCLKFreq:00000000 $t
+ /tmp/ccnjWXP5.s:1889 .text.HAL_RCC_GetHCLKFreq:00000000 HAL_RCC_GetHCLKFreq
+ /tmp/ccnjWXP5.s:1904 .text.HAL_RCC_GetHCLKFreq:00000008 $d
+ /tmp/ccnjWXP5.s:1909 .text.HAL_RCC_GetPCLK1Freq:00000000 $t
+ /tmp/ccnjWXP5.s:1915 .text.HAL_RCC_GetPCLK1Freq:00000000 HAL_RCC_GetPCLK1Freq
+ /tmp/ccnjWXP5.s:1944 .text.HAL_RCC_GetPCLK1Freq:00000018 $d
+ /tmp/ccnjWXP5.s:1950 .text.HAL_RCC_GetPCLK2Freq:00000000 $t
+ /tmp/ccnjWXP5.s:1956 .text.HAL_RCC_GetPCLK2Freq:00000000 HAL_RCC_GetPCLK2Freq
+ /tmp/ccnjWXP5.s:1985 .text.HAL_RCC_GetPCLK2Freq:00000018 $d
+ /tmp/ccnjWXP5.s:1991 .text.HAL_RCC_GetOscConfig:00000000 $t
+ /tmp/ccnjWXP5.s:1997 .text.HAL_RCC_GetOscConfig:00000000 HAL_RCC_GetOscConfig
+ /tmp/ccnjWXP5.s:2207 .text.HAL_RCC_GetOscConfig:000000dc $d
+ /tmp/ccnjWXP5.s:2212 .text.HAL_RCC_GetClockConfig:00000000 $t
+ /tmp/ccnjWXP5.s:2218 .text.HAL_RCC_GetClockConfig:00000000 HAL_RCC_GetClockConfig
+ /tmp/ccnjWXP5.s:2273 .text.HAL_RCC_GetClockConfig:00000034 $d
+ /tmp/ccnjWXP5.s:2279 .text.HAL_RCC_CSSCallback:00000000 $t
+ /tmp/ccnjWXP5.s:2285 .text.HAL_RCC_CSSCallback:00000000 HAL_RCC_CSSCallback
+ /tmp/ccnjWXP5.s:2298 .text.HAL_RCC_NMI_IRQHandler:00000000 $t
+ /tmp/ccnjWXP5.s:2304 .text.HAL_RCC_NMI_IRQHandler:00000000 HAL_RCC_NMI_IRQHandler
+ /tmp/ccnjWXP5.s:2338 .text.HAL_RCC_NMI_IRQHandler:0000001c $d
UNDEFINED SYMBOLS
HAL_GetTick
diff --git a/build/stm32f7xx_hal_rcc_ex.lst b/build/stm32f7xx_hal_rcc_ex.lst
index f92e28a..cb76c18 100644
--- a/build/stm32f7xx_hal_rcc_ex.lst
+++ b/build/stm32f7xx_hal_rcc_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccaqdy02.s page 1
+ARM GAS /tmp/ccfifxFc.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /** @defgroup RCCEx RCCEx
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** * @brief RCCEx HAL module driver
- ARM GAS /tmp/ccaqdy02.s page 2
+ ARM GAS /tmp/ccfifxFc.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** * @{
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** @endverbatim
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** * @{
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** */
- ARM GAS /tmp/ccaqdy02.s page 3
+ ARM GAS /tmp/ccfifxFc.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** #if defined (STM32F745xx) || defined (STM32F746xx) || defined (STM32F756xx) || defined (STM32F765xx
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
53 .loc 1 117 3 view .LVU8
54 .loc 1 117 21 is_stmt 0 view .LVU9
55 0006 0668 ldr r6, [r0]
- ARM GAS /tmp/ccaqdy02.s page 4
+ ARM GAS /tmp/ccfifxFc.s page 4
56 .loc 1 117 5 view .LVU10
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure SAI1 Clock source */
139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
89 .loc 1 139 5 view .LVU24
- ARM GAS /tmp/ccaqdy02.s page 5
+ ARM GAS /tmp/ccfifxFc.s page 5
90 0032 AC4A ldr r2, .L87
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
123 0068 216C ldr r1, [r4, #64]
124 006a 0B43 orrs r3, r3, r1
125 006c C2F88C30 str r3, [r2, #140]
- ARM GAS /tmp/ccaqdy02.s page 6
+ ARM GAS /tmp/ccfifxFc.s page 6
160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
184:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Enable Power Clock*/
- ARM GAS /tmp/ccaqdy02.s page 7
+ ARM GAS /tmp/ccfifxFc.s page 7
186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PWR_CLK_ENABLE();
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
158 .loc 1 238 3 view .LVU49
159 .loc 1 238 21 is_stmt 0 view .LVU50
160 0090 2368 ldr r3, [r4]
- ARM GAS /tmp/ccaqdy02.s page 8
+ ARM GAS /tmp/ccfifxFc.s page 8
161 .loc 1 238 5 view .LVU51
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
195 00cc 2368 ldr r3, [r4]
196 .loc 1 258 5 view .LVU64
197 00ce 13F4004F tst r3, #32768
- ARM GAS /tmp/ccaqdy02.s page 9
+ ARM GAS /tmp/ccfifxFc.s page 9
198 00d2 08D0 beq .L19
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
229 .loc 1 281 5 is_stmt 1 view .LVU75
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the I2C4 clock source */
- ARM GAS /tmp/ccaqdy02.s page 10
+ ARM GAS /tmp/ccfifxFc.s page 10
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_I2C4_CONFIG(PeriphClkInit->I2c4ClockSelection);
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
263 0142 23F00C03 bic r3, r3, #12
264 0146 A16C ldr r1, [r4, #72]
265 0148 0B43 orrs r3, r3, r1
- ARM GAS /tmp/ccaqdy02.s page 11
+ ARM GAS /tmp/ccfifxFc.s page 11
266 014a C2F89030 str r3, [r2, #144]
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- UART5 Configuration -----------------------------------*
328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5)
298 .loc 1 328 3 view .LVU97
- ARM GAS /tmp/ccaqdy02.s page 12
+ ARM GAS /tmp/ccfifxFc.s page 12
299 .loc 1 328 21 is_stmt 0 view .LVU98
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
333 01bc 08D0 beq .L28
349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Check the parameters */
- ARM GAS /tmp/ccaqdy02.s page 13
+ ARM GAS /tmp/ccfifxFc.s page 13
351:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection));
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_CEC_CONFIG(PeriphClkInit->CecClockSelection);
365 .loc 1 374 5 view .LVU121
366 01f2 3C4A ldr r2, .L87
- ARM GAS /tmp/ccaqdy02.s page 14
+ ARM GAS /tmp/ccfifxFc.s page 14
367 01f4 D2F89030 ldr r3, [r2, #144]
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
400 022e 00D0 beq .L32
396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** pllsaiused = 1;
- ARM GAS /tmp/ccaqdy02.s page 15
+ ARM GAS /tmp/ccfifxFc.s page 15
401 .loc 1 397 16 view .LVU133
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** #if defined (STM32F765xx) || defined (STM32F767xx) || defined (STM32F769xx) || defined (STM32F777xx
422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*------------------------------------- SDMMC2 Configuration ------------------------------------
- ARM GAS /tmp/ccaqdy02.s page 16
+ ARM GAS /tmp/ccfifxFc.s page 16
423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2)
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
466 .loc 1 443 5 view .LVU155
467 02a0 13F0805F tst r3, #268435456
468 02a4 09D0 beq .L37
- ARM GAS /tmp/ccaqdy02.s page 17
+ ARM GAS /tmp/ccfifxFc.s page 17
444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
502 02d6 034B ldr r3, .L87
503 02d8 1B68 ldr r3, [r3]
504 .loc 1 464 51 view .LVU168
- ARM GAS /tmp/ccaqdy02.s page 18
+ ARM GAS /tmp/ccfifxFc.s page 18
505 02da 13F0006F tst r3, #134217728
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
548 0304 B9E6 b .L6
549 .LVL20:
550 .L77:
- ARM GAS /tmp/ccaqdy02.s page 19
+ ARM GAS /tmp/ccfifxFc.s page 19
183:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
588 .loc 1 195 36 view .LVU196
589 032e 13F4807F tst r3, #256
590 0332 06D1 bne .L80
- ARM GAS /tmp/ccaqdy02.s page 20
+ ARM GAS /tmp/ccfifxFc.s page 20
197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
628 .loc 1 209 15 view .LVU213
629 035a 22F44072 bic r2, r2, #768
630 .LVL27:
- ARM GAS /tmp/ccaqdy02.s page 21
+ ARM GAS /tmp/ccfifxFc.s page 21
212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_BACKUPRESET_RELEASE();
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
673 .loc 1 222 21 is_stmt 0 view .LVU226
674 039e FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccaqdy02.s page 22
+ ARM GAS /tmp/ccfifxFc.s page 22
675 .LVL30:
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
717 .loc 1 389 18 view .LVU239
718 03d4 28E7 b .L31
- ARM GAS /tmp/ccaqdy02.s page 23
+ ARM GAS /tmp/ccfifxFc.s page 23
719 .LVL36:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
754 0402 C2F88430 str r3, [r2, #132]
755 .LVL41:
756 .L42:
- ARM GAS /tmp/ccaqdy02.s page 24
+ ARM GAS /tmp/ccfifxFc.s page 24
489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
792 .LVL44:
793 .loc 1 507 7 is_stmt 0 view .LVU269
794 0434 43EA8013 orr r3, r3, r0, lsl #6
- ARM GAS /tmp/ccaqdy02.s page 25
+ ARM GAS /tmp/ccfifxFc.s page 25
795 0438 E068 ldr r0, [r4, #12]
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
831 046e 2369 ldr r3, [r4, #16]
832 0470 1B04 lsls r3, r3, #16
833 0472 43EA8613 orr r3, r3, r6, lsl #6
- ARM GAS /tmp/ccaqdy02.s page 26
+ ARM GAS /tmp/ccfifxFc.s page 26
834 0476 00F07060 and r0, r0, #251658240
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
870 04b2 1360 str r3, [r2]
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get Start Tick*/
- ARM GAS /tmp/ccaqdy02.s page 27
+ ARM GAS /tmp/ccfifxFc.s page 27
546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is disabled */
- ARM GAS /tmp/ccaqdy02.s page 28
+ ARM GAS /tmp/ccfifxFc.s page 28
570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET)
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_PLLSAI_DIVR_VALUE(PeriphClkInit->PLLSAIDivR));
625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Read PLLSAIP and PLLSAIQ value from PLLSAICFGR register (these value are not needed for LT
- ARM GAS /tmp/ccaqdy02.s page 29
+ ARM GAS /tmp/ccfifxFc.s page 29
627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos);
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
925 .loc 1 567 17 is_stmt 0 view .LVU309
926 04e6 FFF7FEFF bl HAL_GetTick
- ARM GAS /tmp/ccaqdy02.s page 30
+ ARM GAS /tmp/ccfifxFc.s page 30
927 .LVL59:
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (Pe
967 .loc 1 583 94 discriminator 1 view .LVU324
968 051a 22B1 cbz r2, .L53
- ARM GAS /tmp/ccaqdy02.s page 31
+ ARM GAS /tmp/ccfifxFc.s page 31
969 .L52:
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1010 .L54:
605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
1011 .loc 1 605 5 view .LVU338
- ARM GAS /tmp/ccaqdy02.s page 32
+ ARM GAS /tmp/ccfifxFc.s page 32
605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1050 058e 0B43 orrs r3, r3, r1
1051 0590 E169 ldr r1, [r4, #28]
1052 0592 43EA0173 orr r3, r3, r1, lsl #28
- ARM GAS /tmp/ccaqdy02.s page 33
+ ARM GAS /tmp/ccfifxFc.s page 33
1053 0596 C2F88830 str r3, [r2, #136]
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1094 .LVL76:
1095 .L85:
608:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48
- ARM GAS /tmp/ccaqdy02.s page 34
+ ARM GAS /tmp/ccfifxFc.s page 34
1096 .loc 1 608 7 is_stmt 1 view .LVU368
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1143 .LVL83:
1144 .LFB142:
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
- ARM GAS /tmp/ccaqdy02.s page 35
+ ARM GAS /tmp/ccfifxFc.s page 35
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /**
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1159 .loc 1 698 35 view .LVU384
1160 000a C2F38812 ubfx r2, r2, #6, #9
1161 .loc 1 698 33 view .LVU385
- ARM GAS /tmp/ccaqdy02.s page 36
+ ARM GAS /tmp/ccfifxFc.s page 36
1162 000e 4260 str r2, [r0, #4]
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1207 004c D3F88820 ldr r2, [r3, #136]
1208 .loc 1 707 35 view .LVU412
1209 0050 C2F30272 ubfx r2, r2, #28, #3
- ARM GAS /tmp/ccaqdy02.s page 37
+ ARM GAS /tmp/ccfifxFc.s page 37
1210 .loc 1 707 33 view .LVU413
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1250 008e 4263 str r2, [r0, #52]
722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
723:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the I2C1 clock configuration ------------------------------------------*/
- ARM GAS /tmp/ccaqdy02.s page 38
+ ARM GAS /tmp/ccfifxFc.s page 38
724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE();
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE();
1287 .loc 1 742 3 is_stmt 1 view .LVU453
1288 .loc 1 742 41 is_stmt 0 view .LVU454
- ARM GAS /tmp/ccaqdy02.s page 39
+ ARM GAS /tmp/ccfifxFc.s page 39
1289 00cc D3F89020 ldr r2, [r3, #144]
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1325 0108 D3F89020 ldr r2, [r3, #144]
1326 010c 02F04072 and r2, r2, #50331648
1327 .loc 1 760 39 view .LVU473
- ARM GAS /tmp/ccaqdy02.s page 40
+ ARM GAS /tmp/ccfifxFc.s page 40
1328 0110 4267 str r2, [r0, #116]
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1363 .loc 1 779 44 view .LVU491
1364 0152 C0F88C20 str r2, [r0, #140]
780:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** #endif /* STM32F767xx || STM32F769xx || STM32F777xx || STM32F779xx */
- ARM GAS /tmp/ccaqdy02.s page 41
+ ARM GAS /tmp/ccfifxFc.s page 41
781:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1404 .LFE142:
1406 .section .text.HAL_RCCEx_GetPeriphCLKFreq,"ax",%progbits
1407 .align 1
- ARM GAS /tmp/ccaqdy02.s page 42
+ ARM GAS /tmp/ccfifxFc.s page 42
1408 .global HAL_RCCEx_GetPeriphCLKFreq
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection));
844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure SAI1 Clock source */
- ARM GAS /tmp/ccaqdy02.s page 43
+ ARM GAS /tmp/ccfifxFc.s page 43
846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection);
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
- ARM GAS /tmp/ccaqdy02.s page 44
+ ARM GAS /tmp/ccfifxFc.s page 44
903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- I2C2 Configuration -----------------------------------*/
959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2)
- ARM GAS /tmp/ccaqdy02.s page 45
+ ARM GAS /tmp/ccfifxFc.s page 45
960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the UART4 clock source */
1015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection);
1016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
- ARM GAS /tmp/ccaqdy02.s page 46
+ ARM GAS /tmp/ccfifxFc.s page 46
1017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
- ARM GAS /tmp/ccaqdy02.s page 47
+ ARM GAS /tmp/ccfifxFc.s page 47
1074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /*-------------------------------------- LPTIM1 Configuration -----------------------------------
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (Peri
1129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
1130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* check for Parameters */
- ARM GAS /tmp/ccaqdy02.s page 48
+ ARM GAS /tmp/ccfifxFc.s page 48
1131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR));
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* return in case of Timeout detected */
1186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return HAL_TIMEOUT;
1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
- ARM GAS /tmp/ccaqdy02.s page 49
+ ARM GAS /tmp/ccfifxFc.s page 49
1188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Configure the PLLSAI division factors */
1244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */
- ARM GAS /tmp/ccaqdy02.s page 50
+ ARM GAS /tmp/ccfifxFc.s page 50
1245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the PLLSAI/PLLI2S division factors -------------------------------------------*/
1301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->PLLI2SDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLI2SDIVQ) >> RCC_DCKCFGR1_
- ARM GAS /tmp/ccaqdy02.s page 51
+ ARM GAS /tmp/ccfifxFc.s page 51
1302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->PLLSAIDivQ = (uint32_t)((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> RCC_DCKCFGR1_
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** PeriphClkInit->Sdmmc2ClockSelection = __HAL_RCC_GET_SDMMC2_SOURCE();
1357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Get the RTC Clock configuration -----------------------------------------------*/
- ARM GAS /tmp/ccaqdy02.s page 52
+ ARM GAS /tmp/ccfifxFc.s page 52
1359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tempreg = (RCC->CFGR & RCC_CFGR_RTCPRE);
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1434 .LVL87:
1435 .L100:
1394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
- ARM GAS /tmp/ccaqdy02.s page 53
+ ARM GAS /tmp/ccfifxFc.s page 53
1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** saiclocksource = RCC->DCKCFGR1;
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
1450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = EXTERNAL_CLOCK_VALUE;
1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** break;
- ARM GAS /tmp/ccaqdy02.s page 54
+ ARM GAS /tmp/ccfifxFc.s page 54
1452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */
1502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tmpreg = (((RCC->DCKCFGR1 & RCC_DCKCFGR1_PLLSAIDIVQ) >> 8) + 1);
- ARM GAS /tmp/ccaqdy02.s page 55
+ ARM GAS /tmp/ccfifxFc.s page 55
1503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = frequency/(tmpreg);
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** return frequency;
- ARM GAS /tmp/ccaqdy02.s page 56
+ ARM GAS /tmp/ccfifxFc.s page 56
1560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg);
1482 .loc 1 1440 9 is_stmt 1 view .LVU533
1440:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** frequency = (vcoinput * ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SN) >> 6))/(tmpreg);
- ARM GAS /tmp/ccaqdy02.s page 57
+ ARM GAS /tmp/ccfifxFc.s page 57
1483 .loc 1 1440 22 is_stmt 0 view .LVU534
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1522 .L101:
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
1523 .loc 1 1397 5 view .LVU550
- ARM GAS /tmp/ccaqdy02.s page 58
+ ARM GAS /tmp/ccfifxFc.s page 58
1524 0072 B2F5401F cmp r2, #3145728
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1563 0098 01F03F01 and r1, r1, #63
1406:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1564 .loc 1 1406 20 view .LVU566
- ARM GAS /tmp/ccaqdy02.s page 59
+ ARM GAS /tmp/ccfifxFc.s page 59
1565 009c 4E4A ldr r2, .L129+4
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1603 .loc 1 1411 11 view .LVU582
1411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1604 .loc 1 1411 50 is_stmt 0 view .LVU583
- ARM GAS /tmp/ccaqdy02.s page 60
+ ARM GAS /tmp/ccfifxFc.s page 60
1605 00cc 414A ldr r2, .L129
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** saiclocksource &= RCC_DCKCFGR1_SAI2SEL;
1646 .loc 1 1478 20 is_stmt 0 view .LVU597
1647 00f4 374B ldr r3, .L129
- ARM GAS /tmp/ccaqdy02.s page 61
+ ARM GAS /tmp/ccfifxFc.s page 61
1648 .LVL123:
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1687 .loc 1 1523 16 view .LVU612
1688 012c C2F30362 ubfx r2, r2, #24, #4
1689 .LVL128:
- ARM GAS /tmp/ccaqdy02.s page 62
+ ARM GAS /tmp/ccfifxFc.s page 62
1524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1727 .loc 1 1539 16 view .LVU629
1728 015a 5B68 ldr r3, [r3, #4]
1539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
- ARM GAS /tmp/ccaqdy02.s page 63
+ ARM GAS /tmp/ccfifxFc.s page 63
1729 .loc 1 1539 11 view .LVU630
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1769 .loc 1 1499 9 is_stmt 1 view .LVU645
1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
- ARM GAS /tmp/ccaqdy02.s page 64
+ ARM GAS /tmp/ccfifxFc.s page 64
1770 .loc 1 1499 38 is_stmt 0 view .LVU646
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1809 .L116:
1518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
1810 .loc 1 1518 11 is_stmt 1 view .LVU662
- ARM GAS /tmp/ccaqdy02.s page 65
+ ARM GAS /tmp/ccfifxFc.s page 65
1518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** }
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1562:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /**
1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** * @}
1564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** */
- ARM GAS /tmp/ccaqdy02.s page 66
+ ARM GAS /tmp/ccfifxFc.s page 66
1565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1876 0004 1B4A ldr r2, .L142
1877 0006 1368 ldr r3, [r2]
1878 0008 23F08063 bic r3, r3, #67108864
- ARM GAS /tmp/ccaqdy02.s page 67
+ ARM GAS /tmp/ccfifxFc.s page 67
1879 000c 1360 str r3, [r2]
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Enable the PLLI2S */
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_ENABLE();
- ARM GAS /tmp/ccaqdy02.s page 68
+ ARM GAS /tmp/ccfifxFc.s page 68
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1940 005a 13F0006F tst r3, #134217728
1941 005e 06D1 bne .L141
1633:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
- ARM GAS /tmp/ccaqdy02.s page 69
+ ARM GAS /tmp/ccfifxFc.s page 69
1942 .loc 1 1633 5 is_stmt 1 view .LVU701
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Disable the PLLI2S */
1652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLI2S_DISABLE();
1984 .loc 1 1652 3 view .LVU709
- ARM GAS /tmp/ccaqdy02.s page 70
+ ARM GAS /tmp/ccfifxFc.s page 70
1985 0002 0B4A ldr r2, .L151
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
2025 002e 00BF .align 2
2026 .L151:
2027 0030 00380240 .word 1073887232
- ARM GAS /tmp/ccaqdy02.s page 71
+ ARM GAS /tmp/ccfifxFc.s page 71
2028 .cfi_endproc
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
2063 000c 1360 str r3, [r2]
1688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is disabled */
- ARM GAS /tmp/ccaqdy02.s page 72
+ ARM GAS /tmp/ccfifxFc.s page 72
1690:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** __HAL_RCC_PLLSAI_ENABLE();
1717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c ****
1718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** /* Wait till PLLSAI is ready */
- ARM GAS /tmp/ccaqdy02.s page 73
+ ARM GAS /tmp/ccfifxFc.s page 73
1719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** tickstart = HAL_GetTick();
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
1722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
2126 .loc 1 1722 5 is_stmt 1 view .LVU753
1722:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc_ex.c **** {
- ARM GAS /tmp/ccaqdy02.s page 74
+ ARM GAS /tmp/ccfifxFc.s page 74
2127 .loc 1 1722 9 is_stmt 0 view .LVU754
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
2168 .loc 1 1741 3 view .LVU761
2169 0002 0B4A ldr r2, .L173
2170 0004 1368 ldr r3, [r2]
- ARM GAS /tmp/ccaqdy02.s page 75
+ ARM GAS /tmp/ccfifxFc.s page 75
2171 0006 23F08053 bic r3, r3, #268435456
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccaqdy02.s page 1
2211 0030 00380240 .word 1073887232
2212 .cfi_endproc
2213 .LFE147:
- ARM GAS /tmp/ccaqdy02.s page 76
+ ARM GAS /tmp/ccfifxFc.s page 76
2215 .text
@@ -4509,36 +4509,36 @@ ARM GAS /tmp/ccaqdy02.s page 1
2220 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
2221 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h"
2222 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccaqdy02.s page 77
+ ARM GAS /tmp/ccfifxFc.s page 77
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_rcc_ex.c
- /tmp/ccaqdy02.s:20 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t
- /tmp/ccaqdy02.s:26 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig
- /tmp/ccaqdy02.s:511 .text.HAL_RCCEx_PeriphCLKConfig:000002e4 $d
- /tmp/ccaqdy02.s:515 .text.HAL_RCCEx_PeriphCLKConfig:000002e8 $t
- /tmp/ccaqdy02.s:954 .text.HAL_RCCEx_PeriphCLKConfig:00000504 $d
- /tmp/ccaqdy02.s:961 .text.HAL_RCCEx_PeriphCLKConfig:00000510 $t
- /tmp/ccaqdy02.s:1131 .text.HAL_RCCEx_PeriphCLKConfig:000005fc $d
- /tmp/ccaqdy02.s:1136 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t
- /tmp/ccaqdy02.s:1142 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig
- /tmp/ccaqdy02.s:1401 .text.HAL_RCCEx_GetPeriphCLKConfig:00000180 $d
- /tmp/ccaqdy02.s:1407 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t
- /tmp/ccaqdy02.s:1413 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq
- /tmp/ccaqdy02.s:1840 .text.HAL_RCCEx_GetPeriphCLKFreq:000001d4 $d
- /tmp/ccaqdy02.s:1848 .text.HAL_RCCEx_EnablePLLI2S:00000000 $t
- /tmp/ccaqdy02.s:1854 .text.HAL_RCCEx_EnablePLLI2S:00000000 HAL_RCCEx_EnablePLLI2S
- /tmp/ccaqdy02.s:1961 .text.HAL_RCCEx_EnablePLLI2S:00000074 $d
- /tmp/ccaqdy02.s:1966 .text.HAL_RCCEx_DisablePLLI2S:00000000 $t
- /tmp/ccaqdy02.s:1972 .text.HAL_RCCEx_DisablePLLI2S:00000000 HAL_RCCEx_DisablePLLI2S
- /tmp/ccaqdy02.s:2027 .text.HAL_RCCEx_DisablePLLI2S:00000030 $d
- /tmp/ccaqdy02.s:2032 .text.HAL_RCCEx_EnablePLLSAI:00000000 $t
- /tmp/ccaqdy02.s:2038 .text.HAL_RCCEx_EnablePLLSAI:00000000 HAL_RCCEx_EnablePLLSAI
- /tmp/ccaqdy02.s:2145 .text.HAL_RCCEx_EnablePLLSAI:00000074 $d
- /tmp/ccaqdy02.s:2150 .text.HAL_RCCEx_DisablePLLSAI:00000000 $t
- /tmp/ccaqdy02.s:2156 .text.HAL_RCCEx_DisablePLLSAI:00000000 HAL_RCCEx_DisablePLLSAI
- /tmp/ccaqdy02.s:2211 .text.HAL_RCCEx_DisablePLLSAI:00000030 $d
+ /tmp/ccfifxFc.s:20 .text.HAL_RCCEx_PeriphCLKConfig:00000000 $t
+ /tmp/ccfifxFc.s:26 .text.HAL_RCCEx_PeriphCLKConfig:00000000 HAL_RCCEx_PeriphCLKConfig
+ /tmp/ccfifxFc.s:511 .text.HAL_RCCEx_PeriphCLKConfig:000002e4 $d
+ /tmp/ccfifxFc.s:515 .text.HAL_RCCEx_PeriphCLKConfig:000002e8 $t
+ /tmp/ccfifxFc.s:954 .text.HAL_RCCEx_PeriphCLKConfig:00000504 $d
+ /tmp/ccfifxFc.s:961 .text.HAL_RCCEx_PeriphCLKConfig:00000510 $t
+ /tmp/ccfifxFc.s:1131 .text.HAL_RCCEx_PeriphCLKConfig:000005fc $d
+ /tmp/ccfifxFc.s:1136 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 $t
+ /tmp/ccfifxFc.s:1142 .text.HAL_RCCEx_GetPeriphCLKConfig:00000000 HAL_RCCEx_GetPeriphCLKConfig
+ /tmp/ccfifxFc.s:1401 .text.HAL_RCCEx_GetPeriphCLKConfig:00000180 $d
+ /tmp/ccfifxFc.s:1407 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 $t
+ /tmp/ccfifxFc.s:1413 .text.HAL_RCCEx_GetPeriphCLKFreq:00000000 HAL_RCCEx_GetPeriphCLKFreq
+ /tmp/ccfifxFc.s:1840 .text.HAL_RCCEx_GetPeriphCLKFreq:000001d4 $d
+ /tmp/ccfifxFc.s:1848 .text.HAL_RCCEx_EnablePLLI2S:00000000 $t
+ /tmp/ccfifxFc.s:1854 .text.HAL_RCCEx_EnablePLLI2S:00000000 HAL_RCCEx_EnablePLLI2S
+ /tmp/ccfifxFc.s:1961 .text.HAL_RCCEx_EnablePLLI2S:00000074 $d
+ /tmp/ccfifxFc.s:1966 .text.HAL_RCCEx_DisablePLLI2S:00000000 $t
+ /tmp/ccfifxFc.s:1972 .text.HAL_RCCEx_DisablePLLI2S:00000000 HAL_RCCEx_DisablePLLI2S
+ /tmp/ccfifxFc.s:2027 .text.HAL_RCCEx_DisablePLLI2S:00000030 $d
+ /tmp/ccfifxFc.s:2032 .text.HAL_RCCEx_EnablePLLSAI:00000000 $t
+ /tmp/ccfifxFc.s:2038 .text.HAL_RCCEx_EnablePLLSAI:00000000 HAL_RCCEx_EnablePLLSAI
+ /tmp/ccfifxFc.s:2145 .text.HAL_RCCEx_EnablePLLSAI:00000074 $d
+ /tmp/ccfifxFc.s:2150 .text.HAL_RCCEx_DisablePLLSAI:00000000 $t
+ /tmp/ccfifxFc.s:2156 .text.HAL_RCCEx_DisablePLLSAI:00000000 HAL_RCCEx_DisablePLLSAI
+ /tmp/ccfifxFc.s:2211 .text.HAL_RCCEx_DisablePLLSAI:00000030 $d
UNDEFINED SYMBOLS
HAL_GetTick
diff --git a/build/stm32f7xx_hal_sd.lst b/build/stm32f7xx_hal_sd.lst
index c78a2bc..8eea06e 100644
--- a/build/stm32f7xx_hal_sd.lst
+++ b/build/stm32f7xx_hal_sd.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccqxsRKi.s page 1
+ARM GAS /tmp/ccfzUCqR.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This driver implements a high level communication layer for read and write from/to
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** this memory. The needed STM32 hardware resources (SDMMC and GPIO) are performed by
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** the user in HAL_SD_MspInit() function (MSP layer).
- ARM GAS /tmp/ccqxsRKi.s page 2
+ ARM GAS /tmp/ccfzUCqR.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** Basically, the MSP layer configuration should be the same as we provide in the
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This phase of initialization is done through SDMMC_Init() and
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_PowerState_ON() SDMMC low level APIs.
- ARM GAS /tmp/ccqxsRKi.s page 3
+ ARM GAS /tmp/ccfzUCqR.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** This function support only 512-bytes block length (the block size should be
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** chosen as 512 bytes).
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** You can choose either one block read operation or multiple block read operation
- ARM GAS /tmp/ccqxsRKi.s page 4
+ ARM GAS /tmp/ccfzUCqR.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** by adjusting the "NumberOfBlocks" parameter.
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_ENABLE_IT: Enable the SD device interrupt
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_DISABLE_IT: Disable the SD device interrupt
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_GET_FLAG:Check whether the specified SD flag is set or not
- ARM GAS /tmp/ccqxsRKi.s page 5
+ ARM GAS /tmp/ccfzUCqR.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (+) __HAL_SD_CLEAR_FLAG: Clear the SD's pending flags
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Includes ------------------------------------------------------------------*/
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #include "stm32f7xx_hal.h"
- ARM GAS /tmp/ccqxsRKi.s page 6
+ ARM GAS /tmp/ccfzUCqR.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** @addtogroup SD_Exported_Functions_Group1
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Initialization and de-initialization functions
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *
- ARM GAS /tmp/ccqxsRKi.s page 7
+ ARM GAS /tmp/ccfzUCqR.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** @verbatim
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_MspInit(hsd);
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
- ARM GAS /tmp/ccqxsRKi.s page 8
+ ARM GAS /tmp/ccfzUCqR.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_PowerState_ON(hsd->Instance);
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Enable SDMMC Clock */
- ARM GAS /tmp/ccqxsRKi.s page 9
+ ARM GAS /tmp/ccfzUCqR.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_ENABLE(hsd);
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Set SD power state to off */
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SD_PowerOFF(hsd);
- ARM GAS /tmp/ccqxsRKi.s page 10
+ ARM GAS /tmp/ccfzUCqR.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /** @addtogroup SD_Exported_Functions_Group2
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Data transfer functions
- ARM GAS /tmp/ccqxsRKi.s page 11
+ ARM GAS /tmp/ccfzUCqR.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(hsd->SdCard.CardType != CARD_SDHC_SDXC)
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 12
+ ARM GAS /tmp/ccfzUCqR.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** add *= 512U;
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++;
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** dataremaining--;
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tempbuff = (uint8_t)((data >> 24U) & 0xFFU);
- ARM GAS /tmp/ccqxsRKi.s page 13
+ ARM GAS /tmp/ccfzUCqR.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++;
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_RXOVERR))
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear all the static flags */
- ARM GAS /tmp/ccqxsRKi.s page 14
+ ARM GAS /tmp/ccfzUCqR.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS);
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Allows to write block(s) to a specified address in a card. The Data
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * transfer is managed by polling mode.
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @note This API should be followed by a check on the card state through
- ARM GAS /tmp/ccqxsRKi.s page 15
+ ARM GAS /tmp/ccfzUCqR.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * HAL_SD_GetCardState().
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_WRITE_MULTIPLE_BLOCK;
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 16
+ ARM GAS /tmp/ccfzUCqR.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Write Multi Block command */
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Send stop transmission command in case of multiblock write */
- ARM GAS /tmp/ccqxsRKi.s page 17
+ ARM GAS /tmp/ccfzUCqR.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DATAEND) && (NumberOfBlocks > 1U))
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_OK;
- ARM GAS /tmp/ccqxsRKi.s page 18
+ ARM GAS /tmp/ccfzUCqR.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** add *= 512U;
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 19
+ ARM GAS /tmp/ccfzUCqR.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval HAL status
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_StatusTypeDef HAL_SD_WriteBlocks_IT(SD_HandleTypeDef *hsd, uint8_t *pData, uint32_t BlockAdd, u
- ARM GAS /tmp/ccqxsRKi.s page 20
+ ARM GAS /tmp/ccfzUCqR.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear all the static flags */
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS);
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= errorstate;
- ARM GAS /tmp/ccqxsRKi.s page 21
+ ARM GAS /tmp/ccfzUCqR.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 22
+ ARM GAS /tmp/ccfzUCqR.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_BUSY;
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdReadMultiBlock(hsd->Instance, add);
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else
- ARM GAS /tmp/ccqxsRKi.s page 23
+ ARM GAS /tmp/ccfzUCqR.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((add + NumberOfBlocks) > (hsd->SdCard.LogBlockNbr))
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
- ARM GAS /tmp/ccqxsRKi.s page 24
+ ARM GAS /tmp/ccfzUCqR.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->hdmatx->Init.Direction = DMA_MEMORY_TO_PERIPH;
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** MODIFY_REG(hsd->hdmatx->Instance->CR, DMA_SxCR_DIR, hsd->hdmatx->Init.Direction);
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 25
+ ARM GAS /tmp/ccfzUCqR.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Enable the DMA Channel */
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(end_add > (hsd->SdCard.LogBlockNbr))
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 26
+ ARM GAS /tmp/ccfzUCqR.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_ADDR_OUT_OF_RANGE;
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 27
+ ARM GAS /tmp/ccfzUCqR.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= errorstate;
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if defined (USE_HAL_SD_REGISTER_CALLBACKS) && (USE_HAL_SD_REGISTER_CALLBACKS == 1U)
- ARM GAS /tmp/ccqxsRKi.s page 28
+ ARM GAS /tmp/ccfzUCqR.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCallback(hsd);
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #else
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_TxCpltCallback(hsd);
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
- ARM GAS /tmp/ccqxsRKi.s page 29
+ ARM GAS /tmp/ccfzUCqR.s page 29
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Abort the SD DMA channel */
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(((context & SD_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE
- ARM GAS /tmp/ccqxsRKi.s page 30
+ ARM GAS /tmp/ccfzUCqR.s page 30
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @param hsd : Pointer to a SD_HandleTypeDef structure that contains
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * the configuration information.
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval SD Error Code
- ARM GAS /tmp/ccqxsRKi.s page 31
+ ARM GAS /tmp/ccfzUCqR.s page 31
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval None
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __weak void HAL_SD_AbortCallback(SD_HandleTypeDef *hsd)
- ARM GAS /tmp/ccqxsRKi.s page 32
+ ARM GAS /tmp/ccfzUCqR.s page 32
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** break;
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** case HAL_SD_MSP_INIT_CB_ID :
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->MspInitCallback = pCallback;
- ARM GAS /tmp/ccqxsRKi.s page 33
+ ARM GAS /tmp/ccfzUCqR.s page 33
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** break;
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @arg @ref HAL_SD_MSP_DEINIT_CB_ID SD MspDeInit Callback ID
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval status
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
- ARM GAS /tmp/ccqxsRKi.s page 34
+ ARM GAS /tmp/ccfzUCqR.s page 34
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_StatusTypeDef HAL_SD_UnRegisterCallback(SD_HandleTypeDef *hsd, HAL_SD_CallbackIDTypeDef Callbac
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 35
+ ARM GAS /tmp/ccfzUCqR.s page 35
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Update the error code */
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCID->ManufactDate = (uint16_t)((hsd->CID[3] & 0x000FFF00U) >> 8U);
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 36
+ ARM GAS /tmp/ccfzUCqR.s page 36
1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCID->CID_CRC = (uint8_t)((hsd->CID[3] & 0x000000FEU) >> 1U);
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->DeviceSizeMul = (uint8_t)((hsd->CSD[2] & 0x00038000U) >> 15U);
2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 37
+ ARM GAS /tmp/ccfzUCqR.s page 37
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.BlockNbr = (pCSD->DeviceSize + 1U) ;
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->FileFormat = (uint8_t)((hsd->CSD[3] & 0x00000C00U) >> 10U);
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCSD->ECC= (uint8_t)((hsd->CSD[3] & 0x00000300U) >> 8U);
- ARM GAS /tmp/ccqxsRKi.s page 38
+ ARM GAS /tmp/ccfzUCqR.s page 38
2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Set Block Size for Card */
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdBlockLength(hsd->Instance, BLOCKSIZE);
2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
- ARM GAS /tmp/ccqxsRKi.s page 39
+ ARM GAS /tmp/ccfzUCqR.s page 39
2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(hsd->SdCard.CardType != CARD_SECURED)
2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 40
+ ARM GAS /tmp/ccfzUCqR.s page 40
2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(WideMode == SDMMC_BUS_WIDE_8B)
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** status = HAL_ERROR;
2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 41
+ ARM GAS /tmp/ccfzUCqR.s page 41
2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Change State */
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if (((context & SD_CONTEXT_WRITE_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_WRITE_MULTIPLE_
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(HAL_DMA_Abort(hsd->hdmatx) != HAL_OK)
- ARM GAS /tmp/ccqxsRKi.s page 42
+ ARM GAS /tmp/ccfzUCqR.s page 42
2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Disable the SD DMA request */
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Instance->DCTRL &= (uint32_t)~((uint32_t)SDMMC_DCTRL_DMAEN);
2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 43
+ ARM GAS /tmp/ccfzUCqR.s page 43
2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Abort the SD DMA Tx channel */
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @}
2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 44
+ ARM GAS /tmp/ccfzUCqR.s page 44
2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /**
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval None
2452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** */
2453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** static void SD_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
- ARM GAS /tmp/ccqxsRKi.s page 45
+ ARM GAS /tmp/ccfzUCqR.s page 45
2454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Clear All flags */
2509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** __HAL_SD_CLEAR_FLAG(hsd, SDMMC_STATIC_FLAGS);
2510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 46
+ ARM GAS /tmp/ccfzUCqR.s page 46
2511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Disable All interrupts */
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if (USE_HAL_SD_REGISTER_CALLBACKS == 1)
2566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCallback(hsd);
2567:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #else
- ARM GAS /tmp/ccqxsRKi.s page 47
+ ARM GAS /tmp/ccfzUCqR.s page 47
2568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** HAL_SD_ErrorCallback(hsd);
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Check the power State */
2624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(SDMMC_GetPowerState(hsd->Instance) == 0U)
- ARM GAS /tmp/ccqxsRKi.s page 48
+ ARM GAS /tmp/ccfzUCqR.s page 48
2625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Get the Card Class */
2680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.Class = (SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2) >> 20U);
2681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 49
+ ARM GAS /tmp/ccfzUCqR.s page 49
2682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Get CSD parameters */
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
81 .loc 1 2713 3 view .LVU11
2714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* CMD0: GO_IDLE_STATE */
- ARM GAS /tmp/ccqxsRKi.s page 50
+ ARM GAS /tmp/ccfzUCqR.s page 50
2716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** errorstate = SDMMC_CmdGoIdleState(hsd->Instance);
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate;
2758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2759:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 51
+ ARM GAS /tmp/ccfzUCqR.s page 51
2760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /* Send CMD41 */
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
113 .LVL11:
2724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
114 .loc 1 2724 3 is_stmt 1 view .LVU21
- ARM GAS /tmp/ccqxsRKi.s page 52
+ ARM GAS /tmp/ccfzUCqR.s page 52
2724:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
153 0040 0546 mov r5, r0
154 0042 E7E7 b .L2
155 .L6:
- ARM GAS /tmp/ccqxsRKi.s page 53
+ ARM GAS /tmp/ccfzUCqR.s page 53
2743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
195 006c FFF7FEFF bl SDMMC_CmdAppCommand
196 .LVL21:
2755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 54
+ ARM GAS /tmp/ccfzUCqR.s page 54
197 .loc 1 2755 5 is_stmt 1 view .LVU53
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
235 008e 019A ldr r2, [sp, #4]
2776:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
236 .loc 1 2776 5 view .LVU70
- ARM GAS /tmp/ccqxsRKi.s page 55
+ ARM GAS /tmp/ccfzUCqR.s page 55
237 0090 4FF6FE73 movw r3, #65534
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
282 .thumb
283 .thumb_func
285 SD_PowerOFF:
- ARM GAS /tmp/ccqxsRKi.s page 56
+ ARM GAS /tmp/ccfzUCqR.s page 56
286 .LVL32:
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2816:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tickstart = HAL_GetTick();
2817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t count;
2818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t *pData = pSDstatus;
- ARM GAS /tmp/ccqxsRKi.s page 57
+ ARM GAS /tmp/ccfzUCqR.s page 57
2819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2873:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_SD_ERROR_TIMEOUT;
2874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 58
+ ARM GAS /tmp/ccfzUCqR.s page 58
2876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2930:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate;
2932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 59
+ ARM GAS /tmp/ccfzUCqR.s page 59
2933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2987:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** /**
2988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @brief Disables the SDMMC wide bus mode.
2989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @param hsd: Pointer to SD handle
- ARM GAS /tmp/ccqxsRKi.s page 60
+ ARM GAS /tmp/ccfzUCqR.s page 60
2990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** * @retval error state
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t errorstate;
3045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tickstart = HAL_GetTick();
3046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t index = 0U;
- ARM GAS /tmp/ccqxsRKi.s page 61
+ ARM GAS /tmp/ccfzUCqR.s page 61
3047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tempscr[2U] = {0U, 0U};
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_SD_ERROR_DATA_TIMEOUT;
3102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** else if(__HAL_SD_GET_FLAG(hsd, SDMMC_FLAG_DCRCFAIL))
- ARM GAS /tmp/ccqxsRKi.s page 62
+ ARM GAS /tmp/ccfzUCqR.s page 62
3104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
3143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp = hsd->pRxBuffPtr;
335 .loc 1 3143 3 view .LVU91
- ARM GAS /tmp/ccqxsRKi.s page 63
+ ARM GAS /tmp/ccfzUCqR.s page 63
336 .loc 1 3143 7 is_stmt 0 view .LVU92
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** dataremaining--;
360 .loc 1 3153 7 is_stmt 1 view .LVU102
361 .LVL41:
- ARM GAS /tmp/ccqxsRKi.s page 64
+ ARM GAS /tmp/ccfzUCqR.s page 64
3154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tmp = (uint8_t)((data >> 8U) & 0xFFU);
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
397 .loc 1 3149 27 discriminator 1 view .LVU122
398 0028 072D cmp r5, #7
- ARM GAS /tmp/ccqxsRKi.s page 65
+ ARM GAS /tmp/ccfzUCqR.s page 65
399 002a EED9 bls .L28
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
441 .LCFI7:
442 .cfi_def_cfa_offset 32
3179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t count, data, dataremaining;
- ARM GAS /tmp/ccqxsRKi.s page 66
+ ARM GAS /tmp/ccfzUCqR.s page 66
443 .loc 1 3179 3 is_stmt 1 view .LVU132
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
468 .cfi_restore_state
3190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp++;
469 .loc 1 3190 7 is_stmt 1 view .LVU141
- ARM GAS /tmp/ccqxsRKi.s page 67
+ ARM GAS /tmp/ccfzUCqR.s page 67
3190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tmp++;
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_WriteFIFO(hsd->Instance, &data);
505 .loc 1 3201 7 is_stmt 1 view .LVU161
3201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** (void)SDMMC_WriteFIFO(hsd->Instance, &data);
- ARM GAS /tmp/ccqxsRKi.s page 68
+ ARM GAS /tmp/ccfzUCqR.s page 68
506 .loc 1 3201 20 is_stmt 0 view .LVU162
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
552 @ frame_needed = 0, uses_anonymous_args = 0
2813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_DataInitTypeDef config;
553 .loc 1 2813 1 is_stmt 0 view .LVU175
- ARM GAS /tmp/ccqxsRKi.s page 69
+ ARM GAS /tmp/ccfzUCqR.s page 69
554 0000 F0B5 push {r4, r5, r6, r7, lr}
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
595 .loc 1 2828 3 is_stmt 1 view .LVU189
2828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 70
+ ARM GAS /tmp/ccfzUCqR.s page 70
596 .loc 1 2828 5 is_stmt 0 view .LVU190
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
632 .loc 1 2843 24 is_stmt 0 view .LVU208
633 0042 4FF0FF33 mov r3, #-1
634 0046 0093 str r3, [sp]
- ARM GAS /tmp/ccqxsRKi.s page 71
+ ARM GAS /tmp/ccfzUCqR.s page 71
2844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DataBlockSize = SDMMC_DATABLOCK_SIZE_64B;
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate;
672 .loc 1 2855 5 is_stmt 1 view .LVU226
2855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return errorstate;
- ARM GAS /tmp/ccqxsRKi.s page 72
+ ARM GAS /tmp/ccfzUCqR.s page 72
673 .loc 1 2855 8 is_stmt 0 view .LVU227
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
712 0090 2B68 ldr r3, [r5]
713 0092 5C6B ldr r4, [r3, #52]
714 0094 40F22A42 movw r2, #1066
- ARM GAS /tmp/ccqxsRKi.s page 73
+ ARM GAS /tmp/ccfzUCqR.s page 73
2860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
753 .LVL79:
2896:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pData++;
754 .loc 1 2896 12 discriminator 1 view .LVU259
- ARM GAS /tmp/ccqxsRKi.s page 74
+ ARM GAS /tmp/ccfzUCqR.s page 74
755 00cc 46F8040B str r0, [r6], #4
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
797 00f8 F9E7 b .L37
798 .L50:
2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 75
+ ARM GAS /tmp/ccfzUCqR.s page 75
799 .loc 1 2879 12 view .LVU272
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
846 .loc 1 3045 24 view .LVU281
847 000c 0646 mov r6, r0
848 .LVL87:
- ARM GAS /tmp/ccqxsRKi.s page 76
+ ARM GAS /tmp/ccfzUCqR.s page 76
3046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t tempscr[2U] = {0U, 0U};
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
890 .loc 1 3058 16 view .LVU295
891 002c FFF7FEFF bl SDMMC_CmdAppCommand
- ARM GAS /tmp/ccqxsRKi.s page 77
+ ARM GAS /tmp/ccfzUCqR.s page 77
892 .LVL94:
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
929 .LVL96:
3073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
930 .loc 1 3073 3 is_stmt 1 view .LVU313
- ARM GAS /tmp/ccqxsRKi.s page 78
+ ARM GAS /tmp/ccfzUCqR.s page 78
3073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
970 0082 07D1 bne .L63
3081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
971 .loc 1 3081 5 is_stmt 1 view .LVU329
- ARM GAS /tmp/ccqxsRKi.s page 79
+ ARM GAS /tmp/ccfzUCqR.s page 79
3081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** ((tempscr[1] & SDMMC_16TO23BITS) >> 8) | ((tempscr[1] & SDMMC_24TO31BITS) >> 24));
1009 .loc 1 3121 86 view .LVU347
1010 00b4 1302 lsls r3, r2, #8
- ARM GAS /tmp/ccqxsRKi.s page 80
+ ARM GAS /tmp/ccfzUCqR.s page 80
1011 00b6 03F47F03 and r3, r3, #16711680
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1048 00e8 0825 movs r5, #8
1049 .LVL106:
3099:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 81
+ ARM GAS /tmp/ccfzUCqR.s page 81
1050 .loc 1 3099 5 is_stmt 0 view .LVU365
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1094 @ frame_needed = 0, uses_anonymous_args = 0
2946:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t scr[2U] = {0U, 0U};
1095 .loc 1 2946 1 is_stmt 0 view .LVU378
- ARM GAS /tmp/ccqxsRKi.s page 82
+ ARM GAS /tmp/ccfzUCqR.s page 82
1096 0000 10B5 push {r4, lr}
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2966:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
1136 .loc 1 2966 75 is_stmt 0 view .LVU393
1137 002a 216D ldr r1, [r4, #80]
- ARM GAS /tmp/ccqxsRKi.s page 83
+ ARM GAS /tmp/ccfzUCqR.s page 83
2966:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1180 .LFE178:
1182 .section .text.SD_WideBus_Disable,"ax",%progbits
1183 .align 1
- ARM GAS /tmp/ccqxsRKi.s page 84
+ ARM GAS /tmp/ccfzUCqR.s page 84
1184 .syntax unified
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1227 .loc 1 3004 3 is_stmt 1 view .LVU417
3004:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1228 .loc 1 3004 5 is_stmt 0 view .LVU418
- ARM GAS /tmp/ccqxsRKi.s page 85
+ ARM GAS /tmp/ccfzUCqR.s page 85
1229 0020 80B9 cbnz r0, .L80
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1269 0046 10BD pop {r4, pc}
1270 .LVL131:
1271 .L83:
- ARM GAS /tmp/ccqxsRKi.s page 86
+ ARM GAS /tmp/ccfzUCqR.s page 86
1272 .LCFI25:
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1317 .loc 1 2928 16 view .LVU443
1318 000e FFF7FEFF bl SDMMC_CmdSendStatus
1319 .LVL136:
- ARM GAS /tmp/ccqxsRKi.s page 87
+ ARM GAS /tmp/ccfzUCqR.s page 87
2929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1365 @ frame_needed = 0, uses_anonymous_args = 0
1366 @ link register save eliminated.
517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 88
+ ARM GAS /tmp/ccfzUCqR.s page 88
1367 .loc 1 517 3 view .LVU455
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1417 0004 0446 mov r4, r0
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
1418 .loc 1 482 3 is_stmt 1 view .LVU464
- ARM GAS /tmp/ccqxsRKi.s page 89
+ ARM GAS /tmp/ccfzUCqR.s page 89
484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1463 .LFB146:
571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_DataInitTypeDef config;
1464 .loc 1 571 1 is_stmt 1 view -0
- ARM GAS /tmp/ccqxsRKi.s page 90
+ ARM GAS /tmp/ccfzUCqR.s page 90
1465 .cfi_startproc
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1507 .loc 1 585 5 view .LVU490
1508 0022 012F cmp r7, #1
- ARM GAS /tmp/ccqxsRKi.s page 91
+ ARM GAS /tmp/ccfzUCqR.s page 91
1509 0024 40F00481 bne .L102
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1545 004a 4FF0FF33 mov r3, #-1
1546 004e 0093 str r3, [sp]
607:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DataBlockSize = SDMMC_DATABLOCK_SIZE_512B;
- ARM GAS /tmp/ccqxsRKi.s page 92
+ ARM GAS /tmp/ccfzUCqR.s page 92
1547 .loc 1 607 5 is_stmt 1 view .LVU509
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1584 .loc 1 620 7 is_stmt 1 view .LVU527
620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 93
+ ARM GAS /tmp/ccfzUCqR.s page 93
1585 .loc 1 620 20 is_stmt 0 view .LVU528
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1623 .LVL157:
1624 .L105:
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 94
+ ARM GAS /tmp/ccfzUCqR.s page 94
1625 .loc 1 624 7 is_stmt 1 view .LVU545
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1663 00c4 2868 ldr r0, [r5]
1664 00c6 FFF7FEFF bl SDMMC_ReadFIFO
1665 .LVL160:
- ARM GAS /tmp/ccqxsRKi.s page 95
+ ARM GAS /tmp/ccfzUCqR.s page 95
649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++;
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1699 .loc 1 660 24 is_stmt 0 view .LVU582
1700 00de A8F10408 sub r8, r8, #4
1701 .LVL166:
- ARM GAS /tmp/ccqxsRKi.s page 96
+ ARM GAS /tmp/ccfzUCqR.s page 96
646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_TIMEOUT;
1742 .loc 1 667 9 is_stmt 1 view .LVU597
1743 0114 2B68 ldr r3, [r5]
- ARM GAS /tmp/ccqxsRKi.s page 97
+ ARM GAS /tmp/ccfzUCqR.s page 97
1744 0116 4B4A ldr r2, .L130
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1782 .loc 1 695 5 is_stmt 1 view .LVU614
695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 98
+ ARM GAS /tmp/ccfzUCqR.s page 98
1783 .loc 1 695 8 is_stmt 0 view .LVU615
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
733:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** *tempbuff = (uint8_t)((data >> 8U) & 0xFFU);
1821 .loc 1 733 7 view .LVU632
734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++;
- ARM GAS /tmp/ccqxsRKi.s page 99
+ ARM GAS /tmp/ccfzUCqR.s page 99
1822 .loc 1 734 7 view .LVU633
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1857 018e A0EB0900 sub r0, r0, r9
744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
1858 .loc 1 744 9 discriminator 1 view .LVU653
- ARM GAS /tmp/ccqxsRKi.s page 100
+ ARM GAS /tmp/ccfzUCqR.s page 100
1859 0192 5045 cmp r0, r10
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1897 .loc 1 685 11 is_stmt 1 view .LVU669
1898 01c0 2A68 ldr r2, [r5]
1899 01c2 2049 ldr r1, .L130
- ARM GAS /tmp/ccqxsRKi.s page 101
+ ARM GAS /tmp/ccfzUCqR.s page 101
1900 01c4 9163 str r1, [r2, #56]
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
1937 .loc 1 702 7 is_stmt 1 view .LVU687
702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 102
+ ARM GAS /tmp/ccfzUCqR.s page 102
1938 .loc 1 702 14 is_stmt 0 view .LVU688
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1975 .loc 1 719 7 is_stmt 1 view .LVU705
719:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
1976 .loc 1 719 20 is_stmt 0 view .LVU706
- ARM GAS /tmp/ccqxsRKi.s page 103
+ ARM GAS /tmp/ccfzUCqR.s page 103
1977 021a 0023 movs r3, #0
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2017 0242 00BF .align 2
2018 .L130:
2019 0244 FF054000 .word 4195839
- ARM GAS /tmp/ccqxsRKi.s page 104
+ ARM GAS /tmp/ccfzUCqR.s page 104
2020 .cfi_endproc
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2067 .loc 1 790 3 view .LVU730
790:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 105
+ ARM GAS /tmp/ccfzUCqR.s page 105
2068 .loc 1 790 5 is_stmt 0 view .LVU731
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2105 0044 012B cmp r3, #1
2106 0046 00D0 beq .L137
813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 106
+ ARM GAS /tmp/ccfzUCqR.s page 106
2107 .loc 1 813 7 is_stmt 1 view .LVU749
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2144 .loc 1 826 5 is_stmt 1 view .LVU767
826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 107
+ ARM GAS /tmp/ccfzUCqR.s page 107
2145 .loc 1 826 7 is_stmt 0 view .LVU768
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2184 .L153:
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
2185 .loc 1 802 7 is_stmt 1 view .LVU784
- ARM GAS /tmp/ccqxsRKi.s page 108
+ ARM GAS /tmp/ccfzUCqR.s page 108
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2225 .loc 1 845 7 is_stmt 1 view .LVU799
845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE;
2226 .loc 1 845 18 is_stmt 0 view .LVU800
- ARM GAS /tmp/ccqxsRKi.s page 109
+ ARM GAS /tmp/ccfzUCqR.s page 109
2227 00be 0123 movs r3, #1
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
867:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** data |= ((uint32_t)(*tempbuff) << 24U);
2263 .loc 1 867 11 view .LVU819
868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** tempbuff++;
- ARM GAS /tmp/ccqxsRKi.s page 110
+ ARM GAS /tmp/ccfzUCqR.s page 110
2264 .loc 1 868 11 view .LVU820
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2303 0106 BAF1000F cmp r10, #0
2304 010a 0CD0 beq .L145
2305 .L141:
- ARM GAS /tmp/ccqxsRKi.s page 111
+ ARM GAS /tmp/ccfzUCqR.s page 111
852:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2344 .loc 1 882 16 is_stmt 0 view .LVU852
2345 013e 0327 movs r7, #3
- ARM GAS /tmp/ccqxsRKi.s page 112
+ ARM GAS /tmp/ccfzUCqR.s page 112
2346 0140 58E0 b .L134
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_TX_UNDERRUN;
2384 .loc 1 927 7 is_stmt 1 view .LVU869
2385 0170 224A ldr r2, .L159
- ARM GAS /tmp/ccqxsRKi.s page 113
+ ARM GAS /tmp/ccfzUCqR.s page 113
2386 0172 9A63 str r2, [r3, #56]
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2423 019a 1343 orrs r3, r3, r2
2424 019c AB63 str r3, [r5, #56]
898:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE;
- ARM GAS /tmp/ccqxsRKi.s page 114
+ ARM GAS /tmp/ccfzUCqR.s page 114
2425 .loc 1 898 11 is_stmt 1 view .LVU887
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2462 .loc 1 919 7 view .LVU904
919:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
2463 .loc 1 919 10 is_stmt 0 view .LVU905
- ARM GAS /tmp/ccqxsRKi.s page 115
+ ARM GAS /tmp/ccfzUCqR.s page 115
2464 01c6 AB6B ldr r3, [r5, #56]
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
948:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2501 .loc 1 948 12 is_stmt 0 view .LVU923
2502 01f2 0127 movs r7, #1
- ARM GAS /tmp/ccqxsRKi.s page 116
+ ARM GAS /tmp/ccfzUCqR.s page 116
2503 .LVL214:
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2552 .loc 1 971 3 view .LVU931
971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 117
+ ARM GAS /tmp/ccfzUCqR.s page 117
2553 .loc 1 971 5 is_stmt 0 view .LVU932
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks;
2592 .loc 1 992 5 is_stmt 1 view .LVU948
992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->RxXferSize = BLOCKSIZE * NumberOfBlocks;
- ARM GAS /tmp/ccqxsRKi.s page 118
+ ARM GAS /tmp/ccfzUCqR.s page 118
2593 .loc 1 992 21 is_stmt 0 view .LVU949
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2631 0056 0293 str r3, [sp, #8]
1006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
2632 .loc 1 1006 5 is_stmt 1 view .LVU966
- ARM GAS /tmp/ccqxsRKi.s page 119
+ ARM GAS /tmp/ccfzUCqR.s page 119
1006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.TransferMode = SDMMC_TRANSFER_MODE_BLOCK;
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2671 0082 9A63 str r2, [r3, #56]
1030:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
2672 .loc 1 1030 7 view .LVU983
- ARM GAS /tmp/ccqxsRKi.s page 120
+ ARM GAS /tmp/ccfzUCqR.s page 120
1030:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2710 .loc 1 984 7 is_stmt 1 view .LVU1000
984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
2711 .loc 1 984 14 is_stmt 0 view .LVU1001
- ARM GAS /tmp/ccqxsRKi.s page 121
+ ARM GAS /tmp/ccfzUCqR.s page 121
2712 00aa 07E0 b .L163
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2759 .thumb
2760 .thumb_func
2762 HAL_SD_WriteBlocks_IT:
- ARM GAS /tmp/ccqxsRKi.s page 122
+ ARM GAS /tmp/ccfzUCqR.s page 122
2763 .LVL235:
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2804 0018 A163 str r1, [r4, #56]
1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2805 .loc 1 1073 5 is_stmt 1 view .LVU1023
- ARM GAS /tmp/ccqxsRKi.s page 123
+ ARM GAS /tmp/ccfzUCqR.s page 123
1073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
2843 .loc 1 1090 7 view .LVU1041
2844 0042 0129 cmp r1, #1
- ARM GAS /tmp/ccqxsRKi.s page 124
+ ARM GAS /tmp/ccfzUCqR.s page 124
2845 0044 00D0 beq .L179
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2882 .loc 1 1115 18 is_stmt 0 view .LVU1058
2883 0066 0123 movs r3, #1
2884 0068 84F83430 strb r3, [r4, #52]
- ARM GAS /tmp/ccqxsRKi.s page 125
+ ARM GAS /tmp/ccfzUCqR.s page 125
1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
2923 .loc 1 1105 20 view .LVU1075
2924 008a 2363 str r3, [r4, #48]
- ARM GAS /tmp/ccqxsRKi.s page 126
+ ARM GAS /tmp/ccfzUCqR.s page 126
1108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2961 .loc 1 1127 11 view .LVU1093
2962 00b0 FFF7FEFF bl SDMMC_ConfigData
2963 .LVL252:
- ARM GAS /tmp/ccqxsRKi.s page 127
+ ARM GAS /tmp/ccfzUCqR.s page 127
1129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3013 .cfi_offset 14, -4
3014 0004 87B0 sub sp, sp, #28
3015 .LCFI43:
- ARM GAS /tmp/ccqxsRKi.s page 128
+ ARM GAS /tmp/ccfzUCqR.s page 128
3016 .cfi_def_cfa_offset 56
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3053 0026 A36B ldr r3, [r4, #56]
1168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
3054 .loc 1 1168 22 view .LVU1118
- ARM GAS /tmp/ccqxsRKi.s page 129
+ ARM GAS /tmp/ccfzUCqR.s page 129
3055 0028 43F00073 orr r3, r3, #33554432
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
3094 .loc 1 1180 35 view .LVU1134
3095 0054 3448 ldr r0, .L202
- ARM GAS /tmp/ccqxsRKi.s page 130
+ ARM GAS /tmp/ccfzUCqR.s page 130
3096 0056 C863 str r0, [r1, #60]
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3135 008c 2ED1 bne .L201
1204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
3136 .loc 1 1204 7 is_stmt 1 view .LVU1150
- ARM GAS /tmp/ccqxsRKi.s page 131
+ ARM GAS /tmp/ccfzUCqR.s page 131
3137 008e 2268 ldr r2, [r4]
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3174 00b8 0593 str r3, [sp, #20]
1218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
3175 .loc 1 1218 7 is_stmt 1 view .LVU1168
- ARM GAS /tmp/ccqxsRKi.s page 132
+ ARM GAS /tmp/ccfzUCqR.s page 132
1218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
3214 .loc 1 1241 22 is_stmt 0 view .LVU1185
3215 00e6 0023 movs r3, #0
- ARM GAS /tmp/ccqxsRKi.s page 133
+ ARM GAS /tmp/ccfzUCqR.s page 133
3216 00e8 2363 str r3, [r4, #48]
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3255 .LVL271:
1233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3256 .loc 1 1233 22 view .LVU1201
- ARM GAS /tmp/ccqxsRKi.s page 134
+ ARM GAS /tmp/ccfzUCqR.s page 134
3257 0118 DBE7 b .L196
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3308 .cfi_offset 6, -12
3309 .cfi_offset 7, -8
3310 .cfi_offset 14, -4
- ARM GAS /tmp/ccqxsRKi.s page 135
+ ARM GAS /tmp/ccfzUCqR.s page 135
3311 0002 87B0 sub sp, sp, #28
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3348 .loc 1 1289 16 is_stmt 0 view .LVU1223
3349 0026 0323 movs r3, #3
3350 0028 80F83430 strb r3, [r0, #52]
- ARM GAS /tmp/ccqxsRKi.s page 136
+ ARM GAS /tmp/ccfzUCqR.s page 136
1292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3387 .loc 1 1308 7 is_stmt 1 view .LVU1241
1308:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3388 .loc 1 1308 11 is_stmt 0 view .LVU1242
- ARM GAS /tmp/ccqxsRKi.s page 137
+ ARM GAS /tmp/ccfzUCqR.s page 137
3389 0052 5202 lsls r2, r2, #9
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3427 007a 2363 str r3, [r4, #48]
1333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3428 .loc 1 1333 7 is_stmt 1 view .LVU1259
- ARM GAS /tmp/ccqxsRKi.s page 138
+ ARM GAS /tmp/ccfzUCqR.s page 138
1333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3467 .loc 1 1324 20 view .LVU1275
3468 00a0 E0E7 b .L210
3469 .L211:
- ARM GAS /tmp/ccqxsRKi.s page 139
+ ARM GAS /tmp/ccfzUCqR.s page 139
1337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3511 00d8 D36B ldr r3, [r2, #60]
3512 00da 23F01A03 bic r3, r3, #26
3513 00de D363 str r3, [r2, #60]
- ARM GAS /tmp/ccqxsRKi.s page 140
+ ARM GAS /tmp/ccfzUCqR.s page 140
1347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->ErrorCode |= HAL_SD_ERROR_DMA;
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3550 0108 0393 str r3, [sp, #12]
1360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DPSM = SDMMC_DPSM_ENABLE;
3551 .loc 1 1360 7 is_stmt 1 view .LVU1307
- ARM GAS /tmp/ccqxsRKi.s page 141
+ ARM GAS /tmp/ccfzUCqR.s page 141
1360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** config.DPSM = SDMMC_DPSM_ENABLE;
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3597 .thumb_func
3599 HAL_SD_Erase:
3600 .LVL295:
- ARM GAS /tmp/ccqxsRKi.s page 142
+ ARM GAS /tmp/ccfzUCqR.s page 142
3601 .LFB152:
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
3641 .loc 1 1398 7 view .LVU1332
3642 001c 9342 cmp r3, r2
- ARM GAS /tmp/ccqxsRKi.s page 143
+ ARM GAS /tmp/ccfzUCqR.s page 143
3643 001e 16D3 bcc .L232
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3680 004a 8363 str r3, [r0, #56]
1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3681 .loc 1 1395 7 is_stmt 1 view .LVU1350
- ARM GAS /tmp/ccqxsRKi.s page 144
+ ARM GAS /tmp/ccfzUCqR.s page 144
1395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
3719 .loc 1 1429 17 is_stmt 0 view .LVU1368
3720 006e 7602 lsls r6, r6, #9
- ARM GAS /tmp/ccqxsRKi.s page 145
+ ARM GAS /tmp/ccfzUCqR.s page 145
3721 .LVL303:
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3759 .loc 1 1420 7 view .LVU1384
1420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
3760 .loc 1 1420 10 is_stmt 0 view .LVU1385
- ARM GAS /tmp/ccqxsRKi.s page 146
+ ARM GAS /tmp/ccfzUCqR.s page 146
3761 0098 A36B ldr r3, [r4, #56]
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3799 .loc 1 1464 7 view .LVU1401
1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->State = HAL_SD_STATE_READY;
3800 .loc 1 1464 10 is_stmt 0 view .LVU1402
- ARM GAS /tmp/ccqxsRKi.s page 147
+ ARM GAS /tmp/ccfzUCqR.s page 147
3801 00c0 A36B ldr r3, [r4, #56]
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3838 00ea 00E0 b .L220
3839 .LVL311:
3840 .L229:
- ARM GAS /tmp/ccqxsRKi.s page 148
+ ARM GAS /tmp/ccfzUCqR.s page 148
1475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3892 @ frame_needed = 0, uses_anonymous_args = 0
3893 @ link register save eliminated.
1688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 149
+ ARM GAS /tmp/ccfzUCqR.s page 149
3894 .loc 1 1688 3 view .LVU1427
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3945 .section .text.HAL_SD_ErrorCallback,"ax",%progbits
3946 .align 1
3947 .weak HAL_SD_ErrorCallback
- ARM GAS /tmp/ccqxsRKi.s page 150
+ ARM GAS /tmp/ccfzUCqR.s page 150
3948 .syntax unified
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
3994 0006 822B cmp r3, #130
3995 0008 11D0 beq .L245
3996 .LVL322:
- ARM GAS /tmp/ccqxsRKi.s page 151
+ ARM GAS /tmp/ccfzUCqR.s page 151
3997 .L243:
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4035 0034 0346 mov r3, r0
4036 0036 0028 cmp r0, #0
4037 0038 E7D0 beq .L243
- ARM GAS /tmp/ccqxsRKi.s page 152
+ ARM GAS /tmp/ccfzUCqR.s page 152
2464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #if (USE_HAL_SD_REGISTER_CALLBACKS == 1)
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4087 @ args = 0, pretend = 0, frame = 0
4088 @ frame_needed = 0, uses_anonymous_args = 0
4089 @ link register save eliminated.
- ARM GAS /tmp/ccqxsRKi.s page 153
+ ARM GAS /tmp/ccfzUCqR.s page 153
1954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4124 .loc 1 1964 29 is_stmt 0 view .LVU1492
4125 0026 C26F ldr r2, [r0, #124]
- ARM GAS /tmp/ccqxsRKi.s page 154
+ ARM GAS /tmp/ccfzUCqR.s page 154
1964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1975:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4161 .loc 1 1975 1 view .LVU1512
4162 0056 7047 bx lr
- ARM GAS /tmp/ccqxsRKi.s page 155
+ ARM GAS /tmp/ccfzUCqR.s page 155
4163 .cfi_endproc
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4204 .loc 1 1993 3 is_stmt 1 view .LVU1527
1993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4205 .loc 1 1993 16 is_stmt 0 view .LVU1528
- ARM GAS /tmp/ccqxsRKi.s page 156
+ ARM GAS /tmp/ccfzUCqR.s page 156
4206 001a 90F86620 ldrb r2, [r0, #102] @ zero_extendqisi2
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4240 .loc 1 2005 3 is_stmt 1 view .LVU1548
2005:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4241 .loc 1 2005 46 is_stmt 0 view .LVU1549
- ARM GAS /tmp/ccqxsRKi.s page 157
+ ARM GAS /tmp/ccfzUCqR.s page 157
4242 0044 826E ldr r2, [r0, #104]
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4278 .loc 1 2015 73 view .LVU1568
4279 0072 D86E ldr r0, [r3, #108]
- ARM GAS /tmp/ccqxsRKi.s page 158
+ ARM GAS /tmp/ccfzUCqR.s page 158
2015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4314 009c DA6E ldr r2, [r3, #108]
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4315 .loc 1 2025 27 view .LVU1589
- ARM GAS /tmp/ccqxsRKi.s page 159
+ ARM GAS /tmp/ccfzUCqR.s page 159
4316 009e C2F3C232 ubfx r2, r2, #15, #3
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4351 .loc 1 2031 29 view .LVU1608
4352 00cc DA65 str r2, [r3, #92]
2032:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 160
+ ARM GAS /tmp/ccfzUCqR.s page 160
4353 .loc 1 2032 5 is_stmt 1 view .LVU1609
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4388 00f2 1A6F ldr r2, [r3, #112]
2061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4389 .loc 1 2061 22 view .LVU1629
- ARM GAS /tmp/ccqxsRKi.s page 161
+ ARM GAS /tmp/ccfzUCqR.s page 161
4390 00f4 C2F34172 ubfx r2, r2, #29, #2
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4425 .loc 1 2073 3 is_stmt 1 view .LVU1649
2073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 162
+ ARM GAS /tmp/ccfzUCqR.s page 162
4426 .loc 1 2073 46 is_stmt 0 view .LVU1650
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4461 .loc 1 2083 33 is_stmt 0 view .LVU1670
4462 0158 1A6F ldr r2, [r3, #112]
- ARM GAS /tmp/ccqxsRKi.s page 163
+ ARM GAS /tmp/ccfzUCqR.s page 163
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4499 .loc 1 2037 22 view .LVU1688
4500 0186 0A61 str r2, [r1, #16]
2039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->SdCard.LogBlockNbr = hsd->SdCard.BlockNbr;
- ARM GAS /tmp/ccqxsRKi.s page 164
+ ARM GAS /tmp/ccfzUCqR.s page 164
4501 .loc 1 2039 5 is_stmt 1 view .LVU1689
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4538 .LVL339:
2049:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
4539 .loc 1 2049 16 view .LVU1707
- ARM GAS /tmp/ccqxsRKi.s page 165
+ ARM GAS /tmp/ccfzUCqR.s page 165
4540 01ac 83F83400 strb r0, [r3, #52]
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
4586 .loc 1 2624 6 view .LVU1718
4587 000e FFF7FEFF bl SDMMC_GetPowerState
- ARM GAS /tmp/ccqxsRKi.s page 166
+ ARM GAS /tmp/ccfzUCqR.s page 166
4588 .LVL342:
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4626 003a 5BD1 bne .L255
2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->CSD[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2);
4627 .loc 1 2672 7 is_stmt 1 view .LVU1735
- ARM GAS /tmp/ccqxsRKi.s page 167
+ ARM GAS /tmp/ccfzUCqR.s page 167
2672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->CSD[1U] = SDMMC_GetResponse(hsd->Instance, SDMMC_RESP2);
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4668 .LVL350:
2680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4669 .loc 1 2680 70 discriminator 1 view .LVU1750
- ARM GAS /tmp/ccqxsRKi.s page 168
+ ARM GAS /tmp/ccfzUCqR.s page 168
4670 006c 000D lsrs r0, r0, #20
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4710 .loc 1 2699 3 is_stmt 1 view .LVU1764
2699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
4711 .loc 1 2699 10 is_stmt 0 view .LVU1765
- ARM GAS /tmp/ccqxsRKi.s page 169
+ ARM GAS /tmp/ccfzUCqR.s page 169
4712 00a6 25E0 b .L255
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
4751 .loc 1 2644 22 is_stmt 0 view .LVU1781
4752 00d0 0C21 movs r1, #12
- ARM GAS /tmp/ccqxsRKi.s page 170
+ ARM GAS /tmp/ccfzUCqR.s page 170
4753 00d2 2068 ldr r0, [r4]
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4800 .syntax unified
4801 .thumb
4802 .thumb_func
- ARM GAS /tmp/ccqxsRKi.s page 171
+ ARM GAS /tmp/ccfzUCqR.s page 171
4804 HAL_SD_InitCard:
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4842 .loc 1 415 28 is_stmt 0 view .LVU1806
4843 0012 7623 movs r3, #118
- ARM GAS /tmp/ccqxsRKi.s page 172
+ ARM GAS /tmp/ccfzUCqR.s page 172
4844 0014 0993 str r3, [sp, #36]
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
4887 .loc 1 428 9 view .LVU1818
4888 0042 FFF7FEFF bl SDMMC_PowerState_ON
- ARM GAS /tmp/ccqxsRKi.s page 173
+ ARM GAS /tmp/ccfzUCqR.s page 173
4889 .LVL374:
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4927 .LVL378:
447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
4928 .loc 1 447 3 is_stmt 1 view .LVU1835
- ARM GAS /tmp/ccqxsRKi.s page 174
+ ARM GAS /tmp/ccfzUCqR.s page 174
447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
4966 009a A363 str r3, [r4, #56]
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
4967 .loc 1 461 5 is_stmt 1 view .LVU1853
- ARM GAS /tmp/ccqxsRKi.s page 175
+ ARM GAS /tmp/ccfzUCqR.s page 175
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** return HAL_ERROR;
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
350:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
5011 .loc 1 350 3 view .LVU1867
352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 176
+ ARM GAS /tmp/ccfzUCqR.s page 176
5012 .loc 1 352 3 view .LVU1868
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
5049 .loc 1 372 5 is_stmt 1 view .LVU1886
5050 0028 FFF7FEFF bl HAL_SD_MspInit
- ARM GAS /tmp/ccqxsRKi.s page 177
+ ARM GAS /tmp/ccfzUCqR.s page 177
5051 .LVL385:
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5101 0004 0546 mov r5, r0
5102 0006 0C46 mov r4, r1
2101:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t errorstate;
- ARM GAS /tmp/ccqxsRKi.s page 178
+ ARM GAS /tmp/ccfzUCqR.s page 178
5103 .loc 1 2101 3 is_stmt 1 view .LVU1893
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5140 .LVL395:
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(errorstate != HAL_SD_ERROR_NONE)
5141 .loc 1 2139 16 view .LVU1911
- ARM GAS /tmp/ccqxsRKi.s page 179
+ ARM GAS /tmp/ccfzUCqR.s page 179
5142 0028 FFF7FEFF bl SDMMC_CmdBlockLength
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5181 .loc 1 2116 29 view .LVU1926
5182 0044 C2F38113 ubfx r3, r2, #6, #2
2116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 180
+ ARM GAS /tmp/ccfzUCqR.s page 180
5183 .loc 1 2116 27 view .LVU1927
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5219 .loc 1 2125 27 view .LVU1945
5220 007a DAB2 uxtb r2, r3
2125:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 181
+ ARM GAS /tmp/ccfzUCqR.s page 181
5221 .loc 1 2125 25 view .LVU1946
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5256 00a4 0024 movs r4, #0
5257 .LVL401:
2103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
- ARM GAS /tmp/ccqxsRKi.s page 182
+ ARM GAS /tmp/ccfzUCqR.s page 182
5258 .loc 1 2103 21 view .LVU1966
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5301 000e CB60 str r3, [r1, #12]
2165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize);
5302 .loc 1 2165 3 is_stmt 1 view .LVU1980
- ARM GAS /tmp/ccqxsRKi.s page 183
+ ARM GAS /tmp/ccfzUCqR.s page 183
2165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** pCardInfo->BlockSize = (uint32_t)(hsd->SdCard.BlockSize);
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5344 @ frame_needed = 0, uses_anonymous_args = 0
2185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_InitTypeDef Init;
5345 .loc 1 2185 1 is_stmt 0 view .LVU1996
- ARM GAS /tmp/ccqxsRKi.s page 184
+ ARM GAS /tmp/ccfzUCqR.s page 184
5346 0000 30B5 push {r4, r5, lr}
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
5384 .loc 1 2217 10 is_stmt 0 view .LVU2013
5385 0022 836B ldr r3, [r0, #56]
- ARM GAS /tmp/ccqxsRKi.s page 185
+ ARM GAS /tmp/ccfzUCqR.s page 185
2217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5425 .loc 1 2223 5 is_stmt 1 view .LVU2028
2223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
5426 .loc 1 2223 8 is_stmt 0 view .LVU2029
- ARM GAS /tmp/ccqxsRKi.s page 186
+ ARM GAS /tmp/ccfzUCqR.s page 186
5427 004e 836B ldr r3, [r0, #56]
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5465 .loc 1 2251 8 is_stmt 0 view .LVU2045
5466 0078 A36B ldr r3, [r4, #56]
2251:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** status = HAL_ERROR;
- ARM GAS /tmp/ccqxsRKi.s page 187
+ ARM GAS /tmp/ccfzUCqR.s page 187
5467 .loc 1 2251 20 view .LVU2046
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5506 .loc 1 2238 41 is_stmt 0 view .LVU2061
5507 0094 E368 ldr r3, [r4, #12]
2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** Init.BusWide = WideMode;
- ARM GAS /tmp/ccqxsRKi.s page 188
+ ARM GAS /tmp/ccfzUCqR.s page 188
5508 .loc 1 2238 30 view .LVU2062
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5552 HAL_SD_GetCardState:
5553 .LVL420:
5554 .LFB165:
- ARM GAS /tmp/ccqxsRKi.s page 189
+ ARM GAS /tmp/ccfzUCqR.s page 189
2267:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** uint32_t cardstate;
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5593 .loc 1 2281 1 is_stmt 0 view .LVU2090
5594 0018 0198 ldr r0, [sp, #4]
5595 .LVL423:
- ARM GAS /tmp/ccqxsRKi.s page 190
+ ARM GAS /tmp/ccfzUCqR.s page 190
2281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5640 000a 0AD0 beq .L310
2504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** TxErrorCode = hsd->hdmatx->ErrorCode;
5641 .loc 1 2504 5 is_stmt 1 view .LVU2103
- ARM GAS /tmp/ccqxsRKi.s page 191
+ ARM GAS /tmp/ccfzUCqR.s page 191
2504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** TxErrorCode = hsd->hdmatx->ErrorCode;
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** CardState = HAL_SD_GetCardState(hsd);
5683 .loc 1 2515 7 view .LVU2117
2515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** CardState = HAL_SD_GetCardState(hsd);
- ARM GAS /tmp/ccqxsRKi.s page 192
+ ARM GAS /tmp/ccfzUCqR.s page 192
5684 .loc 1 2515 10 is_stmt 0 view .LVU2118
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5723 .loc 1 2519 24 discriminator 1 view .LVU2133
5724 005c 0343 orrs r3, r3, r0
5725 005e A363 str r3, [r4, #56]
- ARM GAS /tmp/ccqxsRKi.s page 193
+ ARM GAS /tmp/ccfzUCqR.s page 193
5726 0060 F2E7 b .L313
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5771 0012 0123 movs r3, #1
5772 0014 84F83430 strb r3, [r4, #52]
2549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING))
- ARM GAS /tmp/ccqxsRKi.s page 194
+ ARM GAS /tmp/ccfzUCqR.s page 194
5773 .loc 1 2549 3 is_stmt 1 view .LVU2145
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5813 .L321:
2568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif
5814 .loc 1 2568 5 is_stmt 1 view .LVU2160
- ARM GAS /tmp/ccqxsRKi.s page 195
+ ARM GAS /tmp/ccfzUCqR.s page 195
5815 003c 2046 mov r0, r4
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5859 .loc 1 2587 14 is_stmt 0 view .LVU2172
5860 0012 0123 movs r3, #1
5861 0014 84F83430 strb r3, [r4, #52]
- ARM GAS /tmp/ccqxsRKi.s page 196
+ ARM GAS /tmp/ccfzUCqR.s page 196
2588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if((CardState == HAL_SD_CARD_RECEIVING) || (CardState == HAL_SD_CARD_SENDING))
@@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5901 003a F2E7 b .L326
5902 .L327:
2607:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif
- ARM GAS /tmp/ccqxsRKi.s page 197
+ ARM GAS /tmp/ccfzUCqR.s page 197
5903 .loc 1 2607 5 is_stmt 1 view .LVU2188
@@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5949 0014 26D1 bne .L348
5950 .L332:
1495:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
- ARM GAS /tmp/ccqxsRKi.s page 198
+ ARM GAS /tmp/ccfzUCqR.s page 198
5951 .loc 1 1495 8 is_stmt 1 view .LVU2199
@@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
5990 004c 0123 movs r3, #1
5991 004e 84F83430 strb r3, [r4, #52]
1525:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** if(((context & SD_CONTEXT_READ_SINGLE_BLOCK) != 0U) || ((context & SD_CONTEXT_READ_MULTIPLE_B
- ARM GAS /tmp/ccqxsRKi.s page 199
+ ARM GAS /tmp/ccfzUCqR.s page 199
5992 .loc 1 1525 7 is_stmt 1 view .LVU2215
@@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6032 007a A363 str r3, [r4, #56]
1516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
6033 .loc 1 1516 11 is_stmt 1 view .LVU2230
- ARM GAS /tmp/ccqxsRKi.s page 200
+ ARM GAS /tmp/ccfzUCqR.s page 200
6034 007c 2046 mov r0, r4
@@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6074 00aa 84F83430 strb r3, [r4, #52]
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** #endif /* USE_HAL_SD_REGISTER_CALLBACKS */
6075 .loc 1 1569 9 is_stmt 1 view .LVU2245
- ARM GAS /tmp/ccqxsRKi.s page 201
+ ARM GAS /tmp/ccfzUCqR.s page 201
6076 00ae 2046 mov r0, r4
@@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6116 00d8 15F0080F tst r5, #8
6117 00dc 4AD1 bne .L351
6118 .L339:
- ARM GAS /tmp/ccqxsRKi.s page 202
+ ARM GAS /tmp/ccfzUCqR.s page 202
1584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6155 0108 12F0200F tst r2, #32
6156 010c 03D0 beq .L342
1597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 203
+ ARM GAS /tmp/ccfzUCqR.s page 203
6157 .loc 1 1597 7 is_stmt 1 view .LVU2278
@@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6196 0140 A363 str r3, [r4, #56]
1613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
6197 .loc 1 1613 5 is_stmt 1 view .LVU2294
- ARM GAS /tmp/ccqxsRKi.s page 204
+ ARM GAS /tmp/ccfzUCqR.s page 204
1613:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** {
@@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
1581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
6237 .loc 1 1581 5 is_stmt 0 view .LVU2310
6238 0176 FFF7FEFF bl SD_Write_IT
- ARM GAS /tmp/ccqxsRKi.s page 205
+ ARM GAS /tmp/ccfzUCqR.s page 205
6239 .LVL491:
@@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6279 01aa A363 str r3, [r4, #56]
1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE;
6280 .loc 1 1650 9 is_stmt 1 view .LVU2325
- ARM GAS /tmp/ccqxsRKi.s page 206
+ ARM GAS /tmp/ccfzUCqR.s page 206
1650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE;
@@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6326 .loc 1 2292 12 is_stmt 0 view .LVU2336
6327 0004 016B ldr r1, [r0, #48]
6328 .LVL497:
- ARM GAS /tmp/ccqxsRKi.s page 207
+ ARM GAS /tmp/ccfzUCqR.s page 207
2295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** SDMMC_IT_TXUNDERR| SDMMC_IT_RXOVERR);
@@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6367 .loc 1 2330 14 is_stmt 0 view .LVU2352
6368 003e 0123 movs r3, #1
6369 0040 84F83430 strb r3, [r4, #52]
- ARM GAS /tmp/ccqxsRKi.s page 208
+ ARM GAS /tmp/ccfzUCqR.s page 208
2333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6408 0062 0028 cmp r0, #0
6409 0064 EBD0 beq .L357
2313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
- ARM GAS /tmp/ccqxsRKi.s page 209
+ ARM GAS /tmp/ccfzUCqR.s page 209
6410 .loc 1 2313 9 is_stmt 1 view .LVU2369
@@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6450 008e 0120 movs r0, #1
6451 0090 E3E7 b .L360
6452 .cfi_endproc
- ARM GAS /tmp/ccqxsRKi.s page 210
+ ARM GAS /tmp/ccfzUCqR.s page 210
6453 .LFE166:
@@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
6498 .loc 1 2367 18 view .LVU2395
6499 0022 CB6A ldr r3, [r1, #44]
- ARM GAS /tmp/ccqxsRKi.s page 211
+ ARM GAS /tmp/ccfzUCqR.s page 211
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c ****
@@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
6538 .loc 1 2375 21 is_stmt 0 view .LVU2412
6539 004a 0020 movs r0, #0
- ARM GAS /tmp/ccqxsRKi.s page 212
+ ARM GAS /tmp/ccfzUCqR.s page 212
6540 004c E063 str r0, [r4, #60]
@@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6579 .loc 1 2399 5 is_stmt 1 view .LVU2427
2399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** hsd->Context = SD_CONTEXT_NONE;
6580 .loc 1 2399 16 is_stmt 0 view .LVU2428
- ARM GAS /tmp/ccqxsRKi.s page 213
+ ARM GAS /tmp/ccfzUCqR.s page 213
6581 0072 0123 movs r3, #1
@@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccqxsRKi.s page 1
2419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sd.c **** }
6621 .loc 1 2419 10 is_stmt 0 view .LVU2443
6622 009a 0020 movs r0, #0
- ARM GAS /tmp/ccqxsRKi.s page 214
+ ARM GAS /tmp/ccfzUCqR.s page 214
6623 009c CCE7 b .L369
@@ -12799,113 +12799,113 @@ ARM GAS /tmp/ccqxsRKi.s page 1
6639 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
6640 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h"
6641 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccqxsRKi.s page 215
+ ARM GAS /tmp/ccfzUCqR.s page 215
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_sd.c
- /tmp/ccqxsRKi.s:20 .text.SD_DMATransmitCplt:00000000 $t
- /tmp/ccqxsRKi.s:25 .text.SD_DMATransmitCplt:00000000 SD_DMATransmitCplt
- /tmp/ccqxsRKi.s:51 .text.SD_PowerON:00000000 $t
- /tmp/ccqxsRKi.s:56 .text.SD_PowerON:00000000 SD_PowerON
- /tmp/ccqxsRKi.s:275 .text.SD_PowerON:000000bc $d
- /tmp/ccqxsRKi.s:280 .text.SD_PowerOFF:00000000 $t
- /tmp/ccqxsRKi.s:285 .text.SD_PowerOFF:00000000 SD_PowerOFF
- /tmp/ccqxsRKi.s:311 .text.SD_Read_IT:00000000 $t
- /tmp/ccqxsRKi.s:316 .text.SD_Read_IT:00000000 SD_Read_IT
- /tmp/ccqxsRKi.s:419 .text.SD_Write_IT:00000000 $t
- /tmp/ccqxsRKi.s:424 .text.SD_Write_IT:00000000 SD_Write_IT
- /tmp/ccqxsRKi.s:541 .text.SD_SendSDStatus:00000000 $t
- /tmp/ccqxsRKi.s:546 .text.SD_SendSDStatus:00000000 SD_SendSDStatus
- /tmp/ccqxsRKi.s:814 .text.SD_FindSCR:00000000 $t
- /tmp/ccqxsRKi.s:819 .text.SD_FindSCR:00000000 SD_FindSCR
- /tmp/ccqxsRKi.s:1083 .text.SD_WideBus_Enable:00000000 $t
- /tmp/ccqxsRKi.s:1088 .text.SD_WideBus_Enable:00000000 SD_WideBus_Enable
- /tmp/ccqxsRKi.s:1183 .text.SD_WideBus_Disable:00000000 $t
- /tmp/ccqxsRKi.s:1188 .text.SD_WideBus_Disable:00000000 SD_WideBus_Disable
- /tmp/ccqxsRKi.s:1283 .text.SD_SendStatus:00000000 $t
- /tmp/ccqxsRKi.s:1288 .text.SD_SendStatus:00000000 SD_SendStatus
- /tmp/ccqxsRKi.s:1353 .text.HAL_SD_MspInit:00000000 $t
- /tmp/ccqxsRKi.s:1359 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
- /tmp/ccqxsRKi.s:1374 .text.HAL_SD_MspDeInit:00000000 $t
- /tmp/ccqxsRKi.s:1380 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
- /tmp/ccqxsRKi.s:1395 .text.HAL_SD_DeInit:00000000 $t
- /tmp/ccqxsRKi.s:1401 .text.HAL_SD_DeInit:00000000 HAL_SD_DeInit
- /tmp/ccqxsRKi.s:1455 .text.HAL_SD_ReadBlocks:00000000 $t
- /tmp/ccqxsRKi.s:1461 .text.HAL_SD_ReadBlocks:00000000 HAL_SD_ReadBlocks
- /tmp/ccqxsRKi.s:2019 .text.HAL_SD_ReadBlocks:00000244 $d
- /tmp/ccqxsRKi.s:2024 .text.HAL_SD_WriteBlocks:00000000 $t
- /tmp/ccqxsRKi.s:2030 .text.HAL_SD_WriteBlocks:00000000 HAL_SD_WriteBlocks
- /tmp/ccqxsRKi.s:2517 .text.HAL_SD_WriteBlocks:000001fc $d
- /tmp/ccqxsRKi.s:2522 .text.HAL_SD_ReadBlocks_IT:00000000 $t
- /tmp/ccqxsRKi.s:2528 .text.HAL_SD_ReadBlocks_IT:00000000 HAL_SD_ReadBlocks_IT
- /tmp/ccqxsRKi.s:2751 .text.HAL_SD_ReadBlocks_IT:000000c8 $d
- /tmp/ccqxsRKi.s:2756 .text.HAL_SD_WriteBlocks_IT:00000000 $t
- /tmp/ccqxsRKi.s:2762 .text.HAL_SD_WriteBlocks_IT:00000000 HAL_SD_WriteBlocks_IT
- /tmp/ccqxsRKi.s:2985 .text.HAL_SD_WriteBlocks_IT:000000c0 $d
- /tmp/ccqxsRKi.s:2990 .text.HAL_SD_ReadBlocks_DMA:00000000 $t
- /tmp/ccqxsRKi.s:2996 .text.HAL_SD_ReadBlocks_DMA:00000000 HAL_SD_ReadBlocks_DMA
- /tmp/ccqxsRKi.s:3282 .text.HAL_SD_ReadBlocks_DMA:00000128 $d
- /tmp/ccqxsRKi.s:3972 .text.SD_DMAReceiveCplt:00000000 SD_DMAReceiveCplt
- /tmp/ccqxsRKi.s:5615 .text.SD_DMAError:00000000 SD_DMAError
- /tmp/ccqxsRKi.s:3289 .text.HAL_SD_WriteBlocks_DMA:00000000 $t
- /tmp/ccqxsRKi.s:3295 .text.HAL_SD_WriteBlocks_DMA:00000000 HAL_SD_WriteBlocks_DMA
- /tmp/ccqxsRKi.s:3586 .text.HAL_SD_WriteBlocks_DMA:00000124 $d
- /tmp/ccqxsRKi.s:3593 .text.HAL_SD_Erase:00000000 $t
- /tmp/ccqxsRKi.s:3599 .text.HAL_SD_Erase:00000000 HAL_SD_Erase
- /tmp/ccqxsRKi.s:3851 .text.HAL_SD_Erase:000000f4 $d
- /tmp/ccqxsRKi.s:3856 .text.HAL_SD_GetState:00000000 $t
- /tmp/ccqxsRKi.s:3862 .text.HAL_SD_GetState:00000000 HAL_SD_GetState
- /tmp/ccqxsRKi.s:3880 .text.HAL_SD_GetError:00000000 $t
- /tmp/ccqxsRKi.s:3886 .text.HAL_SD_GetError:00000000 HAL_SD_GetError
- /tmp/ccqxsRKi.s:3904 .text.HAL_SD_TxCpltCallback:00000000 $t
- ARM GAS /tmp/ccqxsRKi.s page 216
+ /tmp/ccfzUCqR.s:20 .text.SD_DMATransmitCplt:00000000 $t
+ /tmp/ccfzUCqR.s:25 .text.SD_DMATransmitCplt:00000000 SD_DMATransmitCplt
+ /tmp/ccfzUCqR.s:51 .text.SD_PowerON:00000000 $t
+ /tmp/ccfzUCqR.s:56 .text.SD_PowerON:00000000 SD_PowerON
+ /tmp/ccfzUCqR.s:275 .text.SD_PowerON:000000bc $d
+ /tmp/ccfzUCqR.s:280 .text.SD_PowerOFF:00000000 $t
+ /tmp/ccfzUCqR.s:285 .text.SD_PowerOFF:00000000 SD_PowerOFF
+ /tmp/ccfzUCqR.s:311 .text.SD_Read_IT:00000000 $t
+ /tmp/ccfzUCqR.s:316 .text.SD_Read_IT:00000000 SD_Read_IT
+ /tmp/ccfzUCqR.s:419 .text.SD_Write_IT:00000000 $t
+ /tmp/ccfzUCqR.s:424 .text.SD_Write_IT:00000000 SD_Write_IT
+ /tmp/ccfzUCqR.s:541 .text.SD_SendSDStatus:00000000 $t
+ /tmp/ccfzUCqR.s:546 .text.SD_SendSDStatus:00000000 SD_SendSDStatus
+ /tmp/ccfzUCqR.s:814 .text.SD_FindSCR:00000000 $t
+ /tmp/ccfzUCqR.s:819 .text.SD_FindSCR:00000000 SD_FindSCR
+ /tmp/ccfzUCqR.s:1083 .text.SD_WideBus_Enable:00000000 $t
+ /tmp/ccfzUCqR.s:1088 .text.SD_WideBus_Enable:00000000 SD_WideBus_Enable
+ /tmp/ccfzUCqR.s:1183 .text.SD_WideBus_Disable:00000000 $t
+ /tmp/ccfzUCqR.s:1188 .text.SD_WideBus_Disable:00000000 SD_WideBus_Disable
+ /tmp/ccfzUCqR.s:1283 .text.SD_SendStatus:00000000 $t
+ /tmp/ccfzUCqR.s:1288 .text.SD_SendStatus:00000000 SD_SendStatus
+ /tmp/ccfzUCqR.s:1353 .text.HAL_SD_MspInit:00000000 $t
+ /tmp/ccfzUCqR.s:1359 .text.HAL_SD_MspInit:00000000 HAL_SD_MspInit
+ /tmp/ccfzUCqR.s:1374 .text.HAL_SD_MspDeInit:00000000 $t
+ /tmp/ccfzUCqR.s:1380 .text.HAL_SD_MspDeInit:00000000 HAL_SD_MspDeInit
+ /tmp/ccfzUCqR.s:1395 .text.HAL_SD_DeInit:00000000 $t
+ /tmp/ccfzUCqR.s:1401 .text.HAL_SD_DeInit:00000000 HAL_SD_DeInit
+ /tmp/ccfzUCqR.s:1455 .text.HAL_SD_ReadBlocks:00000000 $t
+ /tmp/ccfzUCqR.s:1461 .text.HAL_SD_ReadBlocks:00000000 HAL_SD_ReadBlocks
+ /tmp/ccfzUCqR.s:2019 .text.HAL_SD_ReadBlocks:00000244 $d
+ /tmp/ccfzUCqR.s:2024 .text.HAL_SD_WriteBlocks:00000000 $t
+ /tmp/ccfzUCqR.s:2030 .text.HAL_SD_WriteBlocks:00000000 HAL_SD_WriteBlocks
+ /tmp/ccfzUCqR.s:2517 .text.HAL_SD_WriteBlocks:000001fc $d
+ /tmp/ccfzUCqR.s:2522 .text.HAL_SD_ReadBlocks_IT:00000000 $t
+ /tmp/ccfzUCqR.s:2528 .text.HAL_SD_ReadBlocks_IT:00000000 HAL_SD_ReadBlocks_IT
+ /tmp/ccfzUCqR.s:2751 .text.HAL_SD_ReadBlocks_IT:000000c8 $d
+ /tmp/ccfzUCqR.s:2756 .text.HAL_SD_WriteBlocks_IT:00000000 $t
+ /tmp/ccfzUCqR.s:2762 .text.HAL_SD_WriteBlocks_IT:00000000 HAL_SD_WriteBlocks_IT
+ /tmp/ccfzUCqR.s:2985 .text.HAL_SD_WriteBlocks_IT:000000c0 $d
+ /tmp/ccfzUCqR.s:2990 .text.HAL_SD_ReadBlocks_DMA:00000000 $t
+ /tmp/ccfzUCqR.s:2996 .text.HAL_SD_ReadBlocks_DMA:00000000 HAL_SD_ReadBlocks_DMA
+ /tmp/ccfzUCqR.s:3282 .text.HAL_SD_ReadBlocks_DMA:00000128 $d
+ /tmp/ccfzUCqR.s:3972 .text.SD_DMAReceiveCplt:00000000 SD_DMAReceiveCplt
+ /tmp/ccfzUCqR.s:5615 .text.SD_DMAError:00000000 SD_DMAError
+ /tmp/ccfzUCqR.s:3289 .text.HAL_SD_WriteBlocks_DMA:00000000 $t
+ /tmp/ccfzUCqR.s:3295 .text.HAL_SD_WriteBlocks_DMA:00000000 HAL_SD_WriteBlocks_DMA
+ /tmp/ccfzUCqR.s:3586 .text.HAL_SD_WriteBlocks_DMA:00000124 $d
+ /tmp/ccfzUCqR.s:3593 .text.HAL_SD_Erase:00000000 $t
+ /tmp/ccfzUCqR.s:3599 .text.HAL_SD_Erase:00000000 HAL_SD_Erase
+ /tmp/ccfzUCqR.s:3851 .text.HAL_SD_Erase:000000f4 $d
+ /tmp/ccfzUCqR.s:3856 .text.HAL_SD_GetState:00000000 $t
+ /tmp/ccfzUCqR.s:3862 .text.HAL_SD_GetState:00000000 HAL_SD_GetState
+ /tmp/ccfzUCqR.s:3880 .text.HAL_SD_GetError:00000000 $t
+ /tmp/ccfzUCqR.s:3886 .text.HAL_SD_GetError:00000000 HAL_SD_GetError
+ /tmp/ccfzUCqR.s:3904 .text.HAL_SD_TxCpltCallback:00000000 $t
+ ARM GAS /tmp/ccfzUCqR.s page 216
- /tmp/ccqxsRKi.s:3910 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback
- /tmp/ccqxsRKi.s:3925 .text.HAL_SD_RxCpltCallback:00000000 $t
- /tmp/ccqxsRKi.s:3931 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback
- /tmp/ccqxsRKi.s:3946 .text.HAL_SD_ErrorCallback:00000000 $t
- /tmp/ccqxsRKi.s:3952 .text.HAL_SD_ErrorCallback:00000000 HAL_SD_ErrorCallback
- /tmp/ccqxsRKi.s:3967 .text.SD_DMAReceiveCplt:00000000 $t
- /tmp/ccqxsRKi.s:4055 .text.HAL_SD_AbortCallback:00000000 $t
- /tmp/ccqxsRKi.s:4061 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback
- /tmp/ccqxsRKi.s:4076 .text.HAL_SD_GetCardCID:00000000 $t
- /tmp/ccqxsRKi.s:4082 .text.HAL_SD_GetCardCID:00000000 HAL_SD_GetCardCID
- /tmp/ccqxsRKi.s:4167 .text.HAL_SD_GetCardCSD:00000000 $t
- /tmp/ccqxsRKi.s:4173 .text.HAL_SD_GetCardCSD:00000000 HAL_SD_GetCardCSD
- /tmp/ccqxsRKi.s:4547 .text.HAL_SD_GetCardCSD:000001b4 $d
- /tmp/ccqxsRKi.s:4552 .text.SD_InitCard:00000000 $t
- /tmp/ccqxsRKi.s:4557 .text.SD_InitCard:00000000 SD_InitCard
- /tmp/ccqxsRKi.s:4798 .text.HAL_SD_InitCard:00000000 $t
- /tmp/ccqxsRKi.s:4804 .text.HAL_SD_InitCard:00000000 HAL_SD_InitCard
- /tmp/ccqxsRKi.s:4977 .text.HAL_SD_InitCard:000000a4 $d
- /tmp/ccqxsRKi.s:4982 .text.HAL_SD_Init:00000000 $t
- /tmp/ccqxsRKi.s:4988 .text.HAL_SD_Init:00000000 HAL_SD_Init
- /tmp/ccqxsRKi.s:5078 .text.HAL_SD_GetCardStatus:00000000 $t
- /tmp/ccqxsRKi.s:5084 .text.HAL_SD_GetCardStatus:00000000 HAL_SD_GetCardStatus
- /tmp/ccqxsRKi.s:5263 .text.HAL_SD_GetCardStatus:000000a8 $d
- /tmp/ccqxsRKi.s:5268 .text.HAL_SD_GetCardInfo:00000000 $t
- /tmp/ccqxsRKi.s:5274 .text.HAL_SD_GetCardInfo:00000000 HAL_SD_GetCardInfo
- /tmp/ccqxsRKi.s:5332 .text.HAL_SD_ConfigWideBusOperation:00000000 $t
- /tmp/ccqxsRKi.s:5338 .text.HAL_SD_ConfigWideBusOperation:00000000 HAL_SD_ConfigWideBusOperation
- /tmp/ccqxsRKi.s:5541 .text.HAL_SD_ConfigWideBusOperation:000000bc $d
- /tmp/ccqxsRKi.s:5546 .text.HAL_SD_GetCardState:00000000 $t
- /tmp/ccqxsRKi.s:5552 .text.HAL_SD_GetCardState:00000000 HAL_SD_GetCardState
- /tmp/ccqxsRKi.s:5610 .text.SD_DMAError:00000000 $t
- /tmp/ccqxsRKi.s:5730 .text.SD_DMAError:00000064 $d
- /tmp/ccqxsRKi.s:5735 .text.SD_DMATxAbort:00000000 $t
- /tmp/ccqxsRKi.s:5740 .text.SD_DMATxAbort:00000000 SD_DMATxAbort
- /tmp/ccqxsRKi.s:5824 .text.SD_DMARxAbort:00000000 $t
- /tmp/ccqxsRKi.s:5829 .text.SD_DMARxAbort:00000000 SD_DMARxAbort
- /tmp/ccqxsRKi.s:5913 .text.HAL_SD_IRQHandler:00000000 $t
- /tmp/ccqxsRKi.s:5919 .text.HAL_SD_IRQHandler:00000000 HAL_SD_IRQHandler
- /tmp/ccqxsRKi.s:6297 .text.HAL_SD_IRQHandler:000001bc $d
- /tmp/ccqxsRKi.s:6304 .text.HAL_SD_Abort:00000000 $t
- /tmp/ccqxsRKi.s:6310 .text.HAL_SD_Abort:00000000 HAL_SD_Abort
- /tmp/ccqxsRKi.s:6456 .text.HAL_SD_Abort_IT:00000000 $t
- /tmp/ccqxsRKi.s:6462 .text.HAL_SD_Abort_IT:00000000 HAL_SD_Abort_IT
- /tmp/ccqxsRKi.s:6627 .text.HAL_SD_Abort_IT:000000a0 $d
+ /tmp/ccfzUCqR.s:3910 .text.HAL_SD_TxCpltCallback:00000000 HAL_SD_TxCpltCallback
+ /tmp/ccfzUCqR.s:3925 .text.HAL_SD_RxCpltCallback:00000000 $t
+ /tmp/ccfzUCqR.s:3931 .text.HAL_SD_RxCpltCallback:00000000 HAL_SD_RxCpltCallback
+ /tmp/ccfzUCqR.s:3946 .text.HAL_SD_ErrorCallback:00000000 $t
+ /tmp/ccfzUCqR.s:3952 .text.HAL_SD_ErrorCallback:00000000 HAL_SD_ErrorCallback
+ /tmp/ccfzUCqR.s:3967 .text.SD_DMAReceiveCplt:00000000 $t
+ /tmp/ccfzUCqR.s:4055 .text.HAL_SD_AbortCallback:00000000 $t
+ /tmp/ccfzUCqR.s:4061 .text.HAL_SD_AbortCallback:00000000 HAL_SD_AbortCallback
+ /tmp/ccfzUCqR.s:4076 .text.HAL_SD_GetCardCID:00000000 $t
+ /tmp/ccfzUCqR.s:4082 .text.HAL_SD_GetCardCID:00000000 HAL_SD_GetCardCID
+ /tmp/ccfzUCqR.s:4167 .text.HAL_SD_GetCardCSD:00000000 $t
+ /tmp/ccfzUCqR.s:4173 .text.HAL_SD_GetCardCSD:00000000 HAL_SD_GetCardCSD
+ /tmp/ccfzUCqR.s:4547 .text.HAL_SD_GetCardCSD:000001b4 $d
+ /tmp/ccfzUCqR.s:4552 .text.SD_InitCard:00000000 $t
+ /tmp/ccfzUCqR.s:4557 .text.SD_InitCard:00000000 SD_InitCard
+ /tmp/ccfzUCqR.s:4798 .text.HAL_SD_InitCard:00000000 $t
+ /tmp/ccfzUCqR.s:4804 .text.HAL_SD_InitCard:00000000 HAL_SD_InitCard
+ /tmp/ccfzUCqR.s:4977 .text.HAL_SD_InitCard:000000a4 $d
+ /tmp/ccfzUCqR.s:4982 .text.HAL_SD_Init:00000000 $t
+ /tmp/ccfzUCqR.s:4988 .text.HAL_SD_Init:00000000 HAL_SD_Init
+ /tmp/ccfzUCqR.s:5078 .text.HAL_SD_GetCardStatus:00000000 $t
+ /tmp/ccfzUCqR.s:5084 .text.HAL_SD_GetCardStatus:00000000 HAL_SD_GetCardStatus
+ /tmp/ccfzUCqR.s:5263 .text.HAL_SD_GetCardStatus:000000a8 $d
+ /tmp/ccfzUCqR.s:5268 .text.HAL_SD_GetCardInfo:00000000 $t
+ /tmp/ccfzUCqR.s:5274 .text.HAL_SD_GetCardInfo:00000000 HAL_SD_GetCardInfo
+ /tmp/ccfzUCqR.s:5332 .text.HAL_SD_ConfigWideBusOperation:00000000 $t
+ /tmp/ccfzUCqR.s:5338 .text.HAL_SD_ConfigWideBusOperation:00000000 HAL_SD_ConfigWideBusOperation
+ /tmp/ccfzUCqR.s:5541 .text.HAL_SD_ConfigWideBusOperation:000000bc $d
+ /tmp/ccfzUCqR.s:5546 .text.HAL_SD_GetCardState:00000000 $t
+ /tmp/ccfzUCqR.s:5552 .text.HAL_SD_GetCardState:00000000 HAL_SD_GetCardState
+ /tmp/ccfzUCqR.s:5610 .text.SD_DMAError:00000000 $t
+ /tmp/ccfzUCqR.s:5730 .text.SD_DMAError:00000064 $d
+ /tmp/ccfzUCqR.s:5735 .text.SD_DMATxAbort:00000000 $t
+ /tmp/ccfzUCqR.s:5740 .text.SD_DMATxAbort:00000000 SD_DMATxAbort
+ /tmp/ccfzUCqR.s:5824 .text.SD_DMARxAbort:00000000 $t
+ /tmp/ccfzUCqR.s:5829 .text.SD_DMARxAbort:00000000 SD_DMARxAbort
+ /tmp/ccfzUCqR.s:5913 .text.HAL_SD_IRQHandler:00000000 $t
+ /tmp/ccfzUCqR.s:5919 .text.HAL_SD_IRQHandler:00000000 HAL_SD_IRQHandler
+ /tmp/ccfzUCqR.s:6297 .text.HAL_SD_IRQHandler:000001bc $d
+ /tmp/ccfzUCqR.s:6304 .text.HAL_SD_Abort:00000000 $t
+ /tmp/ccfzUCqR.s:6310 .text.HAL_SD_Abort:00000000 HAL_SD_Abort
+ /tmp/ccfzUCqR.s:6456 .text.HAL_SD_Abort_IT:00000000 $t
+ /tmp/ccfzUCqR.s:6462 .text.HAL_SD_Abort_IT:00000000 HAL_SD_Abort_IT
+ /tmp/ccfzUCqR.s:6627 .text.HAL_SD_Abort_IT:000000a0 $d
UNDEFINED SYMBOLS
SDMMC_CmdGoIdleState
@@ -12919,7 +12919,7 @@ SDMMC_WriteFIFO
HAL_GetTick
SDMMC_CmdBlockLength
SDMMC_ConfigData
- ARM GAS /tmp/ccqxsRKi.s page 217
+ ARM GAS /tmp/ccfzUCqR.s page 217
SDMMC_CmdStatusRegister
diff --git a/build/stm32f7xx_hal_tim.lst b/build/stm32f7xx_hal_tim.lst
index 3dceda5..a976977 100644
--- a/build/stm32f7xx_hal_tim.lst
+++ b/build/stm32f7xx_hal_tim.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccfdMfFA.s page 1
+ARM GAS /tmp/ccD3sdMs.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * + Commutation Event configuration with Interruption and DMA
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * + TIM OCRef clear configuration
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * + TIM External Clock configuration
- ARM GAS /tmp/ccfdMfFA.s page 2
+ ARM GAS /tmp/ccD3sdMs.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** ******************************************************************************
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (++) HAL_TIM_Base_Init: to use the Timer to generate a simple time base
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (++) HAL_TIM_OC_Init and HAL_TIM_OC_ConfigChannel: to use the Timer to generate an
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Output Compare signal.
- ARM GAS /tmp/ccfdMfFA.s page 3
+ ARM GAS /tmp/ccD3sdMs.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (++) HAL_TIM_PWM_Init and HAL_TIM_PWM_ConfigChannel: to use the Timer to generate a
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) PeriodElapsedCallback : TIM Period Elapsed Callback.
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) PeriodElapsedHalfCpltCallback : TIM Period Elapsed half complete Callback.
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TriggerCallback : TIM Trigger Callback.
- ARM GAS /tmp/ccfdMfFA.s page 4
+ ARM GAS /tmp/ccD3sdMs.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TriggerHalfCpltCallback : TIM Trigger half complete Callback.
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Private typedef -----------------------------------------------------------*/
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Private define ------------------------------------------------------------*/
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Private macros ------------------------------------------------------------*/
- ARM GAS /tmp/ccfdMfFA.s page 5
+ ARM GAS /tmp/ccD3sdMs.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Private variables ---------------------------------------------------------*/
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @{
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
- ARM GAS /tmp/ccfdMfFA.s page 6
+ ARM GAS /tmp/ccD3sdMs.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Initializes the TIM Time base Unit according to the specified
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Initialize the TIM channels state */
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
- ARM GAS /tmp/ccfdMfFA.s page 7
+ ARM GAS /tmp/ccD3sdMs.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim)
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 8
+ ARM GAS /tmp/ccD3sdMs.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim);
- ARM GAS /tmp/ccfdMfFA.s page 9
+ ARM GAS /tmp/ccD3sdMs.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim);
- ARM GAS /tmp/ccfdMfFA.s page 10
+ ARM GAS /tmp/ccD3sdMs.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U))
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 11
+ ARM GAS /tmp/ccD3sdMs.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_INSTANCE(htim->Instance));
- ARM GAS /tmp/ccfdMfFA.s page 12
+ ARM GAS /tmp/ccD3sdMs.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (htim == NULL)
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
- ARM GAS /tmp/ccfdMfFA.s page 13
+ ARM GAS /tmp/ccD3sdMs.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim)
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
- ARM GAS /tmp/ccfdMfFA.s page 14
+ ARM GAS /tmp/ccD3sdMs.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance));
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim)
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 15
+ ARM GAS /tmp/ccD3sdMs.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 16
+ ARM GAS /tmp/ccD3sdMs.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim);
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 17
+ ARM GAS /tmp/ccD3sdMs.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 18
+ ARM GAS /tmp/ccD3sdMs.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the main output */
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 19
+ ARM GAS /tmp/ccD3sdMs.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3:
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_t *p
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint16_t Length)
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 20
+ ARM GAS /tmp/ccD3sdMs.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 21
+ ARM GAS /tmp/ccD3sdMs.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA error callback */
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC4);
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 22
+ ARM GAS /tmp/ccD3sdMs.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel)
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_1:
- ARM GAS /tmp/ccfdMfFA.s page 23
+ ARM GAS /tmp/ccD3sdMs.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 24
+ ARM GAS /tmp/ccD3sdMs.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Lock = HAL_UNLOCKED;
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- ARM GAS /tmp/ccfdMfFA.s page 25
+ ARM GAS /tmp/ccD3sdMs.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset interrupt callbacks to legacy weak callbacks */
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* DeInit the low level hardware */
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_MspDeInitCallback(htim);
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #else
- ARM GAS /tmp/ccfdMfFA.s page 26
+ ARM GAS /tmp/ccD3sdMs.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC and DMA */
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values:
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- ARM GAS /tmp/ccfdMfFA.s page 27
+ ARM GAS /tmp/ccD3sdMs.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected
- ARM GAS /tmp/ccfdMfFA.s page 28
+ ARM GAS /tmp/ccD3sdMs.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4 selected
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TIM channel state */
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 29
+ ARM GAS /tmp/ccD3sdMs.s page 29
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel)
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 30
+ ARM GAS /tmp/ccD3sdMs.s page 30
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim);
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** default:
- ARM GAS /tmp/ccfdMfFA.s page 31
+ ARM GAS /tmp/ccD3sdMs.s page 31
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** status = HAL_ERROR;
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((pData == NULL) || (Length == 0U))
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 32
+ ARM GAS /tmp/ccD3sdMs.s page 32
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 33
+ ARM GAS /tmp/ccD3sdMs.s page 33
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3:
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the main output */
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_MOE_ENABLE(htim);
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 34
+ ARM GAS /tmp/ccD3sdMs.s page 34
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_3:
- ARM GAS /tmp/ccfdMfFA.s page 35
+ ARM GAS /tmp/ccD3sdMs.s page 35
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** This section provides functions allowing to:
1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) Initialize and configure the TIM Input Capture.
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) De-initialize the TIM Input Capture.
- ARM GAS /tmp/ccfdMfFA.s page 36
+ ARM GAS /tmp/ccD3sdMs.s page 36
1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) Start the TIM Input Capture.
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TIM state */
- ARM GAS /tmp/ccfdMfFA.s page 37
+ ARM GAS /tmp/ccD3sdMs.s page 37
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->State = HAL_TIM_STATE_BUSY;
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Release Lock */
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim);
- ARM GAS /tmp/ccfdMfFA.s page 38
+ ARM GAS /tmp/ccD3sdMs.s page 38
2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the TIM channel state */
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((channel_state != HAL_TIM_CHANNEL_STATE_READY)
2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_state != HAL_TIM_CHANNEL_STATE_READY))
- ARM GAS /tmp/ccfdMfFA.s page 39
+ ARM GAS /tmp/ccD3sdMs.s page 39
2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */
2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_OK;
- ARM GAS /tmp/ccfdMfFA.s page 40
+ ARM GAS /tmp/ccD3sdMs.s page 40
2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 41
+ ARM GAS /tmp/ccD3sdMs.s page 41
2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel)
2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 42
+ ARM GAS /tmp/ccD3sdMs.s page 42
2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_1:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values:
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1 selected
2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected
- ARM GAS /tmp/ccfdMfFA.s page 43
+ ARM GAS /tmp/ccD3sdMs.s page 43
2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3 selected
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the DMA stream */
- ARM GAS /tmp/ccfdMfFA.s page 44
+ ARM GAS /tmp/ccD3sdMs.s page 44
2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)p
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA capture callbacks */
2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferCpltCallback = TIM_DMACaptureCplt;
- ARM GAS /tmp/ccfdMfFA.s page 45
+ ARM GAS /tmp/ccD3sdMs.s page 45
2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CCX_CHANNEL(htim->Instance, Channel));
- ARM GAS /tmp/ccfdMfFA.s page 46
+ ARM GAS /tmp/ccD3sdMs.s page 46
2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_CC_INSTANCE(htim->Instance));
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2594:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */
2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 47
+ ARM GAS /tmp/ccD3sdMs.s page 47
2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2651:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OPM_MODE(OnePulseMode));
2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_PERIOD(htim, htim->Init.Period));
2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
- ARM GAS /tmp/ccfdMfFA.s page 48
+ ARM GAS /tmp/ccD3sdMs.s page 48
2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2708:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim)
2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
- ARM GAS /tmp/ccfdMfFA.s page 49
+ ARM GAS /tmp/ccD3sdMs.s page 49
2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_INSTANCE(htim->Instance));
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2765:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM One Pulse handle
2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None
2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
- ARM GAS /tmp/ccfdMfFA.s page 50
+ ARM GAS /tmp/ccD3sdMs.s page 50
2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim)
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2822:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 51
+ ARM GAS /tmp/ccD3sdMs.s page 51
2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2879:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Starts the TIM One Pulse signal generation in interrupt mode.
2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @note Though OutputChannel parameter is deprecated and ignored by the function
2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * it has been kept to avoid HAL_TIM API compatibility break.
- ARM GAS /tmp/ccfdMfFA.s page 52
+ ARM GAS /tmp/ccD3sdMs.s page 52
2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @note The pulse output channel is determined when calling
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */
2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_OK;
- ARM GAS /tmp/ccfdMfFA.s page 53
+ ARM GAS /tmp/ccD3sdMs.s page 53
2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group6 TIM Encoder functions
2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM Encoder functions
2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** *
- ARM GAS /tmp/ccfdMfFA.s page 54
+ ARM GAS /tmp/ccD3sdMs.s page 54
2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** @verbatim
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3050:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC1Polarity));
3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_ENCODERINPUT_POLARITY(sConfig->IC2Polarity));
3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
- ARM GAS /tmp/ccfdMfFA.s page 55
+ ARM GAS /tmp/ccD3sdMs.s page 55
3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_IC_PRESCALER(sConfig->IC2Prescaler));
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= sConfig->IC1Prescaler | (sConfig->IC2Prescaler << 8U);
3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= (sConfig->IC1Filter << 4U) | (sConfig->IC2Filter << 12U);
3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 56
+ ARM GAS /tmp/ccD3sdMs.s page 56
3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the TI1 and the TI2 Polarities */
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_Encoder_MspDeInit(htim);
3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 57
+ ARM GAS /tmp/ccD3sdMs.s page 57
3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Change the DMA burst operation state */
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3221:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected
3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_ALL: TIM Channel 1 and TIM Channel 2 are selected
3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL status
- ARM GAS /tmp/ccfdMfFA.s page 58
+ ARM GAS /tmp/ccD3sdMs.s page 58
3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the encoder interface channels */
- ARM GAS /tmp/ccfdMfFA.s page 59
+ ARM GAS /tmp/ccD3sdMs.s page 59
3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** switch (Channel)
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
- ARM GAS /tmp/ccfdMfFA.s page 60
+ ARM GAS /tmp/ccD3sdMs.s page 60
3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3392:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((channel_1_state != HAL_TIM_CHANNEL_STATE_READY)
3393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY))
3394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 61
+ ARM GAS /tmp/ccD3sdMs.s page 61
3395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3449:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
3450:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
3451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 62
+ ARM GAS /tmp/ccD3sdMs.s page 62
3452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** default :
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
3507:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
3508:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 63
+ ARM GAS /tmp/ccD3sdMs.s page 63
3509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else if ((channel_1_state == HAL_TIM_CHANNEL_STATE_READY)
3564:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** && (complementary_channel_1_state == HAL_TIM_CHANNEL_STATE_READY))
3565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 64
+ ARM GAS /tmp/ccD3sdMs.s page 64
3566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((pData1 == NULL) || (Length == 0U))
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((((pData1 == NULL) || (pData2 == NULL))) || (Length == 0U))
3621:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
- ARM GAS /tmp/ccfdMfFA.s page 65
+ ARM GAS /tmp/ccD3sdMs.s page 65
3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)&htim->Instance->CCR2, (uint32_t)p
3678:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK)
3679:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 66
+ ARM GAS /tmp/ccD3sdMs.s page 66
3680:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return error status */
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_ENABLE);
3735:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3736:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the Peripheral */
- ARM GAS /tmp/ccfdMfFA.s page 67
+ ARM GAS /tmp/ccD3sdMs.s page 67
3737:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_ENABLE(htim);
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3792:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the Peripheral */
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE(htim);
- ARM GAS /tmp/ccfdMfFA.s page 68
+ ARM GAS /tmp/ccD3sdMs.s page 68
3794:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Input capture event */
3849:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U)
3850:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 69
+ ARM GAS /tmp/ccD3sdMs.s page 69
3851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3))
3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3);
- ARM GAS /tmp/ccfdMfFA.s page 70
+ ARM GAS /tmp/ccD3sdMs.s page 70
3908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3;
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* TIM Update event */
3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE))
3964:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 71
+ ARM GAS /tmp/ccD3sdMs.s page 71
3965:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE))
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4019:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM);
4021:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- ARM GAS /tmp/ccfdMfFA.s page 72
+ ARM GAS /tmp/ccD3sdMs.s page 72
4022:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->CommutationCallback(htim);
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_MODE(sConfig->OCMode));
4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
4078:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 73
+ ARM GAS /tmp/ccD3sdMs.s page 73
4079:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Process Locked */
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_6:
4135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 74
+ ARM GAS /tmp/ccD3sdMs.s page 74
4136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
4191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4192:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the IC1PSC value */
- ARM GAS /tmp/ccfdMfFA.s page 75
+ ARM GAS /tmp/ccD3sdMs.s page 75
4193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 |= sConfig->ICPrescaler;
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim);
4249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 76
+ ARM GAS /tmp/ccD3sdMs.s page 76
4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
4306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 77
+ ARM GAS /tmp/ccD3sdMs.s page 77
4307:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Configure the Channel 2 in PWM mode */
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Preload enable bit for channel5*/
4362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR3 |= TIM_CCMR3_OC5PE;
4363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 78
+ ARM GAS /tmp/ccD3sdMs.s page 78
4364:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Configure the Output Fast mode */
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4418:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
4420:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_OC_InitTypeDef temp1;
- ARM GAS /tmp/ccfdMfFA.s page 79
+ ARM GAS /tmp/ccD3sdMs.s page 79
4421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the IC1PSC Bits */
4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
4477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 80
+ ARM GAS /tmp/ccD3sdMs.s page 80
4478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Trigger source */
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4532:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR2
4533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR
4534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_DIER
- ARM GAS /tmp/ccfdMfFA.s page 81
+ ARM GAS /tmp/ccD3sdMs.s page 81
4535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SR
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values:
4590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR1
4591:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_CR2
- ARM GAS /tmp/ccfdMfFA.s page 82
+ ARM GAS /tmp/ccD3sdMs.s page 82
4592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_DMABASE_SMCR
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4646:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_BUSY;
4647:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
4648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** else if (htim->DMABurstState == HAL_DMA_BURST_STATE_READY)
- ARM GAS /tmp/ccfdMfFA.s page 83
+ ARM GAS /tmp/ccD3sdMs.s page 83
4649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA compare callbacks */
4705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
- ARM GAS /tmp/ccfdMfFA.s page 84
+ ARM GAS /tmp/ccD3sdMs.s page 84
4706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
4761:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the DMA error callback */
- ARM GAS /tmp/ccfdMfFA.s page 85
+ ARM GAS /tmp/ccD3sdMs.s page 85
4763:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError ;
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
4818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4819:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
- ARM GAS /tmp/ccfdMfFA.s page 86
+ ARM GAS /tmp/ccD3sdMs.s page 86
4820:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4874:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return function status */
4875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
4876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 87
+ ARM GAS /tmp/ccD3sdMs.s page 87
4877:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4931:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4932:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
4933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 88
+ ARM GAS /tmp/ccD3sdMs.s page 88
4934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4988:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMABURST_INSTANCE(htim->Instance));
4989:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_BASE(BurstBaseAddress));
4990:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_SOURCE(BurstRequestSrc));
- ARM GAS /tmp/ccfdMfFA.s page 89
+ ARM GAS /tmp/ccD3sdMs.s page 89
4991:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_LENGTH(BurstLength));
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
5046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Return error status */
5047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return HAL_ERROR;
- ARM GAS /tmp/ccfdMfFA.s page 90
+ ARM GAS /tmp/ccD3sdMs.s page 90
5048:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5102:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
5103:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
5104:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 91
+ ARM GAS /tmp/ccD3sdMs.s page 91
5105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_DMA_COM:
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
5160:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Stop the DMA burst reading
5161:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle
- ARM GAS /tmp/ccfdMfFA.s page 92
+ ARM GAS /tmp/ccD3sdMs.s page 92
5162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param BurstRequestSrc TIM DMA Request sources to disable.
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
5217:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the TIM Update DMA request */
5218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_TIM_DISABLE_DMA(htim, BurstRequestSrc);
- ARM GAS /tmp/ccfdMfFA.s page 93
+ ARM GAS /tmp/ccD3sdMs.s page 93
5219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
5274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configures the OCRef clear feature
5275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle
- ARM GAS /tmp/ccfdMfFA.s page 94
+ ARM GAS /tmp/ccD3sdMs.s page 94
5276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param sClearInputConfig pointer to a TIM_ClearInputConfigTypeDef structure that
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5330:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClearInputConfig->ClearInputFilter);
5331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
5332:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 95
+ ARM GAS /tmp/ccD3sdMs.s page 95
5333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5387:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (sClearInputConfig->ClearInputState != (uint32_t)DISABLE)
5388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
5389:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Enable the OCREF clear feature for Channel 4 */
- ARM GAS /tmp/ccfdMfFA.s page 96
+ ARM GAS /tmp/ccD3sdMs.s page 96
5390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** SET_BIT(htim->Instance->CCMR2, TIM_CCMR2_OC4CE);
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL status
5445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
5446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *
- ARM GAS /tmp/ccfdMfFA.s page 97
+ ARM GAS /tmp/ccD3sdMs.s page 97
5447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check ETR input conditioning related parameters */
5503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
- ARM GAS /tmp/ccfdMfFA.s page 98
+ ARM GAS /tmp/ccD3sdMs.s page 98
5504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_TI1_ConfigInputStage(htim->Instance,
5559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockPolarity,
5560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockFilter);
- ARM GAS /tmp/ccfdMfFA.s page 99
+ ARM GAS /tmp/ccD3sdMs.s page 99
5561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 |= TI1_Selection;
5616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMxCR2 */
- ARM GAS /tmp/ccfdMfFA.s page 100
+ ARM GAS /tmp/ccD3sdMs.s page 100
5618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CR2 = tmpcr2;
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchro_IT(TIM_HandleTypeDef *htim,
5673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** const TIM_SlaveConfigTypeDef *sSlaveConfig)
5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 101
+ ARM GAS /tmp/ccD3sdMs.s page 101
5675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
5730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
5731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_CHANNEL_2:
- ARM GAS /tmp/ccfdMfFA.s page 102
+ ARM GAS /tmp/ccD3sdMs.s page 102
5732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5786:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Input capture callback
5787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Trigger callback
5788:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (+) TIM Error callback
- ARM GAS /tmp/ccfdMfFA.s page 103
+ ARM GAS /tmp/ccD3sdMs.s page 103
5789:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5843:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
5844:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim)
5845:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 104
+ ARM GAS /tmp/ccD3sdMs.s page 104
5846:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Hall Trigger detection callback in non-blocking mode
5901:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle
5902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None
- ARM GAS /tmp/ccfdMfFA.s page 105
+ ARM GAS /tmp/ccD3sdMs.s page 105
5903:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5957:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_PWM_MSPDEINIT_CB_ID PWM MspDeInit Callback ID
5958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPINIT_CB_ID One Pulse MspInit Callback ID
5959:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ONE_PULSE_MSPDEINIT_CB_ID One Pulse MspDeInit Callback ID
- ARM GAS /tmp/ccfdMfFA.s page 106
+ ARM GAS /tmp/ccD3sdMs.s page 106
5960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg @ref HAL_TIM_ENCODER_MSPINIT_CB_ID Encoder MspInit Callback ID
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_OC_MSPDEINIT_CB_ID :
6016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->OC_MspDeInitCallback = pCallback;
- ARM GAS /tmp/ccfdMfFA.s page 107
+ ARM GAS /tmp/ccD3sdMs.s page 107
6017:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6071:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_CAPTURE_HALF_CB_ID :
6072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_CaptureHalfCpltCallback = pCallback;
6073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
- ARM GAS /tmp/ccfdMfFA.s page 108
+ ARM GAS /tmp/ccD3sdMs.s page 108
6074:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_MSPDEINIT_CB_ID :
6130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_MspDeInitCallback = pCallback;
- ARM GAS /tmp/ccfdMfFA.s page 109
+ ARM GAS /tmp/ccD3sdMs.s page 109
6131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6185:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** return status;
6186:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
6187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 110
+ ARM GAS /tmp/ccD3sdMs.s page 110
6188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_IC_MSPINIT_CB_ID :
6243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak IC Msp Init Callback */
6244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->IC_MspInitCallback = HAL_TIM_IC_MspInit;
- ARM GAS /tmp/ccfdMfFA.s page 111
+ ARM GAS /tmp/ccD3sdMs.s page 111
6245:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
6300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
6301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 112
+ ARM GAS /tmp/ccD3sdMs.s page 112
6302:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_PERIOD_ELAPSED_CB_ID :
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case HAL_TIM_COMMUTATION_HALF_CB_ID :
6358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak Commutation half complete Callback */
- ARM GAS /tmp/ccfdMfFA.s page 113
+ ARM GAS /tmp/ccD3sdMs.s page 113
6359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->CommutationHalfCpltCallback = HAL_TIMEx_CommutHalfCpltCallback;
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6413:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Legacy weak PWM Msp Init Callback */
6414:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_MspInitCallback = HAL_TIM_PWM_MspInit;
6415:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
- ARM GAS /tmp/ccfdMfFA.s page 114
+ ARM GAS /tmp/ccD3sdMs.s page 114
6416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
6471:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6472:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /** @defgroup TIM_Exported_Functions_Group10 TIM Peripheral State functions
- ARM GAS /tmp/ccfdMfFA.s page 115
+ ARM GAS /tmp/ccD3sdMs.s page 115
6473:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM Peripheral State functions
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6527:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
6528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Return the TIM One Pulse Mode handle state.
6529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM OPM handle
- ARM GAS /tmp/ccfdMfFA.s page 116
+ ARM GAS /tmp/ccD3sdMs.s page 116
6530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval HAL state
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param htim TIM handle
6585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval DMA burst state
6586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
- ARM GAS /tmp/ccfdMfFA.s page 117
+ ARM GAS /tmp/ccD3sdMs.s page 117
6587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_DMABurstStateTypeDef HAL_TIM_DMABurstState(const TIM_HandleTypeDef *htim)
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
6642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->ErrorCallback(htim);
6643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #else
- ARM GAS /tmp/ccfdMfFA.s page 118
+ ARM GAS /tmp/ccD3sdMs.s page 118
6644:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ErrorCallback(htim);
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
6699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
- ARM GAS /tmp/ccfdMfFA.s page 119
+ ARM GAS /tmp/ccD3sdMs.s page 119
6701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->PWM_PulseFinishedCallback(htim);
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
6756:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6757:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (hdma == htim->hdma[TIM_DMA_ID_CC1])
- ARM GAS /tmp/ccfdMfFA.s page 120
+ ARM GAS /tmp/ccD3sdMs.s page 120
6758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6812:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM DMA Capture half complete callback.
6813:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param hdma pointer to DMA handle.
6814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None
- ARM GAS /tmp/ccfdMfFA.s page 121
+ ARM GAS /tmp/ccD3sdMs.s page 121
6815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
6870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6871:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
- ARM GAS /tmp/ccfdMfFA.s page 122
+ ARM GAS /tmp/ccD3sdMs.s page 122
6872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief TIM DMA Period Elapse half complete callback.
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIMx TIM peripheral
6927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param Structure TIM Base configuration structure
6928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None
- ARM GAS /tmp/ccfdMfFA.s page 123
+ ARM GAS /tmp/ccD3sdMs.s page 123
6929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @retval None
6984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** */
6985:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
- ARM GAS /tmp/ccfdMfFA.s page 124
+ ARM GAS /tmp/ccD3sdMs.s page 124
6986:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
62 .loc 1 7005 3 view .LVU15
63 .loc 1 7005 12 is_stmt 0 view .LVU16
64 0010 124B ldr r3, .L5
- ARM GAS /tmp/ccfdMfFA.s page 125
+ ARM GAS /tmp/ccD3sdMs.s page 125
65 0012 2B40 ands r3, r3, r5
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
102 0036 CE68 ldr r6, [r1, #12]
103 .loc 1 7022 13 view .LVU33
104 0038 1E43 orrs r6, r6, r3
- ARM GAS /tmp/ccfdMfFA.s page 126
+ ARM GAS /tmp/ccD3sdMs.s page 126
105 .LVL9:
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7045:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMx CCMR1 */
7046:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx;
- ARM GAS /tmp/ccfdMfFA.s page 127
+ ARM GAS /tmp/ccD3sdMs.s page 127
138 .loc 1 7046 3 is_stmt 1 view .LVU51
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7063:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccmrx;
7064:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccer;
7065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpcr2;
- ARM GAS /tmp/ccfdMfFA.s page 128
+ ARM GAS /tmp/ccD3sdMs.s page 128
7066:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Write to TIMx CCMR1 */
7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIMx->CCMR1 = tmpccmrx;
- ARM GAS /tmp/ccfdMfFA.s page 129
+ ARM GAS /tmp/ccD3sdMs.s page 129
7123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
204 .loc 1 7150 10 is_stmt 0 view .LVU71
205 000c 4268 ldr r2, [r0, #4]
206 .LVL19:
- ARM GAS /tmp/ccfdMfFA.s page 130
+ ARM GAS /tmp/ccD3sdMs.s page 130
7151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
7168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
245 .loc 1 7168 5 is_stmt 1 view .LVU88
- ARM GAS /tmp/ccfdMfFA.s page 131
+ ARM GAS /tmp/ccD3sdMs.s page 131
7169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
278 .loc 1 7190 5 is_stmt 1 view .LVU106
279 .loc 1 7190 25 is_stmt 0 view .LVU107
280 004e 8C69 ldr r4, [r1, #24]
- ARM GAS /tmp/ccfdMfFA.s page 132
+ ARM GAS /tmp/ccD3sdMs.s page 132
281 .loc 1 7190 12 view .LVU108
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
322 .thumb
323 .thumb_func
325 TIM_OC4_SetConfig:
- ARM GAS /tmp/ccfdMfFA.s page 133
+ ARM GAS /tmp/ccD3sdMs.s page 133
326 .LVL34:
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmrx = TIMx->CCMR2;
357 .loc 1 7228 3 is_stmt 1 view .LVU132
358 .loc 1 7228 12 is_stmt 0 view .LVU133
- ARM GAS /tmp/ccfdMfFA.s page 134
+ ARM GAS /tmp/ccD3sdMs.s page 134
359 000e C569 ldr r5, [r0, #28]
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
393 .loc 1 7248 12 is_stmt 0 view .LVU149
394 0030 24F48044 bic r4, r4, #16384
395 .LVL42:
- ARM GAS /tmp/ccfdMfFA.s page 135
+ ARM GAS /tmp/ccD3sdMs.s page 135
7249:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
433 004c 00000140 .word 1073807360
434 0050 00040140 .word 1073808384
435 .cfi_endproc
- ARM GAS /tmp/ccfdMfFA.s page 136
+ ARM GAS /tmp/ccD3sdMs.s page 136
436 .LFE249:
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Get the TIMx CR2 register value */
7287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 = TIMx->CR2;
472 .loc 1 7287 3 is_stmt 1 view .LVU174
- ARM GAS /tmp/ccfdMfFA.s page 137
+ ARM GAS /tmp/ccD3sdMs.s page 137
473 .loc 1 7287 10 is_stmt 0 view .LVU175
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
510 .loc 1 7304 12 is_stmt 0 view .LVU191
511 002e 24F48034 bic r4, r4, #65536
512 .LVL55:
- ARM GAS /tmp/ccfdMfFA.s page 138
+ ARM GAS /tmp/ccD3sdMs.s page 138
7305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Output Idle state */
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
552 .cfi_endproc
553 .LFE250:
555 .section .text.TIM_OC6_SetConfig,"ax",%progbits
- ARM GAS /tmp/ccfdMfFA.s page 139
+ ARM GAS /tmp/ccD3sdMs.s page 139
556 .align 1
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
589 .loc 1 7341 3 is_stmt 1 view .LVU216
590 .loc 1 7341 10 is_stmt 0 view .LVU217
591 000c 4468 ldr r4, [r0, #4]
- ARM GAS /tmp/ccfdMfFA.s page 140
+ ARM GAS /tmp/ccD3sdMs.s page 140
592 .LVL62:
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
629 .LVL68:
7359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the Output Idle state */
7360:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpcr2 |= (OC_Config->OCIdleState << 10U);
- ARM GAS /tmp/ccfdMfFA.s page 141
+ ARM GAS /tmp/ccD3sdMs.s page 141
630 .loc 1 7360 5 is_stmt 1 view .LVU234
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
670 .LFE251:
672 .section .text.TIM_TI1_ConfigInputStage,"ax",%progbits
673 .align 1
- ARM GAS /tmp/ccfdMfFA.s page 142
+ ARM GAS /tmp/ccD3sdMs.s page 142
674 .syntax unified
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_TI1F_ED:
7425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 143
+ ARM GAS /tmp/ccD3sdMs.s page 143
7426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_ITR2:
7481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** case TIM_TS_ITR3:
7482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 144
+ ARM GAS /tmp/ccD3sdMs.s page 144
7483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameter */
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the filter */
7539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_IC1F;
- ARM GAS /tmp/ccfdMfFA.s page 145
+ ARM GAS /tmp/ccD3sdMs.s page 145
7540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 |= ((TIM_ICFilter << 4U) & TIM_CCMR1_IC1F);
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
703 .loc 1 7571 3 is_stmt 1 view .LVU257
704 .loc 1 7571 12 is_stmt 0 view .LVU258
705 000c 8469 ldr r4, [r0, #24]
- ARM GAS /tmp/ccfdMfFA.s page 146
+ ARM GAS /tmp/ccD3sdMs.s page 146
706 .LVL75:
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7587:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configure the TI2 as Input.
7588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIMx to select the TIM peripheral
7589:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @param TIM_ICPolarity The Input Polarity.
- ARM GAS /tmp/ccfdMfFA.s page 147
+ ARM GAS /tmp/ccD3sdMs.s page 147
7590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * This parameter can be one of the following values:
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Input */
7618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 &= ~TIM_CCMR1_CC2S;
774 .loc 1 7618 3 is_stmt 1 view .LVU283
- ARM GAS /tmp/ccfdMfFA.s page 148
+ ARM GAS /tmp/ccD3sdMs.s page 148
775 .loc 1 7618 12 is_stmt 0 view .LVU284
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
815 0032 30BC pop {r4, r5}
816 .LCFI13:
817 .cfi_restore 5
- ARM GAS /tmp/ccfdMfFA.s page 149
+ ARM GAS /tmp/ccD3sdMs.s page 149
818 .cfi_restore 4
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
853 0006 24F01004 bic r4, r4, #16
854 000a 0462 str r4, [r0, #32]
7654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmr1 = TIMx->CCMR1;
- ARM GAS /tmp/ccfdMfFA.s page 150
+ ARM GAS /tmp/ccD3sdMs.s page 150
855 .loc 1 7654 3 is_stmt 1 view .LVU313
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
898 .LFB257:
7668:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
- ARM GAS /tmp/ccfdMfFA.s page 151
+ ARM GAS /tmp/ccD3sdMs.s page 151
7670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @brief Configure the TI3 as Input.
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
924 000c C469 ldr r4, [r0, #28]
925 .LVL100:
7699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 152
+ ARM GAS /tmp/ccD3sdMs.s page 152
7700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Select the Input */
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
965 0030 0162 str r1, [r0, #32]
7715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
966 .loc 1 7715 1 view .LVU359
- ARM GAS /tmp/ccfdMfFA.s page 153
+ ARM GAS /tmp/ccD3sdMs.s page 153
967 0032 30BC pop {r4, r5}
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
997 .loc 1 7741 3 view .LVU363
7742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Disable the Channel 4: Reset the CC4E Bit */
- ARM GAS /tmp/ccfdMfFA.s page 154
+ ARM GAS /tmp/ccD3sdMs.s page 154
7744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer = TIMx->CCER;
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1037 .loc 1 7758 3 is_stmt 1 view .LVU383
1038 .loc 1 7758 31 is_stmt 0 view .LVU384
1039 0026 0903 lsls r1, r1, #12
- ARM GAS /tmp/ccfdMfFA.s page 155
+ ARM GAS /tmp/ccD3sdMs.s page 155
1040 .LVL118:
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1073 @ args = 0, pretend = 0, frame = 0
1074 @ frame_needed = 0, uses_anonymous_args = 0
1075 @ link register save eliminated.
- ARM GAS /tmp/ccfdMfFA.s page 156
+ ARM GAS /tmp/ccD3sdMs.s page 156
7782:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr;
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1118 .cfi_endproc
1119 .LFE143:
1121 .section .text.HAL_TIM_Base_MspDeInit,"ax",%progbits
- ARM GAS /tmp/ccfdMfFA.s page 157
+ ARM GAS /tmp/ccD3sdMs.s page 157
1122 .align 1
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1169 .loc 1 337 3 view .LVU416
1170 000a 0368 ldr r3, [r0]
1171 000c 196A ldr r1, [r3, #32]
- ARM GAS /tmp/ccfdMfFA.s page 158
+ ARM GAS /tmp/ccD3sdMs.s page 158
1172 000e 41F21112 movw r2, #4369
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1210 .loc 1 356 3 view .LVU432
356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1211 .loc 1 356 3 view .LVU433
- ARM GAS /tmp/ccfdMfFA.s page 159
+ ARM GAS /tmp/ccD3sdMs.s page 159
1212 004c 84F84400 strb r0, [r4, #68]
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
1252 .loc 1 411 11 is_stmt 0 view .LVU450
1253 0000 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2
- ARM GAS /tmp/ccfdMfFA.s page 160
+ ARM GAS /tmp/ccD3sdMs.s page 160
1254 0004 DBB2 uxtb r3, r3
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1295 .loc 1 430 5 is_stmt 1 view .LVU463
1296 004e 1A68 ldr r2, [r3]
1297 0050 42F00102 orr r2, r2, #1
- ARM GAS /tmp/ccfdMfFA.s page 161
+ ARM GAS /tmp/ccD3sdMs.s page 161
1298 0054 1A60 str r2, [r3]
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
1339 .loc 1 434 10 view .LVU477
1340 007a 0020 movs r0, #0
- ARM GAS /tmp/ccfdMfFA.s page 162
+ ARM GAS /tmp/ccD3sdMs.s page 162
1341 .LVL139:
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1387 .loc 1 451 15 is_stmt 0 view .LVU487
1388 001e 0123 movs r3, #1
1389 0020 80F83D30 strb r3, [r0, #61]
- ARM GAS /tmp/ccfdMfFA.s page 163
+ ARM GAS /tmp/ccD3sdMs.s page 163
454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
1433 .loc 1 482 7 is_stmt 0 view .LVU501
1434 001a 0368 ldr r3, [r0]
- ARM GAS /tmp/ccfdMfFA.s page 164
+ ARM GAS /tmp/ccD3sdMs.s page 164
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1477 .loc 1 484 29 is_stmt 0 view .LVU513
1478 0064 9968 ldr r1, [r3, #8]
484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
- ARM GAS /tmp/ccfdMfFA.s page 165
+ ARM GAS /tmp/ccD3sdMs.s page 165
1479 .loc 1 484 13 view .LVU514
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1524 .global HAL_TIM_Base_Stop_IT
1525 .syntax unified
1526 .thumb
- ARM GAS /tmp/ccfdMfFA.s page 166
+ ARM GAS /tmp/ccD3sdMs.s page 166
1527 .thumb_func
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1569 .loc 1 520 1 view .LVU537
1570 0030 7047 bx lr
1571 .cfi_endproc
- ARM GAS /tmp/ccfdMfFA.s page 167
+ ARM GAS /tmp/ccD3sdMs.s page 167
1572 .LFE148:
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1616 001a 18BF it ne
1617 001c 0029 cmpne r1, #0
1618 001e 4ED0 beq .L65
- ARM GAS /tmp/ccfdMfFA.s page 168
+ ARM GAS /tmp/ccD3sdMs.s page 168
549:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1656 0048 0028 cmp r0, #0
1657 004a 38D1 bne .L65
573:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 169
+ ARM GAS /tmp/ccD3sdMs.s page 169
1658 .loc 1 573 3 is_stmt 1 view .LVU567
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1701 009c 0446 mov r4, r0
1702 009e 0EE0 b .L65
1703 .L66:
- ARM GAS /tmp/ccfdMfFA.s page 170
+ ARM GAS /tmp/ccD3sdMs.s page 170
578:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1747 00d8 07000100 .word 65543
1748 .cfi_endproc
1749 .LFE149:
- ARM GAS /tmp/ccfdMfFA.s page 171
+ ARM GAS /tmp/ccD3sdMs.s page 171
1751 .section .text.HAL_TIM_Base_Stop_DMA,"ax",%progbits
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1796 0028 03D1 bne .L74
609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1797 .loc 1 609 3 discriminator 3 view .LVU600
- ARM GAS /tmp/ccfdMfFA.s page 172
+ ARM GAS /tmp/ccD3sdMs.s page 172
1798 002a 1A68 ldr r2, [r3]
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1846 .loc 1 772 1 is_stmt 1 view -0
1847 .cfi_startproc
1848 @ args = 0, pretend = 0, frame = 0
- ARM GAS /tmp/ccfdMfFA.s page 173
+ ARM GAS /tmp/ccD3sdMs.s page 173
1849 @ frame_needed = 0, uses_anonymous_args = 0
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
721:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1895 .loc 1 721 3 discriminator 3 view .LVU621
1896 0020 1A68 ldr r2, [r3]
- ARM GAS /tmp/ccfdMfFA.s page 174
+ ARM GAS /tmp/ccD3sdMs.s page 174
1897 0022 22F00102 bic r2, r2, #1
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1933 0058 84F84700 strb r0, [r4, #71]
740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
1934 .loc 1 740 3 view .LVU640
- ARM GAS /tmp/ccfdMfFA.s page 175
+ ARM GAS /tmp/ccD3sdMs.s page 175
743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1981 .cfi_startproc
1982 @ args = 0, pretend = 0, frame = 0
1983 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccfdMfFA.s page 176
+ ARM GAS /tmp/ccD3sdMs.s page 176
1984 @ link register save eliminated.
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2029 .loc 1 1390 3 discriminator 3 view .LVU663
2030 0020 1A68 ldr r2, [r3]
2031 0022 22F00102 bic r2, r2, #1
- ARM GAS /tmp/ccfdMfFA.s page 177
+ ARM GAS /tmp/ccD3sdMs.s page 177
2032 0026 1A60 str r2, [r3]
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2068 .loc 1 1409 3 view .LVU682
1412:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 178
+ ARM GAS /tmp/ccD3sdMs.s page 178
2069 .loc 1 1412 3 view .LVU683
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2116 @ args = 0, pretend = 0, frame = 0
2117 @ frame_needed = 0, uses_anonymous_args = 0
2118 @ link register save eliminated.
- ARM GAS /tmp/ccfdMfFA.s page 179
+ ARM GAS /tmp/ccD3sdMs.s page 179
2111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2164 0020 1A68 ldr r2, [r3]
2165 0022 22F00102 bic r2, r2, #1
2166 0026 1A60 str r2, [r3]
- ARM GAS /tmp/ccfdMfFA.s page 180
+ ARM GAS /tmp/ccD3sdMs.s page 180
2167 .L89:
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2202 .loc 1 2077 3 view .LVU724
2080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2203 .loc 1 2080 3 view .LVU725
- ARM GAS /tmp/ccfdMfFA.s page 181
+ ARM GAS /tmp/ccD3sdMs.s page 181
2080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2251 @ frame_needed = 0, uses_anonymous_args = 0
2252 @ link register save eliminated.
2771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 182
+ ARM GAS /tmp/ccD3sdMs.s page 182
2253 .loc 1 2771 3 view .LVU737
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2299 0022 22F00102 bic r2, r2, #1
2300 0026 1A60 str r2, [r3]
2301 .L94:
- ARM GAS /tmp/ccfdMfFA.s page 183
+ ARM GAS /tmp/ccD3sdMs.s page 183
2716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2340 .thumb_func
2342 HAL_TIM_Encoder_MspInit:
2343 .LVL186:
- ARM GAS /tmp/ccfdMfFA.s page 184
+ ARM GAS /tmp/ccD3sdMs.s page 184
2344 .LFB191:
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2394 .cfi_def_cfa_offset 8
2395 .cfi_offset 4, -8
2396 .cfi_offset 14, -4
- ARM GAS /tmp/ccfdMfFA.s page 185
+ ARM GAS /tmp/ccD3sdMs.s page 185
2397 0002 0446 mov r4, r0
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2436 003c 84F84400 strb r0, [r4, #68]
3174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2437 .loc 1 3174 3 view .LVU788
- ARM GAS /tmp/ccfdMfFA.s page 186
+ ARM GAS /tmp/ccD3sdMs.s page 186
2438 0040 84F84500 strb r0, [r4, #69]
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2480 .loc 1 4640 3 view .LVU802
4641:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_DMA_DATA_LENGTH(DataLength));
2481 .loc 1 4641 3 view .LVU803
- ARM GAS /tmp/ccfdMfFA.s page 187
+ ARM GAS /tmp/ccD3sdMs.s page 187
4642:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2522 .loc 1 4670 7 is_stmt 1 view .LVU817
4670:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2523 .loc 1 4670 17 is_stmt 0 view .LVU818
- ARM GAS /tmp/ccfdMfFA.s page 188
+ ARM GAS /tmp/ccD3sdMs.s page 188
2524 003e 236A ldr r3, [r4, #32]
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2565 .loc 1 4807 1 is_stmt 0 view .LVU832
2566 006e 70BD pop {r4, r5, r6, pc}
- ARM GAS /tmp/ccfdMfFA.s page 189
+ ARM GAS /tmp/ccD3sdMs.s page 189
2567 .LVL200:
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2608 00a8 3D4A ldr r2, .L125+16
2609 00aa 1A64 str r2, [r3, #64]
4745:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 190
+ ARM GAS /tmp/ccD3sdMs.s page 190
2610 .loc 1 4745 7 is_stmt 1 view .LVU846
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2649 .loc 1 4691 7 is_stmt 1 view .LVU861
4691:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2650 .loc 1 4691 17 is_stmt 0 view .LVU862
- ARM GAS /tmp/ccfdMfFA.s page 191
+ ARM GAS /tmp/ccD3sdMs.s page 191
2651 00d6 636A ldr r3, [r4, #36]
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (uint32_t)&htim->Instance->DMAR, DataLength) != HAL_OK)
2690 .loc 1 4712 7 is_stmt 1 view .LVU878
4713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 192
+ ARM GAS /tmp/ccD3sdMs.s page 192
2691 .loc 1 4713 43 is_stmt 0 view .LVU879
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2730 012c 4C32 adds r2, r2, #76
2731 012e E06A ldr r0, [r4, #44]
2732 0130 FFF7FEFF bl HAL_DMA_Start_IT
- ARM GAS /tmp/ccfdMfFA.s page 193
+ ARM GAS /tmp/ccD3sdMs.s page 193
2733 .LVL208:
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
2772 .loc 1 4770 16 view .LVU910
2773 0160 0120 movs r0, #1
- ARM GAS /tmp/ccfdMfFA.s page 194
+ ARM GAS /tmp/ccD3sdMs.s page 194
2774 0162 84E7 b .L102
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2813 018e 6EE7 b .L102
2814 .L126:
2815 .align 2
- ARM GAS /tmp/ccfdMfFA.s page 195
+ ARM GAS /tmp/ccD3sdMs.s page 195
2816 .L125:
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4583:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
2865 .loc 1 4583 1 is_stmt 0 view .LVU933
2866 0012 03B0 add sp, sp, #12
- ARM GAS /tmp/ccfdMfFA.s page 196
+ ARM GAS /tmp/ccD3sdMs.s page 196
2867 .LCFI31:
@@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2915 .LVL217:
4827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
2916 .loc 1 4827 13 view .LVU942
- ARM GAS /tmp/ccfdMfFA.s page 197
+ ARM GAS /tmp/ccD3sdMs.s page 197
2917 0022 FFF7FEFF bl HAL_DMA_Abort_IT
@@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2958 0052 FFF7FEFF bl HAL_DMA_Abort_IT
2959 .LVL224:
4848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 198
+ ARM GAS /tmp/ccD3sdMs.s page 198
2960 .loc 1 4848 7 is_stmt 1 view .LVU956
@@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2999 .LVL234:
4842:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
3000 .loc 1 4842 13 view .LVU972
- ARM GAS /tmp/ccfdMfFA.s page 199
+ ARM GAS /tmp/ccD3sdMs.s page 199
3001 006e FFF7FEFF bl HAL_DMA_Abort_IT
@@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3044 .cfi_startproc
3045 @ args = 8, pretend = 0, frame = 0
3046 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccfdMfFA.s page 200
+ ARM GAS /tmp/ccD3sdMs.s page 200
4984:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
@@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
3086 .loc 1 5013 3 view .LVU1001
3087 001e B5F5006F cmp r5, #2048
- ARM GAS /tmp/ccfdMfFA.s page 201
+ ARM GAS /tmp/ccD3sdMs.s page 201
3088 0022 78D0 beq .L146
@@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3128 .loc 1 5149 5 is_stmt 1 view .LVU1015
5149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3129 .loc 1 5149 9 is_stmt 0 view .LVU1016
- ARM GAS /tmp/ccfdMfFA.s page 202
+ ARM GAS /tmp/ccD3sdMs.s page 202
3130 005c 2368 ldr r3, [r4]
@@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3173 0092 53D0 beq .L151
3174 0094 B5F5804F cmp r5, #16384
3175 0098 64D0 beq .L152
- ARM GAS /tmp/ccfdMfFA.s page 203
+ ARM GAS /tmp/ccD3sdMs.s page 203
3176 009a B5F5805F cmp r5, #4096
@@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3215 00c8 D1E7 b .L144
3216 .L148:
5036:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
- ARM GAS /tmp/ccfdMfFA.s page 204
+ ARM GAS /tmp/ccD3sdMs.s page 204
3217 .loc 1 5036 7 is_stmt 1 view .LVU1043
@@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3255 .loc 1 5054 52 view .LVU1059
3256 00f2 2A49 ldr r1, .L167+12
3257 00f4 D963 str r1, [r3, #60]
- ARM GAS /tmp/ccfdMfFA.s page 205
+ ARM GAS /tmp/ccD3sdMs.s page 205
5055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5073:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3296 .loc 1 5073 56 view .LVU1076
3297 011e 2049 ldr r1, .L167+16
- ARM GAS /tmp/ccfdMfFA.s page 206
+ ARM GAS /tmp/ccD3sdMs.s page 206
3298 0120 1964 str r1, [r3, #64]
@@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3336 0148 636B ldr r3, [r4, #52]
5112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3337 .loc 1 5112 61 view .LVU1093
- ARM GAS /tmp/ccfdMfFA.s page 207
+ ARM GAS /tmp/ccD3sdMs.s page 207
3338 014a 1349 ldr r1, .L167+8
@@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3376 .loc 1 5133 75 is_stmt 0 view .LVU1109
3377 0176 2168 ldr r1, [r4]
5133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** DataLength) != HAL_OK)
- ARM GAS /tmp/ccfdMfFA.s page 208
+ ARM GAS /tmp/ccD3sdMs.s page 208
3378 .loc 1 5133 11 view .LVU1110
@@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3429 .cfi_offset 14, -4
3430 0002 83B0 sub sp, sp, #12
3431 .LCFI35:
- ARM GAS /tmp/ccfdMfFA.s page 209
+ ARM GAS /tmp/ccD3sdMs.s page 209
3432 .cfi_def_cfa_offset 24
@@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3479 .loc 1 5167 3 is_stmt 1 view .LVU1125
3480 .LVL267:
- ARM GAS /tmp/ccfdMfFA.s page 210
+ ARM GAS /tmp/ccD3sdMs.s page 210
5170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
3522 .loc 1 5173 3 view .LVU1139
3523 003c FCE7 b .L177
- ARM GAS /tmp/ccfdMfFA.s page 211
+ ARM GAS /tmp/ccD3sdMs.s page 211
3524 .LVL273:
@@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3564 .loc 1 5187 7 view .LVU1153
5187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
3565 .loc 1 5187 13 is_stmt 0 view .LVU1154
- ARM GAS /tmp/ccfdMfFA.s page 212
+ ARM GAS /tmp/ccD3sdMs.s page 212
3566 0064 806A ldr r0, [r0, #40]
@@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3604 .loc 1 5207 13 view .LVU1170
3605 007e FFF7FEFF bl HAL_DMA_Abort_IT
3606 .LVL292:
- ARM GAS /tmp/ccfdMfFA.s page 213
+ ARM GAS /tmp/ccD3sdMs.s page 213
5208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3648 .loc 1 5265 3 is_stmt 1 view .LVU1185
5265:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3649 .loc 1 5265 15 is_stmt 0 view .LVU1186
- ARM GAS /tmp/ccfdMfFA.s page 214
+ ARM GAS /tmp/ccD3sdMs.s page 214
3650 0018 80F83D30 strb r3, [r0, #61]
@@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3692 0000 0268 ldr r2, [r0]
5609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
3693 .loc 1 5609 10 view .LVU1201
- ARM GAS /tmp/ccfdMfFA.s page 215
+ ARM GAS /tmp/ccD3sdMs.s page 215
3694 0002 5368 ldr r3, [r2, #4]
@@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3738 0009 13 .byte (.L196-.L192)/2
3739 000a 13 .byte (.L196-.L192)/2
3740 000b 13 .byte (.L196-.L192)/2
- ARM GAS /tmp/ccfdMfFA.s page 216
+ ARM GAS /tmp/ccD3sdMs.s page 216
3741 000c 0A .byte (.L194-.L192)/2
@@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5750:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
3781 .loc 1 5750 7 is_stmt 1 view .LVU1228
3782 0026 7047 bx lr
- ARM GAS /tmp/ccfdMfFA.s page 217
+ ARM GAS /tmp/ccD3sdMs.s page 217
3783 .LVL308:
@@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3829 .thumb
3830 .thumb_func
3832 TIM_DMAPeriodElapsedCplt:
- ARM GAS /tmp/ccfdMfFA.s page 218
+ ARM GAS /tmp/ccD3sdMs.s page 218
3833 .LVL313:
@@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3877 .LVL316:
3878 .LFB218:
5815:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
- ARM GAS /tmp/ccfdMfFA.s page 219
+ ARM GAS /tmp/ccD3sdMs.s page 219
3879 .loc 1 5815 1 is_stmt 1 view -0
@@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3929 HAL_TIM_OC_DelayElapsedCallback:
3930 .LVL321:
3931 .LFB219:
- ARM GAS /tmp/ccfdMfFA.s page 220
+ ARM GAS /tmp/ccD3sdMs.s page 220
5830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
@@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3982 .cfi_offset 4, -8
3983 .cfi_offset 14, -4
6755:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 221
+ ARM GAS /tmp/ccD3sdMs.s page 221
3984 .loc 1 6755 3 is_stmt 1 view .LVU1269
@@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
4021 .loc 1 6808 17 is_stmt 0 view .LVU1287
4022 0022 0023 movs r3, #0
- ARM GAS /tmp/ccfdMfFA.s page 222
+ ARM GAS /tmp/ccD3sdMs.s page 222
4023 0024 2377 strb r3, [r4, #28]
@@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4062 .loc 1 6779 5 view .LVU1303
6779:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 223
+ ARM GAS /tmp/ccD3sdMs.s page 223
4063 .loc 1 6779 19 is_stmt 0 view .LVU1304
@@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4107 .LFB221:
5860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Prevent unused argument(s) compilation warning */
4108 .loc 1 5860 1 view -0
- ARM GAS /tmp/ccfdMfFA.s page 224
+ ARM GAS /tmp/ccD3sdMs.s page 224
4109 .cfi_startproc
@@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4153 000c 8342 cmp r3, r0
4154 000e 10D0 beq .L224
6828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 225
+ ARM GAS /tmp/ccD3sdMs.s page 225
4155 .loc 1 6828 8 is_stmt 1 view .LVU1330
@@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4193 .loc 1 6826 5 is_stmt 1 view .LVU1346
6826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
4194 .loc 1 6826 19 is_stmt 0 view .LVU1347
- ARM GAS /tmp/ccfdMfFA.s page 226
+ ARM GAS /tmp/ccD3sdMs.s page 226
4195 0032 0223 movs r3, #2
@@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4246 .cfi_offset 14, -4
6657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4247 .loc 1 6657 3 is_stmt 1 view .LVU1355
- ARM GAS /tmp/ccfdMfFA.s page 227
+ ARM GAS /tmp/ccD3sdMs.s page 227
6657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4284 .loc 1 6706 17 is_stmt 0 view .LVU1373
4285 0022 0023 movs r3, #0
4286 0024 2377 strb r3, [r4, #28]
- ARM GAS /tmp/ccfdMfFA.s page 228
+ ARM GAS /tmp/ccD3sdMs.s page 228
6707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4325 .loc 1 6681 5 is_stmt 1 view .LVU1389
6681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4326 .loc 1 6681 19 is_stmt 0 view .LVU1390
- ARM GAS /tmp/ccfdMfFA.s page 229
+ ARM GAS /tmp/ccD3sdMs.s page 229
4327 0050 C369 ldr r3, [r0, #28]
@@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4372 .LFE223:
4374 .section .text.TIM_DMADelayPulseHalfCplt,"ax",%progbits
4375 .align 1
- ARM GAS /tmp/ccfdMfFA.s page 230
+ ARM GAS /tmp/ccD3sdMs.s page 230
4376 .global TIM_DMADelayPulseHalfCplt
@@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4417 .loc 1 6730 30 is_stmt 0 view .LVU1416
4418 0016 236B ldr r3, [r4, #48]
- ARM GAS /tmp/ccfdMfFA.s page 231
+ ARM GAS /tmp/ccD3sdMs.s page 231
6730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4458 003c F3E7 b .L240
4459 .cfi_endproc
4460 .LFE238:
- ARM GAS /tmp/ccfdMfFA.s page 232
+ ARM GAS /tmp/ccD3sdMs.s page 232
4462 .section .text.HAL_TIM_TriggerCallback,"ax",%progbits
@@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4511 .LVL348:
3837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4512 .loc 1 3837 3 is_stmt 1 view .LVU1440
- ARM GAS /tmp/ccfdMfFA.s page 233
+ ARM GAS /tmp/ccD3sdMs.s page 233
3837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4550 0032 15F0040F tst r5, #4
4551 0036 12D0 beq .L252
3875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 234
+ ARM GAS /tmp/ccD3sdMs.s page 234
4552 .loc 1 3875 5 is_stmt 1 view .LVU1458
@@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4590 .loc 1 3907 7 is_stmt 1 view .LVU1474
4591 006a 2368 ldr r3, [r4]
4592 006c 6FF00802 mvn r2, #8
- ARM GAS /tmp/ccfdMfFA.s page 235
+ ARM GAS /tmp/ccD3sdMs.s page 235
4593 0070 1A61 str r2, [r3, #16]
@@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4631 00a0 2377 strb r3, [r4, #28]
3940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4632 .loc 1 3940 7 is_stmt 1 view .LVU1491
- ARM GAS /tmp/ccfdMfFA.s page 236
+ ARM GAS /tmp/ccD3sdMs.s page 236
3940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4671 00d2 02D0 beq .L263
3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
4672 .loc 1 3992 5 is_stmt 1 view .LVU1508
- ARM GAS /tmp/ccfdMfFA.s page 237
+ ARM GAS /tmp/ccD3sdMs.s page 237
3992:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4713 0106 2046 mov r0, r4
4714 0108 FFF7FEFF bl HAL_TIM_PWM_PulseFinishedCallback
4715 .LVL358:
- ARM GAS /tmp/ccfdMfFA.s page 238
+ ARM GAS /tmp/ccD3sdMs.s page 238
4716 010c A5E7 b .L254
@@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4761 0150 1A61 str r2, [r3, #16]
3998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
4762 .loc 1 3998 7 view .LVU1532
- ARM GAS /tmp/ccfdMfFA.s page 239
+ ARM GAS /tmp/ccD3sdMs.s page 239
4763 0152 2046 mov r0, r4
@@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
4811 .loc 1 6894 22 is_stmt 0 view .LVU1541
4812 0002 806B ldr r0, [r0, #56]
- ARM GAS /tmp/ccfdMfFA.s page 240
+ ARM GAS /tmp/ccD3sdMs.s page 240
4813 .LVL369:
@@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4859 .thumb_func
4861 TIM_DMATriggerHalfCplt:
4862 .LVL372:
- ARM GAS /tmp/ccfdMfFA.s page 241
+ ARM GAS /tmp/ccD3sdMs.s page 241
4863 .LFB244:
@@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4911 .syntax unified
4912 .thumb
4913 .thumb_func
- ARM GAS /tmp/ccfdMfFA.s page 242
+ ARM GAS /tmp/ccD3sdMs.s page 242
4915 TIM_DMAError:
@@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4953 .loc 1 6631 11 view .LVU1577
4954 0018 8342 cmp r3, r0
4955 001a 19D0 beq .L289
- ARM GAS /tmp/ccfdMfFA.s page 243
+ ARM GAS /tmp/ccD3sdMs.s page 243
6638:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4995 0046 2377 strb r3, [r4, #28]
6629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
4996 .loc 1 6629 5 is_stmt 1 view .LVU1593
- ARM GAS /tmp/ccfdMfFA.s page 244
+ ARM GAS /tmp/ccD3sdMs.s page 244
4997 0048 0123 movs r3, #1
@@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5047 .cfi_startproc
5048 @ args = 0, pretend = 0, frame = 0
5049 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccfdMfFA.s page 245
+ ARM GAS /tmp/ccD3sdMs.s page 245
5050 @ link register save eliminated.
@@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5099 .loc 1 6524 3 view .LVU1610
6524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
5100 .loc 1 6524 14 is_stmt 0 view .LVU1611
- ARM GAS /tmp/ccfdMfFA.s page 246
+ ARM GAS /tmp/ccD3sdMs.s page 246
5101 0000 90F83D00 ldrb r0, [r0, #61] @ zero_extendqisi2
@@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5151 .loc 1 6545 1 view .LVU1620
5152 0004 7047 bx lr
- ARM GAS /tmp/ccfdMfFA.s page 247
+ ARM GAS /tmp/ccD3sdMs.s page 247
5153 .cfi_endproc
@@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5203 0009 1D .byte (.L298-.L300)/2
5204 000a 1D .byte (.L298-.L300)/2
5205 000b 1D .byte (.L298-.L300)/2
- ARM GAS /tmp/ccfdMfFA.s page 248
+ ARM GAS /tmp/ccD3sdMs.s page 248
5206 000c 0D .byte (.L303-.L300)/2
@@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5252 .L299:
6577:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5253 .loc 1 6577 19 discriminator 13 view .LVU1637
- ARM GAS /tmp/ccfdMfFA.s page 249
+ ARM GAS /tmp/ccD3sdMs.s page 249
5254 003a 90F84200 ldrb r0, [r0, #66] @ zero_extendqisi2
@@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5301 .syntax unified
5302 .thumb
5303 .thumb_func
- ARM GAS /tmp/ccfdMfFA.s page 250
+ ARM GAS /tmp/ccD3sdMs.s page 250
5305 TIM_Base_SetConfig:
@@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5349 0036 04F58234 add r4, r4, #66560
5350 003a A042 cmp r0, r4
5351 003c 14BF ite ne
- ARM GAS /tmp/ccfdMfFA.s page 251
+ ARM GAS /tmp/ccD3sdMs.s page 251
5352 003e 0024 movne r4, #0
@@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5396 0084 224A ldr r2, .L317+12
5397 0086 9042 cmp r0, r2
5398 0088 14BF ite ne
- ARM GAS /tmp/ccfdMfFA.s page 252
+ ARM GAS /tmp/ccD3sdMs.s page 252
5399 008a 0022 movne r2, #0
@@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5444 .loc 1 6953 3 is_stmt 1 view .LVU1677
6953:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 253
+ ARM GAS /tmp/ccD3sdMs.s page 253
5445 .loc 1 6953 13 is_stmt 0 view .LVU1678
@@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5482 00f8 03D0 beq .L307
6975:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
5483 .loc 1 6975 5 is_stmt 1 view .LVU1696
- ARM GAS /tmp/ccfdMfFA.s page 254
+ ARM GAS /tmp/ccD3sdMs.s page 254
5484 00fa 0369 ldr r3, [r0, #16]
@@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5531 .loc 1 282 3 view .LVU1706
284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 255
+ ARM GAS /tmp/ccD3sdMs.s page 255
5532 .loc 1 284 3 view .LVU1707
@@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5568 .loc 1 316 3 view .LVU1725
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5569 .loc 1 316 3 view .LVU1726
- ARM GAS /tmp/ccfdMfFA.s page 256
+ ARM GAS /tmp/ccD3sdMs.s page 256
5570 003a 84F84430 strb r3, [r4, #68]
@@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5610 .section .text.HAL_TIM_OC_Init,"ax",%progbits
5611 .align 1
5612 .global HAL_TIM_OC_Init
- ARM GAS /tmp/ccfdMfFA.s page 257
+ ARM GAS /tmp/ccD3sdMs.s page 257
5613 .syntax unified
@@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5652 0012 2146 mov r1, r4
693:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5653 .loc 1 693 3 view .LVU1758
- ARM GAS /tmp/ccfdMfFA.s page 258
+ ARM GAS /tmp/ccD3sdMs.s page 258
5654 0014 51F8040B ldr r0, [r1], #4
@@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
705:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
5689 .loc 1 705 10 is_stmt 0 view .LVU1778
5690 004e 0020 movs r0, #0
- ARM GAS /tmp/ccfdMfFA.s page 259
+ ARM GAS /tmp/ccD3sdMs.s page 259
706:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5736 .LCFI53:
5737 .cfi_def_cfa_offset 8
5738 .cfi_offset 4, -8
- ARM GAS /tmp/ccfdMfFA.s page 260
+ ARM GAS /tmp/ccD3sdMs.s page 260
5739 .cfi_offset 14, -4
@@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5774 002a 84F84030 strb r3, [r4, #64]
1368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
5775 .loc 1 1368 3 view .LVU1809
- ARM GAS /tmp/ccfdMfFA.s page 261
+ ARM GAS /tmp/ccD3sdMs.s page 261
5776 002e 84F84130 strb r3, [r4, #65]
@@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5812 .LCFI54:
5813 .cfi_def_cfa_offset 0
5814 .cfi_restore 4
- ARM GAS /tmp/ccfdMfFA.s page 262
+ ARM GAS /tmp/ccD3sdMs.s page 262
5815 .cfi_restore 14
@@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5857 000a 13B3 cbz r3, .L354
5858 .LVL442:
5859 .L348:
- ARM GAS /tmp/ccfdMfFA.s page 263
+ ARM GAS /tmp/ccD3sdMs.s page 263
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5895 0042 84F84630 strb r3, [r4, #70]
2037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
5896 .loc 1 2037 3 view .LVU1861
- ARM GAS /tmp/ccfdMfFA.s page 264
+ ARM GAS /tmp/ccD3sdMs.s page 264
5897 0046 84F84730 strb r3, [r4, #71]
@@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the TIM handle allocation */
5941 .loc 1 2640 1 is_stmt 1 view -0
5942 .cfi_startproc
- ARM GAS /tmp/ccfdMfFA.s page 265
+ ARM GAS /tmp/ccD3sdMs.s page 265
5943 @ args = 0, pretend = 0, frame = 0
@@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5980 001a FFF7FEFF bl TIM_Base_SetConfig
5981 .LVL450:
2683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 266
+ ARM GAS /tmp/ccD3sdMs.s page 266
5982 .loc 1 2683 3 is_stmt 1 view .LVU1892
@@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6018 .LVL451:
6019 .L363:
2658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 267
+ ARM GAS /tmp/ccD3sdMs.s page 267
6020 .loc 1 2658 5 is_stmt 1 view .LVU1911
@@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3031:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr;
6065 .loc 1 3031 1 view .LVU1923
6066 0004 F8B5 push {r3, r4, r5, r6, r7, lr}
- ARM GAS /tmp/ccfdMfFA.s page 268
+ ARM GAS /tmp/ccD3sdMs.s page 268
6067 .LCFI59:
@@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6102 0014 84F83D30 strb r3, [r4, #61]
3083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6103 .loc 1 3083 3 is_stmt 1 view .LVU1943
- ARM GAS /tmp/ccfdMfFA.s page 269
+ ARM GAS /tmp/ccD3sdMs.s page 269
3083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6140 .loc 1 3101 12 is_stmt 0 view .LVU1961
6141 0038 1B4A ldr r2, .L373+4
6142 003a 1A40 ands r2, r2, r3
- ARM GAS /tmp/ccfdMfFA.s page 270
+ ARM GAS /tmp/ccD3sdMs.s page 270
6143 .LVL462:
@@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
6180 .loc 1 3112 3 view .LVU1979
3112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccer |= sConfig->IC1Polarity | (sConfig->IC2Polarity << 4U);
- ARM GAS /tmp/ccfdMfFA.s page 271
+ ARM GAS /tmp/ccD3sdMs.s page 271
6181 .loc 1 3112 11 is_stmt 0 view .LVU1980
@@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
6218 .loc 1 3130 3 view .LVU1998
6219 0086 84F84430 strb r3, [r4, #68]
- ARM GAS /tmp/ccfdMfFA.s page 272
+ ARM GAS /tmp/ccD3sdMs.s page 272
3131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6262 .cfi_endproc
6263 .LFE189:
6265 .section .text.TIM_OC2_SetConfig,"ax",%progbits
- ARM GAS /tmp/ccfdMfFA.s page 273
+ ARM GAS /tmp/ccD3sdMs.s page 273
6266 .align 1
@@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6307 .LVL480:
7080:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpccmrx &= ~TIM_CCMR1_CC2S;
6308 .loc 1 7080 3 is_stmt 1 view .LVU2025
- ARM GAS /tmp/ccfdMfFA.s page 274
+ ARM GAS /tmp/ccD3sdMs.s page 274
7081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7098:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the Output N State */
6347 .loc 1 7098 5 is_stmt 1 view .LVU2042
7098:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Reset the Output N State */
- ARM GAS /tmp/ccfdMfFA.s page 275
+ ARM GAS /tmp/ccD3sdMs.s page 275
6348 .loc 1 7098 26 is_stmt 0 view .LVU2043
@@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6384 0056 4260 str r2, [r0, #4]
7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6385 .loc 1 7122 3 is_stmt 1 view .LVU2062
- ARM GAS /tmp/ccfdMfFA.s page 276
+ ARM GAS /tmp/ccD3sdMs.s page 276
7122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6431 .loc 1 4075 3 view .LVU2073
4076:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
6432 .loc 1 4076 3 view .LVU2074
- ARM GAS /tmp/ccfdMfFA.s page 277
+ ARM GAS /tmp/ccD3sdMs.s page 277
4077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4090:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
6479 .loc 1 4090 7 view .LVU2083
6480 0030 0068 ldr r0, [r0]
- ARM GAS /tmp/ccfdMfFA.s page 278
+ ARM GAS /tmp/ccD3sdMs.s page 278
6481 .LVL495:
@@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6519 .L387:
4117:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6520 .loc 1 4117 7 is_stmt 1 view .LVU2100
- ARM GAS /tmp/ccfdMfFA.s page 279
+ ARM GAS /tmp/ccD3sdMs.s page 279
4120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6558 .loc 1 4141 7 view .LVU2117
6559 006a 00E0 b .L383
6560 .LVL512:
- ARM GAS /tmp/ccfdMfFA.s page 280
+ ARM GAS /tmp/ccD3sdMs.s page 280
6561 .L392:
@@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6607 .cfi_offset 4, -12
6608 .cfi_offset 5, -8
6609 .cfi_offset 14, -4
- ARM GAS /tmp/ccfdMfFA.s page 281
+ ARM GAS /tmp/ccD3sdMs.s page 281
4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6654 .L406:
4288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6655 .loc 1 4288 7 view .LVU2138
- ARM GAS /tmp/ccfdMfFA.s page 282
+ ARM GAS /tmp/ccD3sdMs.s page 282
4291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6692 005c 67E0 b .L399
6693 .LVL520:
6694 .L405:
- ARM GAS /tmp/ccfdMfFA.s page 283
+ ARM GAS /tmp/ccD3sdMs.s page 283
4305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
6731 .loc 1 4316 7 view .LVU2175
6732 0086 52E0 b .L399
- ARM GAS /tmp/ccfdMfFA.s page 284
+ ARM GAS /tmp/ccD3sdMs.s page 284
6733 .LVL523:
@@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6769 .loc 1 4272 21 is_stmt 0 view .LVU2193
6770 00ac 0020 movs r0, #0
4333:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 285
+ ARM GAS /tmp/ccD3sdMs.s page 285
6771 .loc 1 4333 7 view .LVU2194
@@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6808 .loc 1 4350 7 is_stmt 1 view .LVU2211
4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
6809 .loc 1 4272 21 is_stmt 0 view .LVU2212
- ARM GAS /tmp/ccfdMfFA.s page 286
+ ARM GAS /tmp/ccD3sdMs.s page 286
6810 00d6 0020 movs r0, #0
@@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6847 00fc 5365 str r3, [r2, #84]
4367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
6848 .loc 1 4367 7 is_stmt 1 view .LVU2230
- ARM GAS /tmp/ccfdMfFA.s page 287
+ ARM GAS /tmp/ccD3sdMs.s page 287
4272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6885 .loc 1 4383 29 view .LVU2248
6886 0122 43EA0123 orr r3, r3, r1, lsl #8
6887 0126 5365 str r3, [r2, #84]
- ARM GAS /tmp/ccfdMfFA.s page 288
+ ARM GAS /tmp/ccD3sdMs.s page 288
4384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6932 @ frame_needed = 0, uses_anonymous_args = 0
6933 @ link register save eliminated.
7518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpccmr1;
- ARM GAS /tmp/ccfdMfFA.s page 289
+ ARM GAS /tmp/ccD3sdMs.s page 289
6934 .loc 1 7518 1 is_stmt 0 view .LVU2261
@@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
6975 002c 1AD0 beq .L411
6976 002e CAB9 cbnz r2, .L411
7528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 290
+ ARM GAS /tmp/ccD3sdMs.s page 290
6977 .loc 1 7528 7 discriminator 4 view .LVU2275
@@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7020 .loc 1 7540 30 is_stmt 0 view .LVU2287
7021 0070 1B01 lsls r3, r3, #4
- ARM GAS /tmp/ccfdMfFA.s page 291
+ ARM GAS /tmp/ccD3sdMs.s page 291
7022 .LVL549:
@@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7065 .syntax unified
7066 .thumb
7067 .thumb_func
- ARM GAS /tmp/ccfdMfFA.s page 292
+ ARM GAS /tmp/ccD3sdMs.s page 292
7069 HAL_TIM_IC_ConfigChannel:
@@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7110 001f 51 .byte (.L425-.L420)/2
7111 0020 19 .byte (.L422-.L420)/2
7112 0021 51 .byte (.L425-.L420)/2
- ARM GAS /tmp/ccfdMfFA.s page 293
+ ARM GAS /tmp/ccD3sdMs.s page 293
7113 0022 51 .byte (.L425-.L420)/2
@@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7153 .loc 1 4169 21 view .LVU2326
7154 004a 0020 movs r0, #0
7155 004c 38E0 b .L418
- ARM GAS /tmp/ccfdMfFA.s page 294
+ ARM GAS /tmp/ccD3sdMs.s page 294
7156 .LVL560:
@@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4214:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7195 .loc 1 4214 5 is_stmt 1 view .LVU2342
4216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sConfig->ICPolarity,
- ARM GAS /tmp/ccfdMfFA.s page 295
+ ARM GAS /tmp/ccD3sdMs.s page 295
7196 .loc 1 4216 5 view .LVU2343
@@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7235 009a 4A68 ldr r2, [r1, #4]
7236 .LVL571:
4232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sConfig->ICPolarity,
- ARM GAS /tmp/ccfdMfFA.s page 296
+ ARM GAS /tmp/ccD3sdMs.s page 296
7237 .loc 1 4232 5 is_stmt 0 view .LVU2359
@@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7276 00c2 84F83C30 strb r3, [r4, #60]
4248:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7277 .loc 1 4248 3 view .LVU2375
- ARM GAS /tmp/ccfdMfFA.s page 297
+ ARM GAS /tmp/ccD3sdMs.s page 297
4250:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7322 .cfi_offset 14, -4
7323 0006 88B0 sub sp, sp, #32
7324 .LCFI70:
- ARM GAS /tmp/ccfdMfFA.s page 298
+ ARM GAS /tmp/ccD3sdMs.s page 298
7325 .cfi_def_cfa_offset 48
@@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7361 002e CB68 ldr r3, [r1, #12]
4437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** temp1.OCIdleState = sConfig->OCIdleState;
7362 .loc 1 4437 23 view .LVU2406
- ARM GAS /tmp/ccfdMfFA.s page 299
+ ARM GAS /tmp/ccD3sdMs.s page 299
7363 0030 0493 str r3, [sp, #16]
@@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7403 .cfi_restore_state
4445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
7404 .loc 1 4445 9 is_stmt 1 view .LVU2421
- ARM GAS /tmp/ccfdMfFA.s page 300
+ ARM GAS /tmp/ccD3sdMs.s page 300
4447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7445 0076 FFF7FEFF bl TIM_TI1_SetConfig
7446 .LVL592:
4476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 301
+ ARM GAS /tmp/ccD3sdMs.s page 301
7447 .loc 1 4476 11 view .LVU2436
@@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7483 .loc 1 4484 25 view .LVU2454
7484 00a4 9368 ldr r3, [r2, #8]
4484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
- ARM GAS /tmp/ccfdMfFA.s page 302
+ ARM GAS /tmp/ccD3sdMs.s page 302
7485 .loc 1 4484 32 view .LVU2455
@@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
4503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
7524 .loc 1 4503 11 is_stmt 1 view .LVU2471
4503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_TRIGGER;
- ARM GAS /tmp/ccfdMfFA.s page 303
+ ARM GAS /tmp/ccD3sdMs.s page 303
7525 .loc 1 4503 15 is_stmt 0 view .LVU2472
@@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7568 .loc 1 4429 5 discriminator 1 view .LVU2483
7569 00f8 A9E7 b .L428
7570 .L442:
- ARM GAS /tmp/ccfdMfFA.s page 304
+ ARM GAS /tmp/ccD3sdMs.s page 304
7571 00fa 00BF .align 2
@@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7818:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
7602 .loc 1 7818 3 is_stmt 1 view .LVU2489
7603 .loc 1 7818 11 is_stmt 0 view .LVU2490
- ARM GAS /tmp/ccfdMfFA.s page 305
+ ARM GAS /tmp/ccD3sdMs.s page 305
7604 0004 24F47F4C bic ip, r4, #65280
@@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7647 0004 012B cmp r3, #1
7648 0006 00F09B80 beq .L465
5291:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
- ARM GAS /tmp/ccfdMfFA.s page 306
+ ARM GAS /tmp/ccD3sdMs.s page 306
7649 .loc 1 5291 1 is_stmt 0 view .LVU2504
@@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7689 .loc 1 5437 1 is_stmt 0 view .LVU2518
7690 0034 70BD pop {r4, r5, r6, pc}
7691 .LVL605:
- ARM GAS /tmp/ccfdMfFA.s page 307
+ ARM GAS /tmp/ccD3sdMs.s page 307
7692 .L447:
@@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
7737 .loc 1 5320 28 is_stmt 0 view .LVU2528
7738 005e C968 ldr r1, [r1, #12]
- ARM GAS /tmp/ccfdMfFA.s page 308
+ ARM GAS /tmp/ccD3sdMs.s page 308
7739 .LVL609:
@@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7776 007e 33B1 cbz r3, .L459
5348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
7777 .loc 1 5348 11 is_stmt 1 view .LVU2546
- ARM GAS /tmp/ccfdMfFA.s page 309
+ ARM GAS /tmp/ccD3sdMs.s page 309
7778 0080 2268 ldr r2, [r4]
@@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7822 00c4 43F08003 orr r3, r3, #128
7823 00c8 D361 str r3, [r2, #28]
7824 00ca 0020 movs r0, #0
- ARM GAS /tmp/ccfdMfFA.s page 310
+ ARM GAS /tmp/ccD3sdMs.s page 310
7825 00cc ACE7 b .L449
@@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
7869 .loc 1 5409 11 view .LVU2567
7870 010e 2268 ldr r2, [r4]
- ARM GAS /tmp/ccfdMfFA.s page 311
+ ARM GAS /tmp/ccD3sdMs.s page 311
7871 0110 536D ldr r3, [r2, #84]
@@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7918 .align 1
7919 .global HAL_TIM_ConfigClockSource
7920 .syntax unified
- ARM GAS /tmp/ccfdMfFA.s page 312
+ ARM GAS /tmp/ccD3sdMs.s page 312
7921 .thumb
@@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr;
7961 .loc 1 5462 3 view .LVU2591
5462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->SMCR = tmpsmcr;
- ARM GAS /tmp/ccfdMfFA.s page 313
+ ARM GAS /tmp/ccD3sdMs.s page 313
7962 .loc 1 5462 11 is_stmt 0 view .LVU2592
@@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8004 004a 26E0 b .L479
8005 .L478:
5465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 314
+ ARM GAS /tmp/ccD3sdMs.s page 314
8006 .loc 1 5465 3 view .LVU2605
@@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8046 .L474:
5465:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
8047 .loc 1 5465 3 view .LVU2620
- ARM GAS /tmp/ccfdMfFA.s page 315
+ ARM GAS /tmp/ccD3sdMs.s page 315
8048 0072 B3F5805F cmp r3, #4096
@@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8085 .loc 1 5448 21 is_stmt 0 view .LVU2637
8086 0098 0020 movs r0, #0
8087 .LVL636:
- ARM GAS /tmp/ccfdMfFA.s page 316
+ ARM GAS /tmp/ccD3sdMs.s page 316
8088 .L479:
@@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8124 00b6 9368 ldr r3, [r2, #8]
5513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
8125 .loc 1 5513 28 view .LVU2656
- ARM GAS /tmp/ccfdMfFA.s page 317
+ ARM GAS /tmp/ccD3sdMs.s page 317
8126 00b8 43F48043 orr r3, r3, #16384
@@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
8164 .loc 1 5556 7 view .LVU2673
5558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** sClockSourceConfig->ClockPolarity,
- ARM GAS /tmp/ccfdMfFA.s page 318
+ ARM GAS /tmp/ccD3sdMs.s page 318
8165 .loc 1 5558 7 view .LVU2674
@@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8208 00fa 00BF .align 2
8209 .L491:
8210 00fc 8800FEFF .word -130936
- ARM GAS /tmp/ccfdMfFA.s page 319
+ ARM GAS /tmp/ccD3sdMs.s page 319
8211 .cfi_endproc
@@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8253 .LVL661:
7399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the slave mode */
8254 .loc 1 7399 3 is_stmt 1 view .LVU2700
- ARM GAS /tmp/ccfdMfFA.s page 320
+ ARM GAS /tmp/ccD3sdMs.s page 320
7399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Set the slave mode */
@@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8293 0030 FFF7FEFF bl TIM_ETR_SetConfig
8294 .LVL667:
7421:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 321
+ ARM GAS /tmp/ccD3sdMs.s page 321
8295 .loc 1 7421 7 is_stmt 1 view .LVU2717
@@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8337 .loc 1 7436 7 is_stmt 1 view .LVU2729
7436:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->Instance->CCER &= ~TIM_CCER_CC1E;
8338 .loc 1 7436 21 is_stmt 0 view .LVU2730
- ARM GAS /tmp/ccfdMfFA.s page 322
+ ARM GAS /tmp/ccD3sdMs.s page 322
8339 005c 0368 ldr r3, [r0]
@@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
8376 .loc 1 7447 7 is_stmt 1 view .LVU2748
7385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** uint32_t tmpsmcr;
- ARM GAS /tmp/ccfdMfFA.s page 323
+ ARM GAS /tmp/ccD3sdMs.s page 323
8377 .loc 1 7385 21 is_stmt 0 view .LVU2749
@@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8415 0094 FFF7FEFF bl TIM_TI2_ConfigInputStage
8416 .LVL689:
7475:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 324
+ ARM GAS /tmp/ccD3sdMs.s page 324
8417 .loc 1 7475 7 is_stmt 1 view .LVU2766
@@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
8459 .loc 1 7489 14 view .LVU2779
8460 00b0 0120 movs r0, #1
- ARM GAS /tmp/ccfdMfFA.s page 325
+ ARM GAS /tmp/ccD3sdMs.s page 325
8461 .LVL701:
@@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
8507 .loc 1 5639 3 is_stmt 1 discriminator 2 view .LVU2790
8508 000c 0123 movs r3, #1
- ARM GAS /tmp/ccfdMfFA.s page 326
+ ARM GAS /tmp/ccD3sdMs.s page 326
8509 000e 80F83C30 strb r3, [r0, #60]
@@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5645:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** __HAL_UNLOCK(htim);
8547 .loc 1 5645 17 is_stmt 0 view .LVU2807
8548 0040 0120 movs r0, #1
- ARM GAS /tmp/ccfdMfFA.s page 327
+ ARM GAS /tmp/ccD3sdMs.s page 327
8549 0042 84F83D00 strb r0, [r4, #61]
@@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8592 0004 012B cmp r3, #1
8593 0006 22D0 beq .L523
5674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /* Check the parameters */
- ARM GAS /tmp/ccfdMfFA.s page 328
+ ARM GAS /tmp/ccD3sdMs.s page 328
8594 .loc 1 5674 1 is_stmt 0 view .LVU2821
@@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
5701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
8634 .loc 1 5701 3 view .LVU2836
8635 .L521:
- ARM GAS /tmp/ccfdMfFA.s page 329
+ ARM GAS /tmp/ccD3sdMs.s page 329
5702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
7832:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_1: TIM Channel 1
7833:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_2: TIM Channel 2
7834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_3: TIM Channel 3
- ARM GAS /tmp/ccfdMfFA.s page 330
+ ARM GAS /tmp/ccD3sdMs.s page 330
7835:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** * @arg TIM_CHANNEL_4: TIM Channel 4
@@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8707 .loc 1 7857 1 view .LVU2861
8708 001c 7047 bx lr
8709 .cfi_endproc
- ARM GAS /tmp/ccfdMfFA.s page 331
+ ARM GAS /tmp/ccD3sdMs.s page 331
8710 .LFE261:
@@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8760 001e 90F83E30 ldrb r3, [r0, #62] @ zero_extendqisi2
8761 0022 DBB2 uxtb r3, r3
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 332
+ ARM GAS /tmp/ccD3sdMs.s page 332
8762 .loc 1 802 44 discriminator 1 view .LVU2868
@@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8810 0064 E1E7 b .L538
8811 .L534:
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 333
+ ARM GAS /tmp/ccD3sdMs.s page 333
8812 .loc 1 802 7 discriminator 10 view .LVU2875
@@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8855 00a2 2B4A ldr r2, .L554+4
8856 00a4 9342 cmp r3, r2
8857 00a6 18BF it ne
- ARM GAS /tmp/ccfdMfFA.s page 334
+ ARM GAS /tmp/ccD3sdMs.s page 334
8858 00a8 8B42 cmpne r3, r1
@@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8901 00f8 1A60 str r2, [r3]
834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
8902 .loc 1 834 10 is_stmt 0 view .LVU2898
- ARM GAS /tmp/ccfdMfFA.s page 335
+ ARM GAS /tmp/ccD3sdMs.s page 335
8903 00fa 0020 movs r0, #0
@@ -20098,7 +20098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8946 .loc 1 825 7 is_stmt 1 view .LVU2909
8947 0136 1A68 ldr r2, [r3]
8948 .LVL724:
- ARM GAS /tmp/ccfdMfFA.s page 336
+ ARM GAS /tmp/ccD3sdMs.s page 336
825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -20158,7 +20158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
8998 .cfi_offset 14, -4
8999 0002 0446 mov r4, r0
9000 0004 0D46 mov r5, r1
- ARM GAS /tmp/ccfdMfFA.s page 337
+ ARM GAS /tmp/ccD3sdMs.s page 337
853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -20218,7 +20218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9042 0042 08D1 bne .L558
865:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
9043 .loc 1 865 3 discriminator 1 view .LVU2930
- ARM GAS /tmp/ccfdMfFA.s page 338
+ ARM GAS /tmp/ccD3sdMs.s page 338
9044 0044 196A ldr r1, [r3, #32]
@@ -20278,7 +20278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9091 0080 F9E7 b .L566
9092 .L563:
868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 339
+ ARM GAS /tmp/ccD3sdMs.s page 339
9093 .loc 1 868 3 discriminator 6 view .LVU2938
@@ -20338,7 +20338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
9143 .loc 1 888 3 view .LVU2945
891:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 340
+ ARM GAS /tmp/ccD3sdMs.s page 340
9144 .loc 1 891 3 view .LVU2946
@@ -20398,7 +20398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9193 0042 71 .byte (.L584-.L582)/2
9194 0043 88 .byte (.L580-.L582)/2
9195 0044 88 .byte (.L580-.L582)/2
- ARM GAS /tmp/ccfdMfFA.s page 341
+ ARM GAS /tmp/ccD3sdMs.s page 341
9196 0045 88 .byte (.L580-.L582)/2
@@ -20458,7 +20458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9241 0084 90F84330 ldrb r3, [r0, #67] @ zero_extendqisi2
9242 0088 DBB2 uxtb r3, r3
894:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 342
+ ARM GAS /tmp/ccD3sdMs.s page 342
9243 .loc 1 894 44 discriminator 14 view .LVU2961
@@ -20518,7 +20518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
9285 .loc 1 949 9 is_stmt 0 view .LVU2974
9286 00c0 2368 ldr r3, [r4]
- ARM GAS /tmp/ccfdMfFA.s page 343
+ ARM GAS /tmp/ccD3sdMs.s page 343
949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -20578,7 +20578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9330 .loc 1 914 7 view .LVU2985
9331 0110 2268 ldr r2, [r4]
9332 0112 D368 ldr r3, [r2, #12]
- ARM GAS /tmp/ccfdMfFA.s page 344
+ ARM GAS /tmp/ccD3sdMs.s page 344
9333 0114 43F00403 orr r3, r3, #4
@@ -20638,7 +20638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9372 0146 0120 movs r0, #1
9373 .LVL737:
900:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 345
+ ARM GAS /tmp/ccD3sdMs.s page 345
9374 .loc 1 900 3 discriminator 12 view .LVU3001
@@ -20698,7 +20698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
954:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
9420 .loc 1 954 9 is_stmt 0 view .LVU3010
9421 01a2 42F00102 orr r2, r2, #1
- ARM GAS /tmp/ccfdMfFA.s page 346
+ ARM GAS /tmp/ccD3sdMs.s page 346
9422 01a6 1A60 str r2, [r3]
@@ -20758,7 +20758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9471 .cfi_def_cfa_offset 16
9472 .cfi_offset 3, -16
9473 .cfi_offset 4, -12
- ARM GAS /tmp/ccfdMfFA.s page 347
+ ARM GAS /tmp/ccD3sdMs.s page 347
9474 .cfi_offset 5, -8
@@ -20818,7 +20818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
9519 .loc 1 1025 5 is_stmt 1 view .LVU3027
1025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 348
+ ARM GAS /tmp/ccD3sdMs.s page 348
9520 .loc 1 1025 9 is_stmt 0 view .LVU3028
@@ -20878,7 +20878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9563 .loc 1 1032 5 discriminator 5 view .LVU3039
1035:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
9564 .loc 1 1035 5 view .LVU3040
- ARM GAS /tmp/ccfdMfFA.s page 349
+ ARM GAS /tmp/ccD3sdMs.s page 349
9565 0078 102C cmp r4, #16
@@ -20938,7 +20938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1012:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
9612 .loc 1 1012 7 view .LVU3048
1020:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 350
+ ARM GAS /tmp/ccD3sdMs.s page 350
9613 .loc 1 1020 3 view .LVU3049
@@ -20998,7 +20998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1040:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
9659 .loc 1 1040 1 is_stmt 0 view .LVU3058
9660 00f4 38BD pop {r3, r4, r5, pc}
- ARM GAS /tmp/ccfdMfFA.s page 351
+ ARM GAS /tmp/ccD3sdMs.s page 351
9661 .LVL756:
@@ -21058,7 +21058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9710 0014 20 .byte (.L633-.L630)/2
9711 0015 40 .byte (.L628-.L630)/2
9712 0016 40 .byte (.L628-.L630)/2
- ARM GAS /tmp/ccfdMfFA.s page 352
+ ARM GAS /tmp/ccD3sdMs.s page 352
9713 0017 40 .byte (.L628-.L630)/2
@@ -21118,7 +21118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9762 004f 00 .p2align 1
9763 .L633:
1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 353
+ ARM GAS /tmp/ccD3sdMs.s page 353
9764 .loc 1 1065 7 is_stmt 0 discriminator 4 view .LVU3071
@@ -21178,7 +21178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
9808 .loc 1 1065 44 discriminator 13 view .LVU3082
9809 0086 0228 cmp r0, #2
- ARM GAS /tmp/ccfdMfFA.s page 354
+ ARM GAS /tmp/ccD3sdMs.s page 354
9810 0088 14BF ite ne
@@ -21238,7 +21238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9855 00d0 8C00 .2byte (.L650-.L647)/2
9856 00d2 DC00 .2byte (.L645-.L647)/2
9857 00d4 DC00 .2byte (.L645-.L647)/2
- ARM GAS /tmp/ccfdMfFA.s page 355
+ ARM GAS /tmp/ccD3sdMs.s page 355
9858 00d6 DC00 .2byte (.L645-.L647)/2
@@ -21298,7 +21298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9904 0120 012A cmp r2, #1
9905 0122 14BF ite ne
9906 0124 0022 movne r2, #0
- ARM GAS /tmp/ccfdMfFA.s page 356
+ ARM GAS /tmp/ccD3sdMs.s page 356
9907 0126 0122 moveq r2, #1
@@ -21358,7 +21358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK)
9946 .loc 1 1097 11 view .LVU3115
9947 0154 3432 adds r2, r2, #52
- ARM GAS /tmp/ccfdMfFA.s page 357
+ ARM GAS /tmp/ccD3sdMs.s page 357
9948 0156 686A ldr r0, [r5, #36]
@@ -21418,7 +21418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
9990 0196 9342 cmpne r3, r2
9991 0198 00F09480 beq .L659
1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 358
+ ARM GAS /tmp/ccD3sdMs.s page 358
9992 .loc 1 1190 9 discriminator 1 view .LVU3128
@@ -21478,7 +21478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
10035 .loc 1 1113 7 is_stmt 1 view .LVU3140
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 359
+ ARM GAS /tmp/ccD3sdMs.s page 359
10036 .loc 1 1113 17 is_stmt 0 view .LVU3141
@@ -21538,7 +21538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10075 0218 EA6A ldr r2, [r5, #44]
1134:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
10076 .loc 1 1134 52 view .LVU3157
- ARM GAS /tmp/ccfdMfFA.s page 360
+ ARM GAS /tmp/ccD3sdMs.s page 360
10077 021a 3A48 ldr r0, .L675
@@ -21598,7 +21598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10116 .L655:
1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
10117 .loc 1 1155 7 view .LVU3173
- ARM GAS /tmp/ccfdMfFA.s page 361
+ ARM GAS /tmp/ccD3sdMs.s page 361
1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC4]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
@@ -21658,7 +21658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10156 .loc 1 1077 7 is_stmt 0 discriminator 12 view .LVU3189
10157 0276 0223 movs r3, #2
10158 .LVL780:
- ARM GAS /tmp/ccfdMfFA.s page 362
+ ARM GAS /tmp/ccD3sdMs.s page 362
1077:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -21718,7 +21718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10203 02cc 18BF it ne
10204 02ce B2F5803F cmpne r2, #65536
10205 02d2 15D0 beq .L669
- ARM GAS /tmp/ccfdMfFA.s page 363
+ ARM GAS /tmp/ccD3sdMs.s page 363
1195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -21778,7 +21778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10249 .loc 1 1166 16 view .LVU3210
10250 02fc 0120 movs r0, #1
10251 02fe F2E7 b .L636
- ARM GAS /tmp/ccfdMfFA.s page 364
+ ARM GAS /tmp/ccD3sdMs.s page 364
10252 .LVL789:
@@ -21838,7 +21838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10302 000f 7E .byte (.L694-.L680)/2
10303 0010 7E .byte (.L694-.L680)/2
10304 0011 7E .byte (.L694-.L680)/2
- ARM GAS /tmp/ccfdMfFA.s page 365
+ ARM GAS /tmp/ccD3sdMs.s page 365
10305 0012 45 .byte (.L682-.L680)/2
@@ -21898,7 +21898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
10348 .loc 1 1273 7 view .LVU3228
10349 0044 196A ldr r1, [r3, #32]
- ARM GAS /tmp/ccfdMfFA.s page 366
+ ARM GAS /tmp/ccD3sdMs.s page 366
10350 0046 41F21112 movw r2, #4369
@@ -21958,7 +21958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10395 008e 2E .byte (.L691-.L689)/2
10396 008f 3D .byte (.L687-.L689)/2
10397 0090 3D .byte (.L687-.L689)/2
- ARM GAS /tmp/ccfdMfFA.s page 367
+ ARM GAS /tmp/ccD3sdMs.s page 367
10398 0091 3D .byte (.L687-.L689)/2
@@ -22018,7 +22018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10440 .L679:
1255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC4]);
10441 .loc 1 1255 7 view .LVU3250
- ARM GAS /tmp/ccfdMfFA.s page 368
+ ARM GAS /tmp/ccD3sdMs.s page 368
10442 00bc 0268 ldr r2, [r0]
@@ -22078,7 +22078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10486 .L687:
1280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
10487 .loc 1 1280 5 discriminator 13 view .LVU3261
- ARM GAS /tmp/ccfdMfFA.s page 369
+ ARM GAS /tmp/ccD3sdMs.s page 369
10488 0100 0123 movs r3, #1
@@ -22138,7 +22138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10535 0004 1029 cmp r1, #16
10536 0006 3CD8 bhi .L699
10537 0008 DFE801F0 tbb [pc, r1]
- ARM GAS /tmp/ccfdMfFA.s page 370
+ ARM GAS /tmp/ccD3sdMs.s page 370
10538 .L701:
@@ -22198,7 +22198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10588 0046 73 .byte (.L708-.L710)/2
10589 0047 73 .byte (.L708-.L710)/2
10590 0048 6F .byte (.L709-.L710)/2
- ARM GAS /tmp/ccfdMfFA.s page 371
+ ARM GAS /tmp/ccD3sdMs.s page 371
10591 0049 00 .p2align 1
@@ -22258,7 +22258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10635 008c 0123 movne r3, #1
10636 008e CCE7 b .L706
10637 .L714:
- ARM GAS /tmp/ccfdMfFA.s page 372
+ ARM GAS /tmp/ccD3sdMs.s page 372
1477:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -22318,7 +22318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10680 00d0 29D0 beq .L717
1489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
10681 .loc 1 1489 7 discriminator 3 view .LVU3297
- ARM GAS /tmp/ccfdMfFA.s page 373
+ ARM GAS /tmp/ccD3sdMs.s page 373
10682 00d2 02F58062 add r2, r2, #1024
@@ -22378,7 +22378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10726 .loc 1 1477 3 discriminator 13 view .LVU3307
10727 011e 0223 movs r3, #2
10728 0120 84F84330 strb r3, [r4, #67]
- ARM GAS /tmp/ccfdMfFA.s page 374
+ ARM GAS /tmp/ccD3sdMs.s page 374
10729 0124 B7E7 b .L715
@@ -22438,7 +22438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10772 0154 07000100 .word 65543
10773 .cfi_endproc
10774 .LFE165:
- ARM GAS /tmp/ccfdMfFA.s page 375
+ ARM GAS /tmp/ccD3sdMs.s page 375
10776 .section .text.HAL_TIM_PWM_Stop,"ax",%progbits
@@ -22498,7 +22498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10821 001e 41F21112 movw r2, #4369
10822 0022 1142 tst r1, r2
10823 0024 08D1 bne .L725
- ARM GAS /tmp/ccfdMfFA.s page 376
+ ARM GAS /tmp/ccD3sdMs.s page 376
1530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -22558,7 +22558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10869 0069 1E .byte (.L727-.L729)/2
10870 006a 16 .byte (.L730-.L729)/2
10871 006b 1E .byte (.L727-.L729)/2
- ARM GAS /tmp/ccfdMfFA.s page 377
+ ARM GAS /tmp/ccD3sdMs.s page 377
10872 006c 1E .byte (.L727-.L729)/2
@@ -22618,7 +22618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10919 .section .text.HAL_TIM_PWM_Start_IT,"ax",%progbits
10920 .align 1
10921 .global HAL_TIM_PWM_Start_IT
- ARM GAS /tmp/ccfdMfFA.s page 378
+ ARM GAS /tmp/ccD3sdMs.s page 378
10922 .syntax unified
@@ -22678,7 +22678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
10970 0022 DBB2 uxtb r3, r3
1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
10971 .loc 1 1563 44 discriminator 1 view .LVU3353
- ARM GAS /tmp/ccfdMfFA.s page 379
+ ARM GAS /tmp/ccD3sdMs.s page 379
10972 0024 013B subs r3, r3, #1
@@ -22738,7 +22738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11020 .L742:
1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
11021 .loc 1 1563 7 discriminator 10 view .LVU3360
- ARM GAS /tmp/ccfdMfFA.s page 380
+ ARM GAS /tmp/ccD3sdMs.s page 380
11022 0068 90F84130 ldrb r3, [r0, #65] @ zero_extendqisi2
@@ -22798,7 +22798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
11065 .loc 1 1609 5 is_stmt 0 view .LVU3372
11066 00a6 FFF7FEFF bl TIM_CCxChannelCmd
- ARM GAS /tmp/ccfdMfFA.s page 381
+ ARM GAS /tmp/ccD3sdMs.s page 381
11067 .LVL824:
@@ -22858,7 +22858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11109 00ee 02F57052 add r2, r2, #15360
11110 00f2 9342 cmp r3, r2
11111 00f4 4CD0 beq .L762
- ARM GAS /tmp/ccfdMfFA.s page 382
+ ARM GAS /tmp/ccD3sdMs.s page 382
1618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -22918,7 +22918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11153 012e 0223 movs r3, #2
11154 0130 84F84130 strb r3, [r4, #65]
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 383
+ ARM GAS /tmp/ccD3sdMs.s page 383
11155 .loc 1 1571 3 is_stmt 1 view .LVU3398
@@ -22978,7 +22978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11200 .LVL828:
11201 .p2align 1
11202 .L762:
- ARM GAS /tmp/ccfdMfFA.s page 384
+ ARM GAS /tmp/ccD3sdMs.s page 384
1620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
@@ -23038,7 +23038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11245 .align 2
11246 .L772:
11247 01b8 00000140 .word 1073807360
- ARM GAS /tmp/ccfdMfFA.s page 385
+ ARM GAS /tmp/ccD3sdMs.s page 385
11248 01bc 00040140 .word 1073808384
@@ -23098,7 +23098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11299 .L780:
1659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
11300 .loc 1 1659 7 view .LVU3425
- ARM GAS /tmp/ccfdMfFA.s page 386
+ ARM GAS /tmp/ccD3sdMs.s page 386
11301 001c 0268 ldr r2, [r0]
@@ -23158,7 +23158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11343 .L782:
1697:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
11344 .loc 1 1697 7 discriminator 5 view .LVU3438
- ARM GAS /tmp/ccfdMfFA.s page 387
+ ARM GAS /tmp/ccD3sdMs.s page 387
1701:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -23218,7 +23218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11392 009a D360 str r3, [r2, #12]
1667:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
11393 .loc 1 1667 7 view .LVU3446
- ARM GAS /tmp/ccfdMfFA.s page 388
+ ARM GAS /tmp/ccD3sdMs.s page 388
1689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -23278,7 +23278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11437 00da 0020 movs r0, #0
11438 00dc 0AE0 b .L775
11439 .L785:
- ARM GAS /tmp/ccfdMfFA.s page 389
+ ARM GAS /tmp/ccD3sdMs.s page 389
1704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -23338,7 +23338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11488 .cfi_offset 3, -16
11489 .cfi_offset 4, -12
11490 .cfi_offset 5, -8
- ARM GAS /tmp/ccfdMfFA.s page 390
+ ARM GAS /tmp/ccD3sdMs.s page 390
11491 .cfi_offset 14, -4
@@ -23398,7 +23398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11537 0032 40F05581 bne .L829
1738:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
11538 .loc 1 1738 8 is_stmt 1 view .LVU3474
- ARM GAS /tmp/ccfdMfFA.s page 391
+ ARM GAS /tmp/ccD3sdMs.s page 391
11539 0036 102C cmp r4, #16
@@ -23458,7 +23458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11587 .LVL854:
11588 .L799:
1734:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 392
+ ARM GAS /tmp/ccD3sdMs.s page 392
11589 .loc 1 1734 7 discriminator 10 view .LVU3481
@@ -23518,7 +23518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11633 00aa 0022 movne r2, #0
11634 00ac 0122 moveq r2, #1
11635 .L812:
- ARM GAS /tmp/ccfdMfFA.s page 393
+ ARM GAS /tmp/ccD3sdMs.s page 393
1738:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -23578,7 +23578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11682 .loc 1 1738 49 discriminator 7 view .LVU3499
11683 0100 012A cmp r2, #1
11684 0102 14BF ite ne
- ARM GAS /tmp/ccfdMfFA.s page 394
+ ARM GAS /tmp/ccD3sdMs.s page 394
11685 0104 0022 movne r2, #0
@@ -23638,7 +23638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11728 0142 7048 ldr r0, .L843
11729 0144 D063 str r0, [r2, #60]
1760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 395
+ ARM GAS /tmp/ccD3sdMs.s page 395
11730 .loc 1 1760 7 is_stmt 1 view .LVU3511
@@ -23698,7 +23698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11769 0176 2B68 ldr r3, [r5]
1851:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
11770 .loc 1 1851 8 view .LVU3527
- ARM GAS /tmp/ccfdMfFA.s page 396
+ ARM GAS /tmp/ccD3sdMs.s page 396
11771 0178 6549 ldr r1, .L843+12
@@ -23758,7 +23758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
11815 .loc 1 1868 7 is_stmt 1 view .LVU3538
11816 01d4 1A68 ldr r2, [r3]
- ARM GAS /tmp/ccfdMfFA.s page 397
+ ARM GAS /tmp/ccD3sdMs.s page 397
11817 01d6 42F00102 orr r2, r2, #1
@@ -23818,7 +23818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11856 0204 76D1 bne .L834
1795:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
11857 .loc 1 1795 7 is_stmt 1 view .LVU3554
- ARM GAS /tmp/ccfdMfFA.s page 398
+ ARM GAS /tmp/ccD3sdMs.s page 398
11858 0206 2A68 ldr r2, [r5]
@@ -23878,7 +23878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11896 0230 FFF7FEFF bl HAL_DMA_Start_IT
11897 .LVL865:
1809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK)
- ARM GAS /tmp/ccfdMfFA.s page 399
+ ARM GAS /tmp/ccD3sdMs.s page 399
11898 .loc 1 1809 10 discriminator 1 view .LVU3571
@@ -23938,7 +23938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11936 025c 2A68 ldr r2, [r5]
1830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK)
11937 .loc 1 1830 11 view .LVU3588
- ARM GAS /tmp/ccfdMfFA.s page 400
+ ARM GAS /tmp/ccD3sdMs.s page 400
11938 025e 4032 adds r2, r2, #64
@@ -23998,7 +23998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
11982 02a8 ED020000 .word .L832+1
11983 02ac ED020000 .word .L832+1
11984 02b0 19020000 .word .L822+1
- ARM GAS /tmp/ccfdMfFA.s page 401
+ ARM GAS /tmp/ccD3sdMs.s page 401
11985 02b4 ED020000 .word .L832+1
@@ -24058,7 +24058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12028 02e8 0120 movs r0, #1
12029 02ea FCE7 b .L804
12030 .L832:
- ARM GAS /tmp/ccfdMfFA.s page 402
+ ARM GAS /tmp/ccD3sdMs.s page 402
1754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -24118,7 +24118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12080 @ args = 0, pretend = 0, frame = 0
12081 @ frame_needed = 0, uses_anonymous_args = 0
1888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
- ARM GAS /tmp/ccfdMfFA.s page 403
+ ARM GAS /tmp/ccD3sdMs.s page 403
12082 .loc 1 1888 1 is_stmt 0 view .LVU3617
@@ -24178,7 +24178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
1933:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
12128 .loc 1 1933 3 view .LVU3626
12129 .L852:
- ARM GAS /tmp/ccfdMfFA.s page 404
+ ARM GAS /tmp/ccD3sdMs.s page 404
1936:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -24238,7 +24238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12172 006e 40F24442 movw r2, #1092
12173 0072 1142 tst r1, r2
12174 0074 03D1 bne .L854
- ARM GAS /tmp/ccfdMfFA.s page 405
+ ARM GAS /tmp/ccD3sdMs.s page 405
1945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -24298,7 +24298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12220 00a8 C0E7 b .L852
12221 .LVL887:
12222 .L849:
- ARM GAS /tmp/ccfdMfFA.s page 406
+ ARM GAS /tmp/ccD3sdMs.s page 406
1915:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
@@ -24358,7 +24358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12263 00d8 0123 movs r3, #1
12264 00da 84F83F30 strb r3, [r4, #63]
12265 00de 0020 movs r0, #0
- ARM GAS /tmp/ccfdMfFA.s page 407
+ ARM GAS /tmp/ccD3sdMs.s page 407
12266 00e0 14E0 b .L846
@@ -24418,7 +24418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12313 .syntax unified
12314 .thumb
12315 .thumb_func
- ARM GAS /tmp/ccfdMfFA.s page 408
+ ARM GAS /tmp/ccD3sdMs.s page 408
12317 HAL_TIM_IC_Start:
@@ -24478,7 +24478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2133:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
12364 .loc 1 2133 61 discriminator 1 view .LVU3677
12365 0026 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2
- ARM GAS /tmp/ccfdMfFA.s page 409
+ ARM GAS /tmp/ccD3sdMs.s page 409
12366 002a DBB2 uxtb r3, r3
@@ -24538,7 +24538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12413 0064 D2B2 uxtb r2, r2
12414 0066 DDE7 b .L874
12415 .L868:
- ARM GAS /tmp/ccfdMfFA.s page 410
+ ARM GAS /tmp/ccD3sdMs.s page 410
2132:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
@@ -24598,7 +24598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12459 00a6 84F83F30 strb r3, [r4, #63]
2147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
12460 .loc 1 2147 3 is_stmt 1 view .LVU3696
- ARM GAS /tmp/ccfdMfFA.s page 411
+ ARM GAS /tmp/ccD3sdMs.s page 411
12461 .L888:
@@ -24658,7 +24658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12502 .loc 1 2153 7 discriminator 4 view .LVU3709
12503 00e6 02F57842 add r2, r2, #63488
12504 00ea 9342 cmp r3, r2
- ARM GAS /tmp/ccfdMfFA.s page 412
+ ARM GAS /tmp/ccD3sdMs.s page 412
12505 00ec 25D0 beq .L891
@@ -24718,7 +24718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
12547 .loc 1 2147 3 is_stmt 0 discriminator 3 view .LVU3722
12548 012a 0223 movs r3, #2
- ARM GAS /tmp/ccfdMfFA.s page 413
+ ARM GAS /tmp/ccD3sdMs.s page 413
12549 012c 84F84530 strb r3, [r4, #69]
@@ -24778,7 +24778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12591 015a 0020 movs r0, #0
12592 015c FCE7 b .L879
12593 .L901:
- ARM GAS /tmp/ccfdMfFA.s page 414
+ ARM GAS /tmp/ccD3sdMs.s page 414
12594 015e 00BF .align 2
@@ -24838,7 +24838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12642 001c 40F24442 movw r2, #1092
12643 0020 1142 tst r1, r2
12644 0022 03D1 bne .L903
- ARM GAS /tmp/ccfdMfFA.s page 415
+ ARM GAS /tmp/ccD3sdMs.s page 415
2190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -24898,7 +24898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12690 005a 16D0 beq .L916
2194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
12691 .loc 1 2194 3 discriminator 4 view .LVU3752
- ARM GAS /tmp/ccfdMfFA.s page 416
+ ARM GAS /tmp/ccD3sdMs.s page 416
12692 005c 082D cmp r5, #8
@@ -24958,7 +24958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12733 .loc 1 2194 3 discriminator 6 view .LVU3765
12734 0092 0123 movs r3, #1
12735 0094 84F84630 strb r3, [r4, #70]
- ARM GAS /tmp/ccfdMfFA.s page 417
+ ARM GAS /tmp/ccD3sdMs.s page 417
12736 0098 E5E7 b .L911
@@ -25018,7 +25018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12787 .L925:
2216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
12788 .loc 1 2216 47 is_stmt 0 discriminator 1 view .LVU3771
- ARM GAS /tmp/ccfdMfFA.s page 418
+ ARM GAS /tmp/ccD3sdMs.s page 418
12789 001e 90F83E20 ldrb r2, [r0, #62] @ zero_extendqisi2
@@ -25078,7 +25078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12835 0054 D2B2 uxtb r2, r2
12836 0056 E5E7 b .L926
12837 .L923:
- ARM GAS /tmp/ccfdMfFA.s page 419
+ ARM GAS /tmp/ccD3sdMs.s page 419
2216:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
@@ -25138,7 +25138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12882 0098 0223 movs r3, #2
12883 009a 84F83E30 strb r3, [r4, #62]
2231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 420
+ ARM GAS /tmp/ccD3sdMs.s page 420
12884 .loc 1 2231 3 is_stmt 1 view .LVU3790
@@ -25198,7 +25198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
12929 .L935:
2230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
12930 .loc 1 2230 3 is_stmt 0 discriminator 9 view .LVU3800
- ARM GAS /tmp/ccfdMfFA.s page 421
+ ARM GAS /tmp/ccD3sdMs.s page 421
12931 00d6 0223 movs r3, #2
@@ -25258,7 +25258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
12971 .loc 1 2274 9 is_stmt 0 view .LVU3815
12972 0106 2368 ldr r3, [r4]
- ARM GAS /tmp/ccfdMfFA.s page 422
+ ARM GAS /tmp/ccD3sdMs.s page 422
2274:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -25318,7 +25318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13016 .loc 1 2252 7 view .LVU3826
13017 0156 2268 ldr r2, [r4]
13018 .LVL927:
- ARM GAS /tmp/ccfdMfFA.s page 423
+ ARM GAS /tmp/ccD3sdMs.s page 423
2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -25378,7 +25378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
13059 .loc 1 2277 7 is_stmt 1 view .LVU3841
2277:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 424
+ ARM GAS /tmp/ccD3sdMs.s page 424
13060 .loc 1 2277 10 is_stmt 0 view .LVU3842
@@ -25438,7 +25438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13109 .LVL940:
13110 .LFB178:
2304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_StatusTypeDef status = HAL_OK;
- ARM GAS /tmp/ccfdMfFA.s page 425
+ ARM GAS /tmp/ccD3sdMs.s page 425
13111 .loc 1 2304 1 is_stmt 1 view -0
@@ -25498,7 +25498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13157 0026 0022 movs r2, #0
13158 0028 2146 mov r1, r4
13159 .LVL942:
- ARM GAS /tmp/ccfdMfFA.s page 426
+ ARM GAS /tmp/ccD3sdMs.s page 426
2348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -25558,7 +25558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13206 .LVL945:
13207 0067 00 .p2align 1
13208 .L968:
- ARM GAS /tmp/ccfdMfFA.s page 427
+ ARM GAS /tmp/ccD3sdMs.s page 427
2322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
@@ -25618,7 +25618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13249 .loc 1 2355 5 is_stmt 1 view .LVU3880
13250 .L979:
2355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 428
+ ARM GAS /tmp/ccD3sdMs.s page 428
13251 .loc 1 2355 5 is_stmt 0 discriminator 2 view .LVU3881
@@ -25678,7 +25678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13293 .loc 1 2355 5 discriminator 6 view .LVU3893
13294 00dc 0123 movs r3, #1
13295 00de 85F84630 strb r3, [r5, #70]
- ARM GAS /tmp/ccfdMfFA.s page 429
+ ARM GAS /tmp/ccD3sdMs.s page 429
13296 00e2 0020 movs r0, #0
@@ -25738,7 +25738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13343 000a 1029 cmp r1, #16
13344 000c 3DD8 bhi .L987
13345 000e DFE801F0 tbb [pc, r1]
- ARM GAS /tmp/ccfdMfFA.s page 430
+ ARM GAS /tmp/ccD3sdMs.s page 430
13346 .LVL951:
@@ -25798,7 +25798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13390 .loc 1 2393 8 is_stmt 1 view .LVU3912
2393:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** && (complementary_channel_state == HAL_TIM_CHANNEL_STATE_READY))
13391 .loc 1 2393 11 is_stmt 0 view .LVU3913
- ARM GAS /tmp/ccfdMfFA.s page 431
+ ARM GAS /tmp/ccD3sdMs.s page 431
13392 003c 012B cmp r3, #1
@@ -25858,7 +25858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13440 0080 D3E7 b .L994
13441 .L988:
2380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_state = TIM_CHANNEL_N_STATE_GET(htim, Channel);
- ARM GAS /tmp/ccfdMfFA.s page 432
+ ARM GAS /tmp/ccD3sdMs.s page 432
13442 .loc 1 2380 47 discriminator 13 view .LVU3920
@@ -25918,7 +25918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
13486 .loc 1 2403 7 is_stmt 1 view .LVU3931
2403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 433
+ ARM GAS /tmp/ccD3sdMs.s page 433
13487 .loc 1 2403 7 is_stmt 0 discriminator 1 view .LVU3932
@@ -25978,7 +25978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13531 00ee 50 .byte (.L1014-.L1013)/2
13532 00ef 80 .byte (.L1022-.L1013)/2
13533 00f0 80 .byte (.L1022-.L1013)/2
- ARM GAS /tmp/ccfdMfFA.s page 434
+ ARM GAS /tmp/ccD3sdMs.s page 434
13534 00f1 80 .byte (.L1022-.L1013)/2
@@ -26038,7 +26038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13576 0124 6B6A ldr r3, [r5, #36]
2419:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
13577 .loc 1 2419 52 view .LVU3955
- ARM GAS /tmp/ccfdMfFA.s page 435
+ ARM GAS /tmp/ccD3sdMs.s page 435
13578 0126 504A ldr r2, .L1032
@@ -26098,7 +26098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13617 0158 434A ldr r2, .L1032
13618 015a DA63 str r2, [r3, #60]
2441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 436
+ ARM GAS /tmp/ccD3sdMs.s page 436
13619 .loc 1 2441 7 is_stmt 1 view .LVU3971
@@ -26158,7 +26158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13658 .loc 1 2462 7 is_stmt 1 view .LVU3986
2462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
13659 .loc 1 2462 17 is_stmt 0 view .LVU3987
- ARM GAS /tmp/ccfdMfFA.s page 437
+ ARM GAS /tmp/ccD3sdMs.s page 437
13660 018c EB6A ldr r3, [r5, #44]
@@ -26218,7 +26218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13699 01bc 2B6B ldr r3, [r5, #48]
2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
13700 .loc 1 2483 56 view .LVU4003
- ARM GAS /tmp/ccfdMfFA.s page 438
+ ARM GAS /tmp/ccD3sdMs.s page 438
13701 01be 2B4A ldr r2, .L1032+4
@@ -26278,7 +26278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13742 01f4 1CD0 beq .L1017
2506:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
13743 .loc 1 2506 7 discriminator 1 view .LVU4017
- ARM GAS /tmp/ccfdMfFA.s page 439
+ ARM GAS /tmp/ccD3sdMs.s page 439
13744 01f6 A2F57C42 sub r2, r2, #64512
@@ -26338,7 +26338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13786 .loc 1 2511 7 is_stmt 1 view .LVU4029
13787 0240 1A68 ldr r2, [r3]
13788 .LVL975:
- ARM GAS /tmp/ccfdMfFA.s page 440
+ ARM GAS /tmp/ccD3sdMs.s page 440
2511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -26398,7 +26398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13832 .L1033:
13833 0266 00BF .align 2
13834 .L1032:
- ARM GAS /tmp/ccfdMfFA.s page 441
+ ARM GAS /tmp/ccD3sdMs.s page 441
13835 0268 00000000 .word TIM_DMACaptureCplt
@@ -26458,7 +26458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13883 0016 07 .byte (.L1040-.L1037)/2
13884 0017 73 .byte (.L1053-.L1037)/2
13885 0018 73 .byte (.L1053-.L1037)/2
- ARM GAS /tmp/ccfdMfFA.s page 442
+ ARM GAS /tmp/ccD3sdMs.s page 442
13886 0019 73 .byte (.L1053-.L1037)/2
@@ -26518,7 +26518,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13929 .loc 1 2590 5 view .LVU4059
13930 0052 102D cmp r5, #16
13931 0054 44D8 bhi .L1043
- ARM GAS /tmp/ccfdMfFA.s page 443
+ ARM GAS /tmp/ccD3sdMs.s page 443
13932 0056 DFE805F0 tbb [pc, r5]
@@ -26578,7 +26578,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
13977 .loc 1 2568 7 is_stmt 1 view .LVU4068
2584:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
13978 .loc 1 2584 3 view .LVU4069
- ARM GAS /tmp/ccfdMfFA.s page 444
+ ARM GAS /tmp/ccD3sdMs.s page 444
13979 008e D1E7 b .L1041
@@ -26638,7 +26638,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14020 .L1047:
2590:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
14021 .loc 1 2590 5 discriminator 6 view .LVU4083
- ARM GAS /tmp/ccfdMfFA.s page 445
+ ARM GAS /tmp/ccD3sdMs.s page 445
14022 00c8 0123 movs r3, #1
@@ -26698,7 +26698,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** /**
14064 .loc 1 2596 1 view .LVU4096
14065 .cfi_endproc
- ARM GAS /tmp/ccfdMfFA.s page 446
+ ARM GAS /tmp/ccD3sdMs.s page 446
14066 .LFE180:
@@ -26758,7 +26758,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14110 .loc 1 2796 3 is_stmt 1 view .LVU4108
2799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
14111 .loc 1 2799 3 view .LVU4109
- ARM GAS /tmp/ccfdMfFA.s page 447
+ ARM GAS /tmp/ccD3sdMs.s page 447
2799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
@@ -26818,7 +26818,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14153 0050 2068 ldr r0, [r4]
14154 0052 FFF7FEFF bl TIM_CCxChannelCmd
14155 .LVL1004:
- ARM GAS /tmp/ccfdMfFA.s page 448
+ ARM GAS /tmp/ccD3sdMs.s page 448
2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -26878,7 +26878,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14201 .section .text.HAL_TIM_OnePulse_Stop,"ax",%progbits
14202 .align 1
14203 .global HAL_TIM_OnePulse_Stop
- ARM GAS /tmp/ccfdMfFA.s page 449
+ ARM GAS /tmp/ccD3sdMs.s page 449
14204 .syntax unified
@@ -26938,7 +26938,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14249 .loc 1 2862 5 is_stmt 1 view .LVU4143
2862:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 450
+ ARM GAS /tmp/ccD3sdMs.s page 450
14250 .loc 1 2862 5 view .LVU4144
@@ -26998,7 +26998,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14292 006e 84F84530 strb r3, [r4, #69]
2875:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14293 .loc 1 2875 3 view .LVU4157
- ARM GAS /tmp/ccfdMfFA.s page 451
+ ARM GAS /tmp/ccD3sdMs.s page 451
2876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -27058,7 +27058,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14340 .loc 1 2892 3 is_stmt 1 view .LVU4167
2892:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_2_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA
14341 .loc 1 2892 31 is_stmt 0 view .LVU4168
- ARM GAS /tmp/ccfdMfFA.s page 452
+ ARM GAS /tmp/ccD3sdMs.s page 452
14342 0010 90F84430 ldrb r3, [r0, #68] @ zero_extendqisi2
@@ -27118,7 +27118,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14382 0046 43F00203 orr r3, r3, #2
14383 004a D360 str r3, [r2, #12]
2926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 453
+ ARM GAS /tmp/ccD3sdMs.s page 453
14384 .loc 1 2926 3 is_stmt 1 view .LVU4183
@@ -27178,7 +27178,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
14428 .loc 1 2939 1 view .LVU4194
14429 0086 10BD pop {r4, pc}
- ARM GAS /tmp/ccfdMfFA.s page 454
+ ARM GAS /tmp/ccD3sdMs.s page 454
14430 .LVL1031:
@@ -27238,7 +27238,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14478 000e 0268 ldr r2, [r0]
14479 0010 D368 ldr r3, [r2, #12]
14480 0012 23F00403 bic r3, r3, #4
- ARM GAS /tmp/ccfdMfFA.s page 455
+ ARM GAS /tmp/ccD3sdMs.s page 455
14481 0016 D360 str r3, [r2, #12]
@@ -27298,7 +27298,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
2973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14524 .loc 1 2973 5 discriminator 5 view .LVU4214
2977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 456
+ ARM GAS /tmp/ccD3sdMs.s page 456
14525 .loc 1 2977 3 view .LVU4215
@@ -27358,7 +27358,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14569 .syntax unified
14570 .thumb
14571 .thumb_func
- ARM GAS /tmp/ccfdMfFA.s page 457
+ ARM GAS /tmp/ccD3sdMs.s page 457
14573 HAL_TIM_Encoder_Start:
@@ -27418,7 +27418,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14613 .loc 1 3238 5 is_stmt 1 view .LVU4240
3238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (complementary_channel_1_state != HAL_TIM_CHANNEL_STATE_READY))
14614 .loc 1 3238 8 is_stmt 0 view .LVU4241
- ARM GAS /tmp/ccfdMfFA.s page 458
+ ARM GAS /tmp/ccD3sdMs.s page 458
14615 0020 0128 cmp r0, #1
@@ -27478,7 +27478,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14657 0052 14D0 beq .L1100
3264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
14658 .loc 1 3264 5 is_stmt 1 view .LVU4254
- ARM GAS /tmp/ccfdMfFA.s page 459
+ ARM GAS /tmp/ccD3sdMs.s page 459
3264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
@@ -27538,7 +27538,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14700 .loc 1 3259 7 is_stmt 1 view .LVU4268
14701 008e 84F84530 strb r3, [r4, #69]
- ARM GAS /tmp/ccfdMfFA.s page 460
+ ARM GAS /tmp/ccD3sdMs.s page 460
14702 0092 CEE7 b .L1088
@@ -27598,7 +27598,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14744 .loc 1 3241 14 is_stmt 0 view .LVU4281
14745 00b8 0120 movs r0, #1
- ARM GAS /tmp/ccfdMfFA.s page 461
+ ARM GAS /tmp/ccD3sdMs.s page 461
14746 .LVL1066:
@@ -27658,7 +27658,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14793 .cfi_offset 5, -8
14794 .cfi_offset 14, -4
14795 0002 0446 mov r4, r0
- ARM GAS /tmp/ccfdMfFA.s page 462
+ ARM GAS /tmp/ccD3sdMs.s page 462
3322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -27718,7 +27718,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14837 002e 196A ldr r1, [r3, #32]
14838 0030 41F21112 movw r2, #4369
14839 0034 1142 tst r1, r2
- ARM GAS /tmp/ccfdMfFA.s page 463
+ ARM GAS /tmp/ccD3sdMs.s page 463
14840 0036 08D1 bne .L1106
@@ -27778,7 +27778,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** break;
14887 .loc 1 3336 7 is_stmt 0 view .LVU4311
14888 0070 0068 ldr r0, [r0]
- ARM GAS /tmp/ccfdMfFA.s page 464
+ ARM GAS /tmp/ccD3sdMs.s page 464
14889 .LVL1084:
@@ -27838,7 +27838,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14930 00a6 84F84130 strb r3, [r4, #65]
3355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
14931 .loc 1 3355 5 is_stmt 1 view .LVU4325
- ARM GAS /tmp/ccfdMfFA.s page 465
+ ARM GAS /tmp/ccD3sdMs.s page 465
14932 00aa EFE7 b .L1116
@@ -27898,7 +27898,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
14973 .cfi_endproc
14974 .LFE194:
14976 .section .text.HAL_TIM_Encoder_Start_IT,"ax",%progbits
- ARM GAS /tmp/ccfdMfFA.s page 466
+ ARM GAS /tmp/ccD3sdMs.s page 466
14977 .align 1
@@ -27958,7 +27958,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3390:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
15020 .loc 1 3390 6 is_stmt 0 view .LVU4351
15021 001c 0D46 mov r5, r1
- ARM GAS /tmp/ccfdMfFA.s page 467
+ ARM GAS /tmp/ccD3sdMs.s page 467
15022 001e 09BB cbnz r1, .L1125
@@ -28018,7 +28018,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15064 .loc 1 3457 7 view .LVU4363
15065 0058 2268 ldr r2, [r4]
15066 005a D368 ldr r3, [r2, #12]
- ARM GAS /tmp/ccfdMfFA.s page 468
+ ARM GAS /tmp/ccD3sdMs.s page 468
15067 005c 43F00403 orr r3, r3, #4
@@ -28078,7 +28078,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15107 0090 84F84530 strb r3, [r4, #69]
15108 0094 CDE7 b .L1127
15109 .LVL1101:
- ARM GAS /tmp/ccfdMfFA.s page 469
+ ARM GAS /tmp/ccD3sdMs.s page 469
15110 .L1139:
@@ -28138,7 +28138,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15151 00ca 0020 movs r0, #0
15152 .L1126:
3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
- ARM GAS /tmp/ccfdMfFA.s page 470
+ ARM GAS /tmp/ccD3sdMs.s page 470
15153 .loc 1 3467 1 view .LVU4391
@@ -28198,7 +28198,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15196 .L1136:
3423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
15197 .loc 1 3423 14 view .LVU4403
- ARM GAS /tmp/ccfdMfFA.s page 471
+ ARM GAS /tmp/ccD3sdMs.s page 471
15198 00f0 0120 movs r0, #1
@@ -28258,7 +28258,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15244 .LVL1121:
3502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_2, TIM_CCx_DISABLE);
15245 .loc 1 3502 5 view .LVU4414
- ARM GAS /tmp/ccfdMfFA.s page 472
+ ARM GAS /tmp/ccD3sdMs.s page 472
15246 0014 FFF7FEFF bl TIM_CCxChannelCmd
@@ -28318,7 +28318,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15289 .loc 1 3516 5 is_stmt 1 view .LVU4425
15290 005c 102D cmp r5, #16
15291 005e 3ED8 bhi .L1146
- ARM GAS /tmp/ccfdMfFA.s page 473
+ ARM GAS /tmp/ccD3sdMs.s page 473
15292 0060 DFE805F0 tbb [pc, r5]
@@ -28378,7 +28378,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15339 .loc 1 3495 5 view .LVU4432
15340 0092 FFF7FEFF bl TIM_CCxChannelCmd
15341 .LVL1131:
- ARM GAS /tmp/ccfdMfFA.s page 474
+ ARM GAS /tmp/ccD3sdMs.s page 474
3498:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -28438,7 +28438,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
15384 .loc 1 3517 5 is_stmt 1 view .LVU4445
15385 00d4 EFE7 b .L1154
- ARM GAS /tmp/ccfdMfFA.s page 475
+ ARM GAS /tmp/ccD3sdMs.s page 475
15386 .L1147:
@@ -28498,7 +28498,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15427 .LFE196:
15429 .section .text.HAL_TIM_Encoder_Start_DMA,"ax",%progbits
15430 .align 1
- ARM GAS /tmp/ccfdMfFA.s page 476
+ ARM GAS /tmp/ccD3sdMs.s page 476
15431 .global HAL_TIM_Encoder_Start_DMA
@@ -28558,7 +28558,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15475 .LVL1137:
3553:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
15476 .loc 1 3553 3 is_stmt 1 view .LVU4470
- ARM GAS /tmp/ccfdMfFA.s page 477
+ ARM GAS /tmp/ccD3sdMs.s page 477
3556:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
@@ -28618,7 +28618,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15516 .loc 1 3698 52 view .LVU4485
15517 005c 7849 ldr r1, .L1194
15518 005e D963 str r1, [r3, #60]
- ARM GAS /tmp/ccfdMfFA.s page 478
+ ARM GAS /tmp/ccD3sdMs.s page 478
3699:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -28678,7 +28678,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
15557 .loc 1 3581 11 is_stmt 0 view .LVU4502
15558 0088 0429 cmp r1, #4
- ARM GAS /tmp/ccfdMfFA.s page 479
+ ARM GAS /tmp/ccD3sdMs.s page 479
15559 008a 33D0 beq .L1190
@@ -28738,7 +28738,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15601 00d6 00F0AE80 beq .L1181
3620:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
15602 .loc 1 3620 52 discriminator 1 view .LVU4515
- ARM GAS /tmp/ccfdMfFA.s page 480
+ ARM GAS /tmp/ccD3sdMs.s page 480
15603 00da 002E cmp r6, #0
@@ -28798,7 +28798,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15643 0120 96E7 b .L1166
15644 .LVL1148:
15645 .L1168:
- ARM GAS /tmp/ccfdMfFA.s page 481
+ ARM GAS /tmp/ccD3sdMs.s page 481
3643:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
@@ -28858,7 +28858,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
15684 .loc 1 3657 7 is_stmt 1 view .LVU4546
15685 0148 2268 ldr r2, [r4]
- ARM GAS /tmp/ccfdMfFA.s page 482
+ ARM GAS /tmp/ccD3sdMs.s page 482
15686 014a D368 ldr r3, [r2, #12]
@@ -28918,7 +28918,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15725 .loc 1 3677 71 is_stmt 0 view .LVU4561
15726 017a 2168 ldr r1, [r4]
3677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** Length) != HAL_OK)
- ARM GAS /tmp/ccfdMfFA.s page 483
+ ARM GAS /tmp/ccD3sdMs.s page 483
15727 .loc 1 3677 11 view .LVU4562
@@ -28978,7 +28978,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15770 01b4 DA63 str r2, [r3, #60]
3714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
15771 .loc 1 3714 7 is_stmt 1 view .LVU4574
- ARM GAS /tmp/ccfdMfFA.s page 484
+ ARM GAS /tmp/ccD3sdMs.s page 484
3714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -29038,7 +29038,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15812 .loc 1 3733 7 view .LVU4588
15813 01ec 0122 movs r2, #1
15814 01ee 0021 movs r1, #0
- ARM GAS /tmp/ccfdMfFA.s page 485
+ ARM GAS /tmp/ccD3sdMs.s page 485
15815 01f0 2068 ldr r0, [r4]
@@ -29098,7 +29098,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
15859 .loc 1 3586 14 view .LVU4599
15860 021c F9E7 b .L1165
- ARM GAS /tmp/ccfdMfFA.s page 486
+ ARM GAS /tmp/ccD3sdMs.s page 486
15861 .LVL1172:
@@ -29158,7 +29158,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15903 .LVL1184:
15904 .L1181:
3622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 487
+ ARM GAS /tmp/ccD3sdMs.s page 487
15905 .loc 1 3622 16 view .LVU4612
@@ -29218,7 +29218,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
15953 0006 0029 cmp r1, #0
15954 0008 3BD0 beq .L1215
3772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** {
- ARM GAS /tmp/ccfdMfFA.s page 488
+ ARM GAS /tmp/ccD3sdMs.s page 488
15955 .loc 1 3772 8 is_stmt 1 view .LVU4621
@@ -29278,7 +29278,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
15997 .loc 1 3793 3 view .LVU4634
15998 0042 2368 ldr r3, [r4]
- ARM GAS /tmp/ccfdMfFA.s page 489
+ ARM GAS /tmp/ccD3sdMs.s page 489
15999 0044 196A ldr r1, [r3, #32]
@@ -29338,7 +29338,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
16046 0082 0022 movs r2, #0
16047 0084 1146 mov r1, r2
16048 .LVL1196:
- ARM GAS /tmp/ccfdMfFA.s page 490
+ ARM GAS /tmp/ccD3sdMs.s page 490
3766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c ****
@@ -29398,7 +29398,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
16091 00ba 0123 movs r3, #1
16092 00bc 84F83E30 strb r3, [r4, #62]
3799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
- ARM GAS /tmp/ccfdMfFA.s page 491
+ ARM GAS /tmp/ccD3sdMs.s page 491
16093 .loc 1 3799 5 is_stmt 1 view .LVU4654
@@ -29458,7 +29458,7 @@ ARM GAS /tmp/ccfdMfFA.s page 1
16134 .loc 1 3798 5 is_stmt 0 discriminator 13 view .LVU4667
16135 00f6 0123 movs r3, #1
16136 00f8 84F84330 strb r3, [r4, #67]
- ARM GAS /tmp/ccfdMfFA.s page 492
+ ARM GAS /tmp/ccD3sdMs.s page 492
3799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim.c **** }
@@ -29512,455 +29512,455 @@ ARM GAS /tmp/ccfdMfFA.s page 1
16176 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
16177 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
16178 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
- ARM GAS /tmp/ccfdMfFA.s page 493
+ ARM GAS /tmp/ccD3sdMs.s page 493
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_tim.c
- /tmp/ccfdMfFA.s:20 .text.TIM_OC1_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:25 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig
- /tmp/ccfdMfFA.s:163 .text.TIM_OC1_SetConfig:0000005c $d
- /tmp/ccfdMfFA.s:170 .text.TIM_OC3_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:175 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig
- /tmp/ccfdMfFA.s:313 .text.TIM_OC3_SetConfig:00000064 $d
- /tmp/ccfdMfFA.s:320 .text.TIM_OC4_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:325 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig
- /tmp/ccfdMfFA.s:432 .text.TIM_OC4_SetConfig:00000048 $d
- /tmp/ccfdMfFA.s:439 .text.TIM_OC5_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:444 .text.TIM_OC5_SetConfig:00000000 TIM_OC5_SetConfig
- /tmp/ccfdMfFA.s:549 .text.TIM_OC5_SetConfig:00000048 $d
- /tmp/ccfdMfFA.s:556 .text.TIM_OC6_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:561 .text.TIM_OC6_SetConfig:00000000 TIM_OC6_SetConfig
- /tmp/ccfdMfFA.s:666 .text.TIM_OC6_SetConfig:00000048 $d
- /tmp/ccfdMfFA.s:673 .text.TIM_TI1_ConfigInputStage:00000000 $t
- /tmp/ccfdMfFA.s:678 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage
- /tmp/ccfdMfFA.s:739 .text.TIM_TI2_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:744 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig
- /tmp/ccfdMfFA.s:825 .text.TIM_TI2_ConfigInputStage:00000000 $t
- /tmp/ccfdMfFA.s:830 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage
- /tmp/ccfdMfFA.s:891 .text.TIM_TI3_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:896 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig
- /tmp/ccfdMfFA.s:977 .text.TIM_TI4_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:982 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig
- /tmp/ccfdMfFA.s:1063 .text.TIM_ITRx_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:1068 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig
- /tmp/ccfdMfFA.s:1101 .text.HAL_TIM_Base_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:1107 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
- /tmp/ccfdMfFA.s:1122 .text.HAL_TIM_Base_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:1128 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
- /tmp/ccfdMfFA.s:1143 .text.HAL_TIM_Base_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:1149 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit
- /tmp/ccfdMfFA.s:1235 .text.HAL_TIM_Base_Start:00000000 $t
- /tmp/ccfdMfFA.s:1241 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start
- /tmp/ccfdMfFA.s:1347 .text.HAL_TIM_Base_Start:00000080 $d
- /tmp/ccfdMfFA.s:1353 .text.HAL_TIM_Base_Stop:00000000 $t
- /tmp/ccfdMfFA.s:1359 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop
- /tmp/ccfdMfFA.s:1400 .text.HAL_TIM_Base_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:1406 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT
- /tmp/ccfdMfFA.s:1517 .text.HAL_TIM_Base_Start_IT:00000088 $d
- /tmp/ccfdMfFA.s:1523 .text.HAL_TIM_Base_Stop_IT:00000000 $t
- /tmp/ccfdMfFA.s:1529 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT
- /tmp/ccfdMfFA.s:1575 .text.HAL_TIM_Base_Start_DMA:00000000 $t
- /tmp/ccfdMfFA.s:1581 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA
- /tmp/ccfdMfFA.s:1743 .text.HAL_TIM_Base_Start_DMA:000000c8 $d
- /tmp/ccfdMfFA.s:3832 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt
- /tmp/ccfdMfFA.s:3896 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt
- /tmp/ccfdMfFA.s:4915 .text.TIM_DMAError:00000000 TIM_DMAError
- /tmp/ccfdMfFA.s:1752 .text.HAL_TIM_Base_Stop_DMA:00000000 $t
- /tmp/ccfdMfFA.s:1758 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA
- /tmp/ccfdMfFA.s:1816 .text.HAL_TIM_OC_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:1822 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit
- /tmp/ccfdMfFA.s:1837 .text.HAL_TIM_OC_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:1843 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit
- ARM GAS /tmp/ccfdMfFA.s page 494
+ /tmp/ccD3sdMs.s:20 .text.TIM_OC1_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:25 .text.TIM_OC1_SetConfig:00000000 TIM_OC1_SetConfig
+ /tmp/ccD3sdMs.s:163 .text.TIM_OC1_SetConfig:0000005c $d
+ /tmp/ccD3sdMs.s:170 .text.TIM_OC3_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:175 .text.TIM_OC3_SetConfig:00000000 TIM_OC3_SetConfig
+ /tmp/ccD3sdMs.s:313 .text.TIM_OC3_SetConfig:00000064 $d
+ /tmp/ccD3sdMs.s:320 .text.TIM_OC4_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:325 .text.TIM_OC4_SetConfig:00000000 TIM_OC4_SetConfig
+ /tmp/ccD3sdMs.s:432 .text.TIM_OC4_SetConfig:00000048 $d
+ /tmp/ccD3sdMs.s:439 .text.TIM_OC5_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:444 .text.TIM_OC5_SetConfig:00000000 TIM_OC5_SetConfig
+ /tmp/ccD3sdMs.s:549 .text.TIM_OC5_SetConfig:00000048 $d
+ /tmp/ccD3sdMs.s:556 .text.TIM_OC6_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:561 .text.TIM_OC6_SetConfig:00000000 TIM_OC6_SetConfig
+ /tmp/ccD3sdMs.s:666 .text.TIM_OC6_SetConfig:00000048 $d
+ /tmp/ccD3sdMs.s:673 .text.TIM_TI1_ConfigInputStage:00000000 $t
+ /tmp/ccD3sdMs.s:678 .text.TIM_TI1_ConfigInputStage:00000000 TIM_TI1_ConfigInputStage
+ /tmp/ccD3sdMs.s:739 .text.TIM_TI2_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:744 .text.TIM_TI2_SetConfig:00000000 TIM_TI2_SetConfig
+ /tmp/ccD3sdMs.s:825 .text.TIM_TI2_ConfigInputStage:00000000 $t
+ /tmp/ccD3sdMs.s:830 .text.TIM_TI2_ConfigInputStage:00000000 TIM_TI2_ConfigInputStage
+ /tmp/ccD3sdMs.s:891 .text.TIM_TI3_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:896 .text.TIM_TI3_SetConfig:00000000 TIM_TI3_SetConfig
+ /tmp/ccD3sdMs.s:977 .text.TIM_TI4_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:982 .text.TIM_TI4_SetConfig:00000000 TIM_TI4_SetConfig
+ /tmp/ccD3sdMs.s:1063 .text.TIM_ITRx_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:1068 .text.TIM_ITRx_SetConfig:00000000 TIM_ITRx_SetConfig
+ /tmp/ccD3sdMs.s:1101 .text.HAL_TIM_Base_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:1107 .text.HAL_TIM_Base_MspInit:00000000 HAL_TIM_Base_MspInit
+ /tmp/ccD3sdMs.s:1122 .text.HAL_TIM_Base_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1128 .text.HAL_TIM_Base_MspDeInit:00000000 HAL_TIM_Base_MspDeInit
+ /tmp/ccD3sdMs.s:1143 .text.HAL_TIM_Base_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1149 .text.HAL_TIM_Base_DeInit:00000000 HAL_TIM_Base_DeInit
+ /tmp/ccD3sdMs.s:1235 .text.HAL_TIM_Base_Start:00000000 $t
+ /tmp/ccD3sdMs.s:1241 .text.HAL_TIM_Base_Start:00000000 HAL_TIM_Base_Start
+ /tmp/ccD3sdMs.s:1347 .text.HAL_TIM_Base_Start:00000080 $d
+ /tmp/ccD3sdMs.s:1353 .text.HAL_TIM_Base_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:1359 .text.HAL_TIM_Base_Stop:00000000 HAL_TIM_Base_Stop
+ /tmp/ccD3sdMs.s:1400 .text.HAL_TIM_Base_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:1406 .text.HAL_TIM_Base_Start_IT:00000000 HAL_TIM_Base_Start_IT
+ /tmp/ccD3sdMs.s:1517 .text.HAL_TIM_Base_Start_IT:00000088 $d
+ /tmp/ccD3sdMs.s:1523 .text.HAL_TIM_Base_Stop_IT:00000000 $t
+ /tmp/ccD3sdMs.s:1529 .text.HAL_TIM_Base_Stop_IT:00000000 HAL_TIM_Base_Stop_IT
+ /tmp/ccD3sdMs.s:1575 .text.HAL_TIM_Base_Start_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:1581 .text.HAL_TIM_Base_Start_DMA:00000000 HAL_TIM_Base_Start_DMA
+ /tmp/ccD3sdMs.s:1743 .text.HAL_TIM_Base_Start_DMA:000000c8 $d
+ /tmp/ccD3sdMs.s:3832 .text.TIM_DMAPeriodElapsedCplt:00000000 TIM_DMAPeriodElapsedCplt
+ /tmp/ccD3sdMs.s:3896 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 TIM_DMAPeriodElapsedHalfCplt
+ /tmp/ccD3sdMs.s:4915 .text.TIM_DMAError:00000000 TIM_DMAError
+ /tmp/ccD3sdMs.s:1752 .text.HAL_TIM_Base_Stop_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:1758 .text.HAL_TIM_Base_Stop_DMA:00000000 HAL_TIM_Base_Stop_DMA
+ /tmp/ccD3sdMs.s:1816 .text.HAL_TIM_OC_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:1822 .text.HAL_TIM_OC_MspInit:00000000 HAL_TIM_OC_MspInit
+ /tmp/ccD3sdMs.s:1837 .text.HAL_TIM_OC_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1843 .text.HAL_TIM_OC_MspDeInit:00000000 HAL_TIM_OC_MspDeInit
+ ARM GAS /tmp/ccD3sdMs.s page 494
- /tmp/ccfdMfFA.s:1858 .text.HAL_TIM_OC_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:1864 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit
- /tmp/ccfdMfFA.s:1950 .text.HAL_TIM_PWM_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:1956 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit
- /tmp/ccfdMfFA.s:1971 .text.HAL_TIM_PWM_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:1977 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit
- /tmp/ccfdMfFA.s:1992 .text.HAL_TIM_PWM_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:1998 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit
- /tmp/ccfdMfFA.s:2084 .text.HAL_TIM_IC_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:2090 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit
- /tmp/ccfdMfFA.s:2105 .text.HAL_TIM_IC_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:2111 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit
- /tmp/ccfdMfFA.s:2126 .text.HAL_TIM_IC_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:2132 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit
- /tmp/ccfdMfFA.s:2218 .text.HAL_TIM_OnePulse_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:2224 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit
- /tmp/ccfdMfFA.s:2239 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:2245 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit
- /tmp/ccfdMfFA.s:2260 .text.HAL_TIM_OnePulse_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:2266 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit
- /tmp/ccfdMfFA.s:2336 .text.HAL_TIM_Encoder_MspInit:00000000 $t
- /tmp/ccfdMfFA.s:2342 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit
- /tmp/ccfdMfFA.s:2357 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t
- /tmp/ccfdMfFA.s:2363 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit
- /tmp/ccfdMfFA.s:2378 .text.HAL_TIM_Encoder_DeInit:00000000 $t
- /tmp/ccfdMfFA.s:2384 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit
- /tmp/ccfdMfFA.s:2454 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t
- /tmp/ccfdMfFA.s:2460 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart
- /tmp/ccfdMfFA.s:2817 .text.HAL_TIM_DMABurst_MultiWriteStart:00000190 $d
- /tmp/ccfdMfFA.s:4234 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt
- /tmp/ccfdMfFA.s:4381 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt
- /tmp/ccfdMfFA.s:4797 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt
- /tmp/ccfdMfFA.s:4861 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt
- /tmp/ccfdMfFA.s:2830 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t
- /tmp/ccfdMfFA.s:2836 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart
- /tmp/ccfdMfFA.s:2876 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t
- /tmp/ccfdMfFA.s:2882 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop
- /tmp/ccfdMfFA.s:3034 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t
- /tmp/ccfdMfFA.s:3040 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart
- /tmp/ccfdMfFA.s:3397 .text.HAL_TIM_DMABurst_MultiReadStart:00000190 $d
- /tmp/ccfdMfFA.s:3971 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt
- /tmp/ccfdMfFA.s:4126 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt
- /tmp/ccfdMfFA.s:3410 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t
- /tmp/ccfdMfFA.s:3416 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart
- /tmp/ccfdMfFA.s:3456 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t
- /tmp/ccfdMfFA.s:3462 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop
- /tmp/ccfdMfFA.s:3614 .text.HAL_TIM_GenerateEvent:00000000 $t
- /tmp/ccfdMfFA.s:3620 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent
- /tmp/ccfdMfFA.s:3673 .text.HAL_TIM_ConfigTI1Input:00000000 $t
- /tmp/ccfdMfFA.s:3679 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input
- /tmp/ccfdMfFA.s:3717 .text.HAL_TIM_ReadCapturedValue:00000000 $t
- /tmp/ccfdMfFA.s:3723 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue
- /tmp/ccfdMfFA.s:3737 .text.HAL_TIM_ReadCapturedValue:00000008 $d
- /tmp/ccfdMfFA.s:3806 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t
- /tmp/ccfdMfFA.s:3812 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback
- /tmp/ccfdMfFA.s:3827 .text.TIM_DMAPeriodElapsedCplt:00000000 $t
- /tmp/ccfdMfFA.s:3870 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t
- ARM GAS /tmp/ccfdMfFA.s page 495
+ /tmp/ccD3sdMs.s:1858 .text.HAL_TIM_OC_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1864 .text.HAL_TIM_OC_DeInit:00000000 HAL_TIM_OC_DeInit
+ /tmp/ccD3sdMs.s:1950 .text.HAL_TIM_PWM_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:1956 .text.HAL_TIM_PWM_MspInit:00000000 HAL_TIM_PWM_MspInit
+ /tmp/ccD3sdMs.s:1971 .text.HAL_TIM_PWM_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1977 .text.HAL_TIM_PWM_MspDeInit:00000000 HAL_TIM_PWM_MspDeInit
+ /tmp/ccD3sdMs.s:1992 .text.HAL_TIM_PWM_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:1998 .text.HAL_TIM_PWM_DeInit:00000000 HAL_TIM_PWM_DeInit
+ /tmp/ccD3sdMs.s:2084 .text.HAL_TIM_IC_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:2090 .text.HAL_TIM_IC_MspInit:00000000 HAL_TIM_IC_MspInit
+ /tmp/ccD3sdMs.s:2105 .text.HAL_TIM_IC_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2111 .text.HAL_TIM_IC_MspDeInit:00000000 HAL_TIM_IC_MspDeInit
+ /tmp/ccD3sdMs.s:2126 .text.HAL_TIM_IC_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2132 .text.HAL_TIM_IC_DeInit:00000000 HAL_TIM_IC_DeInit
+ /tmp/ccD3sdMs.s:2218 .text.HAL_TIM_OnePulse_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:2224 .text.HAL_TIM_OnePulse_MspInit:00000000 HAL_TIM_OnePulse_MspInit
+ /tmp/ccD3sdMs.s:2239 .text.HAL_TIM_OnePulse_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2245 .text.HAL_TIM_OnePulse_MspDeInit:00000000 HAL_TIM_OnePulse_MspDeInit
+ /tmp/ccD3sdMs.s:2260 .text.HAL_TIM_OnePulse_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2266 .text.HAL_TIM_OnePulse_DeInit:00000000 HAL_TIM_OnePulse_DeInit
+ /tmp/ccD3sdMs.s:2336 .text.HAL_TIM_Encoder_MspInit:00000000 $t
+ /tmp/ccD3sdMs.s:2342 .text.HAL_TIM_Encoder_MspInit:00000000 HAL_TIM_Encoder_MspInit
+ /tmp/ccD3sdMs.s:2357 .text.HAL_TIM_Encoder_MspDeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2363 .text.HAL_TIM_Encoder_MspDeInit:00000000 HAL_TIM_Encoder_MspDeInit
+ /tmp/ccD3sdMs.s:2378 .text.HAL_TIM_Encoder_DeInit:00000000 $t
+ /tmp/ccD3sdMs.s:2384 .text.HAL_TIM_Encoder_DeInit:00000000 HAL_TIM_Encoder_DeInit
+ /tmp/ccD3sdMs.s:2454 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 $t
+ /tmp/ccD3sdMs.s:2460 .text.HAL_TIM_DMABurst_MultiWriteStart:00000000 HAL_TIM_DMABurst_MultiWriteStart
+ /tmp/ccD3sdMs.s:2817 .text.HAL_TIM_DMABurst_MultiWriteStart:00000190 $d
+ /tmp/ccD3sdMs.s:4234 .text.TIM_DMADelayPulseCplt:00000000 TIM_DMADelayPulseCplt
+ /tmp/ccD3sdMs.s:4381 .text.TIM_DMADelayPulseHalfCplt:00000000 TIM_DMADelayPulseHalfCplt
+ /tmp/ccD3sdMs.s:4797 .text.TIM_DMATriggerCplt:00000000 TIM_DMATriggerCplt
+ /tmp/ccD3sdMs.s:4861 .text.TIM_DMATriggerHalfCplt:00000000 TIM_DMATriggerHalfCplt
+ /tmp/ccD3sdMs.s:2830 .text.HAL_TIM_DMABurst_WriteStart:00000000 $t
+ /tmp/ccD3sdMs.s:2836 .text.HAL_TIM_DMABurst_WriteStart:00000000 HAL_TIM_DMABurst_WriteStart
+ /tmp/ccD3sdMs.s:2876 .text.HAL_TIM_DMABurst_WriteStop:00000000 $t
+ /tmp/ccD3sdMs.s:2882 .text.HAL_TIM_DMABurst_WriteStop:00000000 HAL_TIM_DMABurst_WriteStop
+ /tmp/ccD3sdMs.s:3034 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 $t
+ /tmp/ccD3sdMs.s:3040 .text.HAL_TIM_DMABurst_MultiReadStart:00000000 HAL_TIM_DMABurst_MultiReadStart
+ /tmp/ccD3sdMs.s:3397 .text.HAL_TIM_DMABurst_MultiReadStart:00000190 $d
+ /tmp/ccD3sdMs.s:3971 .text.TIM_DMACaptureCplt:00000000 TIM_DMACaptureCplt
+ /tmp/ccD3sdMs.s:4126 .text.TIM_DMACaptureHalfCplt:00000000 TIM_DMACaptureHalfCplt
+ /tmp/ccD3sdMs.s:3410 .text.HAL_TIM_DMABurst_ReadStart:00000000 $t
+ /tmp/ccD3sdMs.s:3416 .text.HAL_TIM_DMABurst_ReadStart:00000000 HAL_TIM_DMABurst_ReadStart
+ /tmp/ccD3sdMs.s:3456 .text.HAL_TIM_DMABurst_ReadStop:00000000 $t
+ /tmp/ccD3sdMs.s:3462 .text.HAL_TIM_DMABurst_ReadStop:00000000 HAL_TIM_DMABurst_ReadStop
+ /tmp/ccD3sdMs.s:3614 .text.HAL_TIM_GenerateEvent:00000000 $t
+ /tmp/ccD3sdMs.s:3620 .text.HAL_TIM_GenerateEvent:00000000 HAL_TIM_GenerateEvent
+ /tmp/ccD3sdMs.s:3673 .text.HAL_TIM_ConfigTI1Input:00000000 $t
+ /tmp/ccD3sdMs.s:3679 .text.HAL_TIM_ConfigTI1Input:00000000 HAL_TIM_ConfigTI1Input
+ /tmp/ccD3sdMs.s:3717 .text.HAL_TIM_ReadCapturedValue:00000000 $t
+ /tmp/ccD3sdMs.s:3723 .text.HAL_TIM_ReadCapturedValue:00000000 HAL_TIM_ReadCapturedValue
+ /tmp/ccD3sdMs.s:3737 .text.HAL_TIM_ReadCapturedValue:00000008 $d
+ /tmp/ccD3sdMs.s:3806 .text.HAL_TIM_PeriodElapsedCallback:00000000 $t
+ /tmp/ccD3sdMs.s:3812 .text.HAL_TIM_PeriodElapsedCallback:00000000 HAL_TIM_PeriodElapsedCallback
+ /tmp/ccD3sdMs.s:3827 .text.TIM_DMAPeriodElapsedCplt:00000000 $t
+ /tmp/ccD3sdMs.s:3870 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 $t
+ ARM GAS /tmp/ccD3sdMs.s page 495
- /tmp/ccfdMfFA.s:3876 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback
- /tmp/ccfdMfFA.s:3891 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t
- /tmp/ccfdMfFA.s:3923 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t
- /tmp/ccfdMfFA.s:3929 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback
- /tmp/ccfdMfFA.s:3944 .text.HAL_TIM_IC_CaptureCallback:00000000 $t
- /tmp/ccfdMfFA.s:3950 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback
- /tmp/ccfdMfFA.s:3965 .text.TIM_DMACaptureCplt:00000000 $t
- /tmp/ccfdMfFA.s:4099 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t
- /tmp/ccfdMfFA.s:4105 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback
- /tmp/ccfdMfFA.s:4120 .text.TIM_DMACaptureHalfCplt:00000000 $t
- /tmp/ccfdMfFA.s:4208 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t
- /tmp/ccfdMfFA.s:4214 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback
- /tmp/ccfdMfFA.s:4229 .text.TIM_DMADelayPulseCplt:00000000 $t
- /tmp/ccfdMfFA.s:4354 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 $t
- /tmp/ccfdMfFA.s:4360 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 HAL_TIM_PWM_PulseFinishedHalfCpltCallback
- /tmp/ccfdMfFA.s:4375 .text.TIM_DMADelayPulseHalfCplt:00000000 $t
- /tmp/ccfdMfFA.s:4463 .text.HAL_TIM_TriggerCallback:00000000 $t
- /tmp/ccfdMfFA.s:4469 .text.HAL_TIM_TriggerCallback:00000000 HAL_TIM_TriggerCallback
- /tmp/ccfdMfFA.s:4484 .text.HAL_TIM_IRQHandler:00000000 $t
- /tmp/ccfdMfFA.s:4490 .text.HAL_TIM_IRQHandler:00000000 HAL_TIM_IRQHandler
- /tmp/ccfdMfFA.s:4792 .text.TIM_DMATriggerCplt:00000000 $t
- /tmp/ccfdMfFA.s:4835 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 $t
- /tmp/ccfdMfFA.s:4841 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 HAL_TIM_TriggerHalfCpltCallback
- /tmp/ccfdMfFA.s:4856 .text.TIM_DMATriggerHalfCplt:00000000 $t
- /tmp/ccfdMfFA.s:4888 .text.HAL_TIM_ErrorCallback:00000000 $t
- /tmp/ccfdMfFA.s:4894 .text.HAL_TIM_ErrorCallback:00000000 HAL_TIM_ErrorCallback
- /tmp/ccfdMfFA.s:4909 .text.TIM_DMAError:00000000 $t
- /tmp/ccfdMfFA.s:5013 .text.HAL_TIM_Base_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5019 .text.HAL_TIM_Base_GetState:00000000 HAL_TIM_Base_GetState
- /tmp/ccfdMfFA.s:5037 .text.HAL_TIM_OC_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5043 .text.HAL_TIM_OC_GetState:00000000 HAL_TIM_OC_GetState
- /tmp/ccfdMfFA.s:5061 .text.HAL_TIM_PWM_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5067 .text.HAL_TIM_PWM_GetState:00000000 HAL_TIM_PWM_GetState
- /tmp/ccfdMfFA.s:5085 .text.HAL_TIM_IC_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5091 .text.HAL_TIM_IC_GetState:00000000 HAL_TIM_IC_GetState
- /tmp/ccfdMfFA.s:5109 .text.HAL_TIM_OnePulse_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5115 .text.HAL_TIM_OnePulse_GetState:00000000 HAL_TIM_OnePulse_GetState
- /tmp/ccfdMfFA.s:5133 .text.HAL_TIM_Encoder_GetState:00000000 $t
- /tmp/ccfdMfFA.s:5139 .text.HAL_TIM_Encoder_GetState:00000000 HAL_TIM_Encoder_GetState
- /tmp/ccfdMfFA.s:5157 .text.HAL_TIM_GetActiveChannel:00000000 $t
- /tmp/ccfdMfFA.s:5163 .text.HAL_TIM_GetActiveChannel:00000000 HAL_TIM_GetActiveChannel
- /tmp/ccfdMfFA.s:5181 .text.HAL_TIM_GetChannelState:00000000 $t
- /tmp/ccfdMfFA.s:5187 .text.HAL_TIM_GetChannelState:00000000 HAL_TIM_GetChannelState
- /tmp/ccfdMfFA.s:5202 .text.HAL_TIM_GetChannelState:00000008 $d
- /tmp/ccfdMfFA.s:5274 .text.HAL_TIM_DMABurstState:00000000 $t
- /tmp/ccfdMfFA.s:5280 .text.HAL_TIM_DMABurstState:00000000 HAL_TIM_DMABurstState
- /tmp/ccfdMfFA.s:5299 .text.TIM_Base_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:5305 .text.TIM_Base_SetConfig:00000000 TIM_Base_SetConfig
- /tmp/ccfdMfFA.s:5493 .text.TIM_Base_SetConfig:00000104 $d
- /tmp/ccfdMfFA.s:5504 .text.HAL_TIM_Base_Init:00000000 $t
- /tmp/ccfdMfFA.s:5510 .text.HAL_TIM_Base_Init:00000000 HAL_TIM_Base_Init
- /tmp/ccfdMfFA.s:5611 .text.HAL_TIM_OC_Init:00000000 $t
- /tmp/ccfdMfFA.s:5617 .text.HAL_TIM_OC_Init:00000000 HAL_TIM_OC_Init
- /tmp/ccfdMfFA.s:5718 .text.HAL_TIM_PWM_Init:00000000 $t
- /tmp/ccfdMfFA.s:5724 .text.HAL_TIM_PWM_Init:00000000 HAL_TIM_PWM_Init
- /tmp/ccfdMfFA.s:5825 .text.HAL_TIM_IC_Init:00000000 $t
- /tmp/ccfdMfFA.s:5831 .text.HAL_TIM_IC_Init:00000000 HAL_TIM_IC_Init
- ARM GAS /tmp/ccfdMfFA.s page 496
+ /tmp/ccD3sdMs.s:3876 .text.HAL_TIM_PeriodElapsedHalfCpltCallback:00000000 HAL_TIM_PeriodElapsedHalfCpltCallback
+ /tmp/ccD3sdMs.s:3891 .text.TIM_DMAPeriodElapsedHalfCplt:00000000 $t
+ /tmp/ccD3sdMs.s:3923 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 $t
+ /tmp/ccD3sdMs.s:3929 .text.HAL_TIM_OC_DelayElapsedCallback:00000000 HAL_TIM_OC_DelayElapsedCallback
+ /tmp/ccD3sdMs.s:3944 .text.HAL_TIM_IC_CaptureCallback:00000000 $t
+ /tmp/ccD3sdMs.s:3950 .text.HAL_TIM_IC_CaptureCallback:00000000 HAL_TIM_IC_CaptureCallback
+ /tmp/ccD3sdMs.s:3965 .text.TIM_DMACaptureCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4099 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4105 .text.HAL_TIM_IC_CaptureHalfCpltCallback:00000000 HAL_TIM_IC_CaptureHalfCpltCallback
+ /tmp/ccD3sdMs.s:4120 .text.TIM_DMACaptureHalfCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4208 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4214 .text.HAL_TIM_PWM_PulseFinishedCallback:00000000 HAL_TIM_PWM_PulseFinishedCallback
+ /tmp/ccD3sdMs.s:4229 .text.TIM_DMADelayPulseCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4354 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4360 .text.HAL_TIM_PWM_PulseFinishedHalfCpltCallback:00000000 HAL_TIM_PWM_PulseFinishedHalfCpltCallback
+ /tmp/ccD3sdMs.s:4375 .text.TIM_DMADelayPulseHalfCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4463 .text.HAL_TIM_TriggerCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4469 .text.HAL_TIM_TriggerCallback:00000000 HAL_TIM_TriggerCallback
+ /tmp/ccD3sdMs.s:4484 .text.HAL_TIM_IRQHandler:00000000 $t
+ /tmp/ccD3sdMs.s:4490 .text.HAL_TIM_IRQHandler:00000000 HAL_TIM_IRQHandler
+ /tmp/ccD3sdMs.s:4792 .text.TIM_DMATriggerCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4835 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4841 .text.HAL_TIM_TriggerHalfCpltCallback:00000000 HAL_TIM_TriggerHalfCpltCallback
+ /tmp/ccD3sdMs.s:4856 .text.TIM_DMATriggerHalfCplt:00000000 $t
+ /tmp/ccD3sdMs.s:4888 .text.HAL_TIM_ErrorCallback:00000000 $t
+ /tmp/ccD3sdMs.s:4894 .text.HAL_TIM_ErrorCallback:00000000 HAL_TIM_ErrorCallback
+ /tmp/ccD3sdMs.s:4909 .text.TIM_DMAError:00000000 $t
+ /tmp/ccD3sdMs.s:5013 .text.HAL_TIM_Base_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5019 .text.HAL_TIM_Base_GetState:00000000 HAL_TIM_Base_GetState
+ /tmp/ccD3sdMs.s:5037 .text.HAL_TIM_OC_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5043 .text.HAL_TIM_OC_GetState:00000000 HAL_TIM_OC_GetState
+ /tmp/ccD3sdMs.s:5061 .text.HAL_TIM_PWM_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5067 .text.HAL_TIM_PWM_GetState:00000000 HAL_TIM_PWM_GetState
+ /tmp/ccD3sdMs.s:5085 .text.HAL_TIM_IC_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5091 .text.HAL_TIM_IC_GetState:00000000 HAL_TIM_IC_GetState
+ /tmp/ccD3sdMs.s:5109 .text.HAL_TIM_OnePulse_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5115 .text.HAL_TIM_OnePulse_GetState:00000000 HAL_TIM_OnePulse_GetState
+ /tmp/ccD3sdMs.s:5133 .text.HAL_TIM_Encoder_GetState:00000000 $t
+ /tmp/ccD3sdMs.s:5139 .text.HAL_TIM_Encoder_GetState:00000000 HAL_TIM_Encoder_GetState
+ /tmp/ccD3sdMs.s:5157 .text.HAL_TIM_GetActiveChannel:00000000 $t
+ /tmp/ccD3sdMs.s:5163 .text.HAL_TIM_GetActiveChannel:00000000 HAL_TIM_GetActiveChannel
+ /tmp/ccD3sdMs.s:5181 .text.HAL_TIM_GetChannelState:00000000 $t
+ /tmp/ccD3sdMs.s:5187 .text.HAL_TIM_GetChannelState:00000000 HAL_TIM_GetChannelState
+ /tmp/ccD3sdMs.s:5202 .text.HAL_TIM_GetChannelState:00000008 $d
+ /tmp/ccD3sdMs.s:5274 .text.HAL_TIM_DMABurstState:00000000 $t
+ /tmp/ccD3sdMs.s:5280 .text.HAL_TIM_DMABurstState:00000000 HAL_TIM_DMABurstState
+ /tmp/ccD3sdMs.s:5299 .text.TIM_Base_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:5305 .text.TIM_Base_SetConfig:00000000 TIM_Base_SetConfig
+ /tmp/ccD3sdMs.s:5493 .text.TIM_Base_SetConfig:00000104 $d
+ /tmp/ccD3sdMs.s:5504 .text.HAL_TIM_Base_Init:00000000 $t
+ /tmp/ccD3sdMs.s:5510 .text.HAL_TIM_Base_Init:00000000 HAL_TIM_Base_Init
+ /tmp/ccD3sdMs.s:5611 .text.HAL_TIM_OC_Init:00000000 $t
+ /tmp/ccD3sdMs.s:5617 .text.HAL_TIM_OC_Init:00000000 HAL_TIM_OC_Init
+ /tmp/ccD3sdMs.s:5718 .text.HAL_TIM_PWM_Init:00000000 $t
+ /tmp/ccD3sdMs.s:5724 .text.HAL_TIM_PWM_Init:00000000 HAL_TIM_PWM_Init
+ /tmp/ccD3sdMs.s:5825 .text.HAL_TIM_IC_Init:00000000 $t
+ /tmp/ccD3sdMs.s:5831 .text.HAL_TIM_IC_Init:00000000 HAL_TIM_IC_Init
+ ARM GAS /tmp/ccD3sdMs.s page 496
- /tmp/ccfdMfFA.s:5932 .text.HAL_TIM_OnePulse_Init:00000000 $t
- /tmp/ccfdMfFA.s:5938 .text.HAL_TIM_OnePulse_Init:00000000 HAL_TIM_OnePulse_Init
- /tmp/ccfdMfFA.s:6045 .text.HAL_TIM_Encoder_Init:00000000 $t
- /tmp/ccfdMfFA.s:6051 .text.HAL_TIM_Encoder_Init:00000000 HAL_TIM_Encoder_Init
- /tmp/ccfdMfFA.s:6259 .text.HAL_TIM_Encoder_Init:000000a4 $d
- /tmp/ccfdMfFA.s:6266 .text.TIM_OC2_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:6272 .text.TIM_OC2_SetConfig:00000000 TIM_OC2_SetConfig
- /tmp/ccfdMfFA.s:6410 .text.TIM_OC2_SetConfig:00000064 $d
- /tmp/ccfdMfFA.s:6417 .text.HAL_TIM_OC_ConfigChannel:00000000 $t
- /tmp/ccfdMfFA.s:6423 .text.HAL_TIM_OC_ConfigChannel:00000000 HAL_TIM_OC_ConfigChannel
- /tmp/ccfdMfFA.s:6455 .text.HAL_TIM_OC_ConfigChannel:0000001a $d
- /tmp/ccfdMfFA.s:6589 .text.HAL_TIM_PWM_ConfigChannel:00000000 $t
- /tmp/ccfdMfFA.s:6595 .text.HAL_TIM_PWM_ConfigChannel:00000000 HAL_TIM_PWM_ConfigChannel
- /tmp/ccfdMfFA.s:6632 .text.HAL_TIM_PWM_ConfigChannel:00000020 $d
- /tmp/ccfdMfFA.s:6920 .text.TIM_TI1_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:6926 .text.TIM_TI1_SetConfig:00000000 TIM_TI1_SetConfig
- /tmp/ccfdMfFA.s:7056 .text.TIM_TI1_SetConfig:00000088 $d
- /tmp/ccfdMfFA.s:7063 .text.HAL_TIM_IC_ConfigChannel:00000000 $t
- /tmp/ccfdMfFA.s:7069 .text.HAL_TIM_IC_ConfigChannel:00000000 HAL_TIM_IC_ConfigChannel
- /tmp/ccfdMfFA.s:7107 .text.HAL_TIM_IC_ConfigChannel:0000001c $d
- /tmp/ccfdMfFA.s:7294 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 $t
- /tmp/ccfdMfFA.s:7300 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 HAL_TIM_OnePulse_ConfigChannel
- /tmp/ccfdMfFA.s:7573 .text.HAL_TIM_OnePulse_ConfigChannel:000000fc $d
- /tmp/ccfdMfFA.s:7578 .text.TIM_ETR_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:7584 .text.TIM_ETR_SetConfig:00000000 TIM_ETR_SetConfig
- /tmp/ccfdMfFA.s:7628 .text.HAL_TIM_ConfigOCrefClear:00000000 $t
- /tmp/ccfdMfFA.s:7634 .text.HAL_TIM_ConfigOCrefClear:00000000 HAL_TIM_ConfigOCrefClear
- /tmp/ccfdMfFA.s:7709 .text.HAL_TIM_ConfigOCrefClear:00000048 $d
- /tmp/ccfdMfFA.s:7918 .text.HAL_TIM_ConfigClockSource:00000000 $t
- /tmp/ccfdMfFA.s:7924 .text.HAL_TIM_ConfigClockSource:00000000 HAL_TIM_ConfigClockSource
- /tmp/ccfdMfFA.s:8210 .text.HAL_TIM_ConfigClockSource:000000fc $d
- /tmp/ccfdMfFA.s:8215 .text.TIM_SlaveTimer_SetConfig:00000000 $t
- /tmp/ccfdMfFA.s:8220 .text.TIM_SlaveTimer_SetConfig:00000000 TIM_SlaveTimer_SetConfig
- /tmp/ccfdMfFA.s:8474 .text.TIM_SlaveTimer_SetConfig:000000b8 $d
- /tmp/ccfdMfFA.s:8479 .text.HAL_TIM_SlaveConfigSynchro:00000000 $t
- /tmp/ccfdMfFA.s:8485 .text.HAL_TIM_SlaveConfigSynchro:00000000 HAL_TIM_SlaveConfigSynchro
- /tmp/ccfdMfFA.s:8573 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 $t
- /tmp/ccfdMfFA.s:8579 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 HAL_TIM_SlaveConfigSynchro_IT
- /tmp/ccfdMfFA.s:8667 .text.TIM_CCxChannelCmd:00000000 $t
- /tmp/ccfdMfFA.s:8673 .text.TIM_CCxChannelCmd:00000000 TIM_CCxChannelCmd
- /tmp/ccfdMfFA.s:8713 .text.HAL_TIM_OC_Start:00000000 $t
- /tmp/ccfdMfFA.s:8719 .text.HAL_TIM_OC_Start:00000000 HAL_TIM_OC_Start
- /tmp/ccfdMfFA.s:8740 .text.HAL_TIM_OC_Start:0000000c $d
- /tmp/ccfdMfFA.s:8775 .text.HAL_TIM_OC_Start:00000038 $d
- /tmp/ccfdMfFA.s:8971 .text.HAL_TIM_OC_Start:0000014c $d
- /tmp/ccfdMfFA.s:8978 .text.HAL_TIM_OC_Stop:00000000 $t
- /tmp/ccfdMfFA.s:8984 .text.HAL_TIM_OC_Stop:00000000 HAL_TIM_OC_Stop
- /tmp/ccfdMfFA.s:9059 .text.HAL_TIM_OC_Stop:0000005e $d
- /tmp/ccfdMfFA.s:9115 .text.HAL_TIM_OC_Stop:000000a4 $d
- /tmp/ccfdMfFA.s:9121 .text.HAL_TIM_OC_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:9127 .text.HAL_TIM_OC_Start_IT:00000000 HAL_TIM_OC_Start_IT
- /tmp/ccfdMfFA.s:9150 .text.HAL_TIM_OC_Start_IT:0000000c $d
- /tmp/ccfdMfFA.s:9185 .text.HAL_TIM_OC_Start_IT:0000003a $d
- /tmp/ccfdMfFA.s:9388 .text.HAL_TIM_OC_Start_IT:0000015c $d
- /tmp/ccfdMfFA.s:9402 .text.HAL_TIM_OC_Start_IT:00000190 $t
- /tmp/ccfdMfFA.s:9448 .text.HAL_TIM_OC_Start_IT:000001b8 $d
- /tmp/ccfdMfFA.s:9455 .text.HAL_TIM_OC_Stop_IT:00000000 $t
- ARM GAS /tmp/ccfdMfFA.s page 497
+ /tmp/ccD3sdMs.s:5932 .text.HAL_TIM_OnePulse_Init:00000000 $t
+ /tmp/ccD3sdMs.s:5938 .text.HAL_TIM_OnePulse_Init:00000000 HAL_TIM_OnePulse_Init
+ /tmp/ccD3sdMs.s:6045 .text.HAL_TIM_Encoder_Init:00000000 $t
+ /tmp/ccD3sdMs.s:6051 .text.HAL_TIM_Encoder_Init:00000000 HAL_TIM_Encoder_Init
+ /tmp/ccD3sdMs.s:6259 .text.HAL_TIM_Encoder_Init:000000a4 $d
+ /tmp/ccD3sdMs.s:6266 .text.TIM_OC2_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:6272 .text.TIM_OC2_SetConfig:00000000 TIM_OC2_SetConfig
+ /tmp/ccD3sdMs.s:6410 .text.TIM_OC2_SetConfig:00000064 $d
+ /tmp/ccD3sdMs.s:6417 .text.HAL_TIM_OC_ConfigChannel:00000000 $t
+ /tmp/ccD3sdMs.s:6423 .text.HAL_TIM_OC_ConfigChannel:00000000 HAL_TIM_OC_ConfigChannel
+ /tmp/ccD3sdMs.s:6455 .text.HAL_TIM_OC_ConfigChannel:0000001a $d
+ /tmp/ccD3sdMs.s:6589 .text.HAL_TIM_PWM_ConfigChannel:00000000 $t
+ /tmp/ccD3sdMs.s:6595 .text.HAL_TIM_PWM_ConfigChannel:00000000 HAL_TIM_PWM_ConfigChannel
+ /tmp/ccD3sdMs.s:6632 .text.HAL_TIM_PWM_ConfigChannel:00000020 $d
+ /tmp/ccD3sdMs.s:6920 .text.TIM_TI1_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:6926 .text.TIM_TI1_SetConfig:00000000 TIM_TI1_SetConfig
+ /tmp/ccD3sdMs.s:7056 .text.TIM_TI1_SetConfig:00000088 $d
+ /tmp/ccD3sdMs.s:7063 .text.HAL_TIM_IC_ConfigChannel:00000000 $t
+ /tmp/ccD3sdMs.s:7069 .text.HAL_TIM_IC_ConfigChannel:00000000 HAL_TIM_IC_ConfigChannel
+ /tmp/ccD3sdMs.s:7107 .text.HAL_TIM_IC_ConfigChannel:0000001c $d
+ /tmp/ccD3sdMs.s:7294 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 $t
+ /tmp/ccD3sdMs.s:7300 .text.HAL_TIM_OnePulse_ConfigChannel:00000000 HAL_TIM_OnePulse_ConfigChannel
+ /tmp/ccD3sdMs.s:7573 .text.HAL_TIM_OnePulse_ConfigChannel:000000fc $d
+ /tmp/ccD3sdMs.s:7578 .text.TIM_ETR_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:7584 .text.TIM_ETR_SetConfig:00000000 TIM_ETR_SetConfig
+ /tmp/ccD3sdMs.s:7628 .text.HAL_TIM_ConfigOCrefClear:00000000 $t
+ /tmp/ccD3sdMs.s:7634 .text.HAL_TIM_ConfigOCrefClear:00000000 HAL_TIM_ConfigOCrefClear
+ /tmp/ccD3sdMs.s:7709 .text.HAL_TIM_ConfigOCrefClear:00000048 $d
+ /tmp/ccD3sdMs.s:7918 .text.HAL_TIM_ConfigClockSource:00000000 $t
+ /tmp/ccD3sdMs.s:7924 .text.HAL_TIM_ConfigClockSource:00000000 HAL_TIM_ConfigClockSource
+ /tmp/ccD3sdMs.s:8210 .text.HAL_TIM_ConfigClockSource:000000fc $d
+ /tmp/ccD3sdMs.s:8215 .text.TIM_SlaveTimer_SetConfig:00000000 $t
+ /tmp/ccD3sdMs.s:8220 .text.TIM_SlaveTimer_SetConfig:00000000 TIM_SlaveTimer_SetConfig
+ /tmp/ccD3sdMs.s:8474 .text.TIM_SlaveTimer_SetConfig:000000b8 $d
+ /tmp/ccD3sdMs.s:8479 .text.HAL_TIM_SlaveConfigSynchro:00000000 $t
+ /tmp/ccD3sdMs.s:8485 .text.HAL_TIM_SlaveConfigSynchro:00000000 HAL_TIM_SlaveConfigSynchro
+ /tmp/ccD3sdMs.s:8573 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 $t
+ /tmp/ccD3sdMs.s:8579 .text.HAL_TIM_SlaveConfigSynchro_IT:00000000 HAL_TIM_SlaveConfigSynchro_IT
+ /tmp/ccD3sdMs.s:8667 .text.TIM_CCxChannelCmd:00000000 $t
+ /tmp/ccD3sdMs.s:8673 .text.TIM_CCxChannelCmd:00000000 TIM_CCxChannelCmd
+ /tmp/ccD3sdMs.s:8713 .text.HAL_TIM_OC_Start:00000000 $t
+ /tmp/ccD3sdMs.s:8719 .text.HAL_TIM_OC_Start:00000000 HAL_TIM_OC_Start
+ /tmp/ccD3sdMs.s:8740 .text.HAL_TIM_OC_Start:0000000c $d
+ /tmp/ccD3sdMs.s:8775 .text.HAL_TIM_OC_Start:00000038 $d
+ /tmp/ccD3sdMs.s:8971 .text.HAL_TIM_OC_Start:0000014c $d
+ /tmp/ccD3sdMs.s:8978 .text.HAL_TIM_OC_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:8984 .text.HAL_TIM_OC_Stop:00000000 HAL_TIM_OC_Stop
+ /tmp/ccD3sdMs.s:9059 .text.HAL_TIM_OC_Stop:0000005e $d
+ /tmp/ccD3sdMs.s:9115 .text.HAL_TIM_OC_Stop:000000a4 $d
+ /tmp/ccD3sdMs.s:9121 .text.HAL_TIM_OC_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:9127 .text.HAL_TIM_OC_Start_IT:00000000 HAL_TIM_OC_Start_IT
+ /tmp/ccD3sdMs.s:9150 .text.HAL_TIM_OC_Start_IT:0000000c $d
+ /tmp/ccD3sdMs.s:9185 .text.HAL_TIM_OC_Start_IT:0000003a $d
+ /tmp/ccD3sdMs.s:9388 .text.HAL_TIM_OC_Start_IT:0000015c $d
+ /tmp/ccD3sdMs.s:9402 .text.HAL_TIM_OC_Start_IT:00000190 $t
+ /tmp/ccD3sdMs.s:9448 .text.HAL_TIM_OC_Start_IT:000001b8 $d
+ /tmp/ccD3sdMs.s:9455 .text.HAL_TIM_OC_Stop_IT:00000000 $t
+ ARM GAS /tmp/ccD3sdMs.s page 497
- /tmp/ccfdMfFA.s:9461 .text.HAL_TIM_OC_Stop_IT:00000000 HAL_TIM_OC_Stop_IT
- /tmp/ccfdMfFA.s:9486 .text.HAL_TIM_OC_Stop_IT:0000000e $d
- /tmp/ccfdMfFA.s:9569 .text.HAL_TIM_OC_Stop_IT:00000080 $d
- /tmp/ccfdMfFA.s:9666 .text.HAL_TIM_OC_Stop_IT:000000f8 $d
- /tmp/ccfdMfFA.s:9672 .text.HAL_TIM_OC_Start_DMA:00000000 $t
- /tmp/ccfdMfFA.s:9678 .text.HAL_TIM_OC_Start_DMA:00000000 HAL_TIM_OC_Start_DMA
- /tmp/ccfdMfFA.s:9706 .text.HAL_TIM_OC_Start_DMA:00000010 $d
- /tmp/ccfdMfFA.s:9744 .text.HAL_TIM_OC_Start_DMA:0000003e $d
- /tmp/ccfdMfFA.s:9851 .text.HAL_TIM_OC_Start_DMA:000000c8 $d
- /tmp/ccfdMfFA.s:9868 .text.HAL_TIM_OC_Start_DMA:000000ea $t
- /tmp/ccfdMfFA.s:10177 .text.HAL_TIM_OC_Start_DMA:00000290 $d
- /tmp/ccfdMfFA.s:10191 .text.HAL_TIM_OC_Start_DMA:000002c4 $t
- /tmp/ccfdMfFA.s:10260 .text.HAL_TIM_OC_Start_DMA:00000304 $d
- /tmp/ccfdMfFA.s:10270 .text.HAL_TIM_OC_Stop_DMA:00000000 $t
- /tmp/ccfdMfFA.s:10276 .text.HAL_TIM_OC_Stop_DMA:00000000 HAL_TIM_OC_Stop_DMA
- /tmp/ccfdMfFA.s:10301 .text.HAL_TIM_OC_Stop_DMA:0000000e $d
- /tmp/ccfdMfFA.s:10387 .text.HAL_TIM_OC_Stop_DMA:00000086 $d
- /tmp/ccfdMfFA.s:10506 .text.HAL_TIM_OC_Stop_DMA:00000110 $d
- /tmp/ccfdMfFA.s:10512 .text.HAL_TIM_PWM_Start:00000000 $t
- /tmp/ccfdMfFA.s:10518 .text.HAL_TIM_PWM_Start:00000000 HAL_TIM_PWM_Start
- /tmp/ccfdMfFA.s:10539 .text.HAL_TIM_PWM_Start:0000000c $d
- /tmp/ccfdMfFA.s:10574 .text.HAL_TIM_PWM_Start:00000038 $d
- /tmp/ccfdMfFA.s:10770 .text.HAL_TIM_PWM_Start:0000014c $d
- /tmp/ccfdMfFA.s:10777 .text.HAL_TIM_PWM_Stop:00000000 $t
- /tmp/ccfdMfFA.s:10783 .text.HAL_TIM_PWM_Stop:00000000 HAL_TIM_PWM_Stop
- /tmp/ccfdMfFA.s:10858 .text.HAL_TIM_PWM_Stop:0000005e $d
- /tmp/ccfdMfFA.s:10914 .text.HAL_TIM_PWM_Stop:000000a4 $d
- /tmp/ccfdMfFA.s:10920 .text.HAL_TIM_PWM_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:10926 .text.HAL_TIM_PWM_Start_IT:00000000 HAL_TIM_PWM_Start_IT
- /tmp/ccfdMfFA.s:10949 .text.HAL_TIM_PWM_Start_IT:0000000c $d
- /tmp/ccfdMfFA.s:10984 .text.HAL_TIM_PWM_Start_IT:0000003a $d
- /tmp/ccfdMfFA.s:11187 .text.HAL_TIM_PWM_Start_IT:0000015c $d
- /tmp/ccfdMfFA.s:11201 .text.HAL_TIM_PWM_Start_IT:00000190 $t
- /tmp/ccfdMfFA.s:11247 .text.HAL_TIM_PWM_Start_IT:000001b8 $d
- /tmp/ccfdMfFA.s:11254 .text.HAL_TIM_PWM_Stop_IT:00000000 $t
- /tmp/ccfdMfFA.s:11260 .text.HAL_TIM_PWM_Stop_IT:00000000 HAL_TIM_PWM_Stop_IT
- /tmp/ccfdMfFA.s:11285 .text.HAL_TIM_PWM_Stop_IT:0000000e $d
- /tmp/ccfdMfFA.s:11368 .text.HAL_TIM_PWM_Stop_IT:00000080 $d
- /tmp/ccfdMfFA.s:11465 .text.HAL_TIM_PWM_Stop_IT:000000f8 $d
- /tmp/ccfdMfFA.s:11471 .text.HAL_TIM_PWM_Start_DMA:00000000 $t
- /tmp/ccfdMfFA.s:11477 .text.HAL_TIM_PWM_Start_DMA:00000000 HAL_TIM_PWM_Start_DMA
- /tmp/ccfdMfFA.s:11505 .text.HAL_TIM_PWM_Start_DMA:00000010 $d
- /tmp/ccfdMfFA.s:11543 .text.HAL_TIM_PWM_Start_DMA:0000003e $d
- /tmp/ccfdMfFA.s:11650 .text.HAL_TIM_PWM_Start_DMA:000000c8 $d
- /tmp/ccfdMfFA.s:11667 .text.HAL_TIM_PWM_Start_DMA:000000ea $t
- /tmp/ccfdMfFA.s:11976 .text.HAL_TIM_PWM_Start_DMA:00000290 $d
- /tmp/ccfdMfFA.s:11990 .text.HAL_TIM_PWM_Start_DMA:000002c4 $t
- /tmp/ccfdMfFA.s:12059 .text.HAL_TIM_PWM_Start_DMA:00000304 $d
- /tmp/ccfdMfFA.s:12069 .text.HAL_TIM_PWM_Stop_DMA:00000000 $t
- /tmp/ccfdMfFA.s:12075 .text.HAL_TIM_PWM_Stop_DMA:00000000 HAL_TIM_PWM_Stop_DMA
- /tmp/ccfdMfFA.s:12100 .text.HAL_TIM_PWM_Stop_DMA:0000000e $d
- /tmp/ccfdMfFA.s:12186 .text.HAL_TIM_PWM_Stop_DMA:00000086 $d
- /tmp/ccfdMfFA.s:12305 .text.HAL_TIM_PWM_Stop_DMA:00000110 $d
- /tmp/ccfdMfFA.s:12311 .text.HAL_TIM_IC_Start:00000000 $t
- /tmp/ccfdMfFA.s:12317 .text.HAL_TIM_IC_Start:00000000 HAL_TIM_IC_Start
- /tmp/ccfdMfFA.s:12337 .text.HAL_TIM_IC_Start:0000000c $d
- /tmp/ccfdMfFA.s:12382 .text.HAL_TIM_IC_Start:0000003e $d
- ARM GAS /tmp/ccfdMfFA.s page 498
+ /tmp/ccD3sdMs.s:9461 .text.HAL_TIM_OC_Stop_IT:00000000 HAL_TIM_OC_Stop_IT
+ /tmp/ccD3sdMs.s:9486 .text.HAL_TIM_OC_Stop_IT:0000000e $d
+ /tmp/ccD3sdMs.s:9569 .text.HAL_TIM_OC_Stop_IT:00000080 $d
+ /tmp/ccD3sdMs.s:9666 .text.HAL_TIM_OC_Stop_IT:000000f8 $d
+ /tmp/ccD3sdMs.s:9672 .text.HAL_TIM_OC_Start_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:9678 .text.HAL_TIM_OC_Start_DMA:00000000 HAL_TIM_OC_Start_DMA
+ /tmp/ccD3sdMs.s:9706 .text.HAL_TIM_OC_Start_DMA:00000010 $d
+ /tmp/ccD3sdMs.s:9744 .text.HAL_TIM_OC_Start_DMA:0000003e $d
+ /tmp/ccD3sdMs.s:9851 .text.HAL_TIM_OC_Start_DMA:000000c8 $d
+ /tmp/ccD3sdMs.s:9868 .text.HAL_TIM_OC_Start_DMA:000000ea $t
+ /tmp/ccD3sdMs.s:10177 .text.HAL_TIM_OC_Start_DMA:00000290 $d
+ /tmp/ccD3sdMs.s:10191 .text.HAL_TIM_OC_Start_DMA:000002c4 $t
+ /tmp/ccD3sdMs.s:10260 .text.HAL_TIM_OC_Start_DMA:00000304 $d
+ /tmp/ccD3sdMs.s:10270 .text.HAL_TIM_OC_Stop_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:10276 .text.HAL_TIM_OC_Stop_DMA:00000000 HAL_TIM_OC_Stop_DMA
+ /tmp/ccD3sdMs.s:10301 .text.HAL_TIM_OC_Stop_DMA:0000000e $d
+ /tmp/ccD3sdMs.s:10387 .text.HAL_TIM_OC_Stop_DMA:00000086 $d
+ /tmp/ccD3sdMs.s:10506 .text.HAL_TIM_OC_Stop_DMA:00000110 $d
+ /tmp/ccD3sdMs.s:10512 .text.HAL_TIM_PWM_Start:00000000 $t
+ /tmp/ccD3sdMs.s:10518 .text.HAL_TIM_PWM_Start:00000000 HAL_TIM_PWM_Start
+ /tmp/ccD3sdMs.s:10539 .text.HAL_TIM_PWM_Start:0000000c $d
+ /tmp/ccD3sdMs.s:10574 .text.HAL_TIM_PWM_Start:00000038 $d
+ /tmp/ccD3sdMs.s:10770 .text.HAL_TIM_PWM_Start:0000014c $d
+ /tmp/ccD3sdMs.s:10777 .text.HAL_TIM_PWM_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:10783 .text.HAL_TIM_PWM_Stop:00000000 HAL_TIM_PWM_Stop
+ /tmp/ccD3sdMs.s:10858 .text.HAL_TIM_PWM_Stop:0000005e $d
+ /tmp/ccD3sdMs.s:10914 .text.HAL_TIM_PWM_Stop:000000a4 $d
+ /tmp/ccD3sdMs.s:10920 .text.HAL_TIM_PWM_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:10926 .text.HAL_TIM_PWM_Start_IT:00000000 HAL_TIM_PWM_Start_IT
+ /tmp/ccD3sdMs.s:10949 .text.HAL_TIM_PWM_Start_IT:0000000c $d
+ /tmp/ccD3sdMs.s:10984 .text.HAL_TIM_PWM_Start_IT:0000003a $d
+ /tmp/ccD3sdMs.s:11187 .text.HAL_TIM_PWM_Start_IT:0000015c $d
+ /tmp/ccD3sdMs.s:11201 .text.HAL_TIM_PWM_Start_IT:00000190 $t
+ /tmp/ccD3sdMs.s:11247 .text.HAL_TIM_PWM_Start_IT:000001b8 $d
+ /tmp/ccD3sdMs.s:11254 .text.HAL_TIM_PWM_Stop_IT:00000000 $t
+ /tmp/ccD3sdMs.s:11260 .text.HAL_TIM_PWM_Stop_IT:00000000 HAL_TIM_PWM_Stop_IT
+ /tmp/ccD3sdMs.s:11285 .text.HAL_TIM_PWM_Stop_IT:0000000e $d
+ /tmp/ccD3sdMs.s:11368 .text.HAL_TIM_PWM_Stop_IT:00000080 $d
+ /tmp/ccD3sdMs.s:11465 .text.HAL_TIM_PWM_Stop_IT:000000f8 $d
+ /tmp/ccD3sdMs.s:11471 .text.HAL_TIM_PWM_Start_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:11477 .text.HAL_TIM_PWM_Start_DMA:00000000 HAL_TIM_PWM_Start_DMA
+ /tmp/ccD3sdMs.s:11505 .text.HAL_TIM_PWM_Start_DMA:00000010 $d
+ /tmp/ccD3sdMs.s:11543 .text.HAL_TIM_PWM_Start_DMA:0000003e $d
+ /tmp/ccD3sdMs.s:11650 .text.HAL_TIM_PWM_Start_DMA:000000c8 $d
+ /tmp/ccD3sdMs.s:11667 .text.HAL_TIM_PWM_Start_DMA:000000ea $t
+ /tmp/ccD3sdMs.s:11976 .text.HAL_TIM_PWM_Start_DMA:00000290 $d
+ /tmp/ccD3sdMs.s:11990 .text.HAL_TIM_PWM_Start_DMA:000002c4 $t
+ /tmp/ccD3sdMs.s:12059 .text.HAL_TIM_PWM_Start_DMA:00000304 $d
+ /tmp/ccD3sdMs.s:12069 .text.HAL_TIM_PWM_Stop_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:12075 .text.HAL_TIM_PWM_Stop_DMA:00000000 HAL_TIM_PWM_Stop_DMA
+ /tmp/ccD3sdMs.s:12100 .text.HAL_TIM_PWM_Stop_DMA:0000000e $d
+ /tmp/ccD3sdMs.s:12186 .text.HAL_TIM_PWM_Stop_DMA:00000086 $d
+ /tmp/ccD3sdMs.s:12305 .text.HAL_TIM_PWM_Stop_DMA:00000110 $d
+ /tmp/ccD3sdMs.s:12311 .text.HAL_TIM_IC_Start:00000000 $t
+ /tmp/ccD3sdMs.s:12317 .text.HAL_TIM_IC_Start:00000000 HAL_TIM_IC_Start
+ /tmp/ccD3sdMs.s:12337 .text.HAL_TIM_IC_Start:0000000c $d
+ /tmp/ccD3sdMs.s:12382 .text.HAL_TIM_IC_Start:0000003e $d
+ ARM GAS /tmp/ccD3sdMs.s page 498
- /tmp/ccfdMfFA.s:12596 .text.HAL_TIM_IC_Start:00000160 $d
- /tmp/ccfdMfFA.s:12602 .text.HAL_TIM_IC_Stop:00000000 $t
- /tmp/ccfdMfFA.s:12608 .text.HAL_TIM_IC_Stop:00000000 HAL_TIM_IC_Stop
- /tmp/ccfdMfFA.s:12656 .text.HAL_TIM_IC_Stop:00000034 $d
- /tmp/ccfdMfFA.s:12741 .text.HAL_TIM_IC_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:12747 .text.HAL_TIM_IC_Start_IT:00000000 HAL_TIM_IC_Start_IT
- /tmp/ccfdMfFA.s:12769 .text.HAL_TIM_IC_Start_IT:0000000c $d
- /tmp/ccfdMfFA.s:12814 .text.HAL_TIM_IC_Start_IT:0000003e $d
- /tmp/ccfdMfFA.s:12909 .text.HAL_TIM_IC_Start_IT:000000c0 $d
- /tmp/ccfdMfFA.s:13096 .text.HAL_TIM_IC_Start_IT:000001a4 $d
- /tmp/ccfdMfFA.s:13102 .text.HAL_TIM_IC_Stop_IT:00000000 $t
- /tmp/ccfdMfFA.s:13108 .text.HAL_TIM_IC_Stop_IT:00000000 HAL_TIM_IC_Stop_IT
- /tmp/ccfdMfFA.s:13133 .text.HAL_TIM_IC_Stop_IT:0000000e $d
- /tmp/ccfdMfFA.s:13189 .text.HAL_TIM_IC_Stop_IT:00000056 $d
- /tmp/ccfdMfFA.s:13312 .text.HAL_TIM_IC_Start_DMA:00000000 $t
- /tmp/ccfdMfFA.s:13318 .text.HAL_TIM_IC_Start_DMA:00000000 HAL_TIM_IC_Start_DMA
- /tmp/ccfdMfFA.s:13348 .text.HAL_TIM_IC_Start_DMA:00000012 $d
- /tmp/ccfdMfFA.s:13408 .text.HAL_TIM_IC_Start_DMA:00000058 $d
- /tmp/ccfdMfFA.s:13523 .text.HAL_TIM_IC_Start_DMA:000000e6 $d
- /tmp/ccfdMfFA.s:13835 .text.HAL_TIM_IC_Start_DMA:00000268 $d
- /tmp/ccfdMfFA.s:13844 .text.HAL_TIM_IC_Stop_DMA:00000000 $t
- /tmp/ccfdMfFA.s:13850 .text.HAL_TIM_IC_Stop_DMA:00000000 HAL_TIM_IC_Stop_DMA
- /tmp/ccfdMfFA.s:13883 .text.HAL_TIM_IC_Stop_DMA:00000016 $d
- /tmp/ccfdMfFA.s:13934 .text.HAL_TIM_IC_Stop_DMA:0000005a $d
- /tmp/ccfdMfFA.s:14069 .text.HAL_TIM_OnePulse_Start:00000000 $t
- /tmp/ccfdMfFA.s:14075 .text.HAL_TIM_OnePulse_Start:00000000 HAL_TIM_OnePulse_Start
- /tmp/ccfdMfFA.s:14196 .text.HAL_TIM_OnePulse_Start:0000007c $d
- /tmp/ccfdMfFA.s:14202 .text.HAL_TIM_OnePulse_Stop:00000000 $t
- /tmp/ccfdMfFA.s:14208 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop
- /tmp/ccfdMfFA.s:14302 .text.HAL_TIM_OnePulse_Stop:00000078 $d
- /tmp/ccfdMfFA.s:14308 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:14314 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT
- /tmp/ccfdMfFA.s:14445 .text.HAL_TIM_OnePulse_Start_IT:00000090 $d
- /tmp/ccfdMfFA.s:14451 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t
- /tmp/ccfdMfFA.s:14457 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT
- /tmp/ccfdMfFA.s:14561 .text.HAL_TIM_OnePulse_Stop_IT:0000008c $d
- /tmp/ccfdMfFA.s:14567 .text.HAL_TIM_Encoder_Start:00000000 $t
- /tmp/ccfdMfFA.s:14573 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start
- /tmp/ccfdMfFA.s:14774 .text.HAL_TIM_Encoder_Stop:00000000 $t
- /tmp/ccfdMfFA.s:14780 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop
- /tmp/ccfdMfFA.s:14863 .text.HAL_TIM_Encoder_Stop:0000005a $d
- /tmp/ccfdMfFA.s:14977 .text.HAL_TIM_Encoder_Start_IT:00000000 $t
- /tmp/ccfdMfFA.s:14983 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT
- /tmp/ccfdMfFA.s:15206 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t
- /tmp/ccfdMfFA.s:15212 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT
- /tmp/ccfdMfFA.s:15294 .text.HAL_TIM_Encoder_Stop_IT:00000064 $d
- /tmp/ccfdMfFA.s:15430 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t
- /tmp/ccfdMfFA.s:15436 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA
- /tmp/ccfdMfFA.s:15920 .text.HAL_TIM_Encoder_Start_DMA:00000240 $d
- /tmp/ccfdMfFA.s:15927 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t
- /tmp/ccfdMfFA.s:15933 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA
- /tmp/ccfdMfFA.s:16025 .text.HAL_TIM_Encoder_Stop_DMA:00000070 $d
- /tmp/ccfdMfFA.s:3750 .text.HAL_TIM_ReadCapturedValue:00000015 $d
- /tmp/ccfdMfFA.s:3750 .text.HAL_TIM_ReadCapturedValue:00000016 $t
- /tmp/ccfdMfFA.s:5219 .text.HAL_TIM_GetChannelState:00000019 $d
- /tmp/ccfdMfFA.s:5219 .text.HAL_TIM_GetChannelState:0000001a $t
- /tmp/ccfdMfFA.s:6476 .text.HAL_TIM_OC_ConfigChannel:0000002f $d
- ARM GAS /tmp/ccfdMfFA.s page 499
+ /tmp/ccD3sdMs.s:12596 .text.HAL_TIM_IC_Start:00000160 $d
+ /tmp/ccD3sdMs.s:12602 .text.HAL_TIM_IC_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:12608 .text.HAL_TIM_IC_Stop:00000000 HAL_TIM_IC_Stop
+ /tmp/ccD3sdMs.s:12656 .text.HAL_TIM_IC_Stop:00000034 $d
+ /tmp/ccD3sdMs.s:12741 .text.HAL_TIM_IC_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:12747 .text.HAL_TIM_IC_Start_IT:00000000 HAL_TIM_IC_Start_IT
+ /tmp/ccD3sdMs.s:12769 .text.HAL_TIM_IC_Start_IT:0000000c $d
+ /tmp/ccD3sdMs.s:12814 .text.HAL_TIM_IC_Start_IT:0000003e $d
+ /tmp/ccD3sdMs.s:12909 .text.HAL_TIM_IC_Start_IT:000000c0 $d
+ /tmp/ccD3sdMs.s:13096 .text.HAL_TIM_IC_Start_IT:000001a4 $d
+ /tmp/ccD3sdMs.s:13102 .text.HAL_TIM_IC_Stop_IT:00000000 $t
+ /tmp/ccD3sdMs.s:13108 .text.HAL_TIM_IC_Stop_IT:00000000 HAL_TIM_IC_Stop_IT
+ /tmp/ccD3sdMs.s:13133 .text.HAL_TIM_IC_Stop_IT:0000000e $d
+ /tmp/ccD3sdMs.s:13189 .text.HAL_TIM_IC_Stop_IT:00000056 $d
+ /tmp/ccD3sdMs.s:13312 .text.HAL_TIM_IC_Start_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:13318 .text.HAL_TIM_IC_Start_DMA:00000000 HAL_TIM_IC_Start_DMA
+ /tmp/ccD3sdMs.s:13348 .text.HAL_TIM_IC_Start_DMA:00000012 $d
+ /tmp/ccD3sdMs.s:13408 .text.HAL_TIM_IC_Start_DMA:00000058 $d
+ /tmp/ccD3sdMs.s:13523 .text.HAL_TIM_IC_Start_DMA:000000e6 $d
+ /tmp/ccD3sdMs.s:13835 .text.HAL_TIM_IC_Start_DMA:00000268 $d
+ /tmp/ccD3sdMs.s:13844 .text.HAL_TIM_IC_Stop_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:13850 .text.HAL_TIM_IC_Stop_DMA:00000000 HAL_TIM_IC_Stop_DMA
+ /tmp/ccD3sdMs.s:13883 .text.HAL_TIM_IC_Stop_DMA:00000016 $d
+ /tmp/ccD3sdMs.s:13934 .text.HAL_TIM_IC_Stop_DMA:0000005a $d
+ /tmp/ccD3sdMs.s:14069 .text.HAL_TIM_OnePulse_Start:00000000 $t
+ /tmp/ccD3sdMs.s:14075 .text.HAL_TIM_OnePulse_Start:00000000 HAL_TIM_OnePulse_Start
+ /tmp/ccD3sdMs.s:14196 .text.HAL_TIM_OnePulse_Start:0000007c $d
+ /tmp/ccD3sdMs.s:14202 .text.HAL_TIM_OnePulse_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:14208 .text.HAL_TIM_OnePulse_Stop:00000000 HAL_TIM_OnePulse_Stop
+ /tmp/ccD3sdMs.s:14302 .text.HAL_TIM_OnePulse_Stop:00000078 $d
+ /tmp/ccD3sdMs.s:14308 .text.HAL_TIM_OnePulse_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:14314 .text.HAL_TIM_OnePulse_Start_IT:00000000 HAL_TIM_OnePulse_Start_IT
+ /tmp/ccD3sdMs.s:14445 .text.HAL_TIM_OnePulse_Start_IT:00000090 $d
+ /tmp/ccD3sdMs.s:14451 .text.HAL_TIM_OnePulse_Stop_IT:00000000 $t
+ /tmp/ccD3sdMs.s:14457 .text.HAL_TIM_OnePulse_Stop_IT:00000000 HAL_TIM_OnePulse_Stop_IT
+ /tmp/ccD3sdMs.s:14561 .text.HAL_TIM_OnePulse_Stop_IT:0000008c $d
+ /tmp/ccD3sdMs.s:14567 .text.HAL_TIM_Encoder_Start:00000000 $t
+ /tmp/ccD3sdMs.s:14573 .text.HAL_TIM_Encoder_Start:00000000 HAL_TIM_Encoder_Start
+ /tmp/ccD3sdMs.s:14774 .text.HAL_TIM_Encoder_Stop:00000000 $t
+ /tmp/ccD3sdMs.s:14780 .text.HAL_TIM_Encoder_Stop:00000000 HAL_TIM_Encoder_Stop
+ /tmp/ccD3sdMs.s:14863 .text.HAL_TIM_Encoder_Stop:0000005a $d
+ /tmp/ccD3sdMs.s:14977 .text.HAL_TIM_Encoder_Start_IT:00000000 $t
+ /tmp/ccD3sdMs.s:14983 .text.HAL_TIM_Encoder_Start_IT:00000000 HAL_TIM_Encoder_Start_IT
+ /tmp/ccD3sdMs.s:15206 .text.HAL_TIM_Encoder_Stop_IT:00000000 $t
+ /tmp/ccD3sdMs.s:15212 .text.HAL_TIM_Encoder_Stop_IT:00000000 HAL_TIM_Encoder_Stop_IT
+ /tmp/ccD3sdMs.s:15294 .text.HAL_TIM_Encoder_Stop_IT:00000064 $d
+ /tmp/ccD3sdMs.s:15430 .text.HAL_TIM_Encoder_Start_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:15436 .text.HAL_TIM_Encoder_Start_DMA:00000000 HAL_TIM_Encoder_Start_DMA
+ /tmp/ccD3sdMs.s:15920 .text.HAL_TIM_Encoder_Start_DMA:00000240 $d
+ /tmp/ccD3sdMs.s:15927 .text.HAL_TIM_Encoder_Stop_DMA:00000000 $t
+ /tmp/ccD3sdMs.s:15933 .text.HAL_TIM_Encoder_Stop_DMA:00000000 HAL_TIM_Encoder_Stop_DMA
+ /tmp/ccD3sdMs.s:16025 .text.HAL_TIM_Encoder_Stop_DMA:00000070 $d
+ /tmp/ccD3sdMs.s:3750 .text.HAL_TIM_ReadCapturedValue:00000015 $d
+ /tmp/ccD3sdMs.s:3750 .text.HAL_TIM_ReadCapturedValue:00000016 $t
+ /tmp/ccD3sdMs.s:5219 .text.HAL_TIM_GetChannelState:00000019 $d
+ /tmp/ccD3sdMs.s:5219 .text.HAL_TIM_GetChannelState:0000001a $t
+ /tmp/ccD3sdMs.s:6476 .text.HAL_TIM_OC_ConfigChannel:0000002f $d
+ ARM GAS /tmp/ccD3sdMs.s page 499
- /tmp/ccfdMfFA.s:6476 .text.HAL_TIM_OC_ConfigChannel:00000030 $t
- /tmp/ccfdMfFA.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000035 $d
- /tmp/ccfdMfFA.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000036 $t
- /tmp/ccfdMfFA.s:7120 .text.HAL_TIM_IC_ConfigChannel:00000029 $d
- /tmp/ccfdMfFA.s:7120 .text.HAL_TIM_IC_ConfigChannel:0000002a $t
- /tmp/ccfdMfFA.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005d $d
- /tmp/ccfdMfFA.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005e $t
- /tmp/ccfdMfFA.s:8757 .text.HAL_TIM_OC_Start:0000001d $d
- /tmp/ccfdMfFA.s:8757 .text.HAL_TIM_OC_Start:0000001e $t
- /tmp/ccfdMfFA.s:8792 .text.HAL_TIM_OC_Start:00000049 $d
- /tmp/ccfdMfFA.s:8792 .text.HAL_TIM_OC_Start:0000004a $t
- /tmp/ccfdMfFA.s:9076 .text.HAL_TIM_OC_Stop:0000006f $d
- /tmp/ccfdMfFA.s:9076 .text.HAL_TIM_OC_Stop:00000070 $t
- /tmp/ccfdMfFA.s:9167 .text.HAL_TIM_OC_Start_IT:0000001d $d
- /tmp/ccfdMfFA.s:9167 .text.HAL_TIM_OC_Start_IT:0000001e $t
- /tmp/ccfdMfFA.s:9202 .text.HAL_TIM_OC_Start_IT:0000004b $d
- /tmp/ccfdMfFA.s:9202 .text.HAL_TIM_OC_Start_IT:0000004c $t
- /tmp/ccfdMfFA.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001b $d
- /tmp/ccfdMfFA.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001c $t
- /tmp/ccfdMfFA.s:9587 .text.HAL_TIM_OC_Stop_IT:00000091 $d
- /tmp/ccfdMfFA.s:9587 .text.HAL_TIM_OC_Stop_IT:00000092 $t
- /tmp/ccfdMfFA.s:9723 .text.HAL_TIM_OC_Start_DMA:00000021 $d
- /tmp/ccfdMfFA.s:9723 .text.HAL_TIM_OC_Start_DMA:00000022 $t
- /tmp/ccfdMfFA.s:9762 .text.HAL_TIM_OC_Start_DMA:0000004f $d
- /tmp/ccfdMfFA.s:9762 .text.HAL_TIM_OC_Start_DMA:00000050 $t
- /tmp/ccfdMfFA.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001b $d
- /tmp/ccfdMfFA.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001c $t
- /tmp/ccfdMfFA.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000097 $d
- /tmp/ccfdMfFA.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000098 $t
- /tmp/ccfdMfFA.s:10556 .text.HAL_TIM_PWM_Start:0000001d $d
- /tmp/ccfdMfFA.s:10556 .text.HAL_TIM_PWM_Start:0000001e $t
- /tmp/ccfdMfFA.s:10591 .text.HAL_TIM_PWM_Start:00000049 $d
- /tmp/ccfdMfFA.s:10591 .text.HAL_TIM_PWM_Start:0000004a $t
- /tmp/ccfdMfFA.s:10875 .text.HAL_TIM_PWM_Stop:0000006f $d
- /tmp/ccfdMfFA.s:10875 .text.HAL_TIM_PWM_Stop:00000070 $t
- /tmp/ccfdMfFA.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001d $d
- /tmp/ccfdMfFA.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001e $t
- /tmp/ccfdMfFA.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004b $d
- /tmp/ccfdMfFA.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004c $t
- /tmp/ccfdMfFA.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001b $d
- /tmp/ccfdMfFA.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001c $t
- /tmp/ccfdMfFA.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000091 $d
- /tmp/ccfdMfFA.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000092 $t
- /tmp/ccfdMfFA.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000021 $d
- /tmp/ccfdMfFA.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000022 $t
- /tmp/ccfdMfFA.s:11561 .text.HAL_TIM_PWM_Start_DMA:0000004f $d
- /tmp/ccfdMfFA.s:11561 .text.HAL_TIM_PWM_Start_DMA:00000050 $t
- /tmp/ccfdMfFA.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001b $d
- /tmp/ccfdMfFA.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001c $t
- /tmp/ccfdMfFA.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000097 $d
- /tmp/ccfdMfFA.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000098 $t
- /tmp/ccfdMfFA.s:12354 .text.HAL_TIM_IC_Start:0000001d $d
- /tmp/ccfdMfFA.s:12354 .text.HAL_TIM_IC_Start:0000001e $t
- /tmp/ccfdMfFA.s:12399 .text.HAL_TIM_IC_Start:0000004f $d
- /tmp/ccfdMfFA.s:12399 .text.HAL_TIM_IC_Start:00000050 $t
- /tmp/ccfdMfFA.s:12673 .text.HAL_TIM_IC_Stop:00000045 $d
- /tmp/ccfdMfFA.s:12673 .text.HAL_TIM_IC_Stop:00000046 $t
- ARM GAS /tmp/ccfdMfFA.s page 500
+ /tmp/ccD3sdMs.s:6476 .text.HAL_TIM_OC_ConfigChannel:00000030 $t
+ /tmp/ccD3sdMs.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000035 $d
+ /tmp/ccD3sdMs.s:6653 .text.HAL_TIM_PWM_ConfigChannel:00000036 $t
+ /tmp/ccD3sdMs.s:7120 .text.HAL_TIM_IC_ConfigChannel:00000029 $d
+ /tmp/ccD3sdMs.s:7120 .text.HAL_TIM_IC_ConfigChannel:0000002a $t
+ /tmp/ccD3sdMs.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005d $d
+ /tmp/ccD3sdMs.s:7731 .text.HAL_TIM_ConfigOCrefClear:0000005e $t
+ /tmp/ccD3sdMs.s:8757 .text.HAL_TIM_OC_Start:0000001d $d
+ /tmp/ccD3sdMs.s:8757 .text.HAL_TIM_OC_Start:0000001e $t
+ /tmp/ccD3sdMs.s:8792 .text.HAL_TIM_OC_Start:00000049 $d
+ /tmp/ccD3sdMs.s:8792 .text.HAL_TIM_OC_Start:0000004a $t
+ /tmp/ccD3sdMs.s:9076 .text.HAL_TIM_OC_Stop:0000006f $d
+ /tmp/ccD3sdMs.s:9076 .text.HAL_TIM_OC_Stop:00000070 $t
+ /tmp/ccD3sdMs.s:9167 .text.HAL_TIM_OC_Start_IT:0000001d $d
+ /tmp/ccD3sdMs.s:9167 .text.HAL_TIM_OC_Start_IT:0000001e $t
+ /tmp/ccD3sdMs.s:9202 .text.HAL_TIM_OC_Start_IT:0000004b $d
+ /tmp/ccD3sdMs.s:9202 .text.HAL_TIM_OC_Start_IT:0000004c $t
+ /tmp/ccD3sdMs.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001b $d
+ /tmp/ccD3sdMs.s:9499 .text.HAL_TIM_OC_Stop_IT:0000001c $t
+ /tmp/ccD3sdMs.s:9587 .text.HAL_TIM_OC_Stop_IT:00000091 $d
+ /tmp/ccD3sdMs.s:9587 .text.HAL_TIM_OC_Stop_IT:00000092 $t
+ /tmp/ccD3sdMs.s:9723 .text.HAL_TIM_OC_Start_DMA:00000021 $d
+ /tmp/ccD3sdMs.s:9723 .text.HAL_TIM_OC_Start_DMA:00000022 $t
+ /tmp/ccD3sdMs.s:9762 .text.HAL_TIM_OC_Start_DMA:0000004f $d
+ /tmp/ccD3sdMs.s:9762 .text.HAL_TIM_OC_Start_DMA:00000050 $t
+ /tmp/ccD3sdMs.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001b $d
+ /tmp/ccD3sdMs.s:10314 .text.HAL_TIM_OC_Stop_DMA:0000001c $t
+ /tmp/ccD3sdMs.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000097 $d
+ /tmp/ccD3sdMs.s:10405 .text.HAL_TIM_OC_Stop_DMA:00000098 $t
+ /tmp/ccD3sdMs.s:10556 .text.HAL_TIM_PWM_Start:0000001d $d
+ /tmp/ccD3sdMs.s:10556 .text.HAL_TIM_PWM_Start:0000001e $t
+ /tmp/ccD3sdMs.s:10591 .text.HAL_TIM_PWM_Start:00000049 $d
+ /tmp/ccD3sdMs.s:10591 .text.HAL_TIM_PWM_Start:0000004a $t
+ /tmp/ccD3sdMs.s:10875 .text.HAL_TIM_PWM_Stop:0000006f $d
+ /tmp/ccD3sdMs.s:10875 .text.HAL_TIM_PWM_Stop:00000070 $t
+ /tmp/ccD3sdMs.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001d $d
+ /tmp/ccD3sdMs.s:10966 .text.HAL_TIM_PWM_Start_IT:0000001e $t
+ /tmp/ccD3sdMs.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004b $d
+ /tmp/ccD3sdMs.s:11001 .text.HAL_TIM_PWM_Start_IT:0000004c $t
+ /tmp/ccD3sdMs.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001b $d
+ /tmp/ccD3sdMs.s:11298 .text.HAL_TIM_PWM_Stop_IT:0000001c $t
+ /tmp/ccD3sdMs.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000091 $d
+ /tmp/ccD3sdMs.s:11386 .text.HAL_TIM_PWM_Stop_IT:00000092 $t
+ /tmp/ccD3sdMs.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000021 $d
+ /tmp/ccD3sdMs.s:11522 .text.HAL_TIM_PWM_Start_DMA:00000022 $t
+ /tmp/ccD3sdMs.s:11561 .text.HAL_TIM_PWM_Start_DMA:0000004f $d
+ /tmp/ccD3sdMs.s:11561 .text.HAL_TIM_PWM_Start_DMA:00000050 $t
+ /tmp/ccD3sdMs.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001b $d
+ /tmp/ccD3sdMs.s:12113 .text.HAL_TIM_PWM_Stop_DMA:0000001c $t
+ /tmp/ccD3sdMs.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000097 $d
+ /tmp/ccD3sdMs.s:12204 .text.HAL_TIM_PWM_Stop_DMA:00000098 $t
+ /tmp/ccD3sdMs.s:12354 .text.HAL_TIM_IC_Start:0000001d $d
+ /tmp/ccD3sdMs.s:12354 .text.HAL_TIM_IC_Start:0000001e $t
+ /tmp/ccD3sdMs.s:12399 .text.HAL_TIM_IC_Start:0000004f $d
+ /tmp/ccD3sdMs.s:12399 .text.HAL_TIM_IC_Start:00000050 $t
+ /tmp/ccD3sdMs.s:12673 .text.HAL_TIM_IC_Stop:00000045 $d
+ /tmp/ccD3sdMs.s:12673 .text.HAL_TIM_IC_Stop:00000046 $t
+ ARM GAS /tmp/ccD3sdMs.s page 500
- /tmp/ccfdMfFA.s:12786 .text.HAL_TIM_IC_Start_IT:0000001d $d
- /tmp/ccfdMfFA.s:12786 .text.HAL_TIM_IC_Start_IT:0000001e $t
- /tmp/ccfdMfFA.s:12831 .text.HAL_TIM_IC_Start_IT:0000004f $d
- /tmp/ccfdMfFA.s:12831 .text.HAL_TIM_IC_Start_IT:00000050 $t
- /tmp/ccfdMfFA.s:12922 .text.HAL_TIM_IC_Start_IT:000000cd $d
- /tmp/ccfdMfFA.s:12922 .text.HAL_TIM_IC_Start_IT:000000ce $t
- /tmp/ccfdMfFA.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001b $d
- /tmp/ccfdMfFA.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001c $t
- /tmp/ccfdMfFA.s:13207 .text.HAL_TIM_IC_Stop_IT:00000067 $d
- /tmp/ccfdMfFA.s:13207 .text.HAL_TIM_IC_Stop_IT:00000068 $t
- /tmp/ccfdMfFA.s:13365 .text.HAL_TIM_IC_Start_DMA:00000023 $d
- /tmp/ccfdMfFA.s:13365 .text.HAL_TIM_IC_Start_DMA:00000024 $t
- /tmp/ccfdMfFA.s:13425 .text.HAL_TIM_IC_Start_DMA:00000069 $d
- /tmp/ccfdMfFA.s:13425 .text.HAL_TIM_IC_Start_DMA:0000006a $t
- /tmp/ccfdMfFA.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f3 $d
- /tmp/ccfdMfFA.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f4 $t
- /tmp/ccfdMfFA.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000023 $d
- /tmp/ccfdMfFA.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000024 $t
- /tmp/ccfdMfFA.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006b $d
- /tmp/ccfdMfFA.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006c $t
- /tmp/ccfdMfFA.s:14881 .text.HAL_TIM_Encoder_Stop:0000006b $d
- /tmp/ccfdMfFA.s:14881 .text.HAL_TIM_Encoder_Stop:0000006c $t
- /tmp/ccfdMfFA.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000075 $d
- /tmp/ccfdMfFA.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000076 $t
- /tmp/ccfdMfFA.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000081 $d
- /tmp/ccfdMfFA.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000082 $t
+ /tmp/ccD3sdMs.s:12786 .text.HAL_TIM_IC_Start_IT:0000001d $d
+ /tmp/ccD3sdMs.s:12786 .text.HAL_TIM_IC_Start_IT:0000001e $t
+ /tmp/ccD3sdMs.s:12831 .text.HAL_TIM_IC_Start_IT:0000004f $d
+ /tmp/ccD3sdMs.s:12831 .text.HAL_TIM_IC_Start_IT:00000050 $t
+ /tmp/ccD3sdMs.s:12922 .text.HAL_TIM_IC_Start_IT:000000cd $d
+ /tmp/ccD3sdMs.s:12922 .text.HAL_TIM_IC_Start_IT:000000ce $t
+ /tmp/ccD3sdMs.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001b $d
+ /tmp/ccD3sdMs.s:13146 .text.HAL_TIM_IC_Stop_IT:0000001c $t
+ /tmp/ccD3sdMs.s:13207 .text.HAL_TIM_IC_Stop_IT:00000067 $d
+ /tmp/ccD3sdMs.s:13207 .text.HAL_TIM_IC_Stop_IT:00000068 $t
+ /tmp/ccD3sdMs.s:13365 .text.HAL_TIM_IC_Start_DMA:00000023 $d
+ /tmp/ccD3sdMs.s:13365 .text.HAL_TIM_IC_Start_DMA:00000024 $t
+ /tmp/ccD3sdMs.s:13425 .text.HAL_TIM_IC_Start_DMA:00000069 $d
+ /tmp/ccD3sdMs.s:13425 .text.HAL_TIM_IC_Start_DMA:0000006a $t
+ /tmp/ccD3sdMs.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f3 $d
+ /tmp/ccD3sdMs.s:13537 .text.HAL_TIM_IC_Start_DMA:000000f4 $t
+ /tmp/ccD3sdMs.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000023 $d
+ /tmp/ccD3sdMs.s:13896 .text.HAL_TIM_IC_Stop_DMA:00000024 $t
+ /tmp/ccD3sdMs.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006b $d
+ /tmp/ccD3sdMs.s:13951 .text.HAL_TIM_IC_Stop_DMA:0000006c $t
+ /tmp/ccD3sdMs.s:14881 .text.HAL_TIM_Encoder_Stop:0000006b $d
+ /tmp/ccD3sdMs.s:14881 .text.HAL_TIM_Encoder_Stop:0000006c $t
+ /tmp/ccD3sdMs.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000075 $d
+ /tmp/ccD3sdMs.s:15312 .text.HAL_TIM_Encoder_Stop_IT:00000076 $t
+ /tmp/ccD3sdMs.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000081 $d
+ /tmp/ccD3sdMs.s:16043 .text.HAL_TIM_Encoder_Stop_DMA:00000082 $t
UNDEFINED SYMBOLS
HAL_DMA_Start_IT
diff --git a/build/stm32f7xx_hal_tim_ex.lst b/build/stm32f7xx_hal_tim_ex.lst
index a0648bc..22d345b 100644
--- a/build/stm32f7xx_hal_tim_ex.lst
+++ b/build/stm32f7xx_hal_tim_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cc6Nb46Q.s page 1
+ARM GAS /tmp/ccGZcuZQ.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** [..]
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** The Timer Extended features include:
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (#) Complementary outputs with programmable dead-time for :
- ARM GAS /tmp/cc6Nb46Q.s page 2
+ ARM GAS /tmp/ccGZcuZQ.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (++) Output Compare
@@ -118,7 +118,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @defgroup TIMEx TIMEx
- ARM GAS /tmp/cc6Nb46Q.s page 3
+ ARM GAS /tmp/ccGZcuZQ.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief TIM Extended HAL module driver
@@ -178,7 +178,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the TIM handle allocation */
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (htim == NULL)
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 4
+ ARM GAS /tmp/ccGZcuZQ.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** return HAL_ERROR;
@@ -238,7 +238,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->SMCR &= ~TIM_SMCR_SMS;
- ARM GAS /tmp/cc6Nb46Q.s page 5
+ ARM GAS /tmp/ccGZcuZQ.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
@@ -298,7 +298,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->HallSensor_MspDeInitCallback(htim);
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #else
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
- ARM GAS /tmp/cc6Nb46Q.s page 6
+ ARM GAS /tmp/ccGZcuZQ.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_TIMEx_HallSensor_MspDeInit(htim);
@@ -358,7 +358,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
- ARM GAS /tmp/cc6Nb46Q.s page 7
+ ARM GAS /tmp/ccGZcuZQ.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -418,7 +418,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
- ARM GAS /tmp/cc6Nb46Q.s page 8
+ ARM GAS /tmp/ccGZcuZQ.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1,
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_2 and TIM_CHANNEL_3) */
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
- ARM GAS /tmp/cc6Nb46Q.s page 9
+ ARM GAS /tmp/ccGZcuZQ.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -538,7 +538,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param Length The length of data to be transferred from TIM peripheral to memory.
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
- ARM GAS /tmp/cc6Nb46Q.s page 10
+ ARM GAS /tmp/ccGZcuZQ.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t
@@ -598,7 +598,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
- ARM GAS /tmp/cc6Nb46Q.s page 11
+ ARM GAS /tmp/ccGZcuZQ.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
@@ -658,7 +658,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ==============================================================================
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ##### Timer Complementary Output Compare functions #####
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** ==============================================================================
- ARM GAS /tmp/cc6Nb46Q.s page 12
+ ARM GAS /tmp/ccGZcuZQ.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** [..]
@@ -718,7 +718,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 13
+ ARM GAS /tmp/ccGZcuZQ.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim);
@@ -778,7 +778,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
- ARM GAS /tmp/cc6Nb46Q.s page 14
+ ARM GAS /tmp/ccGZcuZQ.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -838,7 +838,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim);
- ARM GAS /tmp/cc6Nb46Q.s page 15
+ ARM GAS /tmp/ccGZcuZQ.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -898,7 +898,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** default:
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** status = HAL_ERROR;
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
- ARM GAS /tmp/cc6Nb46Q.s page 16
+ ARM GAS /tmp/ccGZcuZQ.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -958,7 +958,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else if (TIM_CHANNEL_N_STATE_GET(htim, Channel) == HAL_TIM_CHANNEL_STATE_READY)
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 17
+ ARM GAS /tmp/ccGZcuZQ.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if ((pData == NULL) || (Length == 0U))
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 18
+ ARM GAS /tmp/ccGZcuZQ.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /**
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Stops the TIM Output Compare signal generation in DMA mode
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * on the complementary output.
- ARM GAS /tmp/cc6Nb46Q.s page 19
+ ARM GAS /tmp/ccGZcuZQ.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param htim TIM Output Compare handle
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the Peripheral */
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_DISABLE(htim);
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 20
+ ARM GAS /tmp/ccGZcuZQ.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the TIM complementary channel state */
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 21
+ ARM GAS /tmp/ccGZcuZQ.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the complementary PWM output */
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /**
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Starts the PWM signal generation in interrupt mode on the
- ARM GAS /tmp/cc6Nb46Q.s page 22
+ ARM GAS /tmp/ccGZcuZQ.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * complementary output.
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (status == HAL_OK)
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the TIM Break interrupt */
- ARM GAS /tmp/cc6Nb46Q.s page 23
+ ARM GAS /tmp/ccGZcuZQ.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** case TIM_CHANNEL_2:
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 24
+ ARM GAS /tmp/ccGZcuZQ.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the TIM Capture/Compare 2 interrupt */
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, const uint32_
- ARM GAS /tmp/cc6Nb46Q.s page 25
+ ARM GAS /tmp/ccGZcuZQ.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint16_t Length)
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set the DMA compare callbacks */
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseNCplt;
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
- ARM GAS /tmp/cc6Nb46Q.s page 26
+ ARM GAS /tmp/ccGZcuZQ.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_TIM_ENABLE(htim);
- ARM GAS /tmp/cc6Nb46Q.s page 27
+ ARM GAS /tmp/ccGZcuZQ.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** default:
- ARM GAS /tmp/cc6Nb46Q.s page 28
+ ARM GAS /tmp/ccGZcuZQ.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** status = HAL_ERROR;
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @arg TIM_CHANNEL_2: TIM Channel 2 selected
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
- ARM GAS /tmp/cc6Nb46Q.s page 29
+ ARM GAS /tmp/ccGZcuZQ.s page 29
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1625:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Disable the complementary One Pulse output channel and the Input Capture channel */
- ARM GAS /tmp/cc6Nb46Q.s page 30
+ ARM GAS /tmp/ccGZcuZQ.s page 30
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1682:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_BUSY);
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_BUSY);
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 31
+ ARM GAS /tmp/ccGZcuZQ.s page 31
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Enable the TIM Capture/Compare 1 interrupt */
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_2, HAL_TIM_CHANNEL_STATE_READY);
- ARM GAS /tmp/cc6Nb46Q.s page 32
+ ARM GAS /tmp/ccGZcuZQ.s page 32
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1796:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
- ARM GAS /tmp/cc6Nb46Q.s page 33
+ ARM GAS /tmp/ccGZcuZQ.s page 33
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1853:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
- ARM GAS /tmp/cc6Nb46Q.s page 34
+ ARM GAS /tmp/ccGZcuZQ.s page 34
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1910:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check the parameters */
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
- ARM GAS /tmp/cc6Nb46Q.s page 35
+ ARM GAS /tmp/ccGZcuZQ.s page 35
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Check input state */
1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __HAL_LOCK(htim);
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 36
+ ARM GAS /tmp/ccGZcuZQ.s page 36
1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Change the handler state */
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2024:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @note Interrupts can be generated when an active level is detected on the
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * break input, the break 2 input or the system break input. Break
2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
- ARM GAS /tmp/cc6Nb46Q.s page 37
+ ARM GAS /tmp/ccGZcuZQ.s page 37
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @retval HAL status
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2081:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #if defined(TIM_BREAK_INPUT_SUPPORT)
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 38
+ ARM GAS /tmp/ccGZcuZQ.s page 38
2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /**
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_polarity_bitpos = 0U;
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 39
+ ARM GAS /tmp/ccGZcuZQ.s page 39
2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* DFSDM1_Channel0 */
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set TIMx_AF2 */
2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->AF2 = tmporx;
2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
- ARM GAS /tmp/cc6Nb46Q.s page 40
+ ARM GAS /tmp/ccGZcuZQ.s page 40
2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2252:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @param Channels specifies the reference signal(s) the OC5REF is combined with.
2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * This parameter can be any combination of the following values:
2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
- ARM GAS /tmp/cc6Nb46Q.s page 41
+ ARM GAS /tmp/ccGZcuZQ.s page 41
2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 42
+ ARM GAS /tmp/ccGZcuZQ.s page 42
2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Prevent unused argument(s) compilation warning */
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2366:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @brief Extended Peripheral State functions
- ARM GAS /tmp/cc6Nb46Q.s page 43
+ ARM GAS /tmp/ccGZcuZQ.s page 43
2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** *
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2423:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** * @{
2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** */
2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 44
+ ARM GAS /tmp/ccGZcuZQ.s page 44
2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /**
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_1, HAL_TIM_CHANNEL_STATE_READY);
2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 45
+ ARM GAS /tmp/ccGZcuZQ.s page 45
2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else if (hdma == htim->hdma[TIM_DMA_ID_CC2])
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** else
- ARM GAS /tmp/cc6Nb46Q.s page 46
+ ARM GAS /tmp/ccGZcuZQ.s page 46
2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /* Set or reset the CCxNE Bit */
2575:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0xFU)); /* 0xFU = 15 bits max shift */
48 .loc 1 2575 3 is_stmt 1 view .LVU8
- ARM GAS /tmp/cc6Nb46Q.s page 47
+ ARM GAS /tmp/ccGZcuZQ.s page 47
49 .loc 1 2575 7 is_stmt 0 view .LVU9
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
94 .loc 1 2529 11 view .LVU22
95 000c 8342 cmp r3, r0
96 000e 0DD0 beq .L8
- ARM GAS /tmp/cc6Nb46Q.s page 48
+ ARM GAS /tmp/ccGZcuZQ.s page 48
2534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
136 .loc 1 2536 5 view .LVU38
2536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CHANNEL_N_STATE_SET(htim, TIM_CHANNEL_3, HAL_TIM_CHANNEL_STATE_READY);
- ARM GAS /tmp/cc6Nb46Q.s page 49
+ ARM GAS /tmp/ccGZcuZQ.s page 49
137 .loc 1 2536 19 is_stmt 0 view .LVU39
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
182 .loc 1 2492 8 is_stmt 1 view .LVU51
2492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 50
+ ARM GAS /tmp/ccGZcuZQ.s page 50
183 .loc 1 2492 30 is_stmt 0 view .LVU52
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
222 0036 2377 strb r3, [r4, #28]
2487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
223 .loc 1 2487 5 is_stmt 1 view .LVU68
- ARM GAS /tmp/cc6Nb46Q.s page 51
+ ARM GAS /tmp/ccGZcuZQ.s page 51
2487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
268 0000 7047 bx lr
269 .cfi_endproc
270 .LFE143:
- ARM GAS /tmp/cc6Nb46Q.s page 52
+ ARM GAS /tmp/ccGZcuZQ.s page 52
272 .section .text.HAL_TIMEx_HallSensor_Init,"ax",%progbits
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
313 .loc 1 159 11 is_stmt 0 view .LVU95
314 000c 90F83D30 ldrb r3, [r0, #61] @ zero_extendqisi2
- ARM GAS /tmp/cc6Nb46Q.s page 53
+ ARM GAS /tmp/ccGZcuZQ.s page 53
159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
353 .loc 1 192 25 view .LVU111
354 0040 0B43 orrs r3, r3, r1
355 0042 9361 str r3, [r2, #24]
- ARM GAS /tmp/cc6Nb46Q.s page 54
+ ARM GAS /tmp/ccGZcuZQ.s page 54
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
392 .loc 1 203 17 view .LVU130
393 006e 9368 ldr r3, [r2, #8]
- ARM GAS /tmp/cc6Nb46Q.s page 55
+ ARM GAS /tmp/ccGZcuZQ.s page 55
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
429 0092 2268 ldr r2, [r4]
218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= TIM_TRGO_OC2REF;
430 .loc 1 218 17 view .LVU150
- ARM GAS /tmp/cc6Nb46Q.s page 56
+ ARM GAS /tmp/ccGZcuZQ.s page 56
431 0094 5368 ldr r3, [r2, #4]
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
469 .L27:
470 .LCFI5:
471 .cfi_restore_state
- ARM GAS /tmp/cc6Nb46Q.s page 57
+ ARM GAS /tmp/ccGZcuZQ.s page 57
162:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
519 .LFE144:
521 .section .text.HAL_TIMEx_HallSensor_DeInit,"ax",%progbits
522 .align 1
- ARM GAS /tmp/cc6Nb46Q.s page 58
+ ARM GAS /tmp/ccGZcuZQ.s page 58
523 .global HAL_TIMEx_HallSensor_DeInit
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
567 .LVL26:
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
568 .loc 1 260 3 is_stmt 0 view .LVU187
- ARM GAS /tmp/cc6Nb46Q.s page 59
+ ARM GAS /tmp/ccGZcuZQ.s page 59
569 002a FFF7FEFF bl HAL_TIMEx_HallSensor_MspDeInit
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
610 @ frame_needed = 0, uses_anonymous_args = 0
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t tmpsmcr;
611 .loc 1 317 1 is_stmt 0 view .LVU203
- ARM GAS /tmp/cc6Nb46Q.s page 60
+ ARM GAS /tmp/ccGZcuZQ.s page 60
612 0000 10B5 push {r4, lr}
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
652 .LVL34:
331:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
653 .loc 1 331 7 view .LVU218
- ARM GAS /tmp/cc6Nb46Q.s page 61
+ ARM GAS /tmp/ccGZcuZQ.s page 61
654 002a 0128 cmp r0, #1
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
695 006a 15D0 beq .L36
348:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
696 .loc 1 348 7 discriminator 3 view .LVU232
- ARM GAS /tmp/cc6Nb46Q.s page 62
+ ARM GAS /tmp/ccGZcuZQ.s page 62
697 006c 02F58062 add r2, r2, #1024
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
739 .loc 1 362 10 view .LVU245
740 00b0 0020 movs r0, #0
- ARM GAS /tmp/cc6Nb46Q.s page 63
+ ARM GAS /tmp/ccGZcuZQ.s page 63
741 00b2 00E0 b .L35
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
790 0002 0446 mov r4, r0
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
791 .loc 1 373 3 is_stmt 1 view .LVU253
- ARM GAS /tmp/cc6Nb46Q.s page 64
+ ARM GAS /tmp/ccGZcuZQ.s page 64
378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
832 .cfi_endproc
833 .LFE146:
835 .section .text.HAL_TIMEx_HallSensor_Start_IT,"ax",%progbits
- ARM GAS /tmp/cc6Nb46Q.s page 65
+ ARM GAS /tmp/ccGZcuZQ.s page 65
836 .align 1
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
410:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
878 .loc 1 410 6 is_stmt 0 view .LVU281
879 001a 012A cmp r2, #1
- ARM GAS /tmp/cc6Nb46Q.s page 66
+ ARM GAS /tmp/ccGZcuZQ.s page 66
880 001c 08BF it eq
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
922 .loc 1 433 3 is_stmt 1 view .LVU294
433:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 67
+ ARM GAS /tmp/ccGZcuZQ.s page 67
923 .loc 1 433 7 is_stmt 0 view .LVU295
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
966 .loc 1 435 13 view .LVU307
967 00a4 0A4A ldr r2, .L55+4
- ARM GAS /tmp/cc6Nb46Q.s page 68
+ ARM GAS /tmp/ccGZcuZQ.s page 68
968 00a6 0A40 ands r2, r2, r1
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1013 .section .text.HAL_TIMEx_HallSensor_Stop_IT,"ax",%progbits
1014 .align 1
1015 .global HAL_TIMEx_HallSensor_Stop_IT
- ARM GAS /tmp/cc6Nb46Q.s page 69
+ ARM GAS /tmp/ccGZcuZQ.s page 69
1016 .syntax unified
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1061 002e 1A68 ldr r2, [r3]
1062 0030 22F00102 bic r2, r2, #1
1063 0034 1A60 str r2, [r3]
- ARM GAS /tmp/cc6Nb46Q.s page 70
+ ARM GAS /tmp/ccGZcuZQ.s page 70
1064 .L58:
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
491:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_TIM_ChannelStateTypeDef complementary_channel_1_state = TIM_CHANNEL_N_STATE_GET(htim, TIM_CHA
1108 .loc 1 491 31 is_stmt 0 view .LVU340
1109 0004 90F83EC0 ldrb ip, [r0, #62] @ zero_extendqisi2
- ARM GAS /tmp/cc6Nb46Q.s page 71
+ ARM GAS /tmp/ccGZcuZQ.s page 71
1110 0008 5FFA8CFC uxtb ip, ip
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1150 .loc 1 513 7 view .LVU354
1151 003c 84F84430 strb r3, [r4, #68]
524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 72
+ ARM GAS /tmp/ccGZcuZQ.s page 72
1152 .loc 1 524 3 view .LVU355
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1191 .LVL80:
533:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1192 .loc 1 533 6 discriminator 1 view .LVU371
- ARM GAS /tmp/cc6Nb46Q.s page 73
+ ARM GAS /tmp/ccGZcuZQ.s page 73
1193 006a 0028 cmp r0, #0
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1236 00bc 1A60 str r2, [r3]
1237 00be 0FE0 b .L61
1238 .L62:
- ARM GAS /tmp/cc6Nb46Q.s page 74
+ ARM GAS /tmp/ccGZcuZQ.s page 74
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1281 .L70:
1282 00e8 00000000 .word TIM_DMACaptureCplt
1283 00ec 00000000 .word TIM_DMACaptureHalfCplt
- ARM GAS /tmp/cc6Nb46Q.s page 75
+ ARM GAS /tmp/ccGZcuZQ.s page 75
1284 00f0 00000000 .word TIM_DMAError
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
581:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
1331 .loc 1 581 3 view .LVU404
1332 001e 2368 ldr r3, [r4]
- ARM GAS /tmp/cc6Nb46Q.s page 76
+ ARM GAS /tmp/ccGZcuZQ.s page 76
1333 0020 196A ldr r1, [r3, #32]
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1379 .cfi_offset 4, -8
1380 .cfi_offset 14, -4
1381 0002 0446 mov r4, r0
- ARM GAS /tmp/cc6Nb46Q.s page 77
+ ARM GAS /tmp/ccGZcuZQ.s page 77
628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1422 0032 43F40043 orr r3, r3, #32768
1423 0036 5364 str r3, [r2, #68]
649:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 78
+ ARM GAS /tmp/ccGZcuZQ.s page 78
1424 .loc 1 649 3 view .LVU429
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1467 0082 0429 cmp r1, #4
1468 0084 08D0 beq .L90
634:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 79
+ ARM GAS /tmp/ccGZcuZQ.s page 79
1469 .loc 1 634 46 discriminator 5 view .LVU441
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1513 00ca ABE7 b .L82
1514 .L93:
640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 80
+ ARM GAS /tmp/ccGZcuZQ.s page 80
1515 .loc 1 640 3 discriminator 6 view .LVU452
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1558 .L94:
1559 00f8 00000140 .word 1073807360
1560 00fc 07000100 .word 65543
- ARM GAS /tmp/cc6Nb46Q.s page 81
+ ARM GAS /tmp/ccGZcuZQ.s page 81
1561 .cfi_endproc
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1608 .loc 1 686 3 discriminator 3 view .LVU472
1609 0024 5A6C ldr r2, [r3, #68]
1610 0026 22F40042 bic r2, r2, #32768
- ARM GAS /tmp/cc6Nb46Q.s page 82
+ ARM GAS /tmp/ccGZcuZQ.s page 82
1611 002a 5A64 str r2, [r3, #68]
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1652 0060 84F84730 strb r3, [r4, #71]
1653 0064 F5E7 b .L100
1654 .L104:
- ARM GAS /tmp/cc6Nb46Q.s page 83
+ ARM GAS /tmp/ccGZcuZQ.s page 83
692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1700 000a 94F84430 ldrb r3, [r4, #68] @ zero_extendqisi2
1701 000e DBB2 uxtb r3, r3
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 84
+ ARM GAS /tmp/ccGZcuZQ.s page 84
1702 .loc 1 718 46 discriminator 1 view .LVU497
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1744 0048 43F40043 orr r3, r3, #32768
1745 004c 5364 str r3, [r2, #68]
767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 85
+ ARM GAS /tmp/ccGZcuZQ.s page 85
1746 .loc 1 767 5 view .LVU510
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1790 .loc 1 718 46 discriminator 5 view .LVU521
1791 009c 0829 cmp r1, #8
- ARM GAS /tmp/cc6Nb46Q.s page 86
+ ARM GAS /tmp/ccGZcuZQ.s page 86
1792 009e 0DD0 beq .L126
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1836 00e4 0120 movs r0, #1
1837 .LVL115:
726:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 87
+ ARM GAS /tmp/ccGZcuZQ.s page 87
1838 .loc 1 726 3 is_stmt 0 view .LVU532
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1878 .loc 1 770 7 is_stmt 1 view .LVU546
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1879 .loc 1 770 10 is_stmt 0 view .LVU547
- ARM GAS /tmp/cc6Nb46Q.s page 88
+ ARM GAS /tmp/ccGZcuZQ.s page 88
1880 0112 062A cmp r2, #6
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1929 .LCFI17:
1930 .cfi_def_cfa_offset 16
1931 .cfi_offset 3, -16
- ARM GAS /tmp/cc6Nb46Q.s page 89
+ ARM GAS /tmp/ccGZcuZQ.s page 89
1932 .cfi_offset 4, -12
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1972 .loc 1 839 5 is_stmt 1 view .LVU568
839:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
1973 .loc 1 839 8 is_stmt 0 view .LVU569
- ARM GAS /tmp/cc6Nb46Q.s page 90
+ ARM GAS /tmp/ccGZcuZQ.s page 90
1974 002a 40F24442 movw r2, #1092
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2017 0074 1A60 str r2, [r3]
2018 .L138:
848:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 91
+ ARM GAS /tmp/ccGZcuZQ.s page 91
2019 .loc 1 848 5 discriminator 5 view .LVU581
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2060 00a4 84F84730 strb r3, [r4, #71]
2061 00a8 0020 movs r0, #0
2062 00aa E9E7 b .L134
- ARM GAS /tmp/cc6Nb46Q.s page 92
+ ARM GAS /tmp/ccGZcuZQ.s page 92
2063 .L144:
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2111 .loc 1 875 3 view .LVU602
878:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
2112 .loc 1 878 3 view .LVU603
- ARM GAS /tmp/cc6Nb46Q.s page 93
+ ARM GAS /tmp/ccGZcuZQ.s page 93
881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2153 003a 18BF it ne
2154 003c BCF1000F cmpne ip, #0
2155 0040 00F0E080 beq .L167
- ARM GAS /tmp/cc6Nb46Q.s page 94
+ ARM GAS /tmp/ccGZcuZQ.s page 94
893:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2193 .loc 1 913 10 discriminator 1 view .LVU634
2194 006e 0028 cmp r0, #0
2195 0070 40F0CA80 bne .L169
- ARM GAS /tmp/cc6Nb46Q.s page 95
+ ARM GAS /tmp/ccGZcuZQ.s page 95
920:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2238 00c4 9342 cmp r3, r2
2239 00c6 00F08B80 beq .L163
980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 96
+ ARM GAS /tmp/ccGZcuZQ.s page 96
2240 .loc 1 980 9 discriminator 5 view .LVU647
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2284 010e 0120 moveq r0, #1
2285 0110 83E7 b .L148
2286 .LVL146:
- ARM GAS /tmp/cc6Nb46Q.s page 97
+ ARM GAS /tmp/ccGZcuZQ.s page 97
2287 .L175:
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2330 .LVL151:
2331 .L177:
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 98
+ ARM GAS /tmp/ccGZcuZQ.s page 98
2332 .loc 1 885 12 discriminator 7 view .LVU669
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2374 .loc 1 927 52 view .LVU681
2375 0184 D163 str r1, [r2, #60]
928:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 99
+ ARM GAS /tmp/ccGZcuZQ.s page 99
2376 .loc 1 928 7 is_stmt 1 view .LVU682
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2415 .loc 1 948 7 view .LVU697
948:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
2416 .loc 1 948 17 is_stmt 0 view .LVU698
- ARM GAS /tmp/cc6Nb46Q.s page 100
+ ARM GAS /tmp/ccGZcuZQ.s page 100
2417 01b4 E26A ldr r2, [r4, #44]
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2455 .loc 1 982 7 view .LVU714
982:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
2456 .loc 1 982 31 is_stmt 0 view .LVU715
- ARM GAS /tmp/cc6Nb46Q.s page 101
+ ARM GAS /tmp/ccGZcuZQ.s page 101
2457 01e0 9968 ldr r1, [r3, #8]
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2500 .loc 1 938 16 view .LVU726
2501 020c 0120 movs r0, #1
2502 020e F8E7 b .L151
- ARM GAS /tmp/cc6Nb46Q.s page 102
+ ARM GAS /tmp/ccGZcuZQ.s page 102
2503 .L171:
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2552 0008 34D0 beq .L183
2553 000a 0829 cmp r1, #8
2554 000c 3BD0 beq .L184
- ARM GAS /tmp/cc6Nb46Q.s page 103
+ ARM GAS /tmp/ccGZcuZQ.s page 103
2555 000e 0029 cmp r1, #0
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2596 .loc 1 1056 5 view .LVU746
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
2597 .loc 1 1056 5 view .LVU747
- ARM GAS /tmp/cc6Nb46Q.s page 104
+ ARM GAS /tmp/ccGZcuZQ.s page 104
2598 004a 2368 ldr r3, [r4]
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1047:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
2640 .loc 1 1047 3 view .LVU760
2641 0084 CDE7 b .L186
- ARM GAS /tmp/cc6Nb46Q.s page 105
+ ARM GAS /tmp/ccGZcuZQ.s page 105
2642 .LVL175:
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1016:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
2685 .loc 1 1016 3 view .LVU772
2686 00be 0120 movs r0, #1
- ARM GAS /tmp/cc6Nb46Q.s page 106
+ ARM GAS /tmp/ccGZcuZQ.s page 106
2687 .LVL179:
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2732 0016 002B cmp r3, #0
2733 0018 6AD1 bne .L208
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 107
+ ARM GAS /tmp/ccGZcuZQ.s page 107
2734 .loc 1 1113 3 is_stmt 1 view .LVU784
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
2777 .loc 1 1122 7 discriminator 4 view .LVU796
2778 005e 02F57842 add r2, r2, #63488
- ARM GAS /tmp/cc6Nb46Q.s page 108
+ ARM GAS /tmp/ccGZcuZQ.s page 108
2779 0062 9342 cmp r3, r2
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2822 .loc 1 1107 7 discriminator 7 view .LVU807
2823 00a6 94F84630 ldrb r3, [r4, #70] @ zero_extendqisi2
2824 00aa DBB2 uxtb r3, r3
- ARM GAS /tmp/cc6Nb46Q.s page 109
+ ARM GAS /tmp/ccGZcuZQ.s page 109
1107:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2867 00e4 1A68 ldr r2, [r3]
2868 .LVL188:
1127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 110
+ ARM GAS /tmp/ccGZcuZQ.s page 110
2869 .loc 1 1127 7 is_stmt 0 view .LVU820
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2919 0004 0D46 mov r5, r1
1152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
2920 .loc 1 1152 3 is_stmt 1 view .LVU827
- ARM GAS /tmp/cc6Nb46Q.s page 111
+ ARM GAS /tmp/ccGZcuZQ.s page 111
1155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2963 .loc 1 1161 3 discriminator 5 view .LVU839
1164:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
2964 .loc 1 1164 3 view .LVU840
- ARM GAS /tmp/cc6Nb46Q.s page 112
+ ARM GAS /tmp/ccGZcuZQ.s page 112
2965 004a 25B9 cbnz r5, .L220
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3012 @ frame_needed = 0, uses_anonymous_args = 0
1182:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** HAL_StatusTypeDef status = HAL_OK;
3013 .loc 1 1182 1 is_stmt 0 view .LVU850
- ARM GAS /tmp/cc6Nb46Q.s page 113
+ ARM GAS /tmp/ccGZcuZQ.s page 113
3014 0000 10B5 push {r4, lr}
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
3055 .loc 1 1204 7 view .LVU864
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 114
+ ARM GAS /tmp/ccGZcuZQ.s page 114
3056 .loc 1 1226 3 view .LVU865
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3099 .loc 1 1238 9 discriminator 4 view .LVU877
3100 0074 02F57842 add r2, r2, #63488
- ARM GAS /tmp/cc6Nb46Q.s page 115
+ ARM GAS /tmp/ccGZcuZQ.s page 115
3101 0078 9342 cmp r3, r2
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3145 00c0 DBB2 uxtb r3, r3
1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3146 .loc 1 1190 46 discriminator 7 view .LVU888
- ARM GAS /tmp/cc6Nb46Q.s page 116
+ ARM GAS /tmp/ccGZcuZQ.s page 116
3147 00c2 013B subs r3, r3, #1
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3190 00fc 84F84630 strb r3, [r4, #70]
1198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3191 .loc 1 1198 3 is_stmt 1 view .LVU900
- ARM GAS /tmp/cc6Nb46Q.s page 117
+ ARM GAS /tmp/ccGZcuZQ.s page 117
3192 .L238:
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
3234 .loc 1 1254 1 view .LVU913
3235 012c 0020 movs r0, #0
- ARM GAS /tmp/cc6Nb46Q.s page 118
+ ARM GAS /tmp/ccGZcuZQ.s page 118
3236 012e FCE7 b .L232
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
3285 .loc 1 1281 7 view .LVU921
1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 119
+ ARM GAS /tmp/ccGZcuZQ.s page 119
3286 .loc 1 1303 3 view .LVU922
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3327 004e 03D1 bne .L258
1316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
3328 .loc 1 1316 5 discriminator 3 view .LVU936
- ARM GAS /tmp/cc6Nb46Q.s page 120
+ ARM GAS /tmp/ccGZcuZQ.s page 120
3329 0050 5A6C ldr r2, [r3, #68]
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3371 .loc 1 1303 3 view .LVU949
3372 008c C6E7 b .L256
- ARM GAS /tmp/cc6Nb46Q.s page 121
+ ARM GAS /tmp/ccGZcuZQ.s page 121
3373 .L254:
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3418 .align 1
3419 .global HAL_TIMEx_PWMN_Start_DMA
3420 .syntax unified
- ARM GAS /tmp/cc6Nb46Q.s page 122
+ ARM GAS /tmp/ccGZcuZQ.s page 122
3421 .thumb
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3464 .loc 1 1356 8 is_stmt 1 view .LVU971
1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3465 .loc 1 1356 51 is_stmt 0 view .LVU972
- ARM GAS /tmp/cc6Nb46Q.s page 123
+ ARM GAS /tmp/ccGZcuZQ.s page 123
3466 0020 002D cmp r5, #0
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3505 .loc 1 1378 17 is_stmt 0 view .LVU987
3506 0056 626A ldr r2, [r4, #36]
1378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 124
+ ARM GAS /tmp/ccGZcuZQ.s page 124
3507 .loc 1 1378 56 view .LVU988
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3548 .loc 1 1451 9 is_stmt 0 view .LVU1002
3549 0092 2368 ldr r3, [r4]
- ARM GAS /tmp/cc6Nb46Q.s page 125
+ ARM GAS /tmp/ccGZcuZQ.s page 125
1451:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3594 .loc 1 1352 7 discriminator 8 view .LVU1013
3595 00f2 90F84700 ldrb r0, [r0, #71] @ zero_extendqisi2
- ARM GAS /tmp/cc6Nb46Q.s page 126
+ ARM GAS /tmp/ccGZcuZQ.s page 126
3596 .LVL231:
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3639 012a 94F84720 ldrb r2, [r4, #71] @ zero_extendqisi2
3640 .LVL236:
1356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 127
+ ARM GAS /tmp/ccGZcuZQ.s page 127
3641 .loc 1 1356 12 discriminator 8 view .LVU1025
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
3685 .loc 1 1372 3 is_stmt 1 view .LVU1036
3686 0168 042D cmp r5, #4
- ARM GAS /tmp/cc6Nb46Q.s page 128
+ ARM GAS /tmp/ccGZcuZQ.s page 128
3687 016a 09D0 beq .L280
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3726 0198 A06A ldr r0, [r4, #40]
3727 019a FFF7FEFF bl HAL_DMA_Start_IT
3728 .LVL242:
- ARM GAS /tmp/cc6Nb46Q.s page 129
+ ARM GAS /tmp/ccGZcuZQ.s page 129
1405:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK)
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK)
3767 .loc 1 1426 7 is_stmt 1 view .LVU1068
1426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** Length) != HAL_OK)
- ARM GAS /tmp/cc6Nb46Q.s page 130
+ ARM GAS /tmp/ccGZcuZQ.s page 130
3768 .loc 1 1426 88 is_stmt 0 view .LVU1069
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
3810 .loc 1 1354 12 view .LVU1082
3811 01fc 0220 movs r0, #2
- ARM GAS /tmp/cc6Nb46Q.s page 131
+ ARM GAS /tmp/ccGZcuZQ.s page 131
3812 01fe 00E0 b .L272
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3860 .thumb_func
3862 HAL_TIMEx_PWMN_Stop_DMA:
3863 .LVL254:
- ARM GAS /tmp/cc6Nb46Q.s page 132
+ ARM GAS /tmp/ccGZcuZQ.s page 132
3864 .LFB162:
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3906 0024 2946 mov r1, r5
3907 0026 2068 ldr r0, [r4]
3908 0028 FFF7FEFF bl TIM_CCxNChannelCmd
- ARM GAS /tmp/cc6Nb46Q.s page 133
+ ARM GAS /tmp/ccGZcuZQ.s page 133
3909 .LVL258:
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3951 0070 0020 movs r0, #0
3952 .L306:
3953 .LVL259:
- ARM GAS /tmp/cc6Nb46Q.s page 134
+ ARM GAS /tmp/ccGZcuZQ.s page 134
1534:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
3993 0098 042D cmp r5, #4
3994 009a 06D0 beq .L315
1530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 135
+ ARM GAS /tmp/ccGZcuZQ.s page 135
3995 .loc 1 1530 5 discriminator 4 view .LVU1129
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4044 .cfi_offset 4, -12
4045 .cfi_offset 5, -8
4046 .cfi_offset 14, -4
- ARM GAS /tmp/cc6Nb46Q.s page 136
+ ARM GAS /tmp/ccGZcuZQ.s page 136
4047 0002 0446 mov r4, r0
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4085 .loc 1 1586 41 view .LVU1152
4086 002c 013B subs r3, r3, #1
4087 .LVL275:
- ARM GAS /tmp/cc6Nb46Q.s page 137
+ ARM GAS /tmp/ccGZcuZQ.s page 137
1586:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1605:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
4129 .loc 1 1605 10 is_stmt 0 view .LVU1166
4130 006a 0020 movs r0, #0
- ARM GAS /tmp/cc6Nb46Q.s page 138
+ ARM GAS /tmp/ccGZcuZQ.s page 138
4131 006c 02E0 b .L319
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4179 .loc 1 1622 77 is_stmt 0 view .LVU1175
4180 0004 0029 cmp r1, #0
- ARM GAS /tmp/cc6Nb46Q.s page 139
+ ARM GAS /tmp/ccGZcuZQ.s page 139
4181 0006 32D1 bne .L328
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4223 0042 1142 tst r1, r2
4224 0044 08D1 bne .L327
1635:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 140
+ ARM GAS /tmp/ccGZcuZQ.s page 140
4225 .loc 1 1635 3 discriminator 1 view .LVU1188
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1660:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
4271 .loc 1 1660 1 is_stmt 0 view .LVU1199
4272 0000 38B5 push {r3, r4, r5, lr}
- ARM GAS /tmp/cc6Nb46Q.s page 141
+ ARM GAS /tmp/ccGZcuZQ.s page 141
4273 .LCFI28:
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1671:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** || (channel_2_state != HAL_TIM_CHANNEL_STATE_READY)
4313 .loc 1 1671 6 is_stmt 0 view .LVU1214
4314 0026 012A cmp r2, #1
- ARM GAS /tmp/cc6Nb46Q.s page 142
+ ARM GAS /tmp/ccGZcuZQ.s page 142
4315 0028 08BF it eq
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** TIM_CCxChannelCmd(htim->Instance, input_channel, TIM_CCx_ENABLE);
4357 .loc 1 1692 3 view .LVU1227
4358 0068 FFF7FEFF bl TIM_CCxNChannelCmd
- ARM GAS /tmp/cc6Nb46Q.s page 143
+ ARM GAS /tmp/ccGZcuZQ.s page 143
4359 .LVL305:
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4406 .LVL312:
4407 .LFB166:
1715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t input_channel = (OutputChannel == TIM_CHANNEL_1) ? TIM_CHANNEL_2 : TIM_CHANNEL_1;
- ARM GAS /tmp/cc6Nb46Q.s page 144
+ ARM GAS /tmp/ccGZcuZQ.s page 144
4408 .loc 1 1715 1 is_stmt 1 view -0
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4452 .LVL316:
1732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4453 .loc 1 1732 3 view .LVU1248
- ARM GAS /tmp/cc6Nb46Q.s page 145
+ ARM GAS /tmp/ccGZcuZQ.s page 145
1732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4496 .loc 1 1741 3 view .LVU1261
4497 007a 84F84530 strb r3, [r4, #69]
- ARM GAS /tmp/cc6Nb46Q.s page 146
+ ARM GAS /tmp/ccGZcuZQ.s page 146
1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4542 000c 0120 movs r0, #1
4543 000e 83F83C00 strb r0, [r3, #60]
1801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 147
+ ARM GAS /tmp/ccGZcuZQ.s page 147
4544 .loc 1 1801 3 discriminator 2 view .LVU1274
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4582 003a 1868 ldr r0, [r3]
1814:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource;
4583 .loc 1 1814 17 view .LVU1291
- ARM GAS /tmp/cc6Nb46Q.s page 148
+ ARM GAS /tmp/ccGZcuZQ.s page 148
4584 003c 4168 ldr r1, [r0, #4]
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4625 .loc 1 1826 1 view .LVU1305
4626 006c 3029 cmp r1, #48
- ARM GAS /tmp/cc6Nb46Q.s page 149
+ ARM GAS /tmp/ccGZcuZQ.s page 149
4627 006e DFD1 bne .L347
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4672 000c 0120 movs r0, #1
4673 000e 83F83C00 strb r0, [r3, #60]
1857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 150
+ ARM GAS /tmp/ccGZcuZQ.s page 150
4674 .loc 1 1857 3 discriminator 2 view .LVU1317
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4712 003a 1868 ldr r0, [r3]
1870:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource;
4713 .loc 1 1870 17 view .LVU1334
- ARM GAS /tmp/cc6Nb46Q.s page 151
+ ARM GAS /tmp/ccGZcuZQ.s page 151
4714 003c 4168 ldr r1, [r0, #4]
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4755 .loc 1 1882 1 view .LVU1348
4756 006c 3029 cmp r1, #48
- ARM GAS /tmp/cc6Nb46Q.s page 152
+ ARM GAS /tmp/ccGZcuZQ.s page 152
4757 006e DFD1 bne .L357
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4802 000c 0120 movs r0, #1
4803 000e 83F83C00 strb r0, [r3, #60]
1914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 153
+ ARM GAS /tmp/ccGZcuZQ.s page 153
4804 .loc 1 1914 3 discriminator 2 view .LVU1360
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4842 003a 1868 ldr r0, [r3]
1927:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** htim->Instance->CR2 |= CommutationSource;
4843 .loc 1 1927 17 view .LVU1377
- ARM GAS /tmp/cc6Nb46Q.s page 154
+ ARM GAS /tmp/ccGZcuZQ.s page 154
4844 003c 4168 ldr r1, [r0, #4]
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4881 .loc 1 1941 3 view .LVU1394
4882 0068 1968 ldr r1, [r3]
4883 006a CA68 ldr r2, [r1, #12]
- ARM GAS /tmp/cc6Nb46Q.s page 155
+ ARM GAS /tmp/ccGZcuZQ.s page 155
4884 006c 42F40052 orr r2, r2, #8192
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
4932 .LVL333:
4933 .LFB170:
1958:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** uint32_t tmpcr2;
- ARM GAS /tmp/cc6Nb46Q.s page 156
+ ARM GAS /tmp/ccGZcuZQ.s page 156
4934 .loc 1 1958 1 is_stmt 1 view -0
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
1977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
4972 .loc 1 1977 11 is_stmt 0 view .LVU1420
4973 001c 9468 ldr r4, [r2, #8]
- ARM GAS /tmp/cc6Nb46Q.s page 157
+ ARM GAS /tmp/ccGZcuZQ.s page 157
4974 .LVL335:
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5011 003e 1648 ldr r0, .L385
5012 .LVL340:
1999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** {
- ARM GAS /tmp/cc6Nb46Q.s page 158
+ ARM GAS /tmp/ccGZcuZQ.s page 158
5013 .loc 1 1999 6 view .LVU1438
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2007:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
5055 .loc 1 2007 26 is_stmt 0 view .LVU1451
5056 0082 9160 str r1, [r2, #8]
- ARM GAS /tmp/cc6Nb46Q.s page 159
+ ARM GAS /tmp/ccGZcuZQ.s page 159
5057 .LVL344:
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5103 .cfi_startproc
5104 @ args = 0, pretend = 0, frame = 0
5105 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/cc6Nb46Q.s page 160
+ ARM GAS /tmp/ccGZcuZQ.s page 160
5106 @ link register save eliminated.
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
5142 .loc 1 2054 3 view .LVU1480
5143 001a 0343 orrs r3, r3, r0
- ARM GAS /tmp/cc6Nb46Q.s page 161
+ ARM GAS /tmp/ccGZcuZQ.s page 161
5144 .LVL351:
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5184 .loc 1 2059 3 is_stmt 0 view .LVU1494
5185 0040 886A ldr r0, [r1, #40]
5186 .LVL365:
- ARM GAS /tmp/cc6Nb46Q.s page 162
+ ARM GAS /tmp/ccGZcuZQ.s page 162
2059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5226 006c 2343 orrs r3, r3, r4
5227 .LVL374:
2072:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** }
- ARM GAS /tmp/cc6Nb46Q.s page 163
+ ARM GAS /tmp/ccGZcuZQ.s page 163
5228 .loc 1 2072 5 is_stmt 1 view .LVU1510
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5272 .syntax unified
5273 .thumb
5274 .thumb_func
- ARM GAS /tmp/cc6Nb46Q.s page 164
+ ARM GAS /tmp/ccGZcuZQ.s page 164
5276 HAL_TIMEx_ConfigBreakInput:
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5312 .cfi_offset 7, -8
5313 .cfi_offset 14, -4
2120:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 165
+ ARM GAS /tmp/ccGZcuZQ.s page 165
5314 .loc 1 2120 3 is_stmt 1 discriminator 2 view .LVU1540
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_enable_bitpos = 0U;
5356 .loc 1 2146 26 view .LVU1553
5357 0048 E646 mov lr, ip
- ARM GAS /tmp/cc6Nb46Q.s page 166
+ ARM GAS /tmp/ccGZcuZQ.s page 166
2145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** bkin_polarity_mask = 0U;
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5396 006c 5140 eors r1, r1, r2
5397 .LVL391:
5398 .L403:
- ARM GAS /tmp/cc6Nb46Q.s page 167
+ ARM GAS /tmp/ccGZcuZQ.s page 167
2174:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** break;
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5435 .loc 1 2188 7 is_stmt 1 view .LVU1587
2188:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* DFSDM1_Channel0 */
5436 .loc 1 2188 10 is_stmt 0 view .LVU1588
- ARM GAS /tmp/cc6Nb46Q.s page 168
+ ARM GAS /tmp/ccGZcuZQ.s page 168
5437 0088 0828 cmp r0, #8
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5480 .syntax unified
5481 .thumb
5482 .thumb_func
- ARM GAS /tmp/cc6Nb46Q.s page 169
+ ARM GAS /tmp/ccGZcuZQ.s page 169
5484 HAL_TIMEx_RemapConfig:
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5520 .loc 1 2246 10 view .LVU1618
5521 001e 7047 bx lr
5522 .LVL403:
- ARM GAS /tmp/cc6Nb46Q.s page 170
+ ARM GAS /tmp/ccGZcuZQ.s page 170
5523 .L414:
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
5567 .loc 1 2272 3 is_stmt 1 view .LVU1631
2272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 171
+ ARM GAS /tmp/ccGZcuZQ.s page 171
5568 .loc 1 2272 7 is_stmt 0 view .LVU1632
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5606 .loc 1 2283 1 view .LVU1648
5607 003c 7047 bx lr
5608 .cfi_endproc
- ARM GAS /tmp/cc6Nb46Q.s page 172
+ ARM GAS /tmp/ccGZcuZQ.s page 172
5609 .LFE174:
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5658 0004 0123 movs r3, #1
5659 0006 80F83D30 strb r3, [r0, #61]
2441:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
- ARM GAS /tmp/cc6Nb46Q.s page 173
+ ARM GAS /tmp/ccGZcuZQ.s page 173
5660 .loc 1 2441 3 is_stmt 1 view .LVU1658
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5710 .loc 1 2452 22 is_stmt 0 view .LVU1666
5711 0002 806B ldr r0, [r0, #56]
5712 .LVL415:
- ARM GAS /tmp/cc6Nb46Q.s page 174
+ ARM GAS /tmp/ccGZcuZQ.s page 174
2455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
2362:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c **** /**
5762 .loc 1 2362 1 is_stmt 0 view .LVU1676
5763 0000 7047 bx lr
- ARM GAS /tmp/cc6Nb46Q.s page 175
+ ARM GAS /tmp/ccGZcuZQ.s page 175
5764 .cfi_endproc
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5812 0002 90F84400 ldrb r0, [r0, #68] @ zero_extendqisi2
5813 .LVL422:
2409:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_tim_ex.c ****
- ARM GAS /tmp/cc6Nb46Q.s page 176
+ ARM GAS /tmp/ccGZcuZQ.s page 176
5814 .loc 1 2409 19 discriminator 1 view .LVU1687
@@ -10558,120 +10558,120 @@ ARM GAS /tmp/cc6Nb46Q.s page 1
5859 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
5860 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
5861 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h"
- ARM GAS /tmp/cc6Nb46Q.s page 177
+ ARM GAS /tmp/ccGZcuZQ.s page 177
- ARM GAS /tmp/cc6Nb46Q.s page 178
+ ARM GAS /tmp/ccGZcuZQ.s page 178
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_tim_ex.c
- /tmp/cc6Nb46Q.s:20 .text.TIM_CCxNChannelCmd:00000000 $t
- /tmp/cc6Nb46Q.s:25 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd
- /tmp/cc6Nb46Q.s:63 .text.TIM_DMAErrorCCxN:00000000 $t
- /tmp/cc6Nb46Q.s:68 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN
- /tmp/cc6Nb46Q.s:148 .text.TIM_DMADelayPulseNCplt:00000000 $t
- /tmp/cc6Nb46Q.s:153 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt
- /tmp/cc6Nb46Q.s:252 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t
- /tmp/cc6Nb46Q.s:258 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit
- /tmp/cc6Nb46Q.s:273 .text.HAL_TIMEx_HallSensor_Init:00000000 $t
- /tmp/cc6Nb46Q.s:279 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init
- /tmp/cc6Nb46Q.s:496 .text.HAL_TIMEx_HallSensor_Init:000000d4 $d
- /tmp/cc6Nb46Q.s:501 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t
- /tmp/cc6Nb46Q.s:507 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit
- /tmp/cc6Nb46Q.s:522 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t
- /tmp/cc6Nb46Q.s:528 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit
- /tmp/cc6Nb46Q.s:598 .text.HAL_TIMEx_HallSensor_Start:00000000 $t
- /tmp/cc6Nb46Q.s:604 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start
- /tmp/cc6Nb46Q.s:765 .text.HAL_TIMEx_HallSensor_Start:000000c0 $d
- /tmp/cc6Nb46Q.s:771 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t
- /tmp/cc6Nb46Q.s:777 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop
- /tmp/cc6Nb46Q.s:836 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t
- /tmp/cc6Nb46Q.s:842 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT
- /tmp/cc6Nb46Q.s:1008 .text.HAL_TIMEx_HallSensor_Start_IT:000000cc $d
- /tmp/cc6Nb46Q.s:1014 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t
- /tmp/cc6Nb46Q.s:1020 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT
- /tmp/cc6Nb46Q.s:1084 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:1090 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA
- /tmp/cc6Nb46Q.s:1282 .text.HAL_TIMEx_HallSensor_Start_DMA:000000e8 $d
- /tmp/cc6Nb46Q.s:1291 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:1297 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA
- /tmp/cc6Nb46Q.s:1362 .text.HAL_TIMEx_OCN_Start:00000000 $t
- /tmp/cc6Nb46Q.s:1368 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start
- /tmp/cc6Nb46Q.s:1559 .text.HAL_TIMEx_OCN_Start:000000f8 $d
- /tmp/cc6Nb46Q.s:1565 .text.HAL_TIMEx_OCN_Stop:00000000 $t
- /tmp/cc6Nb46Q.s:1571 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop
- /tmp/cc6Nb46Q.s:1668 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t
- /tmp/cc6Nb46Q.s:1674 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT
- /tmp/cc6Nb46Q.s:1908 .text.HAL_TIMEx_OCN_Start_IT:00000130 $d
- /tmp/cc6Nb46Q.s:1914 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t
- /tmp/cc6Nb46Q.s:1920 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT
- /tmp/cc6Nb46Q.s:2086 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:2092 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA
- /tmp/cc6Nb46Q.s:2515 .text.HAL_TIMEx_OCN_Start_DMA:00000218 $d
- /tmp/cc6Nb46Q.s:2524 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:2530 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA
- /tmp/cc6Nb46Q.s:2694 .text.HAL_TIMEx_PWMN_Start:00000000 $t
- /tmp/cc6Nb46Q.s:2700 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start
- /tmp/cc6Nb46Q.s:2891 .text.HAL_TIMEx_PWMN_Start:000000f8 $d
- /tmp/cc6Nb46Q.s:2897 .text.HAL_TIMEx_PWMN_Stop:00000000 $t
- /tmp/cc6Nb46Q.s:2903 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop
- /tmp/cc6Nb46Q.s:3000 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t
- /tmp/cc6Nb46Q.s:3006 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT
- /tmp/cc6Nb46Q.s:3240 .text.HAL_TIMEx_PWMN_Start_IT:00000130 $d
- /tmp/cc6Nb46Q.s:3246 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t
- /tmp/cc6Nb46Q.s:3252 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT
- ARM GAS /tmp/cc6Nb46Q.s page 179
+ /tmp/ccGZcuZQ.s:20 .text.TIM_CCxNChannelCmd:00000000 $t
+ /tmp/ccGZcuZQ.s:25 .text.TIM_CCxNChannelCmd:00000000 TIM_CCxNChannelCmd
+ /tmp/ccGZcuZQ.s:63 .text.TIM_DMAErrorCCxN:00000000 $t
+ /tmp/ccGZcuZQ.s:68 .text.TIM_DMAErrorCCxN:00000000 TIM_DMAErrorCCxN
+ /tmp/ccGZcuZQ.s:148 .text.TIM_DMADelayPulseNCplt:00000000 $t
+ /tmp/ccGZcuZQ.s:153 .text.TIM_DMADelayPulseNCplt:00000000 TIM_DMADelayPulseNCplt
+ /tmp/ccGZcuZQ.s:252 .text.HAL_TIMEx_HallSensor_MspInit:00000000 $t
+ /tmp/ccGZcuZQ.s:258 .text.HAL_TIMEx_HallSensor_MspInit:00000000 HAL_TIMEx_HallSensor_MspInit
+ /tmp/ccGZcuZQ.s:273 .text.HAL_TIMEx_HallSensor_Init:00000000 $t
+ /tmp/ccGZcuZQ.s:279 .text.HAL_TIMEx_HallSensor_Init:00000000 HAL_TIMEx_HallSensor_Init
+ /tmp/ccGZcuZQ.s:496 .text.HAL_TIMEx_HallSensor_Init:000000d4 $d
+ /tmp/ccGZcuZQ.s:501 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 $t
+ /tmp/ccGZcuZQ.s:507 .text.HAL_TIMEx_HallSensor_MspDeInit:00000000 HAL_TIMEx_HallSensor_MspDeInit
+ /tmp/ccGZcuZQ.s:522 .text.HAL_TIMEx_HallSensor_DeInit:00000000 $t
+ /tmp/ccGZcuZQ.s:528 .text.HAL_TIMEx_HallSensor_DeInit:00000000 HAL_TIMEx_HallSensor_DeInit
+ /tmp/ccGZcuZQ.s:598 .text.HAL_TIMEx_HallSensor_Start:00000000 $t
+ /tmp/ccGZcuZQ.s:604 .text.HAL_TIMEx_HallSensor_Start:00000000 HAL_TIMEx_HallSensor_Start
+ /tmp/ccGZcuZQ.s:765 .text.HAL_TIMEx_HallSensor_Start:000000c0 $d
+ /tmp/ccGZcuZQ.s:771 .text.HAL_TIMEx_HallSensor_Stop:00000000 $t
+ /tmp/ccGZcuZQ.s:777 .text.HAL_TIMEx_HallSensor_Stop:00000000 HAL_TIMEx_HallSensor_Stop
+ /tmp/ccGZcuZQ.s:836 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:842 .text.HAL_TIMEx_HallSensor_Start_IT:00000000 HAL_TIMEx_HallSensor_Start_IT
+ /tmp/ccGZcuZQ.s:1008 .text.HAL_TIMEx_HallSensor_Start_IT:000000cc $d
+ /tmp/ccGZcuZQ.s:1014 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:1020 .text.HAL_TIMEx_HallSensor_Stop_IT:00000000 HAL_TIMEx_HallSensor_Stop_IT
+ /tmp/ccGZcuZQ.s:1084 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:1090 .text.HAL_TIMEx_HallSensor_Start_DMA:00000000 HAL_TIMEx_HallSensor_Start_DMA
+ /tmp/ccGZcuZQ.s:1282 .text.HAL_TIMEx_HallSensor_Start_DMA:000000e8 $d
+ /tmp/ccGZcuZQ.s:1291 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:1297 .text.HAL_TIMEx_HallSensor_Stop_DMA:00000000 HAL_TIMEx_HallSensor_Stop_DMA
+ /tmp/ccGZcuZQ.s:1362 .text.HAL_TIMEx_OCN_Start:00000000 $t
+ /tmp/ccGZcuZQ.s:1368 .text.HAL_TIMEx_OCN_Start:00000000 HAL_TIMEx_OCN_Start
+ /tmp/ccGZcuZQ.s:1559 .text.HAL_TIMEx_OCN_Start:000000f8 $d
+ /tmp/ccGZcuZQ.s:1565 .text.HAL_TIMEx_OCN_Stop:00000000 $t
+ /tmp/ccGZcuZQ.s:1571 .text.HAL_TIMEx_OCN_Stop:00000000 HAL_TIMEx_OCN_Stop
+ /tmp/ccGZcuZQ.s:1668 .text.HAL_TIMEx_OCN_Start_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:1674 .text.HAL_TIMEx_OCN_Start_IT:00000000 HAL_TIMEx_OCN_Start_IT
+ /tmp/ccGZcuZQ.s:1908 .text.HAL_TIMEx_OCN_Start_IT:00000130 $d
+ /tmp/ccGZcuZQ.s:1914 .text.HAL_TIMEx_OCN_Stop_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:1920 .text.HAL_TIMEx_OCN_Stop_IT:00000000 HAL_TIMEx_OCN_Stop_IT
+ /tmp/ccGZcuZQ.s:2086 .text.HAL_TIMEx_OCN_Start_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:2092 .text.HAL_TIMEx_OCN_Start_DMA:00000000 HAL_TIMEx_OCN_Start_DMA
+ /tmp/ccGZcuZQ.s:2515 .text.HAL_TIMEx_OCN_Start_DMA:00000218 $d
+ /tmp/ccGZcuZQ.s:2524 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:2530 .text.HAL_TIMEx_OCN_Stop_DMA:00000000 HAL_TIMEx_OCN_Stop_DMA
+ /tmp/ccGZcuZQ.s:2694 .text.HAL_TIMEx_PWMN_Start:00000000 $t
+ /tmp/ccGZcuZQ.s:2700 .text.HAL_TIMEx_PWMN_Start:00000000 HAL_TIMEx_PWMN_Start
+ /tmp/ccGZcuZQ.s:2891 .text.HAL_TIMEx_PWMN_Start:000000f8 $d
+ /tmp/ccGZcuZQ.s:2897 .text.HAL_TIMEx_PWMN_Stop:00000000 $t
+ /tmp/ccGZcuZQ.s:2903 .text.HAL_TIMEx_PWMN_Stop:00000000 HAL_TIMEx_PWMN_Stop
+ /tmp/ccGZcuZQ.s:3000 .text.HAL_TIMEx_PWMN_Start_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:3006 .text.HAL_TIMEx_PWMN_Start_IT:00000000 HAL_TIMEx_PWMN_Start_IT
+ /tmp/ccGZcuZQ.s:3240 .text.HAL_TIMEx_PWMN_Start_IT:00000130 $d
+ /tmp/ccGZcuZQ.s:3246 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:3252 .text.HAL_TIMEx_PWMN_Stop_IT:00000000 HAL_TIMEx_PWMN_Stop_IT
+ ARM GAS /tmp/ccGZcuZQ.s page 179
- /tmp/cc6Nb46Q.s:3418 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:3424 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA
- /tmp/cc6Nb46Q.s:3847 .text.HAL_TIMEx_PWMN_Start_DMA:00000218 $d
- /tmp/cc6Nb46Q.s:3856 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:3862 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA
- /tmp/cc6Nb46Q.s:4026 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t
- /tmp/cc6Nb46Q.s:4032 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start
- /tmp/cc6Nb46Q.s:4156 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t
- /tmp/cc6Nb46Q.s:4162 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop
- /tmp/cc6Nb46Q.s:4258 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t
- /tmp/cc6Nb46Q.s:4264 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT
- /tmp/cc6Nb46Q.s:4399 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t
- /tmp/cc6Nb46Q.s:4405 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT
- /tmp/cc6Nb46Q.s:4511 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t
- /tmp/cc6Nb46Q.s:4517 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent
- /tmp/cc6Nb46Q.s:4641 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t
- /tmp/cc6Nb46Q.s:4647 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT
- /tmp/cc6Nb46Q.s:4771 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t
- /tmp/cc6Nb46Q.s:4777 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA
- /tmp/cc6Nb46Q.s:4918 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000088 $d
- /tmp/cc6Nb46Q.s:5639 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt
- /tmp/cc6Nb46Q.s:5696 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt
- /tmp/cc6Nb46Q.s:4925 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t
- /tmp/cc6Nb46Q.s:4931 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization
- /tmp/cc6Nb46Q.s:5087 .text.HAL_TIMEx_MasterConfigSynchronization:00000098 $d
- /tmp/cc6Nb46Q.s:5093 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t
- /tmp/cc6Nb46Q.s:5099 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime
- /tmp/cc6Nb46Q.s:5264 .text.HAL_TIMEx_ConfigBreakDeadTime:00000088 $d
- /tmp/cc6Nb46Q.s:5270 .text.HAL_TIMEx_ConfigBreakInput:00000000 $t
- /tmp/cc6Nb46Q.s:5276 .text.HAL_TIMEx_ConfigBreakInput:00000000 HAL_TIMEx_ConfigBreakInput
- /tmp/cc6Nb46Q.s:5478 .text.HAL_TIMEx_RemapConfig:00000000 $t
- /tmp/cc6Nb46Q.s:5484 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig
- /tmp/cc6Nb46Q.s:5533 .text.HAL_TIMEx_GroupChannel5:00000000 $t
- /tmp/cc6Nb46Q.s:5539 .text.HAL_TIMEx_GroupChannel5:00000000 HAL_TIMEx_GroupChannel5
- /tmp/cc6Nb46Q.s:5612 .text.HAL_TIMEx_CommutCallback:00000000 $t
- /tmp/cc6Nb46Q.s:5618 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback
- /tmp/cc6Nb46Q.s:5633 .text.TIMEx_DMACommutationCplt:00000000 $t
- /tmp/cc6Nb46Q.s:5669 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t
- /tmp/cc6Nb46Q.s:5675 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback
- /tmp/cc6Nb46Q.s:5690 .text.TIMEx_DMACommutationHalfCplt:00000000 $t
- /tmp/cc6Nb46Q.s:5726 .text.HAL_TIMEx_BreakCallback:00000000 $t
- /tmp/cc6Nb46Q.s:5732 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback
- /tmp/cc6Nb46Q.s:5747 .text.HAL_TIMEx_Break2Callback:00000000 $t
- /tmp/cc6Nb46Q.s:5753 .text.HAL_TIMEx_Break2Callback:00000000 HAL_TIMEx_Break2Callback
- /tmp/cc6Nb46Q.s:5768 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t
- /tmp/cc6Nb46Q.s:5774 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState
- /tmp/cc6Nb46Q.s:5792 .text.HAL_TIMEx_GetChannelNState:00000000 $t
- /tmp/cc6Nb46Q.s:5798 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState
+ /tmp/ccGZcuZQ.s:3418 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:3424 .text.HAL_TIMEx_PWMN_Start_DMA:00000000 HAL_TIMEx_PWMN_Start_DMA
+ /tmp/ccGZcuZQ.s:3847 .text.HAL_TIMEx_PWMN_Start_DMA:00000218 $d
+ /tmp/ccGZcuZQ.s:3856 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:3862 .text.HAL_TIMEx_PWMN_Stop_DMA:00000000 HAL_TIMEx_PWMN_Stop_DMA
+ /tmp/ccGZcuZQ.s:4026 .text.HAL_TIMEx_OnePulseN_Start:00000000 $t
+ /tmp/ccGZcuZQ.s:4032 .text.HAL_TIMEx_OnePulseN_Start:00000000 HAL_TIMEx_OnePulseN_Start
+ /tmp/ccGZcuZQ.s:4156 .text.HAL_TIMEx_OnePulseN_Stop:00000000 $t
+ /tmp/ccGZcuZQ.s:4162 .text.HAL_TIMEx_OnePulseN_Stop:00000000 HAL_TIMEx_OnePulseN_Stop
+ /tmp/ccGZcuZQ.s:4258 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:4264 .text.HAL_TIMEx_OnePulseN_Start_IT:00000000 HAL_TIMEx_OnePulseN_Start_IT
+ /tmp/ccGZcuZQ.s:4399 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:4405 .text.HAL_TIMEx_OnePulseN_Stop_IT:00000000 HAL_TIMEx_OnePulseN_Stop_IT
+ /tmp/ccGZcuZQ.s:4511 .text.HAL_TIMEx_ConfigCommutEvent:00000000 $t
+ /tmp/ccGZcuZQ.s:4517 .text.HAL_TIMEx_ConfigCommutEvent:00000000 HAL_TIMEx_ConfigCommutEvent
+ /tmp/ccGZcuZQ.s:4641 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 $t
+ /tmp/ccGZcuZQ.s:4647 .text.HAL_TIMEx_ConfigCommutEvent_IT:00000000 HAL_TIMEx_ConfigCommutEvent_IT
+ /tmp/ccGZcuZQ.s:4771 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 $t
+ /tmp/ccGZcuZQ.s:4777 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000000 HAL_TIMEx_ConfigCommutEvent_DMA
+ /tmp/ccGZcuZQ.s:4918 .text.HAL_TIMEx_ConfigCommutEvent_DMA:00000088 $d
+ /tmp/ccGZcuZQ.s:5639 .text.TIMEx_DMACommutationCplt:00000000 TIMEx_DMACommutationCplt
+ /tmp/ccGZcuZQ.s:5696 .text.TIMEx_DMACommutationHalfCplt:00000000 TIMEx_DMACommutationHalfCplt
+ /tmp/ccGZcuZQ.s:4925 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 $t
+ /tmp/ccGZcuZQ.s:4931 .text.HAL_TIMEx_MasterConfigSynchronization:00000000 HAL_TIMEx_MasterConfigSynchronization
+ /tmp/ccGZcuZQ.s:5087 .text.HAL_TIMEx_MasterConfigSynchronization:00000098 $d
+ /tmp/ccGZcuZQ.s:5093 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 $t
+ /tmp/ccGZcuZQ.s:5099 .text.HAL_TIMEx_ConfigBreakDeadTime:00000000 HAL_TIMEx_ConfigBreakDeadTime
+ /tmp/ccGZcuZQ.s:5264 .text.HAL_TIMEx_ConfigBreakDeadTime:00000088 $d
+ /tmp/ccGZcuZQ.s:5270 .text.HAL_TIMEx_ConfigBreakInput:00000000 $t
+ /tmp/ccGZcuZQ.s:5276 .text.HAL_TIMEx_ConfigBreakInput:00000000 HAL_TIMEx_ConfigBreakInput
+ /tmp/ccGZcuZQ.s:5478 .text.HAL_TIMEx_RemapConfig:00000000 $t
+ /tmp/ccGZcuZQ.s:5484 .text.HAL_TIMEx_RemapConfig:00000000 HAL_TIMEx_RemapConfig
+ /tmp/ccGZcuZQ.s:5533 .text.HAL_TIMEx_GroupChannel5:00000000 $t
+ /tmp/ccGZcuZQ.s:5539 .text.HAL_TIMEx_GroupChannel5:00000000 HAL_TIMEx_GroupChannel5
+ /tmp/ccGZcuZQ.s:5612 .text.HAL_TIMEx_CommutCallback:00000000 $t
+ /tmp/ccGZcuZQ.s:5618 .text.HAL_TIMEx_CommutCallback:00000000 HAL_TIMEx_CommutCallback
+ /tmp/ccGZcuZQ.s:5633 .text.TIMEx_DMACommutationCplt:00000000 $t
+ /tmp/ccGZcuZQ.s:5669 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 $t
+ /tmp/ccGZcuZQ.s:5675 .text.HAL_TIMEx_CommutHalfCpltCallback:00000000 HAL_TIMEx_CommutHalfCpltCallback
+ /tmp/ccGZcuZQ.s:5690 .text.TIMEx_DMACommutationHalfCplt:00000000 $t
+ /tmp/ccGZcuZQ.s:5726 .text.HAL_TIMEx_BreakCallback:00000000 $t
+ /tmp/ccGZcuZQ.s:5732 .text.HAL_TIMEx_BreakCallback:00000000 HAL_TIMEx_BreakCallback
+ /tmp/ccGZcuZQ.s:5747 .text.HAL_TIMEx_Break2Callback:00000000 $t
+ /tmp/ccGZcuZQ.s:5753 .text.HAL_TIMEx_Break2Callback:00000000 HAL_TIMEx_Break2Callback
+ /tmp/ccGZcuZQ.s:5768 .text.HAL_TIMEx_HallSensor_GetState:00000000 $t
+ /tmp/ccGZcuZQ.s:5774 .text.HAL_TIMEx_HallSensor_GetState:00000000 HAL_TIMEx_HallSensor_GetState
+ /tmp/ccGZcuZQ.s:5792 .text.HAL_TIMEx_GetChannelNState:00000000 $t
+ /tmp/ccGZcuZQ.s:5798 .text.HAL_TIMEx_GetChannelNState:00000000 HAL_TIMEx_GetChannelNState
UNDEFINED SYMBOLS
HAL_TIM_ErrorCallback
@@ -10681,7 +10681,7 @@ TIM_TI1_SetConfig
TIM_OC2_SetConfig
TIM_CCxChannelCmd
HAL_DMA_Start_IT
- ARM GAS /tmp/cc6Nb46Q.s page 180
+ ARM GAS /tmp/ccGZcuZQ.s page 180
TIM_DMACaptureCplt
diff --git a/build/stm32f7xx_hal_uart.lst b/build/stm32f7xx_hal_uart.lst
index 98bc164..cca85de 100644
--- a/build/stm32f7xx_hal_uart.lst
+++ b/build/stm32f7xx_hal_uart.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccsprDvq.s page 1
+ARM GAS /tmp/ccOAZfRE.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
- ARM GAS /tmp/ccsprDvq.s page 2
+ ARM GAS /tmp/ccOAZfRE.s page 2
33:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (++) Enable the USARTx interface clock.
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** allows the user to configure dynamically the driver callbacks.
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** [..]
- ARM GAS /tmp/ccsprDvq.s page 3
+ ARM GAS /tmp/ccOAZfRE.s page 3
90:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** Use Function HAL_UART_RegisterCallback() to register a user callback.
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** using HAL_UART_RegisterCallback() before calling HAL_UART_DeInit()
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** or HAL_UART_Init() function.
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 4
+ ARM GAS /tmp/ccOAZfRE.s page 4
147:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** [..]
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_DMATxAbortCallback(DMA_HandleTypeDef *hdma);
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_DMARxAbortCallback(DMA_HandleTypeDef *hdma);
- ARM GAS /tmp/ccsprDvq.s page 5
+ ARM GAS /tmp/ccOAZfRE.s page 5
204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_DMATxOnlyAbortCallback(DMA_HandleTypeDef *hdma);
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** Depending on the frame length defined by the M1 and M0 bits (7-bit,
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** 8-bit or 9-bit), the possible UART formats are listed in the
- ARM GAS /tmp/ccsprDvq.s page 6
+ ARM GAS /tmp/ccOAZfRE.s page 6
261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** following table.
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->MspInitCallback == NULL)
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 7
+ ARM GAS /tmp/ccOAZfRE.s page 7
318:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspInitCallback = HAL_UART_MspInit;
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check UART instance */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 8
+ ARM GAS /tmp/ccOAZfRE.s page 8
375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->gState == HAL_UART_STATE_RESET)
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /**
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Initialize the LIN mode according to the specified
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * parameters in the UART_InitTypeDef and creates the associated handle.
- ARM GAS /tmp/ccsprDvq.s page 9
+ ARM GAS /tmp/ccOAZfRE.s page 9
432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle.
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_DISABLE(huart);
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Perform advanced settings configuration */
- ARM GAS /tmp/ccsprDvq.s page 10
+ ARM GAS /tmp/ccOAZfRE.s page 10
489:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* For some items, configuration requires to be done prior TE and RE bits are set */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR;
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 11
+ ARM GAS /tmp/ccOAZfRE.s page 11
546:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check the wake up method parameter */
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_ENABLE(huart);
- ARM GAS /tmp/ccsprDvq.s page 12
+ ARM GAS /tmp/ccOAZfRE.s page 12
603:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Initialize the UART MSP.
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle.
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval None
- ARM GAS /tmp/ccsprDvq.s page 13
+ ARM GAS /tmp/ccOAZfRE.s page 13
660:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (pCallback == NULL)
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 14
+ ARM GAS /tmp/ccOAZfRE.s page 14
717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_INVALID_CALLBACK;
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID :
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspDeInitCallback = pCallback;
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break;
- ARM GAS /tmp/ccsprDvq.s page 15
+ ARM GAS /tmp/ccOAZfRE.s page 15
774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_WAKEUP_CB_ID Wakeup Callback ID
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_MSPINIT_CB_ID MspInit Callback ID
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @arg @ref HAL_UART_MSPDEINIT_CB_ID MspDeInit Callback ID
- ARM GAS /tmp/ccsprDvq.s page 16
+ ARM GAS /tmp/ccOAZfRE.s page 16
831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break;
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case HAL_UART_MSPDEINIT_CB_ID :
- ARM GAS /tmp/ccsprDvq.s page 17
+ ARM GAS /tmp/ccOAZfRE.s page 17
888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->MspDeInitCallback = HAL_UART_MspDeInit; /* Legacy weak MspDe
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR;
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 18
+ ARM GAS /tmp/ccOAZfRE.s page 18
945:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_READY)
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) There are two mode of transfer:
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Blocking mode: The communication is performed in polling mode.
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** The HAL status of all data processing is returned by the same function
- ARM GAS /tmp/ccsprDvq.s page 19
+ ARM GAS /tmp/ccOAZfRE.s page 19
1002:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** after finishing transfer.
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (#) In Non-Blocking mode transfers, possible errors are split into 2 categories.
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** Errors are handled as follows :
- ARM GAS /tmp/ccsprDvq.s page 20
+ ARM GAS /tmp/ccOAZfRE.s page 20
1059:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Error is considered as Recoverable and non blocking : Transfer could go till end, but er
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits = NULL;
- ARM GAS /tmp/ccsprDvq.s page 21
+ ARM GAS /tmp/ccOAZfRE.s page 21
1116:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits = (const uint16_t *) pData;
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements).
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be received.
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Timeout Timeout duration.
- ARM GAS /tmp/ccsprDvq.s page 22
+ ARM GAS /tmp/ccOAZfRE.s page 22
1173:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *pdata16bits = (uint16_t)(huart->Instance->RDR & uhMask);
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits++;
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 23
+ ARM GAS /tmp/ccOAZfRE.s page 23
1230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = UART_TxISR_8BIT;
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 24
+ ARM GAS /tmp/ccOAZfRE.s page 24
1287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Enable the Transmit Data Register Empty interrupt */
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle.
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param pData Pointer to data buffer (u8 or u16 data elements).
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param Size Amount of data elements (u8 or u16) to be sent.
- ARM GAS /tmp/ccsprDvq.s page 25
+ ARM GAS /tmp/ccOAZfRE.s page 25
1344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_BUSY;
- ARM GAS /tmp/ccsprDvq.s page 26
+ ARM GAS /tmp/ccOAZfRE.s page 26
1401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (gstate == HAL_UART_STATE_BUSY_TX))
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable the UART DMA Tx request */
- ARM GAS /tmp/ccsprDvq.s page 27
+ ARM GAS /tmp/ccOAZfRE.s page 27
1458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAT);
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* The Lock is not implemented on this API to allow the user application
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback()
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
- ARM GAS /tmp/ccsprDvq.s page 28
+ ARM GAS /tmp/ccOAZfRE.s page 28
1515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1569:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
1570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_OK;
1571:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 29
+ ARM GAS /tmp/ccOAZfRE.s page 29
1572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1626:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable the UART DMA Rx request if enabled */
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_DMAR);
1628:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 30
+ ARM GAS /tmp/ccOAZfRE.s page 30
1629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort the UART DMA Rx channel : use blocking DMA Abort API (no callback) */
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1683:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1684:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Disable TXEIE and TCIE interrupts */
1685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
- ARM GAS /tmp/ccsprDvq.s page 31
+ ARM GAS /tmp/ccOAZfRE.s page 31
1686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1740:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
1741:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* If Reception till IDLE event was ongoing, disable IDLEIE interrupt */
1742:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
- ARM GAS /tmp/ccsprDvq.s page 32
+ ARM GAS /tmp/ccOAZfRE.s page 32
1743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1797:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Set handle State to READY
1798:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - At abort completion, call user abort complete callback
1799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @note This procedure is executed in Interrupt mode, meaning that abort procedure could be
- ARM GAS /tmp/ccsprDvq.s page 33
+ ARM GAS /tmp/ccOAZfRE.s page 33
1800:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * considered as completed only when user abort complete callback is executed (not when ex
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1854:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort the UART DMA Tx channel : use non blocking DMA Abort API (callback) */
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->hdmatx != NULL)
1856:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 34
+ ARM GAS /tmp/ccOAZfRE.s page 34
1857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* UART Tx DMA Abort callback has already been initialised :
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1911:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Clear the Error flags in the ICR register */
1912:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF | UART_CLEAR_NEF | UART_CLEAR_PEF | UART_CLEAR_FEF
1913:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 35
+ ARM GAS /tmp/ccOAZfRE.s page 35
1914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Abort DMA TX */
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (HAL_DMA_Abort_IT(huart->hdmatx) != HAL_OK)
1970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 36
+ ARM GAS /tmp/ccOAZfRE.s page 36
1971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Call Directly huart->hdmatx->XferAbortCallback function in case of error */
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2025:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * This procedure performs following operations :
2026:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Disable UART Interrupts (Rx)
2027:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Disable the DMA transfer in the peripheral register (if enabled)
- ARM GAS /tmp/ccsprDvq.s page 37
+ ARM GAS /tmp/ccOAZfRE.s page 37
2028:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - Abort DMA transfer by calling HAL_DMA_Abort_IT (in case of transfer in DMA mode)
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY;
2083:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
2084:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 38
+ ARM GAS /tmp/ccOAZfRE.s page 38
2085:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* As no DMA to be aborted, call directly user Abort complete callback */
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2139:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (errorflags == 0U)
2140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
2141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* UART in mode Receiver ---------------------------------------------------*/
- ARM GAS /tmp/ccsprDvq.s page 39
+ ARM GAS /tmp/ccOAZfRE.s page 39
2142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (((isrflags & USART_ISR_RXNE) != 0U)
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCode |= HAL_UART_ERROR_RTO;
2198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 40
+ ARM GAS /tmp/ccOAZfRE.s page 40
2199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2253:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else
2254:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak error callback*/
2255:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_UART_ErrorCallback(huart);
- ARM GAS /tmp/ccsprDvq.s page 41
+ ARM GAS /tmp/ccOAZfRE.s page 41
2256:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxXferCount = nb_remaining_rx_data;
2311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* In Normal mode, end DMA xfer and HAL UART Rx process*/
- ARM GAS /tmp/ccsprDvq.s page 42
+ ARM GAS /tmp/ccOAZfRE.s page 42
2313:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->hdmarx->Init.Mode != DMA_CIRCULAR)
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2367:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxISR = NULL;
2368:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2369:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
- ARM GAS /tmp/ccsprDvq.s page 43
+ ARM GAS /tmp/ccOAZfRE.s page 43
2370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2424:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return;
2425:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
2426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 44
+ ARM GAS /tmp/ccOAZfRE.s page 44
2427:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */
2482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** UNUSED(huart);
2483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 45
+ ARM GAS /tmp/ccOAZfRE.s page 45
2484:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* NOTE: This function should not be modified, when the callback is needed,
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */
2539:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** __weak void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart)
2540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 46
+ ARM GAS /tmp/ccOAZfRE.s page 46
2541:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2595:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** [..]
2596:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** This subsection provides a set of functions allowing to control the UART.
2597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) HAL_UART_ReceiverTimeout_Config() API allows to configure the receiver timeout value on th
- ARM GAS /tmp/ccsprDvq.s page 47
+ ARM GAS /tmp/ccOAZfRE.s page 47
2598:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) HAL_UART_EnableReceiverTimeout() API enables the receiver timeout feature
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2652:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else
2653:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
2654:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_BUSY;
- ARM GAS /tmp/ccsprDvq.s page 48
+ ARM GAS /tmp/ccOAZfRE.s page 48
2655:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2709:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /**
2710:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
2711:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * as it may not have been in mute mode at this very moment).
- ARM GAS /tmp/ccsprDvq.s page 49
+ ARM GAS /tmp/ccOAZfRE.s page 49
2712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param huart UART handle.
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2766:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval HAL status.
2767:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */
2768:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
- ARM GAS /tmp/ccsprDvq.s page 50
+ ARM GAS /tmp/ccOAZfRE.s page 50
2769:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** This subsection provides functions allowing to :
2824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Return the UART handle state.
2825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (+) Return the UART handle error code
- ARM GAS /tmp/ccsprDvq.s page 51
+ ARM GAS /tmp/ccOAZfRE.s page 51
2826:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2880:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxHalfCpltCallback = HAL_UART_RxHalfCpltCallback; /* Legacy weak RxHalfCpltC
2881:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxCpltCallback = HAL_UART_RxCpltCallback; /* Legacy weak RxCpltCallb
2882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ErrorCallback = HAL_UART_ErrorCallback; /* Legacy weak ErrorCallba
- ARM GAS /tmp/ccsprDvq.s page 52
+ ARM GAS /tmp/ccOAZfRE.s page 52
2883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->AbortCpltCallback = HAL_UART_AbortCpltCallback; /* Legacy weak AbortCpltCa
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2937:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Configure
2938:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - UART HardWare Flow Control: set CTSE and RTSE bits according
2939:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * to huart->Init.HwFlowCtl value
- ARM GAS /tmp/ccsprDvq.s page 53
+ ARM GAS /tmp/ccOAZfRE.s page 53
2940:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * - one-bit sampling method versus three samples' majority rule according
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** switch (clocksource)
2995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
2996:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK1:
- ARM GAS /tmp/ccsprDvq.s page 54
+ ARM GAS /tmp/ccOAZfRE.s page 54
2997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pclk = HAL_RCC_GetPCLK1Freq();
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
3052:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
3053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
- ARM GAS /tmp/ccsprDvq.s page 55
+ ARM GAS /tmp/ccOAZfRE.s page 55
3054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3108:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
3109:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
3110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
- ARM GAS /tmp/ccsprDvq.s page 56
+ ARM GAS /tmp/ccOAZfRE.s page 56
3111:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
3166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
3167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USART_ISR_REACK */
- ARM GAS /tmp/ccsprDvq.s page 57
+ ARM GAS /tmp/ccOAZfRE.s page 57
3168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3222:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR;
3223:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
3224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET)
- ARM GAS /tmp/ccsprDvq.s page 58
+ ARM GAS /tmp/ccOAZfRE.s page 58
3225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** else
3280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
3281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxISR = UART_RxISR_8BIT;
- ARM GAS /tmp/ccsprDvq.s page 59
+ ARM GAS /tmp/ccOAZfRE.s page 59
3282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxState = HAL_UART_STATE_READY;
3337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** return HAL_ERROR;
- ARM GAS /tmp/ccsprDvq.s page 60
+ ARM GAS /tmp/ccOAZfRE.s page 60
3339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9:Drivers/CMSIS/Include/cmsis_gcc.h **** *
10:Drivers/CMSIS/Include/cmsis_gcc.h **** * SPDX-License-Identifier: Apache-2.0
11:Drivers/CMSIS/Include/cmsis_gcc.h **** *
- ARM GAS /tmp/ccsprDvq.s page 61
+ ARM GAS /tmp/ccOAZfRE.s page 61
12:Drivers/CMSIS/Include/cmsis_gcc.h **** * Licensed under the Apache License, Version 2.0 (the License); you may
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
66:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
67:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __PACKED_UNION
68:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __PACKED_UNION union __attribute__((packed, aligned(1)))
- ARM GAS /tmp/ccsprDvq.s page 62
+ ARM GAS /tmp/ccOAZfRE.s page 62
69:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
123:Drivers/CMSIS/Include/cmsis_gcc.h ****
124:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
125:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Enable IRQ Interrupts
- ARM GAS /tmp/ccsprDvq.s page 63
+ ARM GAS /tmp/ccOAZfRE.s page 63
126:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
180:Drivers/CMSIS/Include/cmsis_gcc.h **** */
181:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
182:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccsprDvq.s page 64
+ ARM GAS /tmp/ccOAZfRE.s page 64
183:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
237:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
238:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
239:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 65
+ ARM GAS /tmp/ccOAZfRE.s page 65
240:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
294:Drivers/CMSIS/Include/cmsis_gcc.h ****
295:Drivers/CMSIS/Include/cmsis_gcc.h ****
296:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccsprDvq.s page 66
+ ARM GAS /tmp/ccOAZfRE.s page 66
297:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
351:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
352:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Stack Pointer (non-secure)
353:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
- ARM GAS /tmp/ccsprDvq.s page 67
+ ARM GAS /tmp/ccOAZfRE.s page 67
354:Drivers/CMSIS/Include/cmsis_gcc.h **** \return SP Register value
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
408:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask
409:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Priority Mask Register.
410:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] priMask Priority Mask
- ARM GAS /tmp/ccsprDvq.s page 68
+ ARM GAS /tmp/ccOAZfRE.s page 68
411:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
465:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, basepri" : "=r" (result) );
466:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
467:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 69
+ ARM GAS /tmp/ccOAZfRE.s page 69
468:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
522:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
523:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Fault Mask
524:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Fault Mask register.
- ARM GAS /tmp/ccsprDvq.s page 70
+ ARM GAS /tmp/ccOAZfRE.s page 70
525:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Fault Mask register value
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
579:Drivers/CMSIS/Include/cmsis_gcc.h ****
580:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
581:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
- ARM GAS /tmp/ccsprDvq.s page 71
+ ARM GAS /tmp/ccOAZfRE.s page 71
582:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
636:Drivers/CMSIS/Include/cmsis_gcc.h **** */
637:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
638:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccsprDvq.s page 72
+ ARM GAS /tmp/ccOAZfRE.s page 72
639:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
693:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
694:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
695:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit (non-secure)
- ARM GAS /tmp/ccsprDvq.s page 73
+ ARM GAS /tmp/ccOAZfRE.s page 73
696:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
750:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
751:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
752:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
- ARM GAS /tmp/ccsprDvq.s page 74
+ ARM GAS /tmp/ccOAZfRE.s page 74
753:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
807:Drivers/CMSIS/Include/cmsis_gcc.h **** }
808:Drivers/CMSIS/Include/cmsis_gcc.h ****
809:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccsprDvq.s page 75
+ ARM GAS /tmp/ccOAZfRE.s page 75
810:Drivers/CMSIS/Include/cmsis_gcc.h **** /*@} end of CMSIS_Core_RegAccFunctions */
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
864:Drivers/CMSIS/Include/cmsis_gcc.h **** after the instruction has been completed.
865:Drivers/CMSIS/Include/cmsis_gcc.h **** */
866:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __ISB(void)
- ARM GAS /tmp/ccsprDvq.s page 76
+ ARM GAS /tmp/ccOAZfRE.s page 76
867:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
921:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
922:Drivers/CMSIS/Include/cmsis_gcc.h ****
923:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
- ARM GAS /tmp/ccsprDvq.s page 77
+ ARM GAS /tmp/ccOAZfRE.s page 77
924:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
978:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
979:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
980:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccsprDvq.s page 78
+ ARM GAS /tmp/ccOAZfRE.s page 78
981:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1035:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1036:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint8_t) result); /* Add explicit type cast here */
1037:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 79
+ ARM GAS /tmp/ccOAZfRE.s page 79
1038:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
62 .loc 1 3367 3 is_stmt 1 discriminator 1 view .LVU11
63 .LBB417:
64 .LBI417:
- ARM GAS /tmp/ccsprDvq.s page 80
+ ARM GAS /tmp/ccOAZfRE.s page 80
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
69 .syntax unified
70 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
71 000a 42E80031 strex r1, r3, [r2]
- ARM GAS /tmp/ccsprDvq.s page 81
+ ARM GAS /tmp/ccOAZfRE.s page 81
72 @ 0 "" 2
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
112 .LBB419:
113 .loc 1 3382 3 discriminator 1 view .LVU25
114 .loc 1 3382 3 discriminator 1 view .LVU26
- ARM GAS /tmp/ccsprDvq.s page 82
+ ARM GAS /tmp/ccOAZfRE.s page 82
115 .loc 1 3382 3 discriminator 1 view .LVU27
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
161 .loc 1 3382 3 discriminator 1 view .LVU41
162 .LBE419:
163 .loc 1 3382 3 is_stmt 1 discriminator 2 view .LVU42
- ARM GAS /tmp/ccsprDvq.s page 83
+ ARM GAS /tmp/ccOAZfRE.s page 83
3383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
207 @ 0 "" 2
208 .LVL17:
209 .loc 2 1124 4 is_stmt 1 view .LVU59
- ARM GAS /tmp/ccsprDvq.s page 84
+ ARM GAS /tmp/ccOAZfRE.s page 84
210 .loc 2 1124 4 is_stmt 0 view .LVU60
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
247 .loc 1 3388 5 discriminator 1 view .LVU77
248 003e 0268 ldr r2, [r0]
- ARM GAS /tmp/ccsprDvq.s page 85
+ ARM GAS /tmp/ccOAZfRE.s page 85
249 .LVL19:
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
292 .LBE429:
293 .cfi_endproc
294 .LFE192:
- ARM GAS /tmp/ccsprDvq.s page 86
+ ARM GAS /tmp/ccOAZfRE.s page 86
296 .section .text.UART_TxISR_8BIT,"ax",%progbits
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3444:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Tx Half complete callback*/
3445:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxHalfCpltCallback(huart);
3446:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else
- ARM GAS /tmp/ccsprDvq.s page 87
+ ARM GAS /tmp/ccOAZfRE.s page 87
3447:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak Tx Half complete callback*/
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
3502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* In other cases : use Rx Complete callback */
3503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
- ARM GAS /tmp/ccsprDvq.s page 88
+ ARM GAS /tmp/ccOAZfRE.s page 88
3504:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Rx complete callback*/
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3558:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** UART_HandleTypeDef *huart = (UART_HandleTypeDef *)(hdma->Parent);
3559:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3560:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** const HAL_UART_StateTypeDef gstate = huart->gState;
- ARM GAS /tmp/ccsprDvq.s page 89
+ ARM GAS /tmp/ccOAZfRE.s page 89
3561:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** const HAL_UART_StateTypeDef rxstate = huart->RxState;
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * Abort still ongoing for Rx DMA Handle.
3616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @param hdma DMA handle.
3617:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @retval None
- ARM GAS /tmp/ccsprDvq.s page 90
+ ARM GAS /tmp/ccOAZfRE.s page 90
3618:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** */
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3672:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3673:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->hdmarx->XferAbortCallback = NULL;
3674:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 91
+ ARM GAS /tmp/ccOAZfRE.s page 91
3675:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check if an Abort process is still ongoing */
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3729:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->gState = HAL_UART_STATE_READY;
3730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Call user Abort complete callback */
- ARM GAS /tmp/ccsprDvq.s page 92
+ ARM GAS /tmp/ccOAZfRE.s page 92
3732:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
307 @ args = 0, pretend = 0, frame = 0
308 @ frame_needed = 0, uses_anonymous_args = 0
309 @ link register save eliminated.
- ARM GAS /tmp/ccsprDvq.s page 93
+ ARM GAS /tmp/ccOAZfRE.s page 93
3784:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Tx process is ongoing */
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
337 .LBB436:
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
338 .loc 2 1070 5 view .LVU104
- ARM GAS /tmp/ccsprDvq.s page 94
+ ARM GAS /tmp/ccOAZfRE.s page 94
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
381 .LBB439:
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
382 .loc 1 3793 7 discriminator 1 view .LVU119
- ARM GAS /tmp/ccsprDvq.s page 95
+ ARM GAS /tmp/ccOAZfRE.s page 95
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3793:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
425 .loc 1 3793 7 discriminator 1 view .LVU134
426 0030 0029 cmp r1, #0
- ARM GAS /tmp/ccsprDvq.s page 96
+ ARM GAS /tmp/ccOAZfRE.s page 96
427 0032 F6D1 bne .L12
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3804:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /**
3805:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @brief TX interrupt handler for 9 bits data word length.
3806:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * @note Function is called under interruption only, once
- ARM GAS /tmp/ccsprDvq.s page 97
+ ARM GAS /tmp/ccOAZfRE.s page 97
3807:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** * interruptions have been enabled by HAL_UART_Transmit_IT().
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
493 .loc 1 3821 7 is_stmt 1 discriminator 1 view .LVU157
494 .LBB444:
- ARM GAS /tmp/ccsprDvq.s page 98
+ ARM GAS /tmp/ccOAZfRE.s page 98
3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
536 .LBE448:
537 .LBE447:
3821:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 99
+ ARM GAS /tmp/ccOAZfRE.s page 99
538 .loc 1 3821 7 discriminator 1 view .LVU173
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
578 .loc 2 1121 4 view .LVU188
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccsprDvq.s page 100
+ ARM GAS /tmp/ccOAZfRE.s page 100
579 .loc 2 1123 4 view .LVU189
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
620 .loc 1 3831 7 is_stmt 1 view .LVU204
3831:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
621 .loc 1 3831 12 is_stmt 0 view .LVU205
- ARM GAS /tmp/ccsprDvq.s page 101
+ ARM GAS /tmp/ccOAZfRE.s page 101
622 0048 B0F85230 ldrh r3, [r0, #82]
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
673 .LFE147:
675 .section .text.HAL_UART_DeInit,"ax",%progbits
676 .align 1
- ARM GAS /tmp/ccsprDvq.s page 102
+ ARM GAS /tmp/ccOAZfRE.s page 102
677 .global HAL_UART_DeInit
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
719 001a 0368 ldr r3, [r0]
630:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->Instance->CR3 = 0x0U;
720 .loc 1 630 24 view .LVU227
- ARM GAS /tmp/ccsprDvq.s page 103
+ ARM GAS /tmp/ccOAZfRE.s page 103
721 001c 5C60 str r4, [r3, #4]
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
755 .L24:
756 .LCFI1:
757 .cfi_def_cfa_offset 0
- ARM GAS /tmp/ccsprDvq.s page 104
+ ARM GAS /tmp/ccOAZfRE.s page 104
758 .cfi_restore 3
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
802 0010 A0F85020 strh r2, [r0, #80] @ movhi
1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL;
803 .loc 1 1271 5 is_stmt 1 view .LVU260
- ARM GAS /tmp/ccsprDvq.s page 105
+ ARM GAS /tmp/ccOAZfRE.s page 105
1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL;
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
841 .loc 2 1070 5 view .LVU278
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccsprDvq.s page 106
+ ARM GAS /tmp/ccOAZfRE.s page 106
842 .loc 2 1072 4 view .LVU279
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
886 .L36:
1290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
887 .loc 1 1290 12 view .LVU292
- ARM GAS /tmp/ccsprDvq.s page 107
+ ARM GAS /tmp/ccOAZfRE.s page 107
888 .LBE459:
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
934 .loc 1 1347 1 is_stmt 0 view .LVU302
935 0000 1346 mov r3, r2
1349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 108
+ ARM GAS /tmp/ccOAZfRE.s page 108
936 .loc 1 1349 3 is_stmt 1 view .LVU303
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
974 .loc 1 1363 14 is_stmt 0 view .LVU320
975 0028 026F ldr r2, [r0, #112]
- ARM GAS /tmp/ccsprDvq.s page 109
+ ARM GAS /tmp/ccOAZfRE.s page 109
1363:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1013 .LVL70:
1378:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1014 .loc 1 1378 10 discriminator 1 view .LVU338
- ARM GAS /tmp/ccsprDvq.s page 110
+ ARM GAS /tmp/ccOAZfRE.s page 110
1015 004e 30B1 cbz r0, .L41
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1054 .LVL73:
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1055 .loc 2 1073 4 is_stmt 1 view .LVU354
- ARM GAS /tmp/ccsprDvq.s page 111
+ ARM GAS /tmp/ccOAZfRE.s page 111
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1100 .cfi_restore 14
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
1101 .loc 1 1400 12 view .LVU367
- ARM GAS /tmp/ccsprDvq.s page 112
+ ARM GAS /tmp/ccOAZfRE.s page 112
1102 0080 0220 movs r0, #2
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1150 .loc 1 1452 3 is_stmt 1 view .LVU375
1452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
1151 .loc 1 1452 31 is_stmt 0 view .LVU376
- ARM GAS /tmp/ccsprDvq.s page 113
+ ARM GAS /tmp/ccOAZfRE.s page 113
1152 0004 D0F88040 ldr r4, [r0, #128]
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1192 .LVL88:
1193 .L53:
1194 .LCFI7:
- ARM GAS /tmp/ccsprDvq.s page 114
+ ARM GAS /tmp/ccOAZfRE.s page 114
1195 .cfi_restore_state
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1234 .LVL93:
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1235 .loc 2 1123 4 is_stmt 0 view .LVU406
- ARM GAS /tmp/ccsprDvq.s page 115
+ ARM GAS /tmp/ccOAZfRE.s page 115
1236 .syntax unified
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1464:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1279 .loc 1 1464 5 discriminator 1 view .LVU420
1280 004c 23F48073 bic r3, r3, #256
- ARM GAS /tmp/ccsprDvq.s page 116
+ ARM GAS /tmp/ccOAZfRE.s page 116
1281 .LVL98:
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1321 005a 02F10803 add r3, r2, #8
1322 .LVL102:
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccsprDvq.s page 117
+ ARM GAS /tmp/ccOAZfRE.s page 117
1323 .loc 2 1072 4 is_stmt 0 view .LVU437
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1366 .loc 1 1465 5 is_stmt 1 discriminator 2 view .LVU450
1468:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
1367 .loc 1 1468 5 discriminator 1 view .LVU451
- ARM GAS /tmp/ccsprDvq.s page 118
+ ARM GAS /tmp/ccOAZfRE.s page 118
1368 .LBB480:
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1407 .syntax unified
1408 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1409 0080 42E80031 strex r1, r3, [r2]
- ARM GAS /tmp/ccsprDvq.s page 119
+ ARM GAS /tmp/ccOAZfRE.s page 119
1410 @ 0 "" 2
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1456 .loc 1 1499 5 is_stmt 1 discriminator 2 view .LVU478
1502:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
1457 .loc 1 1502 3 view .LVU479
- ARM GAS /tmp/ccsprDvq.s page 120
+ ARM GAS /tmp/ccOAZfRE.s page 120
1503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1498 .loc 2 1119 31 view .LVU494
1499 .LBB489:
- ARM GAS /tmp/ccsprDvq.s page 121
+ ARM GAS /tmp/ccOAZfRE.s page 121
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1541 .LBB491:
1542 .LBI491:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccsprDvq.s page 122
+ ARM GAS /tmp/ccOAZfRE.s page 122
1543 .loc 2 1068 31 view .LVU510
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
1586 .loc 1 1494 7 is_stmt 1 discriminator 2 view .LVU524
1496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 123
+ ARM GAS /tmp/ccOAZfRE.s page 123
1587 .loc 1 1496 5 discriminator 1 view .LVU525
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1626 .loc 2 1123 4 is_stmt 0 view .LVU540
1627 .syntax unified
1628 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- ARM GAS /tmp/ccsprDvq.s page 124
+ ARM GAS /tmp/ccOAZfRE.s page 124
1629 0058 42E80031 strex r1, r3, [r2]
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1670 .syntax unified
1671 .LBE502:
1672 .LBE501:
- ARM GAS /tmp/ccsprDvq.s page 125
+ ARM GAS /tmp/ccOAZfRE.s page 125
1499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1720 0000 38B5 push {r3, r4, r5, lr}
1721 .LCFI8:
1722 .cfi_def_cfa_offset 16
- ARM GAS /tmp/ccsprDvq.s page 126
+ ARM GAS /tmp/ccOAZfRE.s page 126
1723 .cfi_offset 3, -16
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1763 .loc 1 1526 5 is_stmt 1 discriminator 1 view .LVU580
1764 .LBB505:
1526:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 127
+ ARM GAS /tmp/ccOAZfRE.s page 127
1765 .loc 1 1526 5 discriminator 1 view .LVU581
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1805 003a 42E80031 strex r1, r3, [r2]
1806 @ 0 "" 2
1807 .LVL152:
- ARM GAS /tmp/ccsprDvq.s page 128
+ ARM GAS /tmp/ccOAZfRE.s page 128
1808 .loc 2 1124 4 is_stmt 1 view .LVU596
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1848 005e 1023 movs r3, #16
1849 0060 C4F88430 str r3, [r4, #132]
1538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 129
+ ARM GAS /tmp/ccOAZfRE.s page 129
1850 .loc 1 1538 11 is_stmt 1 view .LVU612
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1890 .LBB514:
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
1891 .loc 2 1121 4 view .LVU627
- ARM GAS /tmp/ccsprDvq.s page 130
+ ARM GAS /tmp/ccOAZfRE.s page 130
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1557:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
1933 .loc 1 1557 13 is_stmt 0 view .LVU643
1934 0094 606F ldr r0, [r4, #116]
- ARM GAS /tmp/ccsprDvq.s page 131
+ ARM GAS /tmp/ccOAZfRE.s page 131
1935 0096 FFF7FEFF bl HAL_DMA_GetError
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
1981 .loc 1 1588 3 is_stmt 1 discriminator 1 view .LVU654
1982 .LBB515:
- ARM GAS /tmp/ccsprDvq.s page 132
+ ARM GAS /tmp/ccOAZfRE.s page 132
1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2024 .LBE519:
2025 .LBE518:
1588:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- ARM GAS /tmp/ccsprDvq.s page 133
+ ARM GAS /tmp/ccOAZfRE.s page 133
2026 .loc 1 1588 3 discriminator 1 view .LVU670
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2066 .LBI523:
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2067 .loc 2 1119 31 view .LVU685
- ARM GAS /tmp/ccsprDvq.s page 134
+ ARM GAS /tmp/ccOAZfRE.s page 134
2068 .LBB524:
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2109 .loc 1 1601 5 discriminator 1 view .LVU701
1601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 135
+ ARM GAS /tmp/ccOAZfRE.s page 135
2110 .loc 1 1601 5 discriminator 1 view .LVU702
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2151 .LVL186:
2152 .loc 2 1124 4 is_stmt 1 view .LVU716
2153 .loc 2 1124 4 is_stmt 0 view .LVU717
- ARM GAS /tmp/ccsprDvq.s page 136
+ ARM GAS /tmp/ccOAZfRE.s page 136
2154 .thumb
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2193 .loc 1 1627 5 is_stmt 1 discriminator 1 view .LVU732
2194 .LBB530:
1627:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 137
+ ARM GAS /tmp/ccOAZfRE.s page 137
2195 .loc 1 1627 5 discriminator 1 view .LVU733
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2235 0082 42E80031 strex r1, r3, [r2]
2236 @ 0 "" 2
2237 .LVL196:
- ARM GAS /tmp/ccsprDvq.s page 138
+ ARM GAS /tmp/ccOAZfRE.s page 138
2238 .loc 2 1124 4 is_stmt 1 view .LVU748
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2277 00a6 0F22 movs r2, #15
2278 00a8 1A62 str r2, [r3, #32]
1658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 139
+ ARM GAS /tmp/ccOAZfRE.s page 139
2279 .loc 1 1658 3 view .LVU765
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2316 .syntax unified
2317 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2318 00c6 52E8003F ldrex r3, [r2]
- ARM GAS /tmp/ccsprDvq.s page 140
+ ARM GAS /tmp/ccOAZfRE.s page 140
2319 @ 0 "" 2
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2361 .loc 1 1612 12 discriminator 1 view .LVU796
2362 00de 2028 cmp r0, #32
2363 00e0 C2D1 bne .L85
- ARM GAS /tmp/ccsprDvq.s page 141
+ ARM GAS /tmp/ccOAZfRE.s page 141
1615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2407 .loc 1 1683 1 is_stmt 0 view .LVU809
2408 0000 10B5 push {r4, lr}
2409 .LCFI10:
- ARM GAS /tmp/ccsprDvq.s page 142
+ ARM GAS /tmp/ccOAZfRE.s page 142
2410 .cfi_def_cfa_offset 8
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2450 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
2451 000e 42E80031 strex r1, r3, [r2]
2452 @ 0 "" 2
- ARM GAS /tmp/ccsprDvq.s page 143
+ ARM GAS /tmp/ccOAZfRE.s page 143
2453 .LVL213:
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2493 0026 53E8003F ldrex r3, [r3]
2494 @ 0 "" 2
2495 .LVL217:
- ARM GAS /tmp/ccsprDvq.s page 144
+ ARM GAS /tmp/ccOAZfRE.s page 144
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2537 .loc 1 1698 7 is_stmt 1 view .LVU855
1698:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 145
+ ARM GAS /tmp/ccOAZfRE.s page 145
2538 .loc 1 1698 40 is_stmt 0 view .LVU856
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2577 0060 C4F88430 str r3, [r4, #132]
1707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
2578 .loc 1 1707 11 is_stmt 1 view .LVU872
- ARM GAS /tmp/ccsprDvq.s page 146
+ ARM GAS /tmp/ccOAZfRE.s page 146
1707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2625 .loc 2 1073 4 view .LVU883
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 147
+ ARM GAS /tmp/ccOAZfRE.s page 147
2626 .loc 2 1073 4 is_stmt 0 view .LVU884
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2668 .LBI556:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
2669 .loc 2 1068 31 view .LVU899
- ARM GAS /tmp/ccsprDvq.s page 148
+ ARM GAS /tmp/ccOAZfRE.s page 148
2670 .LBB557:
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2712 002a 0029 cmp r1, #0
2713 002c F3D1 bne .L102
2714 .LBE555:
- ARM GAS /tmp/ccsprDvq.s page 149
+ ARM GAS /tmp/ccOAZfRE.s page 149
1739:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2753 .LVL242:
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
2754 .loc 2 1073 4 is_stmt 1 view .LVU930
- ARM GAS /tmp/ccsprDvq.s page 150
+ ARM GAS /tmp/ccOAZfRE.s page 150
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1758:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
2796 .loc 1 1758 40 is_stmt 0 view .LVU946
2797 005a 0022 movs r2, #0
- ARM GAS /tmp/ccsprDvq.s page 151
+ ARM GAS /tmp/ccOAZfRE.s page 151
2798 005c 1A65 str r2, [r3, #80]
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2837 .LBB565:
1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
2838 .loc 1 1744 5 discriminator 1 view .LVU962
- ARM GAS /tmp/ccsprDvq.s page 152
+ ARM GAS /tmp/ccOAZfRE.s page 152
1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
2881 .loc 1 1744 5 discriminator 1 view .LVU977
2882 0094 0029 cmp r1, #0
- ARM GAS /tmp/ccsprDvq.s page 153
+ ARM GAS /tmp/ccOAZfRE.s page 153
2883 0096 F6D1 bne .L104
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2929 .section .text.UART_DMATransmitCplt,"ax",%progbits
2930 .align 1
2931 .syntax unified
- ARM GAS /tmp/ccsprDvq.s page 154
+ ARM GAS /tmp/ccOAZfRE.s page 154
2932 .thumb
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2973 .loc 2 1068 31 view .LVU1002
2974 .LBB572:
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccsprDvq.s page 155
+ ARM GAS /tmp/ccOAZfRE.s page 155
2975 .loc 2 1070 5 view .LVU1003
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3018 .LVL267:
3019 .L114:
3416:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 156
+ ARM GAS /tmp/ccOAZfRE.s page 156
3020 .loc 1 3416 5 discriminator 1 view .LVU1017
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3059 0034 42E80030 strex r0, r3, [r2]
3060 @ 0 "" 2
3061 .LVL271:
- ARM GAS /tmp/ccsprDvq.s page 157
+ ARM GAS /tmp/ccOAZfRE.s page 157
3062 .loc 2 1124 4 view .LVU1033
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3102 .LVL276:
3103 .loc 1 3844 1 is_stmt 0 view .LVU1042
3104 0000 08B5 push {r3, lr}
- ARM GAS /tmp/ccsprDvq.s page 158
+ ARM GAS /tmp/ccOAZfRE.s page 158
3105 .LCFI13:
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3149 .loc 2 1124 4 view .LVU1057
3150 .loc 2 1124 4 is_stmt 0 view .LVU1058
3151 .thumb
- ARM GAS /tmp/ccsprDvq.s page 159
+ ARM GAS /tmp/ccOAZfRE.s page 159
3152 .syntax unified
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3192 @ link register save eliminated.
2452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3193 .loc 1 2452 3 view .LVU1069
- ARM GAS /tmp/ccsprDvq.s page 160
+ ARM GAS /tmp/ccOAZfRE.s page 160
2457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3244 @ frame_needed = 0, uses_anonymous_args = 0
3245 @ link register save eliminated.
2467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 161
+ ARM GAS /tmp/ccOAZfRE.s page 161
3246 .loc 1 2467 3 view .LVU1078
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3298 .thumb_func
3300 UART_DMAError:
3301 .LVL291:
- ARM GAS /tmp/ccsprDvq.s page 162
+ ARM GAS /tmp/ccOAZfRE.s page 162
3302 .LFB197:
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3342 001a 9B68 ldr r3, [r3, #8]
3572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** (rxstate == HAL_UART_STATE_BUSY_RX))
3343 .loc 1 3572 6 view .LVU1100
- ARM GAS /tmp/ccsprDvq.s page 163
+ ARM GAS /tmp/ccOAZfRE.s page 163
3344 001c 13F0400F tst r3, #64
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3384 .LVL300:
3385 0054 E7E7 b .L128
3386 .cfi_endproc
- ARM GAS /tmp/ccsprDvq.s page 164
+ ARM GAS /tmp/ccOAZfRE.s page 164
3387 .LFE197:
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3435 .LVL304:
3436 .LFB169:
2510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Prevent unused argument(s) compilation warning */
- ARM GAS /tmp/ccsprDvq.s page 165
+ ARM GAS /tmp/ccOAZfRE.s page 165
3437 .loc 1 2510 1 is_stmt 1 view -0
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3483 .loc 2 1068 31 view .LVU1135
3484 .LBB587:
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccsprDvq.s page 166
+ ARM GAS /tmp/ccOAZfRE.s page 166
3485 .loc 2 1070 5 view .LVU1136
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3527 .loc 1 1809 3 discriminator 1 view .LVU1150
3528 .LBB590:
1809:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 167
+ ARM GAS /tmp/ccOAZfRE.s page 167
3529 .loc 1 1809 3 discriminator 1 view .LVU1151
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3569 0026 42E80031 strex r1, r3, [r2]
3570 @ 0 "" 2
3571 .LVL317:
- ARM GAS /tmp/ccsprDvq.s page 168
+ ARM GAS /tmp/ccOAZfRE.s page 168
3572 .loc 2 1124 4 is_stmt 1 view .LVU1166
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3610 .loc 1 1834 12 is_stmt 0 view .LVU1183
3611 0046 636F ldr r3, [r4, #116]
1834:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 169
+ ARM GAS /tmp/ccOAZfRE.s page 169
3612 .loc 1 1834 6 view .LVU1184
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3650 .syntax unified
3651 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
3652 0068 53E8003F ldrex r3, [r3]
- ARM GAS /tmp/ccsprDvq.s page 170
+ ARM GAS /tmp/ccOAZfRE.s page 170
3653 @ 0 "" 2
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1855:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
3695 .loc 1 1855 8 view .LVU1215
3696 007e 0028 cmp r0, #0
- ARM GAS /tmp/ccsprDvq.s page 171
+ ARM GAS /tmp/ccOAZfRE.s page 171
3697 0080 4BD0 beq .L151
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3735 .thumb
3736 .syntax unified
3737 .LBE602:
- ARM GAS /tmp/ccsprDvq.s page 172
+ ARM GAS /tmp/ccOAZfRE.s page 172
3738 .LBE601:
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3780 .loc 1 1805 12 view .LVU1245
3781 00b2 0125 movs r5, #1
3782 .LVL333:
- ARM GAS /tmp/ccsprDvq.s page 173
+ ARM GAS /tmp/ccOAZfRE.s page 173
3783 .L144:
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3822 .loc 1 1876 5 is_stmt 1 discriminator 1 view .LVU1260
3823 .LBB608:
3824 .LBI608:
- ARM GAS /tmp/ccsprDvq.s page 174
+ ARM GAS /tmp/ccOAZfRE.s page 174
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3864 00e4 1A65 str r2, [r3, #80]
1888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
3865 .loc 1 1888 9 is_stmt 1 view .LVU1278
- ARM GAS /tmp/ccsprDvq.s page 175
+ ARM GAS /tmp/ccOAZfRE.s page 175
3866 .LVL341:
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1921:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3902 .loc 1 1921 26 is_stmt 0 view .LVU1297
3903 0110 2366 str r3, [r4, #96]
- ARM GAS /tmp/ccsprDvq.s page 176
+ ARM GAS /tmp/ccOAZfRE.s page 176
1929:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3951 .LCFI18:
3952 .cfi_def_cfa_offset 8
3953 .cfi_offset 3, -8
- ARM GAS /tmp/ccsprDvq.s page 177
+ ARM GAS /tmp/ccOAZfRE.s page 177
3954 .cfi_offset 14, -4
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3695:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3990 .loc 1 3695 3 view .LVU1325
3991 0026 0168 ldr r1, [r0]
- ARM GAS /tmp/ccsprDvq.s page 178
+ ARM GAS /tmp/ccOAZfRE.s page 178
3992 0028 8A69 ldr r2, [r1, #24]
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4036 .LVL351:
3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
4037 .loc 1 3623 3 is_stmt 1 view .LVU1338
- ARM GAS /tmp/ccsprDvq.s page 179
+ ARM GAS /tmp/ccOAZfRE.s page 179
3623:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4073 .loc 1 3647 18 is_stmt 0 view .LVU1357
4074 002a C0F88020 str r2, [r0, #128]
3648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 180
+ ARM GAS /tmp/ccOAZfRE.s page 180
4075 .loc 1 3648 3 is_stmt 1 view .LVU1358
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4125 .cfi_def_cfa_offset 8
4126 .cfi_offset 4, -8
4127 .cfi_offset 14, -4
- ARM GAS /tmp/ccsprDvq.s page 181
+ ARM GAS /tmp/ccOAZfRE.s page 181
4128 0002 0446 mov r4, r0
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4168 .LVL358:
4169 .loc 2 1124 4 view .LVU1381
4170 .loc 2 1124 4 is_stmt 0 view .LVU1382
- ARM GAS /tmp/ccsprDvq.s page 182
+ ARM GAS /tmp/ccOAZfRE.s page 182
4171 .thumb
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
4211 .loc 2 1073 4 is_stmt 1 view .LVU1397
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 183
+ ARM GAS /tmp/ccOAZfRE.s page 183
4212 .loc 2 1073 4 is_stmt 0 view .LVU1398
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4253 .loc 1 1966 40 is_stmt 0 view .LVU1413
4254 003c 0F4A ldr r2, .L171
4255 003e 1A65 str r2, [r3, #80]
- ARM GAS /tmp/ccsprDvq.s page 184
+ ARM GAS /tmp/ccOAZfRE.s page 184
1969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4294 .LVL373:
4295 .L166:
1999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 185
+ ARM GAS /tmp/ccOAZfRE.s page 185
4296 .loc 1 1999 5 is_stmt 1 view .LVU1430
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4340 .loc 1 3722 1 is_stmt 0 view .LVU1442
4341 0000 08B5 push {r3, lr}
4342 .LCFI21:
- ARM GAS /tmp/ccsprDvq.s page 186
+ ARM GAS /tmp/ccOAZfRE.s page 186
4343 .cfi_def_cfa_offset 8
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4389 .global HAL_UART_AbortReceive_IT
4390 .syntax unified
4391 .thumb
- ARM GAS /tmp/ccsprDvq.s page 187
+ ARM GAS /tmp/ccOAZfRE.s page 187
4392 .thumb_func
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4435 .LVL384:
2038:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
4436 .loc 1 2038 3 is_stmt 1 discriminator 1 view .LVU1466
- ARM GAS /tmp/ccsprDvq.s page 188
+ ARM GAS /tmp/ccOAZfRE.s page 188
4437 .LBB623:
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4477 .loc 2 1072 4 is_stmt 0 view .LVU1482
4478 .syntax unified
4479 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- ARM GAS /tmp/ccsprDvq.s page 189
+ ARM GAS /tmp/ccOAZfRE.s page 189
4480 001c 53E8003F ldrex r3, [r3]
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2042:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
4522 .loc 1 2042 6 view .LVU1497
4523 0030 012B cmp r3, #1
- ARM GAS /tmp/ccsprDvq.s page 190
+ ARM GAS /tmp/ccOAZfRE.s page 190
4524 0032 1CD0 beq .L180
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4563 0048 23F04003 bic r3, r3, #64
4564 .LVL397:
2051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 191
+ ARM GAS /tmp/ccOAZfRE.s page 191
4565 .loc 1 2051 5 is_stmt 1 discriminator 1 view .LVU1513
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4605 .loc 1 2061 11 view .LVU1529
4606 0060 FFF7FEFF bl HAL_DMA_Abort_IT
4607 .LVL402:
- ARM GAS /tmp/ccsprDvq.s page 192
+ ARM GAS /tmp/ccOAZfRE.s page 192
2061:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4647 .LVL407:
2044:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
4648 .loc 1 2044 5 is_stmt 1 discriminator 1 view .LVU1545
- ARM GAS /tmp/ccsprDvq.s page 193
+ ARM GAS /tmp/ccOAZfRE.s page 193
4649 .LBB638:
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4691 .loc 1 2082 22 is_stmt 0 view .LVU1560
4692 009a 2022 movs r2, #32
- ARM GAS /tmp/ccsprDvq.s page 194
+ ARM GAS /tmp/ccOAZfRE.s page 194
4693 009c C4F88020 str r2, [r4, #128]
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2121:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
4731 .loc 1 2121 1 is_stmt 0 view .LVU1577
4732 00c4 0020 movs r0, #0
- ARM GAS /tmp/ccsprDvq.s page 195
+ ARM GAS /tmp/ccOAZfRE.s page 195
4733 00c6 10BD pop {r4, pc}
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4779 .loc 1 3762 3 view .LVU1587
3762:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
4780 .loc 1 3762 18 is_stmt 0 view .LVU1588
- ARM GAS /tmp/ccsprDvq.s page 196
+ ARM GAS /tmp/ccOAZfRE.s page 196
4781 001a 2023 movs r3, #32
@@ -11758,7 +11758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3868:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** static void UART_RxISR_8BIT(UART_HandleTypeDef *huart)
3869:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
4825 .loc 1 3869 1 is_stmt 1 view -0
- ARM GAS /tmp/ccsprDvq.s page 197
+ ARM GAS /tmp/ccOAZfRE.s page 197
4826 .cfi_startproc
@@ -11818,7 +11818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3904:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check current reception Mode :
3906:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** If Reception till IDLE event has been selected : */
- ARM GAS /tmp/ccsprDvq.s page 198
+ ARM GAS /tmp/ccOAZfRE.s page 198
3907:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
@@ -11878,7 +11878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
4859 .loc 1 3876 5 is_stmt 1 view .LVU1608
3876:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** *huart->pRxBuffPtr = (uint8_t)(uhdata & (uint8_t)uhMask);
- ARM GAS /tmp/ccsprDvq.s page 199
+ ARM GAS /tmp/ccOAZfRE.s page 199
4860 .loc 1 3876 25 is_stmt 0 view .LVU1609
@@ -11938,7 +11938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4899 .LBB640:
3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
4900 .loc 1 3884 7 discriminator 1 view .LVU1625
- ARM GAS /tmp/ccsprDvq.s page 200
+ ARM GAS /tmp/ccOAZfRE.s page 200
3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -11998,7 +11998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
4943 .loc 1 3884 7 discriminator 1 view .LVU1640
4944 0052 0029 cmp r1, #0
- ARM GAS /tmp/ccsprDvq.s page 201
+ ARM GAS /tmp/ccOAZfRE.s page 201
4945 0054 F6D1 bne .L194
@@ -12058,7 +12058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4984 .loc 2 1119 31 view .LVU1655
4985 .LBB649:
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccsprDvq.s page 202
+ ARM GAS /tmp/ccOAZfRE.s page 202
4986 .loc 2 1121 4 view .LVU1656
@@ -12118,7 +12118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5026 0082 08D0 beq .L196
5027 .L197:
3902:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 203
+ ARM GAS /tmp/ccOAZfRE.s page 203
5028 .loc 1 3902 9 is_stmt 1 discriminator 1 view .LVU1673
@@ -12178,7 +12178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5069 .thumb
5070 .syntax unified
5071 .LBE654:
- ARM GAS /tmp/ccsprDvq.s page 204
+ ARM GAS /tmp/ccOAZfRE.s page 204
5072 .LBE653:
@@ -12238,7 +12238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5110 .loc 2 1073 4 view .LVU1704
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
5111 .loc 2 1073 4 is_stmt 0 view .LVU1705
- ARM GAS /tmp/ccsprDvq.s page 205
+ ARM GAS /tmp/ccOAZfRE.s page 205
5112 .thumb
@@ -12298,7 +12298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5154 .L200:
3926:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
5155 .loc 1 3926 9 view .LVU1720
- ARM GAS /tmp/ccsprDvq.s page 206
+ ARM GAS /tmp/ccOAZfRE.s page 206
5156 00c0 B0F85810 ldrh r1, [r0, #88]
@@ -12358,7 +12358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3961:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
3962:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Rx process is ongoing */
3963:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** if (huart->RxState == HAL_UART_STATE_BUSY_RX)
- ARM GAS /tmp/ccsprDvq.s page 207
+ ARM GAS /tmp/ccOAZfRE.s page 207
5196 .loc 1 3963 3 view .LVU1730
@@ -12418,7 +12418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
4012:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call registered Rx Event callback*/
4013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxEventCallback(huart, huart->RxXferSize);
4014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #else
- ARM GAS /tmp/ccsprDvq.s page 208
+ ARM GAS /tmp/ccOAZfRE.s page 208
4015:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /*Call legacy weak Rx Event callback*/
@@ -12478,7 +12478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5227 .LVL461:
3967:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->pRxBuffPtr += 2U;
5228 .loc 1 3967 10 view .LVU1742
- ARM GAS /tmp/ccsprDvq.s page 209
+ ARM GAS /tmp/ccOAZfRE.s page 209
5229 0022 0B80 strh r3, [r1] @ movhi
@@ -12538,7 +12538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5267 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
5268 0044 52E8003F ldrex r3, [r2]
5269 @ 0 "" 2
- ARM GAS /tmp/ccsprDvq.s page 210
+ ARM GAS /tmp/ccOAZfRE.s page 210
5270 .LVL464:
@@ -12598,7 +12598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5310 .loc 1 3977 7 discriminator 1 view .LVU1774
5311 0054 0268 ldr r2, [r0]
5312 .LVL468:
- ARM GAS /tmp/ccsprDvq.s page 211
+ ARM GAS /tmp/ccOAZfRE.s page 211
5313 .LBB666:
@@ -12658,7 +12658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5355 .LBE669:
5356 .LBE668:
3977:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 212
+ ARM GAS /tmp/ccOAZfRE.s page 212
5357 .loc 1 3977 7 discriminator 1 view .LVU1789
@@ -12718,7 +12718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5394 .loc 2 1070 5 view .LVU1806
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
5395 .loc 2 1072 4 view .LVU1807
- ARM GAS /tmp/ccsprDvq.s page 213
+ ARM GAS /tmp/ccOAZfRE.s page 213
5396 .syntax unified
@@ -12778,7 +12778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5438 0094 036E ldr r3, [r0, #96]
3997:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
5439 .loc 1 3997 10 view .LVU1822
- ARM GAS /tmp/ccsprDvq.s page 214
+ ARM GAS /tmp/ccOAZfRE.s page 214
5440 0096 012B cmp r3, #1
@@ -12838,7 +12838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5479 .loc 2 1121 4 view .LVU1837
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
5480 .loc 2 1123 4 view .LVU1838
- ARM GAS /tmp/ccsprDvq.s page 215
+ ARM GAS /tmp/ccOAZfRE.s page 215
5481 .syntax unified
@@ -12898,7 +12898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5524 .LFE207:
5526 .section .text.UART_DMARxHalfCplt,"ax",%progbits
5527 .align 1
- ARM GAS /tmp/ccsprDvq.s page 216
+ ARM GAS /tmp/ccOAZfRE.s page 216
5528 .syntax unified
@@ -12958,7 +12958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
5570 .loc 1 3535 5 view .LVU1865
5571 0018 4908 lsrs r1, r1, #1
- ARM GAS /tmp/ccsprDvq.s page 217
+ ARM GAS /tmp/ccOAZfRE.s page 217
5572 001a FFF7FEFF bl HAL_UARTEx_RxEventCallback
@@ -13018,7 +13018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
5617 .loc 1 3467 5 discriminator 1 view .LVU1877
3467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
- ARM GAS /tmp/ccsprDvq.s page 218
+ ARM GAS /tmp/ccOAZfRE.s page 218
5618 .loc 1 3467 5 discriminator 1 view .LVU1878
@@ -13078,7 +13078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5660 .loc 1 3467 5 discriminator 1 view .LVU1892
5661 0022 0029 cmp r1, #0
5662 0024 F6D1 bne .L222
- ARM GAS /tmp/ccsprDvq.s page 219
+ ARM GAS /tmp/ccOAZfRE.s page 219
5663 .LVL500:
@@ -13138,7 +13138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5702 .LBB689:
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
5703 .loc 2 1121 4 view .LVU1908
- ARM GAS /tmp/ccsprDvq.s page 220
+ ARM GAS /tmp/ccOAZfRE.s page 220
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -13198,7 +13198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5745 0044 53E8003F ldrex r3, [r3]
5746 @ 0 "" 2
5747 .LVL510:
- ARM GAS /tmp/ccsprDvq.s page 221
+ ARM GAS /tmp/ccOAZfRE.s page 221
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -13258,7 +13258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
5789 .loc 1 3478 5 is_stmt 1 view .LVU1939
3478:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 222
+ ARM GAS /tmp/ccOAZfRE.s page 222
5790 .loc 1 3478 14 is_stmt 0 view .LVU1940
@@ -13318,7 +13318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5828 .loc 2 1072 4 view .LVU1956
5829 .syntax unified
5830 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- ARM GAS /tmp/ccsprDvq.s page 223
+ ARM GAS /tmp/ccOAZfRE.s page 223
5831 0074 52E8003F ldrex r3, [r2]
@@ -13378,7 +13378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5874 008e EFE7 b .L220
5875 .cfi_endproc
5876 .LFE195:
- ARM GAS /tmp/ccsprDvq.s page 224
+ ARM GAS /tmp/ccOAZfRE.s page 224
5878 .section .text.HAL_UARTEx_WakeupCallback,"ax",%progbits
@@ -13438,7 +13438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5927 .LVL526:
2131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3);
5928 .loc 1 2131 3 is_stmt 1 view .LVU1978
- ARM GAS /tmp/ccsprDvq.s page 225
+ ARM GAS /tmp/ccOAZfRE.s page 225
2131:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t cr3its = READ_REG(huart->Instance->CR3);
@@ -13498,7 +13498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
5966 .L232:
2155:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE | USART_CR1_RTOIE)) != 0U)))
5967 .loc 1 2155 7 is_stmt 0 view .LVU1996
- ARM GAS /tmp/ccsprDvq.s page 226
+ ARM GAS /tmp/ccOAZfRE.s page 226
5968 002c 10F00105 ands r5, r0, #1
@@ -13558,7 +13558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6008 006a 70BD pop {r4, r5, r6, pc}
6009 .LVL534:
6010 .L236:
- ARM GAS /tmp/ccsprDvq.s page 227
+ ARM GAS /tmp/ccOAZfRE.s page 227
2159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -13618,7 +13618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6048 .loc 1 2175 8 is_stmt 0 view .LVU2027
6049 00a0 13F0040F tst r3, #4
6050 00a4 09D0 beq .L239
- ARM GAS /tmp/ccsprDvq.s page 228
+ ARM GAS /tmp/ccOAZfRE.s page 228
2175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
@@ -13678,7 +13678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6089 .loc 1 2193 45 discriminator 1 view .LVU2043
6090 00de 11F0806F tst r1, #67108864
6091 00e2 09D0 beq .L242
- ARM GAS /tmp/ccsprDvq.s page 229
+ ARM GAS /tmp/ccOAZfRE.s page 229
2195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -13738,7 +13738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6130 .LVL538:
2219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
6131 .loc 1 2219 7 is_stmt 1 view .LVU2060
- ARM GAS /tmp/ccsprDvq.s page 230
+ ARM GAS /tmp/ccOAZfRE.s page 230
2219:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** ((errorcode & (HAL_UART_ERROR_RTO | HAL_UART_ERROR_ORE)) != 0U))
@@ -13798,7 +13798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6171 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
6172 013e 53E8003F ldrex r3, [r3]
6173 @ 0 "" 2
- ARM GAS /tmp/ccsprDvq.s page 231
+ ARM GAS /tmp/ccOAZfRE.s page 231
6174 .LVL542:
@@ -13858,7 +13858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6215 0152 53B1 cbz r3, .L249
2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6216 .loc 1 2238 13 is_stmt 1 view .LVU2091
- ARM GAS /tmp/ccsprDvq.s page 232
+ ARM GAS /tmp/ccOAZfRE.s page 232
2238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -13918,7 +13918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6258 0180 0023 movs r3, #0
6259 0182 C4F88430 str r3, [r4, #132]
2286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 233
+ ARM GAS /tmp/ccOAZfRE.s page 233
6260 .loc 1 2286 5 is_stmt 1 view .LVU2105
@@ -13978,7 +13978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6300 01ba 7FF656AF bls .L231
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6301 .loc 1 2310 9 is_stmt 1 view .LVU2120
- ARM GAS /tmp/ccsprDvq.s page 234
+ ARM GAS /tmp/ccOAZfRE.s page 234
2310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -14038,7 +14038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6341 .LBI709:
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
6342 .loc 2 1119 31 view .LVU2136
- ARM GAS /tmp/ccsprDvq.s page 235
+ ARM GAS /tmp/ccOAZfRE.s page 235
6343 .LBB710:
@@ -14098,7 +14098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6384 @ 0 "" 2
6385 .LVL566:
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** }
- ARM GAS /tmp/ccsprDvq.s page 236
+ ARM GAS /tmp/ccOAZfRE.s page 236
6386 .loc 2 1073 4 is_stmt 1 view .LVU2152
@@ -14158,7 +14158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6427 .loc 1 2321 11 discriminator 1 view .LVU2167
2321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6428 .loc 1 2321 11 discriminator 1 view .LVU2168
- ARM GAS /tmp/ccsprDvq.s page 237
+ ARM GAS /tmp/ccOAZfRE.s page 237
6429 01f4 2268 ldr r2, [r4]
@@ -14218,7 +14218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6471 .thumb
6472 .syntax unified
6473 .LBE720:
- ARM GAS /tmp/ccsprDvq.s page 238
+ ARM GAS /tmp/ccOAZfRE.s page 238
6474 .LBE719:
@@ -14278,7 +14278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6512 .thumb
6513 .syntax unified
6514 .LBE723:
- ARM GAS /tmp/ccsprDvq.s page 239
+ ARM GAS /tmp/ccOAZfRE.s page 239
6515 .LBE722:
@@ -14338,7 +14338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6555 .loc 1 2342 49 is_stmt 0 view .LVU2214
6556 0232 B4F85810 ldrh r1, [r4, #88]
2342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
- ARM GAS /tmp/ccsprDvq.s page 240
+ ARM GAS /tmp/ccOAZfRE.s page 240
6557 .loc 1 2342 69 view .LVU2215
@@ -14398,7 +14398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6598 .loc 1 2357 9 discriminator 1 view .LVU2228
2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6599 .loc 1 2357 9 discriminator 1 view .LVU2229
- ARM GAS /tmp/ccsprDvq.s page 241
+ ARM GAS /tmp/ccOAZfRE.s page 241
2357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -14458,7 +14458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6642 0276 0028 cmp r0, #0
6643 0278 F6D1 bne .L259
6644 .LVL594:
- ARM GAS /tmp/ccsprDvq.s page 242
+ ARM GAS /tmp/ccOAZfRE.s page 242
6645 .L260:
@@ -14518,7 +14518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
6684 .loc 2 1121 4 view .LVU2259
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccsprDvq.s page 243
+ ARM GAS /tmp/ccOAZfRE.s page 243
6685 .loc 2 1123 4 view .LVU2260
@@ -14578,7 +14578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6725 .LVL602:
6726 .LBB738:
6727 .LBI738:
- ARM GAS /tmp/ccsprDvq.s page 244
+ ARM GAS /tmp/ccOAZfRE.s page 244
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -14638,7 +14638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6769 .loc 1 2373 9 view .LVU2291
2373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6770 .loc 1 2373 28 is_stmt 0 view .LVU2292
- ARM GAS /tmp/ccsprDvq.s page 245
+ ARM GAS /tmp/ccOAZfRE.s page 245
6771 02b0 0223 movs r3, #2
@@ -14698,7 +14698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6811 02d4 9847 blx r3
6812 .LVL615:
2417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 246
+ ARM GAS /tmp/ccOAZfRE.s page 246
6813 .loc 1 2417 5 is_stmt 1 view .LVU2307
@@ -14758,7 +14758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6863 .syntax unified
6864 .thumb
6865 .thumb_func
- ARM GAS /tmp/ccsprDvq.s page 247
+ ARM GAS /tmp/ccOAZfRE.s page 247
6867 HAL_UART_EnableReceiverTimeout:
@@ -14818,7 +14818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6906 0028 80F87830 strb r3, [r0, #120]
2648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6907 .loc 1 2648 5 view .LVU2330
- ARM GAS /tmp/ccsprDvq.s page 248
+ ARM GAS /tmp/ccOAZfRE.s page 248
2650:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -14878,7 +14878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6952 .loc 1 2669 5 is_stmt 1 view .LVU2342
2669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6953 .loc 1 2669 5 view .LVU2343
- ARM GAS /tmp/ccsprDvq.s page 249
+ ARM GAS /tmp/ccOAZfRE.s page 249
6954 0006 90F87830 ldrb r3, [r0, #120] @ zero_extendqisi2
@@ -14938,7 +14938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
6993 .L280:
2669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
6994 .loc 1 2669 5 discriminator 1 view .LVU2359
- ARM GAS /tmp/ccsprDvq.s page 250
+ ARM GAS /tmp/ccOAZfRE.s page 250
6995 0034 0220 movs r0, #2
@@ -14998,7 +14998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7046 0006 1DD0 beq .L286
2747:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->gState = HAL_UART_STATE_BUSY;
7047 .loc 1 2747 3 discriminator 2 view .LVU2367
- ARM GAS /tmp/ccsprDvq.s page 251
+ ARM GAS /tmp/ccOAZfRE.s page 251
7048 0008 0123 movs r3, #1
@@ -15058,7 +15058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7087 .LBB746:
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
7088 .loc 2 1121 4 view .LVU2383
- ARM GAS /tmp/ccsprDvq.s page 252
+ ARM GAS /tmp/ccOAZfRE.s page 252
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -15118,7 +15118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7130 .syntax unified
7131 .LBE749:
7132 .LBE748:
- ARM GAS /tmp/ccsprDvq.s page 253
+ ARM GAS /tmp/ccOAZfRE.s page 253
2754:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -15178,7 +15178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7172 0040 1846 mov r0, r3
7173 .LVL644:
2760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
- ARM GAS /tmp/ccsprDvq.s page 254
+ ARM GAS /tmp/ccOAZfRE.s page 254
7174 .loc 1 2760 10 view .LVU2416
@@ -15238,7 +15238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7218 .loc 1 2774 3 discriminator 1 view .LVU2428
2774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7219 .loc 1 2774 3 discriminator 1 view .LVU2429
- ARM GAS /tmp/ccsprDvq.s page 255
+ ARM GAS /tmp/ccOAZfRE.s page 255
7220 0012 0268 ldr r2, [r0]
@@ -15298,7 +15298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7263 .LVL652:
7264 .L290:
2774:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 256
+ ARM GAS /tmp/ccOAZfRE.s page 256
7265 .loc 1 2774 3 discriminator 1 view .LVU2443
@@ -15358,7 +15358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7304 002e 42E80031 strex r1, r3, [r2]
7305 @ 0 "" 2
7306 .LVL656:
- ARM GAS /tmp/ccsprDvq.s page 257
+ ARM GAS /tmp/ccOAZfRE.s page 257
7307 .loc 2 1124 4 view .LVU2459
@@ -15418,7 +15418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7349 .thumb
7350 .thumb_func
7352 HAL_LIN_SendBreak:
- ARM GAS /tmp/ccsprDvq.s page 258
+ ARM GAS /tmp/ccOAZfRE.s page 258
7353 .LVL661:
@@ -15478,7 +15478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7391 .LVL662:
2808:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
7392 .loc 1 2808 10 view .LVU2490
- ARM GAS /tmp/ccsprDvq.s page 259
+ ARM GAS /tmp/ccOAZfRE.s page 259
7393 0028 7047 bx lr
@@ -15538,7 +15538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7438 .section .text.HAL_UART_GetError,"ax",%progbits
7439 .align 1
7440 .global HAL_UART_GetError
- ARM GAS /tmp/ccsprDvq.s page 260
+ ARM GAS /tmp/ccOAZfRE.s page 260
7441 .syntax unified
@@ -15598,7 +15598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7487 .loc 1 2907 3 view .LVU2513
7488 .LVL672:
2908:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 261
+ ARM GAS /tmp/ccOAZfRE.s page 261
7489 .loc 1 2908 3 view .LVU2514
@@ -15658,7 +15658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7524 001e 2268 ldr r2, [r4]
7525 0020 5368 ldr r3, [r2, #4]
7526 .LVL675:
- ARM GAS /tmp/ccsprDvq.s page 262
+ ARM GAS /tmp/ccOAZfRE.s page 262
2934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -15718,7 +15718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7568 .loc 1 2949 3 discriminator 23 view .LVU2547
7569 0058 854A ldr r2, .L384+20
- ARM GAS /tmp/ccsprDvq.s page 263
+ ARM GAS /tmp/ccOAZfRE.s page 263
7570 005a 9342 cmp r3, r2
@@ -15778,7 +15778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7614 009c 00F23881 bhi .L369
7615 00a0 DFE813F0 tbh [pc, r3, lsl #1]
7616 .L332:
- ARM GAS /tmp/ccsprDvq.s page 264
+ ARM GAS /tmp/ccOAZfRE.s page 264
7617 00a4 1401 .2byte (.L336-.L332)/2
@@ -15838,7 +15838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7661 00d7 0D .byte (.L306-.L308)/2
7662 00d8 09 .byte (.L309-.L308)/2
7663 00d9 0D .byte (.L306-.L308)/2
- ARM GAS /tmp/ccsprDvq.s page 265
+ ARM GAS /tmp/ccOAZfRE.s page 265
7664 00da 0D .byte (.L306-.L308)/2
@@ -15898,7 +15898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7708 0108 72D1 bne .L342
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7709 .loc 1 2949 3 is_stmt 0 discriminator 19 view .LVU2578
- ARM GAS /tmp/ccsprDvq.s page 266
+ ARM GAS /tmp/ccOAZfRE.s page 266
7710 010a 0423 movs r3, #4
@@ -15958,7 +15958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7756 .L316:
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7757 .loc 1 2949 3 discriminator 29 view .LVU2587
- ARM GAS /tmp/ccsprDvq.s page 267
+ ARM GAS /tmp/ccOAZfRE.s page 267
7758 015a B3F5407F cmp r3, #768
@@ -16018,7 +16018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7804 .loc 1 2949 3 discriminator 49 view .LVU2596
7805 01b4 0823 movs r3, #8
- ARM GAS /tmp/ccsprDvq.s page 268
+ ARM GAS /tmp/ccOAZfRE.s page 268
7806 01b6 6BE7 b .L302
@@ -16078,7 +16078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7851 .L344:
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
7852 .loc 1 2949 3 discriminator 27 view .LVU2606
- ARM GAS /tmp/ccsprDvq.s page 269
+ ARM GAS /tmp/ccOAZfRE.s page 269
7853 01f8 0223 movs r3, #2
@@ -16138,7 +16138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7898 0228 0223 movs r3, #2
7899 022a 31E7 b .L302
7900 .L357:
- ARM GAS /tmp/ccsprDvq.s page 270
+ ARM GAS /tmp/ccOAZfRE.s page 270
2949:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -16198,7 +16198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
7949 0268 00480040 .word 1073760256
7950 026c 004C0040 .word 1073761280
7951 0270 00500040 .word 1073762304
- ARM GAS /tmp/ccsprDvq.s page 271
+ ARM GAS /tmp/ccOAZfRE.s page 271
7952 0274 00140140 .word 1073812480
@@ -16258,7 +16258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2983:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->Instance->BRR = brrtemp;
7991 .loc 1 2983 20 is_stmt 0 view .LVU2637
7992 02aa C3F34203 ubfx r3, r3, #1, #3
- ARM GAS /tmp/ccsprDvq.s page 272
+ ARM GAS /tmp/ccOAZfRE.s page 272
7993 .LVL693:
@@ -16318,7 +16318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8033 .LVL700:
2998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** case UART_CLOCKSOURCE_PCLK2:
8034 .loc 1 2998 9 is_stmt 1 view .LVU2652
- ARM GAS /tmp/ccsprDvq.s page 273
+ ARM GAS /tmp/ccOAZfRE.s page 273
8035 .L337:
@@ -16378,7 +16378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8074 .loc 1 3006 9 view .LVU2667
3006:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** break;
8075 .loc 1 3006 16 is_stmt 0 view .LVU2668
- ARM GAS /tmp/ccsprDvq.s page 274
+ ARM GAS /tmp/ccOAZfRE.s page 274
8076 02f8 FFF7FEFF bl HAL_RCC_GetSysClockFreq
@@ -16438,7 +16438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8119 .loc 1 3034 3 is_stmt 1 view .LVU2679
3034:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->TxISR = NULL;
8120 .loc 1 3034 16 is_stmt 0 view .LVU2680
- ARM GAS /tmp/ccsprDvq.s page 275
+ ARM GAS /tmp/ccOAZfRE.s page 275
8121 031a 0023 movs r3, #0
@@ -16498,7 +16498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8165 0010 416B ldr r1, [r0, #52]
8166 0012 0B43 orrs r3, r3, r1
8167 0014 5360 str r3, [r2, #4]
- ARM GAS /tmp/ccsprDvq.s page 276
+ ARM GAS /tmp/ccOAZfRE.s page 276
8168 .L389:
@@ -16558,7 +16558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8207 004a 0268 ldr r2, [r0]
8208 004c 5368 ldr r3, [r2, #4]
8209 004e 23F48023 bic r3, r3, #262144
- ARM GAS /tmp/ccsprDvq.s page 277
+ ARM GAS /tmp/ccOAZfRE.s page 277
8210 0052 016B ldr r1, [r0, #48]
@@ -16618,7 +16618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8250 .loc 1 3095 5 is_stmt 1 view .LVU2721
3096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
8251 .loc 1 3096 5 view .LVU2722
- ARM GAS /tmp/ccsprDvq.s page 278
+ ARM GAS /tmp/ccOAZfRE.s page 278
3097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* set auto Baudrate detection parameters if detection is enabled */
@@ -16678,7 +16678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8294 .LFE186:
8296 .section .text.UART_WaitOnFlagUntilTimeout,"ax",%progbits
8297 .align 1
- ARM GAS /tmp/ccsprDvq.s page 279
+ ARM GAS /tmp/ccOAZfRE.s page 279
8298 .global UART_WaitOnFlagUntilTimeout
@@ -16738,7 +16738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8344 0022 B8F1FF3F cmp r8, #-1
8345 0026 F3D0 beq .L400
3199:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 280
+ ARM GAS /tmp/ccOAZfRE.s page 280
8346 .loc 1 3199 7 is_stmt 1 view .LVU2744
@@ -16798,7 +16798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8385 0062 D5D0 beq .L400
3227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
8386 .loc 1 3227 11 is_stmt 1 view .LVU2760
- ARM GAS /tmp/ccsprDvq.s page 281
+ ARM GAS /tmp/ccOAZfRE.s page 281
8387 0064 4FF40062 mov r2, #2048
@@ -16858,7 +16858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8424 0094 0120 movs r0, #1
8425 0096 00E0 b .L401
8426 .L407:
- ARM GAS /tmp/ccsprDvq.s page 282
+ ARM GAS /tmp/ccOAZfRE.s page 282
3244:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -16918,7 +16918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8474 .loc 1 1096 3 view .LVU2786
1096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
8475 .loc 1 1096 12 is_stmt 0 view .LVU2787
- ARM GAS /tmp/ccsprDvq.s page 283
+ ARM GAS /tmp/ccOAZfRE.s page 283
8476 0008 C36F ldr r3, [r0, #124]
@@ -16978,7 +16978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8515 .loc 1 1110 5 is_stmt 1 view .LVU2802
1110:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
8516 .loc 1 1110 24 is_stmt 0 view .LVU2803
- ARM GAS /tmp/ccsprDvq.s page 284
+ ARM GAS /tmp/ccOAZfRE.s page 284
8517 0034 A4F85280 strh r8, [r4, #82] @ movhi
@@ -17038,7 +17038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8555 005e C3F30803 ubfx r3, r3, #0, #9
1135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata16bits++;
8556 .loc 1 1135 30 view .LVU2820
- ARM GAS /tmp/ccsprDvq.s page 285
+ ARM GAS /tmp/ccOAZfRE.s page 285
8557 0062 9362 str r3, [r2, #40]
@@ -17098,7 +17098,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits++;
8597 .loc 1 1140 14 view .LVU2835
8598 0094 2368 ldr r3, [r4]
- ARM GAS /tmp/ccsprDvq.s page 286
+ ARM GAS /tmp/ccOAZfRE.s page 286
1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** pdata8bits++;
@@ -17158,7 +17158,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8638 00b8 E367 str r3, [r4, #124]
1150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
8639 .loc 1 1150 7 is_stmt 1 view .LVU2851
- ARM GAS /tmp/ccsprDvq.s page 287
+ ARM GAS /tmp/ccOAZfRE.s page 287
1150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -17218,7 +17218,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1178:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint16_t uhMask;
8689 .loc 1 1178 3 view .LVU2859
1179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** uint32_t tickstart;
- ARM GAS /tmp/ccsprDvq.s page 288
+ ARM GAS /tmp/ccOAZfRE.s page 288
8690 .loc 1 1179 3 view .LVU2860
@@ -17278,7 +17278,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8728 .loc 1 1195 5 is_stmt 1 view .LVU2876
1195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
8729 .loc 1 1195 17 is_stmt 0 view .LVU2877
- ARM GAS /tmp/ccsprDvq.s page 289
+ ARM GAS /tmp/ccOAZfRE.s page 289
8730 0030 FFF7FEFF bl HAL_GetTick
@@ -17338,7 +17338,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8770 006a 7F22 movs r2, #127
8771 006c A4F85C20 strh r2, [r4, #92] @ movhi
8772 0070 05E0 b .L433
- ARM GAS /tmp/ccsprDvq.s page 290
+ ARM GAS /tmp/ccOAZfRE.s page 290
8773 .L434:
@@ -17398,7 +17398,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8813 .loc 1 1213 19 view .LVU2905
8814 00a6 4FF00009 mov r9, #0
8815 00aa 15E0 b .L439
- ARM GAS /tmp/ccsprDvq.s page 291
+ ARM GAS /tmp/ccOAZfRE.s page 291
8816 .L447:
@@ -17458,7 +17458,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8853 .loc 1 1235 25 view .LVU2922
8854 00d0 013A subs r2, r2, #1
8855 00d2 92B2 uxth r2, r2
- ARM GAS /tmp/ccsprDvq.s page 292
+ ARM GAS /tmp/ccOAZfRE.s page 292
8856 00d4 A4F85A20 strh r2, [r4, #90] @ movhi
@@ -17518,7 +17518,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
8895 .loc 1 1239 5 is_stmt 1 view .LVU2938
1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 293
+ ARM GAS /tmp/ccOAZfRE.s page 293
8896 .loc 1 1239 20 is_stmt 0 view .LVU2939
@@ -17578,7 +17578,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
8944 .loc 1 3121 3 is_stmt 1 view .LVU2947
3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
8945 .loc 1 3124 3 view .LVU2948
- ARM GAS /tmp/ccsprDvq.s page 294
+ ARM GAS /tmp/ccOAZfRE.s page 294
3124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -17638,7 +17638,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** huart->RxEventType = HAL_UART_RXEVENT_TC;
8983 .loc 1 3172 24 is_stmt 0 view .LVU2966
8984 002e 0020 movs r0, #0
- ARM GAS /tmp/ccsprDvq.s page 295
+ ARM GAS /tmp/ccOAZfRE.s page 295
8985 0030 2066 str r0, [r4, #96]
@@ -17698,7 +17698,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9025 .loc 1 3136 7 discriminator 1 view .LVU2980
3136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9026 .loc 1 3136 7 discriminator 1 view .LVU2981
- ARM GAS /tmp/ccsprDvq.s page 296
+ ARM GAS /tmp/ccOAZfRE.s page 296
9027 0054 2268 ldr r2, [r4]
@@ -17758,7 +17758,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9070 .LBE762:
3136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9071 .loc 1 3136 7 is_stmt 1 discriminator 2 view .LVU2995
- ARM GAS /tmp/ccsprDvq.s page 297
+ ARM GAS /tmp/ccOAZfRE.s page 297
3138:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
@@ -17818,7 +17818,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9111 .LBI768:
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** {
9112 .loc 2 1068 31 view .LVU3011
- ARM GAS /tmp/ccsprDvq.s page 298
+ ARM GAS /tmp/ccOAZfRE.s page 298
9113 .LBB769:
@@ -17878,7 +17878,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9155 .loc 1 3156 7 is_stmt 1 discriminator 2 view .LVU3025
3157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9156 .loc 1 3157 7 discriminator 1 view .LVU3026
- ARM GAS /tmp/ccsprDvq.s page 299
+ ARM GAS /tmp/ccOAZfRE.s page 299
9157 .LBB772:
@@ -17938,7 +17938,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9196 .syntax unified
9197 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
9198 00ae 42E80031 strex r1, r3, [r2]
- ARM GAS /tmp/ccsprDvq.s page 300
+ ARM GAS /tmp/ccOAZfRE.s page 300
9199 @ 0 "" 2
@@ -17998,7 +17998,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
9244 .loc 1 292 3 view .LVU3055
292:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 301
+ ARM GAS /tmp/ccOAZfRE.s page 301
9245 .loc 1 292 6 is_stmt 0 view .LVU3056
@@ -18058,7 +18058,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
9284 .loc 1 341 6 discriminator 1 view .LVU3072
9285 0022 0128 cmp r0, #1
- ARM GAS /tmp/ccsprDvq.s page 302
+ ARM GAS /tmp/ccOAZfRE.s page 302
9286 0024 11D0 beq .L466
@@ -18118,7 +18118,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9329 .cfi_def_cfa_offset 0
9330 .cfi_restore 4
9331 .cfi_restore 14
- ARM GAS /tmp/ccsprDvq.s page 303
+ ARM GAS /tmp/ccOAZfRE.s page 303
294:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -18178,7 +18178,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9376 000e E367 str r3, [r4, #124]
398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9377 .loc 1 398 3 is_stmt 1 view .LVU3096
- ARM GAS /tmp/ccsprDvq.s page 304
+ ARM GAS /tmp/ccOAZfRE.s page 304
9378 0010 2268 ldr r2, [r4]
@@ -18238,7 +18238,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9420 .LVL801:
9421 .L477:
426:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 305
+ ARM GAS /tmp/ccOAZfRE.s page 305
9422 .loc 1 426 1 view .LVU3109
@@ -18298,7 +18298,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
442:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
9469 .loc 1 442 6 is_stmt 0 view .LVU3119
9470 0000 0028 cmp r0, #0
- ARM GAS /tmp/ccsprDvq.s page 306
+ ARM GAS /tmp/ccOAZfRE.s page 306
9471 0002 40D0 beq .L491
@@ -18358,7 +18358,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9510 0024 23F00103 bic r3, r3, #1
9511 0028 1360 str r3, [r2]
490:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 307
+ ARM GAS /tmp/ccOAZfRE.s page 307
9512 .loc 1 490 3 view .LVU3135
@@ -18418,7 +18418,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9554 006c 2046 mov r0, r4
9555 006e FFF7FEFF bl UART_CheckIdleState
9556 .LVL810:
- ARM GAS /tmp/ccsprDvq.s page 308
+ ARM GAS /tmp/ccOAZfRE.s page 308
9557 .L488:
@@ -18478,7 +18478,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9601 008c F1E7 b .L488
9602 .LVL818:
9603 .L493:
- ARM GAS /tmp/ccsprDvq.s page 309
+ ARM GAS /tmp/ccOAZfRE.s page 309
460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
@@ -18538,7 +18538,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9649 .loc 1 570 3 is_stmt 1 view .LVU3168
570:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9650 .loc 1 570 17 is_stmt 0 view .LVU3169
- ARM GAS /tmp/ccsprDvq.s page 310
+ ARM GAS /tmp/ccOAZfRE.s page 310
9651 0010 2423 movs r3, #36
@@ -18598,7 +18598,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9693 .loc 1 602 3 view .LVU3182
9694 0052 2268 ldr r2, [r4]
- ARM GAS /tmp/ccsprDvq.s page 311
+ ARM GAS /tmp/ccOAZfRE.s page 311
9695 0054 1368 ldr r3, [r2]
@@ -18658,7 +18658,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9739 0086 0120 movs r0, #1
9740 .LVL828:
606:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 312
+ ARM GAS /tmp/ccOAZfRE.s page 312
9741 .loc 1 606 1 view .LVU3193
@@ -18718,7 +18718,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9785 0014 0268 ldr r2, [r0]
9786 .LVL830:
9787 .LBB778:
- ARM GAS /tmp/ccsprDvq.s page 313
+ ARM GAS /tmp/ccOAZfRE.s page 313
9788 .LBI778:
@@ -18778,7 +18778,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
2704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9830 .loc 1 2704 3 view .LVU3220
2704:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 314
+ ARM GAS /tmp/ccOAZfRE.s page 314
9831 .loc 1 2704 17 is_stmt 0 view .LVU3221
@@ -18838,7 +18838,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9877 0008 12D0 beq .L521
2717:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
9878 .loc 1 2717 3 discriminator 2 view .LVU3232
- ARM GAS /tmp/ccsprDvq.s page 315
+ ARM GAS /tmp/ccOAZfRE.s page 315
9879 000a 0123 movs r3, #1
@@ -18898,7 +18898,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9918 .LBB786:
1121:Drivers/CMSIS/Include/cmsis_gcc.h ****
9919 .loc 2 1121 4 view .LVU3248
- ARM GAS /tmp/ccsprDvq.s page 316
+ ARM GAS /tmp/ccOAZfRE.s page 316
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -18958,7 +18958,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
9964 .thumb
9965 .thumb_func
9967 UART_Start_Receive_IT:
- ARM GAS /tmp/ccsprDvq.s page 317
+ ARM GAS /tmp/ccOAZfRE.s page 317
9968 .LVL847:
@@ -19018,7 +19018,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10006 .loc 1 3266 3 discriminator 3 view .LVU3277
10007 0028 40F2FF13 movw r3, #511
10008 002c A0F85C30 strh r3, [r0, #92] @ movhi
- ARM GAS /tmp/ccsprDvq.s page 318
+ ARM GAS /tmp/ccOAZfRE.s page 318
10009 0030 0DE0 b .L526
@@ -19078,7 +19078,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10049 .LBB789:
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
10050 .loc 2 1070 5 view .LVU3292
- ARM GAS /tmp/ccsprDvq.s page 319
+ ARM GAS /tmp/ccOAZfRE.s page 319
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -19138,7 +19138,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3272:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
10094 .loc 1 3272 3 is_stmt 1 discriminator 2 view .LVU3306
3275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 320
+ ARM GAS /tmp/ccOAZfRE.s page 320
10095 .loc 1 3275 3 view .LVU3307
@@ -19198,7 +19198,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10133 .loc 2 1073 4 is_stmt 0 view .LVU3323
10134 .thumb
10135 .syntax unified
- ARM GAS /tmp/ccsprDvq.s page 321
+ ARM GAS /tmp/ccOAZfRE.s page 321
10136 .LBE794:
@@ -19258,7 +19258,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3266:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
10178 .loc 1 3266 3 discriminator 11 view .LVU3338
10179 009c 7F23 movs r3, #127
- ARM GAS /tmp/ccsprDvq.s page 322
+ ARM GAS /tmp/ccOAZfRE.s page 322
10180 009e A0F85C30 strh r3, [r0, #92] @ movhi
@@ -19318,7 +19318,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10220 .thumb
10221 .syntax unified
10222 .LBE799:
- ARM GAS /tmp/ccsprDvq.s page 323
+ ARM GAS /tmp/ccOAZfRE.s page 323
10223 .LBE798:
@@ -19378,7 +19378,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
1309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** /* Check that a Rx process is not already ongoing */
10272 .loc 1 1309 1 is_stmt 0 view .LVU3362
10273 0000 38B5 push {r3, r4, r5, lr}
- ARM GAS /tmp/ccsprDvq.s page 324
+ ARM GAS /tmp/ccOAZfRE.s page 324
10274 .LCFI52:
@@ -19438,7 +19438,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10313 .loc 2 1068 31 view .LVU3377
10314 .LBB804:
1070:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccsprDvq.s page 325
+ ARM GAS /tmp/ccOAZfRE.s page 325
10315 .loc 2 1070 5 view .LVU3378
@@ -19498,7 +19498,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10357 .loc 1 1328 5 view .LVU3392
1328:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** }
10358 .loc 1 1328 13 is_stmt 0 view .LVU3393
- ARM GAS /tmp/ccsprDvq.s page 326
+ ARM GAS /tmp/ccOAZfRE.s page 326
10359 0032 FFF7FEFF bl UART_Start_Receive_IT
@@ -19558,7 +19558,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
3310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
10406 .loc 1 3310 3 is_stmt 1 view .LVU3403
3310:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 327
+ ARM GAS /tmp/ccOAZfRE.s page 327
10407 .loc 1 3310 21 is_stmt 0 view .LVU3404
@@ -19618,7 +19618,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10443 .loc 1 3327 5 is_stmt 1 view .LVU3422
3327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
10444 .loc 1 3327 10 is_stmt 0 view .LVU3423
- ARM GAS /tmp/ccsprDvq.s page 328
+ ARM GAS /tmp/ccOAZfRE.s page 328
10445 002c 426F ldr r2, [r0, #116]
@@ -19678,7 +19678,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10483 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
10484 0046 52E8003F ldrex r3, [r2]
10485 @ 0 "" 2
- ARM GAS /tmp/ccsprDvq.s page 329
+ ARM GAS /tmp/ccOAZfRE.s page 329
10486 .LVL886:
@@ -19738,7 +19738,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10526 .loc 1 3349 3 discriminator 1 view .LVU3455
10527 0056 2268 ldr r2, [r4]
10528 .LVL890:
- ARM GAS /tmp/ccsprDvq.s page 330
+ ARM GAS /tmp/ccOAZfRE.s page 330
10529 .LBB813:
@@ -19798,7 +19798,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10571 .LBE816:
10572 .LBE815:
3349:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c ****
- ARM GAS /tmp/ccsprDvq.s page 331
+ ARM GAS /tmp/ccOAZfRE.s page 331
10573 .loc 1 3349 3 discriminator 1 view .LVU3470
@@ -19858,7 +19858,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10613 .LBI820:
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
10614 .loc 2 1119 31 view .LVU3485
- ARM GAS /tmp/ccsprDvq.s page 332
+ ARM GAS /tmp/ccOAZfRE.s page 332
10615 .LBB821:
@@ -19918,7 +19918,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10657 009a 00BF .align 2
10658 .L558:
10659 009c 00000000 .word UART_DMAReceiveCplt
- ARM GAS /tmp/ccsprDvq.s page 333
+ ARM GAS /tmp/ccOAZfRE.s page 333
10660 00a0 00000000 .word UART_DMARxHalfCplt
@@ -19978,7 +19978,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10705 0016 0368 ldr r3, [r0]
10706 0018 5B68 ldr r3, [r3, #4]
1430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart.c **** {
- ARM GAS /tmp/ccsprDvq.s page 334
+ ARM GAS /tmp/ccOAZfRE.s page 334
10707 .loc 1 1430 8 view .LVU3511
@@ -20038,7 +20038,7 @@ ARM GAS /tmp/ccsprDvq.s page 1
10747 002a 44E80035 strex r5, r3, [r4]
10748 @ 0 "" 2
10749 .LVL909:
- ARM GAS /tmp/ccsprDvq.s page 335
+ ARM GAS /tmp/ccOAZfRE.s page 335
10750 .loc 2 1124 4 view .LVU3526
@@ -20098,175 +20098,175 @@ ARM GAS /tmp/ccsprDvq.s page 1
10795 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
10796 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h"
10797 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccsprDvq.s page 336
+ ARM GAS /tmp/ccOAZfRE.s page 336
- ARM GAS /tmp/ccsprDvq.s page 337
+ ARM GAS /tmp/ccOAZfRE.s page 337
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_uart.c
- /tmp/ccsprDvq.s:20 .text.UART_EndTxTransfer:00000000 $t
- /tmp/ccsprDvq.s:25 .text.UART_EndTxTransfer:00000000 UART_EndTxTransfer
- /tmp/ccsprDvq.s:97 .text.UART_EndRxTransfer:00000000 $t
- /tmp/ccsprDvq.s:102 .text.UART_EndRxTransfer:00000000 UART_EndRxTransfer
- /tmp/ccsprDvq.s:297 .text.UART_TxISR_8BIT:00000000 $t
- /tmp/ccsprDvq.s:302 .text.UART_TxISR_8BIT:00000000 UART_TxISR_8BIT
- /tmp/ccsprDvq.s:462 .text.UART_TxISR_16BIT:00000000 $t
- /tmp/ccsprDvq.s:467 .text.UART_TxISR_16BIT:00000000 UART_TxISR_16BIT
- /tmp/ccsprDvq.s:634 .text.HAL_UART_MspInit:00000000 $t
- /tmp/ccsprDvq.s:640 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
- /tmp/ccsprDvq.s:655 .text.HAL_UART_MspDeInit:00000000 $t
- /tmp/ccsprDvq.s:661 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
- /tmp/ccsprDvq.s:676 .text.HAL_UART_DeInit:00000000 $t
- /tmp/ccsprDvq.s:682 .text.HAL_UART_DeInit:00000000 HAL_UART_DeInit
- /tmp/ccsprDvq.s:771 .text.HAL_UART_Transmit_IT:00000000 $t
- /tmp/ccsprDvq.s:777 .text.HAL_UART_Transmit_IT:00000000 HAL_UART_Transmit_IT
- /tmp/ccsprDvq.s:915 .text.HAL_UART_Transmit_IT:0000005c $d
- /tmp/ccsprDvq.s:921 .text.HAL_UART_Transmit_DMA:00000000 $t
- /tmp/ccsprDvq.s:927 .text.HAL_UART_Transmit_DMA:00000000 HAL_UART_Transmit_DMA
- /tmp/ccsprDvq.s:1120 .text.HAL_UART_Transmit_DMA:00000088 $d
- /tmp/ccsprDvq.s:2935 .text.UART_DMATransmitCplt:00000000 UART_DMATransmitCplt
- /tmp/ccsprDvq.s:3205 .text.UART_DMATxHalfCplt:00000000 UART_DMATxHalfCplt
- /tmp/ccsprDvq.s:3300 .text.UART_DMAError:00000000 UART_DMAError
- /tmp/ccsprDvq.s:1127 .text.HAL_UART_DMAPause:00000000 $t
- /tmp/ccsprDvq.s:1133 .text.HAL_UART_DMAPause:00000000 HAL_UART_DMAPause
- /tmp/ccsprDvq.s:1427 .text.HAL_UART_DMAResume:00000000 $t
- /tmp/ccsprDvq.s:1433 .text.HAL_UART_DMAResume:00000000 HAL_UART_DMAResume
- /tmp/ccsprDvq.s:1706 .text.HAL_UART_DMAStop:00000000 $t
- /tmp/ccsprDvq.s:1712 .text.HAL_UART_DMAStop:00000000 HAL_UART_DMAStop
- /tmp/ccsprDvq.s:1960 .text.HAL_UART_Abort:00000000 $t
- /tmp/ccsprDvq.s:1966 .text.HAL_UART_Abort:00000000 HAL_UART_Abort
- /tmp/ccsprDvq.s:2394 .text.HAL_UART_AbortTransmit:00000000 $t
- /tmp/ccsprDvq.s:2400 .text.HAL_UART_AbortTransmit:00000000 HAL_UART_AbortTransmit
- /tmp/ccsprDvq.s:2586 .text.HAL_UART_AbortReceive:00000000 $t
- /tmp/ccsprDvq.s:2592 .text.HAL_UART_AbortReceive:00000000 HAL_UART_AbortReceive
- /tmp/ccsprDvq.s:2909 .text.HAL_UART_TxCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:2915 .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback
- /tmp/ccsprDvq.s:2930 .text.UART_DMATransmitCplt:00000000 $t
- /tmp/ccsprDvq.s:3091 .text.UART_EndTransmit_IT:00000000 $t
- /tmp/ccsprDvq.s:3096 .text.UART_EndTransmit_IT:00000000 UART_EndTransmit_IT
- /tmp/ccsprDvq.s:3179 .text.HAL_UART_TxHalfCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:3185 .text.HAL_UART_TxHalfCpltCallback:00000000 HAL_UART_TxHalfCpltCallback
- /tmp/ccsprDvq.s:3200 .text.UART_DMATxHalfCplt:00000000 $t
- /tmp/ccsprDvq.s:3232 .text.HAL_UART_RxCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:3238 .text.HAL_UART_RxCpltCallback:00000000 HAL_UART_RxCpltCallback
- /tmp/ccsprDvq.s:3253 .text.HAL_UART_RxHalfCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:3259 .text.HAL_UART_RxHalfCpltCallback:00000000 HAL_UART_RxHalfCpltCallback
- /tmp/ccsprDvq.s:3274 .text.HAL_UART_ErrorCallback:00000000 $t
- /tmp/ccsprDvq.s:3280 .text.HAL_UART_ErrorCallback:00000000 HAL_UART_ErrorCallback
- /tmp/ccsprDvq.s:3295 .text.UART_DMAError:00000000 $t
- /tmp/ccsprDvq.s:3390 .text.UART_DMAAbortOnError:00000000 $t
- /tmp/ccsprDvq.s:3395 .text.UART_DMAAbortOnError:00000000 UART_DMAAbortOnError
- /tmp/ccsprDvq.s:3428 .text.HAL_UART_AbortCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:3434 .text.HAL_UART_AbortCpltCallback:00000000 HAL_UART_AbortCpltCallback
- /tmp/ccsprDvq.s:3449 .text.HAL_UART_Abort_IT:00000000 $t
- ARM GAS /tmp/ccsprDvq.s page 338
+ /tmp/ccOAZfRE.s:20 .text.UART_EndTxTransfer:00000000 $t
+ /tmp/ccOAZfRE.s:25 .text.UART_EndTxTransfer:00000000 UART_EndTxTransfer
+ /tmp/ccOAZfRE.s:97 .text.UART_EndRxTransfer:00000000 $t
+ /tmp/ccOAZfRE.s:102 .text.UART_EndRxTransfer:00000000 UART_EndRxTransfer
+ /tmp/ccOAZfRE.s:297 .text.UART_TxISR_8BIT:00000000 $t
+ /tmp/ccOAZfRE.s:302 .text.UART_TxISR_8BIT:00000000 UART_TxISR_8BIT
+ /tmp/ccOAZfRE.s:462 .text.UART_TxISR_16BIT:00000000 $t
+ /tmp/ccOAZfRE.s:467 .text.UART_TxISR_16BIT:00000000 UART_TxISR_16BIT
+ /tmp/ccOAZfRE.s:634 .text.HAL_UART_MspInit:00000000 $t
+ /tmp/ccOAZfRE.s:640 .text.HAL_UART_MspInit:00000000 HAL_UART_MspInit
+ /tmp/ccOAZfRE.s:655 .text.HAL_UART_MspDeInit:00000000 $t
+ /tmp/ccOAZfRE.s:661 .text.HAL_UART_MspDeInit:00000000 HAL_UART_MspDeInit
+ /tmp/ccOAZfRE.s:676 .text.HAL_UART_DeInit:00000000 $t
+ /tmp/ccOAZfRE.s:682 .text.HAL_UART_DeInit:00000000 HAL_UART_DeInit
+ /tmp/ccOAZfRE.s:771 .text.HAL_UART_Transmit_IT:00000000 $t
+ /tmp/ccOAZfRE.s:777 .text.HAL_UART_Transmit_IT:00000000 HAL_UART_Transmit_IT
+ /tmp/ccOAZfRE.s:915 .text.HAL_UART_Transmit_IT:0000005c $d
+ /tmp/ccOAZfRE.s:921 .text.HAL_UART_Transmit_DMA:00000000 $t
+ /tmp/ccOAZfRE.s:927 .text.HAL_UART_Transmit_DMA:00000000 HAL_UART_Transmit_DMA
+ /tmp/ccOAZfRE.s:1120 .text.HAL_UART_Transmit_DMA:00000088 $d
+ /tmp/ccOAZfRE.s:2935 .text.UART_DMATransmitCplt:00000000 UART_DMATransmitCplt
+ /tmp/ccOAZfRE.s:3205 .text.UART_DMATxHalfCplt:00000000 UART_DMATxHalfCplt
+ /tmp/ccOAZfRE.s:3300 .text.UART_DMAError:00000000 UART_DMAError
+ /tmp/ccOAZfRE.s:1127 .text.HAL_UART_DMAPause:00000000 $t
+ /tmp/ccOAZfRE.s:1133 .text.HAL_UART_DMAPause:00000000 HAL_UART_DMAPause
+ /tmp/ccOAZfRE.s:1427 .text.HAL_UART_DMAResume:00000000 $t
+ /tmp/ccOAZfRE.s:1433 .text.HAL_UART_DMAResume:00000000 HAL_UART_DMAResume
+ /tmp/ccOAZfRE.s:1706 .text.HAL_UART_DMAStop:00000000 $t
+ /tmp/ccOAZfRE.s:1712 .text.HAL_UART_DMAStop:00000000 HAL_UART_DMAStop
+ /tmp/ccOAZfRE.s:1960 .text.HAL_UART_Abort:00000000 $t
+ /tmp/ccOAZfRE.s:1966 .text.HAL_UART_Abort:00000000 HAL_UART_Abort
+ /tmp/ccOAZfRE.s:2394 .text.HAL_UART_AbortTransmit:00000000 $t
+ /tmp/ccOAZfRE.s:2400 .text.HAL_UART_AbortTransmit:00000000 HAL_UART_AbortTransmit
+ /tmp/ccOAZfRE.s:2586 .text.HAL_UART_AbortReceive:00000000 $t
+ /tmp/ccOAZfRE.s:2592 .text.HAL_UART_AbortReceive:00000000 HAL_UART_AbortReceive
+ /tmp/ccOAZfRE.s:2909 .text.HAL_UART_TxCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:2915 .text.HAL_UART_TxCpltCallback:00000000 HAL_UART_TxCpltCallback
+ /tmp/ccOAZfRE.s:2930 .text.UART_DMATransmitCplt:00000000 $t
+ /tmp/ccOAZfRE.s:3091 .text.UART_EndTransmit_IT:00000000 $t
+ /tmp/ccOAZfRE.s:3096 .text.UART_EndTransmit_IT:00000000 UART_EndTransmit_IT
+ /tmp/ccOAZfRE.s:3179 .text.HAL_UART_TxHalfCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:3185 .text.HAL_UART_TxHalfCpltCallback:00000000 HAL_UART_TxHalfCpltCallback
+ /tmp/ccOAZfRE.s:3200 .text.UART_DMATxHalfCplt:00000000 $t
+ /tmp/ccOAZfRE.s:3232 .text.HAL_UART_RxCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:3238 .text.HAL_UART_RxCpltCallback:00000000 HAL_UART_RxCpltCallback
+ /tmp/ccOAZfRE.s:3253 .text.HAL_UART_RxHalfCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:3259 .text.HAL_UART_RxHalfCpltCallback:00000000 HAL_UART_RxHalfCpltCallback
+ /tmp/ccOAZfRE.s:3274 .text.HAL_UART_ErrorCallback:00000000 $t
+ /tmp/ccOAZfRE.s:3280 .text.HAL_UART_ErrorCallback:00000000 HAL_UART_ErrorCallback
+ /tmp/ccOAZfRE.s:3295 .text.UART_DMAError:00000000 $t
+ /tmp/ccOAZfRE.s:3390 .text.UART_DMAAbortOnError:00000000 $t
+ /tmp/ccOAZfRE.s:3395 .text.UART_DMAAbortOnError:00000000 UART_DMAAbortOnError
+ /tmp/ccOAZfRE.s:3428 .text.HAL_UART_AbortCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:3434 .text.HAL_UART_AbortCpltCallback:00000000 HAL_UART_AbortCpltCallback
+ /tmp/ccOAZfRE.s:3449 .text.HAL_UART_Abort_IT:00000000 $t
+ ARM GAS /tmp/ccOAZfRE.s page 338
- /tmp/ccsprDvq.s:3455 .text.HAL_UART_Abort_IT:00000000 HAL_UART_Abort_IT
- /tmp/ccsprDvq.s:3931 .text.HAL_UART_Abort_IT:00000128 $d
- /tmp/ccsprDvq.s:4020 .text.UART_DMATxAbortCallback:00000000 UART_DMATxAbortCallback
- /tmp/ccsprDvq.s:3942 .text.UART_DMARxAbortCallback:00000000 UART_DMARxAbortCallback
- /tmp/ccsprDvq.s:3937 .text.UART_DMARxAbortCallback:00000000 $t
- /tmp/ccsprDvq.s:4015 .text.UART_DMATxAbortCallback:00000000 $t
- /tmp/ccsprDvq.s:4088 .text.HAL_UART_AbortTransmitCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:4094 .text.HAL_UART_AbortTransmitCpltCallback:00000000 HAL_UART_AbortTransmitCpltCallback
- /tmp/ccsprDvq.s:4109 .text.HAL_UART_AbortTransmit_IT:00000000 $t
- /tmp/ccsprDvq.s:4115 .text.HAL_UART_AbortTransmit_IT:00000000 HAL_UART_AbortTransmit_IT
- /tmp/ccsprDvq.s:4323 .text.HAL_UART_AbortTransmit_IT:0000007c $d
- /tmp/ccsprDvq.s:4333 .text.UART_DMATxOnlyAbortCallback:00000000 UART_DMATxOnlyAbortCallback
- /tmp/ccsprDvq.s:4328 .text.UART_DMATxOnlyAbortCallback:00000000 $t
- /tmp/ccsprDvq.s:4367 .text.HAL_UART_AbortReceiveCpltCallback:00000000 $t
- /tmp/ccsprDvq.s:4373 .text.HAL_UART_AbortReceiveCpltCallback:00000000 HAL_UART_AbortReceiveCpltCallback
- /tmp/ccsprDvq.s:4388 .text.HAL_UART_AbortReceive_IT:00000000 $t
- /tmp/ccsprDvq.s:4394 .text.HAL_UART_AbortReceive_IT:00000000 HAL_UART_AbortReceive_IT
- /tmp/ccsprDvq.s:4739 .text.HAL_UART_AbortReceive_IT:000000c8 $d
- /tmp/ccsprDvq.s:4749 .text.UART_DMARxOnlyAbortCallback:00000000 UART_DMARxOnlyAbortCallback
- /tmp/ccsprDvq.s:4744 .text.UART_DMARxOnlyAbortCallback:00000000 $t
- /tmp/ccsprDvq.s:4795 .text.HAL_UARTEx_RxEventCallback:00000000 $t
- /tmp/ccsprDvq.s:4801 .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback
- /tmp/ccsprDvq.s:4817 .text.UART_RxISR_8BIT:00000000 $t
- /tmp/ccsprDvq.s:4822 .text.UART_RxISR_8BIT:00000000 UART_RxISR_8BIT
- /tmp/ccsprDvq.s:5172 .text.UART_RxISR_16BIT:00000000 $t
- /tmp/ccsprDvq.s:5177 .text.UART_RxISR_16BIT:00000000 UART_RxISR_16BIT
- /tmp/ccsprDvq.s:5527 .text.UART_DMARxHalfCplt:00000000 $t
- /tmp/ccsprDvq.s:5532 .text.UART_DMARxHalfCplt:00000000 UART_DMARxHalfCplt
- /tmp/ccsprDvq.s:5580 .text.UART_DMAReceiveCplt:00000000 $t
- /tmp/ccsprDvq.s:5585 .text.UART_DMAReceiveCplt:00000000 UART_DMAReceiveCplt
- /tmp/ccsprDvq.s:5879 .text.HAL_UARTEx_WakeupCallback:00000000 $t
- /tmp/ccsprDvq.s:5885 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback
- /tmp/ccsprDvq.s:5900 .text.HAL_UART_IRQHandler:00000000 $t
- /tmp/ccsprDvq.s:5906 .text.HAL_UART_IRQHandler:00000000 HAL_UART_IRQHandler
- /tmp/ccsprDvq.s:6828 .text.HAL_UART_IRQHandler:000002e0 $d
- /tmp/ccsprDvq.s:6834 .text.HAL_UART_ReceiverTimeout_Config:00000000 $t
- /tmp/ccsprDvq.s:6840 .text.HAL_UART_ReceiverTimeout_Config:00000000 HAL_UART_ReceiverTimeout_Config
- /tmp/ccsprDvq.s:6861 .text.HAL_UART_EnableReceiverTimeout:00000000 $t
- /tmp/ccsprDvq.s:6867 .text.HAL_UART_EnableReceiverTimeout:00000000 HAL_UART_EnableReceiverTimeout
- /tmp/ccsprDvq.s:6932 .text.HAL_UART_DisableReceiverTimeout:00000000 $t
- /tmp/ccsprDvq.s:6938 .text.HAL_UART_DisableReceiverTimeout:00000000 HAL_UART_DisableReceiverTimeout
- /tmp/ccsprDvq.s:7003 .text.HAL_MultiProcessor_EnterMuteMode:00000000 $t
- /tmp/ccsprDvq.s:7009 .text.HAL_MultiProcessor_EnterMuteMode:00000000 HAL_MultiProcessor_EnterMuteMode
- /tmp/ccsprDvq.s:7028 .text.HAL_HalfDuplex_EnableTransmitter:00000000 $t
- /tmp/ccsprDvq.s:7034 .text.HAL_HalfDuplex_EnableTransmitter:00000000 HAL_HalfDuplex_EnableTransmitter
- /tmp/ccsprDvq.s:7187 .text.HAL_HalfDuplex_EnableReceiver:00000000 $t
- /tmp/ccsprDvq.s:7193 .text.HAL_HalfDuplex_EnableReceiver:00000000 HAL_HalfDuplex_EnableReceiver
- /tmp/ccsprDvq.s:7346 .text.HAL_LIN_SendBreak:00000000 $t
- /tmp/ccsprDvq.s:7352 .text.HAL_LIN_SendBreak:00000000 HAL_LIN_SendBreak
- /tmp/ccsprDvq.s:7405 .text.HAL_UART_GetState:00000000 $t
- /tmp/ccsprDvq.s:7411 .text.HAL_UART_GetState:00000000 HAL_UART_GetState
- /tmp/ccsprDvq.s:7439 .text.HAL_UART_GetError:00000000 $t
- /tmp/ccsprDvq.s:7445 .text.HAL_UART_GetError:00000000 HAL_UART_GetError
- /tmp/ccsprDvq.s:7463 .text.UART_SetConfig:00000000 $t
- /tmp/ccsprDvq.s:7469 .text.UART_SetConfig:00000000 UART_SetConfig
- /tmp/ccsprDvq.s:7596 .text.UART_SetConfig:0000008a $d
- /tmp/ccsprDvq.s:7600 .text.UART_SetConfig:0000008e $t
- ARM GAS /tmp/ccsprDvq.s page 339
+ /tmp/ccOAZfRE.s:3455 .text.HAL_UART_Abort_IT:00000000 HAL_UART_Abort_IT
+ /tmp/ccOAZfRE.s:3931 .text.HAL_UART_Abort_IT:00000128 $d
+ /tmp/ccOAZfRE.s:4020 .text.UART_DMATxAbortCallback:00000000 UART_DMATxAbortCallback
+ /tmp/ccOAZfRE.s:3942 .text.UART_DMARxAbortCallback:00000000 UART_DMARxAbortCallback
+ /tmp/ccOAZfRE.s:3937 .text.UART_DMARxAbortCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4015 .text.UART_DMATxAbortCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4088 .text.HAL_UART_AbortTransmitCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4094 .text.HAL_UART_AbortTransmitCpltCallback:00000000 HAL_UART_AbortTransmitCpltCallback
+ /tmp/ccOAZfRE.s:4109 .text.HAL_UART_AbortTransmit_IT:00000000 $t
+ /tmp/ccOAZfRE.s:4115 .text.HAL_UART_AbortTransmit_IT:00000000 HAL_UART_AbortTransmit_IT
+ /tmp/ccOAZfRE.s:4323 .text.HAL_UART_AbortTransmit_IT:0000007c $d
+ /tmp/ccOAZfRE.s:4333 .text.UART_DMATxOnlyAbortCallback:00000000 UART_DMATxOnlyAbortCallback
+ /tmp/ccOAZfRE.s:4328 .text.UART_DMATxOnlyAbortCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4367 .text.HAL_UART_AbortReceiveCpltCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4373 .text.HAL_UART_AbortReceiveCpltCallback:00000000 HAL_UART_AbortReceiveCpltCallback
+ /tmp/ccOAZfRE.s:4388 .text.HAL_UART_AbortReceive_IT:00000000 $t
+ /tmp/ccOAZfRE.s:4394 .text.HAL_UART_AbortReceive_IT:00000000 HAL_UART_AbortReceive_IT
+ /tmp/ccOAZfRE.s:4739 .text.HAL_UART_AbortReceive_IT:000000c8 $d
+ /tmp/ccOAZfRE.s:4749 .text.UART_DMARxOnlyAbortCallback:00000000 UART_DMARxOnlyAbortCallback
+ /tmp/ccOAZfRE.s:4744 .text.UART_DMARxOnlyAbortCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4795 .text.HAL_UARTEx_RxEventCallback:00000000 $t
+ /tmp/ccOAZfRE.s:4801 .text.HAL_UARTEx_RxEventCallback:00000000 HAL_UARTEx_RxEventCallback
+ /tmp/ccOAZfRE.s:4817 .text.UART_RxISR_8BIT:00000000 $t
+ /tmp/ccOAZfRE.s:4822 .text.UART_RxISR_8BIT:00000000 UART_RxISR_8BIT
+ /tmp/ccOAZfRE.s:5172 .text.UART_RxISR_16BIT:00000000 $t
+ /tmp/ccOAZfRE.s:5177 .text.UART_RxISR_16BIT:00000000 UART_RxISR_16BIT
+ /tmp/ccOAZfRE.s:5527 .text.UART_DMARxHalfCplt:00000000 $t
+ /tmp/ccOAZfRE.s:5532 .text.UART_DMARxHalfCplt:00000000 UART_DMARxHalfCplt
+ /tmp/ccOAZfRE.s:5580 .text.UART_DMAReceiveCplt:00000000 $t
+ /tmp/ccOAZfRE.s:5585 .text.UART_DMAReceiveCplt:00000000 UART_DMAReceiveCplt
+ /tmp/ccOAZfRE.s:5879 .text.HAL_UARTEx_WakeupCallback:00000000 $t
+ /tmp/ccOAZfRE.s:5885 .text.HAL_UARTEx_WakeupCallback:00000000 HAL_UARTEx_WakeupCallback
+ /tmp/ccOAZfRE.s:5900 .text.HAL_UART_IRQHandler:00000000 $t
+ /tmp/ccOAZfRE.s:5906 .text.HAL_UART_IRQHandler:00000000 HAL_UART_IRQHandler
+ /tmp/ccOAZfRE.s:6828 .text.HAL_UART_IRQHandler:000002e0 $d
+ /tmp/ccOAZfRE.s:6834 .text.HAL_UART_ReceiverTimeout_Config:00000000 $t
+ /tmp/ccOAZfRE.s:6840 .text.HAL_UART_ReceiverTimeout_Config:00000000 HAL_UART_ReceiverTimeout_Config
+ /tmp/ccOAZfRE.s:6861 .text.HAL_UART_EnableReceiverTimeout:00000000 $t
+ /tmp/ccOAZfRE.s:6867 .text.HAL_UART_EnableReceiverTimeout:00000000 HAL_UART_EnableReceiverTimeout
+ /tmp/ccOAZfRE.s:6932 .text.HAL_UART_DisableReceiverTimeout:00000000 $t
+ /tmp/ccOAZfRE.s:6938 .text.HAL_UART_DisableReceiverTimeout:00000000 HAL_UART_DisableReceiverTimeout
+ /tmp/ccOAZfRE.s:7003 .text.HAL_MultiProcessor_EnterMuteMode:00000000 $t
+ /tmp/ccOAZfRE.s:7009 .text.HAL_MultiProcessor_EnterMuteMode:00000000 HAL_MultiProcessor_EnterMuteMode
+ /tmp/ccOAZfRE.s:7028 .text.HAL_HalfDuplex_EnableTransmitter:00000000 $t
+ /tmp/ccOAZfRE.s:7034 .text.HAL_HalfDuplex_EnableTransmitter:00000000 HAL_HalfDuplex_EnableTransmitter
+ /tmp/ccOAZfRE.s:7187 .text.HAL_HalfDuplex_EnableReceiver:00000000 $t
+ /tmp/ccOAZfRE.s:7193 .text.HAL_HalfDuplex_EnableReceiver:00000000 HAL_HalfDuplex_EnableReceiver
+ /tmp/ccOAZfRE.s:7346 .text.HAL_LIN_SendBreak:00000000 $t
+ /tmp/ccOAZfRE.s:7352 .text.HAL_LIN_SendBreak:00000000 HAL_LIN_SendBreak
+ /tmp/ccOAZfRE.s:7405 .text.HAL_UART_GetState:00000000 $t
+ /tmp/ccOAZfRE.s:7411 .text.HAL_UART_GetState:00000000 HAL_UART_GetState
+ /tmp/ccOAZfRE.s:7439 .text.HAL_UART_GetError:00000000 $t
+ /tmp/ccOAZfRE.s:7445 .text.HAL_UART_GetError:00000000 HAL_UART_GetError
+ /tmp/ccOAZfRE.s:7463 .text.UART_SetConfig:00000000 $t
+ /tmp/ccOAZfRE.s:7469 .text.UART_SetConfig:00000000 UART_SetConfig
+ /tmp/ccOAZfRE.s:7596 .text.UART_SetConfig:0000008a $d
+ /tmp/ccOAZfRE.s:7600 .text.UART_SetConfig:0000008e $t
+ ARM GAS /tmp/ccOAZfRE.s page 339
- /tmp/ccsprDvq.s:7617 .text.UART_SetConfig:000000a4 $d
- /tmp/ccsprDvq.s:7627 .text.UART_SetConfig:000000b6 $t
- /tmp/ccsprDvq.s:7658 .text.UART_SetConfig:000000d4 $d
- /tmp/ccsprDvq.s:7933 .text.UART_SetConfig:00000250 $d
- /tmp/ccsprDvq.s:7946 .text.UART_SetConfig:0000025c $d
- /tmp/ccsprDvq.s:7959 .text.UART_SetConfig:00000284 $t
- /tmp/ccsprDvq.s:8134 .text.UART_SetConfig:00000324 $d
- /tmp/ccsprDvq.s:8139 .text.UART_AdvFeatureConfig:00000000 $t
- /tmp/ccsprDvq.s:8145 .text.UART_AdvFeatureConfig:00000000 UART_AdvFeatureConfig
- /tmp/ccsprDvq.s:8297 .text.UART_WaitOnFlagUntilTimeout:00000000 $t
- /tmp/ccsprDvq.s:8303 .text.UART_WaitOnFlagUntilTimeout:00000000 UART_WaitOnFlagUntilTimeout
- /tmp/ccsprDvq.s:8444 .text.HAL_UART_Transmit:00000000 $t
- /tmp/ccsprDvq.s:8450 .text.HAL_UART_Transmit:00000000 HAL_UART_Transmit
- /tmp/ccsprDvq.s:8660 .text.HAL_UART_Receive:00000000 $t
- /tmp/ccsprDvq.s:8666 .text.HAL_UART_Receive:00000000 HAL_UART_Receive
- /tmp/ccsprDvq.s:8920 .text.UART_CheckIdleState:00000000 $t
- /tmp/ccsprDvq.s:8926 .text.UART_CheckIdleState:00000000 UART_CheckIdleState
- /tmp/ccsprDvq.s:9231 .text.HAL_UART_Init:00000000 $t
- /tmp/ccsprDvq.s:9237 .text.HAL_UART_Init:00000000 HAL_UART_Init
- /tmp/ccsprDvq.s:9341 .text.HAL_HalfDuplex_Init:00000000 $t
- /tmp/ccsprDvq.s:9347 .text.HAL_HalfDuplex_Init:00000000 HAL_HalfDuplex_Init
- /tmp/ccsprDvq.s:9455 .text.HAL_LIN_Init:00000000 $t
- /tmp/ccsprDvq.s:9461 .text.HAL_LIN_Init:00000000 HAL_LIN_Init
- /tmp/ccsprDvq.s:9613 .text.HAL_MultiProcessor_Init:00000000 $t
- /tmp/ccsprDvq.s:9619 .text.HAL_MultiProcessor_Init:00000000 HAL_MultiProcessor_Init
- /tmp/ccsprDvq.s:9747 .text.HAL_MultiProcessor_EnableMuteMode:00000000 $t
- /tmp/ccsprDvq.s:9753 .text.HAL_MultiProcessor_EnableMuteMode:00000000 HAL_MultiProcessor_EnableMuteMode
- /tmp/ccsprDvq.s:9854 .text.HAL_MultiProcessor_DisableMuteMode:00000000 $t
- /tmp/ccsprDvq.s:9860 .text.HAL_MultiProcessor_DisableMuteMode:00000000 HAL_MultiProcessor_DisableMuteMode
- /tmp/ccsprDvq.s:9961 .text.UART_Start_Receive_IT:00000000 $t
- /tmp/ccsprDvq.s:9967 .text.UART_Start_Receive_IT:00000000 UART_Start_Receive_IT
- /tmp/ccsprDvq.s:10252 .text.UART_Start_Receive_IT:000000cc $d
- /tmp/ccsprDvq.s:10259 .text.HAL_UART_Receive_IT:00000000 $t
- /tmp/ccsprDvq.s:10265 .text.HAL_UART_Receive_IT:00000000 HAL_UART_Receive_IT
- /tmp/ccsprDvq.s:10382 .text.UART_Start_Receive_DMA:00000000 $t
- /tmp/ccsprDvq.s:10388 .text.UART_Start_Receive_DMA:00000000 UART_Start_Receive_DMA
- /tmp/ccsprDvq.s:10659 .text.UART_Start_Receive_DMA:0000009c $d
- /tmp/ccsprDvq.s:10666 .text.HAL_UART_Receive_DMA:00000000 $t
- /tmp/ccsprDvq.s:10672 .text.HAL_UART_Receive_DMA:00000000 HAL_UART_Receive_DMA
- /tmp/ccsprDvq.s:7671 .text.UART_SetConfig:000000e1 $d
- /tmp/ccsprDvq.s:7671 .text.UART_SetConfig:000000e2 $t
- /tmp/ccsprDvq.s:7942 .text.UART_SetConfig:00000259 $d
- /tmp/ccsprDvq.s:7942 .text.UART_SetConfig:0000025a $t
+ /tmp/ccOAZfRE.s:7617 .text.UART_SetConfig:000000a4 $d
+ /tmp/ccOAZfRE.s:7627 .text.UART_SetConfig:000000b6 $t
+ /tmp/ccOAZfRE.s:7658 .text.UART_SetConfig:000000d4 $d
+ /tmp/ccOAZfRE.s:7933 .text.UART_SetConfig:00000250 $d
+ /tmp/ccOAZfRE.s:7946 .text.UART_SetConfig:0000025c $d
+ /tmp/ccOAZfRE.s:7959 .text.UART_SetConfig:00000284 $t
+ /tmp/ccOAZfRE.s:8134 .text.UART_SetConfig:00000324 $d
+ /tmp/ccOAZfRE.s:8139 .text.UART_AdvFeatureConfig:00000000 $t
+ /tmp/ccOAZfRE.s:8145 .text.UART_AdvFeatureConfig:00000000 UART_AdvFeatureConfig
+ /tmp/ccOAZfRE.s:8297 .text.UART_WaitOnFlagUntilTimeout:00000000 $t
+ /tmp/ccOAZfRE.s:8303 .text.UART_WaitOnFlagUntilTimeout:00000000 UART_WaitOnFlagUntilTimeout
+ /tmp/ccOAZfRE.s:8444 .text.HAL_UART_Transmit:00000000 $t
+ /tmp/ccOAZfRE.s:8450 .text.HAL_UART_Transmit:00000000 HAL_UART_Transmit
+ /tmp/ccOAZfRE.s:8660 .text.HAL_UART_Receive:00000000 $t
+ /tmp/ccOAZfRE.s:8666 .text.HAL_UART_Receive:00000000 HAL_UART_Receive
+ /tmp/ccOAZfRE.s:8920 .text.UART_CheckIdleState:00000000 $t
+ /tmp/ccOAZfRE.s:8926 .text.UART_CheckIdleState:00000000 UART_CheckIdleState
+ /tmp/ccOAZfRE.s:9231 .text.HAL_UART_Init:00000000 $t
+ /tmp/ccOAZfRE.s:9237 .text.HAL_UART_Init:00000000 HAL_UART_Init
+ /tmp/ccOAZfRE.s:9341 .text.HAL_HalfDuplex_Init:00000000 $t
+ /tmp/ccOAZfRE.s:9347 .text.HAL_HalfDuplex_Init:00000000 HAL_HalfDuplex_Init
+ /tmp/ccOAZfRE.s:9455 .text.HAL_LIN_Init:00000000 $t
+ /tmp/ccOAZfRE.s:9461 .text.HAL_LIN_Init:00000000 HAL_LIN_Init
+ /tmp/ccOAZfRE.s:9613 .text.HAL_MultiProcessor_Init:00000000 $t
+ /tmp/ccOAZfRE.s:9619 .text.HAL_MultiProcessor_Init:00000000 HAL_MultiProcessor_Init
+ /tmp/ccOAZfRE.s:9747 .text.HAL_MultiProcessor_EnableMuteMode:00000000 $t
+ /tmp/ccOAZfRE.s:9753 .text.HAL_MultiProcessor_EnableMuteMode:00000000 HAL_MultiProcessor_EnableMuteMode
+ /tmp/ccOAZfRE.s:9854 .text.HAL_MultiProcessor_DisableMuteMode:00000000 $t
+ /tmp/ccOAZfRE.s:9860 .text.HAL_MultiProcessor_DisableMuteMode:00000000 HAL_MultiProcessor_DisableMuteMode
+ /tmp/ccOAZfRE.s:9961 .text.UART_Start_Receive_IT:00000000 $t
+ /tmp/ccOAZfRE.s:9967 .text.UART_Start_Receive_IT:00000000 UART_Start_Receive_IT
+ /tmp/ccOAZfRE.s:10252 .text.UART_Start_Receive_IT:000000cc $d
+ /tmp/ccOAZfRE.s:10259 .text.HAL_UART_Receive_IT:00000000 $t
+ /tmp/ccOAZfRE.s:10265 .text.HAL_UART_Receive_IT:00000000 HAL_UART_Receive_IT
+ /tmp/ccOAZfRE.s:10382 .text.UART_Start_Receive_DMA:00000000 $t
+ /tmp/ccOAZfRE.s:10388 .text.UART_Start_Receive_DMA:00000000 UART_Start_Receive_DMA
+ /tmp/ccOAZfRE.s:10659 .text.UART_Start_Receive_DMA:0000009c $d
+ /tmp/ccOAZfRE.s:10666 .text.HAL_UART_Receive_DMA:00000000 $t
+ /tmp/ccOAZfRE.s:10672 .text.HAL_UART_Receive_DMA:00000000 HAL_UART_Receive_DMA
+ /tmp/ccOAZfRE.s:7671 .text.UART_SetConfig:000000e1 $d
+ /tmp/ccOAZfRE.s:7671 .text.UART_SetConfig:000000e2 $t
+ /tmp/ccOAZfRE.s:7942 .text.UART_SetConfig:00000259 $d
+ /tmp/ccOAZfRE.s:7942 .text.UART_SetConfig:0000025a $t
UNDEFINED SYMBOLS
HAL_DMA_Start_IT
diff --git a/build/stm32f7xx_hal_uart_ex.lst b/build/stm32f7xx_hal_uart_ex.lst
index ad27562..9a9ba10 100644
--- a/build/stm32f7xx_hal_uart_ex.lst
+++ b/build/stm32f7xx_hal_uart_ex.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccvzLe3h.s page 1
+ARM GAS /tmp/ccIzO3xY.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) For the UART RS485 Driver Enable mode, initialize the UART registers
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** by calling the HAL_RS485Ex_Init() API.
- ARM GAS /tmp/ccvzLe3h.s page 2
+ ARM GAS /tmp/ccIzO3xY.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Stop Bit
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Parity: If the parity is enabled, then the MSB bit of the data written
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** in the data register is transmitted but is changed by the parity bit.
- ARM GAS /tmp/ccvzLe3h.s page 3
+ ARM GAS /tmp/ccIzO3xY.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (++) Hardware flow control
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param DeassertionTime Driver Enable deassertion time:
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * 5-bit value defining the time between the end of the last stop bit, in a
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * transmitted message, and the de-activation of the DE (Driver Enable) signal.
- ARM GAS /tmp/ccvzLe3h.s page 4
+ ARM GAS /tmp/ccIzO3xY.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * It is expressed in sample time units (1/8 or 1/16 bit time, depending on the
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** UART_AdvFeatureConfig(huart);
- ARM GAS /tmp/ccvzLe3h.s page 5
+ ARM GAS /tmp/ccIzO3xY.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (#) Compared to standard reception services which only consider number of received
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** data elements as reception completion criteria, these functions also consider additional ev
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** as triggers for updating reception status to caller :
- ARM GAS /tmp/ccvzLe3h.s page 6
+ ARM GAS /tmp/ccIzO3xY.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** (+) Detection of inactivity period (RX line has not been active for a given period).
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /**
- ARM GAS /tmp/ccvzLe3h.s page 7
+ ARM GAS /tmp/ccIzO3xY.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @brief Disable UART Clock when in Stop Mode.
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* TEACK and/or REACK to check before moving huart->gState to Ready */
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return (UART_CheckIdleState(huart));
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
- ARM GAS /tmp/ccvzLe3h.s page 8
+ ARM GAS /tmp/ccIzO3xY.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Initialize the UART State */
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** huart->gState = HAL_UART_STATE_READY;
- ARM GAS /tmp/ccvzLe3h.s page 9
+ ARM GAS /tmp/ccIzO3xY.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * the received data is handled as a set of uint16_t. In this case, Size must indicate the
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * of uint16_t available through pData.
- ARM GAS /tmp/ccvzLe3h.s page 10
+ ARM GAS /tmp/ccIzO3xY.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** * @param huart UART handle.
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* as long as data have to be received */
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** while (huart->RxXferCount > 0U)
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
- ARM GAS /tmp/ccvzLe3h.s page 11
+ ARM GAS /tmp/ccIzO3xY.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Check if IDLE flag is set */
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY;
- ARM GAS /tmp/ccvzLe3h.s page 12
+ ARM GAS /tmp/ccIzO3xY.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
- ARM GAS /tmp/ccvzLe3h.s page 13
+ ARM GAS /tmp/ccIzO3xY.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /**
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** else
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
- ARM GAS /tmp/ccvzLe3h.s page 14
+ ARM GAS /tmp/ccIzO3xY.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** return HAL_BUSY;
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
28 .loc 1 770 1 view -0
29 .cfi_startproc
- ARM GAS /tmp/ccvzLe3h.s page 15
+ ARM GAS /tmp/ccIzO3xY.s page 15
30 @ args = 0, pretend = 0, frame = 8
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
77 .loc 1 153 3 view .LVU7
156:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
- ARM GAS /tmp/ccvzLe3h.s page 16
+ ARM GAS /tmp/ccIzO3xY.s page 16
78 .loc 1 156 3 view .LVU8
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
118 .loc 1 200 26 is_stmt 0 view .LVU22
119 0020 636A ldr r3, [r4, #36]
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
- ARM GAS /tmp/ccvzLe3h.s page 17
+ ARM GAS /tmp/ccIzO3xY.s page 17
120 .loc 1 200 6 view .LVU23
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
162 005a 43F00103 orr r3, r3, #1
163 005e 1360 str r3, [r2]
226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
- ARM GAS /tmp/ccvzLe3h.s page 18
+ ARM GAS /tmp/ccIzO3xY.s page 18
164 .loc 1 226 3 is_stmt 1 view .LVU36
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
210 .thumb
211 .thumb_func
213 HAL_UARTEx_EnableClockStopMode:
- ARM GAS /tmp/ccvzLe3h.s page 19
+ ARM GAS /tmp/ccIzO3xY.s page 19
214 .LVL15:
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
19:Drivers/CMSIS/Include/cmsis_gcc.h **** * distributed under the License is distributed on an AS IS BASIS, WITHOUT
20:Drivers/CMSIS/Include/cmsis_gcc.h **** * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
21:Drivers/CMSIS/Include/cmsis_gcc.h **** * See the License for the specific language governing permissions and
- ARM GAS /tmp/ccvzLe3h.s page 20
+ ARM GAS /tmp/ccIzO3xY.s page 20
22:Drivers/CMSIS/Include/cmsis_gcc.h **** * limitations under the License.
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
76:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
77:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
78:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_WRITE
- ARM GAS /tmp/ccvzLe3h.s page 21
+ ARM GAS /tmp/ccIzO3xY.s page 21
79:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
133:Drivers/CMSIS/Include/cmsis_gcc.h ****
134:Drivers/CMSIS/Include/cmsis_gcc.h ****
135:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccvzLe3h.s page 22
+ ARM GAS /tmp/ccIzO3xY.s page 22
136:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Disable IRQ Interrupts
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
190:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Writes the given value to the non-secure Control Register when in secure state.
191:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] control Control Register value to set
192:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccvzLe3h.s page 23
+ ARM GAS /tmp/ccIzO3xY.s page 23
193:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
247:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSP(void)
248:Drivers/CMSIS/Include/cmsis_gcc.h **** {
249:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- ARM GAS /tmp/ccvzLe3h.s page 24
+ ARM GAS /tmp/ccIzO3xY.s page 24
250:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
304:Drivers/CMSIS/Include/cmsis_gcc.h ****
305:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msp" : "=r" (result) );
306:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- ARM GAS /tmp/ccvzLe3h.s page 25
+ ARM GAS /tmp/ccIzO3xY.s page 25
307:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
361:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
362:Drivers/CMSIS/Include/cmsis_gcc.h **** }
363:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccvzLe3h.s page 26
+ ARM GAS /tmp/ccIzO3xY.s page 26
364:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
418:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
419:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
420:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Priority Mask (non-secure)
- ARM GAS /tmp/ccvzLe3h.s page 27
+ ARM GAS /tmp/ccIzO3xY.s page 27
421:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
475:Drivers/CMSIS/Include/cmsis_gcc.h **** */
476:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
477:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccvzLe3h.s page 28
+ ARM GAS /tmp/ccIzO3xY.s page 28
478:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
532:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
533:Drivers/CMSIS/Include/cmsis_gcc.h **** }
534:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccvzLe3h.s page 29
+ ARM GAS /tmp/ccIzO3xY.s page 29
535:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
589:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
590:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
591:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccvzLe3h.s page 30
+ ARM GAS /tmp/ccIzO3xY.s page 30
592:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
646:Drivers/CMSIS/Include/cmsis_gcc.h **** }
647:Drivers/CMSIS/Include/cmsis_gcc.h ****
648:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccvzLe3h.s page 31
+ ARM GAS /tmp/ccIzO3xY.s page 31
649:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
703:Drivers/CMSIS/Include/cmsis_gcc.h **** {
704:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
705:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- ARM GAS /tmp/ccvzLe3h.s page 32
+ ARM GAS /tmp/ccIzO3xY.s page 32
706:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
760:Drivers/CMSIS/Include/cmsis_gcc.h ****
761:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
762:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get FPSCR
- ARM GAS /tmp/ccvzLe3h.s page 33
+ ARM GAS /tmp/ccIzO3xY.s page 33
763:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Floating Point Status/Control register.
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
817:Drivers/CMSIS/Include/cmsis_gcc.h **** */
818:Drivers/CMSIS/Include/cmsis_gcc.h ****
819:Drivers/CMSIS/Include/cmsis_gcc.h **** /* Define macros for porting to both thumb1 and thumb2.
- ARM GAS /tmp/ccvzLe3h.s page 34
+ ARM GAS /tmp/ccIzO3xY.s page 34
820:Drivers/CMSIS/Include/cmsis_gcc.h **** * For thumb1, use low register (r0-r7), specified by constraint "l"
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
874:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Acts as a special kind of Data Memory Barrier.
875:Drivers/CMSIS/Include/cmsis_gcc.h **** It completes when all explicit memory accesses before this instruction complete.
876:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccvzLe3h.s page 35
+ ARM GAS /tmp/ccIzO3xY.s page 35
877:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DSB(void)
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
931:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
932:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
933:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccvzLe3h.s page 36
+ ARM GAS /tmp/ccIzO3xY.s page 36
934:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
988:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
989:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
990:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
- ARM GAS /tmp/ccvzLe3h.s page 37
+ ARM GAS /tmp/ccIzO3xY.s page 37
991:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1045:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1046:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
1047:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccvzLe3h.s page 38
+ ARM GAS /tmp/ccIzO3xY.s page 38
1048:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1076:Drivers/CMSIS/Include/cmsis_gcc.h ****
1077:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
1078:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief STR Exclusive (8 bit)
- ARM GAS /tmp/ccvzLe3h.s page 39
+ ARM GAS /tmp/ccIzO3xY.s page 39
1079:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 8 bit values.
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
274 001e 42E80031 strex r1, r3, [r2]
275 @ 0 "" 2
276 .LVL21:
- ARM GAS /tmp/ccvzLe3h.s page 40
+ ARM GAS /tmp/ccIzO3xY.s page 40
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* Process Locked */
321 .loc 1 322 1 is_stmt 1 view -0
322 .cfi_startproc
- ARM GAS /tmp/ccvzLe3h.s page 41
+ ARM GAS /tmp/ccIzO3xY.s page 41
323 @ args = 0, pretend = 0, frame = 0
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
363 .loc 1 327 3 discriminator 1 view .LVU95
364 0018 23F40003 bic r3, r3, #8388608
- ARM GAS /tmp/ccvzLe3h.s page 42
+ ARM GAS /tmp/ccIzO3xY.s page 42
365 .LVL30:
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
405 .LVL35:
406 .L21:
324:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
- ARM GAS /tmp/ccvzLe3h.s page 43
+ ARM GAS /tmp/ccIzO3xY.s page 43
407 .loc 1 324 3 discriminator 1 view .LVU112
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
452 0014 1868 ldr r0, [r3]
453 0016 4268 ldr r2, [r0, #4]
454 0018 22F01002 bic r2, r2, #16
- ARM GAS /tmp/ccvzLe3h.s page 44
+ ARM GAS /tmp/ccIzO3xY.s page 44
455 001c 1143 orrs r1, r1, r2
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
502 .cfi_def_cfa_offset 8
503 .cfi_offset 4, -8
504 .cfi_offset 14, -4
- ARM GAS /tmp/ccvzLe3h.s page 45
+ ARM GAS /tmp/ccIzO3xY.s page 45
505 0002 84B0 sub sp, sp, #16
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
545 .L31:
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
546 .loc 1 417 3 is_stmt 1 view .LVU147
- ARM GAS /tmp/ccvzLe3h.s page 46
+ ARM GAS /tmp/ccIzO3xY.s page 46
547 0038 2268 ldr r2, [r4]
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
590 .loc 1 434 3 is_stmt 1 view .LVU159
434:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
- ARM GAS /tmp/ccvzLe3h.s page 47
+ ARM GAS /tmp/ccIzO3xY.s page 47
591 .loc 1 434 3 view .LVU160
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
638 0008 0123 movs r3, #1
639 000a 80F87830 strb r3, [r0, #120]
640 .L39:
- ARM GAS /tmp/ccvzLe3h.s page 48
+ ARM GAS /tmp/ccIzO3xY.s page 48
448:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
680 .LVL61:
681 .loc 2 1124 4 view .LVU185
682 .loc 2 1124 4 is_stmt 0 view .LVU186
- ARM GAS /tmp/ccvzLe3h.s page 49
+ ARM GAS /tmp/ccIzO3xY.s page 49
683 .thumb
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
727 @ args = 0, pretend = 0, frame = 0
728 @ frame_needed = 0, uses_anonymous_args = 0
729 @ link register save eliminated.
- ARM GAS /tmp/ccvzLe3h.s page 50
+ ARM GAS /tmp/ccIzO3xY.s page 50
467:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
769 .LBI50:
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** {
770 .loc 2 1119 31 view .LVU214
- ARM GAS /tmp/ccvzLe3h.s page 51
+ ARM GAS /tmp/ccIzO3xY.s page 51
771 .LBB51:
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
813 .section .text.HAL_UARTEx_ReceiveToIdle,"ax",%progbits
814 .align 1
815 .global HAL_UARTEx_ReceiveToIdle
- ARM GAS /tmp/ccvzLe3h.s page 52
+ ARM GAS /tmp/ccIzO3xY.s page 52
816 .syntax unified
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
860 001e 01D1 bne .L68
509:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
861 .loc 1 509 15 view .LVU241
- ARM GAS /tmp/ccvzLe3h.s page 53
+ ARM GAS /tmp/ccIzO3xY.s page 53
862 0020 0120 movs r0, #1
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
898 .loc 1 524 5 is_stmt 1 view .LVU259
524:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** uhMask = huart->Mask;
899 .loc 1 524 5 view .LVU260
- ARM GAS /tmp/ccvzLe3h.s page 54
+ ARM GAS /tmp/ccIzO3xY.s page 54
900 0044 A368 ldr r3, [r4, #8]
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
942 .LVL82:
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
943 .loc 1 528 5 is_stmt 1 view .LVU273
- ARM GAS /tmp/ccvzLe3h.s page 55
+ ARM GAS /tmp/ccIzO3xY.s page 55
528:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
984 .loc 1 530 19 view .LVU287
985 00b8 0027 movs r7, #0
986 .LVL86:
- ARM GAS /tmp/ccvzLe3h.s page 56
+ ARM GAS /tmp/ccIzO3xY.s page 56
530:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata16bits = (uint16_t *) pData;
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1024 00e0 013B subs r3, r3, #1
1025 00e2 9BB2 uxth r3, r3
1026 00e4 A4F85A30 strh r3, [r4, #90] @ movhi
- ARM GAS /tmp/ccvzLe3h.s page 57
+ ARM GAS /tmp/ccIzO3xY.s page 57
1027 .L57:
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1064 .loc 1 565 12 is_stmt 0 view .LVU321
1065 0114 002F cmp r7, #0
1066 0116 D8D0 beq .L75
- ARM GAS /tmp/ccvzLe3h.s page 58
+ ARM GAS /tmp/ccIzO3xY.s page 58
572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** pdata8bits++;
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
1104 .loc 1 593 19 is_stmt 0 view .LVU339
1105 0140 B4F85830 ldrh r3, [r4, #88]
- ARM GAS /tmp/ccvzLe3h.s page 59
+ ARM GAS /tmp/ccIzO3xY.s page 59
593:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** /* At end of Rx process, restore huart->RxState to Ready */
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
1149 .loc 1 624 12 is_stmt 0 view .LVU353
1150 0000 D0F88030 ldr r3, [r0, #128]
- ARM GAS /tmp/ccvzLe3h.s page 60
+ ARM GAS /tmp/ccIzO3xY.s page 60
624:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** {
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1190 .loc 1 637 8 view .LVU368
1191 0026 012B cmp r3, #1
1192 0028 01D0 beq .L88
- ARM GAS /tmp/ccvzLe3h.s page 61
+ ARM GAS /tmp/ccIzO3xY.s page 61
648:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
640:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** }
1233 .loc 1 640 7 is_stmt 1 discriminator 1 view .LVU383
1234 .LBB55:
- ARM GAS /tmp/ccvzLe3h.s page 62
+ ARM GAS /tmp/ccIzO3xY.s page 62
1235 .LBI55:
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1283 .LVL105:
1284 .LFB150:
677:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c **** HAL_StatusTypeDef status;
- ARM GAS /tmp/ccvzLe3h.s page 63
+ ARM GAS /tmp/ccIzO3xY.s page 63
1285 .loc 1 677 1 is_stmt 1 view -0
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1325 .loc 1 692 5 is_stmt 1 view .LVU408
692:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
1326 .loc 1 692 15 is_stmt 0 view .LVU409
- ARM GAS /tmp/ccvzLe3h.s page 64
+ ARM GAS /tmp/ccIzO3xY.s page 64
1327 0020 FFF7FEFF bl UART_Start_Receive_DMA
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1365 .syntax unified
1366 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1367 003a 52E8003F ldrex r3, [r2]
- ARM GAS /tmp/ccvzLe3h.s page 65
+ ARM GAS /tmp/ccIzO3xY.s page 65
1368 @ 0 "" 2
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccvzLe3h.s page 1
718:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_uart_ex.c ****
1412 .loc 1 718 1 view .LVU438
1413 004e 7047 bx lr
- ARM GAS /tmp/ccvzLe3h.s page 66
+ ARM GAS /tmp/ccIzO3xY.s page 66
1414 .cfi_endproc
@@ -3939,35 +3939,35 @@ ARM GAS /tmp/ccvzLe3h.s page 1
1448 .file 8 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h"
1449 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart_ex.h"
1450 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccvzLe3h.s page 67
+ ARM GAS /tmp/ccIzO3xY.s page 67
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_hal_uart_ex.c
- /tmp/ccvzLe3h.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t
- /tmp/ccvzLe3h.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig
- /tmp/ccvzLe3h.s:64 .text.HAL_RS485Ex_Init:00000000 $t
- /tmp/ccvzLe3h.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init
- /tmp/ccvzLe3h.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t
- /tmp/ccvzLe3h.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode
- /tmp/ccvzLe3h.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t
- /tmp/ccvzLe3h.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode
- /tmp/ccvzLe3h.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t
- /tmp/ccvzLe3h.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set
- /tmp/ccvzLe3h.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t
- /tmp/ccvzLe3h.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig
- /tmp/ccvzLe3h.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t
- /tmp/ccvzLe3h.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode
- /tmp/ccvzLe3h.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t
- /tmp/ccvzLe3h.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode
- /tmp/ccvzLe3h.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t
- /tmp/ccvzLe3h.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle
- /tmp/ccvzLe3h.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t
- /tmp/ccvzLe3h.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT
- /tmp/ccvzLe3h.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t
- /tmp/ccvzLe3h.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA
- /tmp/ccvzLe3h.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t
- /tmp/ccvzLe3h.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType
+ /tmp/ccIzO3xY.s:20 .text.UARTEx_Wakeup_AddressConfig:00000000 $t
+ /tmp/ccIzO3xY.s:25 .text.UARTEx_Wakeup_AddressConfig:00000000 UARTEx_Wakeup_AddressConfig
+ /tmp/ccIzO3xY.s:64 .text.HAL_RS485Ex_Init:00000000 $t
+ /tmp/ccIzO3xY.s:70 .text.HAL_RS485Ex_Init:00000000 HAL_RS485Ex_Init
+ /tmp/ccIzO3xY.s:207 .text.HAL_UARTEx_EnableClockStopMode:00000000 $t
+ /tmp/ccIzO3xY.s:213 .text.HAL_UARTEx_EnableClockStopMode:00000000 HAL_UARTEx_EnableClockStopMode
+ /tmp/ccIzO3xY.s:312 .text.HAL_UARTEx_DisableClockStopMode:00000000 $t
+ /tmp/ccIzO3xY.s:318 .text.HAL_UARTEx_DisableClockStopMode:00000000 HAL_UARTEx_DisableClockStopMode
+ /tmp/ccIzO3xY.s:416 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 $t
+ /tmp/ccIzO3xY.s:422 .text.HAL_MultiProcessorEx_AddressLength_Set:00000000 HAL_MultiProcessorEx_AddressLength_Set
+ /tmp/ccIzO3xY.s:486 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 $t
+ /tmp/ccIzO3xY.s:492 .text.HAL_UARTEx_StopModeWakeUpSourceConfig:00000000 HAL_UARTEx_StopModeWakeUpSourceConfig
+ /tmp/ccIzO3xY.s:618 .text.HAL_UARTEx_EnableStopMode:00000000 $t
+ /tmp/ccIzO3xY.s:624 .text.HAL_UARTEx_EnableStopMode:00000000 HAL_UARTEx_EnableStopMode
+ /tmp/ccIzO3xY.s:716 .text.HAL_UARTEx_DisableStopMode:00000000 $t
+ /tmp/ccIzO3xY.s:722 .text.HAL_UARTEx_DisableStopMode:00000000 HAL_UARTEx_DisableStopMode
+ /tmp/ccIzO3xY.s:814 .text.HAL_UARTEx_ReceiveToIdle:00000000 $t
+ /tmp/ccIzO3xY.s:820 .text.HAL_UARTEx_ReceiveToIdle:00000000 HAL_UARTEx_ReceiveToIdle
+ /tmp/ccIzO3xY.s:1134 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 $t
+ /tmp/ccIzO3xY.s:1140 .text.HAL_UARTEx_ReceiveToIdle_IT:00000000 HAL_UARTEx_ReceiveToIdle_IT
+ /tmp/ccIzO3xY.s:1276 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 $t
+ /tmp/ccIzO3xY.s:1282 .text.HAL_UARTEx_ReceiveToIdle_DMA:00000000 HAL_UARTEx_ReceiveToIdle_DMA
+ /tmp/ccIzO3xY.s:1418 .text.HAL_UARTEx_GetRxEventType:00000000 $t
+ /tmp/ccIzO3xY.s:1424 .text.HAL_UARTEx_GetRxEventType:00000000 HAL_UARTEx_GetRxEventType
UNDEFINED SYMBOLS
UART_SetConfig
diff --git a/build/stm32f7xx_it.d b/build/stm32f7xx_it.d
index f98b74b..21a6f73 100644
--- a/build/stm32f7xx_it.d
+++ b/build/stm32f7xx_it.d
@@ -42,7 +42,8 @@ build/stm32f7xx_it.o: Src/stm32f7xx_it.c Inc/main.h \
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h \
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h \
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h \
- Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h Inc/stm32f7xx_it.h
+ Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h Inc/stm32f7xx_it.h \
+ App/Core/app_core.h App/Models/app_types.h
Inc/main.h:
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h:
Inc/stm32f7xx_hal_conf.h:
@@ -91,3 +92,5 @@ Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h:
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h:
Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h:
Inc/stm32f7xx_it.h:
+App/Core/app_core.h:
+App/Models/app_types.h:
diff --git a/build/stm32f7xx_it.lst b/build/stm32f7xx_it.lst
index c4ada4c..73f30d6 100644
--- a/build/stm32f7xx_it.lst
+++ b/build/stm32f7xx_it.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccMf3LkY.s page 1
+ARM GAS /tmp/ccnmuCkZ.s page 1
1 .cpu cortex-m7
@@ -51,86 +51,76 @@ ARM GAS /tmp/ccMf3LkY.s page 1
22:Src/stm32f7xx_it.c **** #include "stm32f7xx_it.h"
23:Src/stm32f7xx_it.c **** /* Private includes ----------------------------------------------------------*/
24:Src/stm32f7xx_it.c **** /* USER CODE BEGIN Includes */
- 25:Src/stm32f7xx_it.c **** /* USER CODE END Includes */
- 26:Src/stm32f7xx_it.c ****
- 27:Src/stm32f7xx_it.c **** /* Private typedef -----------------------------------------------------------*/
- 28:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TD */
- 29:Src/stm32f7xx_it.c ****
- 30:Src/stm32f7xx_it.c **** /* USER CODE END TD */
- 31:Src/stm32f7xx_it.c ****
- ARM GAS /tmp/ccMf3LkY.s page 2
+ 25:Src/stm32f7xx_it.c **** #include "app_core.h"
+ 26:Src/stm32f7xx_it.c **** /* USER CODE END Includes */
+ 27:Src/stm32f7xx_it.c ****
+ 28:Src/stm32f7xx_it.c **** /* Private typedef -----------------------------------------------------------*/
+ 29:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TD */
+ 30:Src/stm32f7xx_it.c ****
+ 31:Src/stm32f7xx_it.c **** /* USER CODE END TD */
+ ARM GAS /tmp/ccnmuCkZ.s page 2
- 32:Src/stm32f7xx_it.c **** /* Private define ------------------------------------------------------------*/
- 33:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PD */
- 34:Src/stm32f7xx_it.c ****
- 35:Src/stm32f7xx_it.c **** /* USER CODE END PD */
- 36:Src/stm32f7xx_it.c ****
- 37:Src/stm32f7xx_it.c **** /* Private macro -------------------------------------------------------------*/
- 38:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PM */
- 39:Src/stm32f7xx_it.c ****
- 40:Src/stm32f7xx_it.c **** /* USER CODE END PM */
- 41:Src/stm32f7xx_it.c ****
- 42:Src/stm32f7xx_it.c **** /* Private variables ---------------------------------------------------------*/
- 43:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PV */
- 44:Src/stm32f7xx_it.c **** extern uint32_t TO6, TO7, TO6_uart, TO10, TO10_counter;
- 45:Src/stm32f7xx_it.c **** extern uint16_t UART_rec_incr, UART_header, COMMAND[CL_16];
- 46:Src/stm32f7xx_it.c **** extern uint8_t uart_buf, flg_tmt, CPU_state, State_Data[2], UART_transmission_request, u_tx_flg, T
- 47:Src/stm32f7xx_it.c **** extern task_t task;
- 48:Src/stm32f7xx_it.c **** extern task_state;
- 49:Src/stm32f7xx_it.c **** extern LD_Blinker_StateTypeDef LD_blinker;
- 50:Src/stm32f7xx_it.c **** /* USER CODE END PV */
- 51:Src/stm32f7xx_it.c ****
- 52:Src/stm32f7xx_it.c **** /* Private function prototypes -----------------------------------------------*/
- 53:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PFP */
- 54:Src/stm32f7xx_it.c **** void UART_RxCpltCallback(void);
- 55:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void);
- 56:Src/stm32f7xx_it.c **** /* USER CODE END PFP */
- 57:Src/stm32f7xx_it.c ****
- 58:Src/stm32f7xx_it.c **** /* Private user code ---------------------------------------------------------*/
- 59:Src/stm32f7xx_it.c **** /* USER CODE BEGIN 0 */
+ 32:Src/stm32f7xx_it.c ****
+ 33:Src/stm32f7xx_it.c **** /* Private define ------------------------------------------------------------*/
+ 34:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PD */
+ 35:Src/stm32f7xx_it.c ****
+ 36:Src/stm32f7xx_it.c **** /* USER CODE END PD */
+ 37:Src/stm32f7xx_it.c ****
+ 38:Src/stm32f7xx_it.c **** /* Private macro -------------------------------------------------------------*/
+ 39:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PM */
+ 40:Src/stm32f7xx_it.c ****
+ 41:Src/stm32f7xx_it.c **** /* USER CODE END PM */
+ 42:Src/stm32f7xx_it.c ****
+ 43:Src/stm32f7xx_it.c **** /* Private variables ---------------------------------------------------------*/
+ 44:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PV */
+ 45:Src/stm32f7xx_it.c **** /* USER CODE END PV */
+ 46:Src/stm32f7xx_it.c ****
+ 47:Src/stm32f7xx_it.c **** /* Private function prototypes -----------------------------------------------*/
+ 48:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PFP */
+ 49:Src/stm32f7xx_it.c **** /* USER CODE END PFP */
+ 50:Src/stm32f7xx_it.c ****
+ 51:Src/stm32f7xx_it.c **** /* Private user code ---------------------------------------------------------*/
+ 52:Src/stm32f7xx_it.c **** /* USER CODE BEGIN 0 */
+ 53:Src/stm32f7xx_it.c ****
+ 54:Src/stm32f7xx_it.c **** /* USER CODE END 0 */
+ 55:Src/stm32f7xx_it.c ****
+ 56:Src/stm32f7xx_it.c **** /* External variables --------------------------------------------------------*/
+ 57:Src/stm32f7xx_it.c **** extern ADC_HandleTypeDef hadc1;
+ 58:Src/stm32f7xx_it.c **** extern ADC_HandleTypeDef hadc3;
+ 59:Src/stm32f7xx_it.c **** /* USER CODE BEGIN EV */
60:Src/stm32f7xx_it.c ****
- 61:Src/stm32f7xx_it.c **** /* USER CODE END 0 */
+ 61:Src/stm32f7xx_it.c **** /* USER CODE END EV */
62:Src/stm32f7xx_it.c ****
- 63:Src/stm32f7xx_it.c **** /* External variables --------------------------------------------------------*/
- 64:Src/stm32f7xx_it.c **** extern ADC_HandleTypeDef hadc1;
- 65:Src/stm32f7xx_it.c **** extern ADC_HandleTypeDef hadc3;
- 66:Src/stm32f7xx_it.c **** extern TIM_HandleTypeDef htim8;
- 67:Src/stm32f7xx_it.c **** extern TIM_HandleTypeDef htim10;
- 68:Src/stm32f7xx_it.c **** extern TIM_HandleTypeDef htim11;
- 69:Src/stm32f7xx_it.c **** /* USER CODE BEGIN EV */
- 70:Src/stm32f7xx_it.c ****
- 71:Src/stm32f7xx_it.c **** /* USER CODE END EV */
- 72:Src/stm32f7xx_it.c ****
- 73:Src/stm32f7xx_it.c **** /******************************************************************************/
- 74:Src/stm32f7xx_it.c **** /* Cortex-M7 Processor Interruption and Exception Handlers */
- 75:Src/stm32f7xx_it.c **** /******************************************************************************/
- 76:Src/stm32f7xx_it.c **** /**
- 77:Src/stm32f7xx_it.c **** * @brief This function handles Non maskable interrupt.
- 78:Src/stm32f7xx_it.c **** */
- 79:Src/stm32f7xx_it.c **** void NMI_Handler(void)
- 80:Src/stm32f7xx_it.c **** {
- 28 .loc 1 80 1 view -0
+ 63:Src/stm32f7xx_it.c **** /******************************************************************************/
+ 64:Src/stm32f7xx_it.c **** /* Cortex-M7 Processor Interruption and Exception Handlers */
+ 65:Src/stm32f7xx_it.c **** /******************************************************************************/
+ 66:Src/stm32f7xx_it.c **** /**
+ 67:Src/stm32f7xx_it.c **** * @brief This function handles Non maskable interrupt.
+ 68:Src/stm32f7xx_it.c **** */
+ 69:Src/stm32f7xx_it.c **** void NMI_Handler(void)
+ 70:Src/stm32f7xx_it.c **** {
+ 28 .loc 1 70 1 view -0
29 .cfi_startproc
30 @ Volatile: function does not return.
31 @ args = 0, pretend = 0, frame = 0
32 @ frame_needed = 0, uses_anonymous_args = 0
33 @ link register save eliminated.
34 .L2:
- 81:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
- ARM GAS /tmp/ccMf3LkY.s page 3
+ 71:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 0 */
+ 72:Src/stm32f7xx_it.c ****
+ 73:Src/stm32f7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
+ 74:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
+ 75:Src/stm32f7xx_it.c **** while (1)
+ 35 .loc 1 75 3 view .LVU1
+ 76:Src/stm32f7xx_it.c **** {
+ 77:Src/stm32f7xx_it.c **** }
+ 36 .loc 1 77 3 view .LVU2
+ 75:Src/stm32f7xx_it.c **** {
+ 37 .loc 1 75 9 view .LVU3
+ ARM GAS /tmp/ccnmuCkZ.s page 3
- 82:Src/stm32f7xx_it.c ****
- 83:Src/stm32f7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 0 */
- 84:Src/stm32f7xx_it.c **** /* USER CODE BEGIN NonMaskableInt_IRQn 1 */
- 85:Src/stm32f7xx_it.c **** while (1)
- 35 .loc 1 85 3 view .LVU1
- 86:Src/stm32f7xx_it.c **** {
- 87:Src/stm32f7xx_it.c **** }
- 36 .loc 1 87 3 view .LVU2
- 85:Src/stm32f7xx_it.c **** {
- 37 .loc 1 85 9 view .LVU3
38 0000 FEE7 b .L2
39 .cfi_endproc
40 .LFE1183:
@@ -142,33 +132,33 @@ ARM GAS /tmp/ccMf3LkY.s page 1
47 .thumb_func
49 HardFault_Handler:
50 .LFB1184:
- 88:Src/stm32f7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
- 89:Src/stm32f7xx_it.c **** }
- 90:Src/stm32f7xx_it.c ****
- 91:Src/stm32f7xx_it.c **** /**
- 92:Src/stm32f7xx_it.c **** * @brief This function handles Hard fault interrupt.
- 93:Src/stm32f7xx_it.c **** */
- 94:Src/stm32f7xx_it.c **** void HardFault_Handler(void)
- 95:Src/stm32f7xx_it.c **** {
- 51 .loc 1 95 1 view -0
+ 78:Src/stm32f7xx_it.c **** /* USER CODE END NonMaskableInt_IRQn 1 */
+ 79:Src/stm32f7xx_it.c **** }
+ 80:Src/stm32f7xx_it.c ****
+ 81:Src/stm32f7xx_it.c **** /**
+ 82:Src/stm32f7xx_it.c **** * @brief This function handles Hard fault interrupt.
+ 83:Src/stm32f7xx_it.c **** */
+ 84:Src/stm32f7xx_it.c **** void HardFault_Handler(void)
+ 85:Src/stm32f7xx_it.c **** {
+ 51 .loc 1 85 1 view -0
52 .cfi_startproc
53 @ Volatile: function does not return.
54 @ args = 0, pretend = 0, frame = 0
55 @ frame_needed = 0, uses_anonymous_args = 0
56 @ link register save eliminated.
57 .L4:
- 96:Src/stm32f7xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
- 97:Src/stm32f7xx_it.c ****
- 98:Src/stm32f7xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
- 99:Src/stm32f7xx_it.c **** while (1)
- 58 .loc 1 99 3 view .LVU5
- 100:Src/stm32f7xx_it.c **** {
- 101:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
- 102:Src/stm32f7xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
- 103:Src/stm32f7xx_it.c **** }
- 59 .loc 1 103 3 view .LVU6
- 99:Src/stm32f7xx_it.c **** {
- 60 .loc 1 99 9 view .LVU7
+ 86:Src/stm32f7xx_it.c **** /* USER CODE BEGIN HardFault_IRQn 0 */
+ 87:Src/stm32f7xx_it.c ****
+ 88:Src/stm32f7xx_it.c **** /* USER CODE END HardFault_IRQn 0 */
+ 89:Src/stm32f7xx_it.c **** while (1)
+ 58 .loc 1 89 3 view .LVU5
+ 90:Src/stm32f7xx_it.c **** {
+ 91:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_HardFault_IRQn 0 */
+ 92:Src/stm32f7xx_it.c **** /* USER CODE END W1_HardFault_IRQn 0 */
+ 93:Src/stm32f7xx_it.c **** }
+ 59 .loc 1 93 3 view .LVU6
+ 89:Src/stm32f7xx_it.c **** {
+ 60 .loc 1 89 9 view .LVU7
61 0000 FEE7 b .L4
62 .cfi_endproc
63 .LFE1184:
@@ -178,37 +168,37 @@ ARM GAS /tmp/ccMf3LkY.s page 1
68 .syntax unified
69 .thumb
70 .thumb_func
- ARM GAS /tmp/ccMf3LkY.s page 4
-
-
72 MemManage_Handler:
73 .LFB1185:
- 104:Src/stm32f7xx_it.c **** }
- 105:Src/stm32f7xx_it.c ****
- 106:Src/stm32f7xx_it.c **** /**
- 107:Src/stm32f7xx_it.c **** * @brief This function handles Memory management fault.
- 108:Src/stm32f7xx_it.c **** */
- 109:Src/stm32f7xx_it.c **** void MemManage_Handler(void)
- 110:Src/stm32f7xx_it.c **** {
- 74 .loc 1 110 1 view -0
+ 94:Src/stm32f7xx_it.c **** }
+ 95:Src/stm32f7xx_it.c ****
+ 96:Src/stm32f7xx_it.c **** /**
+ 97:Src/stm32f7xx_it.c **** * @brief This function handles Memory management fault.
+ 98:Src/stm32f7xx_it.c **** */
+ 99:Src/stm32f7xx_it.c **** void MemManage_Handler(void)
+ 100:Src/stm32f7xx_it.c **** {
+ 74 .loc 1 100 1 view -0
+ ARM GAS /tmp/ccnmuCkZ.s page 4
+
+
75 .cfi_startproc
76 @ Volatile: function does not return.
77 @ args = 0, pretend = 0, frame = 0
78 @ frame_needed = 0, uses_anonymous_args = 0
79 @ link register save eliminated.
80 .L6:
- 111:Src/stm32f7xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
- 112:Src/stm32f7xx_it.c ****
- 113:Src/stm32f7xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
- 114:Src/stm32f7xx_it.c **** while (1)
- 81 .loc 1 114 3 view .LVU9
- 115:Src/stm32f7xx_it.c **** {
- 116:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
- 117:Src/stm32f7xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
- 118:Src/stm32f7xx_it.c **** }
- 82 .loc 1 118 3 view .LVU10
- 114:Src/stm32f7xx_it.c **** {
- 83 .loc 1 114 9 view .LVU11
+ 101:Src/stm32f7xx_it.c **** /* USER CODE BEGIN MemoryManagement_IRQn 0 */
+ 102:Src/stm32f7xx_it.c ****
+ 103:Src/stm32f7xx_it.c **** /* USER CODE END MemoryManagement_IRQn 0 */
+ 104:Src/stm32f7xx_it.c **** while (1)
+ 81 .loc 1 104 3 view .LVU9
+ 105:Src/stm32f7xx_it.c **** {
+ 106:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
+ 107:Src/stm32f7xx_it.c **** /* USER CODE END W1_MemoryManagement_IRQn 0 */
+ 108:Src/stm32f7xx_it.c **** }
+ 82 .loc 1 108 3 view .LVU10
+ 104:Src/stm32f7xx_it.c **** {
+ 83 .loc 1 104 9 view .LVU11
84 0000 FEE7 b .L6
85 .cfi_endproc
86 .LFE1185:
@@ -220,37 +210,37 @@ ARM GAS /tmp/ccMf3LkY.s page 1
93 .thumb_func
95 BusFault_Handler:
96 .LFB1186:
- 119:Src/stm32f7xx_it.c **** }
- 120:Src/stm32f7xx_it.c ****
- 121:Src/stm32f7xx_it.c **** /**
- 122:Src/stm32f7xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
- 123:Src/stm32f7xx_it.c **** */
- 124:Src/stm32f7xx_it.c **** void BusFault_Handler(void)
- 125:Src/stm32f7xx_it.c **** {
- 97 .loc 1 125 1 view -0
+ 109:Src/stm32f7xx_it.c **** }
+ 110:Src/stm32f7xx_it.c ****
+ 111:Src/stm32f7xx_it.c **** /**
+ 112:Src/stm32f7xx_it.c **** * @brief This function handles Pre-fetch fault, memory access fault.
+ 113:Src/stm32f7xx_it.c **** */
+ 114:Src/stm32f7xx_it.c **** void BusFault_Handler(void)
+ 115:Src/stm32f7xx_it.c **** {
+ 97 .loc 1 115 1 view -0
98 .cfi_startproc
99 @ Volatile: function does not return.
100 @ args = 0, pretend = 0, frame = 0
101 @ frame_needed = 0, uses_anonymous_args = 0
102 @ link register save eliminated.
103 .L8:
- 126:Src/stm32f7xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
- 127:Src/stm32f7xx_it.c ****
- 128:Src/stm32f7xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
- 129:Src/stm32f7xx_it.c **** while (1)
- ARM GAS /tmp/ccMf3LkY.s page 5
-
-
- 104 .loc 1 129 3 view .LVU13
- 130:Src/stm32f7xx_it.c **** {
- 131:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
- 132:Src/stm32f7xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
- 133:Src/stm32f7xx_it.c **** }
- 105 .loc 1 133 3 view .LVU14
- 129:Src/stm32f7xx_it.c **** {
- 106 .loc 1 129 9 view .LVU15
+ 116:Src/stm32f7xx_it.c **** /* USER CODE BEGIN BusFault_IRQn 0 */
+ 117:Src/stm32f7xx_it.c ****
+ 118:Src/stm32f7xx_it.c **** /* USER CODE END BusFault_IRQn 0 */
+ 119:Src/stm32f7xx_it.c **** while (1)
+ 104 .loc 1 119 3 view .LVU13
+ 120:Src/stm32f7xx_it.c **** {
+ 121:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_BusFault_IRQn 0 */
+ 122:Src/stm32f7xx_it.c **** /* USER CODE END W1_BusFault_IRQn 0 */
+ 123:Src/stm32f7xx_it.c **** }
+ 105 .loc 1 123 3 view .LVU14
+ 119:Src/stm32f7xx_it.c **** {
+ 106 .loc 1 119 9 view .LVU15
107 0000 FEE7 b .L8
108 .cfi_endproc
+ ARM GAS /tmp/ccnmuCkZ.s page 5
+
+
109 .LFE1186:
111 .section .text.UsageFault_Handler,"ax",%progbits
112 .align 1
@@ -260,32 +250,32 @@ ARM GAS /tmp/ccMf3LkY.s page 1
116 .thumb_func
118 UsageFault_Handler:
119 .LFB1187:
- 134:Src/stm32f7xx_it.c **** }
- 135:Src/stm32f7xx_it.c ****
- 136:Src/stm32f7xx_it.c **** /**
- 137:Src/stm32f7xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
- 138:Src/stm32f7xx_it.c **** */
- 139:Src/stm32f7xx_it.c **** void UsageFault_Handler(void)
- 140:Src/stm32f7xx_it.c **** {
- 120 .loc 1 140 1 view -0
+ 124:Src/stm32f7xx_it.c **** }
+ 125:Src/stm32f7xx_it.c ****
+ 126:Src/stm32f7xx_it.c **** /**
+ 127:Src/stm32f7xx_it.c **** * @brief This function handles Undefined instruction or illegal state.
+ 128:Src/stm32f7xx_it.c **** */
+ 129:Src/stm32f7xx_it.c **** void UsageFault_Handler(void)
+ 130:Src/stm32f7xx_it.c **** {
+ 120 .loc 1 130 1 view -0
121 .cfi_startproc
122 @ Volatile: function does not return.
123 @ args = 0, pretend = 0, frame = 0
124 @ frame_needed = 0, uses_anonymous_args = 0
125 @ link register save eliminated.
126 .L10:
- 141:Src/stm32f7xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
- 142:Src/stm32f7xx_it.c ****
- 143:Src/stm32f7xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
- 144:Src/stm32f7xx_it.c **** while (1)
- 127 .loc 1 144 3 view .LVU17
- 145:Src/stm32f7xx_it.c **** {
- 146:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
- 147:Src/stm32f7xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
- 148:Src/stm32f7xx_it.c **** }
- 128 .loc 1 148 3 view .LVU18
- 144:Src/stm32f7xx_it.c **** {
- 129 .loc 1 144 9 view .LVU19
+ 131:Src/stm32f7xx_it.c **** /* USER CODE BEGIN UsageFault_IRQn 0 */
+ 132:Src/stm32f7xx_it.c ****
+ 133:Src/stm32f7xx_it.c **** /* USER CODE END UsageFault_IRQn 0 */
+ 134:Src/stm32f7xx_it.c **** while (1)
+ 127 .loc 1 134 3 view .LVU17
+ 135:Src/stm32f7xx_it.c **** {
+ 136:Src/stm32f7xx_it.c **** /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
+ 137:Src/stm32f7xx_it.c **** /* USER CODE END W1_UsageFault_IRQn 0 */
+ 138:Src/stm32f7xx_it.c **** }
+ 128 .loc 1 138 3 view .LVU18
+ 134:Src/stm32f7xx_it.c **** {
+ 129 .loc 1 134 9 view .LVU19
130 0000 FEE7 b .L10
131 .cfi_endproc
132 .LFE1187:
@@ -297,29 +287,29 @@ ARM GAS /tmp/ccMf3LkY.s page 1
139 .thumb_func
141 SVC_Handler:
142 .LFB1188:
- 149:Src/stm32f7xx_it.c **** }
- ARM GAS /tmp/ccMf3LkY.s page 6
-
-
- 150:Src/stm32f7xx_it.c ****
- 151:Src/stm32f7xx_it.c **** /**
- 152:Src/stm32f7xx_it.c **** * @brief This function handles System service call via SWI instruction.
- 153:Src/stm32f7xx_it.c **** */
- 154:Src/stm32f7xx_it.c **** void SVC_Handler(void)
- 155:Src/stm32f7xx_it.c **** {
- 143 .loc 1 155 1 view -0
+ 139:Src/stm32f7xx_it.c **** }
+ 140:Src/stm32f7xx_it.c ****
+ 141:Src/stm32f7xx_it.c **** /**
+ 142:Src/stm32f7xx_it.c **** * @brief This function handles System service call via SWI instruction.
+ 143:Src/stm32f7xx_it.c **** */
+ 144:Src/stm32f7xx_it.c **** void SVC_Handler(void)
+ 145:Src/stm32f7xx_it.c **** {
+ 143 .loc 1 145 1 view -0
144 .cfi_startproc
145 @ args = 0, pretend = 0, frame = 0
146 @ frame_needed = 0, uses_anonymous_args = 0
+ ARM GAS /tmp/ccnmuCkZ.s page 6
+
+
147 @ link register save eliminated.
- 156:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
- 157:Src/stm32f7xx_it.c ****
- 158:Src/stm32f7xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
- 159:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
- 160:Src/stm32f7xx_it.c ****
- 161:Src/stm32f7xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
- 162:Src/stm32f7xx_it.c **** }
- 148 .loc 1 162 1 view .LVU21
+ 146:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 0 */
+ 147:Src/stm32f7xx_it.c ****
+ 148:Src/stm32f7xx_it.c **** /* USER CODE END SVCall_IRQn 0 */
+ 149:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SVCall_IRQn 1 */
+ 150:Src/stm32f7xx_it.c ****
+ 151:Src/stm32f7xx_it.c **** /* USER CODE END SVCall_IRQn 1 */
+ 152:Src/stm32f7xx_it.c **** }
+ 148 .loc 1 152 1 view .LVU21
149 0000 7047 bx lr
150 .cfi_endproc
151 .LFE1188:
@@ -331,25 +321,25 @@ ARM GAS /tmp/ccMf3LkY.s page 1
158 .thumb_func
160 DebugMon_Handler:
161 .LFB1189:
- 163:Src/stm32f7xx_it.c ****
- 164:Src/stm32f7xx_it.c **** /**
- 165:Src/stm32f7xx_it.c **** * @brief This function handles Debug monitor.
- 166:Src/stm32f7xx_it.c **** */
- 167:Src/stm32f7xx_it.c **** void DebugMon_Handler(void)
- 168:Src/stm32f7xx_it.c **** {
- 162 .loc 1 168 1 view -0
+ 153:Src/stm32f7xx_it.c ****
+ 154:Src/stm32f7xx_it.c **** /**
+ 155:Src/stm32f7xx_it.c **** * @brief This function handles Debug monitor.
+ 156:Src/stm32f7xx_it.c **** */
+ 157:Src/stm32f7xx_it.c **** void DebugMon_Handler(void)
+ 158:Src/stm32f7xx_it.c **** {
+ 162 .loc 1 158 1 view -0
163 .cfi_startproc
164 @ args = 0, pretend = 0, frame = 0
165 @ frame_needed = 0, uses_anonymous_args = 0
166 @ link register save eliminated.
- 169:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
- 170:Src/stm32f7xx_it.c ****
- 171:Src/stm32f7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
- 172:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
- 173:Src/stm32f7xx_it.c ****
- 174:Src/stm32f7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
- 175:Src/stm32f7xx_it.c **** }
- 167 .loc 1 175 1 view .LVU23
+ 159:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 0 */
+ 160:Src/stm32f7xx_it.c ****
+ 161:Src/stm32f7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 0 */
+ 162:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DebugMonitor_IRQn 1 */
+ 163:Src/stm32f7xx_it.c ****
+ 164:Src/stm32f7xx_it.c **** /* USER CODE END DebugMonitor_IRQn 1 */
+ 165:Src/stm32f7xx_it.c **** }
+ 167 .loc 1 165 1 view .LVU23
168 0000 7047 bx lr
169 .cfi_endproc
170 .LFE1189:
@@ -358,31 +348,31 @@ ARM GAS /tmp/ccMf3LkY.s page 1
174 .global PendSV_Handler
175 .syntax unified
176 .thumb
- ARM GAS /tmp/ccMf3LkY.s page 7
-
-
177 .thumb_func
179 PendSV_Handler:
180 .LFB1190:
- 176:Src/stm32f7xx_it.c ****
- 177:Src/stm32f7xx_it.c **** /**
- 178:Src/stm32f7xx_it.c **** * @brief This function handles Pendable request for system service.
- 179:Src/stm32f7xx_it.c **** */
- 180:Src/stm32f7xx_it.c **** void PendSV_Handler(void)
- 181:Src/stm32f7xx_it.c **** {
- 181 .loc 1 181 1 view -0
+ 166:Src/stm32f7xx_it.c ****
+ 167:Src/stm32f7xx_it.c **** /**
+ 168:Src/stm32f7xx_it.c **** * @brief This function handles Pendable request for system service.
+ 169:Src/stm32f7xx_it.c **** */
+ 170:Src/stm32f7xx_it.c **** void PendSV_Handler(void)
+ 171:Src/stm32f7xx_it.c **** {
+ 181 .loc 1 171 1 view -0
+ ARM GAS /tmp/ccnmuCkZ.s page 7
+
+
182 .cfi_startproc
183 @ args = 0, pretend = 0, frame = 0
184 @ frame_needed = 0, uses_anonymous_args = 0
185 @ link register save eliminated.
- 182:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
- 183:Src/stm32f7xx_it.c ****
- 184:Src/stm32f7xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
- 185:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
- 186:Src/stm32f7xx_it.c ****
- 187:Src/stm32f7xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
- 188:Src/stm32f7xx_it.c **** }
- 186 .loc 1 188 1 view .LVU25
+ 172:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 0 */
+ 173:Src/stm32f7xx_it.c ****
+ 174:Src/stm32f7xx_it.c **** /* USER CODE END PendSV_IRQn 0 */
+ 175:Src/stm32f7xx_it.c **** /* USER CODE BEGIN PendSV_IRQn 1 */
+ 176:Src/stm32f7xx_it.c ****
+ 177:Src/stm32f7xx_it.c **** /* USER CODE END PendSV_IRQn 1 */
+ 178:Src/stm32f7xx_it.c **** }
+ 186 .loc 1 178 1 view .LVU25
187 0000 7047 bx lr
188 .cfi_endproc
189 .LFE1190:
@@ -394,13 +384,13 @@ ARM GAS /tmp/ccMf3LkY.s page 1
196 .thumb_func
198 SysTick_Handler:
199 .LFB1191:
- 189:Src/stm32f7xx_it.c ****
- 190:Src/stm32f7xx_it.c **** /**
- 191:Src/stm32f7xx_it.c **** * @brief This function handles System tick timer.
- 192:Src/stm32f7xx_it.c **** */
- 193:Src/stm32f7xx_it.c **** void SysTick_Handler(void)
- 194:Src/stm32f7xx_it.c **** {
- 200 .loc 1 194 1 view -0
+ 179:Src/stm32f7xx_it.c ****
+ 180:Src/stm32f7xx_it.c **** /**
+ 181:Src/stm32f7xx_it.c **** * @brief This function handles System tick timer.
+ 182:Src/stm32f7xx_it.c **** */
+ 183:Src/stm32f7xx_it.c **** void SysTick_Handler(void)
+ 184:Src/stm32f7xx_it.c **** {
+ 200 .loc 1 184 1 view -0
201 .cfi_startproc
202 @ args = 0, pretend = 0, frame = 0
203 @ frame_needed = 0, uses_anonymous_args = 0
@@ -409,21 +399,18 @@ ARM GAS /tmp/ccMf3LkY.s page 1
206 .cfi_def_cfa_offset 8
207 .cfi_offset 3, -8
208 .cfi_offset 14, -4
- 195:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
- 196:Src/stm32f7xx_it.c ****
- 197:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
- 198:Src/stm32f7xx_it.c **** HAL_IncTick();
- 209 .loc 1 198 3 view .LVU27
+ 185:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 0 */
+ 186:Src/stm32f7xx_it.c ****
+ 187:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 0 */
+ 188:Src/stm32f7xx_it.c **** HAL_IncTick();
+ 209 .loc 1 188 3 view .LVU27
210 0002 FFF7FEFF bl HAL_IncTick
211 .LVL0:
- 199:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
- 200:Src/stm32f7xx_it.c ****
- ARM GAS /tmp/ccMf3LkY.s page 8
-
-
- 201:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
- 202:Src/stm32f7xx_it.c **** }
- 212 .loc 1 202 1 is_stmt 0 view .LVU28
+ 189:Src/stm32f7xx_it.c **** /* USER CODE BEGIN SysTick_IRQn 1 */
+ 190:Src/stm32f7xx_it.c ****
+ 191:Src/stm32f7xx_it.c **** /* USER CODE END SysTick_IRQn 1 */
+ 192:Src/stm32f7xx_it.c **** }
+ 212 .loc 1 192 1 is_stmt 0 view .LVU28
213 0006 08BD pop {r3, pc}
214 .cfi_endproc
215 .LFE1191:
@@ -431,24 +418,27 @@ ARM GAS /tmp/ccMf3LkY.s page 1
218 .align 1
219 .global ADC_IRQHandler
220 .syntax unified
+ ARM GAS /tmp/ccnmuCkZ.s page 8
+
+
221 .thumb
222 .thumb_func
224 ADC_IRQHandler:
225 .LFB1192:
- 203:Src/stm32f7xx_it.c ****
- 204:Src/stm32f7xx_it.c **** /******************************************************************************/
- 205:Src/stm32f7xx_it.c **** /* STM32F7xx Peripheral Interrupt Handlers */
- 206:Src/stm32f7xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
- 207:Src/stm32f7xx_it.c **** /* For the available peripheral interrupt handler names, */
- 208:Src/stm32f7xx_it.c **** /* please refer to the startup file (startup_stm32f7xx.s). */
- 209:Src/stm32f7xx_it.c **** /******************************************************************************/
- 210:Src/stm32f7xx_it.c ****
- 211:Src/stm32f7xx_it.c **** /**
- 212:Src/stm32f7xx_it.c **** * @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
- 213:Src/stm32f7xx_it.c **** */
- 214:Src/stm32f7xx_it.c **** void ADC_IRQHandler(void)
- 215:Src/stm32f7xx_it.c **** {
- 226 .loc 1 215 1 is_stmt 1 view -0
+ 193:Src/stm32f7xx_it.c ****
+ 194:Src/stm32f7xx_it.c **** /******************************************************************************/
+ 195:Src/stm32f7xx_it.c **** /* STM32F7xx Peripheral Interrupt Handlers */
+ 196:Src/stm32f7xx_it.c **** /* Add here the Interrupt Handlers for the used peripherals. */
+ 197:Src/stm32f7xx_it.c **** /* For the available peripheral interrupt handler names, */
+ 198:Src/stm32f7xx_it.c **** /* please refer to the startup file (startup_stm32f7xx.s). */
+ 199:Src/stm32f7xx_it.c **** /******************************************************************************/
+ 200:Src/stm32f7xx_it.c ****
+ 201:Src/stm32f7xx_it.c **** /**
+ 202:Src/stm32f7xx_it.c **** * @brief This function handles ADC1, ADC2 and ADC3 global interrupts.
+ 203:Src/stm32f7xx_it.c **** */
+ 204:Src/stm32f7xx_it.c **** void ADC_IRQHandler(void)
+ 205:Src/stm32f7xx_it.c **** {
+ 226 .loc 1 205 1 is_stmt 1 view -0
227 .cfi_startproc
228 @ args = 0, pretend = 0, frame = 0
229 @ frame_needed = 0, uses_anonymous_args = 0
@@ -457,30 +447,27 @@ ARM GAS /tmp/ccMf3LkY.s page 1
232 .cfi_def_cfa_offset 8
233 .cfi_offset 3, -8
234 .cfi_offset 14, -4
- 216:Src/stm32f7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 0 */
- 217:Src/stm32f7xx_it.c ****
- 218:Src/stm32f7xx_it.c **** /* USER CODE END ADC_IRQn 0 */
- 219:Src/stm32f7xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
- 235 .loc 1 219 3 view .LVU30
+ 206:Src/stm32f7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 0 */
+ 207:Src/stm32f7xx_it.c ****
+ 208:Src/stm32f7xx_it.c **** /* USER CODE END ADC_IRQn 0 */
+ 209:Src/stm32f7xx_it.c **** HAL_ADC_IRQHandler(&hadc1);
+ 235 .loc 1 209 3 view .LVU30
236 0002 0348 ldr r0, .L18
237 0004 FFF7FEFF bl HAL_ADC_IRQHandler
238 .LVL1:
- 220:Src/stm32f7xx_it.c **** HAL_ADC_IRQHandler(&hadc3);
- 239 .loc 1 220 3 view .LVU31
+ 210:Src/stm32f7xx_it.c **** HAL_ADC_IRQHandler(&hadc3);
+ 239 .loc 1 210 3 view .LVU31
240 0008 0248 ldr r0, .L18+4
241 000a FFF7FEFF bl HAL_ADC_IRQHandler
242 .LVL2:
- 221:Src/stm32f7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 1 */
- 222:Src/stm32f7xx_it.c ****
- 223:Src/stm32f7xx_it.c **** /* USER CODE END ADC_IRQn 1 */
- 224:Src/stm32f7xx_it.c **** }
- 243 .loc 1 224 1 is_stmt 0 view .LVU32
+ 211:Src/stm32f7xx_it.c **** /* USER CODE BEGIN ADC_IRQn 1 */
+ 212:Src/stm32f7xx_it.c ****
+ 213:Src/stm32f7xx_it.c **** /* USER CODE END ADC_IRQn 1 */
+ 214:Src/stm32f7xx_it.c **** }
+ 243 .loc 1 214 1 is_stmt 0 view .LVU32
244 000e 08BD pop {r3, pc}
245 .L19:
246 .align 2
- ARM GAS /tmp/ccMf3LkY.s page 9
-
-
247 .L18:
248 0010 00000000 .word hadc1
249 0014 00000000 .word hadc3
@@ -491,4561 +478,133 @@ ARM GAS /tmp/ccMf3LkY.s page 1
255 .global TIM1_UP_TIM10_IRQHandler
256 .syntax unified
257 .thumb
+ ARM GAS /tmp/ccnmuCkZ.s page 9
+
+
258 .thumb_func
260 TIM1_UP_TIM10_IRQHandler:
261 .LFB1193:
- 225:Src/stm32f7xx_it.c ****
- 226:Src/stm32f7xx_it.c **** /**
- 227:Src/stm32f7xx_it.c **** * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
- 228:Src/stm32f7xx_it.c **** */
- 229:Src/stm32f7xx_it.c **** void TIM1_UP_TIM10_IRQHandler(void)
- 230:Src/stm32f7xx_it.c **** {
- 262 .loc 1 230 1 is_stmt 1 view -0
+ 215:Src/stm32f7xx_it.c ****
+ 216:Src/stm32f7xx_it.c **** /**
+ 217:Src/stm32f7xx_it.c **** * @brief This function handles TIM1 update interrupt and TIM10 global interrupt.
+ 218:Src/stm32f7xx_it.c **** */
+ 219:Src/stm32f7xx_it.c **** void TIM1_UP_TIM10_IRQHandler(void)
+ 220:Src/stm32f7xx_it.c **** {
+ 262 .loc 1 220 1 is_stmt 1 view -0
263 .cfi_startproc
264 @ args = 0, pretend = 0, frame = 0
265 @ frame_needed = 0, uses_anonymous_args = 0
- 266 0000 08B5 push {r3, lr}
- 267 .LCFI2:
- 268 .cfi_def_cfa_offset 8
- 269 .cfi_offset 3, -8
- 270 .cfi_offset 14, -4
- 231:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
- 232:Src/stm32f7xx_it.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current trigge
- 233:Src/stm32f7xx_it.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET);
- 234:Src/stm32f7xx_it.c **** TO10++;
- 271 .loc 1 234 2 view .LVU34
- 272 .loc 1 234 6 is_stmt 0 view .LVU35
- 273 0002 084A ldr r2, .L24
- 274 0004 1368 ldr r3, [r2]
- 275 0006 0133 adds r3, r3, #1
- 276 0008 1360 str r3, [r2]
- 235:Src/stm32f7xx_it.c **** if (TO10 == TO10_counter)
- 277 .loc 1 235 2 is_stmt 1 view .LVU36
- 278 .loc 1 235 11 is_stmt 0 view .LVU37
- 279 000a 074A ldr r2, .L24+4
- 280 000c 1268 ldr r2, [r2]
- 281 .loc 1 235 5 view .LVU38
- 282 000e 9342 cmp r3, r2
- 283 0010 03D0 beq .L23
- 284 .L21:
- 236:Src/stm32f7xx_it.c **** TIM10_coflag = 1;
- 237:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
- 238:Src/stm32f7xx_it.c **** HAL_TIM_IRQHandler(&htim10);
- 285 .loc 1 238 3 is_stmt 1 view .LVU39
- 286 0012 0648 ldr r0, .L24+8
- 287 0014 FFF7FEFF bl HAL_TIM_IRQHandler
- 288 .LVL3:
- 239:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
- 240:Src/stm32f7xx_it.c ****
- 241:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
- ARM GAS /tmp/ccMf3LkY.s page 10
-
-
- 242:Src/stm32f7xx_it.c **** }
- 289 .loc 1 242 1 is_stmt 0 view .LVU40
- 290 0018 08BD pop {r3, pc}
- 291 .L23:
- 236:Src/stm32f7xx_it.c **** TIM10_coflag = 1;
- 292 .loc 1 236 3 is_stmt 1 view .LVU41
- 236:Src/stm32f7xx_it.c **** TIM10_coflag = 1;
- 293 .loc 1 236 16 is_stmt 0 view .LVU42
- 294 001a 054B ldr r3, .L24+12
- 295 001c 0122 movs r2, #1
- 296 001e 1A70 strb r2, [r3]
- 297 0020 F7E7 b .L21
- 298 .L25:
- 299 0022 00BF .align 2
- 300 .L24:
- 301 0024 00000000 .word TO10
- 302 0028 00000000 .word TO10_counter
- 303 002c 00000000 .word htim10
- 304 0030 00000000 .word TIM10_coflag
- 305 .cfi_endproc
- 306 .LFE1193:
- 308 .section .text.TIM1_TRG_COM_TIM11_IRQHandler,"ax",%progbits
- 309 .align 1
- 310 .global TIM1_TRG_COM_TIM11_IRQHandler
- 311 .syntax unified
- 312 .thumb
- 313 .thumb_func
- 315 TIM1_TRG_COM_TIM11_IRQHandler:
- 316 .LFB1194:
- 243:Src/stm32f7xx_it.c ****
- 244:Src/stm32f7xx_it.c **** /**
- 245:Src/stm32f7xx_it.c **** * @brief This function handles TIM1 trigger and commutation interrupts and TIM11 global interrupt
- 246:Src/stm32f7xx_it.c **** */
- 247:Src/stm32f7xx_it.c **** void TIM1_TRG_COM_TIM11_IRQHandler(void)
- 248:Src/stm32f7xx_it.c **** {
- 317 .loc 1 248 1 is_stmt 1 view -0
- 318 .cfi_startproc
- 319 @ args = 0, pretend = 0, frame = 0
- 320 @ frame_needed = 0, uses_anonymous_args = 0
- 321 0000 08B5 push {r3, lr}
- 322 .LCFI3:
- 323 .cfi_def_cfa_offset 8
- 324 .cfi_offset 3, -8
- 325 .cfi_offset 14, -4
- 249:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */
- 250:Src/stm32f7xx_it.c **** TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEven
- 326 .loc 1 250 2 view .LVU44
- 327 .loc 1 250 8 is_stmt 0 view .LVU45
- 328 0002 094B ldr r3, .L28
- 329 0004 1A68 ldr r2, [r3]
- 330 .loc 1 250 15 view .LVU46
- 331 0006 42F00802 orr r2, r2, #8
- 332 000a 1A60 str r2, [r3]
- 251:Src/stm32f7xx_it.c **** TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next UpdateEvent
- 333 .loc 1 251 2 is_stmt 1 view .LVU47
- 334 .loc 1 251 7 is_stmt 0 view .LVU48
- 335 000c 0749 ldr r1, .L28+4
- ARM GAS /tmp/ccMf3LkY.s page 11
-
-
- 336 000e 0A68 ldr r2, [r1]
- 337 .loc 1 251 14 view .LVU49
- 338 0010 42F00802 orr r2, r2, #8
- 339 0014 0A60 str r2, [r1]
- 252:Src/stm32f7xx_it.c **** TIM11 -> DIER &= ~(1); //disable interrupt
- 340 .loc 1 252 2 is_stmt 1 view .LVU50
- 341 .loc 1 252 8 is_stmt 0 view .LVU51
- 342 0016 DA68 ldr r2, [r3, #12]
- 343 .loc 1 252 16 view .LVU52
- 344 0018 22F00102 bic r2, r2, #1
- 345 001c DA60 str r2, [r3, #12]
- 253:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
- 254:Src/stm32f7xx_it.c **** HAL_TIM_IRQHandler(&htim11);
- 346 .loc 1 254 3 is_stmt 1 view .LVU53
- 347 001e 0448 ldr r0, .L28+8
- 348 0020 FFF7FEFF bl HAL_TIM_IRQHandler
- 349 .LVL4:
- 255:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */
- 256:Src/stm32f7xx_it.c ****
- 257:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */
- 258:Src/stm32f7xx_it.c **** }
- 350 .loc 1 258 1 is_stmt 0 view .LVU54
- 351 0024 08BD pop {r3, pc}
- 352 .L29:
- 353 0026 00BF .align 2
- 354 .L28:
- 355 0028 00480140 .word 1073825792
- 356 002c 00080040 .word 1073743872
- 357 0030 00000000 .word htim11
- 358 .cfi_endproc
- 359 .LFE1194:
- 361 .section .text.TIM2_IRQHandler,"ax",%progbits
- 362 .align 1
- 363 .global TIM2_IRQHandler
- 364 .syntax unified
- 365 .thumb
- 366 .thumb_func
- 368 TIM2_IRQHandler:
- 369 .LFB1195:
- 259:Src/stm32f7xx_it.c ****
- 260:Src/stm32f7xx_it.c **** /**
- 261:Src/stm32f7xx_it.c **** * @brief This function handles TIM2 global interrupt.
- 262:Src/stm32f7xx_it.c **** */
- 263:Src/stm32f7xx_it.c **** void TIM2_IRQHandler(void)
- 264:Src/stm32f7xx_it.c **** {
- 370 .loc 1 264 1 is_stmt 1 view -0
- 371 .cfi_startproc
- 372 @ args = 0, pretend = 0, frame = 0
- 373 @ frame_needed = 0, uses_anonymous_args = 0
- 374 @ link register save eliminated.
- 265:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 0 */
- 266:Src/stm32f7xx_it.c ****
- 267:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 0 */
- 268:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 1 */
- 269:Src/stm32f7xx_it.c ****
- 270:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 1 */
- 271:Src/stm32f7xx_it.c **** }
- ARM GAS /tmp/ccMf3LkY.s page 12
-
-
- 375 .loc 1 271 1 view .LVU56
- 376 0000 7047 bx lr
- 377 .cfi_endproc
- 378 .LFE1195:
- 380 .section .text.TIM8_UP_TIM13_IRQHandler,"ax",%progbits
- 381 .align 1
- 382 .global TIM8_UP_TIM13_IRQHandler
- 383 .syntax unified
- 384 .thumb
- 385 .thumb_func
- 387 TIM8_UP_TIM13_IRQHandler:
- 388 .LFB1197:
- 272:Src/stm32f7xx_it.c ****
- 273:Src/stm32f7xx_it.c **** /**
- 274:Src/stm32f7xx_it.c **** * @brief This function handles USART1 global interrupt.
- 275:Src/stm32f7xx_it.c **** */
- 276:Src/stm32f7xx_it.c **** void USART1_IRQHandler(void)
- 277:Src/stm32f7xx_it.c **** {
- 278:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
- 279:Src/stm32f7xx_it.c **** volatile uint8_t temp;
- 280:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
- 281:Src/stm32f7xx_it.c **** {
- 282:Src/stm32f7xx_it.c **** UART_RxCpltCallback();
- 283:Src/stm32f7xx_it.c **** }
- 284:Src/stm32f7xx_it.c **** else
- 285:Src/stm32f7xx_it.c **** {
- 286:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_ORE(USART1))
- 287:Src/stm32f7xx_it.c **** {
- 288:Src/stm32f7xx_it.c **** //temp = USART1->RDR;
- 289:Src/stm32f7xx_it.c **** temp+= LL_USART_ReceiveData8(USART1);
- 290:Src/stm32f7xx_it.c **** }
- 291:Src/stm32f7xx_it.c **** else if(LL_USART_IsActiveFlag_FE(USART1))
- 292:Src/stm32f7xx_it.c **** {
- 293:Src/stm32f7xx_it.c **** //(void) USART1->RDR;
- 294:Src/stm32f7xx_it.c **** temp+= LL_USART_ReceiveData8(USART1);
- 295:Src/stm32f7xx_it.c **** }
- 296:Src/stm32f7xx_it.c **** else if(LL_USART_IsActiveFlag_NE(USART1))
- 297:Src/stm32f7xx_it.c **** {
- 298:Src/stm32f7xx_it.c **** //(void) USART1->RDR;
- 299:Src/stm32f7xx_it.c **** temp+= LL_USART_ReceiveData8(USART1);
- 300:Src/stm32f7xx_it.c **** }
- 301:Src/stm32f7xx_it.c **** else if(LL_USART_IsActiveFlag_PE(USART1))
- 302:Src/stm32f7xx_it.c **** {
- 303:Src/stm32f7xx_it.c **** //(void) USART1->RDR;
- 304:Src/stm32f7xx_it.c **** temp+= LL_USART_ReceiveData8(USART1);
- 305:Src/stm32f7xx_it.c **** }
- 306:Src/stm32f7xx_it.c **** else
- 307:Src/stm32f7xx_it.c **** {
- 308:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_TC(USART6) && LL_USART_IsEnabledIT_TC(USART6))
- 309:Src/stm32f7xx_it.c **** {
- 310:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_TC(USART1);
- 311:Src/stm32f7xx_it.c **** //test_counter += 1;
- 312:Src/stm32f7xx_it.c **** //if(UART_transmission_busy == 1){
- 313:Src/stm32f7xx_it.c **** LL_USART_DisableIT_TC(USART1);
- 314:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0;
- 315:Src/stm32f7xx_it.c **** }
- 316:Src/stm32f7xx_it.c **** }
- ARM GAS /tmp/ccMf3LkY.s page 13
-
-
- 317:Src/stm32f7xx_it.c **** }
- 318:Src/stm32f7xx_it.c ****
- 319:Src/stm32f7xx_it.c **** /* USER CODE END USART1_IRQn 0 */
- 320:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
- 321:Src/stm32f7xx_it.c ****
- 322:Src/stm32f7xx_it.c **** /* USER CODE END USART1_IRQn 1 */
- 323:Src/stm32f7xx_it.c **** }
- 324:Src/stm32f7xx_it.c ****
- 325:Src/stm32f7xx_it.c **** /**
- 326:Src/stm32f7xx_it.c **** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt.
- 327:Src/stm32f7xx_it.c **** */
- 328:Src/stm32f7xx_it.c **** void TIM8_UP_TIM13_IRQHandler(void)
- 329:Src/stm32f7xx_it.c **** {
- 389 .loc 1 329 1 view -0
- 390 .cfi_startproc
- 391 @ args = 0, pretend = 0, frame = 0
- 392 @ frame_needed = 0, uses_anonymous_args = 0
- 393 0000 10B5 push {r4, lr}
- 394 .LCFI4:
- 395 .cfi_def_cfa_offset 8
- 396 .cfi_offset 4, -8
- 397 .cfi_offset 14, -4
- 330:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
- 331:Src/stm32f7xx_it.c **** // HAL_GPIO_TogglePin(LD_blinker.signal_port, LD_blinker.signal_pin);
- 332:Src/stm32f7xx_it.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin);
- 333:Src/stm32f7xx_it.c **** //*
- 334:Src/stm32f7xx_it.c **** switch (LD_blinker.state) {
- 398 .loc 1 334 2 view .LVU58
- 399 .loc 1 334 20 is_stmt 0 view .LVU59
- 400 0002 114B ldr r3, .L36
- 401 0004 9B7A ldrb r3, [r3, #10] @ zero_extendqisi2
- 402 .loc 1 334 2 view .LVU60
- 403 0006 022B cmp r3, #2
- 404 0008 0ED0 beq .L32
- 405 000a 032B cmp r3, #3
- 406 000c 18D1 bne .L34
- 335:Src/stm32f7xx_it.c **** case 0: //no LD update required
- 336:Src/stm32f7xx_it.c **** break;
- 337:Src/stm32f7xx_it.c **** case 1: //LD ON, need update
- 338:Src/stm32f7xx_it.c **** //Set_LTEC(LD_blinker.task_type , LD_blinker.param);
- 339:Src/stm32f7xx_it.c **** //LD_blinker.state = 0;
- 340:Src/stm32f7xx_it.c **** break;
- 341:Src/stm32f7xx_it.c **** case 2: //set LD ON, blinking
- 342:Src/stm32f7xx_it.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param);
- 343:Src/stm32f7xx_it.c **** Set_LTEC(2 , LD_blinker.param);
- 344:Src/stm32f7xx_it.c **** HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_SET);
- 345:Src/stm32f7xx_it.c **** LD_blinker.state = 3;
- 346:Src/stm32f7xx_it.c **** break;
- 347:Src/stm32f7xx_it.c **** case 3: //set LD OFF, blinking
- 348:Src/stm32f7xx_it.c **** Set_LTEC(2 , 0);
- 407 .loc 1 348 4 is_stmt 1 view .LVU61
- 408 000e 0021 movs r1, #0
- 409 0010 0220 movs r0, #2
- 410 0012 FFF7FEFF bl Set_LTEC
- 411 .LVL5:
- 349:Src/stm32f7xx_it.c **** HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_RESET);
- 412 .loc 1 349 4 view .LVU62
- ARM GAS /tmp/ccMf3LkY.s page 14
-
-
- 413 0016 0C4C ldr r4, .L36
- 414 0018 0022 movs r2, #0
- 415 001a 6188 ldrh r1, [r4, #2]
- 416 001c 6068 ldr r0, [r4, #4]
- 417 001e FFF7FEFF bl HAL_GPIO_WritePin
- 418 .LVL6:
- 350:Src/stm32f7xx_it.c **** LD_blinker.state = 2;
- 419 .loc 1 350 4 view .LVU63
- 420 .loc 1 350 21 is_stmt 0 view .LVU64
- 421 0022 0223 movs r3, #2
- 422 0024 A372 strb r3, [r4, #10]
- 351:Src/stm32f7xx_it.c **** break;
- 423 .loc 1 351 3 is_stmt 1 view .LVU65
- 424 0026 0BE0 b .L34
- 425 .L32:
- 343:Src/stm32f7xx_it.c **** HAL_GPIO_WritePin(LD_blinker.signal_port, LD_blinker.signal_pin, GPIO_PIN_SET);
- 426 .loc 1 343 4 view .LVU66
- 427 0028 074C ldr r4, .L36
- 428 002a 2189 ldrh r1, [r4, #8]
- 429 002c 0220 movs r0, #2
- 430 002e FFF7FEFF bl Set_LTEC
- 431 .LVL7:
- 344:Src/stm32f7xx_it.c **** LD_blinker.state = 3;
- 432 .loc 1 344 4 view .LVU67
- 433 0032 0122 movs r2, #1
- 434 0034 6188 ldrh r1, [r4, #2]
- 435 0036 6068 ldr r0, [r4, #4]
- 436 0038 FFF7FEFF bl HAL_GPIO_WritePin
- 437 .LVL8:
- 345:Src/stm32f7xx_it.c **** break;
- 438 .loc 1 345 4 view .LVU68
- 345:Src/stm32f7xx_it.c **** break;
- 439 .loc 1 345 21 is_stmt 0 view .LVU69
- 440 003c 0323 movs r3, #3
- 441 003e A372 strb r3, [r4, #10]
- 346:Src/stm32f7xx_it.c **** case 3: //set LD OFF, blinking
- 442 .loc 1 346 3 is_stmt 1 view .LVU70
- 443 .L34:
- 352:Src/stm32f7xx_it.c **** }
- 353:Src/stm32f7xx_it.c **** //*/
- 354:Src/stm32f7xx_it.c **** /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
- 355:Src/stm32f7xx_it.c **** HAL_TIM_IRQHandler(&htim8);
- 444 .loc 1 355 3 view .LVU71
- 445 0040 0248 ldr r0, .L36+4
- 446 0042 FFF7FEFF bl HAL_TIM_IRQHandler
- 447 .LVL9:
- 356:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */
- 357:Src/stm32f7xx_it.c ****
- 358:Src/stm32f7xx_it.c **** /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
- 359:Src/stm32f7xx_it.c **** }
- 448 .loc 1 359 1 is_stmt 0 view .LVU72
- 449 0046 10BD pop {r4, pc}
- 450 .L37:
- 451 .align 2
- 452 .L36:
- 453 0048 00000000 .word LD_blinker
- 454 004c 00000000 .word htim8
- ARM GAS /tmp/ccMf3LkY.s page 15
-
-
- 455 .cfi_endproc
- 456 .LFE1197:
- 458 .section .text.TIM5_IRQHandler,"ax",%progbits
- 459 .align 1
- 460 .global TIM5_IRQHandler
- 461 .syntax unified
- 462 .thumb
- 463 .thumb_func
- 465 TIM5_IRQHandler:
- 466 .LFB1198:
- 360:Src/stm32f7xx_it.c ****
- 361:Src/stm32f7xx_it.c **** /**
- 362:Src/stm32f7xx_it.c **** * @brief This function handles TIM5 global interrupt.
- 363:Src/stm32f7xx_it.c **** */
- 364:Src/stm32f7xx_it.c **** void TIM5_IRQHandler(void)
- 365:Src/stm32f7xx_it.c **** {
- 467 .loc 1 365 1 is_stmt 1 view -0
- 468 .cfi_startproc
- 469 @ args = 0, pretend = 0, frame = 0
- 470 @ frame_needed = 0, uses_anonymous_args = 0
- 471 @ link register save eliminated.
- 366:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM5_IRQn 0 */
- 367:Src/stm32f7xx_it.c ****
- 368:Src/stm32f7xx_it.c **** /* USER CODE END TIM5_IRQn 0 */
- 369:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM5_IRQn 1 */
- 370:Src/stm32f7xx_it.c ****
- 371:Src/stm32f7xx_it.c **** /* USER CODE END TIM5_IRQn 1 */
- 372:Src/stm32f7xx_it.c **** }
- 472 .loc 1 372 1 view .LVU74
- 473 0000 7047 bx lr
- 474 .cfi_endproc
- 475 .LFE1198:
- 477 .section .text.TIM6_DAC_IRQHandler,"ax",%progbits
- 478 .align 1
- 479 .global TIM6_DAC_IRQHandler
- 480 .syntax unified
- 481 .thumb
- 482 .thumb_func
- 484 TIM6_DAC_IRQHandler:
- 485 .LFB1199:
- 373:Src/stm32f7xx_it.c ****
- 374:Src/stm32f7xx_it.c **** /**
- 375:Src/stm32f7xx_it.c **** * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
- 376:Src/stm32f7xx_it.c **** */
- 377:Src/stm32f7xx_it.c **** void TIM6_DAC_IRQHandler(void)
- 378:Src/stm32f7xx_it.c **** {
- 486 .loc 1 378 1 view -0
- 487 .cfi_startproc
- 488 @ args = 0, pretend = 0, frame = 0
- 489 @ frame_needed = 0, uses_anonymous_args = 0
- 490 0000 08B5 push {r3, lr}
- 491 .LCFI5:
- 492 .cfi_def_cfa_offset 8
- 493 .cfi_offset 3, -8
- 494 .cfi_offset 14, -4
- 379:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
- 380:Src/stm32f7xx_it.c ****
- ARM GAS /tmp/ccMf3LkY.s page 16
-
-
- 381:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 0 */
- 382:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
- 383:Src/stm32f7xx_it.c **** if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
- 495 .loc 1 383 3 view .LVU76
- 496 .LVL10:
- 497 .LBB58:
- 498 .LBI58:
- 499 .file 2 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
- 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
- 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h
- 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @author MCD Application Team
- 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Header file of TIM LL module.
- 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
- 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @attention
- 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
- 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Copyright (c) 2017 STMicroelectronics.
- 10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * All rights reserved.
- 11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
- 12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file
- 13:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in the root directory of this software component.
- 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * If no LICENSE file comes with this software, it is provided AS-IS.
- 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
- 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
- 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Define to prevent recursive inclusion -------------------------------------*/
- 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #ifndef __STM32F7xx_LL_TIM_H
- 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __STM32F7xx_LL_TIM_H
- 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #ifdef __cplusplus
- 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** extern "C" {
- 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif
- 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/
- 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #include "stm32f7xx.h"
- 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @addtogroup STM32F7xx_LL_Driver
- 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined (TIM1) || defined (TIM8) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defi
- 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL TIM
- 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/
- 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/
- 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables
- 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t OFFSET_TAB_CCMRx[] =
- 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */
- 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 1: TIMx_CH1N */
- 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */
- ARM GAS /tmp/ccMf3LkY.s page 17
-
-
- 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */
- 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 4: TIMx_CH3 */
- 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 5: TIMx_CH3N */
- 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */
- 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */
- 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */
- 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
- 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] =
- 59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */
- 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */
- 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */
- 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */
- 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */
- 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */
- 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: OC4M, OC4FE, OC4PE */
- 67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: OC5M, OC5FE, OC5PE */
- 68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U /* 8: OC6M, OC6FE, OC6PE */
- 69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
- 70:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_ICxx[] =
- 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1S, IC1PSC, IC1F */
- 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */
- 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: CC2S, IC2PSC, IC2F */
- 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */
- 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: CC3S, IC3PSC, IC3F */
- 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */
- 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: CC4S, IC4PSC, IC4F */
- 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: - NA */
- 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U /* 8: - NA */
- 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
- 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] =
- 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1P */
- 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 1: CC1NP */
- 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 2: CC2P */
- 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 3: CC2NP */
- 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 4: CC3P */
- 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U, /* 5: CC3NP */
- 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 12U, /* 6: CC4P */
- 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 16U, /* 7: CC5P */
- 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 20U /* 8: CC6P */
- 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
- 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OISx[] =
- 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OIS1 */
- 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1U, /* 1: OIS1N */
- 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 2: OIS2 */
- 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3U, /* 3: OIS2N */
- 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 4: OIS3 */
- 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 5U, /* 5: OIS3N */
- 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 6: OIS4 */
- 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 7: OIS5 */
- ARM GAS /tmp/ccMf3LkY.s page 18
-
-
- 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U /* 8: OIS6 */
- 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
- 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/
- 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants
- 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
- 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Defines used for the bit position in the register and perform offsets */
- 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_POSITION_BRK_SOURCE (POSITION_VAL(Source) & 0x1FUL)
- 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Generic bit definitions for TIMx_AF1 register */
- 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP TIM1_AF1_BKINP /*!< BRK BKIN input polarity */
- 124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
- 125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */
- 127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_OR_RMP_SHIFT 16U
- 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_OR_RMP_MASK 0x0000FFFFU
- 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM2_OR_RMP_MASK (TIM2_OR_ITR1_RMP << TIMx_OR_RMP_SHIFT)
- 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM5_OR_RMP_MASK (TIM5_OR_TI4_RMP << TIMx_OR_RMP_SHIFT)
- 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM11_OR_RMP_MASK (TIM11_OR_TI1_RMP << TIMx_OR_RMP_SHIFT)
- 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
- 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_1 ((uint8_t)0x7F)
- 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_2 ((uint8_t)0x3F)
- 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_3 ((uint8_t)0x1F)
- 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_4 ((uint8_t)0x1F)
- 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
- 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_1 ((uint8_t)0x00)
- 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_2 ((uint8_t)0x80)
- 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_3 ((uint8_t)0xC0)
- 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_4 ((uint8_t)0xE0)
- 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private macros ------------------------------------------------------------*/
- 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros
- 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Convert channel id into channel index.
- 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values:
- 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
- 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
- 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
- 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
- 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
- 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
- 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
- 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
- ARM GAS /tmp/ccMf3LkY.s page 19
-
-
- 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
- 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none
- 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
- 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
- 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
- 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
- 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
- 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
- 173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
- 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
- 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
- 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Calculate the deadtime sampling period(in ps).
- 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz).
- 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values:
- 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
- 181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
- 182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- 183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none
- 184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_CALC_DTS(__TIMCLK__, __CKD__) \
- 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
- 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
- 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
- 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported types ------------------------------------------------------------*/
- 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
- 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
- 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition.
- 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
- 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_D
- 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetPrescaler().*/
- 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode.
- 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
- 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetCounterMode().*/
- 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
- 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Auto-Reload Register at the next update event.
- 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_
- 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case
- ARM GAS /tmp/ccMf3LkY.s page 20
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-
- 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF.
- 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/
- 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division.
- 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
- 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetClockDivision().*/
- 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc
- 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts
- 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** from the RCR value (N).
- 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This means in PWM mode that (N+1) corresponds to:
- 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of PWM periods in edge-aligned mode
- 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of half PWM period in center-aligned mode
- 238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x
- 239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFF.
- 240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat
- 241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFFFF.
- 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetRepetitionCounter().*/
- 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_InitTypeDef;
- 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Output Compare configuration structure definition.
- 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCMode; /*!< Specifies the output mode.
- 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCMODE.
- 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetMode().*/
- 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state.
- 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
- 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions
- 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
- 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state.
- 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
- 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions
- 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
- 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re
- 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_Data=
- 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** LL_TIM_OC_SetCompareCHx (x=1..6).*/
- 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity.
- 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
- ARM GAS /tmp/ccMf3LkY.s page 21
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-
- 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/
- 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
- 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
- 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/
- 287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
- 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/
- 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
- 296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
- 297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/
- 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_OC_InitTypeDef;
- 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Input Capture configuration structure definition.
- 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
- 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
- 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input.
- 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
- 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
- 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
- 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter.
- 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
- 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef;
- 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccMf3LkY.s page 22
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-
- 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Encoder interface configuration structure definition.
- 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
- 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
- 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetEncoderMode().*/
- 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
- 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
- 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
- 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
- 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
- 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
- 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
- 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
- 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
- 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
- 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
- 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
- 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
- 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
- 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
- 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
- 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- ARM GAS /tmp/ccMf3LkY.s page 23
-
-
- 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
- 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef;
- 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition.
- 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
- 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
- 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
- 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
- 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th
- 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs.
- 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
- 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
- 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
- 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of
- 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref TIM_LL_EC_IC_FILTER.
- 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
- 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compa
- 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** A positive pulse (TRGO event) is generated with a programmable
- 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** a change occurs on the Hall inputs.
- 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x0000 and Ma
- 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
- 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetCompareCH2().*/
- 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_HALLSENSOR_InitTypeDef;
- 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief BDTR (Break and Dead Time) structure definition
- 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
- 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode.
- 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSR
- 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates()
- 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level
- 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state.
- 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSI
- 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccMf3LkY.s page 24
-
-
- 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates()
- 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level
- 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters.
- 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
- 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note The LOCK bits can be written only once after the reset.
- 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the
- 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the
- 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** switching-on of the outputs.
- 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x00 and Ma
- 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime()
- 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not.
- 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE
- 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK()
- 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
- 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARIT
- 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK()
- 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter; /*!< Specifies the TIM Break Filter.
- 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_FILTER
- 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK()
- 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not.
- 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE
- 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2()
- 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- ARM GAS /tmp/ccMf3LkY.s page 25
-
-
- 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity.
- 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARI
- 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2()
- 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter.
- 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER
- 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2()
- 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled
- 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTP
- 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
- 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAut
- 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
- 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
- 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_BDTR_InitTypeDef;
- 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
- 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/
- 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
- 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
- 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Flags defines which can be used with LL_TIM_ReadReg function.
- 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */
- 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup
- 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup
- 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup
- 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup
- 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC5IF TIM_SR_CC5IF /*!< Capture/compare 5 interrup
- 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC6IF TIM_SR_CC6IF /*!< Capture/compare 6 interrup
- 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */
- 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */
- 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_BIF TIM_SR_BIF /*!< Break interrupt flag */
- 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_B2IF TIM_SR_B2IF /*!< Second break interrupt fla
- 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt
- 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt
- 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt
- ARM GAS /tmp/ccMf3LkY.s page 26
-
-
- 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt
- 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_SBIF TIM_SR_SBIF /*!< System Break interrupt fla
- 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
- 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
- 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */
- 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */
- 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
- 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */
- 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_ENABLE TIM_BDTR_BK2E /*!< Break2 function enabled */
- 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable
- 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by
- 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by softw
- 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
- 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines
- 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
- 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */
- 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrup
- 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrup
- 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrup
- 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrup
- 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */
- 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable *
- 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */
- 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
- 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow
- 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/unde
- 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 27
-
-
- 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
- 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at
- 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at
- 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
- 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as upcounter
- 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounte
- 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and
- 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and
- 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and
- 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
- 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV1 0x00000000U /*!< tDTS=tCK_INT */
- 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /*!< tDTS=2*tCK_INT */
- 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /*!< tDTS=4*tCK_INT */
- 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
- 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_UP 0x00000000U /*!< Timer counter counts up */
- 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /*!< Timer counter counts down
- 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CCUPDATESOURCE Capture Compare Update Source
- 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_ONLY 0x00000000U /*!< Capture/compare control bi
- 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /*!< Capture/compare control bi
- 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
- 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when
- 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when
- ARM GAS /tmp/ccMf3LkY.s page 28
-
-
- 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
- 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF - No bit is write
- 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */
- 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /*!< LOCK Level 2 */
- 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */
- 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CHANNEL Channel
- 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1
- 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /*!< Timer complementary output ch
- 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E /*!< Timer input/output channel 2
- 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH2N TIM_CCER_CC2NE /*!< Timer complementary output ch
- 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E /*!< Timer input/output channel 3
- 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH3N TIM_CCER_CC3NE /*!< Timer complementary output ch
- 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E /*!< Timer input/output channel 4
- 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH5 TIM_CCER_CC5E /*!< Timer output channel 5 */
- 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH6 TIM_CCER_CC6E /*!< Timer output channel 6 */
- 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
- 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
- 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_DISABLE 0x00000000U /*!< OCx is not active */
- 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on
- 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
- 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** Legacy definitions for compatibility purpose
- 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @cond 0
- 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM1 LL_TIM_OCMODE_ASYMMETRIC_PWM1
- 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM2 LL_TIM_OCMODE_ASYMMETRIC_PWM2
- 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @endcond
- 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
- 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FROZEN 0x00000000U
- 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0
- 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1
- ARM GAS /tmp/ccMf3LkY.s page 29
-
-
- 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
- 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2
- 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
- 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
- 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
- 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3
- 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
- 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
- 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1
- 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
- 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
- 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
- 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/
- 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
- 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State
- 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
- 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCIDLESTATE_LOW 0x00000000U /*!__REG__, (__VAL
-1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Read a value in TIM register.
-1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance
-1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be read
- ARM GAS /tmp/ccMf3LkY.s page 37
-
-
-1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Register value
-1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
-1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the UIFCPY flag from the counter value.
-1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
-1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
-1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * to TIMx_CNT register bit 31)
-1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNT__ Counter value
-1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval UIF status bit
-1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \
-1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
-1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de
-1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
-1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
-1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values:
-1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
-1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
-1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
-1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DT__ deadtime duration (in ns)
-1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval DTG[0:7]
-1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \
-1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ?
-1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) :
-1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__C
-1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
-1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2))
-1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__C
-1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
-1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3))
-1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__
-1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
-1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4))
-1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U)
-1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq
-1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
-1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
-1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz)
-1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
-1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
-1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U
-1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr
-1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
-1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
- ARM GAS /tmp/ccMf3LkY.s page 38
-
-
-1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
-1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __FREQ__ output signal frequency (in Hz)
-1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
-1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
-1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))
-1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu
-1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * active/inactive delay.
-1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
-1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
-1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
-1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us)
-1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535)
-1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
-1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
-1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
-1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration
-1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when the timer operates in one pulse mode).
-1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
-1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
-1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
-1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us)
-1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PULSE__ pulse duration (in us)
-1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
-1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
-1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
-1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
-1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler
-1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
-1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values:
-1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
-1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
-1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
-1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
-1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Input capture prescaler ratio (1, 2, 4 or 8)
-1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
-1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
-1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported functions --------------------------------------------------------*/
-1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
-1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccMf3LkY.s page 39
-
-
-1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration
-1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter.
-1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter
-1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
-1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN);
-1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable timer counter.
-1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter
-1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
-1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
-1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the timer counter is enabled.
-1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
-1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)
-1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
-1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable update event generation.
-1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
-1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
-1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
-1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update event generation.
-1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
-1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
-1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
-1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 40
-
-
-1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether update event generation is enabled.
-1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
-1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1).
-1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
-1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
-1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set update event source
-1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
-1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled:
-1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Counter overflow/underflow
-1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Setting the UG bit
-1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Update generation through the slave mode controller
-1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
-1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * overflow/underflow generates an update interrupt or DMA request if enabled.
-1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_SetUpdateSource
-1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param UpdateSource This parameter can be one of the following values:
-1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
-1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
-1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
-1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
-1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual event update source
-1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource
-1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
-1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
-1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)
-1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
-1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive).
-1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
-1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OnePulseMode This parameter can be one of the following values:
-1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
-1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
-1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
-1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 41
-
-
-1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
-1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode.
-1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
-1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
-1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
-1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
-1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
-1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the timer counter counting mode.
-1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
-1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported
-1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance.
-1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
-1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * requires a timer reset to avoid unexpected direction
-1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * due to DIR bit readonly in center aligned mode.
-1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
-1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_SetCounterMode
-1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CounterMode This parameter can be one of the following values:
-1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP
-1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN
-1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
-1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
-1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
-1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
-1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);
-1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual counter mode.
-1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
-1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported
-1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance.
-1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
-1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode
-1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP
-1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN
-1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
-1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
-1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
-1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
-1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 42
-
-
-1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode;
-1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));
-1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U)
-1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
-1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return counter_mode;
-1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload.
-1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
-1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
-1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
-1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable auto-reload (ARR) preload.
-1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
-1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
-1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
-1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether auto-reload (ARR) preload is enabled.
-1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
-1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)
-1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
-1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead
-1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters.
-1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
-1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer
-1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance.
-1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision
-1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values:
-1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
-1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
-1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- ARM GAS /tmp/ccMf3LkY.s page 43
-
-
-1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
-1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
-1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the actual division ratio between the timer clock and the sampling clock used by t
-1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generators (when supported) and the digital filters.
-1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
-1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer
-1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance.
-1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_GetClockDivision
-1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
-1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
-1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
-1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)
-1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
-1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the counter value.
-1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter
-1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
-1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
-1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CNT, Counter);
-1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the counter value.
-1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_GetCounter
-1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
-1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
-1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT));
-1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current direction of the counter
-1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection
-1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 44
-
-
-1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP
-1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
-1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
-1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
-1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the prescaler value.
-1599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
-1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The prescaler can be changed on the fly as this control register is buffered. The new
-1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * prescaler ratio is taken into account at the next update event.
-1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
-1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_SetPrescaler
-1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535
-1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
-1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler);
-1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the prescaler value.
-1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_GetPrescaler
-1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value between Min_Data=0 and Max_Data=65535
-1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)
-1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC));
-1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the auto-reload value.
-1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The counter is blocked while the auto-reload value is null.
-1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
-1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_SetAutoReload
-1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param AutoReload between Min_Data=0 and Max_Data=65535
-1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
-1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload);
-1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value.
-1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload
-1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccMf3LkY.s page 45
-
-
-1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value
-1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
-1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->ARR));
-1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the repetition counter value.
-1655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note For advanced timer instances RepetitionCounter can be up to 65535.
-1656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
-1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter.
-1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_SetRepetitionCounter
-1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer.
-1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
-1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter);
-1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the repetition counter value.
-1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
-1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter.
-1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_GetRepetitionCounter
-1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Repetition counter value
-1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)
-1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->RCR));
-1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter regis
-1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This allows both the counter value and a potential roll-over condition signalled by the U
-1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in an atomic way.
-1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap
-1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
-1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
-1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt flag (UIF) remapping.
-1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
-1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
-1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
- ARM GAS /tmp/ccMf3LkY.s page 46
-
-
-1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) copy is set.
-1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value
-1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(const uint32_t Counter)
-1711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (((Counter & TIM_CNT_UIFCPY) == (TIM_CNT_UIFCPY)) ? 1UL : 0UL);
-1713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
-1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
-1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
-1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * they are updated only when a commutation event (COM) occurs.
-1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Only on channels that have a complementary output.
-1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
-1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
-1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload
-1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
-1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
-1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
-1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
-1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
-1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload
-1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
-1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
-1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is en
-1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
-1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
-1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
- ARM GAS /tmp/ccMf3LkY.s page 47
-
-
-1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
-1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
-1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
-1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate
-1767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CCUpdateSource This parameter can be one of the following values:
-1769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
-1770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
-1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
-1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
-1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request.
-1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
-1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values:
-1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC
-1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
-1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
-1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
-1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request.
-1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
-1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC
-1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
-1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)
-1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
-1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the
-1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters.
-1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the lock mechanism is supported by a timer instance.
-1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
-1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values:
-1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF
-1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1
-1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2
-1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3
- ARM GAS /tmp/ccMf3LkY.s page 48
-
-
-1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
-1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
-1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable capture/compare channels.
-1826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
-1827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_EnableChannel\n
-1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_EnableChannel\n
-1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_EnableChannel\n
-1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_EnableChannel\n
-1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_EnableChannel\n
-1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_EnableChannel\n
-1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_EnableChannel\n
-1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_EnableChannel
-1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
-1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-1845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels);
-1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable capture/compare channels.
-1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
-1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_DisableChannel\n
-1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_DisableChannel\n
-1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_DisableChannel\n
-1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_DisableChannel\n
-1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_DisableChannel\n
-1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_DisableChannel\n
-1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n
-1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel
-1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
-1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
- ARM GAS /tmp/ccMf3LkY.s page 49
-
-
-1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
-1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CCER, Channels);
-1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether channel(s) is(are) enabled.
-1884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
-1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_IsEnabledChannel\n
-1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_IsEnabledChannel\n
-1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_IsEnabledChannel\n
-1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_IsEnabledChannel\n
-1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_IsEnabledChannel\n
-1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel\n
-1891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_IsEnabledChannel\n
-1892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_IsEnabledChannel
-1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
-1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-1902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
-1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
-1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
-1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel.
-1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
-1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
-1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
-1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
-1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
-1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
-1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n
-1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n
-1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n
-1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n
-1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n
- ARM GAS /tmp/ccMf3LkY.s page 50
-
-
-1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n
-1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS1 LL_TIM_OC_ConfigOutput\n
-1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_ConfigOutput\n
-1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_ConfigOutput\n
-1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_ConfigOutput\n
-1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_ConfigOutput\n
-1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_ConfigOutput
-1938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-1940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-1941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values:
-1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
-1948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
-1949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura
-1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
-1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
-1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
-1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
-1959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
-1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which
-1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived.
-1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
-1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_SetMode\n
-1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_SetMode\n
-1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_SetMode\n
-1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_SetMode\n
-1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_SetMode
-1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Mode This parameter can be one of the following values:
-1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN
-1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE
-1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE
-1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE
-1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
-1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
-1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1
-1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2
- ARM GAS /tmp/ccMf3LkY.s page 51
-
-
-1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
-1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
-1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
-1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
-1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
-1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
-1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-1995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-1996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
-1997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-1998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT
-2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the output compare mode of an output channel.
-2005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
-2006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n
-2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n
-2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode\n
-2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_GetMode\n
-2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_GetMode
-2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN
-2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE
-2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE
-2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE
-2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
-2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
-2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1
-2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2
-2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
-2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
-2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
-2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
-2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
-2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
-2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
-2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT
-2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel.
-2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
- ARM GAS /tmp/ccMf3LkY.s page 52
-
-
-2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n
-2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_SetPolarity\n
-2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_SetPolarity\n
-2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_SetPolarity\n
-2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_SetPolarity\n
-2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_SetPolarity\n
-2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_SetPolarity\n
-2052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_SetPolarity
-2053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
-2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH
-2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW
-2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
-2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[i
-2073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the polarity of an output channel.
-2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
-2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_GetPolarity\n
-2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n
-2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_GetPolarity\n
-2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_GetPolarity\n
-2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_GetPolarity\n
-2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_GetPolarity\n
-2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_GetPolarity\n
-2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_GetPolarity
-2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH
-2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW
-2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
- ARM GAS /tmp/ccMf3LkY.s page 53
-
-
-2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan
-2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the IDLE state of an output channel
-2109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function is significant only for the timer instances
-2110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx)
-2111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * can be used to check whether or not a timer instance provides
-2112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a break input.
-2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n
-2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_SetIdleState\n
-2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_SetIdleState\n
-2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_SetIdleState\n
-2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_SetIdleState\n
-2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_SetIdleState\n
-2119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_SetIdleState\n
-2120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_SetIdleState\n
-2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState
-2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
-2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-2130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param IdleState This parameter can be one of the following values:
-2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW
-2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH
-2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState
-2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iC
-2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the IDLE state of an output channel
-2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n
-2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
-2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n
-2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
-2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n
-2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n
-2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState\n
-2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_GetIdleState\n
-2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState
-2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
- ARM GAS /tmp/ccMf3LkY.s page 54
-
-
-2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
-2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
-2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW
-2168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH
-2169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)
-2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChanne
-2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable fast mode for the output channel.
-2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
-2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
-2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n
-2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n
-2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast\n
-2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_EnableFast\n
-2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_EnableFast
-2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel.
-2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
-2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n
-2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n
-2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast\n
-2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_DisableFast\n
-2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_DisableFast
-2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
- ARM GAS /tmp/ccMf3LkY.s page 55
-
-
-2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
-2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
-2226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether fast mode is enabled for the output channel.
-2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
-2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
-2233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
-2234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
-2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
-2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_IsEnabledFast
-2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
-2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
-2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable compare register (TIMx_CCRx) preload for the output channel.
-2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
-2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
-2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
-2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_EnablePreload\n
-2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
-2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload
-2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 56
-
-
-2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable compare register (TIMx_CCRx) preload for the output channel.
-2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
-2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
-2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
-2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_DisablePreload\n
-2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_DisablePreload\n
-2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_DisablePreload
-2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
-2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
-2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe
-2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
-2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
-2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
-2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
-2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload\n
-2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload
-2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
-2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
-2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 57
-
-
-2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable clearing the output channel on an external event.
-2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force
-2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
-2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
-2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_EnableClear\n
-2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_EnableClear\n
-2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_EnableClear\n
-2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_EnableClear\n
-2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_EnableClear
-2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event.
-2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
-2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
-2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n
-2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_DisableClear\n
-2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_DisableClear\n
-2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_DisableClear\n
-2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_DisableClear
-2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
-2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
-2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 58
-
-
-2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch
-2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function enables clearing the output channel on an external event.
-2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force
-2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
-2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
-2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
-2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
-2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
-2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
-2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_IsEnabledClear\n
-2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_IsEnabledClear
-2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
-2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
-2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
-2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
-2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
-2414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal an
-2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the Ocx and OCxN signals).
-2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * dead-time insertion feature is supported by a timer instance.
-2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
-2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime
-2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DeadTime between Min_Data=0 and Max_Data=255
-2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
-2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
-2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1).
-2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
-2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance.
-2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
-2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 59
-
-
-2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR1, CompareValue);
-2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 2 (TIMx_CCR2).
-2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
-2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance.
-2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
-2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue);
-2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3).
-2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
-2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-2472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel is supported by a timer instance.
-2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
-2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR3, CompareValue);
-2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 4 (TIMx_CCR4).
-2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
-2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
-2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
-2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue);
-2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 60
-
-
-2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5).
-2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
-2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 5 is supported by a timer instance.
-2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5
-2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);
-2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 6 (TIMx_CCR6).
-2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
-2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance.
-2518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_SetCompareCH6
-2519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
-2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)
-2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR6, CompareValue);
-2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR1) set for output channel 1.
-2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
-2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance.
-2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
-2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)
-2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1));
-2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR2) set for output channel 2.
-2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
-2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance.
-2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
-2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
-2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2));
- ARM GAS /tmp/ccMf3LkY.s page 61
-
-
-2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR3) set for output channel 3.
-2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
-2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 3 is supported by a timer instance.
-2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
-2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)
-2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3));
-2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4.
-2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
-2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
-2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
-2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)
-2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4));
-2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR5) set for output channel 5.
-2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
-2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 5 is supported by a timer instance.
-2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 CCR5 LL_TIM_OC_GetCompareCH5
-2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)
-2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
-2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR6) set for output channel 6.
-2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
-2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance.
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
-2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
-2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
-2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 62
-
-
-2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6));
-2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select on which reference signal the OC5REF is combined to.
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check
-2621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports the combined 3-phase PWM mode.
-2622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels\n
-2623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels\n
-2624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels
-2625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param GroupCH5 This parameter can be a combination of the following values:
-2627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_NONE
-2628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC1REFC
-2629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC2REFC
-2630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC3REFC
-2631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)
-2634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);
-2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
-2643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-2644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure input channel.
-2647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
-2648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n
-2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n
-2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_Config\n
-2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_Config\n
-2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_Config\n
-2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_Config\n
-2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_Config\n
-2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_Config\n
-2656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_Config\n
-2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_Config\n
-2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_Config\n
-2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_IC_Config\n
-2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n
-2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n
-2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n
-2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n
-2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n
-2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n
-2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_Config
-2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
- ARM GAS /tmp/ccMf3LkY.s page 63
-
-
-2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values:
-2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_
-2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
-2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
-2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_I
-2678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
-2681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChanne
-2685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S))
-2686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** << SHIFT_TAB_ICxx[iChannel]);
-2687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
-2688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
-2689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the active input.
-2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
-2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
-2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
-2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput
-2697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values:
-2704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
-2705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
-2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC
-2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv
-2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT
-2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input.
-2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
-2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
-2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
-2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput
-2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 64
-
-
-2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
-2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
-2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC
-2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
-2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann
-2738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the prescaler of input channel.
-2742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
-2743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
-2744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
-2745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
-2746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values:
-2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
-2754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
-2755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
-2756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
-2757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal
-2760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT
-2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current prescaler value acting on an input channel.
-2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
-2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
-2770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
-2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
-2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
-2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
-2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
-2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
-2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
-2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 65
-
-
-2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha
-2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input filter duration.
-2793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
-2794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_SetFilter\n
-2795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_SetFilter\n
-2796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_SetFilter
-2797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICFilter This parameter can be one of the following values:
-2804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1
-2805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
-2806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
-2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
-2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
-2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
-2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
-2811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
-2812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
-2813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
-2814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
-2815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
-2816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
-2817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
-2818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
-2819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
-2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
-2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
-2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_
-2827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the input filter duration.
-2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
-2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n
-2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n
-2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter
-2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1
- ARM GAS /tmp/ccMf3LkY.s page 66
-
-
-2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
-2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
-2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
-2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
-2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
-2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
-2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
-2850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
-2851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
-2852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
-2853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
-2854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
-2855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
-2856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
-2857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
-2858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)
-2860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
-2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann
-2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input channel polarity.
-2868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
-2869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_SetPolarity\n
-2870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_SetPolarity\n
-2871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_SetPolarity\n
-2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n
-2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n
-2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n
-2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_SetPolarity
-2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPolarity This parameter can be one of the following values:
-2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING
-2884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING
-2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
-2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity
-2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
-2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]);
-2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity.
-2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
-2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n
-2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n
- ARM GAS /tmp/ccMf3LkY.s page 67
-
-
-2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n
-2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_GetPolarity\n
-2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_GetPolarity\n
-2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_GetPolarity\n
-2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_GetPolarity
-2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
-2907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
-2908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
-2909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
-2910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
-2911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
-2912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING
-2913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING
-2914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
-2915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
-2917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
-2919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
-2920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]);
-2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
-2925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-2926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
-2927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
-2928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
-2932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
-2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
-2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
-2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
-2941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
-2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
-2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
-2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
-2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
-2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
-2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 68
-
-
-2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
-2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
-2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 1.
-2964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
-2965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
-2968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 1 is supported by a timer instance.
-2969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
-2970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-2972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)
-2974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1));
-2976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 2.
-2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
-2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
-2984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 2 is supported by a timer instance.
-2985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
-2986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-2987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-2988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-2989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)
-2990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2));
-2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 3.
-2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
-2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
-2998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
-3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 3 is supported by a timer instance.
-3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
-3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
-3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3));
-3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4.
-3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
-3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
- ARM GAS /tmp/ccMf3LkY.s page 69
-
-
-3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
-3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
-3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 4 is supported by a timer instance.
-3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
-3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
-3020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)
-3022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4));
-3024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
-3031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable external clock mode 2.
-3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET
-3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
-3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock
-3039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
-3043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-3045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable external clock mode 2.
-3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
-3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_DisableExternalClock
-3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
-3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
-3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled.
-3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
-3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
-3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
-3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
- ARM GAS /tmp/ccMf3LkY.s page 70
-
-
-3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the clock source of the counter clock.
-3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note when selected clock source is external clock mode 1, the timer input
-3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
-3077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * function. This timer input must be configured by calling
-3078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the @ref LL_TIM_IC_Config() function.
-3079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
-3080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode1.
-3081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
-3082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
-3083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetClockSource\n
-3084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ECE LL_TIM_SetClockSource
-3085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockSource This parameter can be one of the following values:
-3087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
-3088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
-3089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
-3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
-3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
-3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the encoder interface mode.
-3099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
-3100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports the encoder mode.
-3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode
-3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values:
-3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1
-3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2
-3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12
-3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
-3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
-3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
-3119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output (TRGO) used for timer synchronization .
-3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
-3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer.
-3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
-3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 71
-
-
-3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET
-3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_ENABLE
-3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_UPDATE
-3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_CC1IF
-3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF
-3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF
-3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF
-3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF
-3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
-3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
-3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
-3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
-3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization.
-3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
-3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer Instance
-3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ADCSynchronization This parameter can be one of the following values:
-3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_RESET
-3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE
-3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_UPDATE
-3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_CC1F
-3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC1
-3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC2
-3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC3
-3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4
-3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5
-3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC6
-3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
-3161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC6_RISINGFALLING
-3162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_RISING
-3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_FALLING
-3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_RISING
-3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_FALLING
-3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)
-3169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
-3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the synchronization mode of a slave timer.
-3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode
-3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values:
-3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED
-3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET
-3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED
-3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER
-3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
- ARM GAS /tmp/ccMf3LkY.s page 72
-
-
-3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
-3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
-3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the selects the trigger input to be used to synchronize the counter.
-3194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR TS LL_TIM_SetTriggerInput
-3197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TriggerInput This parameter can be one of the following values:
-3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR0
-3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR1
-3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2
-3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3
-3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED
-3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1
-3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2
-3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF
-3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
-3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
-3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the Master/Slave mode.
-3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
-3219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
-3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the Master/Slave mode.
-3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
-3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
-3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
-3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled.
- ARM GAS /tmp/ccMf3LkY.s page 73
-
-
-3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
-3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
-3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
-3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
-3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
-3251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the external trigger (ETR) input.
-3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
-3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an external trigger input.
-3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ETP LL_TIM_ConfigETR\n
-3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETPS LL_TIM_ConfigETR\n
-3259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETF LL_TIM_ConfigETR
-3260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPolarity This parameter can be one of the following values:
-3262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
-3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_INVERTED
-3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPrescaler This parameter can be one of the following values:
-3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1
-3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2
-3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4
-3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8
-3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values:
-3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1
-3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
-3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
-3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
-3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
-3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
-3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
-3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
-3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
-3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
-3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
-3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
-3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
-3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
-3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
-3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
-3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale
-3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ETRFilter)
-3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler |
-3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration
- ARM GAS /tmp/ccMf3LkY.s page 74
-
-
-3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break function.
-3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_EnableBRK
-3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
-3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break function.
-3316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_DisableBRK
-3317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
-3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
-3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break input.
-3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
-3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BKF LL_TIM_ConfigBRK
-3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values:
-3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW
-3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH
-3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakFilter This parameter can be one of the following values:
-3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1
-3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
-3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
-3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
-3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
-3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
-3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
-3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
-3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
-3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
-3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
-3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
-3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
-3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
-3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
-3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
-3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 75
-
-
-3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity,
-3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter)
-3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);
-3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break 2 function.
-3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_EnableBRK2
-3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
-3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-3373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break 2 function.
-3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_DisableBRK2
-3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
-3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
-3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break 2 input.
-3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
-3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
-3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
-3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BK2F LL_TIM_ConfigBRK2
-3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Polarity This parameter can be one of the following values:
-3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_LOW
-3397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
-3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Filter This parameter can be one of the following values:
-3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
-3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
-3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
-3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
-3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
-3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
-3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
-3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
-3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
-3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
-3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
-3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
-3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
-3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
- ARM GAS /tmp/ccMf3LkY.s page 76
-
-
-3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
-3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
-3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F
-3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);
-3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
-3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
-3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR OSSR LL_TIM_SetOffStates
-3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateIdle This parameter can be one of the following values:
-3430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_DISABLE
-3431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_ENABLE
-3432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateRun This parameter can be one of the following values:
-3433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_DISABLE
-3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_ENABLE
-3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat
-3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
-3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable automatic output (MOE can be set by software or automatically when a break input
-3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
-3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
-3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable automatic output (MOE can be set only by software).
-3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
-3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
-3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
-3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled.
- ARM GAS /tmp/ccMf3LkY.s page 77
-
-
-3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
-3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
-3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
-3479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
-3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
-3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event
-3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
-3488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
-3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
-3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
-3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event.
-3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
-3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
-3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
-3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether outputs are enabled.
-3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
-3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
-3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
-3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
-3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
-3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
-3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input.
- ARM GAS /tmp/ccMf3LkY.s page 78
-
-
-3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_EnableBreakInputSource\n
-3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_EnableBreakInputSource\n
-3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_EnableBreakInputSource\n
-3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_EnableBreakInputSource
-3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
-3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t
-3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, Source);
-3546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the signals connected to the designated timer break input.
-3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_DisableBreakInputSource\n
-3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_DisableBreakInputSource\n
-3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_DisableBreakInputSource\n
-3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_DisableBreakInputSource
-3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
-3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_
-3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, Source);
-3569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of the break signal for the timer break input.
-3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
-3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
-3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINP LL_TIM_SetBreakInputSourcePolarity\n
-3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n
-3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n
-3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity
-3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
-3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
-3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
-3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 79
-
-
-3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
-3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
-3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
-3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_LOW
-3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_HIGH
-3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin
-3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Polarity)
-3593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
-3595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, (TIMx_AF1_BKINP << TIM_POSITION_BRK_SOURCE), (Polarity << TIM_POSITION_BRK_SOUR
-3596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
-3598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
-3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configures the timer DMA burst feature.
-3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
-3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * not a timer instance supports the DMA burst mode.
-3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
-3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst
-3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values:
-3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
-3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
-3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
-3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
-3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR
-3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
-3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
-3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
-3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
-3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
-3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
-3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
-3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
-3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
-3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
-3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
-3629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
-3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
-3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR
-3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
-3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
-3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
-3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*)
-3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF2 (*)
-3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices
-3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values:
-3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
-3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
- ARM GAS /tmp/ccMf3LkY.s page 80
-
-
-3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
-3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
-3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
-3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
-3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
-3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
-3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
-3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
-3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
-3650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
-3651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
-3652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
-3653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
-3654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
-3655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
-3656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
-3657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_
-3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
-3662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
-3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Remap TIM inputs (input channel, internal/external triggers).
-3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
-3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a some timer inputs can be remapped.
-3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll TIM2_OR ITR1_RMP LL_TIM_SetRemap\n
-3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5_OR TI4_RMP LL_TIM_SetRemap\n
-3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11_OR TI1_RMP LL_TIM_SetRemap
-3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Remap Remap param depends on the TIMx. Description available only
-3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in CHM version of the User Manual (not in .pdf).
-3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Otherwise see Reference Manual description of OR registers.
-3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Below description summarizes "Timer Instance" and "Remap" param combinations:
-3684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM2: one of the following values
-3686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * ITR1_RMP can be one of the following values
-3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
-3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP
-3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
-3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF
-3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5: one of the following values
-3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO
-3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI
-3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE
- ARM GAS /tmp/ccMf3LkY.s page 81
-
-
-3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC
-3699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11: one of the following values
-3701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_GPIO
-3703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_SPDIFRX
-3704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_HSE
-3705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_MCO1
-3706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
-3707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
-3710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK));
-3712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
-3716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
-3719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
-3720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF).
-3723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
-3724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
-3726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
-3728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
-3730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
-3731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
-3732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
-3733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
-3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
-3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
-3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
-3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
-3738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
- 500 .loc 2 3738 26 view .LVU77
- 501 .LBB59:
-3739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
-3740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
- 502 .loc 2 3740 3 view .LVU78
- 503 .loc 2 3740 12 is_stmt 0 view .LVU79
- 504 0002 094B ldr r3, .L42
- 505 0004 1B69 ldr r3, [r3, #16]
- 506 .loc 2 3740 66 view .LVU80
- 507 0006 13F0010F tst r3, #1
- 508 000a 0BD0 beq .L39
- 509 .LVL11:
- 510 .loc 2 3740 66 view .LVU81
- 511 .LBE59:
- 512 .LBE58:
- 384:Src/stm32f7xx_it.c **** {
- ARM GAS /tmp/ccMf3LkY.s page 82
-
-
- 385:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM6);
- 513 .loc 1 385 5 is_stmt 1 view .LVU82
- 514 .LBB60:
- 515 .LBI60:
-3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 516 .loc 2 3727 22 view .LVU83
- 517 .LBB61:
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 518 .loc 2 3729 3 view .LVU84
- 519 000c 064B ldr r3, .L42
- 520 000e 6FF00102 mvn r2, #1
- 521 0012 1A61 str r2, [r3, #16]
- 522 .LVL12:
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 523 .loc 2 3729 3 is_stmt 0 view .LVU85
- 524 .LBE61:
- 525 .LBE60:
- 386:Src/stm32f7xx_it.c **** TO6++;//increment tick
- 526 .loc 1 386 5 is_stmt 1 view .LVU86
- 527 .loc 1 386 8 is_stmt 0 view .LVU87
- 528 0014 054A ldr r2, .L42+4
- 529 0016 1368 ldr r3, [r2]
- 530 0018 0133 adds r3, r3, #1
- 531 001a 1360 str r3, [r2]
- 387:Src/stm32f7xx_it.c **** //10 ms or 100 Hz
- 388:Src/stm32f7xx_it.c **** HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- 532 .loc 1 388 5 is_stmt 1 view .LVU88
- 533 001c 0221 movs r1, #2
- 534 001e 0448 ldr r0, .L42+8
- 535 0020 FFF7FEFF bl HAL_GPIO_TogglePin
- 536 .LVL13:
- 537 .L39:
- 389:Src/stm32f7xx_it.c **** //HAL_GPIO_TogglePin(GPIOD, GPIO_PIN_12);
- 390:Src/stm32f7xx_it.c **** }
- 391:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 1 */
- 392:Src/stm32f7xx_it.c **** }
- 538 .loc 1 392 1 is_stmt 0 view .LVU89
- 539 0024 08BD pop {r3, pc}
- 540 .L43:
- 541 0026 00BF .align 2
- 542 .L42:
- 543 0028 00100040 .word 1073745920
- 544 002c 00000000 .word TO6
- 545 0030 000C0240 .word 1073875968
- 546 .cfi_endproc
- 547 .LFE1199:
- 549 .section .text.TIM7_IRQHandler,"ax",%progbits
- 550 .align 1
- 551 .global TIM7_IRQHandler
- 552 .syntax unified
- 553 .thumb
- 554 .thumb_func
- 556 TIM7_IRQHandler:
- 557 .LFB1200:
- 393:Src/stm32f7xx_it.c ****
- 394:Src/stm32f7xx_it.c **** /**
- 395:Src/stm32f7xx_it.c **** * @brief This function handles TIM7 global interrupt.
- ARM GAS /tmp/ccMf3LkY.s page 83
-
-
- 396:Src/stm32f7xx_it.c **** */
- 397:Src/stm32f7xx_it.c **** void TIM7_IRQHandler(void)
- 398:Src/stm32f7xx_it.c **** {
- 558 .loc 1 398 1 is_stmt 1 view -0
- 559 .cfi_startproc
- 560 @ args = 0, pretend = 0, frame = 0
- 561 @ frame_needed = 0, uses_anonymous_args = 0
- 562 @ link register save eliminated.
- 399:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM7_IRQn 0 */
- 400:Src/stm32f7xx_it.c ****
- 401:Src/stm32f7xx_it.c **** /* USER CODE END TIM7_IRQn 0 */
- 402:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM7_IRQn 1 */
- 403:Src/stm32f7xx_it.c **** if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
- 563 .loc 1 403 3 view .LVU91
- 564 .LVL14:
- 565 .LBB62:
- 566 .LBI62:
-3738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 567 .loc 2 3738 26 view .LVU92
- 568 .LBB63:
- 569 .loc 2 3740 3 view .LVU93
- 570 .loc 2 3740 12 is_stmt 0 view .LVU94
- 571 0000 064B ldr r3, .L46
- 572 0002 1B69 ldr r3, [r3, #16]
- 573 .loc 2 3740 66 view .LVU95
- 574 0004 13F0010F tst r3, #1
- 575 0008 07D0 beq .L44
- 576 .LVL15:
- 577 .loc 2 3740 66 view .LVU96
- 578 .LBE63:
- 579 .LBE62:
- 404:Src/stm32f7xx_it.c **** {
- 405:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM7);
- 580 .loc 1 405 5 is_stmt 1 view .LVU97
- 581 .LBB64:
- 582 .LBI64:
-3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- 583 .loc 2 3727 22 view .LVU98
- 584 .LBB65:
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 585 .loc 2 3729 3 view .LVU99
- 586 000a 044B ldr r3, .L46
- 587 000c 6FF00102 mvn r2, #1
- 588 0010 1A61 str r2, [r3, #16]
- 589 .LVL16:
-3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- 590 .loc 2 3729 3 is_stmt 0 view .LVU100
- 591 .LBE65:
- 592 .LBE64:
- 406:Src/stm32f7xx_it.c **** TO7++;
- 593 .loc 1 406 5 is_stmt 1 view .LVU101
- 594 .loc 1 406 8 is_stmt 0 view .LVU102
- 595 0012 034A ldr r2, .L46+4
- 596 0014 1368 ldr r3, [r2]
- 597 0016 0133 adds r3, r3, #1
- 598 0018 1360 str r3, [r2]
- 599 .L44:
- ARM GAS /tmp/ccMf3LkY.s page 84
-
-
- 407:Src/stm32f7xx_it.c **** //1 ms or 1000 Hz
- 408:Src/stm32f7xx_it.c **** //HAL_GPIO_TogglePin(TEST_01_GPIO_Port, TEST_01_Pin);
- 409:Src/stm32f7xx_it.c **** }
- 410:Src/stm32f7xx_it.c **** /* USER CODE END TIM7_IRQn 1 */
- 411:Src/stm32f7xx_it.c **** }
- 600 .loc 1 411 1 view .LVU103
- 601 001a 7047 bx lr
- 602 .L47:
- 603 .align 2
- 604 .L46:
- 605 001c 00140040 .word 1073746944
- 606 0020 00000000 .word TO7
- 607 .cfi_endproc
- 608 .LFE1200:
- 610 .section .text.UART_RxCpltCallback,"ax",%progbits
- 611 .align 1
- 612 .global UART_RxCpltCallback
- 613 .syntax unified
- 614 .thumb
- 615 .thumb_func
- 617 UART_RxCpltCallback:
- 618 .LFB1202:
- 412:Src/stm32f7xx_it.c ****
- 413:Src/stm32f7xx_it.c **** /**
- 414:Src/stm32f7xx_it.c **** * @brief This function handles DMA2 stream7 global interrupt.
- 415:Src/stm32f7xx_it.c **** */
- 416:Src/stm32f7xx_it.c **** void DMA2_Stream7_IRQHandler(void)
- 417:Src/stm32f7xx_it.c **** {
- 418:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
- 419:Src/stm32f7xx_it.c **** if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
- 420:Src/stm32f7xx_it.c **** {
- 421:Src/stm32f7xx_it.c **** DMA2_Stream7_TransferComplete();
- 422:Src/stm32f7xx_it.c **** u_tx_flg = 0;//indicate that transfer compete
- 423:Src/stm32f7xx_it.c **** }
- 424:Src/stm32f7xx_it.c **** else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
- 425:Src/stm32f7xx_it.c **** {
- 426:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TE7(DMA2);
- 427:Src/stm32f7xx_it.c **** }
- 428:Src/stm32f7xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 0 */
- 429:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
- 430:Src/stm32f7xx_it.c ****
- 431:Src/stm32f7xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 1 */
- 432:Src/stm32f7xx_it.c **** }
- 433:Src/stm32f7xx_it.c ****
- 434:Src/stm32f7xx_it.c **** /* USER CODE BEGIN 1 */
- 435:Src/stm32f7xx_it.c **** void UART_RxCpltCallback(void)
- 436:Src/stm32f7xx_it.c **** {
- 619 .loc 1 436 1 is_stmt 1 view -0
- 620 .cfi_startproc
- 621 @ args = 0, pretend = 0, frame = 0
- 622 @ frame_needed = 0, uses_anonymous_args = 0
- 623 @ link register save eliminated.
- 624 0000 10B4 push {r4}
- 625 .LCFI6:
- 626 .cfi_def_cfa_offset 4
- 627 .cfi_offset 4, -4
- 437:Src/stm32f7xx_it.c **** uart_buf = LL_USART_ReceiveData8(USART1);
- ARM GAS /tmp/ccMf3LkY.s page 85
-
-
- 628 .loc 1 437 5 view .LVU105
- 629 .LVL17:
- 630 .LBB66:
- 631 .LBI66:
- 632 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
+ 266 @ link register save eliminated.
+ 221:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 0 */
+ 222:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 0 */
+ 223:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_UP_TIM10_IRQn 1 */
+ 224:Src/stm32f7xx_it.c ****
+ 225:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_UP_TIM10_IRQn 1 */
+ 226:Src/stm32f7xx_it.c **** }
+ 267 .loc 1 226 1 view .LVU34
+ 268 0000 7047 bx lr
+ 269 .cfi_endproc
+ 270 .LFE1193:
+ 272 .section .text.TIM1_TRG_COM_TIM11_IRQHandler,"ax",%progbits
+ 273 .align 1
+ 274 .global TIM1_TRG_COM_TIM11_IRQHandler
+ 275 .syntax unified
+ 276 .thumb
+ 277 .thumb_func
+ 279 TIM1_TRG_COM_TIM11_IRQHandler:
+ 280 .LFB1194:
+ 227:Src/stm32f7xx_it.c ****
+ 228:Src/stm32f7xx_it.c **** /**
+ 229:Src/stm32f7xx_it.c **** * @brief This function handles TIM1 trigger and commutation interrupts and TIM11 global interrupt
+ 230:Src/stm32f7xx_it.c **** */
+ 231:Src/stm32f7xx_it.c **** void TIM1_TRG_COM_TIM11_IRQHandler(void)
+ 232:Src/stm32f7xx_it.c **** {
+ 281 .loc 1 232 1 view -0
+ 282 .cfi_startproc
+ 283 @ args = 0, pretend = 0, frame = 0
+ 284 @ frame_needed = 0, uses_anonymous_args = 0
+ 285 @ link register save eliminated.
+ 233:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 0 */
+ 234:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 0 */
+ 235:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM1_TRG_COM_TIM11_IRQn 1 */
+ 236:Src/stm32f7xx_it.c ****
+ 237:Src/stm32f7xx_it.c **** /* USER CODE END TIM1_TRG_COM_TIM11_IRQn 1 */
+ 238:Src/stm32f7xx_it.c **** }
+ 286 .loc 1 238 1 view .LVU36
+ 287 0000 7047 bx lr
+ 288 .cfi_endproc
+ 289 .LFE1194:
+ 291 .section .text.TIM2_IRQHandler,"ax",%progbits
+ 292 .align 1
+ 293 .global TIM2_IRQHandler
+ 294 .syntax unified
+ ARM GAS /tmp/ccnmuCkZ.s page 10
+
+
+ 295 .thumb
+ 296 .thumb_func
+ 298 TIM2_IRQHandler:
+ 299 .LFB1195:
+ 239:Src/stm32f7xx_it.c ****
+ 240:Src/stm32f7xx_it.c **** /**
+ 241:Src/stm32f7xx_it.c **** * @brief This function handles TIM2 global interrupt.
+ 242:Src/stm32f7xx_it.c **** */
+ 243:Src/stm32f7xx_it.c **** void TIM2_IRQHandler(void)
+ 244:Src/stm32f7xx_it.c **** {
+ 300 .loc 1 244 1 view -0
+ 301 .cfi_startproc
+ 302 @ args = 0, pretend = 0, frame = 0
+ 303 @ frame_needed = 0, uses_anonymous_args = 0
+ 304 @ link register save eliminated.
+ 245:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 0 */
+ 246:Src/stm32f7xx_it.c ****
+ 247:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 0 */
+ 248:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM2_IRQn 1 */
+ 249:Src/stm32f7xx_it.c ****
+ 250:Src/stm32f7xx_it.c **** /* USER CODE END TIM2_IRQn 1 */
+ 251:Src/stm32f7xx_it.c **** }
+ 305 .loc 1 251 1 view .LVU38
+ 306 0000 7047 bx lr
+ 307 .cfi_endproc
+ 308 .LFE1195:
+ 310 .section .text.USART1_IRQHandler,"ax",%progbits
+ 311 .align 1
+ 312 .global USART1_IRQHandler
+ 313 .syntax unified
+ 314 .thumb
+ 315 .thumb_func
+ 317 USART1_IRQHandler:
+ 318 .LFB1196:
+ 252:Src/stm32f7xx_it.c ****
+ 253:Src/stm32f7xx_it.c **** /**
+ 254:Src/stm32f7xx_it.c **** * @brief This function handles USART1 global interrupt.
+ 255:Src/stm32f7xx_it.c **** */
+ 256:Src/stm32f7xx_it.c **** void USART1_IRQHandler(void)
+ 257:Src/stm32f7xx_it.c **** {
+ 319 .loc 1 257 1 view -0
+ 320 .cfi_startproc
+ 321 @ args = 0, pretend = 0, frame = 0
+ 322 @ frame_needed = 0, uses_anonymous_args = 0
+ 323 0000 08B5 push {r3, lr}
+ 324 .LCFI2:
+ 325 .cfi_def_cfa_offset 8
+ 326 .cfi_offset 3, -8
+ 327 .cfi_offset 14, -4
+ 258:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
+ 259:Src/stm32f7xx_it.c **** uint8_t discarded_byte = 0u;
+ 328 .loc 1 259 3 view .LVU40
+ 329 .LVL3:
+ 260:Src/stm32f7xx_it.c **** uint8_t uart_error_detected = 0u;
+ 330 .loc 1 260 3 view .LVU41
+ 261:Src/stm32f7xx_it.c ****
+ 262:Src/stm32f7xx_it.c **** if (LL_USART_IsActiveFlag_PE(USART1))
+ ARM GAS /tmp/ccnmuCkZ.s page 11
+
+
+ 331 .loc 1 262 3 view .LVU42
+ 332 .LBB62:
+ 333 .LBI62:
+ 334 .file 2 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @file stm32f7xx_ll_usart.h
@@ -5098,10 +657,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Private macros ------------------------------------------------------------*/
52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USE_FULL_LL_DRIVER)
- ARM GAS /tmp/ccMf3LkY.s page 86
-
-
53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Private_Macros USART Private Macros
+ ARM GAS /tmp/ccnmuCkZ.s page 12
+
+
54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5158,10 +717,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t OverSampling; /*!< Specifies whether USART oversampling mode is 16 or 8.
109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_OVERSA
- ARM GAS /tmp/ccMf3LkY.s page 87
-
-
110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 13
+
+
111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary
112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetOverSampling().*/
113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -5218,10 +777,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_PECF USART_ICR_PECF /*!< Parity error cle
- ARM GAS /tmp/ccMf3LkY.s page 88
-
-
167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_FECF USART_ICR_FECF /*!< Framing error cl
+ ARM GAS /tmp/ccnmuCkZ.s page 14
+
+
168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_NCF USART_ICR_NCF /*!< Noise error dete
169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error cl
170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detect
@@ -5278,10 +837,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TCBGT USART_ISR_TCBGT /*!< Transmission com
223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */
- ARM GAS /tmp/ccMf3LkY.s page 89
-
-
224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 15
+
+
225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -5338,10 +897,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_IDLELINE 0x00000000U /*!< USART wake up from Mute
280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< USART wake up from Mute
- ARM GAS /tmp/ccMf3LkY.s page 90
-
-
281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 16
+
+
282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -5398,10 +957,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_LOW 0x00000000U /*!< Steady low value on SCLK
- ARM GAS /tmp/ccMf3LkY.s page 91
-
-
338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_POLARITY_HIGH USART_CR2_CPOL /*!< Steady high value on SCL
+ ARM GAS /tmp/ccnmuCkZ.s page 17
+
+
339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -5458,10 +1017,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/rece
394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/rece
- ARM GAS /tmp/ccMf3LkY.s page 92
-
-
395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 18
+
+
396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -5518,10 +1077,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 93
-
-
452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 19
+
+
453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LINBREAK_DETECT LIN Break Detection Length
454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -5578,10 +1137,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Register value
507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
- ARM GAS /tmp/ccMf3LkY.s page 94
-
-
509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 20
+
+
510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -5638,10 +1197,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 95
-
-
566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART Disable (all USART prescalers and outputs are disabled)
+ ARM GAS /tmp/ccnmuCkZ.s page 21
+
+
567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note When USART is disabled, USART prescalers and outputs are stopped immediately,
568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * and current operations are discarded. The configuration of the USART is kept, but all t
569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * flags, in the USARTx_ISR are set to their default values.
@@ -5698,10 +1257,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART is enabled in STOP Mode (able to wake up MCU from Stop mode or not)
622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
- ARM GAS /tmp/ccMf3LkY.s page 96
-
-
623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
+ ARM GAS /tmp/ccnmuCkZ.s page 22
+
+
624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 UESM LL_USART_IsEnabledInStopMode
625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
@@ -5758,10 +1317,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDirectionRx(USART_TypeDef *USARTx)
678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_RE);
- ARM GAS /tmp/ccMf3LkY.s page 97
-
-
680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 23
+
+
681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Receiver Disable
@@ -5818,10 +1377,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return enabled/disabled states of Transmitter and Receiver
735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_GetTransferDirection\n
736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_GetTransferDirection
- ARM GAS /tmp/ccMf3LkY.s page 98
-
-
737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
+ ARM GAS /tmp/ccnmuCkZ.s page 24
+
+
738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_NONE
740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DIRECTION_RX
@@ -5878,10 +1437,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetWakeUpMethod(USART_TypeDef *USARTx, uint32_t Method)
793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 99
-
-
794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_WAKE, Method);
+ ARM GAS /tmp/ccnmuCkZ.s page 25
+
+
795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -5938,10 +1497,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_MME);
850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 100
-
-
851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 26
+
+
852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 MME LL_USART_DisableMuteMode
@@ -5998,10 +1557,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBCL LL_USART_SetLastClkPulseOutput
906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param LastBitClockPulse This parameter can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 101
-
-
908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_NO_OUTPUT
+ ARM GAS /tmp/ccnmuCkZ.s page 27
+
+
909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LASTCLKPULSE_OUTPUT
910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -6058,10 +1617,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 102
-
-
965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select the polarity of the clock output on the SCLK pin in synchronous mode
+ ARM GAS /tmp/ccnmuCkZ.s page 28
+
+
966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance.
968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPOL LL_USART_SetClockPolarity
@@ -6118,10 +1677,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL, Phase | Polarity | LBCP
1021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 103
-
-
1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 29
+
+
1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Clock output on SCLK pin
1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
@@ -6178,10 +1737,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 104
-
-
1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve the length of the stop bits
+ ARM GAS /tmp/ccnmuCkZ.s page 30
+
+
1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 STOP LL_USART_GetStopBitsLength
1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
@@ -6238,10 +1797,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_TXRX_SWAPPED
1134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 105
-
-
1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXRXSwap(USART_TypeDef *USARTx, uint32_t SwapConfig)
+ ARM GAS /tmp/ccnmuCkZ.s page 31
+
+
1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_SWAP, SwapConfig);
1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -6298,10 +1857,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTXPinLevel(USART_TypeDef *USARTx, uint32_t PinInvMethod)
1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_TXINV, PinInvMethod);
- ARM GAS /tmp/ccMf3LkY.s page 106
-
-
1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 32
+
+
1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve TX pin active level logic configuration
@@ -6358,10 +1917,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetTransferBitOrder(USART_TypeDef *USARTx, uint32_t BitOrder)
1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 107
-
-
1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
+ ARM GAS /tmp/ccnmuCkZ.s page 33
+
+
1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -6418,10 +1977,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_ABREN) == (USART_CR2_ABREN)) ? 1UL : 0UL);
1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccMf3LkY.s page 108
-
-
1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 34
+
+
1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Auto Baud-Rate mode bits
1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
@@ -6478,10 +2037,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_RTOEN);
1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccMf3LkY.s page 109
-
-
1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 35
+
+
1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if Receiver Timeout feature is enabled
1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_IsEnabledRxTimeout
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -6538,10 +2097,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
- ARM GAS /tmp/ccMf3LkY.s page 110
-
-
1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ADDM7 LL_USART_GetNodeAddressLen
+ ARM GAS /tmp/ccnmuCkZ.s page 36
+
+
1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_ADDRESS_DETECT_4B
@@ -6598,10 +2157,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_DisableCTSHWFlowCtrl
1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccMf3LkY.s page 111
-
-
1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 37
+
+
1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableCTSHWFlowCtrl(USART_TypeDef *USARTx)
1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_CTSE);
@@ -6658,10 +2217,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable One bit sampling method
1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 ONEBIT LL_USART_DisableOneBitSamp
- ARM GAS /tmp/ccMf3LkY.s page 112
-
-
1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
+ ARM GAS /tmp/ccnmuCkZ.s page 38
+
+
1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOneBitSamp(USART_TypeDef *USARTx)
@@ -6718,10 +2277,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
- ARM GAS /tmp/ccMf3LkY.s page 113
-
-
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance.
+ ARM GAS /tmp/ccnmuCkZ.s page 39
+
+
1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 WUS LL_USART_SetWKUPType
1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Type This parameter can be one of the following values:
@@ -6778,10 +2337,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (OverSampling == LL_USART_OVERSAMPLING_8)
1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)(__LL_USART_DIV_SAMPLING8(PeriphClk, BaudRate));
- ARM GAS /tmp/ccMf3LkY.s page 114
-
-
1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U;
+ ARM GAS /tmp/ccnmuCkZ.s page 40
+
+
1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U);
1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USARTx->BRR = brrtemp;
1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -6838,10 +2397,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll RTOR RTO LL_USART_SetRxTimeout
1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Timeout Value between Min_Data=0x00 and Max_Data=0x00FFFFFF
- ARM GAS /tmp/ccMf3LkY.s page 115
-
-
1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
+ ARM GAS /tmp/ccnmuCkZ.s page 41
+
+
1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetRxTimeout(USART_TypeDef *USARTx, uint32_t Timeout)
1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -6898,10 +2457,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 116
-
-
1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIrda(USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccnmuCkZ.s page 42
+
+
1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_IREN);
1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -6958,10 +2517,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_NORMAL
1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE
1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 117
-
-
1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetIrdaPowerMode(const USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccnmuCkZ.s page 43
+
+
1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_IRLP));
1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -7018,10 +2577,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard NACK transmission
- ARM GAS /tmp/ccMf3LkY.s page 118
-
-
1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
+ ARM GAS /tmp/ccnmuCkZ.s page 44
+
+
1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 NACK LL_USART_DisableSmartcardNACK
1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -7078,10 +2637,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_IsEnabledSmartcard
1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccMf3LkY.s page 119
-
-
1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 45
+
+
1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSmartcard(const USART_TypeDef *USARTx)
1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_SCEN) == (USART_CR3_SCEN)) ? 1UL : 0UL);
@@ -7138,10 +2697,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Smartcard prescaler value, used for dividing the USART clock
1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value)
1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
- ARM GAS /tmp/ccMf3LkY.s page 120
-
-
1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
+ ARM GAS /tmp/ccnmuCkZ.s page 46
+
+
1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll GTPR PSC LL_USART_GetSmartcardPrescaler
1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Smartcard prescaler value (Value between Min_Data=0 and Max_Data=31)
@@ -7198,10 +2757,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableHalfDuplex(USART_TypeDef *USARTx)
2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 121
-
-
2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
+ ARM GAS /tmp/ccnmuCkZ.s page 47
+
+
2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -7258,10 +2817,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return LIN Break Detection Length
2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
- ARM GAS /tmp/ccMf3LkY.s page 122
-
-
2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_GetLINBrkDetectionLen
+ ARM GAS /tmp/ccnmuCkZ.s page 48
+
+
2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_LINBREAK_DETECT_10B
@@ -7318,10 +2877,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 123
-
-
2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 49
+
+
2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits)
2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
@@ -7378,10 +2937,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Driver Enable (DE) Mode
- ARM GAS /tmp/ccMf3LkY.s page 124
-
-
2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
+ ARM GAS /tmp/ccnmuCkZ.s page 50
+
+
2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance.
2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEM LL_USART_EnableDEMode
2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -7438,10 +2997,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Driver Enable Polarity
2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not
2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance.
- ARM GAS /tmp/ccMf3LkY.s page 125
-
-
2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_GetDESignalPolarity
+ ARM GAS /tmp/ccnmuCkZ.s page 51
+
+
2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DE_POLARITY_HIGH
@@ -7498,10 +3057,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Synchronous Mode
2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In Synchronous mode, the following bits must be kept cleared:
- ARM GAS /tmp/ccMf3LkY.s page 126
-
-
2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register,
+ ARM GAS /tmp/ccnmuCkZ.s page 52
+
+
2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register,
2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register,
2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register.
@@ -7558,10 +3117,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, LIN Break Detection Length, ...) should be set using
2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions
2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CLKEN LL_USART_ConfigLINMode\n
- ARM GAS /tmp/ccMf3LkY.s page 127
-
-
2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 STOP LL_USART_ConfigLINMode\n
+ ARM GAS /tmp/ccnmuCkZ.s page 53
+
+
2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 LINEN LL_USART_ConfigLINMode\n
2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigLINMode\n
2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigLINMode\n
@@ -7618,10 +3177,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_SCEN | USART_CR3_IREN));
2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* set the UART/USART in Half Duplex mode */
2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_HDSEL);
- ARM GAS /tmp/ccMf3LkY.s page 128
-
-
2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 54
+
+
2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in Smartcard Mode
@@ -7678,10 +3237,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_IRDA_INSTANCE(USARTx) can be used to check whether or not
2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance.
2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
- ARM GAS /tmp/ccMf3LkY.s page 129
-
-
2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function
+ ARM GAS /tmp/ccnmuCkZ.s page 55
+
+
2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear CLKEN in CR2 using @ref LL_USART_DisableSCLKOutput() function
2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear SCEN in CR3 using @ref LL_USART_DisableSmartcard() function
2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear HDSEL in CR3 using @ref LL_USART_DisableHalfDuplex() function
@@ -7738,10 +3297,10 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 130
-
-
2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigMultiProcessMode(USART_TypeDef *USARTx)
+ ARM GAS /tmp/ccnmuCkZ.s page 56
+
+
2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* In Multi Processor mode, the following bits must be kept cleared:
2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN and CLKEN bits in the USART_CR2 register,
@@ -7766,8 +3325,26 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_PE(const USART_TypeDef *USARTx)
+ 335 .loc 2 2585 26 view .LVU43
+ 336 .LBB63:
2586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)) ? 1UL : 0UL);
+ 337 .loc 2 2587 3 view .LVU44
+ 338 .loc 2 2587 12 is_stmt 0 view .LVU45
+ 339 0002 2B4B ldr r3, .L37
+ 340 0004 DB69 ldr r3, [r3, #28]
+ 341 .loc 2 2587 73 view .LVU46
+ 342 0006 13F0010F tst r3, #1
+ 343 000a 2AD0 beq .L34
+ 344 .LVL4:
+ 345 .loc 2 2587 73 view .LVU47
+ 346 .LBE63:
+ 347 .LBE62:
+ 263:Src/stm32f7xx_it.c **** {
+ 264:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_PE(USART1);
+ 348 .loc 1 264 5 is_stmt 1 view .LVU48
+ 349 .LBB64:
+ 350 .LBI64:
2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -7781,6 +3358,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL);
2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 57
+
+
2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Noise error detected Flag is set or not
2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR NE LL_USART_IsActiveFlag_NE
@@ -7798,9 +3378,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 131
-
-
2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_ORE(const USART_TypeDef *USARTx)
2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)) ? 1UL : 0UL);
@@ -7841,6 +3418,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Data Register Empty Flag is set or not
+ ARM GAS /tmp/ccnmuCkZ.s page 58
+
+
2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE
2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
@@ -7858,9 +3438,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 132
-
-
2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_LBD(const USART_TypeDef *USARTx)
2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_LBDF) == (USART_ISR_LBDF)) ? 1UL : 0UL);
@@ -7901,6 +3478,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx)
2713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL);
+ ARM GAS /tmp/ccnmuCkZ.s page 59
+
+
2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -7918,9 +3498,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Auto-Baud Rate Error Flag is set or not
- ARM GAS /tmp/ccMf3LkY.s page 133
-
-
2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR ABRE LL_USART_IsActiveFlag_ABRE
@@ -7961,6 +3538,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM
2770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
+ ARM GAS /tmp/ccnmuCkZ.s page 60
+
+
2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx)
2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -7978,9 +3558,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)) ? 1UL : 0UL);
2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccMf3LkY.s page 134
-
-
2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Wake Up from mute mode Flag is set or not
2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR RWU LL_USART_IsActiveFlag_RWU
@@ -8021,6 +3598,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_ISR_REACK)
+ ARM GAS /tmp/ccnmuCkZ.s page 61
+
+
2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Enable Acknowledge Flag is set or not
2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR REACK LL_USART_IsActiveFlag_REACK
@@ -8038,9 +3618,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the Smartcard Transmission Complete Before Guard Time Flag is set or not
2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TCBGT LL_USART_IsActiveFlag_TCBGT
- ARM GAS /tmp/ccMf3LkY.s page 135
-
-
2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8057,8 +3634,52 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_PE(USART_TypeDef *USARTx)
+ 351 .loc 2 2861 22 view .LVU49
+ 352 .LBB65:
2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_PECF);
+ 353 .loc 2 2863 3 view .LVU50
+ 354 000c 0123 movs r3, #1
+ 355 000e 284A ldr r2, .L37
+ 356 0010 1362 str r3, [r2, #32]
+ 357 .LVL5:
+ 358 .loc 2 2863 3 is_stmt 0 view .LVU51
+ 359 .LBE65:
+ 360 .LBE64:
+ 265:Src/stm32f7xx_it.c **** uart_error_detected = 1u;
+ 361 .loc 1 265 5 is_stmt 1 view .LVU52
+ 362 .L24:
+ 266:Src/stm32f7xx_it.c **** }
+ 267:Src/stm32f7xx_it.c **** if (LL_USART_IsActiveFlag_FE(USART1))
+ 363 .loc 1 267 3 view .LVU53
+ 364 .LBB66:
+ 365 .LBI66:
+2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 366 .loc 2 2596 26 view .LVU54
+ 367 .LBB67:
+2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 62
+
+
+ 368 .loc 2 2598 3 view .LVU55
+2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 369 .loc 2 2598 12 is_stmt 0 view .LVU56
+ 370 0012 274A ldr r2, .L37
+ 371 0014 D269 ldr r2, [r2, #28]
+2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 372 .loc 2 2598 73 view .LVU57
+ 373 0016 12F0020F tst r2, #2
+ 374 001a 03D0 beq .L25
+ 375 .LVL6:
+2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 376 .loc 2 2598 73 view .LVU58
+ 377 .LBE67:
+ 378 .LBE66:
+ 268:Src/stm32f7xx_it.c **** {
+ 269:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_FE(USART1);
+ 379 .loc 1 269 5 is_stmt 1 view .LVU59
+ 380 .LBB68:
+ 381 .LBI68:
2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8068,8 +3689,57 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_FE(USART_TypeDef *USARTx)
+ 382 .loc 2 2872 22 view .LVU60
+ 383 .LBB69:
2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_FECF);
+ 384 .loc 2 2874 3 view .LVU61
+ 385 001c 244B ldr r3, .L37
+ 386 .LVL7:
+ 387 .loc 2 2874 3 is_stmt 0 view .LVU62
+ 388 001e 0222 movs r2, #2
+ 389 0020 1A62 str r2, [r3, #32]
+ 390 .LVL8:
+ 391 .loc 2 2874 3 view .LVU63
+ 392 .LBE69:
+ 393 .LBE68:
+ 270:Src/stm32f7xx_it.c **** uart_error_detected = 1u;
+ 394 .loc 1 270 5 is_stmt 1 view .LVU64
+ 395 .loc 1 270 25 is_stmt 0 view .LVU65
+ 396 0022 0123 movs r3, #1
+ 397 .LVL9:
+ 398 .L25:
+ 271:Src/stm32f7xx_it.c **** }
+ 272:Src/stm32f7xx_it.c **** if (LL_USART_IsActiveFlag_NE(USART1))
+ 399 .loc 1 272 3 is_stmt 1 view .LVU66
+ 400 .LBB70:
+ 401 .LBI70:
+2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 402 .loc 2 2607 26 view .LVU67
+ 403 .LBB71:
+2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 63
+
+
+ 404 .loc 2 2609 3 view .LVU68
+2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 405 .loc 2 2609 12 is_stmt 0 view .LVU69
+ 406 0024 224A ldr r2, .L37
+ 407 0026 D269 ldr r2, [r2, #28]
+2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 408 .loc 2 2609 73 view .LVU70
+ 409 0028 12F0040F tst r2, #4
+ 410 002c 03D0 beq .L26
+ 411 .LVL10:
+2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 412 .loc 2 2609 73 view .LVU71
+ 413 .LBE71:
+ 414 .LBE70:
+ 273:Src/stm32f7xx_it.c **** {
+ 274:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_NE(USART1);
+ 415 .loc 1 274 5 is_stmt 1 view .LVU72
+ 416 .LBB72:
+ 417 .LBI72:
2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8079,8 +3749,100 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx)
+ 418 .loc 2 2883 22 view .LVU73
+ 419 .LBB73:
2884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_NCF);
+ 420 .loc 2 2885 3 view .LVU74
+ 421 002e 204B ldr r3, .L37
+ 422 .LVL11:
+ 423 .loc 2 2885 3 is_stmt 0 view .LVU75
+ 424 0030 0422 movs r2, #4
+ 425 0032 1A62 str r2, [r3, #32]
+ 426 .LVL12:
+ 427 .loc 2 2885 3 view .LVU76
+ 428 .LBE73:
+ 429 .LBE72:
+ 275:Src/stm32f7xx_it.c **** uart_error_detected = 1u;
+ 430 .loc 1 275 5 is_stmt 1 view .LVU77
+ 431 .loc 1 275 25 is_stmt 0 view .LVU78
+ 432 0034 0123 movs r3, #1
+ 433 .LVL13:
+ 434 .L26:
+ 276:Src/stm32f7xx_it.c **** }
+ 277:Src/stm32f7xx_it.c **** if (LL_USART_IsActiveFlag_ORE(USART1))
+ 435 .loc 1 277 3 is_stmt 1 view .LVU79
+ 436 .LBB74:
+ 437 .LBI74:
+2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 438 .loc 2 2618 26 view .LVU80
+ 439 .LBB75:
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 64
+
+
+ 440 .loc 2 2620 3 view .LVU81
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 441 .loc 2 2620 12 is_stmt 0 view .LVU82
+ 442 0036 1E4A ldr r2, .L37
+ 443 0038 D269 ldr r2, [r2, #28]
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 444 .loc 2 2620 75 view .LVU83
+ 445 003a 12F0080F tst r2, #8
+ 446 003e 12D1 bne .L27
+ 447 .LVL14:
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 448 .loc 2 2620 75 view .LVU84
+ 449 .LBE75:
+ 450 .LBE74:
+ 278:Src/stm32f7xx_it.c **** {
+ 279:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_ORE(USART1);
+ 280:Src/stm32f7xx_it.c **** uart_error_detected = 1u;
+ 281:Src/stm32f7xx_it.c **** }
+ 282:Src/stm32f7xx_it.c ****
+ 283:Src/stm32f7xx_it.c **** if (uart_error_detected != 0u)
+ 451 .loc 1 283 3 is_stmt 1 view .LVU85
+ 452 .loc 1 283 6 is_stmt 0 view .LVU86
+ 453 0040 A3B9 cbnz r3, .L28
+ 284:Src/stm32f7xx_it.c **** {
+ 285:Src/stm32f7xx_it.c **** if (LL_USART_IsActiveFlag_RXNE(USART1))
+ 286:Src/stm32f7xx_it.c **** {
+ 287:Src/stm32f7xx_it.c **** discarded_byte = LL_USART_ReceiveData8(USART1);
+ 288:Src/stm32f7xx_it.c **** (void)discarded_byte;
+ 289:Src/stm32f7xx_it.c **** }
+ 290:Src/stm32f7xx_it.c **** app_on_uart_error();
+ 291:Src/stm32f7xx_it.c **** }
+ 292:Src/stm32f7xx_it.c **** else if (LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
+ 454 .loc 1 292 8 is_stmt 1 view .LVU87
+ 455 .LVL15:
+ 456 .LBB76:
+ 457 .LBI76:
+2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 458 .loc 2 2640 26 view .LVU88
+ 459 .LBB77:
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 460 .loc 2 2642 3 view .LVU89
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 461 .loc 2 2642 12 is_stmt 0 view .LVU90
+ 462 0042 1B4B ldr r3, .L37
+ 463 .LVL16:
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 464 .loc 2 2642 12 view .LVU91
+ 465 0044 DB69 ldr r3, [r3, #28]
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 466 .loc 2 2642 77 view .LVU92
+ 467 0046 13F0200F tst r3, #32
+ 468 004a 19D0 beq .L32
+ 469 .LVL17:
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 470 .loc 2 2642 77 view .LVU93
+ 471 .LBE77:
+ 472 .LBE76:
+ ARM GAS /tmp/ccnmuCkZ.s page 65
+
+
+ 473 .LBB78:
+ 474 .LBI78:
2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8098,9 +3860,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear IDLE line detected Flag
2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR IDLECF LL_USART_ClearFlag_IDLE
2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccMf3LkY.s page 136
-
-
2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_IDLE(USART_TypeDef *USARTx)
@@ -8139,6 +3898,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD
2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
+ ARM GAS /tmp/ccnmuCkZ.s page 66
+
+
2941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx)
@@ -8158,9 +3920,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_CTSCF);
2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 137
-
-
2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Receiver Time Out Flag
@@ -8199,6 +3958,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE)
+ ARM GAS /tmp/ccnmuCkZ.s page 67
+
+
2998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Wake Up from stop mode Flag
3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not
@@ -8218,9 +3980,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccMf3LkY.s page 138
-
-
3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_IT_Management IT_Management
3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8259,6 +4018,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 68
+
+
3055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable TX Empty Interrupt
3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE
3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -8278,9 +4040,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableIT_PE(USART_TypeDef *USARTx)
3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_PEIE);
- ARM GAS /tmp/ccMf3LkY.s page 139
-
-
3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8319,6 +4078,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 69
+
+
3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable LIN Break Detection Interrupt
3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not
3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance.
@@ -8338,9 +4100,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 0: Interrupt is inhibited
3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the USARTx_ISR register.
3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_EnableIT_ERROR
- ARM GAS /tmp/ccMf3LkY.s page 140
-
-
3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8379,6 +4138,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
+ ARM GAS /tmp/ccnmuCkZ.s page 70
+
+
3169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8398,9 +4160,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable IDLE Interrupt
3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 IDLEIE LL_USART_DisableIT_IDLE
- ARM GAS /tmp/ccMf3LkY.s page 141
-
-
3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8439,6 +4198,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx)
3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 71
+
+
3226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE);
3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -8458,9 +4220,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 CMIE LL_USART_DisableIT_CM
3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccMf3LkY.s page 142
-
-
3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_CM(USART_TypeDef *USARTx)
3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -8499,6 +4258,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 72
+
+
3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx)
3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE);
@@ -8518,9 +4280,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_EIE);
3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 143
-
-
3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable CTS Interrupt
@@ -8559,6 +4318,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not
3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance.
3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT
+ ARM GAS /tmp/ccnmuCkZ.s page 73
+
+
3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8578,9 +4340,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)) ? 1UL : 0UL);
3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 144
-
-
3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART RX Not Empty Interrupt is enabled or disabled.
@@ -8589,8 +4348,26 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
3365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_RXNE(const USART_TypeDef *USARTx)
+ 475 .loc 2 3366 26 is_stmt 1 view .LVU94
+ 476 .LBB79:
3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)) ? 1U : 0U);
+ 477 .loc 2 3368 3 view .LVU95
+ 478 .loc 2 3368 12 is_stmt 0 view .LVU96
+ 479 004c 184B ldr r3, .L37
+ 480 004e 1B68 ldr r3, [r3]
+ 481 .loc 2 3368 80 view .LVU97
+ 482 0050 13F0200F tst r3, #32
+ 483 0054 14D0 beq .L32
+ 484 .LVL18:
+ 485 .loc 2 3368 80 view .LVU98
+ 486 .LBE79:
+ 487 .LBE78:
+ 293:Src/stm32f7xx_it.c **** {
+ 294:Src/stm32f7xx_it.c **** app_on_uart_byte(LL_USART_ReceiveData8(USART1));
+ 488 .loc 1 294 5 is_stmt 1 view .LVU99
+ 489 .LBB80:
+ 490 .LBI80:
3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8601,6 +4378,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_TC(const USART_TypeDef *USARTx)
3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 74
+
+
3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)) ? 1UL : 0UL);
3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -8638,9 +4418,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 145
-
-
3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receiver Timeout Interrupt is enabled or disabled.
3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RTOIE LL_USART_IsEnabledIT_RTO
3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -8661,6 +4438,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_EOB(const USART_TypeDef *USARTx)
3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 75
+
+
3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR1, USART_CR1_EOBIE) == (USART_CR1_EOBIE)) ? 1UL : 0UL);
3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -8698,9 +4478,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_CTS(const USART_TypeDef *USARTx)
3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 146
-
-
3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)) ? 1UL : 0UL);
3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -8721,6 +4498,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */
3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */
+ ARM GAS /tmp/ccnmuCkZ.s page 76
+
+
3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT)
3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */
3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -8758,9 +4538,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable DMA Mode for reception
- ARM GAS /tmp/ccMf3LkY.s page 147
-
-
3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAR LL_USART_DisableDMAReq_RX
3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
@@ -8781,6 +4558,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)) ? 1UL : 0UL);
3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 77
+
+
3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Mode for transmission
3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DMAT LL_USART_EnableDMAReq_TX
@@ -8818,9 +4598,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable DMA Disabling on Reception Error
3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_EnableDMADeactOnRxErr
3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccMf3LkY.s page 148
-
-
3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableDMADeactOnRxErr(USART_TypeDef *USARTx)
@@ -8841,6 +4618,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
3605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if DMA Disabling on Reception Error is disabled
+ ARM GAS /tmp/ccnmuCkZ.s page 78
+
+
3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DDRE LL_USART_IsEnabledDMADeactOnRxErr
3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
@@ -8878,9 +4658,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return data_reg_addr;
3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccMf3LkY.s page 149
-
-
3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -8896,1638 +4673,208 @@ ARM GAS /tmp/ccMf3LkY.s page 1
3656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF
3657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint8_t LL_USART_ReceiveData8(const USART_TypeDef *USARTx)
- 633 .loc 3 3658 25 view .LVU106
- 634 .LBB67:
+ 491 .loc 2 3658 25 view .LVU100
+ 492 .LBB81:
3659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint8_t)(READ_BIT(USARTx->RDR, USART_RDR_RDR) & 0xFFU);
- 635 .loc 3 3660 3 view .LVU107
- 636 .loc 3 3660 20 is_stmt 0 view .LVU108
- 637 0002 9A4B ldr r3, .L116
- 638 0004 5A6A ldr r2, [r3, #36]
- 639 .loc 3 3660 10 view .LVU109
- 640 0006 D2B2 uxtb r2, r2
- 641 .LVL18:
- 642 .loc 3 3660 10 view .LVU110
- 643 .LBE67:
- 644 .LBE66:
- 645 .loc 1 437 14 discriminator 1 view .LVU111
- 646 0008 994B ldr r3, .L116+4
- 647 000a 1A70 strb r2, [r3]
- 438:Src/stm32f7xx_it.c **** switch (UART_rec_incr)
- 648 .loc 1 438 5 is_stmt 1 view .LVU112
- 649 000c 994B ldr r3, .L116+8
- 650 000e 1B88 ldrh r3, [r3]
- 651 0010 1F2B cmp r3, #31
- 652 0012 00F22B82 bhi .L49
- 653 0016 DFE813F0 tbh [pc, r3, lsl #1]
- 654 .L51:
- 655 001a 2000 .2byte (.L55-.L51)/2
- 656 001c 2F00 .2byte (.L54-.L51)/2
- 657 001e 2902 .2byte (.L49-.L51)/2
- 658 0020 2902 .2byte (.L49-.L51)/2
- 659 0022 2902 .2byte (.L49-.L51)/2
- 660 0024 2902 .2byte (.L49-.L51)/2
- 661 0026 2902 .2byte (.L49-.L51)/2
- 662 0028 2902 .2byte (.L49-.L51)/2
- 663 002a 2902 .2byte (.L49-.L51)/2
- 664 002c C700 .2byte (.L53-.L51)/2
- 665 002e 2902 .2byte (.L49-.L51)/2
- 666 0030 2902 .2byte (.L49-.L51)/2
- 667 0032 2902 .2byte (.L49-.L51)/2
- 668 0034 2902 .2byte (.L49-.L51)/2
- 669 0036 2902 .2byte (.L49-.L51)/2
- 670 0038 2902 .2byte (.L49-.L51)/2
- 671 003a 2902 .2byte (.L49-.L51)/2
- ARM GAS /tmp/ccMf3LkY.s page 150
+ 493 .loc 2 3660 3 view .LVU101
+ ARM GAS /tmp/ccnmuCkZ.s page 79
- 672 003c 2902 .2byte (.L49-.L51)/2
- 673 003e 2902 .2byte (.L49-.L51)/2
- 674 0040 2902 .2byte (.L49-.L51)/2
- 675 0042 2902 .2byte (.L49-.L51)/2
- 676 0044 2902 .2byte (.L49-.L51)/2
- 677 0046 2902 .2byte (.L49-.L51)/2
- 678 0048 2902 .2byte (.L49-.L51)/2
- 679 004a 2902 .2byte (.L49-.L51)/2
- 680 004c 2902 .2byte (.L49-.L51)/2
- 681 004e 2902 .2byte (.L49-.L51)/2
- 682 0050 2902 .2byte (.L49-.L51)/2
- 683 0052 2902 .2byte (.L49-.L51)/2
- 684 0054 9601 .2byte (.L52-.L51)/2
- 685 0056 2902 .2byte (.L49-.L51)/2
- 686 0058 EF01 .2byte (.L50-.L51)/2
- 687 .p2align 1
- 688 .L55:
- 439:Src/stm32f7xx_it.c **** {
- 440:Src/stm32f7xx_it.c **** case 0:
- 441:Src/stm32f7xx_it.c **** TO6_uart = TO6;//Save the time of start rec. command
- 689 .loc 1 441 9 view .LVU113
- 690 .loc 1 441 18 is_stmt 0 view .LVU114
- 691 005a 8749 ldr r1, .L116+12
- 692 005c 0868 ldr r0, [r1]
- 693 005e 8749 ldr r1, .L116+16
- 694 0060 0860 str r0, [r1]
- 442:Src/stm32f7xx_it.c **** flg_tmt = 1;//Set the timeout flag
- 695 .loc 1 442 9 is_stmt 1 view .LVU115
- 696 .loc 1 442 17 is_stmt 0 view .LVU116
- 697 0062 8749 ldr r1, .L116+20
- 698 0064 0120 movs r0, #1
- 699 0066 0870 strb r0, [r1]
- 443:Src/stm32f7xx_it.c **** UART_header = uart_buf;
- 700 .loc 1 443 9 is_stmt 1 view .LVU117
- 701 .loc 1 443 21 is_stmt 0 view .LVU118
- 702 0068 8649 ldr r1, .L116+24
- 703 006a 0A80 strh r2, [r1] @ movhi
- 444:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 704 .loc 1 444 9 is_stmt 1 view .LVU119
- 705 .loc 1 444 22 is_stmt 0 view .LVU120
- 706 006c 0344 add r3, r3, r0
- 707 006e 814A ldr r2, .L116+8
- 708 0070 1380 strh r3, [r2] @ movhi
- 445:Src/stm32f7xx_it.c **** break;
- 709 .loc 1 445 5 is_stmt 1 view .LVU121
- 710 .L48:
- 446:Src/stm32f7xx_it.c **** case 1:
- 447:Src/stm32f7xx_it.c **** UART_header += ((uint16_t)uart_buf<<8);
- 448:Src/stm32f7xx_it.c **** switch (UART_header)
- 449:Src/stm32f7xx_it.c **** {
- 450:Src/stm32f7xx_it.c **** case 0x1111: //received long packet
- 451:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 452:Src/stm32f7xx_it.c **** break;
- 453:Src/stm32f7xx_it.c **** case 0x2222: //Back to default
- 454:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 455:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 456:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;
- ARM GAS /tmp/ccMf3LkY.s page 151
-
-
- 457:Src/stm32f7xx_it.c **** break;
- 458:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA
- 459:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 460:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 461:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE;
- 462:Src/stm32f7xx_it.c **** break;
- 463:Src/stm32f7xx_it.c **** case 0x4444: //Received packet
- 464:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 465:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 466:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE;
- 467:Src/stm32f7xx_it.c **** break;
- 468:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA
- 469:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 470:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 471:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE;
- 472:Src/stm32f7xx_it.c **** break;
- 473:Src/stm32f7xx_it.c **** case 0x6666: //Request state
- 474:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 475:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 476:Src/stm32f7xx_it.c **** CPU_state = STATE;
- 477:Src/stm32f7xx_it.c **** break;
- 478:Src/stm32f7xx_it.c **** case 0x7777:
- 479:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 480:Src/stm32f7xx_it.c **** break;
- 481:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command
- 482:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 483:Src/stm32f7xx_it.c **** break;
- 484:Src/stm32f7xx_it.c **** case AD9833_CMD_HEADER: // AD9833 command
- 485:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 486:Src/stm32f7xx_it.c **** break;
- 487:Src/stm32f7xx_it.c **** case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
- 488:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 489:Src/stm32f7xx_it.c **** break;
- 490:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command
- 491:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 492:Src/stm32f7xx_it.c **** break;
- 493:Src/stm32f7xx_it.c **** case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command
- 494:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 495:Src/stm32f7xx_it.c **** break;
- 496:Src/stm32f7xx_it.c **** case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet
- 497:Src/stm32f7xx_it.c **** UART_rec_incr = 2;//timeout flag is still setting!
- 498:Src/stm32f7xx_it.c **** break;
- 499:Src/stm32f7xx_it.c **** default: //error decoding header
- 500:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 501:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 502:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01;
- 503:Src/stm32f7xx_it.c **** //CPU_state = HALT;
- 504:Src/stm32f7xx_it.c **** State_Data[0] |= UART_ERR;
- 505:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 506:Src/stm32f7xx_it.c **** break;
- 507:Src/stm32f7xx_it.c **** }
- 508:Src/stm32f7xx_it.c **** break;
- 509:Src/stm32f7xx_it.c ****
- 510:Src/stm32f7xx_it.c **** case (AD9102_CMD_8 - 1):
- 511:Src/stm32f7xx_it.c **** if (UART_header == AD9102_CMD_HEADER)
- 512:Src/stm32f7xx_it.c **** {
- 513:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- ARM GAS /tmp/ccMf3LkY.s page 152
-
-
- 514:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 515:Src/stm32f7xx_it.c **** else
- 516:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 517:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD;
- 518:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 519:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 520:Src/stm32f7xx_it.c **** }
- 521:Src/stm32f7xx_it.c **** else if (UART_header == AD9833_CMD_HEADER)
- 522:Src/stm32f7xx_it.c **** {
- 523:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 524:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 525:Src/stm32f7xx_it.c **** else
- 526:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 527:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD;
- 528:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 529:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 530:Src/stm32f7xx_it.c **** }
- 531:Src/stm32f7xx_it.c **** else if (UART_header == DS1809_CMD_HEADER)
- 532:Src/stm32f7xx_it.c **** {
- 533:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 534:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 535:Src/stm32f7xx_it.c **** else
- 536:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 537:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD;
- 538:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 539:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 540:Src/stm32f7xx_it.c **** }
- 541:Src/stm32f7xx_it.c **** else if (UART_header == STM32_DAC_CMD_HEADER)
- 542:Src/stm32f7xx_it.c **** {
- 543:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 544:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 545:Src/stm32f7xx_it.c **** else
- 546:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 547:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD;
- 548:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 549:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 550:Src/stm32f7xx_it.c **** }
- 551:Src/stm32f7xx_it.c **** else if (UART_header == AD9102_WAVE_CTRL_HEADER)
- 552:Src/stm32f7xx_it.c **** {
- 553:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 554:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 555:Src/stm32f7xx_it.c **** else
- 556:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 557:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD;
- 558:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 559:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 560:Src/stm32f7xx_it.c **** }
- 561:Src/stm32f7xx_it.c **** else
- 562:Src/stm32f7xx_it.c **** {
- 563:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0)
- 564:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 565:Src/stm32f7xx_it.c **** else
- 566:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 567:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 568:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 569:Src/stm32f7xx_it.c **** }
- 570:Src/stm32f7xx_it.c **** break;
- ARM GAS /tmp/ccMf3LkY.s page 153
-
-
- 571:Src/stm32f7xx_it.c ****
- 572:Src/stm32f7xx_it.c **** case (CL_8 - 1):
- 573:Src/stm32f7xx_it.c **** if (UART_header == 0x1111)
- 574:Src/stm32f7xx_it.c **** {
- 575:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 576:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 577:Src/stm32f7xx_it.c **** else
- 578:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 579:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE;
- 580:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 581:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 582:Src/stm32f7xx_it.c **** }
- 583:Src/stm32f7xx_it.c **** else if (UART_header == AD9102_WAVE_DATA_HEADER)
- 584:Src/stm32f7xx_it.c **** {
- 585:Src/stm32f7xx_it.c **** if ((UART_rec_incr & 0x0001) > 0)
- 586:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 587:Src/stm32f7xx_it.c **** else
- 588:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
- 589:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD;
- 590:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 591:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 592:Src/stm32f7xx_it.c **** }
- 593:Src/stm32f7xx_it.c **** else
- 594:Src/stm32f7xx_it.c **** {
- 595:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0)
- 596:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 597:Src/stm32f7xx_it.c **** else
- 598:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 599:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 600:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 601:Src/stm32f7xx_it.c **** }
- 602:Src/stm32f7xx_it.c **** break;
- 603:Src/stm32f7xx_it.c **** case (TSK_8 - 1):
- 604:Src/stm32f7xx_it.c **** if (UART_header == 0x7777)
- 605:Src/stm32f7xx_it.c **** {
- 606:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0)
- 607:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 608:Src/stm32f7xx_it.c **** else
- 609:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 610:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK;
- 611:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 612:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 613:Src/stm32f7xx_it.c **** }
- 614:Src/stm32f7xx_it.c **** else
- 615:Src/stm32f7xx_it.c **** {
- 616:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0)
- 617:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 618:Src/stm32f7xx_it.c **** else
- 619:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 620:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 621:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 622:Src/stm32f7xx_it.c **** }
- 623:Src/stm32f7xx_it.c **** break;
- 624:Src/stm32f7xx_it.c **** default:
- 625:Src/stm32f7xx_it.c **** if ((UART_rec_incr&0x0001)>0)
- 626:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 627:Src/stm32f7xx_it.c **** else
- ARM GAS /tmp/ccMf3LkY.s page 154
-
-
- 628:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] = (uint16_t)(uart_buf);
- 629:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 630:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 631:Src/stm32f7xx_it.c **** break;
- 632:Src/stm32f7xx_it.c **** }
- 633:Src/stm32f7xx_it.c **** // HAL_UART_Receive_IT(&huart1, &uart_buf, 1);
- 634:Src/stm32f7xx_it.c **** }
- 711 .loc 1 634 1 is_stmt 0 view .LVU122
- 712 0072 5DF8044B ldr r4, [sp], #4
- 713 .LCFI7:
- 714 .cfi_remember_state
- 715 .cfi_restore 4
- 716 .cfi_def_cfa_offset 0
- 717 0076 7047 bx lr
- 718 .L54:
- 719 .LCFI8:
- 720 .cfi_restore_state
- 447:Src/stm32f7xx_it.c **** switch (UART_header)
- 721 .loc 1 447 9 is_stmt 1 view .LVU123
- 447:Src/stm32f7xx_it.c **** switch (UART_header)
- 722 .loc 1 447 21 is_stmt 0 view .LVU124
- 723 0078 8249 ldr r1, .L116+24
- 724 007a 0B88 ldrh r3, [r1]
- 725 007c 03EB0223 add r3, r3, r2, lsl #8
- 726 0080 9BB2 uxth r3, r3
- 727 0082 0B80 strh r3, [r1] @ movhi
- 448:Src/stm32f7xx_it.c **** {
- 728 .loc 1 448 9 is_stmt 1 view .LVU125
- 729 0084 47F27772 movw r2, #30583
- 730 0088 9342 cmp r3, r2
- 731 008a 6BD0 beq .L57
- 732 008c 14D9 bls .L107
- 733 008e 4BF6BB32 movw r2, #48059
- 734 0092 9342 cmp r3, r2
- 735 0094 72D0 beq .L67
- 736 0096 35D8 bhi .L68
- 737 0098 49F69912 movw r2, #39321
- 738 009c 9342 cmp r3, r2
- 739 009e 65D0 beq .L69
- 740 00a0 4AF6AA22 movw r2, #43690
- 741 00a4 9342 cmp r3, r2
- 742 00a6 65D0 beq .L70
- 743 00a8 48F68802 movw r2, #34952
- 744 00ac 9342 cmp r3, r2
- 745 00ae 6DD1 bne .L64
- 482:Src/stm32f7xx_it.c **** break;
- 746 .loc 1 482 13 view .LVU126
- 482:Src/stm32f7xx_it.c **** break;
- 747 .loc 1 482 27 is_stmt 0 view .LVU127
- 748 00b0 704B ldr r3, .L116+8
- 749 00b2 0222 movs r2, #2
- 750 00b4 1A80 strh r2, [r3] @ movhi
- 483:Src/stm32f7xx_it.c **** case AD9833_CMD_HEADER: // AD9833 command
- 751 .loc 1 483 9 is_stmt 1 view .LVU128
- 752 00b6 DCE7 b .L48
- 753 .L107:
- 754 00b8 44F24442 movw r2, #17476
- ARM GAS /tmp/ccMf3LkY.s page 155
-
-
- 755 00bc 9342 cmp r3, r2
- 756 00be 3FD0 beq .L59
- 757 00c0 0FD8 bhi .L60
- 758 00c2 42F22222 movw r2, #8738
- 759 00c6 9342 cmp r3, r2
- 760 00c8 28D0 beq .L61
- 761 00ca 43F23332 movw r2, #13107
- 762 00ce 9342 cmp r3, r2
- 763 00d0 2DD0 beq .L62
- 764 00d2 41F21112 movw r2, #4369
- 765 00d6 9342 cmp r3, r2
- 766 00d8 58D1 bne .L64
- 451:Src/stm32f7xx_it.c **** break;
- 767 .loc 1 451 13 view .LVU129
- 451:Src/stm32f7xx_it.c **** break;
- 768 .loc 1 451 27 is_stmt 0 view .LVU130
- 769 00da 664B ldr r3, .L116+8
- 770 00dc 0222 movs r2, #2
- 771 00de 1A80 strh r2, [r3] @ movhi
- 452:Src/stm32f7xx_it.c **** case 0x2222: //Back to default
- 772 .loc 1 452 9 is_stmt 1 view .LVU131
- 773 00e0 C7E7 b .L48
- 774 .L60:
- 775 00e2 45F25552 movw r2, #21845
- 776 00e6 9342 cmp r3, r2
- 777 00e8 33D0 beq .L65
- 778 00ea 46F26662 movw r2, #26214
- 779 00ee 9342 cmp r3, r2
- 780 00f0 4CD1 bne .L64
- 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 781 .loc 1 474 13 view .LVU132
- 474:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 782 .loc 1 474 27 is_stmt 0 view .LVU133
- 783 00f2 0023 movs r3, #0
- 784 00f4 5F4A ldr r2, .L116+8
- 785 00f6 1380 strh r3, [r2] @ movhi
- 475:Src/stm32f7xx_it.c **** CPU_state = STATE;
- 786 .loc 1 475 13 is_stmt 1 view .LVU134
- 475:Src/stm32f7xx_it.c **** CPU_state = STATE;
- 787 .loc 1 475 21 is_stmt 0 view .LVU135
- 788 00f8 614A ldr r2, .L116+20
- 789 00fa 1370 strb r3, [r2]
- 476:Src/stm32f7xx_it.c **** break;
- 790 .loc 1 476 13 is_stmt 1 view .LVU136
- 476:Src/stm32f7xx_it.c **** break;
- 791 .loc 1 476 23 is_stmt 0 view .LVU137
- 792 00fc 624B ldr r3, .L116+28
- 793 00fe 0622 movs r2, #6
- 794 0100 1A70 strb r2, [r3]
- 477:Src/stm32f7xx_it.c **** case 0x7777:
- 795 .loc 1 477 9 is_stmt 1 view .LVU138
- 796 0102 B6E7 b .L48
- 797 .L68:
- 798 0104 4CF6CC42 movw r2, #52428
- 799 0108 9342 cmp r3, r2
- 800 010a 3BD0 beq .L72
- 801 010c 4DF6DD52 movw r2, #56797
- ARM GAS /tmp/ccMf3LkY.s page 156
-
-
- 802 0110 9342 cmp r3, r2
- 803 0112 3BD1 bne .L64
- 497:Src/stm32f7xx_it.c **** break;
- 804 .loc 1 497 13 view .LVU139
- 497:Src/stm32f7xx_it.c **** break;
- 805 .loc 1 497 27 is_stmt 0 view .LVU140
- 806 0114 574B ldr r3, .L116+8
- 807 0116 0222 movs r2, #2
- 808 0118 1A80 strh r2, [r3] @ movhi
- 498:Src/stm32f7xx_it.c **** default: //error decoding header
- 809 .loc 1 498 9 is_stmt 1 view .LVU141
- 810 011a AAE7 b .L48
- 811 .L61:
- 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 812 .loc 1 454 13 view .LVU142
- 454:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 813 .loc 1 454 27 is_stmt 0 view .LVU143
- 814 011c 0023 movs r3, #0
- 815 011e 554A ldr r2, .L116+8
- 816 0120 1380 strh r3, [r2] @ movhi
- 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;
- 817 .loc 1 455 13 is_stmt 1 view .LVU144
- 455:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;
- 818 .loc 1 455 21 is_stmt 0 view .LVU145
- 819 0122 574A ldr r2, .L116+20
- 820 0124 1370 strb r3, [r2]
- 456:Src/stm32f7xx_it.c **** break;
- 821 .loc 1 456 13 is_stmt 1 view .LVU146
- 456:Src/stm32f7xx_it.c **** break;
- 822 .loc 1 456 23 is_stmt 0 view .LVU147
- 823 0126 584B ldr r3, .L116+28
- 824 0128 0222 movs r2, #2
- 825 012a 1A70 strb r2, [r3]
- 457:Src/stm32f7xx_it.c **** case 0x3333: //Transmith saved DATA
- 826 .loc 1 457 9 is_stmt 1 view .LVU148
- 827 012c A1E7 b .L48
- 828 .L62:
- 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 829 .loc 1 459 13 view .LVU149
- 459:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 830 .loc 1 459 27 is_stmt 0 view .LVU150
- 831 012e 0023 movs r3, #0
- 832 0130 504A ldr r2, .L116+8
- 833 0132 1380 strh r3, [r2] @ movhi
- 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE;
- 834 .loc 1 460 13 is_stmt 1 view .LVU151
- 460:Src/stm32f7xx_it.c **** CPU_state = TRANS_S_ENABLE;
- 835 .loc 1 460 21 is_stmt 0 view .LVU152
- 836 0134 524A ldr r2, .L116+20
- 837 0136 1370 strb r3, [r2]
- 461:Src/stm32f7xx_it.c **** break;
- 838 .loc 1 461 13 is_stmt 1 view .LVU153
- 461:Src/stm32f7xx_it.c **** break;
- 839 .loc 1 461 23 is_stmt 0 view .LVU154
- 840 0138 534B ldr r3, .L116+28
- 841 013a 0322 movs r2, #3
- 842 013c 1A70 strb r2, [r3]
- ARM GAS /tmp/ccMf3LkY.s page 157
-
-
- 462:Src/stm32f7xx_it.c **** case 0x4444: //Received packet
- 843 .loc 1 462 9 is_stmt 1 view .LVU155
- 844 013e 98E7 b .L48
- 845 .L59:
- 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 846 .loc 1 464 13 view .LVU156
- 464:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 847 .loc 1 464 27 is_stmt 0 view .LVU157
- 848 0140 0023 movs r3, #0
- 849 0142 4C4A ldr r2, .L116+8
- 850 0144 1380 strh r3, [r2] @ movhi
- 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE;
- 851 .loc 1 465 13 is_stmt 1 view .LVU158
- 465:Src/stm32f7xx_it.c **** CPU_state = TRANS_ENABLE;
- 852 .loc 1 465 21 is_stmt 0 view .LVU159
- 853 0146 4E4A ldr r2, .L116+20
- 854 0148 1370 strb r3, [r2]
- 466:Src/stm32f7xx_it.c **** break;
- 855 .loc 1 466 13 is_stmt 1 view .LVU160
- 466:Src/stm32f7xx_it.c **** break;
- 856 .loc 1 466 23 is_stmt 0 view .LVU161
- 857 014a 4F4B ldr r3, .L116+28
- 858 014c 0422 movs r2, #4
- 859 014e 1A70 strb r2, [r3]
- 467:Src/stm32f7xx_it.c **** case 0x5555: //Erase saved DATA
- 860 .loc 1 467 9 is_stmt 1 view .LVU162
- 861 0150 8FE7 b .L48
- 862 .L65:
- 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 863 .loc 1 469 13 view .LVU163
- 469:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 864 .loc 1 469 27 is_stmt 0 view .LVU164
- 865 0152 0023 movs r3, #0
- 866 0154 474A ldr r2, .L116+8
- 867 0156 1380 strh r3, [r2] @ movhi
- 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE;
- 868 .loc 1 470 13 is_stmt 1 view .LVU165
- 470:Src/stm32f7xx_it.c **** CPU_state = REMOVE_FILE;
- 869 .loc 1 470 21 is_stmt 0 view .LVU166
- 870 0158 494A ldr r2, .L116+20
- 871 015a 1370 strb r3, [r2]
- 471:Src/stm32f7xx_it.c **** break;
- 872 .loc 1 471 13 is_stmt 1 view .LVU167
- 471:Src/stm32f7xx_it.c **** break;
- 873 .loc 1 471 23 is_stmt 0 view .LVU168
- 874 015c 4A4B ldr r3, .L116+28
- 875 015e 0522 movs r2, #5
- 876 0160 1A70 strb r2, [r3]
- 472:Src/stm32f7xx_it.c **** case 0x6666: //Request state
- 877 .loc 1 472 9 is_stmt 1 view .LVU169
- 878 0162 86E7 b .L48
- 879 .L57:
- 479:Src/stm32f7xx_it.c **** break;
- 880 .loc 1 479 13 view .LVU170
- 479:Src/stm32f7xx_it.c **** break;
- 881 .loc 1 479 27 is_stmt 0 view .LVU171
- 882 0164 434B ldr r3, .L116+8
- ARM GAS /tmp/ccMf3LkY.s page 158
-
-
- 883 0166 0222 movs r2, #2
- 884 0168 1A80 strh r2, [r3] @ movhi
- 480:Src/stm32f7xx_it.c **** case AD9102_CMD_HEADER: // AD9102 command
- 885 .loc 1 480 13 is_stmt 1 view .LVU172
- 886 016a 82E7 b .L48
- 887 .L69:
- 485:Src/stm32f7xx_it.c **** break;
- 888 .loc 1 485 13 view .LVU173
- 485:Src/stm32f7xx_it.c **** break;
- 889 .loc 1 485 27 is_stmt 0 view .LVU174
- 890 016c 414B ldr r3, .L116+8
- 891 016e 0222 movs r2, #2
- 892 0170 1A80 strh r2, [r3] @ movhi
- 486:Src/stm32f7xx_it.c **** case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
- 893 .loc 1 486 9 is_stmt 1 view .LVU175
- 894 0172 7EE7 b .L48
- 895 .L70:
- 488:Src/stm32f7xx_it.c **** break;
- 896 .loc 1 488 13 view .LVU176
- 488:Src/stm32f7xx_it.c **** break;
- 897 .loc 1 488 27 is_stmt 0 view .LVU177
- 898 0174 3F4B ldr r3, .L116+8
- 899 0176 0222 movs r2, #2
- 900 0178 1A80 strh r2, [r3] @ movhi
- 489:Src/stm32f7xx_it.c **** case STM32_DAC_CMD_HEADER: // STM32 internal DAC command
- 901 .loc 1 489 9 is_stmt 1 view .LVU178
- 902 017a 7AE7 b .L48
- 903 .L67:
- 491:Src/stm32f7xx_it.c **** break;
- 904 .loc 1 491 13 view .LVU179
- 491:Src/stm32f7xx_it.c **** break;
- 905 .loc 1 491 27 is_stmt 0 view .LVU180
- 906 017c 3D4B ldr r3, .L116+8
- 907 017e 0222 movs r2, #2
- 908 0180 1A80 strh r2, [r3] @ movhi
- 492:Src/stm32f7xx_it.c **** case AD9102_WAVE_CTRL_HEADER: // AD9102 custom waveform control command
- 909 .loc 1 492 9 is_stmt 1 view .LVU181
- 910 0182 76E7 b .L48
- 911 .L72:
- 494:Src/stm32f7xx_it.c **** break;
- 912 .loc 1 494 13 view .LVU182
- 494:Src/stm32f7xx_it.c **** break;
- 913 .loc 1 494 27 is_stmt 0 view .LVU183
- 914 0184 3B4B ldr r3, .L116+8
- 915 0186 0222 movs r2, #2
- 916 0188 1A80 strh r2, [r3] @ movhi
- 495:Src/stm32f7xx_it.c **** case AD9102_WAVE_DATA_HEADER: // AD9102 custom waveform data packet
- 917 .loc 1 495 9 is_stmt 1 view .LVU184
- 918 018a 72E7 b .L48
- 919 .L64:
- 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 920 .loc 1 500 13 view .LVU185
- 500:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 921 .loc 1 500 27 is_stmt 0 view .LVU186
- 922 018c 0023 movs r3, #0
- 923 018e 394A ldr r2, .L116+8
- 924 0190 1380 strh r3, [r2] @ movhi
- ARM GAS /tmp/ccMf3LkY.s page 159
-
-
- 501:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01;
- 925 .loc 1 501 13 is_stmt 1 view .LVU187
- 501:Src/stm32f7xx_it.c **** //UART_transmission_request = MESS_01;
- 926 .loc 1 501 21 is_stmt 0 view .LVU188
- 927 0192 3B4A ldr r2, .L116+20
- 928 0194 1370 strb r3, [r2]
- 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 929 .loc 1 504 13 is_stmt 1 view .LVU189
- 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 930 .loc 1 504 23 is_stmt 0 view .LVU190
- 931 0196 3D4A ldr r2, .L116+32
- 932 0198 1378 ldrb r3, [r2] @ zero_extendqisi2
- 504:Src/stm32f7xx_it.c **** CPU_state = DEFAULT_ENABLE;//Parking system and send error state!
- 933 .loc 1 504 27 view .LVU191
- 934 019a 43F00203 orr r3, r3, #2
- 935 019e 1370 strb r3, [r2]
- 505:Src/stm32f7xx_it.c **** break;
- 936 .loc 1 505 13 is_stmt 1 view .LVU192
- 505:Src/stm32f7xx_it.c **** break;
- 937 .loc 1 505 23 is_stmt 0 view .LVU193
- 938 01a0 394B ldr r3, .L116+28
- 939 01a2 0222 movs r2, #2
- 940 01a4 1A70 strb r2, [r3]
- 506:Src/stm32f7xx_it.c **** }
- 941 .loc 1 506 9 is_stmt 1 view .LVU194
- 942 01a6 64E7 b .L48
- 943 .L53:
- 511:Src/stm32f7xx_it.c **** {
- 944 .loc 1 511 9 view .LVU195
- 511:Src/stm32f7xx_it.c **** {
- 945 .loc 1 511 25 is_stmt 0 view .LVU196
- 946 01a8 3649 ldr r1, .L116+24
- 947 01aa 0988 ldrh r1, [r1]
- 511:Src/stm32f7xx_it.c **** {
- 948 .loc 1 511 12 view .LVU197
- 949 01ac 48F68800 movw r0, #34952
- 950 01b0 8142 cmp r1, r0
- 951 01b2 25D0 beq .L108
- 521:Src/stm32f7xx_it.c **** {
- 952 .loc 1 521 14 is_stmt 1 view .LVU198
- 521:Src/stm32f7xx_it.c **** {
- 953 .loc 1 521 17 is_stmt 0 view .LVU199
- 954 01b4 49F69910 movw r0, #39321
- 955 01b8 8142 cmp r1, r0
- 956 01ba 3CD0 beq .L109
- 531:Src/stm32f7xx_it.c **** {
- 957 .loc 1 531 14 is_stmt 1 view .LVU200
- 531:Src/stm32f7xx_it.c **** {
- 958 .loc 1 531 17 is_stmt 0 view .LVU201
- 959 01bc 4AF6AA20 movw r0, #43690
- 960 01c0 8142 cmp r1, r0
- 961 01c2 69D0 beq .L110
- 541:Src/stm32f7xx_it.c **** {
- 962 .loc 1 541 14 is_stmt 1 view .LVU202
- 541:Src/stm32f7xx_it.c **** {
- 963 .loc 1 541 17 is_stmt 0 view .LVU203
- 964 01c4 4BF6BB30 movw r0, #48059
- ARM GAS /tmp/ccMf3LkY.s page 160
-
-
- 965 01c8 8142 cmp r1, r0
- 966 01ca 00F08080 beq .L111
- 551:Src/stm32f7xx_it.c **** {
- 967 .loc 1 551 14 is_stmt 1 view .LVU204
- 551:Src/stm32f7xx_it.c **** {
- 968 .loc 1 551 17 is_stmt 0 view .LVU205
- 969 01ce 4CF6CC40 movw r0, #52428
- 970 01d2 8142 cmp r1, r0
- 971 01d4 00F09680 beq .L112
- 563:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 972 .loc 1 563 13 is_stmt 1 view .LVU206
- 563:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 973 .loc 1 563 16 is_stmt 0 view .LVU207
- 974 01d8 13F0010F tst r3, #1
- 975 01dc 00F0AD80 beq .L89
- 564:Src/stm32f7xx_it.c **** else
- 976 .loc 1 564 17 is_stmt 1 view .LVU208
- 564:Src/stm32f7xx_it.c **** else
- 977 .loc 1 564 24 is_stmt 0 view .LVU209
- 978 01e0 5908 lsrs r1, r3, #1
- 979 01e2 0139 subs r1, r1, #1
- 980 01e4 2A4C ldr r4, .L116+36
- 981 01e6 34F81100 ldrh r0, [r4, r1, lsl #1]
- 564:Src/stm32f7xx_it.c **** else
- 982 .loc 1 564 47 view .LVU210
- 983 01ea 00EB0222 add r2, r0, r2, lsl #8
- 984 01ee 24F81120 strh r2, [r4, r1, lsl #1] @ movhi
- 985 .L90:
- 567:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 986 .loc 1 567 13 is_stmt 1 view .LVU211
- 567:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 987 .loc 1 567 26 is_stmt 0 view .LVU212
- 988 01f2 0133 adds r3, r3, #1
- 989 01f4 1F4A ldr r2, .L116+8
- 990 01f6 1380 strh r3, [r2] @ movhi
- 568:Src/stm32f7xx_it.c **** }
- 991 .loc 1 568 13 is_stmt 1 view .LVU213
- 568:Src/stm32f7xx_it.c **** }
- 992 .loc 1 568 39 is_stmt 0 view .LVU214
- 993 01f8 264B ldr r3, .L116+40
- 994 01fa 0022 movs r2, #0
- 995 01fc 1A70 strb r2, [r3]
- 996 01fe 38E7 b .L48
- 997 .L108:
- 513:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 998 .loc 1 513 13 is_stmt 1 view .LVU215
- 513:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 999 .loc 1 513 16 is_stmt 0 view .LVU216
- 1000 0200 13F0010F tst r3, #1
- 1001 0204 11D0 beq .L75
- 514:Src/stm32f7xx_it.c **** else
- 1002 .loc 1 514 17 is_stmt 1 view .LVU217
- 514:Src/stm32f7xx_it.c **** else
- 1003 .loc 1 514 24 is_stmt 0 view .LVU218
- 1004 0206 5B08 lsrs r3, r3, #1
- 1005 0208 013B subs r3, r3, #1
- 1006 020a 2148 ldr r0, .L116+36
- ARM GAS /tmp/ccMf3LkY.s page 161
-
-
- 1007 020c 30F81310 ldrh r1, [r0, r3, lsl #1]
- 514:Src/stm32f7xx_it.c **** else
- 1008 .loc 1 514 51 view .LVU219
- 1009 0210 01EB0222 add r2, r1, r2, lsl #8
- 1010 0214 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1011 .L76:
- 517:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1012 .loc 1 517 13 is_stmt 1 view .LVU220
- 517:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1013 .loc 1 517 23 is_stmt 0 view .LVU221
- 1014 0218 1B4B ldr r3, .L116+28
- 1015 021a 0A22 movs r2, #10
- 1016 021c 1A70 strb r2, [r3]
- 518:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1017 .loc 1 518 13 is_stmt 1 view .LVU222
- 518:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1018 .loc 1 518 27 is_stmt 0 view .LVU223
- 1019 021e 0023 movs r3, #0
- 1020 0220 144A ldr r2, .L116+8
- 1021 0222 1380 strh r3, [r2] @ movhi
- 519:Src/stm32f7xx_it.c **** }
- 1022 .loc 1 519 13 is_stmt 1 view .LVU224
- 519:Src/stm32f7xx_it.c **** }
- 1023 .loc 1 519 21 is_stmt 0 view .LVU225
- 1024 0224 164A ldr r2, .L116+20
- 1025 0226 1370 strb r3, [r2]
- 1026 0228 23E7 b .L48
- 1027 .L75:
- 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD;
- 1028 .loc 1 516 17 is_stmt 1 view .LVU226
- 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD;
- 1029 .loc 1 516 40 is_stmt 0 view .LVU227
- 1030 022a 5B08 lsrs r3, r3, #1
- 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD;
- 1031 .loc 1 516 46 view .LVU228
- 1032 022c 013B subs r3, r3, #1
- 516:Src/stm32f7xx_it.c **** CPU_state = AD9102_CMD;
- 1033 .loc 1 516 51 view .LVU229
- 1034 022e 1849 ldr r1, .L116+36
- 1035 0230 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1036 0234 F0E7 b .L76
- 1037 .L109:
- 523:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1038 .loc 1 523 13 is_stmt 1 view .LVU230
- 523:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1039 .loc 1 523 16 is_stmt 0 view .LVU231
- 1040 0236 13F0010F tst r3, #1
- 1041 023a 11D0 beq .L78
- 524:Src/stm32f7xx_it.c **** else
- 1042 .loc 1 524 17 is_stmt 1 view .LVU232
- 524:Src/stm32f7xx_it.c **** else
- 1043 .loc 1 524 24 is_stmt 0 view .LVU233
- 1044 023c 5B08 lsrs r3, r3, #1
- 1045 023e 013B subs r3, r3, #1
- 1046 0240 1348 ldr r0, .L116+36
- 1047 0242 30F81310 ldrh r1, [r0, r3, lsl #1]
- 524:Src/stm32f7xx_it.c **** else
- ARM GAS /tmp/ccMf3LkY.s page 162
-
-
- 1048 .loc 1 524 51 view .LVU234
- 1049 0246 01EB0222 add r2, r1, r2, lsl #8
- 1050 024a 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1051 .L79:
- 527:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1052 .loc 1 527 13 is_stmt 1 view .LVU235
- 527:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1053 .loc 1 527 23 is_stmt 0 view .LVU236
- 1054 024e 0E4B ldr r3, .L116+28
- 1055 0250 0B22 movs r2, #11
- 1056 0252 1A70 strb r2, [r3]
- 528:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1057 .loc 1 528 13 is_stmt 1 view .LVU237
- 528:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1058 .loc 1 528 27 is_stmt 0 view .LVU238
- 1059 0254 0023 movs r3, #0
- 1060 0256 074A ldr r2, .L116+8
- 1061 0258 1380 strh r3, [r2] @ movhi
- 529:Src/stm32f7xx_it.c **** }
- 1062 .loc 1 529 13 is_stmt 1 view .LVU239
- 529:Src/stm32f7xx_it.c **** }
- 1063 .loc 1 529 21 is_stmt 0 view .LVU240
- 1064 025a 094A ldr r2, .L116+20
- 1065 025c 1370 strb r3, [r2]
- 1066 025e 08E7 b .L48
- 1067 .L78:
- 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD;
- 1068 .loc 1 526 17 is_stmt 1 view .LVU241
- 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD;
- 1069 .loc 1 526 40 is_stmt 0 view .LVU242
- 1070 0260 5B08 lsrs r3, r3, #1
- 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD;
- 1071 .loc 1 526 46 view .LVU243
- 1072 0262 013B subs r3, r3, #1
- 526:Src/stm32f7xx_it.c **** CPU_state = AD9833_CMD;
- 1073 .loc 1 526 51 view .LVU244
- 1074 0264 0A49 ldr r1, .L116+36
- 1075 0266 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1076 026a F0E7 b .L79
- 1077 .L117:
- 1078 .align 2
- 1079 .L116:
- 1080 026c 00100140 .word 1073811456
- 1081 0270 00000000 .word uart_buf
- 1082 0274 00000000 .word UART_rec_incr
- 1083 0278 00000000 .word TO6
- 1084 027c 00000000 .word TO6_uart
- 1085 0280 00000000 .word flg_tmt
- 1086 0284 00000000 .word UART_header
- 1087 0288 00000000 .word CPU_state
- 1088 028c 00000000 .word State_Data
- 1089 0290 00000000 .word COMMAND
- 1090 0294 00000000 .word UART_transmission_request
- 1091 .L110:
- 533:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1092 .loc 1 533 13 is_stmt 1 view .LVU245
- 533:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- ARM GAS /tmp/ccMf3LkY.s page 163
-
-
- 1093 .loc 1 533 16 is_stmt 0 view .LVU246
- 1094 0298 13F0010F tst r3, #1
- 1095 029c 11D0 beq .L81
- 534:Src/stm32f7xx_it.c **** else
- 1096 .loc 1 534 17 is_stmt 1 view .LVU247
- 534:Src/stm32f7xx_it.c **** else
- 1097 .loc 1 534 24 is_stmt 0 view .LVU248
- 1098 029e 5B08 lsrs r3, r3, #1
- 1099 02a0 013B subs r3, r3, #1
- 1100 02a2 7F48 ldr r0, .L118
- 1101 02a4 30F81310 ldrh r1, [r0, r3, lsl #1]
- 534:Src/stm32f7xx_it.c **** else
- 1102 .loc 1 534 51 view .LVU249
- 1103 02a8 01EB0222 add r2, r1, r2, lsl #8
- 1104 02ac 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1105 .L82:
- 537:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1106 .loc 1 537 13 is_stmt 1 view .LVU250
- 537:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1107 .loc 1 537 23 is_stmt 0 view .LVU251
- 1108 02b0 7C4B ldr r3, .L118+4
- 1109 02b2 0C22 movs r2, #12
- 1110 02b4 1A70 strb r2, [r3]
- 538:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1111 .loc 1 538 13 is_stmt 1 view .LVU252
- 538:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1112 .loc 1 538 27 is_stmt 0 view .LVU253
- 1113 02b6 0023 movs r3, #0
- 1114 02b8 7B4A ldr r2, .L118+8
- 1115 02ba 1380 strh r3, [r2] @ movhi
- 539:Src/stm32f7xx_it.c **** }
- 1116 .loc 1 539 13 is_stmt 1 view .LVU254
- 539:Src/stm32f7xx_it.c **** }
- 1117 .loc 1 539 21 is_stmt 0 view .LVU255
- 1118 02bc 7B4A ldr r2, .L118+12
- 1119 02be 1370 strb r3, [r2]
- 1120 02c0 D7E6 b .L48
- 1121 .L81:
- 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD;
- 1122 .loc 1 536 17 is_stmt 1 view .LVU256
- 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD;
- 1123 .loc 1 536 40 is_stmt 0 view .LVU257
- 1124 02c2 5B08 lsrs r3, r3, #1
- 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD;
- 1125 .loc 1 536 46 view .LVU258
- 1126 02c4 013B subs r3, r3, #1
- 536:Src/stm32f7xx_it.c **** CPU_state = DS1809_CMD;
- 1127 .loc 1 536 51 view .LVU259
- 1128 02c6 7649 ldr r1, .L118
- 1129 02c8 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1130 02cc F0E7 b .L82
- 1131 .L111:
- 543:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1132 .loc 1 543 13 is_stmt 1 view .LVU260
- 543:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1133 .loc 1 543 16 is_stmt 0 view .LVU261
- 1134 02ce 13F0010F tst r3, #1
- ARM GAS /tmp/ccMf3LkY.s page 164
-
-
- 1135 02d2 11D0 beq .L84
- 544:Src/stm32f7xx_it.c **** else
- 1136 .loc 1 544 17 is_stmt 1 view .LVU262
- 544:Src/stm32f7xx_it.c **** else
- 1137 .loc 1 544 24 is_stmt 0 view .LVU263
- 1138 02d4 5B08 lsrs r3, r3, #1
- 1139 02d6 013B subs r3, r3, #1
- 1140 02d8 7148 ldr r0, .L118
- 1141 02da 30F81310 ldrh r1, [r0, r3, lsl #1]
- 544:Src/stm32f7xx_it.c **** else
- 1142 .loc 1 544 51 view .LVU264
- 1143 02de 01EB0222 add r2, r1, r2, lsl #8
- 1144 02e2 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1145 .L85:
- 547:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1146 .loc 1 547 13 is_stmt 1 view .LVU265
- 547:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1147 .loc 1 547 23 is_stmt 0 view .LVU266
- 1148 02e6 6F4B ldr r3, .L118+4
- 1149 02e8 0D22 movs r2, #13
- 1150 02ea 1A70 strb r2, [r3]
- 548:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1151 .loc 1 548 13 is_stmt 1 view .LVU267
- 548:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1152 .loc 1 548 27 is_stmt 0 view .LVU268
- 1153 02ec 0023 movs r3, #0
- 1154 02ee 6E4A ldr r2, .L118+8
- 1155 02f0 1380 strh r3, [r2] @ movhi
- 549:Src/stm32f7xx_it.c **** }
- 1156 .loc 1 549 13 is_stmt 1 view .LVU269
- 549:Src/stm32f7xx_it.c **** }
- 1157 .loc 1 549 21 is_stmt 0 view .LVU270
- 1158 02f2 6E4A ldr r2, .L118+12
- 1159 02f4 1370 strb r3, [r2]
- 1160 02f6 BCE6 b .L48
- 1161 .L84:
- 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD;
- 1162 .loc 1 546 17 is_stmt 1 view .LVU271
- 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD;
- 1163 .loc 1 546 40 is_stmt 0 view .LVU272
- 1164 02f8 5B08 lsrs r3, r3, #1
- 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD;
- 1165 .loc 1 546 46 view .LVU273
- 1166 02fa 013B subs r3, r3, #1
- 546:Src/stm32f7xx_it.c **** CPU_state = STM32_DAC_CMD;
- 1167 .loc 1 546 51 view .LVU274
- 1168 02fc 6849 ldr r1, .L118
- 1169 02fe 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1170 0302 F0E7 b .L85
- 1171 .L112:
- 553:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1172 .loc 1 553 13 is_stmt 1 view .LVU275
- 553:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1173 .loc 1 553 16 is_stmt 0 view .LVU276
- 1174 0304 13F0010F tst r3, #1
- 1175 0308 11D0 beq .L87
- 554:Src/stm32f7xx_it.c **** else
- ARM GAS /tmp/ccMf3LkY.s page 165
-
-
- 1176 .loc 1 554 17 is_stmt 1 view .LVU277
- 554:Src/stm32f7xx_it.c **** else
- 1177 .loc 1 554 24 is_stmt 0 view .LVU278
- 1178 030a 5B08 lsrs r3, r3, #1
- 1179 030c 013B subs r3, r3, #1
- 1180 030e 6448 ldr r0, .L118
- 1181 0310 30F81310 ldrh r1, [r0, r3, lsl #1]
- 554:Src/stm32f7xx_it.c **** else
- 1182 .loc 1 554 51 view .LVU279
- 1183 0314 01EB0222 add r2, r1, r2, lsl #8
- 1184 0318 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1185 .L88:
- 557:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1186 .loc 1 557 13 is_stmt 1 view .LVU280
- 557:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1187 .loc 1 557 23 is_stmt 0 view .LVU281
- 1188 031c 614B ldr r3, .L118+4
- 1189 031e 0E22 movs r2, #14
- 1190 0320 1A70 strb r2, [r3]
- 558:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1191 .loc 1 558 13 is_stmt 1 view .LVU282
- 558:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1192 .loc 1 558 27 is_stmt 0 view .LVU283
- 1193 0322 0023 movs r3, #0
- 1194 0324 604A ldr r2, .L118+8
- 1195 0326 1380 strh r3, [r2] @ movhi
- 559:Src/stm32f7xx_it.c **** }
- 1196 .loc 1 559 13 is_stmt 1 view .LVU284
- 559:Src/stm32f7xx_it.c **** }
- 1197 .loc 1 559 21 is_stmt 0 view .LVU285
- 1198 0328 604A ldr r2, .L118+12
- 1199 032a 1370 strb r3, [r2]
- 1200 032c A1E6 b .L48
- 1201 .L87:
- 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD;
- 1202 .loc 1 556 17 is_stmt 1 view .LVU286
- 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD;
- 1203 .loc 1 556 40 is_stmt 0 view .LVU287
- 1204 032e 5B08 lsrs r3, r3, #1
- 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD;
- 1205 .loc 1 556 46 view .LVU288
- 1206 0330 013B subs r3, r3, #1
- 556:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_CTRL_CMD;
- 1207 .loc 1 556 51 view .LVU289
- 1208 0332 5B49 ldr r1, .L118
- 1209 0334 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1210 0338 F0E7 b .L88
- 1211 .L89:
- 566:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1212 .loc 1 566 17 is_stmt 1 view .LVU290
- 566:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1213 .loc 1 566 39 is_stmt 0 view .LVU291
- 1214 033a 5908 lsrs r1, r3, #1
- 566:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1215 .loc 1 566 43 view .LVU292
- 1216 033c 0139 subs r1, r1, #1
- 566:Src/stm32f7xx_it.c **** UART_rec_incr++;
- ARM GAS /tmp/ccMf3LkY.s page 166
-
-
- 1217 .loc 1 566 47 view .LVU293
- 1218 033e 5848 ldr r0, .L118
- 1219 0340 20F81120 strh r2, [r0, r1, lsl #1] @ movhi
- 1220 0344 55E7 b .L90
- 1221 .L52:
- 573:Src/stm32f7xx_it.c **** {
- 1222 .loc 1 573 9 is_stmt 1 view .LVU294
- 573:Src/stm32f7xx_it.c **** {
- 1223 .loc 1 573 25 is_stmt 0 view .LVU295
- 1224 0346 5A49 ldr r1, .L118+16
- 1225 0348 0988 ldrh r1, [r1]
- 573:Src/stm32f7xx_it.c **** {
- 1226 .loc 1 573 12 view .LVU296
- 1227 034a 41F21110 movw r0, #4369
- 1228 034e 8142 cmp r1, r0
- 1229 0350 16D0 beq .L113
- 583:Src/stm32f7xx_it.c **** {
- 1230 .loc 1 583 14 is_stmt 1 view .LVU297
- 583:Src/stm32f7xx_it.c **** {
- 1231 .loc 1 583 17 is_stmt 0 view .LVU298
- 1232 0352 4DF6DD50 movw r0, #56797
- 1233 0356 8142 cmp r1, r0
- 1234 0358 2DD0 beq .L114
- 595:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1235 .loc 1 595 13 is_stmt 1 view .LVU299
- 595:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1236 .loc 1 595 16 is_stmt 0 view .LVU300
- 1237 035a 13F0010F tst r3, #1
- 1238 035e 45D0 beq .L97
- 596:Src/stm32f7xx_it.c **** else
- 1239 .loc 1 596 17 is_stmt 1 view .LVU301
- 596:Src/stm32f7xx_it.c **** else
- 1240 .loc 1 596 24 is_stmt 0 view .LVU302
- 1241 0360 5908 lsrs r1, r3, #1
- 1242 0362 0139 subs r1, r1, #1
- 1243 0364 4E4C ldr r4, .L118
- 1244 0366 34F81100 ldrh r0, [r4, r1, lsl #1]
- 596:Src/stm32f7xx_it.c **** else
- 1245 .loc 1 596 47 view .LVU303
- 1246 036a 00EB0222 add r2, r0, r2, lsl #8
- 1247 036e 24F81120 strh r2, [r4, r1, lsl #1] @ movhi
- 1248 .L98:
- 599:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1249 .loc 1 599 12 is_stmt 1 view .LVU304
- 599:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1250 .loc 1 599 25 is_stmt 0 view .LVU305
- 1251 0372 0133 adds r3, r3, #1
- 1252 0374 4C4A ldr r2, .L118+8
- 1253 0376 1380 strh r3, [r2] @ movhi
- 600:Src/stm32f7xx_it.c **** }
- 1254 .loc 1 600 12 is_stmt 1 view .LVU306
- 600:Src/stm32f7xx_it.c **** }
- 1255 .loc 1 600 38 is_stmt 0 view .LVU307
- 1256 0378 4E4B ldr r3, .L118+20
- 1257 037a 0022 movs r2, #0
- 1258 037c 1A70 strb r2, [r3]
- 1259 037e 78E6 b .L48
- ARM GAS /tmp/ccMf3LkY.s page 167
-
-
- 1260 .L113:
- 575:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1261 .loc 1 575 13 is_stmt 1 view .LVU308
- 575:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1262 .loc 1 575 16 is_stmt 0 view .LVU309
- 1263 0380 13F0010F tst r3, #1
- 1264 0384 11D0 beq .L92
- 576:Src/stm32f7xx_it.c **** else
- 1265 .loc 1 576 17 is_stmt 1 view .LVU310
- 576:Src/stm32f7xx_it.c **** else
- 1266 .loc 1 576 24 is_stmt 0 view .LVU311
- 1267 0386 5B08 lsrs r3, r3, #1
- 1268 0388 013B subs r3, r3, #1
- 1269 038a 4548 ldr r0, .L118
- 1270 038c 30F81310 ldrh r1, [r0, r3, lsl #1]
- 576:Src/stm32f7xx_it.c **** else
- 1271 .loc 1 576 51 view .LVU312
- 1272 0390 01EB0222 add r2, r1, r2, lsl #8
- 1273 0394 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1274 .L93:
- 579:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1275 .loc 1 579 13 is_stmt 1 view .LVU313
- 579:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1276 .loc 1 579 23 is_stmt 0 view .LVU314
- 1277 0398 424B ldr r3, .L118+4
- 1278 039a 0122 movs r2, #1
- 1279 039c 1A70 strb r2, [r3]
- 580:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1280 .loc 1 580 13 is_stmt 1 view .LVU315
- 580:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1281 .loc 1 580 27 is_stmt 0 view .LVU316
- 1282 039e 0023 movs r3, #0
- 1283 03a0 414A ldr r2, .L118+8
- 1284 03a2 1380 strh r3, [r2] @ movhi
- 581:Src/stm32f7xx_it.c **** }
- 1285 .loc 1 581 13 is_stmt 1 view .LVU317
- 581:Src/stm32f7xx_it.c **** }
- 1286 .loc 1 581 21 is_stmt 0 view .LVU318
- 1287 03a4 414A ldr r2, .L118+12
- 1288 03a6 1370 strb r3, [r2]
- 1289 03a8 63E6 b .L48
- 1290 .L92:
- 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE;
- 1291 .loc 1 578 17 is_stmt 1 view .LVU319
- 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE;
- 1292 .loc 1 578 40 is_stmt 0 view .LVU320
- 1293 03aa 5B08 lsrs r3, r3, #1
- 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE;
- 1294 .loc 1 578 46 view .LVU321
- 1295 03ac 013B subs r3, r3, #1
- 578:Src/stm32f7xx_it.c **** CPU_state = DECODE_ENABLE;
- 1296 .loc 1 578 51 view .LVU322
- 1297 03ae 3C49 ldr r1, .L118
- 1298 03b0 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1299 03b4 F0E7 b .L93
- 1300 .L114:
- 585:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- ARM GAS /tmp/ccMf3LkY.s page 168
-
-
- 1301 .loc 1 585 13 is_stmt 1 view .LVU323
- 585:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
- 1302 .loc 1 585 16 is_stmt 0 view .LVU324
- 1303 03b6 13F0010F tst r3, #1
- 1304 03ba 11D0 beq .L95
- 586:Src/stm32f7xx_it.c **** else
- 1305 .loc 1 586 17 is_stmt 1 view .LVU325
- 586:Src/stm32f7xx_it.c **** else
- 1306 .loc 1 586 24 is_stmt 0 view .LVU326
- 1307 03bc 5B08 lsrs r3, r3, #1
- 1308 03be 013B subs r3, r3, #1
- 1309 03c0 3748 ldr r0, .L118
- 1310 03c2 30F81310 ldrh r1, [r0, r3, lsl #1]
- 586:Src/stm32f7xx_it.c **** else
- 1311 .loc 1 586 51 view .LVU327
- 1312 03c6 01EB0222 add r2, r1, r2, lsl #8
- 1313 03ca 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1314 .L96:
- 589:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1315 .loc 1 589 13 is_stmt 1 view .LVU328
- 589:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1316 .loc 1 589 23 is_stmt 0 view .LVU329
- 1317 03ce 354B ldr r3, .L118+4
- 1318 03d0 0F22 movs r2, #15
- 1319 03d2 1A70 strb r2, [r3]
- 590:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1320 .loc 1 590 13 is_stmt 1 view .LVU330
- 590:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1321 .loc 1 590 27 is_stmt 0 view .LVU331
- 1322 03d4 0023 movs r3, #0
- 1323 03d6 344A ldr r2, .L118+8
- 1324 03d8 1380 strh r3, [r2] @ movhi
- 591:Src/stm32f7xx_it.c **** }
- 1325 .loc 1 591 13 is_stmt 1 view .LVU332
- 591:Src/stm32f7xx_it.c **** }
- 1326 .loc 1 591 21 is_stmt 0 view .LVU333
- 1327 03da 344A ldr r2, .L118+12
- 1328 03dc 1370 strb r3, [r2]
- 1329 03de 48E6 b .L48
- 1330 .L95:
- 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD;
- 1331 .loc 1 588 17 is_stmt 1 view .LVU334
- 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD;
- 1332 .loc 1 588 40 is_stmt 0 view .LVU335
- 1333 03e0 5B08 lsrs r3, r3, #1
- 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD;
- 1334 .loc 1 588 46 view .LVU336
- 1335 03e2 013B subs r3, r3, #1
- 588:Src/stm32f7xx_it.c **** CPU_state = AD9102_WAVE_DATA_CMD;
- 1336 .loc 1 588 51 view .LVU337
- 1337 03e4 2E49 ldr r1, .L118
- 1338 03e6 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1339 03ea F0E7 b .L96
- 1340 .L97:
- 598:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1341 .loc 1 598 17 is_stmt 1 view .LVU338
- 598:Src/stm32f7xx_it.c **** UART_rec_incr++;
- ARM GAS /tmp/ccMf3LkY.s page 169
-
-
- 1342 .loc 1 598 39 is_stmt 0 view .LVU339
- 1343 03ec 5908 lsrs r1, r3, #1
- 598:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1344 .loc 1 598 43 view .LVU340
- 1345 03ee 0139 subs r1, r1, #1
- 598:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1346 .loc 1 598 47 view .LVU341
- 1347 03f0 2B48 ldr r0, .L118
- 1348 03f2 20F81120 strh r2, [r0, r1, lsl #1] @ movhi
- 1349 03f6 BCE7 b .L98
- 1350 .L50:
- 604:Src/stm32f7xx_it.c **** {
- 1351 .loc 1 604 9 is_stmt 1 view .LVU342
- 604:Src/stm32f7xx_it.c **** {
- 1352 .loc 1 604 25 is_stmt 0 view .LVU343
- 1353 03f8 2D49 ldr r1, .L118+16
- 1354 03fa 0888 ldrh r0, [r1]
- 604:Src/stm32f7xx_it.c **** {
- 1355 .loc 1 604 12 view .LVU344
- 1356 03fc 47F27771 movw r1, #30583
- 1357 0400 8842 cmp r0, r1
- 1358 0402 12D0 beq .L115
- 616:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1359 .loc 1 616 13 is_stmt 1 view .LVU345
- 616:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1360 .loc 1 616 16 is_stmt 0 view .LVU346
- 1361 0404 13F0010F tst r3, #1
- 1362 0408 2AD0 beq .L102
- 617:Src/stm32f7xx_it.c **** else
- 1363 .loc 1 617 17 is_stmt 1 view .LVU347
- 617:Src/stm32f7xx_it.c **** else
- 1364 .loc 1 617 24 is_stmt 0 view .LVU348
- 1365 040a 5908 lsrs r1, r3, #1
- 1366 040c 0139 subs r1, r1, #1
- 1367 040e 244C ldr r4, .L118
- 1368 0410 34F81100 ldrh r0, [r4, r1, lsl #1]
- 617:Src/stm32f7xx_it.c **** else
- 1369 .loc 1 617 47 view .LVU349
- 1370 0414 00EB0222 add r2, r0, r2, lsl #8
- 1371 0418 24F81120 strh r2, [r4, r1, lsl #1] @ movhi
- 1372 .L103:
- 620:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1373 .loc 1 620 13 is_stmt 1 view .LVU350
- 620:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1374 .loc 1 620 26 is_stmt 0 view .LVU351
- 1375 041c 0133 adds r3, r3, #1
- 1376 041e 224A ldr r2, .L118+8
- 1377 0420 1380 strh r3, [r2] @ movhi
- 621:Src/stm32f7xx_it.c **** }
- 1378 .loc 1 621 13 is_stmt 1 view .LVU352
- 621:Src/stm32f7xx_it.c **** }
- 1379 .loc 1 621 39 is_stmt 0 view .LVU353
- 1380 0422 244B ldr r3, .L118+20
- 1381 0424 0022 movs r2, #0
- 1382 0426 1A70 strb r2, [r3]
- 1383 0428 23E6 b .L48
- 1384 .L115:
- ARM GAS /tmp/ccMf3LkY.s page 170
-
-
- 606:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1385 .loc 1 606 13 is_stmt 1 view .LVU354
- 606:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1386 .loc 1 606 16 is_stmt 0 view .LVU355
- 1387 042a 13F0010F tst r3, #1
- 1388 042e 11D0 beq .L100
- 607:Src/stm32f7xx_it.c **** else
- 1389 .loc 1 607 16 is_stmt 1 view .LVU356
- 607:Src/stm32f7xx_it.c **** else
- 1390 .loc 1 607 23 is_stmt 0 view .LVU357
- 1391 0430 5B08 lsrs r3, r3, #1
- 1392 0432 013B subs r3, r3, #1
- 1393 0434 1A48 ldr r0, .L118
- 1394 0436 30F81310 ldrh r1, [r0, r3, lsl #1]
- 607:Src/stm32f7xx_it.c **** else
- 1395 .loc 1 607 46 view .LVU358
- 1396 043a 01EB0222 add r2, r1, r2, lsl #8
- 1397 043e 20F81320 strh r2, [r0, r3, lsl #1] @ movhi
- 1398 .L101:
- 610:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1399 .loc 1 610 13 is_stmt 1 view .LVU359
- 610:Src/stm32f7xx_it.c **** UART_rec_incr = 0;
- 1400 .loc 1 610 23 is_stmt 0 view .LVU360
- 1401 0442 184B ldr r3, .L118+4
- 1402 0444 0822 movs r2, #8
- 1403 0446 1A70 strb r2, [r3]
- 611:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1404 .loc 1 611 13 is_stmt 1 view .LVU361
- 611:Src/stm32f7xx_it.c **** flg_tmt = 0;//Reset the timeout flag
- 1405 .loc 1 611 27 is_stmt 0 view .LVU362
- 1406 0448 0023 movs r3, #0
- 1407 044a 174A ldr r2, .L118+8
- 1408 044c 1380 strh r3, [r2] @ movhi
- 612:Src/stm32f7xx_it.c **** }
- 1409 .loc 1 612 13 is_stmt 1 view .LVU363
- 612:Src/stm32f7xx_it.c **** }
- 1410 .loc 1 612 21 is_stmt 0 view .LVU364
- 1411 044e 174A ldr r2, .L118+12
- 1412 0450 1370 strb r3, [r2]
- 1413 0452 0EE6 b .L48
- 1414 .L100:
- 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK;
- 1415 .loc 1 609 17 is_stmt 1 view .LVU365
- 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK;
- 1416 .loc 1 609 39 is_stmt 0 view .LVU366
- 1417 0454 5B08 lsrs r3, r3, #1
- 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK;
- 1418 .loc 1 609 43 view .LVU367
- 1419 0456 013B subs r3, r3, #1
- 609:Src/stm32f7xx_it.c **** CPU_state = DECODE_TASK;
- 1420 .loc 1 609 47 view .LVU368
- 1421 0458 1149 ldr r1, .L118
- 1422 045a 21F81320 strh r2, [r1, r3, lsl #1] @ movhi
- 1423 045e F0E7 b .L101
- 1424 .L102:
- 619:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1425 .loc 1 619 17 is_stmt 1 view .LVU369
- ARM GAS /tmp/ccMf3LkY.s page 171
-
-
- 619:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1426 .loc 1 619 39 is_stmt 0 view .LVU370
- 1427 0460 5908 lsrs r1, r3, #1
- 619:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1428 .loc 1 619 43 view .LVU371
- 1429 0462 0139 subs r1, r1, #1
- 619:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1430 .loc 1 619 47 view .LVU372
- 1431 0464 0E48 ldr r0, .L118
- 1432 0466 20F81120 strh r2, [r0, r1, lsl #1] @ movhi
- 1433 046a D7E7 b .L103
- 1434 .L49:
- 625:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1435 .loc 1 625 9 is_stmt 1 view .LVU373
- 625:Src/stm32f7xx_it.c **** COMMAND[(UART_rec_incr>>1)-1] += ((uint16_t)(uart_buf))<<8;
- 1436 .loc 1 625 12 is_stmt 0 view .LVU374
- 1437 046c 13F0010F tst r3, #1
- 1438 0470 0FD0 beq .L104
- 626:Src/stm32f7xx_it.c **** else
- 1439 .loc 1 626 13 is_stmt 1 view .LVU375
- 626:Src/stm32f7xx_it.c **** else
- 1440 .loc 1 626 20 is_stmt 0 view .LVU376
- 1441 0472 5908 lsrs r1, r3, #1
- 1442 0474 0139 subs r1, r1, #1
- 1443 0476 0A4C ldr r4, .L118
- 1444 0478 34F81100 ldrh r0, [r4, r1, lsl #1]
- 626:Src/stm32f7xx_it.c **** else
- 1445 .loc 1 626 43 view .LVU377
- 1446 047c 00EB0222 add r2, r0, r2, lsl #8
- 1447 0480 24F81120 strh r2, [r4, r1, lsl #1] @ movhi
- 1448 .L105:
- 629:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1449 .loc 1 629 9 is_stmt 1 view .LVU378
- 629:Src/stm32f7xx_it.c **** UART_transmission_request = NO_MESS;
- 1450 .loc 1 629 22 is_stmt 0 view .LVU379
- 1451 0484 0133 adds r3, r3, #1
- 1452 0486 084A ldr r2, .L118+8
- 1453 0488 1380 strh r3, [r2] @ movhi
- 630:Src/stm32f7xx_it.c **** break;
- 1454 .loc 1 630 9 is_stmt 1 view .LVU380
- 630:Src/stm32f7xx_it.c **** break;
- 1455 .loc 1 630 35 is_stmt 0 view .LVU381
- 1456 048a 0A4B ldr r3, .L118+20
- 1457 048c 0022 movs r2, #0
- 1458 048e 1A70 strb r2, [r3]
- 631:Src/stm32f7xx_it.c **** }
- 1459 .loc 1 631 5 is_stmt 1 view .LVU382
- 1460 .loc 1 634 1 is_stmt 0 view .LVU383
- 1461 0490 EFE5 b .L48
- 1462 .L104:
- 628:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1463 .loc 1 628 13 is_stmt 1 view .LVU384
- 628:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1464 .loc 1 628 35 is_stmt 0 view .LVU385
- 1465 0492 5908 lsrs r1, r3, #1
- 628:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1466 .loc 1 628 39 view .LVU386
- ARM GAS /tmp/ccMf3LkY.s page 172
-
-
- 1467 0494 0139 subs r1, r1, #1
- 628:Src/stm32f7xx_it.c **** UART_rec_incr++;
- 1468 .loc 1 628 43 view .LVU387
- 1469 0496 0248 ldr r0, .L118
- 1470 0498 20F81120 strh r2, [r0, r1, lsl #1] @ movhi
- 1471 049c F2E7 b .L105
- 1472 .L119:
- 1473 049e 00BF .align 2
- 1474 .L118:
- 1475 04a0 00000000 .word COMMAND
- 1476 04a4 00000000 .word CPU_state
- 1477 04a8 00000000 .word UART_rec_incr
- 1478 04ac 00000000 .word flg_tmt
- 1479 04b0 00000000 .word UART_header
- 1480 04b4 00000000 .word UART_transmission_request
- 1481 .cfi_endproc
- 1482 .LFE1202:
- 1484 .section .text.USART1_IRQHandler,"ax",%progbits
- 1485 .align 1
- 1486 .global USART1_IRQHandler
- 1487 .syntax unified
- 1488 .thumb
- 1489 .thumb_func
- 1491 USART1_IRQHandler:
- 1492 .LFB1196:
- 277:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 0 */
- 1493 .loc 1 277 1 is_stmt 1 view -0
- 1494 .cfi_startproc
- 1495 @ args = 0, pretend = 0, frame = 8
- 1496 @ frame_needed = 0, uses_anonymous_args = 0
- 1497 0000 00B5 push {lr}
- 1498 .LCFI9:
- 1499 .cfi_def_cfa_offset 4
- 1500 .cfi_offset 14, -4
- 1501 0002 83B0 sub sp, sp, #12
- 1502 .LCFI10:
- 1503 .cfi_def_cfa_offset 16
- 279:Src/stm32f7xx_it.c **** if(LL_USART_IsActiveFlag_RXNE(USART1) && LL_USART_IsEnabledIT_RXNE(USART1))
- 1504 .loc 1 279 3 view .LVU389
- 280:Src/stm32f7xx_it.c **** {
- 1505 .loc 1 280 3 view .LVU390
- 1506 .LVL19:
- 1507 .LBB68:
- 1508 .LBI68:
+ 494 .loc 2 3660 20 is_stmt 0 view .LVU102
+ 495 0056 164B ldr r3, .L37
+ 496 0058 586A ldr r0, [r3, #36]
+ 497 .LVL19:
+ 498 .loc 2 3660 20 view .LVU103
+ 499 .LBE81:
+ 500 .LBE80:
+ 501 .loc 1 294 5 discriminator 1 view .LVU104
+ 502 005a C0B2 uxtb r0, r0
+ 503 005c FFF7FEFF bl app_on_uart_byte
+ 504 .LVL20:
+ 505 .loc 1 294 5 view .LVU105
+ 506 0060 0DE0 b .L23
+ 507 .LVL21:
+ 508 .L34:
+ 260:Src/stm32f7xx_it.c ****
+ 509 .loc 1 260 11 view .LVU106
+ 510 0062 0023 movs r3, #0
+ 511 0064 D5E7 b .L24
+ 512 .LVL22:
+ 513 .L27:
+ 279:Src/stm32f7xx_it.c **** uart_error_detected = 1u;
+ 514 .loc 1 279 5 is_stmt 1 view .LVU107
+ 515 .LBB82:
+ 516 .LBI82:
+2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 517 .loc 2 2894 22 view .LVU108
+ 518 .LBB83:
+2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 519 .loc 2 2896 3 view .LVU109
+ 520 0066 124B ldr r3, .L37
+ 521 .LVL23:
+2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 522 .loc 2 2896 3 is_stmt 0 view .LVU110
+ 523 0068 0822 movs r2, #8
+ 524 006a 1A62 str r2, [r3, #32]
+ 525 .LVL24:
+2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
+ 526 .loc 2 2896 3 view .LVU111
+ 527 .LBE83:
+ 528 .LBE82:
+ 280:Src/stm32f7xx_it.c **** }
+ 529 .loc 1 280 5 is_stmt 1 view .LVU112
+ 283:Src/stm32f7xx_it.c **** {
+ 530 .loc 1 283 3 view .LVU113
+ 531 .L28:
+ 285:Src/stm32f7xx_it.c **** {
+ 532 .loc 1 285 5 view .LVU114
+ 533 .LBB84:
+ 534 .LBI84:
2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1509 .loc 3 2640 26 view .LVU391
- 1510 .LBB69:
+ 535 .loc 2 2640 26 view .LVU115
+ 536 .LBB85:
2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1511 .loc 3 2642 3 view .LVU392
+ 537 .loc 2 2642 3 view .LVU116
2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1512 .loc 3 2642 12 is_stmt 0 view .LVU393
- 1513 0004 304B ldr r3, .L136
- 1514 0006 DB69 ldr r3, [r3, #28]
+ 538 .loc 2 2642 12 is_stmt 0 view .LVU117
+ ARM GAS /tmp/ccnmuCkZ.s page 80
+
+
+ 539 006c 104B ldr r3, .L37
+ 540 006e DB69 ldr r3, [r3, #28]
2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1515 .loc 3 2642 77 view .LVU394
- 1516 0008 13F0200F tst r3, #32
- 1517 000c 07D0 beq .L121
- ARM GAS /tmp/ccMf3LkY.s page 173
-
-
- 1518 .LVL20:
+ 541 .loc 2 2642 77 view .LVU118
+ 542 0070 13F0200F tst r3, #32
+ 543 0074 01D0 beq .L30
+ 544 .LVL25:
2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1519 .loc 3 2642 77 view .LVU395
- 1520 .LBE69:
- 1521 .LBE68:
- 1522 .LBB70:
- 1523 .LBI70:
-3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1524 .loc 3 3366 26 is_stmt 1 view .LVU396
- 1525 .LBB71:
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1526 .loc 3 3368 3 view .LVU397
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1527 .loc 3 3368 12 is_stmt 0 view .LVU398
- 1528 000e 2E4B ldr r3, .L136
- 1529 0010 1B68 ldr r3, [r3]
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1530 .loc 3 3368 80 view .LVU399
- 1531 0012 13F0200F tst r3, #32
- 1532 0016 02D0 beq .L121
- 1533 .LVL21:
-3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1534 .loc 3 3368 80 view .LVU400
- 1535 .LBE71:
- 1536 .LBE70:
- 282:Src/stm32f7xx_it.c **** }
- 1537 .loc 1 282 5 is_stmt 1 view .LVU401
- 1538 0018 FFF7FEFF bl UART_RxCpltCallback
- 1539 .LVL22:
- 1540 001c 33E0 b .L120
- 1541 .L121:
- 286:Src/stm32f7xx_it.c **** {
- 1542 .loc 1 286 5 view .LVU402
- 1543 .LVL23:
- 1544 .LBB72:
- 1545 .LBI72:
-2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1546 .loc 3 2618 26 view .LVU403
- 1547 .LBB73:
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1548 .loc 3 2620 3 view .LVU404
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1549 .loc 3 2620 12 is_stmt 0 view .LVU405
- 1550 001e 2A4B ldr r3, .L136
- 1551 0020 DB69 ldr r3, [r3, #28]
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1552 .loc 3 2620 75 view .LVU406
- 1553 0022 13F0080F tst r3, #8
- 1554 0026 25D1 bne .L123
- 1555 .LVL24:
-2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1556 .loc 3 2620 75 view .LVU407
- 1557 .LBE73:
- 1558 .LBE72:
- 291:Src/stm32f7xx_it.c **** {
- 1559 .loc 1 291 10 is_stmt 1 view .LVU408
- 1560 .LBB74:
- ARM GAS /tmp/ccMf3LkY.s page 174
-
-
- 1561 .LBI74:
-2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1562 .loc 3 2596 26 view .LVU409
- 1563 .LBB75:
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1564 .loc 3 2598 3 view .LVU410
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1565 .loc 3 2598 12 is_stmt 0 view .LVU411
- 1566 0028 274B ldr r3, .L136
- 1567 002a DB69 ldr r3, [r3, #28]
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1568 .loc 3 2598 73 view .LVU412
- 1569 002c 13F0020F tst r3, #2
- 1570 0030 2CD1 bne .L124
- 1571 .LVL25:
-2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1572 .loc 3 2598 73 view .LVU413
- 1573 .LBE75:
- 1574 .LBE74:
- 296:Src/stm32f7xx_it.c **** {
- 1575 .loc 1 296 10 is_stmt 1 view .LVU414
- 1576 .LBB76:
- 1577 .LBI76:
-2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1578 .loc 3 2607 26 view .LVU415
- 1579 .LBB77:
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1580 .loc 3 2609 3 view .LVU416
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1581 .loc 3 2609 12 is_stmt 0 view .LVU417
- 1582 0032 254B ldr r3, .L136
- 1583 0034 DB69 ldr r3, [r3, #28]
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1584 .loc 3 2609 73 view .LVU418
- 1585 0036 13F0040F tst r3, #4
- 1586 003a 31D1 bne .L126
- 1587 .LVL26:
-2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1588 .loc 3 2609 73 view .LVU419
- 1589 .LBE77:
- 1590 .LBE76:
- 301:Src/stm32f7xx_it.c **** {
- 1591 .loc 1 301 10 is_stmt 1 view .LVU420
- 1592 .LBB78:
- 1593 .LBI78:
-2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1594 .loc 3 2585 26 view .LVU421
- 1595 .LBB79:
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1596 .loc 3 2587 3 view .LVU422
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1597 .loc 3 2587 12 is_stmt 0 view .LVU423
- 1598 003c 224B ldr r3, .L136
- 1599 003e DB69 ldr r3, [r3, #28]
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1600 .loc 3 2587 73 view .LVU424
- 1601 0040 13F0010F tst r3, #1
- ARM GAS /tmp/ccMf3LkY.s page 175
-
-
- 1602 0044 36D1 bne .L128
- 1603 .LVL27:
-2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1604 .loc 3 2587 73 view .LVU425
- 1605 .LBE79:
- 1606 .LBE78:
- 308:Src/stm32f7xx_it.c **** {
- 1607 .loc 1 308 7 is_stmt 1 view .LVU426
- 1608 .LBB80:
- 1609 .LBI80:
+ 545 .loc 2 2642 77 view .LVU119
+ 546 .LBE85:
+ 547 .LBE84:
+ 287:Src/stm32f7xx_it.c **** (void)discarded_byte;
+ 548 .loc 1 287 7 is_stmt 1 view .LVU120
+ 549 .LBB86:
+ 550 .LBI86:
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
+ 551 .loc 2 3658 25 view .LVU121
+ 552 .LBB87:
+ 553 .loc 2 3660 3 view .LVU122
+ 554 .loc 2 3660 20 is_stmt 0 view .LVU123
+ 555 0076 0E4B ldr r3, .L37
+ 556 0078 5B6A ldr r3, [r3, #36]
+ 557 .LVL26:
+ 558 .L30:
+ 559 .loc 2 3660 20 view .LVU124
+ 560 .LBE87:
+ 561 .LBE86:
+ 288:Src/stm32f7xx_it.c **** }
+ 562 .loc 1 288 7 is_stmt 1 view .LVU125
+ 290:Src/stm32f7xx_it.c **** }
+ 563 .loc 1 290 5 view .LVU126
+ 564 007a FFF7FEFF bl app_on_uart_error
+ 565 .LVL27:
+ 566 .L23:
+ 295:Src/stm32f7xx_it.c **** }
+ 296:Src/stm32f7xx_it.c **** else if (LL_USART_IsActiveFlag_TC(USART1) && LL_USART_IsEnabledIT_TC(USART1))
+ 297:Src/stm32f7xx_it.c **** {
+ 298:Src/stm32f7xx_it.c **** LL_USART_ClearFlag_TC(USART1);
+ 299:Src/stm32f7xx_it.c **** LL_USART_DisableIT_TC(USART1);
+ 300:Src/stm32f7xx_it.c **** }
+ 301:Src/stm32f7xx_it.c ****
+ 302:Src/stm32f7xx_it.c **** /* USER CODE END USART1_IRQn 0 */
+ 303:Src/stm32f7xx_it.c **** /* USER CODE BEGIN USART1_IRQn 1 */
+ 304:Src/stm32f7xx_it.c ****
+ 305:Src/stm32f7xx_it.c **** /* USER CODE END USART1_IRQn 1 */
+ 306:Src/stm32f7xx_it.c **** }
+ 567 .loc 1 306 1 is_stmt 0 view .LVU127
+ 568 007e 08BD pop {r3, pc}
+ 569 .LVL28:
+ 570 .L32:
+ 296:Src/stm32f7xx_it.c **** {
+ 571 .loc 1 296 8 is_stmt 1 view .LVU128
+ 572 .LBB88:
+ 573 .LBI88:
2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1610 .loc 3 2651 26 view .LVU427
- 1611 .LBB81:
+ 574 .loc 2 2651 26 view .LVU129
+ 575 .LBB89:
+ ARM GAS /tmp/ccnmuCkZ.s page 81
+
+
2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1612 .loc 3 2653 3 view .LVU428
+ 576 .loc 2 2653 3 view .LVU130
2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1613 .loc 3 2653 12 is_stmt 0 view .LVU429
- 1614 0046 214B ldr r3, .L136+4
- 1615 0048 DB69 ldr r3, [r3, #28]
+ 577 .loc 2 2653 12 is_stmt 0 view .LVU131
+ 578 0080 0B4B ldr r3, .L37
+ 579 0082 DB69 ldr r3, [r3, #28]
2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1616 .loc 3 2653 73 view .LVU430
- 1617 004a 13F0400F tst r3, #64
- 1618 004e 1AD0 beq .L120
- 1619 .LVL28:
+ 580 .loc 2 2653 73 view .LVU132
+ 581 0084 13F0400F tst r3, #64
+ 582 0088 F9D0 beq .L23
+ 583 .LVL29:
2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1620 .loc 3 2653 73 view .LVU431
- 1621 .LBE81:
- 1622 .LBE80:
- 1623 .LBB82:
- 1624 .LBI82:
+ 584 .loc 2 2653 73 view .LVU133
+ 585 .LBE89:
+ 586 .LBE88:
+ 587 .LBB90:
+ 588 .LBI90:
3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1625 .loc 3 3377 26 is_stmt 1 view .LVU432
- 1626 .LBB83:
+ 589 .loc 2 3377 26 is_stmt 1 view .LVU134
+ 590 .LBB91:
3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1627 .loc 3 3379 3 view .LVU433
+ 591 .loc 2 3379 3 view .LVU135
3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1628 .loc 3 3379 12 is_stmt 0 view .LVU434
- 1629 0050 1E4B ldr r3, .L136+4
- 1630 0052 1B68 ldr r3, [r3]
+ 592 .loc 2 3379 12 is_stmt 0 view .LVU136
+ 593 008a 094B ldr r3, .L37
+ 594 008c 1B68 ldr r3, [r3]
3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1631 .loc 3 3379 77 view .LVU435
- 1632 0054 13F0400F tst r3, #64
- 1633 0058 15D0 beq .L120
- 1634 .LVL29:
+ 595 .loc 2 3379 77 view .LVU137
+ 596 008e 13F0400F tst r3, #64
+ 597 0092 F4D0 beq .L23
+ 598 .LVL30:
3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1635 .loc 3 3379 77 view .LVU436
- 1636 .LBE83:
- 1637 .LBE82:
- 310:Src/stm32f7xx_it.c **** //test_counter += 1;
- 1638 .loc 1 310 9 is_stmt 1 view .LVU437
- 1639 .LBB84:
- 1640 .LBI84:
+ 599 .loc 2 3379 77 view .LVU138
+ 600 .LBE91:
+ 601 .LBE90:
+ 298:Src/stm32f7xx_it.c **** LL_USART_DisableIT_TC(USART1);
+ 602 .loc 1 298 5 is_stmt 1 view .LVU139
+ 603 .LBB92:
+ 604 .LBI92:
2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1641 .loc 3 2916 22 view .LVU438
- 1642 .LBB85:
+ 605 .loc 2 2916 22 view .LVU140
+ 606 .LBB93:
2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1643 .loc 3 2918 3 view .LVU439
- ARM GAS /tmp/ccMf3LkY.s page 176
-
-
- 1644 005a 1B4B ldr r3, .L136
- 1645 005c 4022 movs r2, #64
- 1646 005e 1A62 str r2, [r3, #32]
- 1647 .LVL30:
+ 607 .loc 2 2918 3 view .LVU141
+ 608 0094 064B ldr r3, .L37
+ 609 0096 4022 movs r2, #64
+ 610 0098 1A62 str r2, [r3, #32]
+ 611 .LVL31:
2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1648 .loc 3 2918 3 is_stmt 0 view .LVU440
- 1649 .LBE85:
- 1650 .LBE84:
- 313:Src/stm32f7xx_it.c **** //UART_transmission_busy = 0;
- 1651 .loc 1 313 9 is_stmt 1 view .LVU441
- 1652 .LBB86:
- 1653 .LBI86:
+ 612 .loc 2 2918 3 is_stmt 0 view .LVU142
+ 613 .LBE93:
+ 614 .LBE92:
+ 299:Src/stm32f7xx_it.c **** }
+ 615 .loc 1 299 5 is_stmt 1 view .LVU143
+ 616 .LBB94:
+ 617 .LBI94:
3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1654 .loc 3 3213 22 view .LVU442
- 1655 .L131:
+ ARM GAS /tmp/ccnmuCkZ.s page 82
+
+
+ 618 .loc 2 3213 22 view .LVU144
+ 619 .L33:
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1656 .loc 3 3215 3 discriminator 1 view .LVU443
- 1657 .LBB87:
+ 620 .loc 2 3215 3 discriminator 1 view .LVU145
+ 621 .LBB95:
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1658 .loc 3 3215 3 discriminator 1 view .LVU444
+ 622 .loc 2 3215 3 discriminator 1 view .LVU146
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1659 .loc 3 3215 3 discriminator 1 view .LVU445
+ 623 .loc 2 3215 3 discriminator 1 view .LVU147
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1660 .loc 3 3215 3 discriminator 1 view .LVU446
- 1661 .LBB88:
- 1662 .LBI88:
- 1663 .file 4 "Drivers/CMSIS/Include/cmsis_gcc.h"
+ 624 .loc 2 3215 3 discriminator 1 view .LVU148
+ 625 .LBB96:
+ 626 .LBI96:
+ 627 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//**
2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h
3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file
@@ -10558,9 +4905,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
28:Drivers/CMSIS/Include/cmsis_gcc.h **** /* ignore some GCC warnings */
29:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
30:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wsign-conversion"
- ARM GAS /tmp/ccMf3LkY.s page 177
-
-
31:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wconversion"
32:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wunused-parameter"
33:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -10574,6 +4918,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
41:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ASM __asm
42:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
43:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __INLINE
+ ARM GAS /tmp/ccnmuCkZ.s page 83
+
+
44:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __INLINE inline
45:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
46:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __STATIC_INLINE
@@ -10618,9 +4965,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
85:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
86:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT16_READ
87:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
- ARM GAS /tmp/ccMf3LkY.s page 178
-
-
88:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wpacked"
89:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic ignored "-Wattributes"
90:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
@@ -10634,6 +4978,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
98:Drivers/CMSIS/Include/cmsis_gcc.h **** __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
99:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic pop
100:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE *)(void *)(addr))-
+ ARM GAS /tmp/ccnmuCkZ.s page 84
+
+
101:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
102:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __UNALIGNED_UINT32_READ
103:Drivers/CMSIS/Include/cmsis_gcc.h **** #pragma GCC diagnostic push
@@ -10678,9 +5025,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
142:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid i" : : : "memory");
143:Drivers/CMSIS/Include/cmsis_gcc.h **** }
144:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccMf3LkY.s page 179
-
-
145:Drivers/CMSIS/Include/cmsis_gcc.h ****
146:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
147:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Control Register
@@ -10694,6 +5038,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
155:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control" : "=r" (result) );
156:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
157:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 85
+
+
158:Drivers/CMSIS/Include/cmsis_gcc.h ****
159:Drivers/CMSIS/Include/cmsis_gcc.h ****
160:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
@@ -10738,9 +5085,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
199:Drivers/CMSIS/Include/cmsis_gcc.h ****
200:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
201:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get IPSR Register
- ARM GAS /tmp/ccMf3LkY.s page 180
-
-
202:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the IPSR Register.
203:Drivers/CMSIS/Include/cmsis_gcc.h **** \return IPSR Register value
204:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -10754,6 +5098,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
212:Drivers/CMSIS/Include/cmsis_gcc.h ****
213:Drivers/CMSIS/Include/cmsis_gcc.h ****
214:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 86
+
+
215:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get APSR Register
216:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the APSR Register.
217:Drivers/CMSIS/Include/cmsis_gcc.h **** \return APSR Register value
@@ -10798,9 +5145,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
256:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
257:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
258:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Process Stack Pointer (non-secure)
- ARM GAS /tmp/ccMf3LkY.s page 181
-
-
259:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure s
260:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSP Register value
261:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -10814,6 +5158,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
269:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
270:Drivers/CMSIS/Include/cmsis_gcc.h ****
271:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 87
+
+
272:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
273:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer
274:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Process Stack Pointer (PSP).
@@ -10858,9 +5205,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
313:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure stat
314:Drivers/CMSIS/Include/cmsis_gcc.h **** \return MSP Register value
315:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 182
-
-
316:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
317:Drivers/CMSIS/Include/cmsis_gcc.h **** {
318:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -10874,6 +5218,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
326:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
327:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer
328:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Main Stack Pointer (MSP).
+ ARM GAS /tmp/ccnmuCkZ.s page 88
+
+
329:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
330:Drivers/CMSIS/Include/cmsis_gcc.h **** */
331:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
@@ -10918,9 +5265,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
370:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
371:Drivers/CMSIS/Include/cmsis_gcc.h **** {
372:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
- ARM GAS /tmp/ccMf3LkY.s page 183
-
-
373:Drivers/CMSIS/Include/cmsis_gcc.h **** }
374:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
375:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -10934,6 +5278,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
383:Drivers/CMSIS/Include/cmsis_gcc.h **** {
384:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
385:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 89
+
+
386:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
387:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
388:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -10978,9 +5325,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
427:Drivers/CMSIS/Include/cmsis_gcc.h **** }
428:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
429:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccMf3LkY.s page 184
-
-
430:Drivers/CMSIS/Include/cmsis_gcc.h ****
431:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
432:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
@@ -10994,6 +5338,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
440:Drivers/CMSIS/Include/cmsis_gcc.h **** {
441:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsie f" : : : "memory");
442:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 90
+
+
443:Drivers/CMSIS/Include/cmsis_gcc.h ****
444:Drivers/CMSIS/Include/cmsis_gcc.h ****
445:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -11038,9 +5385,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
484:Drivers/CMSIS/Include/cmsis_gcc.h ****
485:Drivers/CMSIS/Include/cmsis_gcc.h ****
486:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 185
-
-
487:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority
488:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register.
489:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
@@ -11054,6 +5398,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
497:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
498:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
499:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority (non-secure)
+ ARM GAS /tmp/ccnmuCkZ.s page 91
+
+
500:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Base Priority register when in secure state.
501:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set
502:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -11098,9 +5445,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
541:Drivers/CMSIS/Include/cmsis_gcc.h **** */
542:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
543:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 186
-
-
544:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
545:Drivers/CMSIS/Include/cmsis_gcc.h ****
546:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
@@ -11114,6 +5458,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
554:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Fault Mask register.
555:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
556:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 92
+
+
557:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
558:Drivers/CMSIS/Include/cmsis_gcc.h **** {
559:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
@@ -11158,9 +5505,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
598:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
599:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
600:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, psplim" : "=r" (result) );
- ARM GAS /tmp/ccMf3LkY.s page 187
-
-
601:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
602:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
603:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -11174,6 +5518,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
611:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in
612:Drivers/CMSIS/Include/cmsis_gcc.h **** \return PSPLIM Register value
613:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 93
+
+
614:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
615:Drivers/CMSIS/Include/cmsis_gcc.h **** {
616:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
@@ -11218,9 +5565,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
655:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in s
656:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
657:Drivers/CMSIS/Include/cmsis_gcc.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 188
-
-
658:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
659:Drivers/CMSIS/Include/cmsis_gcc.h **** {
660:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
@@ -11234,6 +5578,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
668:Drivers/CMSIS/Include/cmsis_gcc.h ****
669:Drivers/CMSIS/Include/cmsis_gcc.h ****
670:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 94
+
+
671:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Main Stack Pointer Limit
672:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
673:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence zero is returned always in non-secure
@@ -11278,9 +5625,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
712:Drivers/CMSIS/Include/cmsis_gcc.h **** }
713:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
714:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccMf3LkY.s page 189
-
-
715:Drivers/CMSIS/Include/cmsis_gcc.h ****
716:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
717:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit
@@ -11294,6 +5638,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
725:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
726:Drivers/CMSIS/Include/cmsis_gcc.h **** {
727:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+ ARM GAS /tmp/ccnmuCkZ.s page 95
+
+
728:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
729:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
730:Drivers/CMSIS/Include/cmsis_gcc.h **** (void)MainStackPtrLimit;
@@ -11338,9 +5685,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
769:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
770:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_get_fpscr)
771:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
- ARM GAS /tmp/ccMf3LkY.s page 190
-
-
772:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
773:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
774:Drivers/CMSIS/Include/cmsis_gcc.h **** return __builtin_arm_get_fpscr();
@@ -11354,6 +5698,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
782:Drivers/CMSIS/Include/cmsis_gcc.h **** return(0U);
783:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
784:Drivers/CMSIS/Include/cmsis_gcc.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 96
+
+
785:Drivers/CMSIS/Include/cmsis_gcc.h ****
786:Drivers/CMSIS/Include/cmsis_gcc.h ****
787:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -11398,9 +5745,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
826:Drivers/CMSIS/Include/cmsis_gcc.h **** #else
827:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_OUT_REG(r) "=r" (r)
828:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_RW_REG(r) "+r" (r)
- ARM GAS /tmp/ccMf3LkY.s page 191
-
-
829:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CMSIS_GCC_USE_REG(r) "r" (r)
830:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
831:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11414,6 +5758,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
839:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Wait For Interrupt
840:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Wait For Interrupt is a hint instruction that suspends execution until one of a number o
841:Drivers/CMSIS/Include/cmsis_gcc.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 97
+
+
842:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WFI() __ASM volatile ("wfi")
843:Drivers/CMSIS/Include/cmsis_gcc.h ****
844:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11458,9 +5805,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
883:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
884:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Data Memory Barrier
885:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Ensures the apparent order of the explicit memory operations before
- ARM GAS /tmp/ccMf3LkY.s page 192
-
-
886:Drivers/CMSIS/Include/cmsis_gcc.h **** and after the instruction, without ensuring their completion.
887:Drivers/CMSIS/Include/cmsis_gcc.h **** */
888:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __DMB(void)
@@ -11474,6 +5818,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
896:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x785
897:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to reverse
898:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Reversed value
+ ARM GAS /tmp/ccnmuCkZ.s page 98
+
+
899:Drivers/CMSIS/Include/cmsis_gcc.h **** */
900:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
901:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -11518,9 +5865,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
940:Drivers/CMSIS/Include/cmsis_gcc.h ****
941:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
942:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
- ARM GAS /tmp/ccMf3LkY.s page 193
-
-
943:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
944:Drivers/CMSIS/Include/cmsis_gcc.h **** }
945:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11534,6 +5878,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
953:Drivers/CMSIS/Include/cmsis_gcc.h **** */
954:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
955:Drivers/CMSIS/Include/cmsis_gcc.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 99
+
+
956:Drivers/CMSIS/Include/cmsis_gcc.h **** op2 %= 32U;
957:Drivers/CMSIS/Include/cmsis_gcc.h **** if (op2 == 0U)
958:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -11578,9 +5925,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
997:Drivers/CMSIS/Include/cmsis_gcc.h **** s--;
998:Drivers/CMSIS/Include/cmsis_gcc.h **** }
999:Drivers/CMSIS/Include/cmsis_gcc.h **** result <<= s; /* shift when v's highest bits are zero */
- ARM GAS /tmp/ccMf3LkY.s page 194
-
-
1000:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1001:Drivers/CMSIS/Include/cmsis_gcc.h **** return result;
1002:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -11594,6 +5938,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1010:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1011:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __CLZ (uint8_t)__builtin_clz
1012:Drivers/CMSIS/Include/cmsis_gcc.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 100
+
+
1013:Drivers/CMSIS/Include/cmsis_gcc.h ****
1014:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) || \
1015:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) || \
@@ -11638,9 +5985,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1054:Drivers/CMSIS/Include/cmsis_gcc.h **** accepted by assembler. So has to use following less efficient pattern.
1055:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1056:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
- ARM GAS /tmp/ccMf3LkY.s page 195
-
-
1057:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
1058:Drivers/CMSIS/Include/cmsis_gcc.h **** return ((uint16_t) result); /* Add explicit type cast here */
1059:Drivers/CMSIS/Include/cmsis_gcc.h **** }
@@ -11653,35 +5997,38 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1066:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint32_t at (*ptr)
1067:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1068:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
- 1664 .loc 4 1068 31 view .LVU447
- 1665 .LBB89:
+ 628 .loc 3 1068 31 view .LVU149
+ ARM GAS /tmp/ccnmuCkZ.s page 101
+
+
+ 629 .LBB97:
1069:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1070:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 1666 .loc 4 1070 5 view .LVU448
+ 630 .loc 3 1070 5 view .LVU150
1071:Drivers/CMSIS/Include/cmsis_gcc.h ****
1072:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
- 1667 .loc 4 1072 4 view .LVU449
- 1668 0060 194A ldr r2, .L136
- 1669 .syntax unified
- 1670 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 1671 0062 52E8003F ldrex r3, [r2]
- 1672 @ 0 "" 2
- 1673 .LVL31:
+ 631 .loc 3 1072 4 view .LVU151
+ 632 009a 054A ldr r2, .L37
+ 633 .syntax unified
+ 634 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 635 009c 52E8003F ldrex r3, [r2]
+ 636 @ 0 "" 2
+ 637 .LVL32:
1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 1674 .loc 4 1073 4 view .LVU450
- 1675 .loc 4 1073 4 is_stmt 0 view .LVU451
- 1676 .thumb
- 1677 .syntax unified
- 1678 .LBE89:
- 1679 .LBE88:
+ 638 .loc 3 1073 4 view .LVU152
+ 639 .loc 3 1073 4 is_stmt 0 view .LVU153
+ 640 .thumb
+ 641 .syntax unified
+ 642 .LBE97:
+ 643 .LBE96:
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1680 .loc 3 3215 3 discriminator 1 view .LVU452
- 1681 0066 23F04003 bic r3, r3, #64
- 1682 .LVL32:
+ 644 .loc 2 3215 3 discriminator 1 view .LVU154
+ 645 00a0 23F04003 bic r3, r3, #64
+ 646 .LVL33:
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1683 .loc 3 3215 3 is_stmt 1 discriminator 1 view .LVU453
- 1684 .LBB90:
- 1685 .LBI90:
+ 647 .loc 2 3215 3 is_stmt 1 discriminator 1 view .LVU155
+ 648 .LBB98:
+ 649 .LBI98:
1074:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1075:Drivers/CMSIS/Include/cmsis_gcc.h ****
1076:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11698,9 +6045,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1087:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1088:Drivers/CMSIS/Include/cmsis_gcc.h ****
1089:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
- ARM GAS /tmp/ccMf3LkY.s page 196
-
-
1090:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
1091:Drivers/CMSIS/Include/cmsis_gcc.h **** }
1092:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11714,6 +6058,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1100:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1101:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1102:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+ ARM GAS /tmp/ccnmuCkZ.s page 102
+
+
1103:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1104:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
1105:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -11731,180 +6078,4238 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed
1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */
1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
- 1686 .loc 4 1119 31 view .LVU454
- 1687 .LBB91:
+ 650 .loc 3 1119 31 view .LVU156
+ 651 .LBB99:
1120:Drivers/CMSIS/Include/cmsis_gcc.h **** {
1121:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
- 1688 .loc 4 1121 4 view .LVU455
+ 652 .loc 3 1121 4 view .LVU157
1122:Drivers/CMSIS/Include/cmsis_gcc.h ****
1123:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
- 1689 .loc 4 1123 4 view .LVU456
- 1690 .syntax unified
- 1691 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
- 1692 006a 42E80031 strex r1, r3, [r2]
- 1693 @ 0 "" 2
- 1694 .LVL33:
+ 653 .loc 3 1123 4 view .LVU158
+ 654 .syntax unified
+ 655 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
+ 656 00a4 42E80031 strex r1, r3, [r2]
+ 657 @ 0 "" 2
+ 658 .LVL34:
1124:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
- 1695 .loc 4 1124 4 view .LVU457
- 1696 .loc 4 1124 4 is_stmt 0 view .LVU458
- 1697 .thumb
- 1698 .syntax unified
- 1699 .LBE91:
- 1700 .LBE90:
+ 659 .loc 3 1124 4 view .LVU159
+ 660 .loc 3 1124 4 is_stmt 0 view .LVU160
+ 661 .thumb
+ 662 .syntax unified
+ 663 .LBE99:
+ 664 .LBE98:
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1701 .loc 3 3215 3 discriminator 1 view .LVU459
- 1702 006e 0029 cmp r1, #0
- 1703 0070 F6D1 bne .L131
- 1704 0072 08E0 b .L120
- 1705 .LVL34:
- 1706 .L123:
- ARM GAS /tmp/ccMf3LkY.s page 197
+ 665 .loc 2 3215 3 discriminator 1 view .LVU161
+ 666 00a8 0029 cmp r1, #0
+ 667 00aa F6D1 bne .L33
+ 668 00ac E7E7 b .L23
+ 669 .L38:
+ 670 00ae 00BF .align 2
+ 671 .L37:
+ 672 00b0 00100140 .word 1073811456
+ 673 .LBE95:
+ 674 .LBE94:
+ 675 .cfi_endproc
+ 676 .LFE1196:
+ 678 .section .text.TIM8_UP_TIM13_IRQHandler,"ax",%progbits
+ 679 .align 1
+ 680 .global TIM8_UP_TIM13_IRQHandler
+ 681 .syntax unified
+ 682 .thumb
+ 683 .thumb_func
+ 685 TIM8_UP_TIM13_IRQHandler:
+ ARM GAS /tmp/ccnmuCkZ.s page 103
-3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
- 1707 .loc 3 3215 3 discriminator 1 view .LVU460
- 1708 .LBE87:
- 1709 .LBE86:
- 289:Src/stm32f7xx_it.c **** }
- 1710 .loc 1 289 7 is_stmt 1 view .LVU461
- 1711 .LBB92:
- 1712 .LBI92:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1713 .loc 3 3658 25 view .LVU462
- 1714 .LBB93:
- 1715 .loc 3 3660 3 view .LVU463
- 1716 .loc 3 3660 20 is_stmt 0 view .LVU464
- 1717 0074 144B ldr r3, .L136
- 1718 0076 5B6A ldr r3, [r3, #36]
- 1719 .LVL35:
- 1720 .loc 3 3660 20 view .LVU465
- 1721 .LBE93:
- 1722 .LBE92:
- 289:Src/stm32f7xx_it.c **** }
- 1723 .loc 1 289 11 discriminator 1 view .LVU466
- 1724 0078 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2
- 1725 007c 52FA83F3 uxtab r3, r2, r3
- 1726 0080 DBB2 uxtb r3, r3
- 1727 0082 8DF80730 strb r3, [sp, #7]
- 1728 .L120:
- 323:Src/stm32f7xx_it.c ****
- 1729 .loc 1 323 1 view .LVU467
- 1730 0086 03B0 add sp, sp, #12
- 1731 .LCFI11:
- 1732 .cfi_remember_state
- 1733 .cfi_def_cfa_offset 4
- 1734 @ sp needed
- 1735 0088 5DF804FB ldr pc, [sp], #4
- 1736 .LVL36:
- 1737 .L124:
- 1738 .LCFI12:
- 1739 .cfi_restore_state
- 294:Src/stm32f7xx_it.c **** }
- 1740 .loc 1 294 7 is_stmt 1 view .LVU468
- 1741 .LBB94:
- 1742 .LBI94:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1743 .loc 3 3658 25 view .LVU469
- 1744 .LBB95:
- 1745 .loc 3 3660 3 view .LVU470
- 1746 .loc 3 3660 20 is_stmt 0 view .LVU471
- 1747 008c 0E4B ldr r3, .L136
- 1748 008e 5B6A ldr r3, [r3, #36]
- 1749 .LVL37:
- 1750 .loc 3 3660 20 view .LVU472
- 1751 .LBE95:
- 1752 .LBE94:
- 294:Src/stm32f7xx_it.c **** }
- 1753 .loc 1 294 11 discriminator 1 view .LVU473
- 1754 0090 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2
- 1755 0094 52FA83F3 uxtab r3, r2, r3
- ARM GAS /tmp/ccMf3LkY.s page 198
+ 686 .LFB1197:
+ 307:Src/stm32f7xx_it.c ****
+ 308:Src/stm32f7xx_it.c **** /**
+ 309:Src/stm32f7xx_it.c **** * @brief This function handles TIM8 update interrupt and TIM13 global interrupt.
+ 310:Src/stm32f7xx_it.c **** */
+ 311:Src/stm32f7xx_it.c **** void TIM8_UP_TIM13_IRQHandler(void)
+ 312:Src/stm32f7xx_it.c **** {
+ 687 .loc 1 312 1 is_stmt 1 view -0
+ 688 .cfi_startproc
+ 689 @ args = 0, pretend = 0, frame = 0
+ 690 @ frame_needed = 0, uses_anonymous_args = 0
+ 691 @ link register save eliminated.
+ 313:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 0 */
+ 314:Src/stm32f7xx_it.c **** /* USER CODE END TIM8_UP_TIM13_IRQn 0 */
+ 315:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM8_UP_TIM13_IRQn 1 */
+ 316:Src/stm32f7xx_it.c ****
+ 317:Src/stm32f7xx_it.c **** /* USER CODE END TIM8_UP_TIM13_IRQn 1 */
+ 318:Src/stm32f7xx_it.c **** }
+ 692 .loc 1 318 1 view .LVU163
+ 693 0000 7047 bx lr
+ 694 .cfi_endproc
+ 695 .LFE1197:
+ 697 .section .text.TIM5_IRQHandler,"ax",%progbits
+ 698 .align 1
+ 699 .global TIM5_IRQHandler
+ 700 .syntax unified
+ 701 .thumb
+ 702 .thumb_func
+ 704 TIM5_IRQHandler:
+ 705 .LFB1198:
+ 319:Src/stm32f7xx_it.c ****
+ 320:Src/stm32f7xx_it.c **** /**
+ 321:Src/stm32f7xx_it.c **** * @brief This function handles TIM5 global interrupt.
+ 322:Src/stm32f7xx_it.c **** */
+ 323:Src/stm32f7xx_it.c **** void TIM5_IRQHandler(void)
+ 324:Src/stm32f7xx_it.c **** {
+ 706 .loc 1 324 1 view -0
+ 707 .cfi_startproc
+ 708 @ args = 0, pretend = 0, frame = 0
+ 709 @ frame_needed = 0, uses_anonymous_args = 0
+ 710 @ link register save eliminated.
+ 325:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM5_IRQn 0 */
+ 326:Src/stm32f7xx_it.c ****
+ 327:Src/stm32f7xx_it.c **** /* USER CODE END TIM5_IRQn 0 */
+ 328:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM5_IRQn 1 */
+ 329:Src/stm32f7xx_it.c ****
+ 330:Src/stm32f7xx_it.c **** /* USER CODE END TIM5_IRQn 1 */
+ 331:Src/stm32f7xx_it.c **** }
+ 711 .loc 1 331 1 view .LVU165
+ 712 0000 7047 bx lr
+ 713 .cfi_endproc
+ 714 .LFE1198:
+ 716 .section .text.TIM6_DAC_IRQHandler,"ax",%progbits
+ 717 .align 1
+ 718 .global TIM6_DAC_IRQHandler
+ 719 .syntax unified
+ 720 .thumb
+ ARM GAS /tmp/ccnmuCkZ.s page 104
- 1756 0098 DBB2 uxtb r3, r3
- 1757 009a 8DF80730 strb r3, [sp, #7]
- 1758 009e F2E7 b .L120
- 1759 .LVL38:
- 1760 .L126:
- 299:Src/stm32f7xx_it.c **** }
- 1761 .loc 1 299 7 is_stmt 1 view .LVU474
- 1762 .LBB96:
- 1763 .LBI96:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1764 .loc 3 3658 25 view .LVU475
- 1765 .LBB97:
- 1766 .loc 3 3660 3 view .LVU476
- 1767 .loc 3 3660 20 is_stmt 0 view .LVU477
- 1768 00a0 094B ldr r3, .L136
- 1769 00a2 5B6A ldr r3, [r3, #36]
- 1770 .LVL39:
- 1771 .loc 3 3660 20 view .LVU478
- 1772 .LBE97:
- 1773 .LBE96:
- 299:Src/stm32f7xx_it.c **** }
- 1774 .loc 1 299 11 discriminator 1 view .LVU479
- 1775 00a4 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2
- 1776 00a8 52FA83F3 uxtab r3, r2, r3
- 1777 00ac DBB2 uxtb r3, r3
- 1778 00ae 8DF80730 strb r3, [sp, #7]
- 1779 00b2 E8E7 b .L120
- 1780 .LVL40:
- 1781 .L128:
- 304:Src/stm32f7xx_it.c **** }
- 1782 .loc 1 304 7 is_stmt 1 view .LVU480
- 1783 .LBB98:
- 1784 .LBI98:
-3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
- 1785 .loc 3 3658 25 view .LVU481
- 1786 .LBB99:
- 1787 .loc 3 3660 3 view .LVU482
- 1788 .loc 3 3660 20 is_stmt 0 view .LVU483
- 1789 00b4 044B ldr r3, .L136
- 1790 00b6 5B6A ldr r3, [r3, #36]
- 1791 .LVL41:
- 1792 .loc 3 3660 20 view .LVU484
- 1793 .LBE99:
- 1794 .LBE98:
- 304:Src/stm32f7xx_it.c **** }
- 1795 .loc 1 304 11 discriminator 1 view .LVU485
- 1796 00b8 9DF80720 ldrb r2, [sp, #7] @ zero_extendqisi2
- 1797 00bc 52FA83F3 uxtab r3, r2, r3
- 1798 00c0 DBB2 uxtb r3, r3
- 1799 00c2 8DF80730 strb r3, [sp, #7]
- 1800 00c6 DEE7 b .L120
- 1801 .L137:
- 1802 .align 2
- 1803 .L136:
- 1804 00c8 00100140 .word 1073811456
- 1805 00cc 00140140 .word 1073812480
- 1806 .cfi_endproc
- ARM GAS /tmp/ccMf3LkY.s page 199
+ 721 .thumb_func
+ 723 TIM6_DAC_IRQHandler:
+ 724 .LFB1199:
+ 332:Src/stm32f7xx_it.c ****
+ 333:Src/stm32f7xx_it.c **** /**
+ 334:Src/stm32f7xx_it.c **** * @brief This function handles TIM6 global interrupt, DAC1 and DAC2 underrun error interrupts.
+ 335:Src/stm32f7xx_it.c **** */
+ 336:Src/stm32f7xx_it.c **** void TIM6_DAC_IRQHandler(void)
+ 337:Src/stm32f7xx_it.c **** {
+ 725 .loc 1 337 1 view -0
+ 726 .cfi_startproc
+ 727 @ args = 0, pretend = 0, frame = 0
+ 728 @ frame_needed = 0, uses_anonymous_args = 0
+ 729 0000 08B5 push {r3, lr}
+ 730 .LCFI3:
+ 731 .cfi_def_cfa_offset 8
+ 732 .cfi_offset 3, -8
+ 733 .cfi_offset 14, -4
+ 338:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 0 */
+ 339:Src/stm32f7xx_it.c ****
+ 340:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 0 */
+ 341:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM6_DAC_IRQn 1 */
+ 342:Src/stm32f7xx_it.c **** if(LL_TIM_IsActiveFlag_UPDATE(TIM6))
+ 734 .loc 1 342 3 view .LVU167
+ 735 .LVL35:
+ 736 .LBB100:
+ 737 .LBI100:
+ 738 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
+ 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
+ 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h
+ 4:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @author MCD Application Team
+ 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Header file of TIM LL module.
+ 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
+ 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @attention
+ 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+ 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Copyright (c) 2017 STMicroelectronics.
+ 10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * All rights reserved.
+ 11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+ 12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file
+ 13:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in the root directory of this software component.
+ 14:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * If no LICENSE file comes with this software, it is provided AS-IS.
+ 15:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+ 16:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ******************************************************************************
+ 17:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 18:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 19:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Define to prevent recursive inclusion -------------------------------------*/
+ 20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #ifndef __STM32F7xx_LL_TIM_H
+ 21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __STM32F7xx_LL_TIM_H
+ 22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #ifdef __cplusplus
+ 24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** extern "C" {
+ 25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif
+ 26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 27:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Includes ------------------------------------------------------------------*/
+ 28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #include "stm32f7xx.h"
+ 29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 105
- 1807 .LFE1196:
- 1809 .section .text.DMA2_Stream7_TransferComplete,"ax",%progbits
- 1810 .align 1
- 1811 .global DMA2_Stream7_TransferComplete
- 1812 .syntax unified
- 1813 .thumb
- 1814 .thumb_func
- 1816 DMA2_Stream7_TransferComplete:
- 1817 .LFB1203:
- 635:Src/stm32f7xx_it.c ****
- 636:Src/stm32f7xx_it.c **** //-----------------------------------------------
- 637:Src/stm32f7xx_it.c **** void DMA2_Stream7_TransferComplete(void)
- 638:Src/stm32f7xx_it.c **** {
- 1818 .loc 1 638 1 is_stmt 1 view -0
- 1819 .cfi_startproc
- 1820 @ args = 0, pretend = 0, frame = 0
- 1821 @ frame_needed = 0, uses_anonymous_args = 0
- 1822 @ link register save eliminated.
- 639:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2);
- 1823 .loc 1 639 3 view .LVU487
- 1824 .LVL42:
- 1825 .LBB100:
- 1826 .LBI100:
- 1827 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
+ 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @addtogroup STM32F7xx_LL_Driver
+ 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined (TIM1) || defined (TIM8) || defined (TIM2) || defined (TIM3) || defined (TIM4) || defi
+ 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL TIM
+ 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private types -------------------------------------------------------------*/
+ 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private variables ---------------------------------------------------------*/
+ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Variables TIM Private Variables
+ 43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t OFFSET_TAB_CCMRx[] =
+ 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 0: TIMx_CH1 */
+ 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 1: TIMx_CH1N */
+ 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 2: TIMx_CH2 */
+ 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x00U, /* 3: TIMx_CH2N */
+ 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 4: TIMx_CH3 */
+ 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 5: TIMx_CH3N */
+ 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */
+ 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */
+ 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */
+ 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
+ 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] =
+ 59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */
+ 61:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */
+ 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: OC2M, OC2FE, OC2PE */
+ 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */
+ 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: OC3M, OC3FE, OC3PE */
+ 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */
+ 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: OC4M, OC4FE, OC4PE */
+ 67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: OC5M, OC5FE, OC5PE */
+ 68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U /* 8: OC6M, OC6FE, OC6PE */
+ 69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
+ 70:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 71:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_ICxx[] =
+ 72:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 73:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1S, IC1PSC, IC1F */
+ 74:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 1: - NA */
+ 75:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 2: CC2S, IC2PSC, IC2F */
+ 76:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 3: - NA */
+ 77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 4: CC3S, IC3PSC, IC3F */
+ 78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 5: - NA */
+ 79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: CC4S, IC4PSC, IC4F */
+ 80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: - NA */
+ 81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U /* 8: - NA */
+ 82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
+ 83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 84:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_CCxP[] =
+ 85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: CC1P */
+ ARM GAS /tmp/ccnmuCkZ.s page 106
+
+
+ 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 1: CC1NP */
+ 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 2: CC2P */
+ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 3: CC2NP */
+ 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 4: CC3P */
+ 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U, /* 5: CC3NP */
+ 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 12U, /* 6: CC4P */
+ 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 16U, /* 7: CC5P */
+ 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 20U /* 8: CC6P */
+ 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
+ 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OISx[] =
+ 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OIS1 */
+ 100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1U, /* 1: OIS1N */
+ 101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2U, /* 2: OIS2 */
+ 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3U, /* 3: OIS2N */
+ 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 4U, /* 4: OIS3 */
+ 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 5U, /* 5: OIS3N */
+ 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 6U, /* 6: OIS4 */
+ 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 7: OIS5 */
+ 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 10U /* 8: OIS6 */
+ 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
+ 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/
+ 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants
+ 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
+ 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Defines used for the bit position in the register and perform offsets */
+ 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_POSITION_BRK_SOURCE (POSITION_VAL(Source) & 0x1FUL)
+ 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Generic bit definitions for TIMx_AF1 register */
+ 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP TIM1_AF1_BKINP /*!< BRK BKIN input polarity */
+ 124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
+ 125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */
+ 127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_OR_RMP_SHIFT 16U
+ 128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_OR_RMP_MASK 0x0000FFFFU
+ 129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM2_OR_RMP_MASK (TIM2_OR_ITR1_RMP << TIMx_OR_RMP_SHIFT)
+ 130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM5_OR_RMP_MASK (TIM5_OR_TI4_RMP << TIMx_OR_RMP_SHIFT)
+ 131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM11_OR_RMP_MASK (TIM11_OR_TI1_RMP << TIMx_OR_RMP_SHIFT)
+ 132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Mask used to set the TDG[x:0] of the DTG bits of the TIMx_BDTR register */
+ 134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_1 ((uint8_t)0x7F)
+ 135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_2 ((uint8_t)0x3F)
+ 136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_3 ((uint8_t)0x1F)
+ 137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_DELAY_4 ((uint8_t)0x1F)
+ 138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Mask used to set the DTG[7:5] bits of the DTG bits of the TIMx_BDTR register */
+ 140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_1 ((uint8_t)0x00)
+ 141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_2 ((uint8_t)0x80)
+ 142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_3 ((uint8_t)0xC0)
+ 143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define DT_RANGE_4 ((uint8_t)0xE0)
+ ARM GAS /tmp/ccnmuCkZ.s page 107
+
+
+ 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private macros ------------------------------------------------------------*/
+ 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Macros TIM Private Macros
+ 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Convert channel id into channel index.
+ 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CHANNEL__ This parameter can be one of the following values:
+ 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+ 157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+ 158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+ 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+ 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+ 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+ 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+ 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+ 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+ 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none
+ 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \
+ 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\
+ 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\
+ 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\
+ 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\
+ 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\
+ 173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\
+ 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\
+ 175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH5) ? 7U : 8U)
+ 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @brief Calculate the deadtime sampling period(in ps).
+ 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz).
+ 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values:
+ 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+ 181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+ 182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+ 183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none
+ 184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_CALC_DTS(__TIMCLK__, __CKD__) \
+ 186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CKD__) == LL_TIM_CLOCKDIVISION_DIV1) ? ((uint64_t)1000000000000U/(__TIMCLK__)) : \
+ 187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CKD__) == LL_TIM_CLOCKDIVISION_DIV2) ? ((uint64_t)1000000000000U/((__TIMCLK__) >> 1U)) : \
+ 188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint64_t)1000000000000U/((__TIMCLK__) >> 2U)))
+ 189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported types ------------------------------------------------------------*/
+ 195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
+ 196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_ES_INIT TIM Exported Init structure
+ 197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 108
+
+
+ 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Time Base configuration structure definition.
+ 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint16_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
+ 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_D
+ 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetPrescaler().*/
+ 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CounterMode; /*!< Specifies the counter mode.
+ 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_COUNTERMODE.
+ 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetCounterMode().*/
+ 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Autoreload; /*!< Specifies the auto reload value to be loaded into the active
+ 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Auto-Reload Register at the next update event.
+ 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter must be a number between Min_Data=0x0000 and Max_
+ 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Some timer instances may support 32 bits counters. In that case
+ 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** be a number between 0x0000 and 0xFFFFFFFF.
+ 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/
+ 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division.
+ 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION.
+ 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetClockDivision().*/
+ 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downc
+ 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** reaches zero, an update event is generated and counting restarts
+ 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** from the RCR value (N).
+ 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This means in PWM mode that (N+1) corresponds to:
+ 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of PWM periods in edge-aligned mode
+ 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of half PWM period in center-aligned mode
+ 238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x
+ 239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFF.
+ 240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat
+ 241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFFFF.
+ 242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetRepetitionCounter().*/
+ 245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_InitTypeDef;
+ 246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Output Compare configuration structure definition.
+ 249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCMode; /*!< Specifies the output mode.
+ 253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCMODE.
+ 254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetMode().*/
+ 257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 109
+
+
+ 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCState; /*!< Specifies the TIM Output Compare state.
+ 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
+ 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions
+ 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
+ 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNState; /*!< Specifies the TIM complementary Output Compare state.
+ 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCSTATE.
+ 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functions
+ 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_CC_EnableChannel() or @ref LL_TIM_CC_DisableChannel().*/
+ 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CompareValue; /*!< Specifies the Compare value to be loaded into the Capture Compare Re
+ 271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data=0x0000 and Max_Data=
+ 272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** LL_TIM_OC_SetCompareCHx (x=1..6).*/
+ 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCPolarity; /*!< Specifies the output polarity.
+ 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
+ 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/
+ 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
+ 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY.
+ 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/
+ 287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
+ 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
+ 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/
+ 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
+ 296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
+ 297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetIdleState().*/
+ 300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_OC_InitTypeDef;
+ 301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Input Capture configuration structure definition.
+ 304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
+ 310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+ 311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
+ 314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 110
+
+
+ 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICActiveInput; /*!< Specifies the input.
+ 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+ 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
+ 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
+ 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+ 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
+ 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ICFilter; /*!< Specifies the input capture filter.
+ 328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+ 329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
+ 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_IC_InitTypeDef;
+ 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Encoder interface configuration structure definition.
+ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4).
+ 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE.
+ 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetEncoderMode().*/
+ 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
+ 347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+ 348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
+ 351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
+ 353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+ 354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
+ 357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
+ 359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+ 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
+ 363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
+ 365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+ 366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
+ 369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Polarity; /*!< Specifies the active edge of TI2 input.
+ 371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+ ARM GAS /tmp/ccnmuCkZ.s page 111
+
+
+ 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
+ 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2ActiveInput; /*!< Specifies the TI2 input source
+ 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
+ 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetActiveInput().*/
+ 381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Prescaler; /*!< Specifies the TI2 input prescaler value.
+ 383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+ 384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
+ 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC2Filter; /*!< Specifies the TI2 input filter.
+ 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_FILTER.
+ 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
+ 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_ENCODER_InitTypeDef;
+ 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition.
+ 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input.
+ 403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_IC_POLARITY.
+ 404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPolarity().*/
+ 407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
+ 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th
+ 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs.
+ 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
+ 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetPrescaler().*/
+ 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Filter; /*!< Specifies the TI1 input filter.
+ 417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of
+ 418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref TIM_LL_EC_IC_FILTER.
+ 419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ 421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_IC_SetFilter().*/
+ 422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t CommutationDelay; /*!< Specifies the compare value to be loaded into the Capture Compa
+ 424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** A positive pulse (TRGO event) is generated with a programmable
+ 425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** a change occurs on the Hall inputs.
+ 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x0000 and Ma
+ 427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function
+ ARM GAS /tmp/ccnmuCkZ.s page 112
+
+
+ 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetCompareCH2().*/
+ 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_HALLSENSOR_InitTypeDef;
+ 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief BDTR (Break and Dead Time) structure definition
+ 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct
+ 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSRState; /*!< Specifies the Off-State selection used in Run mode.
+ 438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSR
+ 439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates()
+ 442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level
+ 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OSSIState; /*!< Specifies the Off-State used in Idle state.
+ 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OSSI
+ 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetOffStates()
+ 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level
+ 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters.
+ 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL
+ 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note The LOCK bits can be written only once after the reset.
+ 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the
+ 460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t DeadTime; /*!< Specifies the delay time between the switching-off and the
+ 462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** switching-on of the outputs.
+ 463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a number between Min_Data = 0x00 and Ma
+ 464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime()
+ 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint16_t BreakState; /*!< Specifies whether the TIM Break input is enabled or not.
+ 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_ENABLE
+ 473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableBRK() or @ref LL_TIM_DisableBRK()
+ 476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakPolarity; /*!< Specifies the TIM Break Input pin polarity.
+ 481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_POLARIT
+ 482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK()
+ 485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 113
+
+
+ 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter; /*!< Specifies the TIM Break Filter.
+ 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK_FILTER
+ 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK()
+ 494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2State; /*!< Specifies whether the TIM Break2 input is enabled or not.
+ 499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_ENABLE
+ 500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableBRK2() or @ref LL_TIM_DisableBRK2()
+ 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Polarity; /*!< Specifies the TIM Break2 Input pin polarity.
+ 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_POLARI
+ 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2()
+ 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter.
+ 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_BREAK2_FILTER
+ 518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2()
+ 521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled
+ 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_AUTOMATICOUTP
+ 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
+ 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_EnableAutomaticOutput() or @ref LL_TIM_DisableAut
+ 530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
+ 532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
+ 533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } LL_TIM_BDTR_InitTypeDef;
+ 534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
+ 539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported constants --------------------------------------------------------*/
+ 541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Constants TIM Exported Constants
+ 542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ ARM GAS /tmp/ccnmuCkZ.s page 114
+
+
+ 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_GET_FLAG Get Flags Defines
+ 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Flags defines which can be used with LL_TIM_ReadReg function.
+ 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_UIF TIM_SR_UIF /*!< Update interrupt flag */
+ 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1IF TIM_SR_CC1IF /*!< Capture/compare 1 interrup
+ 551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2IF TIM_SR_CC2IF /*!< Capture/compare 2 interrup
+ 552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3IF TIM_SR_CC3IF /*!< Capture/compare 3 interrup
+ 553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4IF TIM_SR_CC4IF /*!< Capture/compare 4 interrup
+ 554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC5IF TIM_SR_CC5IF /*!< Capture/compare 5 interrup
+ 555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC6IF TIM_SR_CC6IF /*!< Capture/compare 6 interrup
+ 556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_COMIF TIM_SR_COMIF /*!< COM interrupt flag */
+ 557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_TIF TIM_SR_TIF /*!< Trigger interrupt flag */
+ 558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_BIF TIM_SR_BIF /*!< Break interrupt flag */
+ 559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_B2IF TIM_SR_B2IF /*!< Second break interrupt fla
+ 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC1OF TIM_SR_CC1OF /*!< Capture/Compare 1 overcapt
+ 561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC2OF TIM_SR_CC2OF /*!< Capture/Compare 2 overcapt
+ 562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC3OF TIM_SR_CC3OF /*!< Capture/Compare 3 overcapt
+ 563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_CC4OF TIM_SR_CC4OF /*!< Capture/Compare 4 overcapt
+ 564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_SR_SBIF TIM_SR_SBIF /*!< System Break interrupt fla
+ 565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
+ 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable
+ 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */
+ 574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_ENABLE TIM_BDTR_BKE /*!< Break function enabled */
+ 575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
+ 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */
+ 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_ENABLE TIM_BDTR_BK2E /*!< Break2 function enabled */
+ 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_AUTOMATICOUTPUT_ENABLE Automatic output enable
+ 589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_DISABLE 0x00000000U /*!< MOE can be set only by
+ 592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_AUTOMATICOUTPUT_ENABLE TIM_BDTR_AOE /*!< MOE can be set by softw
+ 593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
+ 597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IT IT Defines
+ 599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief IT defines which can be used with LL_TIM_ReadReg and LL_TIM_WriteReg functions.
+ ARM GAS /tmp/ccnmuCkZ.s page 115
+
+
+ 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_UIE TIM_DIER_UIE /*!< Update interrupt enable */
+ 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC1IE TIM_DIER_CC1IE /*!< Capture/compare 1 interrup
+ 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC2IE TIM_DIER_CC2IE /*!< Capture/compare 2 interrup
+ 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC3IE TIM_DIER_CC3IE /*!< Capture/compare 3 interrup
+ 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_CC4IE TIM_DIER_CC4IE /*!< Capture/compare 4 interrup
+ 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_COMIE TIM_DIER_COMIE /*!< COM interrupt enable */
+ 608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_TIE TIM_DIER_TIE /*!< Trigger interrupt enable *
+ 609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DIER_BIE TIM_DIER_BIE /*!< Break interrupt enable */
+ 610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_UPDATESOURCE Update Source
+ 615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_REGULAR 0x00000000U /*!< Counter overflow/underflow
+ 618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_UPDATESOURCE_COUNTER TIM_CR1_URS /*!< Only counter overflow/unde
+ 619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode
+ 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at
+ 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at
+ 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERMODE Counter Mode
+ 633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_UP 0x00000000U /*!< Counter used as upcounter
+ 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounte
+ 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and
+ 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and
+ 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and
+ 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CLOCKDIVISION Clock Division
+ 645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV1 0x00000000U /*!< tDTS=tCK_INT */
+ 648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV2 TIM_CR1_CKD_0 /*!< tDTS=2*tCK_INT */
+ 649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CLOCKDIVISION_DIV4 TIM_CR1_CKD_1 /*!< tDTS=4*tCK_INT */
+ 650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_COUNTERDIRECTION Counter Direction
+ 655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 116
+
+
+ 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_UP 0x00000000U /*!< Timer counter counts up */
+ 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERDIRECTION_DOWN TIM_CR1_DIR /*!< Timer counter counts down
+ 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CCUPDATESOURCE Capture Compare Update Source
+ 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_ONLY 0x00000000U /*!< Capture/compare control bi
+ 667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI TIM_CR2_CCUS /*!< Capture/compare control bi
+ 668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CCDMAREQUEST Capture Compare DMA Request
+ 673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_CC 0x00000000U /*!< CCx DMA request sent when
+ 676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CCDMAREQUEST_UPDATE TIM_CR2_CCDS /*!< CCx DMA requests sent when
+ 677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level
+ 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF - No bit is write
+ 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */
+ 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /*!< LOCK Level 2 */
+ 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */
+ 688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_CHANNEL Channel
+ 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1
+ 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /*!< Timer complementary output ch
+ 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH2 TIM_CCER_CC2E /*!< Timer input/output channel 2
+ 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH2N TIM_CCER_CC2NE /*!< Timer complementary output ch
+ 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH3 TIM_CCER_CC3E /*!< Timer input/output channel 3
+ 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH3N TIM_CCER_CC3NE /*!< Timer complementary output ch
+ 701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH4 TIM_CCER_CC4E /*!< Timer input/output channel 4
+ 702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH5 TIM_CCER_CC5E /*!< Timer output channel 5 */
+ 703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH6 TIM_CCER_CC6E /*!< Timer output channel 6 */
+ 704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER)
+ 709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCSTATE Output Configuration State
+ 710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_DISABLE 0x00000000U /*!< OCx is not active */
+ 713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCSTATE_ENABLE TIM_CCER_CC1E /*!< OCx signal is output on
+ ARM GAS /tmp/ccnmuCkZ.s page 117
+
+
+ 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* USE_FULL_LL_DRIVER */
+ 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** Legacy definitions for compatibility purpose
+ 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @cond 0
+ 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM1 LL_TIM_OCMODE_ASYMMETRIC_PWM1
+ 723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASSYMETRIC_PWM2 LL_TIM_OCMODE_ASYMMETRIC_PWM2
+ 724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @endcond
+ 726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCMODE Output Configuration Mode
+ 729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FROZEN 0x00000000U
+ 732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ACTIVE TIM_CCMR1_OC1M_0
+ 733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_INACTIVE TIM_CCMR1_OC1M_1
+ 734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_TOGGLE (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
+ 735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_INACTIVE TIM_CCMR1_OC1M_2
+ 736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_FORCED_ACTIVE (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
+ 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
+ 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
+ 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3
+ 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
+ 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
+ 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1
+ 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1
+ 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
+ 745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCPOLARITY Output Configuration Polarity
+ 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/
+ 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
+ 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+ 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ 758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OCIDLESTATE Output Configuration Idle State
+ 759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+ 760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ 761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCIDLESTATE_LOW 0x00000000U /*!__REG__, (__VAL
+1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Read a value in TIM register.
+1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __INSTANCE__ TIM Instance
+1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __REG__ Register to be read
+1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Register value
+1191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
+1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the UIFCPY flag from the counter value.
+1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ());
+1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied
+1201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * to TIMx_CNT register bit 31)
+1202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNT__ Counter value
+1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval UIF status bit
+1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GETFLAG_UIFCPY(__CNT__) \
+1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
+1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de
+1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DEADTIME (80000000, @ref LL_TIM_GetClockDivision (), 120);
+1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
+1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CKD__ This parameter can be one of the following values:
+1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+1214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+1215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+1216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DT__ deadtime duration (in ns)
+1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval DTG[0:7]
+1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DEADTIME(__TIMCLK__, __CKD__, __DT__) \
+1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ( (((uint64_t)((__DT__)*1000U)) < ((DT_DELAY_1+1U) * TIM_CALC_DTS((__TIMCLK__), (__CKD__)))) ?
+1221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(((uint64_t)((__DT__)*1000U) / TIM_CALC_DTS((__TIMCLK__), (__CKD__))) & DT_DELAY_1) :
+1222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((64U + (DT_DELAY_2+1U)) * 2U * TIM_CALC_DTS((__TIMCLK__), (__C
+1223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_2 | ((uint8_t)((uint8_t)((((uint64_t)((__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
+1224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 1U) - (uint8_t) 64) & DT_DELAY_2))
+1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_3+1U)) * 8U * TIM_CALC_DTS((__TIMCLK__), (__C
+1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_3 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
+ ARM GAS /tmp/ccnmuCkZ.s page 126
+
+
+1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 3U) - (uint8_t) 32) & DT_DELAY_3))
+1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((uint64_t)((__DT__)*1000U)) < ((32U + (DT_DELAY_4+1U)) * 16U * TIM_CALC_DTS((__TIMCLK__), (__
+1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (uint8_t)(DT_RANGE_4 | ((uint8_t)((uint8_t)(((((uint64_t)(__DT__)*1000U))/ TIM_CALC_DTS((__TIMC
+1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (__CKD__))) >> 4U) - (uint8_t) 32) & DT_DELAY_4))
+1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U)
+1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the prescaler value to achieve the required counter clock freq
+1235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PSC (80000000, 1000000);
+1236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
+1237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __CNTCLK__ counter clock frequency (in Hz)
+1238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value (between Min_Data=0 and Max_Data=65535)
+1239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_PSC(__TIMCLK__, __CNTCLK__) \
+1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__TIMCLK__) >= (__CNTCLK__)) ? (uint32_t)((((__TIMCLK__) + (__CNTCLK__)/2U)/(__CNTCLK__)) - 1U
+1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required output signal fr
+1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_ARR (1000000, @ref LL_TIM_GetPrescaler (), 10000);
+1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
+1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
+1248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __FREQ__ output signal frequency (in Hz)
+1249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
+1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \
+1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U))
+1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu
+1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * active/inactive delay.
+1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10);
+1258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
+1259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
+1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us)
+1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Compare value (between Min_Data=0 and Max_Data=65535)
+1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
+1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
+1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
+1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the auto-reload value to achieve the required pulse duration
+1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when the timer operates in one pulse mode).
+1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_PULSE (1000000, @ref LL_TIM_GetPrescaler (), 10, 20);
+1271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __TIMCLK__ timer input clock frequency (in Hz)
+1272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PSC__ prescaler
+1273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __DELAY__ timer output compare active/inactive delay (in us)
+1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __PULSE__ pulse duration (in us)
+1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value (between Min_Data=0 and Max_Data=65535)
+1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_PULSE(__TIMCLK__, __PSC__, __DELAY__, __PULSE__) \
+1278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(__LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__PULSE__)) \
+1279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + __LL_TIM_CALC_DELAY((__TIMCLK__), (__PSC__), (__DELAY__))))
+1280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the ratio of the input capture prescaler
+1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GET_ICPSC_RATIO (@ref LL_TIM_IC_GetPrescaler ());
+ ARM GAS /tmp/ccnmuCkZ.s page 127
+
+
+1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param __ICPSC__ This parameter can be one of the following values:
+1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
+1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
+1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
+1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
+1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Input capture prescaler ratio (1, 2, 4 or 8)
+1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_GET_ICPSC_RATIO(__ICPSC__) \
+1292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(0x01U << (((__ICPSC__) >> 16U) >> TIM_CCMR1_IC1PSC_Pos)))
+1293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Exported functions --------------------------------------------------------*/
+1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Exported_Functions TIM Exported Functions
+1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Time_Base Time Base configuration
+1305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+1306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter.
+1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter
+1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx)
+1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_CEN);
+1316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable timer counter.
+1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter
+1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableCounter(TIM_TypeDef *TIMx)
+1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_CEN);
+1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the timer counter is enabled.
+1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_IsEnabledCounter
+1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledCounter(const TIM_TypeDef *TIMx)
+1336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_CEN) == (TIM_CR1_CEN)) ? 1UL : 0UL);
+1338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 128
+
+
+1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable update event generation.
+1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_EnableUpdateEvent
+1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUpdateEvent(TIM_TypeDef *TIMx)
+1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UDIS);
+1349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update event generation.
+1353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_DisableUpdateEvent
+1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUpdateEvent(TIM_TypeDef *TIMx)
+1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UDIS);
+1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether update event generation is enabled.
+1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent
+1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1).
+1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx)
+1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL);
+1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set update event source
+1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_REGULAR: any of the following events
+1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generate an update interrupt or DMA request if enabled:
+1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Counter overflow/underflow
+1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Setting the UG bit
+1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Update generation through the slave mode controller
+1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
+1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * overflow/underflow generates an update interrupt or DMA request if enabled.
+1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_SetUpdateSource
+1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param UpdateSource This parameter can be one of the following values:
+1385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
+1386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
+1387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetUpdateSource(TIM_TypeDef *TIMx, uint32_t UpdateSource)
+1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_URS, UpdateSource);
+1392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual event update source
+1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 URS LL_TIM_GetUpdateSource
+1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccnmuCkZ.s page 129
+
+
+1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_REGULAR
+1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_UPDATESOURCE_COUNTER
+1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetUpdateSource(const TIM_TypeDef *TIMx)
+1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_URS));
+1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set one pulse mode (one shot v.s. repetitive).
+1409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_SetOnePulseMode
+1410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OnePulseMode This parameter can be one of the following values:
+1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
+1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
+1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOnePulseMode(TIM_TypeDef *TIMx, uint32_t OnePulseMode)
+1417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_OPM, OnePulseMode);
+1419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode.
+1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode
+1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE
+1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE
+1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetOnePulseMode(const TIM_TypeDef *TIMx)
+1430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_OPM));
+1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the timer counter counting mode.
+1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
+1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported
+1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance.
+1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Switching from Center Aligned counter mode to Edge counter mode (or reverse)
+1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * requires a timer reset to avoid unexpected direction
+1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * due to DIR bit readonly in center aligned mode.
+1442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_SetCounterMode\n
+1443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_SetCounterMode
+1444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CounterMode This parameter can be one of the following values:
+1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP
+1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN
+1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
+1449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
+1450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
+1451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounterMode(TIM_TypeDef *TIMx, uint32_t CounterMode)
+1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 130
+
+
+1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, (TIM_CR1_DIR | TIM_CR1_CMS), CounterMode);
+1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual counter mode.
+1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
+1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported
+1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * by a timer instance.
+1463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetCounterMode\n
+1464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR1 CMS LL_TIM_GetCounterMode
+1465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+1467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_UP
+1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_DOWN
+1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP
+1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_DOWN
+1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERMODE_CENTER_UP_DOWN
+1472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounterMode(const TIM_TypeDef *TIMx)
+1474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t counter_mode;
+1476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CMS));
+1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U)
+1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
+1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return counter_mode;
+1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable auto-reload (ARR) preload.
+1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_EnableARRPreload
+1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
+1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_ARPE);
+1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable auto-reload (ARR) preload.
+1500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_DisableARRPreload
+1501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableARRPreload(TIM_TypeDef *TIMx)
+1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_ARPE);
+1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether auto-reload (ARR) preload is enabled.
+1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 ARPE LL_TIM_IsEnabledARRPreload
+ ARM GAS /tmp/ccnmuCkZ.s page 131
+
+
+1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledARRPreload(const TIM_TypeDef *TIMx)
+1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_ARPE) == (TIM_CR1_ARPE)) ? 1UL : 0UL);
+1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead
+1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters.
+1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
+1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer
+1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance.
+1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision
+1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockDivision This parameter can be one of the following values:
+1529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+1530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+1531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+1532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockDivision(TIM_TypeDef *TIMx, uint32_t ClockDivision)
+1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR1, TIM_CR1_CKD, ClockDivision);
+1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the actual division ratio between the timer clock and the sampling clock used by t
+1541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * generators (when supported) and the digital filters.
+1542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check
+1543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer
+1544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance.
+1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_GetClockDivision
+1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
+1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
+1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
+1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetClockDivision(const TIM_TypeDef *TIMx)
+1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_CKD));
+1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the counter value.
+1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_SetCounter
+1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
+1564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCounter(TIM_TypeDef *TIMx, uint32_t Counter)
+1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CNT, Counter);
+ ARM GAS /tmp/ccnmuCkZ.s page 132
+
+
+1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the counter value.
+1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CNT CNT LL_TIM_GetCounter
+1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF)
+1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx)
+1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT));
+1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current direction of the counter
+1586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 DIR LL_TIM_GetDirection
+1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_UP
+1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_COUNTERDIRECTION_DOWN
+1591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetDirection(const TIM_TypeDef *TIMx)
+1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR));
+1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the prescaler value.
+1599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The counter clock frequency CK_CNT is equal to fCK_PSC / (PSC[15:0] + 1).
+1600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The prescaler can be changed on the fly as this control register is buffered. The new
+1601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * prescaler ratio is taken into account at the next update event.
+1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_PSC can be used to calculate the Prescaler parameter
+1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_SetPrescaler
+1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535
+1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
+1609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->PSC, Prescaler);
+1611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the prescaler value.
+1615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll PSC PSC LL_TIM_GetPrescaler
+1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Prescaler value between Min_Data=0 and Max_Data=65535
+1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetPrescaler(const TIM_TypeDef *TIMx)
+1620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->PSC));
+1622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the auto-reload value.
+ ARM GAS /tmp/ccnmuCkZ.s page 133
+
+
+1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The counter is blocked while the auto-reload value is null.
+1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_ARR can be used to calculate the AutoReload parameter
+1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_SetAutoReload
+1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param AutoReload between Min_Data=0 and Max_Data=65535
+1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload)
+1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload);
+1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value.
+1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll ARR ARR LL_TIM_GetAutoReload
+1643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+1644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+1645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Auto-reload value
+1647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetAutoReload(const TIM_TypeDef *TIMx)
+1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->ARR));
+1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the repetition counter value.
+1655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note For advanced timer instances RepetitionCounter can be up to 65535.
+1656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
+1657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter.
+1658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_SetRepetitionCounter
+1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param RepetitionCounter between Min_Data=0 and Max_Data=255 or 65535 for advanced timer.
+1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
+1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter);
+1666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the repetition counter value.
+1670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx) can be used to check
+1671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a repetition counter.
+1672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll RCR REP LL_TIM_GetRepetitionCounter
+1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Repetition counter value
+1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetRepetitionCounter(const TIM_TypeDef *TIMx)
+1677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->RCR));
+1679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Force a continuous copy of the update interrupt flag (UIF) into the timer counter regis
+ ARM GAS /tmp/ccnmuCkZ.s page 134
+
+
+1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This allows both the counter value and a potential roll-over condition signalled by the U
+1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in an atomic way.
+1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_EnableUIFRemap
+1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableUIFRemap(TIM_TypeDef *TIMx)
+1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
+1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt flag (UIF) remapping.
+1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap
+1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableUIFRemap(TIM_TypeDef *TIMx)
+1701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR1, TIM_CR1_UIFREMAP);
+1703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) copy is set.
+1707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Counter Counter value
+1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveUIFCPY(const uint32_t Counter)
+1711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (((Counter & TIM_CNT_UIFCPY) == (TIM_CNT_UIFCPY)) ? 1UL : 0UL);
+1713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
+1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
+1724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note CCxE, CCxNE and OCxM bits are preloaded, after having been written,
+1725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * they are updated only when a commutation event (COM) occurs.
+1726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Only on channels that have a complementary output.
+1727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+1728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
+1729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_EnablePreload
+1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnablePreload(TIM_TypeDef *TIMx)
+1734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_CCPC);
+1736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the capture/compare control bits (CCxE, CCxNE and OCxM) preload.
+ ARM GAS /tmp/ccnmuCkZ.s page 135
+
+
+1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
+1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_DisablePreload
+1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisablePreload(TIM_TypeDef *TIMx)
+1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC);
+1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is en
+1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload
+1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledPreload(const TIM_TypeDef *TIMx)
+1758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_CCPC) == (TIM_CR2_CCPC)) ? 1UL : 0UL);
+1760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the updated source of the capture/compare control bits (CCxE, CCxNE and OCxM).
+1764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMMUTATION_EVENT_INSTANCE(TIMx) can be used to check
+1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance is able to generate a commutation event.
+1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCUS LL_TIM_CC_SetUpdate
+1767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CCUpdateSource This parameter can be one of the following values:
+1769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_ONLY
+1770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCUPDATESOURCE_COMG_AND_TRGI
+1771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetUpdate(TIM_TypeDef *TIMx, uint32_t CCUpdateSource)
+1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCUS, CCUpdateSource);
+1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request.
+1780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_SetDMAReqTrigger
+1781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMAReqTrigger This parameter can be one of the following values:
+1783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC
+1784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
+1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetDMAReqTrigger(TIM_TypeDef *TIMx, uint32_t DMAReqTrigger)
+1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_CCDS, DMAReqTrigger);
+1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual trigger of the capture/compare DMA request.
+1794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCDS LL_TIM_CC_GetDMAReqTrigger
+1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+ ARM GAS /tmp/ccnmuCkZ.s page 136
+
+
+1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_CC
+1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CCDMAREQUEST_UPDATE
+1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_GetDMAReqTrigger(const TIM_TypeDef *TIMx)
+1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CR2, TIM_CR2_CCDS));
+1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the
+1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters.
+1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the lock mechanism is supported by a timer instance.
+1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel
+1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values:
+1813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_OFF
+1814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_1
+1815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_2
+1816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_LOCKLEVEL_3
+1817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_SetLockLevel(TIM_TypeDef *TIMx, uint32_t LockLevel)
+1820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_LOCK, LockLevel);
+1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable capture/compare channels.
+1826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_EnableChannel\n
+1827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_EnableChannel\n
+1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_EnableChannel\n
+1829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_EnableChannel\n
+1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_EnableChannel\n
+1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_EnableChannel\n
+1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_EnableChannel\n
+1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_EnableChannel\n
+1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_EnableChannel
+1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
+1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+1843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+1845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_EnableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+1849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CCER, Channels);
+1851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 137
+
+
+1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable capture/compare channels.
+1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_DisableChannel\n
+1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_DisableChannel\n
+1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_DisableChannel\n
+1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_DisableChannel\n
+1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_DisableChannel\n
+1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_DisableChannel\n
+1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_DisableChannel\n
+1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n
+1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel
+1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
+1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+1871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+1872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+1873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+1874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+1875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_CC_DisableChannel(TIM_TypeDef *TIMx, uint32_t Channels)
+1878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CCER, Channels);
+1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether channel(s) is(are) enabled.
+1884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1E LL_TIM_CC_IsEnabledChannel\n
+1885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NE LL_TIM_CC_IsEnabledChannel\n
+1886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2E LL_TIM_CC_IsEnabledChannel\n
+1887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NE LL_TIM_CC_IsEnabledChannel\n
+1888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3E LL_TIM_CC_IsEnabledChannel\n
+1889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NE LL_TIM_CC_IsEnabledChannel\n
+1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel\n
+1891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_IsEnabledChannel\n
+1892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_IsEnabledChannel
+1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
+1895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+1896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+1897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+1898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+1899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+1900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+1902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+1905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_CC_IsEnabledChannel(const TIM_TypeDef *TIMx, uint32_t Channels)
+1907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CCER, Channels) == (Channels)) ? 1UL : 0UL);
+1909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 138
+
+
+1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Output_Channel Output channel configuration
+1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel.
+1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n
+1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n
+1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n
+1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n
+1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n
+1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC6S LL_TIM_OC_ConfigOutput\n
+1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n
+1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_ConfigOutput\n
+1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_ConfigOutput\n
+1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_ConfigOutput\n
+1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_ConfigOutput\n
+1931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_ConfigOutput\n
+1932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS1 LL_TIM_OC_ConfigOutput\n
+1933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_ConfigOutput\n
+1934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_ConfigOutput\n
+1935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_ConfigOutput\n
+1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_ConfigOutput\n
+1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_ConfigOutput
+1938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+1940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+1941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+1942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+1943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+1944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+1945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+1946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values:
+1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
+1948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
+1949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_ConfigOutput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configura
+1952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+1954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+1955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_CC1S << SHIFT_TAB_OCxx[iChannel]));
+1956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]),
+1957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]);
+1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]),
+1959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & TIM_CR2_OIS1) << SHIFT_TAB_OISx[iChannel]);
+1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Define the behavior of the output reference signal OCxREF from which
+1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * OCx and OCxN (when relevant) are derived.
+1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_SetMode\n
+1966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_SetMode\n
+1967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_SetMode\n
+ ARM GAS /tmp/ccnmuCkZ.s page 139
+
+
+1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_SetMode\n
+1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_SetMode\n
+1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_SetMode
+1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Mode This parameter can be one of the following values:
+1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN
+1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE
+1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE
+1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE
+1984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
+1985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
+1986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1
+1987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2
+1988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
+1989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
+1990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
+1991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
+1992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
+1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
+1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+1995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+1996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetMode(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Mode)
+1997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+1998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+1999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel]), Mode << SHIFT
+2001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the output compare mode of an output channel.
+2005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
+2006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n
+2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n
+2008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4M LL_TIM_OC_GetMode\n
+2009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5M LL_TIM_OC_GetMode\n
+2010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6M LL_TIM_OC_GetMode
+2011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN
+2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE
+2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE
+2023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE
+2024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_INACTIVE
+ ARM GAS /tmp/ccnmuCkZ.s page 140
+
+
+2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FORCED_ACTIVE
+2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM1
+2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_PWM2
+2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM1
+2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_RETRIG_OPM2
+2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM1
+2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_COMBINED_PWM2
+2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM1
+2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2
+2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel)
+2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT
+2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of an output channel.
+2044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_SetPolarity\n
+2045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_SetPolarity\n
+2046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_SetPolarity\n
+2047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_SetPolarity\n
+2048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_SetPolarity\n
+2049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_SetPolarity\n
+2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_SetPolarity\n
+2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_SetPolarity\n
+2052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_SetPolarity
+2053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+2057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+2059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
+2065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH
+2066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW
+2067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Polarity)
+2070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel]), Polarity << SHIFT_TAB_CCxP[i
+2073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the polarity of an output channel.
+2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_OC_GetPolarity\n
+2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_OC_GetPolarity\n
+2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_OC_GetPolarity\n
+2080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_OC_GetPolarity\n
+2081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_OC_GetPolarity\n
+ ARM GAS /tmp/ccnmuCkZ.s page 141
+
+
+2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_OC_GetPolarity\n
+2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_OC_GetPolarity\n
+2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5P LL_TIM_OC_GetPolarity\n
+2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6P LL_TIM_OC_GetPolarity
+2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH
+2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_LOW
+2100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
+2102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, (TIM_CCER_CC1P << SHIFT_TAB_CCxP[iChannel])) >> SHIFT_TAB_CCxP[iChan
+2105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the IDLE state of an output channel
+2109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function is significant only for the timer instances
+2110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * supporting the break feature. Macro IS_TIM_BREAK_INSTANCE(TIMx)
+2111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * can be used to check whether or not a timer instance provides
+2112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a break input.
+2113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_SetIdleState\n
+2114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_SetIdleState\n
+2115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_SetIdleState\n
+2116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_SetIdleState\n
+2117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_SetIdleState\n
+2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_SetIdleState\n
+2119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_SetIdleState\n
+2120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_SetIdleState\n
+2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState
+2122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+2126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+2128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+2130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param IdleState This parameter can be one of the following values:
+2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW
+2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH
+2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetIdleState(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t IdleState
+ ARM GAS /tmp/ccnmuCkZ.s page 142
+
+
+2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel]), IdleState << SHIFT_TAB_OISx[iC
+2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the IDLE state of an output channel
+2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 OIS1 LL_TIM_OC_GetIdleState\n
+2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
+2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n
+2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n
+2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n
+2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n
+2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState\n
+2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_GetIdleState\n
+2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState
+2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N
+2159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N
+2161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N
+2163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW
+2168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_HIGH
+2169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetIdleState(const TIM_TypeDef *TIMx, uint32_t Channel)
+2171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CR2, (TIM_CR2_OIS1 << SHIFT_TAB_OISx[iChannel])) >> SHIFT_TAB_OISx[iChanne
+2174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable fast mode for the output channel.
+2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
+2179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_EnableFast\n
+2180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_EnableFast\n
+2181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_EnableFast\n
+2182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_EnableFast\n
+2183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_EnableFast\n
+2184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_EnableFast
+2185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableFast(TIM_TypeDef *TIMx, uint32_t Channel)
+ ARM GAS /tmp/ccnmuCkZ.s page 143
+
+
+2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
+2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel.
+2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n
+2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n
+2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n
+2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast\n
+2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_DisableFast\n
+2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_DisableFast
+2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableFast(TIM_TypeDef *TIMx, uint32_t Channel)
+2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel]));
+2226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether fast mode is enabled for the output channel.
+2231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_IsEnabledFast\n
+2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
+2233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
+2234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
+2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
+2236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_IsEnabledFast
+2237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledFast(const TIM_TypeDef *TIMx, uint32_t Channel)
+2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1FE << SHIFT_TAB_OCxx[iChannel];
+2252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+ ARM GAS /tmp/ccnmuCkZ.s page 144
+
+
+2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable compare register (TIMx_CCRx) preload for the output channel.
+2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_EnablePreload\n
+2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_EnablePreload\n
+2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_EnablePreload\n
+2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_EnablePreload\n
+2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n
+2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload
+2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
+2274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
+2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable compare register (TIMx_CCRx) preload for the output channel.
+2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_DisablePreload\n
+2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_DisablePreload\n
+2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_DisablePreload\n
+2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_DisablePreload\n
+2286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_DisablePreload\n
+2287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_DisablePreload
+2288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisablePreload(TIM_TypeDef *TIMx, uint32_t Channel)
+2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel]));
+2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether compare register (TIMx_CCRx) preload is enabled for the output channe
+2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1PE LL_TIM_OC_IsEnabledPreload\n
+2308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2PE LL_TIM_OC_IsEnabledPreload\n
+2309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3PE LL_TIM_OC_IsEnabledPreload\n
+ ARM GAS /tmp/ccnmuCkZ.s page 145
+
+
+2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4PE LL_TIM_OC_IsEnabledPreload\n
+2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_IsEnabledPreload\n
+2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_IsEnabledPreload
+2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel)
+2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1PE << SHIFT_TAB_OCxx[iChannel];
+2328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+2329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable clearing the output channel on an external event.
+2333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force
+2334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
+2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_EnableClear\n
+2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_EnableClear\n
+2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_EnableClear\n
+2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_EnableClear\n
+2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_EnableClear\n
+2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_EnableClear
+2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_EnableClear(TIM_TypeDef *TIMx, uint32_t Channel)
+2353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
+2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable clearing the output channel on an external event.
+2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
+2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_DisableClear\n
+2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_DisableClear\n
+2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_DisableClear\n
+2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_DisableClear\n
+ ARM GAS /tmp/ccnmuCkZ.s page 146
+
+
+2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_DisableClear\n
+2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_DisableClear
+2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel)
+2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, (TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel]));
+2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates clearing the output channel on an external event is enabled for the output ch
+2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function enables clearing the output channel on an external event.
+2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note This function can only be used in Output compare and PWM modes. It does not work in Force
+2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_OCXREF_CLEAR_INSTANCE(TIMx) can be used to check whether
+2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance can clear the OCxREF signal on an external event.
+2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1CE LL_TIM_OC_IsEnabledClear\n
+2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2CE LL_TIM_OC_IsEnabledClear\n
+2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3CE LL_TIM_OC_IsEnabledClear\n
+2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4CE LL_TIM_OC_IsEnabledClear\n
+2396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5CE LL_TIM_OC_IsEnabledClear\n
+2397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6CE LL_TIM_OC_IsEnabledClear
+2398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
+2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
+2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+2407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledClear(const TIM_TypeDef *TIMx, uint32_t Channel)
+2409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t bitfield = TIM_CCMR1_OC1CE << SHIFT_TAB_OCxx[iChannel];
+2413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, bitfield) == bitfield) ? 1UL : 0UL);
+2414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the dead-time delay (delay inserted between the rising edge of the OCxREF signal an
+2418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the Ocx and OCxN signals).
+2419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+2420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * dead-time insertion feature is supported by a timer instance.
+2421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Helper macro @ref __LL_TIM_CALC_DEADTIME can be used to calculate the DeadTime parameter
+2422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR DTG LL_TIM_OC_SetDeadTime
+2423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+ ARM GAS /tmp/ccnmuCkZ.s page 147
+
+
+2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DeadTime between Min_Data=0 and Max_Data=255
+2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetDeadTime(TIM_TypeDef *TIMx, uint32_t DeadTime)
+2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_DTG, DeadTime);
+2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1).
+2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
+2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance.
+2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1
+2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH1(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR1, CompareValue);
+2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 2 (TIMx_CCR2).
+2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
+2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+2455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance.
+2456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_SetCompareCH2
+2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH2(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR2, CompareValue);
+2464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 3 (TIMx_CCR3).
+2468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
+2469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+2472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel is supported by a timer instance.
+2473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_SetCompareCH3
+2474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH3(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR3, CompareValue);
+ ARM GAS /tmp/ccnmuCkZ.s page 148
+
+
+2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 4 (TIMx_CCR4).
+2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF.
+2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
+2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
+2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR4, CompareValue);
+2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 5 (TIMx_CCR5).
+2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
+2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 5 is supported by a timer instance.
+2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 CCR5 LL_TIM_OC_SetCompareCH5
+2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH5(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, TIM_CCR5_CCR5, CompareValue);
+2512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 6 (TIMx_CCR6).
+2516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
+2517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance.
+2518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_SetCompareCH6
+2519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
+2521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH6(TIM_TypeDef *TIMx, uint32_t CompareValue)
+2524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->CCR6, CompareValue);
+2526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR1) set for output channel 1.
+2530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
+2531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+2534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance.
+2535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_GetCompareCH1
+2536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+ ARM GAS /tmp/ccnmuCkZ.s page 149
+
+
+2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH1(const TIM_TypeDef *TIMx)
+2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1));
+2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR2) set for output channel 2.
+2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
+2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance.
+2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2
+2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
+2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2));
+2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR3) set for output channel 3.
+2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
+2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 3 is supported by a timer instance.
+2567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_OC_GetCompareCH3
+2568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+2570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH3(const TIM_TypeDef *TIMx)
+2572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3));
+2574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR4) set for output channel 4.
+2578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF
+2579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+2582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
+2583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_GetCompareCH4
+2584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+2586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH4(const TIM_TypeDef *TIMx)
+2588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4));
+2590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR5) set for output channel 5.
+2594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC5_INSTANCE(TIMx) can be used to check whether or not
+ ARM GAS /tmp/ccnmuCkZ.s page 150
+
+
+2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 5 is supported by a timer instance.
+2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 CCR5 LL_TIM_OC_GetCompareCH5
+2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH5(const TIM_TypeDef *TIMx)
+2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_BIT(TIMx->CCR5, TIM_CCR5_CCR5));
+2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR6) set for output channel 6.
+2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not
+2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance.
+2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6
+2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
+2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
+2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR6));
+2616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select on which reference signal the OC5REF is combined to.
+2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COMBINED3PHASEPWM_INSTANCE(TIMx) can be used to check
+2621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports the combined 3-phase PWM mode.
+2622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR5 GC5C3 LL_TIM_SetCH5CombinedChannels\n
+2623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCR5 GC5C2 LL_TIM_SetCH5CombinedChannels\n
+2624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCR5 GC5C1 LL_TIM_SetCH5CombinedChannels
+2625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param GroupCH5 This parameter can be a combination of the following values:
+2627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_NONE
+2628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC1REFC
+2629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC2REFC
+2630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_GROUPCH5_OC3REFC
+2631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetCH5CombinedChannels(TIM_TypeDef *TIMx, uint32_t GroupCH5)
+2634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCR5, (TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1), GroupCH5);
+2636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+2640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Input_Channel Input channel configuration
+2643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+2644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure input channel.
+2647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_Config\n
+2648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1PSC LL_TIM_IC_Config\n
+2649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC1F LL_TIM_IC_Config\n
+2650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_Config\n
+2651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_Config\n
+ ARM GAS /tmp/ccnmuCkZ.s page 151
+
+
+2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_Config\n
+2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_Config\n
+2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_Config\n
+2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_Config\n
+2656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_Config\n
+2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_Config\n
+2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_Config\n
+2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_IC_Config\n
+2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n
+2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n
+2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n
+2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n
+2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n
+2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n
+2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_Config
+2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Configuration This parameter must be a combination of all the following values:
+2674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI or @ref LL_TIM_ACTIVEINPUT_INDIRECTTI or @ref LL_
+2675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 or ... or @ref LL_TIM_ICPSC_DIV8
+2676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1 or ... or @ref LL_TIM_IC_FILTER_FDIV32_N8
+2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING or @ref LL_TIM_IC_POLARITY_FALLING or @ref LL_TIM_I
+2678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_Config(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t Configuration)
+2681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChanne
+2685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((Configuration >> 16U) & (TIM_CCMR1_IC1F | TIM_CCMR1_IC1PSC | TIM_CCMR1_CC1S))
+2686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** << SHIFT_TAB_ICxx[iChannel]);
+2687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
+2688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (Configuration & (TIM_CCER_CC1NP | TIM_CCER_CC1P)) << SHIFT_TAB_CCxP[iChannel]);
+2689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the active input.
+2693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_SetActiveInput\n
+2694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_SetActiveInput\n
+2695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_SetActiveInput\n
+2696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_SetActiveInput
+2697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICActiveInput This parameter can be one of the following values:
+2704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
+2705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
+2706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC
+2707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 152
+
+
+2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetActiveInput(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICActiv
+2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel]), (ICActiveInput >> 16U) << SHIFT
+2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input.
+2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n
+2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n
+2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n
+2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput
+2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_DIRECTTI
+2730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_INDIRECTTI
+2731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ACTIVEINPUT_TRC
+2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetActiveInput(const TIM_TypeDef *TIMx, uint32_t Channel)
+2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_CC1S) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann
+2738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the prescaler of input channel.
+2742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_SetPrescaler\n
+2743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_SetPrescaler\n
+2744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_SetPrescaler\n
+2745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_SetPrescaler
+2746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPrescaler This parameter can be one of the following values:
+2753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
+2754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
+2755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
+2756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
+2757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPrescal
+2760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel]), (ICPrescaler >> 16U) << SHIFT
+2764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 153
+
+
+2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current prescaler value acting on an input channel.
+2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1PSC LL_TIM_IC_GetPrescaler\n
+2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2PSC LL_TIM_IC_GetPrescaler\n
+2770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3PSC LL_TIM_IC_GetPrescaler\n
+2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4PSC LL_TIM_IC_GetPrescaler
+2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1
+2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2
+2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4
+2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
+2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
+2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1PSC) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iCha
+2789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input filter duration.
+2793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_SetFilter\n
+2794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_SetFilter\n
+2795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_SetFilter\n
+2796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_SetFilter
+2797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICFilter This parameter can be one of the following values:
+2804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1
+2805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
+2806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
+2807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
+2808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
+2809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
+2810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
+2811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
+2812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
+2813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
+2814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
+2815:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
+2816:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
+2817:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
+2818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
+2819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
+2820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetFilter(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICFilter)
+ ARM GAS /tmp/ccnmuCkZ.s page 154
+
+
+2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC
+2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel]), (ICFilter >> 16U) << SHIFT_TAB_
+2827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the input filter duration.
+2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n
+2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n
+2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n
+2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter
+2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1
+2843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N2
+2844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N4
+2845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1_N8
+2846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N6
+2847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV2_N8
+2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N6
+2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV4_N8
+2850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N6
+2851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV8_N8
+2852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N5
+2853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N6
+2854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV16_N8
+2855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N5
+2856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N6
+2857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV32_N8
+2858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetFilter(const TIM_TypeDef *TIMx, uint32_t Channel)
+2860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC
+2863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(*pReg, ((TIM_CCMR1_IC1F) << SHIFT_TAB_ICxx[iChannel])) >> SHIFT_TAB_ICxx[iChann
+2864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the input channel polarity.
+2868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_SetPolarity\n
+2869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_SetPolarity\n
+2870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_SetPolarity\n
+2871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_SetPolarity\n
+2872:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_SetPolarity\n
+2873:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_SetPolarity\n
+2874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_SetPolarity\n
+2875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_SetPolarity
+2876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+ ARM GAS /tmp/ccnmuCkZ.s page 155
+
+
+2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ICPolarity This parameter can be one of the following values:
+2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING
+2884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING
+2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
+2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity
+2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]),
+2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]);
+2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity.
+2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
+2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n
+2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n
+2900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_GetPolarity\n
+2901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_GetPolarity\n
+2902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_GetPolarity\n
+2903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_GetPolarity\n
+2904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_GetPolarity
+2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
+2907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
+2908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
+2909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
+2910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
+2911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
+2912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_RISING
+2913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_FALLING
+2914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_POLARITY_BOTHEDGE
+2915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPolarity(const TIM_TypeDef *TIMx, uint32_t Channel)
+2917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel);
+2919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel])) >>
+2920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SHIFT_TAB_CCxP[iChannel]);
+2921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Connect the TIMx_CH1, CH2 and CH3 pins to the TI1 input (XOR combination).
+2925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+2926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
+2927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_EnableXORCombination
+2928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2931:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_EnableXORCombination(TIM_TypeDef *TIMx)
+2932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR2, TIM_CR2_TI1S);
+2934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 156
+
+
+2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disconnect the TIMx_CH1, CH2 and CH3 pins from the TI1 input.
+2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
+2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_DisableXORCombination
+2941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_DisableXORCombination(TIM_TypeDef *TIMx)
+2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S);
+2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input.
+2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not
+2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input.
+2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
+2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_IsEnabledXORCombination(const TIM_TypeDef *TIMx)
+2958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR2, TIM_CR2_TI1S) == (TIM_CR2_TI1S)) ? 1UL : 0UL);
+2960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 1.
+2964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
+2965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not
+2968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 1 is supported by a timer instance.
+2969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_IC_GetCaptureCH1
+2970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+2972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH1(const TIM_TypeDef *TIMx)
+2974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR1));
+2976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+2978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 2.
+2980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
+2981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not
+2984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 2 is supported by a timer instance.
+2985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_IC_GetCaptureCH2
+2986:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+2987:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+2988:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+2989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH2(const TIM_TypeDef *TIMx)
+2990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+2991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2));
+2992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+2993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 157
+
+
+2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 3.
+2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
+2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+2998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC3_INSTANCE(TIMx) can be used to check whether or not
+3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 3 is supported by a timer instance.
+3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR3 CCR3 LL_TIM_IC_GetCaptureCH3
+3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx)
+3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3));
+3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4.
+3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
+3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
+3014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter.
+3015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC4_INSTANCE(TIMx) can be used to check whether or not
+3016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * input channel 4 is supported by a timer instance.
+3017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_IC_GetCaptureCH4
+3018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535)
+3020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH4(const TIM_TypeDef *TIMx)
+3022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR4));
+3024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Clock_Selection Counter clock selection
+3031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable external clock mode 2.
+3035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note When external clock mode 2 is enabled the counter is clocked by any active edge on the ET
+3036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+3037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
+3038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_EnableExternalClock
+3039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableExternalClock(TIM_TypeDef *TIMx)
+3043:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3044:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_ECE);
+3045:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable external clock mode 2.
+3049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+3050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
+ ARM GAS /tmp/ccnmuCkZ.s page 158
+
+
+3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_DisableExternalClock
+3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableExternalClock(TIM_TypeDef *TIMx)
+3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_ECE);
+3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled.
+3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
+3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock
+3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
+3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
+3071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the clock source of the counter clock.
+3075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note when selected clock source is external clock mode 1, the timer input
+3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the external clock is applied is selected by calling the @ref LL_TIM_SetTriggerInput()
+3077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * function. This timer input must be configured by calling
+3078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the @ref LL_TIM_IC_Config() function.
+3079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(TIMx) can be used to check
+3080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode1.
+3081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check
+3082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2.
+3083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetClockSource\n
+3084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ECE LL_TIM_SetClockSource
+3085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ClockSource This parameter can be one of the following values:
+3087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_INTERNAL
+3088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE1
+3089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKSOURCE_EXT_MODE2
+3090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetClockSource(TIM_TypeDef *TIMx, uint32_t ClockSource)
+3093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS | TIM_SMCR_ECE, ClockSource);
+3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the encoder interface mode.
+3099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ENCODER_INTERFACE_INSTANCE(TIMx) can be used to check
+3100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports the encoder mode.
+3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode
+3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values:
+3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1
+3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2
+3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12
+3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+ ARM GAS /tmp/ccnmuCkZ.s page 159
+
+
+3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetEncoderMode(TIM_TypeDef *TIMx, uint32_t EncoderMode)
+3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, EncoderMode);
+3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Synchronization Timer synchronisation configuration
+3119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output (TRGO) used for timer synchronization .
+3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_MASTER_INSTANCE(TIMx) can be used to check
+3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer.
+3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
+3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values:
+3128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_RESET
+3129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_ENABLE
+3130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_UPDATE
+3131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_CC1IF
+3132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC1REF
+3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC2REF
+3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC3REF
+3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO_OC4REF
+3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput(TIM_TypeDef *TIMx, uint32_t TimerSynchronization)
+3139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS, TimerSynchronization);
+3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization .
+3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check
+3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization.
+3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2
+3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer Instance
+3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ADCSynchronization This parameter can be one of the following values:
+3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_RESET
+3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE
+3152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_UPDATE
+3153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_CC1F
+3154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC1
+3155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC2
+3156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC3
+3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4
+3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5
+3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC6
+3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISINGFALLING
+3161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC6_RISINGFALLING
+3162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_RISING
+3163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC4_RISING_OC6_FALLING
+3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_RISING
+ ARM GAS /tmp/ccnmuCkZ.s page 160
+
+
+3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_OC5_RISING_OC6_FALLING
+3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerOutput2(TIM_TypeDef *TIMx, uint32_t ADCSynchronization)
+3169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CR2, TIM_CR2_MMS2, ADCSynchronization);
+3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the synchronization mode of a slave timer.
+3175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+3176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
+3177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetSlaveMode
+3178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param SlaveMode This parameter can be one of the following values:
+3180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_DISABLED
+3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET
+3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED
+3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER
+3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
+3185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetSlaveMode(TIM_TypeDef *TIMx, uint32_t SlaveMode)
+3188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_SMS, SlaveMode);
+3190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the selects the trigger input to be used to synchronize the counter.
+3194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+3195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
+3196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR TS LL_TIM_SetTriggerInput
+3197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TriggerInput This parameter can be one of the following values:
+3199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR0
+3200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR1
+3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2
+3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3
+3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED
+3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1
+3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2
+3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF
+3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetTriggerInput(TIM_TypeDef *TIMx, uint32_t TriggerInput)
+3210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_TS, TriggerInput);
+3212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the Master/Slave mode.
+3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
+3218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_EnableMasterSlaveMode
+3219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 161
+
+
+3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableMasterSlaveMode(TIM_TypeDef *TIMx)
+3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->SMCR, TIM_SMCR_MSM);
+3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the Master/Slave mode.
+3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+3230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
+3231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_DisableMasterSlaveMode
+3232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableMasterSlaveMode(TIM_TypeDef *TIMx)
+3236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->SMCR, TIM_SMCR_MSM);
+3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled.
+3242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_SLAVE_INSTANCE(TIMx) can be used to check whether or not
+3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance can operate as a slave timer.
+3244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR MSM LL_TIM_IsEnabledMasterSlaveMode
+3245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+3247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledMasterSlaveMode(const TIM_TypeDef *TIMx)
+3249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_MSM) == (TIM_SMCR_MSM)) ? 1UL : 0UL);
+3251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the external trigger (ETR) input.
+3255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_ETR_INSTANCE(TIMx) can be used to check whether or not
+3256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an external trigger input.
+3257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ETP LL_TIM_ConfigETR\n
+3258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETPS LL_TIM_ConfigETR\n
+3259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * SMCR ETF LL_TIM_ConfigETR
+3260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPolarity This parameter can be one of the following values:
+3262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_NONINVERTED
+3263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_POLARITY_INVERTED
+3264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRPrescaler This parameter can be one of the following values:
+3265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV1
+3266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV2
+3267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV4
+3268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_PRESCALER_DIV8
+3269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ETRFilter This parameter can be one of the following values:
+3270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1
+3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N2
+3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N4
+3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV1_N8
+3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N6
+3275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV2_N8
+3276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N6
+3277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV4_N8
+3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N6
+ ARM GAS /tmp/ccnmuCkZ.s page 162
+
+
+3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV8_N8
+3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N5
+3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N6
+3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV16_N8
+3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N5
+3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N6
+3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ETR_FILTER_FDIV32_N8
+3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigETR(TIM_TypeDef *TIMx, uint32_t ETRPolarity, uint32_t ETRPrescale
+3289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ETRFilter)
+3290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler |
+3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration
+3299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break function.
+3303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_EnableBRK
+3306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK(TIM_TypeDef *TIMx)
+3310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BKE);
+3312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break function.
+3316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKE LL_TIM_DisableBRK
+3317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK(TIM_TypeDef *TIMx)
+3323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BKE);
+3325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break input.
+3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BKP LL_TIM_ConfigBRK\n
+3332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BKF LL_TIM_ConfigBRK
+3333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakPolarity This parameter can be one of the following values:
+3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_LOW
+ ARM GAS /tmp/ccnmuCkZ.s page 163
+
+
+3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_POLARITY_HIGH
+3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakFilter This parameter can be one of the following values:
+3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1
+3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N2
+3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N4
+3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV1_N8
+3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N6
+3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV2_N8
+3344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N6
+3345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV4_N8
+3346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N6
+3347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV8_N8
+3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5
+3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6
+3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8
+3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5
+3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
+3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
+3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK(TIM_TypeDef *TIMx, uint32_t BreakPolarity,
+3357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t BreakFilter)
+3358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BKP | TIM_BDTR_BKF, BreakPolarity | BreakFilter);
+3360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the break 2 function.
+3364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
+3365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
+3366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_EnableBRK2
+3367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBRK2(TIM_TypeDef *TIMx)
+3371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
+3373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the break 2 function.
+3377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
+3378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
+3379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2E LL_TIM_DisableBRK2
+3380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBRK2(TIM_TypeDef *TIMx)
+3384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_BK2E);
+3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure the break 2 input.
+3390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BKIN2_INSTANCE(TIMx) can be used to check whether or not
+3391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a second break input.
+3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR BK2P LL_TIM_ConfigBRK2\n
+ ARM GAS /tmp/ccnmuCkZ.s page 164
+
+
+3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR BK2F LL_TIM_ConfigBRK2
+3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Polarity This parameter can be one of the following values:
+3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_LOW
+3397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_POLARITY_HIGH
+3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Break2Filter This parameter can be one of the following values:
+3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1
+3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N2
+3401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N4
+3402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV1_N8
+3403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N6
+3404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV2_N8
+3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6
+3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8
+3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6
+3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8
+3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
+3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
+3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
+3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
+3413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N6
+3414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N8
+3415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3416:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3417:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigBRK2(TIM_TypeDef *TIMx, uint32_t Break2Polarity, uint32_t Break2F
+3418:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_BK2P | TIM_BDTR_BK2F, Break2Polarity | Break2Filter);
+3420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Select the outputs off state (enabled v.s. disabled) in Idle and Run modes.
+3424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR OSSI LL_TIM_SetOffStates\n
+3427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * BDTR OSSR LL_TIM_SetOffStates
+3428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateIdle This parameter can be one of the following values:
+3430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_DISABLE
+3431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSI_ENABLE
+3432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param OffStateRun This parameter can be one of the following values:
+3433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_DISABLE
+3434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OSSR_ENABLE
+3435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetOffStates(TIM_TypeDef *TIMx, uint32_t OffStateIdle, uint32_t OffStat
+3438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->BDTR, TIM_BDTR_OSSI | TIM_BDTR_OSSR, OffStateIdle | OffStateRun);
+3440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable automatic output (MOE can be set by software or automatically when a break input
+3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_EnableAutomaticOutput
+3447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 165
+
+
+3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAutomaticOutput(TIM_TypeDef *TIMx)
+3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_AOE);
+3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable automatic output (MOE can be set only by software).
+3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_DisableAutomaticOutput
+3460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx)
+3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE);
+3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled.
+3470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR AOE LL_TIM_IsEnabledAutomaticOutput
+3473:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3474:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+3475:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAutomaticOutput(const TIM_TypeDef *TIMx)
+3477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_AOE) == (TIM_BDTR_AOE)) ? 1UL : 0UL);
+3479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the outputs (set the MOE bit in TIMx_BDTR register).
+3483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
+3484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event
+3485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_EnableAllOutputs
+3488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableAllOutputs(TIM_TypeDef *TIMx)
+3492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->BDTR, TIM_BDTR_MOE);
+3494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the outputs (reset the MOE bit in TIMx_BDTR register).
+3498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note The MOE bit in TIMx_BDTR register allows to enable /disable the outputs by
+3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * software and is reset in case of break or break2 event.
+3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_DisableAllOutputs
+3503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAllOutputs(TIM_TypeDef *TIMx)
+ ARM GAS /tmp/ccnmuCkZ.s page 166
+
+
+3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_MOE);
+3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether outputs are enabled.
+3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not
+3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides a break input.
+3515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR MOE LL_TIM_IsEnabledAllOutputs
+3516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+3518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx)
+3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL);
+3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
+3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input.
+3527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
+3528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
+3529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_EnableBreakInputSource\n
+3530:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_EnableBreakInputSource\n
+3531:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_EnableBreakInputSource\n
+3532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_EnableBreakInputSource
+3533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
+3535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
+3536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
+3537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
+3538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
+3539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
+3540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_t
+3543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
+3545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(*pReg, Source);
+3546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable the signals connected to the designated timer break input.
+3550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
+3551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
+3552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINE LL_TIM_DisableBreakInputSource\n
+3553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKE LL_TIM_DisableBreakInputSource\n
+3554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INE LL_TIM_DisableBreakInputSource\n
+3555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKE LL_TIM_DisableBreakInputSource
+3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
+3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
+3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
+3560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
+3561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
+3562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
+3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+ ARM GAS /tmp/ccnmuCkZ.s page 167
+
+
+3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableBreakInputSource(TIM_TypeDef *TIMx, uint32_t BreakInput, uint32_
+3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
+3568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(*pReg, Source);
+3569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the polarity of the break signal for the timer break input.
+3573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAKSOURCE_INSTANCE(TIMx) can be used to check whether
+3574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * or not a timer instance allows for break input selection.
+3575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll AF1 BKINP LL_TIM_SetBreakInputSourcePolarity\n
+3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n
+3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n
+3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity
+3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
+3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
+3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
+3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
+3584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_BKIN
+3585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_SOURCE_DF1BK
+3586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
+3587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_LOW
+3588:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BKIN_POLARITY_HIGH
+3589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetBreakInputSourcePolarity(TIM_TypeDef *TIMx, uint32_t BreakInput, uin
+3592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Polarity)
+3593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->AF1) + BreakInput));
+3595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(*pReg, (TIMx_AF1_BKINP << TIM_POSITION_BRK_SOURCE), (Polarity << TIM_POSITION_BRK_SOUR
+3596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
+3598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_DMA_Burst_Mode DMA burst mode configuration
+3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configures the timer DMA burst feature.
+3607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_DMABURST_INSTANCE(TIMx) can be used to check whether or
+3608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * not a timer instance supports the DMA burst mode.
+3609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DCR DBL LL_TIM_ConfigDMABurst\n
+3610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * DCR DBA LL_TIM_ConfigDMABurst
+3611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstBaseAddress This parameter can be one of the following values:
+3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR1
+3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CR2
+3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SMCR
+3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_DIER
+3617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_SR
+3618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_EGR
+3619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR1
+3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR2
+ ARM GAS /tmp/ccnmuCkZ.s page 168
+
+
+3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCER
+3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CNT
+3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_PSC
+3624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_ARR
+3625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_RCR
+3626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR1
+3627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR2
+3628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR3
+3629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR4
+3630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_BDTR
+3631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_OR
+3632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCMR3
+3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5
+3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6
+3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*)
+3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF2 (*)
+3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices
+3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values:
+3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
+3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
+3641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_3TRANSFERS
+3642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_4TRANSFERS
+3643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_5TRANSFERS
+3644:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_6TRANSFERS
+3645:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_7TRANSFERS
+3646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_8TRANSFERS
+3647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_9TRANSFERS
+3648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_10TRANSFERS
+3649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_11TRANSFERS
+3650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_12TRANSFERS
+3651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_13TRANSFERS
+3652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_14TRANSFERS
+3653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_15TRANSFERS
+3654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_16TRANSFERS
+3655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_17TRANSFERS
+3656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_18TRANSFERS
+3657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ConfigDMABurst(TIM_TypeDef *TIMx, uint32_t DMABurstBaseAddress, uint32_
+3660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->DCR, (TIM_DCR_DBL | TIM_DCR_DBA), (DMABurstBaseAddress | DMABurstLength));
+3662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Timer_Inputs_Remapping Timer input remapping
+3669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Remap TIM inputs (input channel, internal/external triggers).
+3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_REMAP_INSTANCE(TIMx) can be used to check whether or not
+3674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a some timer inputs can be remapped.
+3675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll TIM2_OR ITR1_RMP LL_TIM_SetRemap\n
+3676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5_OR TI4_RMP LL_TIM_SetRemap\n
+3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11_OR TI1_RMP LL_TIM_SetRemap
+ ARM GAS /tmp/ccnmuCkZ.s page 169
+
+
+3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Remap Remap param depends on the TIMx. Description available only
+3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * in CHM version of the User Manual (not in .pdf).
+3681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Otherwise see Reference Manual description of OR registers.
+3682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Below description summarizes "Timer Instance" and "Remap" param combinations:
+3684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM2: one of the following values
+3686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * ITR1_RMP can be one of the following values
+3688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_TIM8_TRGO
+3689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_ETH_PTP
+3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF
+3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF
+3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5: one of the following values
+3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO
+3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI
+3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE
+3698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_RTC
+3699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM11: one of the following values
+3701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_GPIO
+3703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_SPDIFRX
+3704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_HSE
+3705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM11_TI1_RMP_MCO1
+3706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
+3707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRemap(TIM_TypeDef *TIMx, uint32_t Remap)
+3710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->OR, (Remap >> TIMx_OR_RMP_SHIFT), (Remap & TIMx_OR_RMP_MASK));
+3712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
+3716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_FLAG_Management FLAG-Management
+3719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
+3720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the update interrupt flag (UIF).
+3723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_ClearFlag_UPDATE
+3724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
+3726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_UPDATE(TIM_TypeDef *TIMx)
+3728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_UIF));
+3730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+3731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
+3732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
+3733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether update interrupt flag (UIF) is set (update interrupt is pending).
+3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR UIF LL_TIM_IsActiveFlag_UPDATE
+ ARM GAS /tmp/ccnmuCkZ.s page 170
+
+
+3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
+3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
+3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
+3738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_UPDATE(const TIM_TypeDef *TIMx)
+ 739 .loc 4 3738 26 view .LVU168
+ 740 .LBB101:
+3739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+3740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_UIF) == (TIM_SR_UIF)) ? 1UL : 0UL);
+ 741 .loc 4 3740 3 view .LVU169
+ 742 .loc 4 3740 12 is_stmt 0 view .LVU170
+ 743 0002 064B ldr r3, .L44
+ 744 0004 1B69 ldr r3, [r3, #16]
+ 745 .loc 4 3740 66 view .LVU171
+ 746 0006 13F0010F tst r3, #1
+ 747 000a 05D0 beq .L41
+ 748 .LVL36:
+ 749 .loc 4 3740 66 view .LVU172
+ 750 .LBE101:
+ 751 .LBE100:
+ 343:Src/stm32f7xx_it.c **** {
+ 344:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM6);
+ 752 .loc 1 344 5 is_stmt 1 view .LVU173
+ 753 .LBB102:
+ 754 .LBI102:
+3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 755 .loc 4 3727 22 view .LVU174
+ 756 .LBB103:
+3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 757 .loc 4 3729 3 view .LVU175
+ 758 000c 034B ldr r3, .L44
+ 759 000e 6FF00102 mvn r2, #1
+ 760 0012 1A61 str r2, [r3, #16]
+ 761 .LVL37:
+3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 762 .loc 4 3729 3 is_stmt 0 view .LVU176
+ 763 .LBE103:
+ 764 .LBE102:
+ 345:Src/stm32f7xx_it.c **** app_on_tim6_tick();
+ 765 .loc 1 345 5 is_stmt 1 view .LVU177
+ 766 0014 FFF7FEFF bl app_on_tim6_tick
+ 767 .LVL38:
+ 768 .L41:
+ 346:Src/stm32f7xx_it.c **** }
+ 347:Src/stm32f7xx_it.c **** /* USER CODE END TIM6_DAC_IRQn 1 */
+ 348:Src/stm32f7xx_it.c **** }
+ 769 .loc 1 348 1 is_stmt 0 view .LVU178
+ 770 0018 08BD pop {r3, pc}
+ 771 .L45:
+ 772 001a 00BF .align 2
+ 773 .L44:
+ 774 001c 00100040 .word 1073745920
+ 775 .cfi_endproc
+ 776 .LFE1199:
+ 778 .section .text.TIM7_IRQHandler,"ax",%progbits
+ 779 .align 1
+ 780 .global TIM7_IRQHandler
+ 781 .syntax unified
+ ARM GAS /tmp/ccnmuCkZ.s page 171
+
+
+ 782 .thumb
+ 783 .thumb_func
+ 785 TIM7_IRQHandler:
+ 786 .LFB1200:
+ 349:Src/stm32f7xx_it.c ****
+ 350:Src/stm32f7xx_it.c **** /**
+ 351:Src/stm32f7xx_it.c **** * @brief This function handles TIM7 global interrupt.
+ 352:Src/stm32f7xx_it.c **** */
+ 353:Src/stm32f7xx_it.c **** void TIM7_IRQHandler(void)
+ 354:Src/stm32f7xx_it.c **** {
+ 787 .loc 1 354 1 is_stmt 1 view -0
+ 788 .cfi_startproc
+ 789 @ args = 0, pretend = 0, frame = 0
+ 790 @ frame_needed = 0, uses_anonymous_args = 0
+ 791 0000 08B5 push {r3, lr}
+ 792 .LCFI4:
+ 793 .cfi_def_cfa_offset 8
+ 794 .cfi_offset 3, -8
+ 795 .cfi_offset 14, -4
+ 355:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM7_IRQn 0 */
+ 356:Src/stm32f7xx_it.c ****
+ 357:Src/stm32f7xx_it.c **** /* USER CODE END TIM7_IRQn 0 */
+ 358:Src/stm32f7xx_it.c **** /* USER CODE BEGIN TIM7_IRQn 1 */
+ 359:Src/stm32f7xx_it.c **** if(LL_TIM_IsActiveFlag_UPDATE(TIM7))
+ 796 .loc 1 359 3 view .LVU180
+ 797 .LVL39:
+ 798 .LBB104:
+ 799 .LBI104:
+3738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 800 .loc 4 3738 26 view .LVU181
+ 801 .LBB105:
+ 802 .loc 4 3740 3 view .LVU182
+ 803 .loc 4 3740 12 is_stmt 0 view .LVU183
+ 804 0002 064B ldr r3, .L49
+ 805 0004 1B69 ldr r3, [r3, #16]
+ 806 .loc 4 3740 66 view .LVU184
+ 807 0006 13F0010F tst r3, #1
+ 808 000a 05D0 beq .L46
+ 809 .LVL40:
+ 810 .loc 4 3740 66 view .LVU185
+ 811 .LBE105:
+ 812 .LBE104:
+ 360:Src/stm32f7xx_it.c **** {
+ 361:Src/stm32f7xx_it.c **** LL_TIM_ClearFlag_UPDATE(TIM7);
+ 813 .loc 1 361 5 is_stmt 1 view .LVU186
+ 814 .LBB106:
+ 815 .LBI106:
+3727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
+ 816 .loc 4 3727 22 view .LVU187
+ 817 .LBB107:
+3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ 818 .loc 4 3729 3 view .LVU188
+ 819 000c 034B ldr r3, .L49
+ 820 000e 6FF00102 mvn r2, #1
+ 821 0012 1A61 str r2, [r3, #16]
+ 822 .LVL41:
+3729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 172
+
+
+ 823 .loc 4 3729 3 is_stmt 0 view .LVU189
+ 824 .LBE107:
+ 825 .LBE106:
+ 362:Src/stm32f7xx_it.c **** app_on_tim7_tick();
+ 826 .loc 1 362 5 is_stmt 1 view .LVU190
+ 827 0014 FFF7FEFF bl app_on_tim7_tick
+ 828 .LVL42:
+ 829 .L46:
+ 363:Src/stm32f7xx_it.c **** }
+ 364:Src/stm32f7xx_it.c **** /* USER CODE END TIM7_IRQn 1 */
+ 365:Src/stm32f7xx_it.c **** }
+ 830 .loc 1 365 1 is_stmt 0 view .LVU191
+ 831 0018 08BD pop {r3, pc}
+ 832 .L50:
+ 833 001a 00BF .align 2
+ 834 .L49:
+ 835 001c 00140040 .word 1073746944
+ 836 .cfi_endproc
+ 837 .LFE1200:
+ 839 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits
+ 840 .align 1
+ 841 .global DMA2_Stream7_IRQHandler
+ 842 .syntax unified
+ 843 .thumb
+ 844 .thumb_func
+ 846 DMA2_Stream7_IRQHandler:
+ 847 .LFB1201:
+ 366:Src/stm32f7xx_it.c ****
+ 367:Src/stm32f7xx_it.c **** /**
+ 368:Src/stm32f7xx_it.c **** * @brief This function handles DMA2 stream7 global interrupt.
+ 369:Src/stm32f7xx_it.c **** */
+ 370:Src/stm32f7xx_it.c **** void DMA2_Stream7_IRQHandler(void)
+ 371:Src/stm32f7xx_it.c **** {
+ 848 .loc 1 371 1 is_stmt 1 view -0
+ 849 .cfi_startproc
+ 850 @ args = 0, pretend = 0, frame = 0
+ 851 @ frame_needed = 0, uses_anonymous_args = 0
+ 852 0000 08B5 push {r3, lr}
+ 853 .LCFI5:
+ 854 .cfi_def_cfa_offset 8
+ 855 .cfi_offset 3, -8
+ 856 .cfi_offset 14, -4
+ 372:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
+ 373:Src/stm32f7xx_it.c **** if(LL_DMA_IsActiveFlag_TC7(DMA2) == 1)
+ 857 .loc 1 373 3 view .LVU193
+ 858 .LVL43:
+ 859 .LBB108:
+ 860 .LBI108:
+ 861 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h"
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ******************************************************************************
3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @file stm32f7xx_ll_dma.h
@@ -11913,6 +10318,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ******************************************************************************
7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @attention
8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** *
+ ARM GAS /tmp/ccnmuCkZ.s page 173
+
+
9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * Copyright (c) 2017 STMicroelectronics.
10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * All rights reserved.
11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** *
@@ -11938,9 +10346,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccMf3LkY.s page 200
-
-
34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined (DMA1) || defined (DMA2)
35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL DMA
@@ -11973,6 +10378,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Private_Constants DMA Private Constants
64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 174
+
+
66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #if defined(DMA_SxCR_CHSEL_3)
67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define DMA_CHANNEL_SELECTION_8_15
68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /* DMA_SxCR_CHSEL_3 */
@@ -11998,9 +10406,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Destination base address in case of memory to memory
89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter must be a value between Min_Data = 0 and Max
- ARM GAS /tmp/ccMf3LkY.s page 201
-
-
91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t Direction; /*!< Specifies if the data will be transferred from memory to pe
93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** from memory to memory or from peripheral to memory.
@@ -12033,6 +10438,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct
122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 175
+
+
123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination dat
124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** in case of memory to memory transfer direction.
125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
@@ -12058,9 +10466,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t FIFOMode; /*!< Specifies if the FIFO mode or Direct mode will be used for
147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_FIFOMODE
- ARM GAS /tmp/ccMf3LkY.s page 202
-
-
148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The Direct mode (FIFO mode disabled) cannot be used i
149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** memory-to-memory data transfer is configured on the selecte
150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -12093,6 +10498,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif /*USE_FULL_LL_DRIVER*/
179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Exported constants --------------------------------------------------------*/
+ ARM GAS /tmp/ccnmuCkZ.s page 176
+
+
180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12118,9 +10526,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY 0x00000000U /*!< Peripheral to memory direc
204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_SxCR_DIR_0 /*!< Memory to peripheral direc
- ARM GAS /tmp/ccMf3LkY.s page 203
-
-
205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_SxCR_DIR_1 /*!< Memory to memory direction
206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
@@ -12153,6 +10558,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 177
+
+
237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_MEMORY MEMORY
239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
@@ -12178,9 +10586,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_BYTE 0x00000000U /*!< Memory data alignment : By
261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_HALFWORD DMA_SxCR_MSIZE_0 /*!< Memory data alignment : Ha
- ARM GAS /tmp/ccMf3LkY.s page 204
-
-
262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MDATAALIGN_WORD DMA_SxCR_MSIZE_1 /*!< Memory data alignment : Wo
263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
@@ -12213,6 +10618,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_1 DMA_SxCR_CHSEL_0
292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_2 DMA_SxCR_CHSEL_1
293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_3 (DMA_SxCR_CHSEL_0 | DMA_SxCR_CHSEL_1)
+ ARM GAS /tmp/ccnmuCkZ.s page 178
+
+
294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_4 DMA_SxCR_CHSEL_2
295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_5 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_0)
296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_CHANNEL_6 (DMA_SxCR_CHSEL_2 | DMA_SxCR_CHSEL_1)
@@ -12238,9 +10646,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC4 DMA_SxCR_MBURST_0 /*!< Memory burst
317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC8 DMA_SxCR_MBURST_1 /*!< Memory burst
318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_MBURST_INC16 (DMA_SxCR_MBURST_0 | DMA_SxCR_MBURST_1) /*!< Memory burst
- ARM GAS /tmp/ccMf3LkY.s page 205
-
-
319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12273,6 +10678,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_50_75 DMA_SxFCR_FS_1 /*!< 1/2 < fifo_l
349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_75_100 (DMA_SxFCR_FS_1 | DMA_SxFCR_FS_0) /*!< 3/4 < fifo_l
350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_EMPTY DMA_SxFCR_FS_2 /*!< FIFO is empt
+ ARM GAS /tmp/ccnmuCkZ.s page 179
+
+
351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOSTATUS_FULL (DMA_SxFCR_FS_2 | DMA_SxFCR_FS_0) /*!< FIFO is full
352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
@@ -12298,9 +10706,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccMf3LkY.s page 206
-
-
376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12333,6 +10738,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 180
+
+
408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxStreamy
409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12358,9 +10766,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream2)) ? LL_DMA_STREAM_2 : \
431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream3)) ? LL_DMA_STREAM_3 : \
432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream3)) ? LL_DMA_STREAM_3 : \
- ARM GAS /tmp/ccMf3LkY.s page 207
-
-
433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream4)) ? LL_DMA_STREAM_4 : \
434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA2_Stream4)) ? LL_DMA_STREAM_4 : \
435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream5)) ? LL_DMA_STREAM_5 : \
@@ -12393,6 +10798,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM
463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** DMA2_Stream7)
464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 181
+
+
465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12418,9 +10826,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
- ARM GAS /tmp/ccMf3LkY.s page 208
-
-
490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
@@ -12453,6 +10858,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** CLEAR_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 182
+
+
522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Check if DMA stream is enabled or disabled.
524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR EN LL_DMA_IsEnabledStream
@@ -12478,9 +10886,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n
545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n
- ARM GAS /tmp/ccMf3LkY.s page 209
-
-
547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MINC LL_DMA_ConfigTransfer\n
548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n
549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MSIZE LL_DMA_ConfigTransfer\n
@@ -12513,6 +10918,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** Configuration);
577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 183
+
+
579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Data transfer direction (read from peripheral or from memory).
581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_SetDataTransferDirection
@@ -12538,9 +10946,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 210
-
-
604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory).
605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection
606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -12573,6 +10978,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
+ ARM GAS /tmp/ccnmuCkZ.s page 184
+
+
636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
@@ -12598,9 +11006,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
- ARM GAS /tmp/ccMf3LkY.s page 211
-
-
661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
@@ -12633,6 +11038,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PERIPH_INCREMENT
691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 185
+
+
693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Increment
694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
@@ -12658,9 +11066,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream)
716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
- ARM GAS /tmp/ccMf3LkY.s page 212
-
-
718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -12693,6 +11098,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
+ ARM GAS /tmp/ccnmuCkZ.s page 186
+
+
750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
@@ -12718,9 +11126,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
- ARM GAS /tmp/ccMf3LkY.s page 213
-
-
775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
@@ -12753,6 +11158,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_HALFWORD
805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PDATAALIGN_WORD
806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 187
+
+
807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Stream)
808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
@@ -12778,9 +11186,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size)
- ARM GAS /tmp/ccMf3LkY.s page 214
-
-
832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -12813,6 +11218,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PINCOS LL_DMA_SetIncOffsetSize
862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
+ ARM GAS /tmp/ccnmuCkZ.s page 188
+
+
864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
@@ -12838,9 +11246,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
- ARM GAS /tmp/ccMf3LkY.s page 215
-
-
889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
@@ -12873,6 +11278,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW
919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM
920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH
+ ARM GAS /tmp/ccnmuCkZ.s page 189
+
+
921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH
922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -12898,9 +11306,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW
944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM
945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH
- ARM GAS /tmp/ccMf3LkY.s page 216
-
-
946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH
947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream)
@@ -12933,6 +11338,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Number of data to transfer.
+ ARM GAS /tmp/ccnmuCkZ.s page 190
+
+
978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll NDTR NDT LL_DMA_GetDataLength
979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Once the stream is enabled, the return value indicate the
980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * remaining bytes to be transmitted.
@@ -12958,9 +11366,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection
1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
- ARM GAS /tmp/ccMf3LkY.s page 217
-
-
1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
@@ -12993,6 +11398,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetChannelSelection(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Channe
1033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
+ ARM GAS /tmp/ccnmuCkZ.s page 191
+
+
1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13018,9 +11426,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6
1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7
1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_8 (*)
- ARM GAS /tmp/ccMf3LkY.s page 218
-
-
1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_9 (*)
1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_10 (*)
1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_11 (*)
@@ -13053,6 +11458,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE
1090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4
1091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8
+ ARM GAS /tmp/ccnmuCkZ.s page 192
+
+
1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16
1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -13078,9 +11486,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE
1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4
1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8
- ARM GAS /tmp/ccMf3LkY.s page 219
-
-
1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16
1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream)
@@ -13113,6 +11518,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
1147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 193
+
+
1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Peripheral burst transfer configuration.
1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR PBURST LL_DMA_GetPeriphBurstxfer
@@ -13138,9 +11546,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 220
-
-
1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0.
1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CT LL_DMA_SetCurrentTargetMem
1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -13173,6 +11578,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
1204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
1205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
+ ARM GAS /tmp/ccnmuCkZ.s page 194
+
+
1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
@@ -13198,9 +11606,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
- ARM GAS /tmp/ccMf3LkY.s page 221
-
-
1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream)
@@ -13233,6 +11638,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FS LL_DMA_GetFIFOStatus
1261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
+ ARM GAS /tmp/ccnmuCkZ.s page 195
+
+
1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
@@ -13258,9 +11666,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode.
1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode
1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
- ARM GAS /tmp/ccMf3LkY.s page 222
-
-
1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
@@ -13293,6 +11698,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableFifoMode(DMA_TypeDef *DMAx, uint32_t Stream)
+ ARM GAS /tmp/ccnmuCkZ.s page 196
+
+
1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, DM
1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13318,9 +11726,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold
- ARM GAS /tmp/ccMf3LkY.s page 223
-
-
1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR,
1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13353,6 +11758,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the FIFO .
1375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR FTH LL_DMA_ConfigFifo\n
1376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * FCR DMDIS LL_DMA_ConfigFifo
+ ARM GAS /tmp/ccnmuCkZ.s page 197
+
+
1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
@@ -13378,9 +11786,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR,
1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccMf3LkY.s page 224
-
-
1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses.
1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled.
@@ -13413,6 +11818,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
1432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Direction Periph to Memory and Memory to Memory */
+ ARM GAS /tmp/ccnmuCkZ.s page 198
+
+
1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** else
1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR,
@@ -13438,9 +11846,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF
1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 225
-
-
1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR,
@@ -13473,6 +11878,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory address.
1489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_GetMemoryAddress
1490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMO
+ ARM GAS /tmp/ccnmuCkZ.s page 199
+
+
1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
@@ -13498,9 +11906,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
- ARM GAS /tmp/ccMf3LkY.s page 226
-
-
1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
@@ -13533,6 +11938,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
+ ARM GAS /tmp/ccnmuCkZ.s page 200
+
+
1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->PAR, M
1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13558,9 +11966,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd
1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR
- ARM GAS /tmp/ccMf3LkY.s page 227
-
-
1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13593,6 +11998,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
1604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
+ ARM GAS /tmp/ccnmuCkZ.s page 201
+
+
1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
@@ -13618,9 +12026,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
- ARM GAS /tmp/ccMf3LkY.s page 228
-
-
1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Address Between 0 to 0xFFFFFFFF
1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -13653,6 +12058,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
1660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 202
+
+
1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -13678,9 +12086,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1));
1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- ARM GAS /tmp/ccMf3LkY.s page 229
-
-
1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag.
@@ -13713,6 +12118,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
1717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF4)==(DMA_HISR_HTIF4));
+ ARM GAS /tmp/ccnmuCkZ.s page 203
+
+
1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13738,9 +12146,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 230
-
-
1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 half transfer flag.
1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7
1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -13773,6 +12178,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TCIF1)==(DMA_LISR_TCIF1));
1774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 204
+
+
1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer complete flag.
1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TCIF2 LL_DMA_IsActiveFlag_TC2
@@ -13798,9 +12206,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag.
1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4
- ARM GAS /tmp/ccMf3LkY.s page 231
-
-
1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -13833,13 +12238,38 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 transfer complete flag.
+ ARM GAS /tmp/ccnmuCkZ.s page 205
+
+
1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF7 LL_DMA_IsActiveFlag_TC7
1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
+ 862 .loc 5 1837 26 view .LVU194
+ 863 .LBB109:
1838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TCIF7)==(DMA_HISR_TCIF7));
+ 864 .loc 5 1839 3 view .LVU195
+ 865 .loc 5 1839 11 is_stmt 0 view .LVU196
+ 866 0002 0B4B ldr r3, .L56
+ 867 0004 5B68 ldr r3, [r3, #4]
+ 868 .LVL44:
+ 869 .loc 5 1839 11 view .LVU197
+ 870 .LBE109:
+ 871 .LBE108:
+ 872 .loc 1 373 5 discriminator 1 view .LVU198
+ 873 0006 13F0006F tst r3, #134217728
+ 874 000a 09D1 bne .L55
+ 374:Src/stm32f7xx_it.c **** {
+ 375:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TC7(DMA2);
+ 376:Src/stm32f7xx_it.c **** app_on_dma_tx_complete();
+ 377:Src/stm32f7xx_it.c **** }
+ 378:Src/stm32f7xx_it.c **** else if(LL_DMA_IsActiveFlag_TE7(DMA2) == 1)
+ 875 .loc 1 378 8 is_stmt 1 view .LVU199
+ 876 .LVL45:
+ 877 .LBB110:
+ 878 .LBI110:
1840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13858,9 +12288,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1
1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccMf3LkY.s page 232
-
-
1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -13871,6 +12298,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 transfer error flag.
1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF2 LL_DMA_IsActiveFlag_TE2
1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
+ ARM GAS /tmp/ccnmuCkZ.s page 206
+
+
1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
@@ -13918,9 +12348,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
- ARM GAS /tmp/ccMf3LkY.s page 233
-
-
1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6));
1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
@@ -13931,9 +12358,31 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 207
+
+
1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
+ 879 .loc 5 1925 26 view .LVU200
+ 880 .LBB111:
1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF7)==(DMA_HISR_TEIF7));
+ 881 .loc 5 1927 3 view .LVU201
+ 882 .loc 5 1927 11 is_stmt 0 view .LVU202
+ 883 000c 084B ldr r3, .L56
+ 884 000e 5B68 ldr r3, [r3, #4]
+ 885 .LVL46:
+ 886 .loc 5 1927 11 view .LVU203
+ 887 .LBE111:
+ 888 .LBE110:
+ 889 .loc 1 378 10 discriminator 1 view .LVU204
+ 890 0010 13F0007F tst r3, #33554432
+ 891 0014 03D0 beq .L51
+ 379:Src/stm32f7xx_it.c **** {
+ 380:Src/stm32f7xx_it.c **** LL_DMA_ClearFlag_TE7(DMA2);
+ 892 .loc 1 380 5 is_stmt 1 view .LVU205
+ 893 .LVL47:
+ 894 .LBB112:
+ 895 .LBI112:
1928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1929:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1930:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -13969,6 +12418,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF2)==(DMA_LISR_DMEIF2));
1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
+ ARM GAS /tmp/ccnmuCkZ.s page 208
+
+
1963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
1964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 3 direct mode error flag.
1965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR DMEIF3 LL_DMA_IsActiveFlag_DME3
@@ -13978,9 +12430,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx)
1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3));
- ARM GAS /tmp/ccMf3LkY.s page 234
-
-
1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -14029,6 +12478,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
2018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 0 FIFO error flag.
+ ARM GAS /tmp/ccnmuCkZ.s page 209
+
+
2020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF0 LL_DMA_IsActiveFlag_FE0
2021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
@@ -14038,9 +12490,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0));
2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
- ARM GAS /tmp/ccMf3LkY.s page 235
-
-
2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag.
2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1
@@ -14089,6 +12538,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 5 FIFO error flag.
2075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF0 LL_DMA_IsActiveFlag_FE5
2076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
+ ARM GAS /tmp/ccnmuCkZ.s page 210
+
+
2077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
2078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_FE5(DMA_TypeDef *DMAx)
@@ -14098,9 +12550,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 FIFO error flag.
- ARM GAS /tmp/ccMf3LkY.s page 236
-
-
2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF6 LL_DMA_IsActiveFlag_FE6
2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0).
@@ -14149,6 +12598,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
+ ARM GAS /tmp/ccnmuCkZ.s page 211
+
+
2134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
2135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
2136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CHTIF2);
@@ -14158,9 +12610,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag.
2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3
2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
- ARM GAS /tmp/ccMf3LkY.s page 237
-
-
2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
@@ -14209,6 +12658,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
2190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ ARM GAS /tmp/ccnmuCkZ.s page 212
+
+
2191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CHTIF7);
2192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
2193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -14218,9 +12670,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/ccMf3LkY.s page 238
-
-
2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC0(DMA_TypeDef *DMAx)
2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0);
@@ -14269,6 +12718,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
2246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF4);
2247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ ARM GAS /tmp/ccnmuCkZ.s page 213
+
+
2248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
2249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer complete flag.
@@ -14278,9 +12730,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- ARM GAS /tmp/ccMf3LkY.s page 239
-
-
2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5);
2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -14302,105 +12751,11 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
- 1828 .loc 5 2277 22 view .LVU488
- 1829 .LBB101:
2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF7);
- 1830 .loc 5 2279 3 view .LVU489
- 1831 0000 024B ldr r3, .L139
- 1832 0002 4FF00062 mov r2, #134217728
- 1833 0006 DA60 str r2, [r3, #12]
- 1834 .LVL43:
- 1835 .loc 5 2279 3 is_stmt 0 view .LVU490
- 1836 .LBE101:
- 1837 .LBE100:
- 640:Src/stm32f7xx_it.c **** }
- 1838 .loc 1 640 1 view .LVU491
- 1839 0008 7047 bx lr
- 1840 .L140:
- 1841 000a 00BF .align 2
- 1842 .L139:
- 1843 000c 00640240 .word 1073898496
- 1844 .cfi_endproc
- 1845 .LFE1203:
- 1847 .section .text.DMA2_Stream7_IRQHandler,"ax",%progbits
- 1848 .align 1
- 1849 .global DMA2_Stream7_IRQHandler
- 1850 .syntax unified
- 1851 .thumb
- 1852 .thumb_func
- 1854 DMA2_Stream7_IRQHandler:
- 1855 .LFB1201:
- 417:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 0 */
- 1856 .loc 1 417 1 is_stmt 1 view -0
- 1857 .cfi_startproc
- 1858 @ args = 0, pretend = 0, frame = 0
- 1859 @ frame_needed = 0, uses_anonymous_args = 0
- 1860 0000 08B5 push {r3, lr}
- 1861 .LCFI13:
- ARM GAS /tmp/ccMf3LkY.s page 240
-
-
- 1862 .cfi_def_cfa_offset 8
- 1863 .cfi_offset 3, -8
- 1864 .cfi_offset 14, -4
- 419:Src/stm32f7xx_it.c **** {
- 1865 .loc 1 419 3 view .LVU493
- 1866 .LVL44:
- 1867 .LBB102:
- 1868 .LBI102:
-1837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 1869 .loc 5 1837 26 view .LVU494
- 1870 .LBB103:
-1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1871 .loc 5 1839 3 view .LVU495
-1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1872 .loc 5 1839 11 is_stmt 0 view .LVU496
- 1873 0002 0A4B ldr r3, .L146
- 1874 0004 5B68 ldr r3, [r3, #4]
- 1875 .LVL45:
-1839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1876 .loc 5 1839 11 view .LVU497
- 1877 .LBE103:
- 1878 .LBE102:
- 419:Src/stm32f7xx_it.c **** {
- 1879 .loc 1 419 5 discriminator 1 view .LVU498
- 1880 0006 13F0006F tst r3, #134217728
- 1881 000a 09D1 bne .L145
- 424:Src/stm32f7xx_it.c **** {
- 1882 .loc 1 424 8 is_stmt 1 view .LVU499
- 1883 .LVL46:
- 1884 .LBB104:
- 1885 .LBI104:
-1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- 1886 .loc 5 1925 26 view .LVU500
- 1887 .LBB105:
-1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1888 .loc 5 1927 3 view .LVU501
-1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1889 .loc 5 1927 11 is_stmt 0 view .LVU502
- 1890 000c 074B ldr r3, .L146
- 1891 000e 5B68 ldr r3, [r3, #4]
- 1892 .LVL47:
-1927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- 1893 .loc 5 1927 11 view .LVU503
- 1894 .LBE105:
- 1895 .LBE104:
- 424:Src/stm32f7xx_it.c **** {
- 1896 .loc 1 424 10 discriminator 1 view .LVU504
- 1897 0010 13F0007F tst r3, #33554432
- 1898 0014 03D0 beq .L141
- 426:Src/stm32f7xx_it.c **** }
- 1899 .loc 1 426 5 is_stmt 1 view .LVU505
- 1900 .LVL48:
- 1901 .LBB106:
- 1902 .LBI106:
2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
2282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/ccMf3LkY.s page 241
-
-
2283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 0 transfer error flag.
2284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF0 LL_DMA_ClearFlag_TE0
2285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -14423,6 +12778,9 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
+ ARM GAS /tmp/ccnmuCkZ.s page 214
+
+
2305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 2 transfer error flag.
2306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTEIF2 LL_DMA_ClearFlag_TE2
2307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
@@ -14458,9 +12816,6 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 5 transfer error flag.
2339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF5 LL_DMA_ClearFlag_TE5
- ARM GAS /tmp/ccMf3LkY.s page 242
-
-
2340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -14483,152 +12838,134 @@ ARM GAS /tmp/ccMf3LkY.s page 1
2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer error flag.
2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7
+ ARM GAS /tmp/ccnmuCkZ.s page 215
+
+
2362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
2363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
2364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
- 1903 .loc 5 2365 22 view .LVU506
- 1904 .LBB107:
+ 896 .loc 5 2365 22 view .LVU206
+ 897 .LBB113:
2366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF7);
- 1905 .loc 5 2367 3 view .LVU507
- 1906 0016 054B ldr r3, .L146
- 1907 0018 4FF00072 mov r2, #33554432
- 1908 001c DA60 str r2, [r3, #12]
- 1909 .LVL49:
- 1910 .L141:
- 1911 .loc 5 2367 3 is_stmt 0 view .LVU508
- 1912 .LBE107:
- 1913 .LBE106:
- 432:Src/stm32f7xx_it.c ****
- 1914 .loc 1 432 1 view .LVU509
- 1915 001e 08BD pop {r3, pc}
- 1916 .L145:
- 421:Src/stm32f7xx_it.c **** u_tx_flg = 0;//indicate that transfer compete
- 1917 .loc 1 421 5 is_stmt 1 view .LVU510
- 1918 0020 FFF7FEFF bl DMA2_Stream7_TransferComplete
- 1919 .LVL50:
- 422:Src/stm32f7xx_it.c **** }
- 1920 .loc 1 422 5 view .LVU511
- 422:Src/stm32f7xx_it.c **** }
- 1921 .loc 1 422 14 is_stmt 0 view .LVU512
- 1922 0024 024B ldr r3, .L146+4
- 1923 0026 0022 movs r2, #0
- 1924 0028 1A70 strb r2, [r3]
- 1925 002a F8E7 b .L141
- 1926 .L147:
- 1927 .align 2
- ARM GAS /tmp/ccMf3LkY.s page 243
+ 898 .loc 5 2367 3 view .LVU207
+ 899 0016 064B ldr r3, .L56
+ 900 0018 4FF00072 mov r2, #33554432
+ 901 001c DA60 str r2, [r3, #12]
+ 902 .LVL48:
+ 903 .L51:
+ 904 .loc 5 2367 3 is_stmt 0 view .LVU208
+ 905 .LBE113:
+ 906 .LBE112:
+ 381:Src/stm32f7xx_it.c **** }
+ 382:Src/stm32f7xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 0 */
+ 383:Src/stm32f7xx_it.c **** /* USER CODE BEGIN DMA2_Stream7_IRQn 1 */
+ 384:Src/stm32f7xx_it.c ****
+ 385:Src/stm32f7xx_it.c **** /* USER CODE END DMA2_Stream7_IRQn 1 */
+ 386:Src/stm32f7xx_it.c **** }
+ 907 .loc 1 386 1 view .LVU209
+ 908 001e 08BD pop {r3, pc}
+ 909 .L55:
+ 375:Src/stm32f7xx_it.c **** app_on_dma_tx_complete();
+ 910 .loc 1 375 5 is_stmt 1 view .LVU210
+ 911 .LVL49:
+ 912 .LBB114:
+ 913 .LBI114:
+2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
+ 914 .loc 5 2277 22 view .LVU211
+ 915 .LBB115:
+2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 916 .loc 5 2279 3 view .LVU212
+ 917 0020 034B ldr r3, .L56
+ 918 0022 4FF00062 mov r2, #134217728
+ 919 0026 DA60 str r2, [r3, #12]
+ 920 .LVL50:
+2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
+ 921 .loc 5 2279 3 is_stmt 0 view .LVU213
+ 922 .LBE115:
+ 923 .LBE114:
+ 376:Src/stm32f7xx_it.c **** }
+ 924 .loc 1 376 5 is_stmt 1 view .LVU214
+ 925 0028 FFF7FEFF bl app_on_dma_tx_complete
+ 926 .LVL51:
+ 927 002c F7E7 b .L51
+ 928 .L57:
+ 929 002e 00BF .align 2
+ 930 .L56:
+ 931 0030 00640240 .word 1073898496
+ 932 .cfi_endproc
+ 933 .LFE1201:
+ 935 .text
+ 936 .Letext0:
+ ARM GAS /tmp/ccnmuCkZ.s page 216
- 1928 .L146:
- 1929 002c 00640240 .word 1073898496
- 1930 0030 00000000 .word u_tx_flg
- 1931 .cfi_endproc
- 1932 .LFE1201:
- 1934 .text
- 1935 .Letext0:
- 1936 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- 1937 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- 1938 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- 1939 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
- 1940 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h"
- 1941 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
- 1942 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
- 1943 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h"
- 1944 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- 1945 .file 15 "Inc/main.h"
- 1946 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
- ARM GAS /tmp/ccMf3LkY.s page 244
+ 937 .file 6 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
+ 938 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
+ 939 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
+ 940 .file 9 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
+ 941 .file 10 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h"
+ 942 .file 11 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h"
+ 943 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
+ 944 .file 13 "App/Core/app_core.h"
+ 945 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h"
+ ARM GAS /tmp/ccnmuCkZ.s page 217
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_it.c
- /tmp/ccMf3LkY.s:20 .text.NMI_Handler:00000000 $t
- /tmp/ccMf3LkY.s:26 .text.NMI_Handler:00000000 NMI_Handler
- /tmp/ccMf3LkY.s:43 .text.HardFault_Handler:00000000 $t
- /tmp/ccMf3LkY.s:49 .text.HardFault_Handler:00000000 HardFault_Handler
- /tmp/ccMf3LkY.s:66 .text.MemManage_Handler:00000000 $t
- /tmp/ccMf3LkY.s:72 .text.MemManage_Handler:00000000 MemManage_Handler
- /tmp/ccMf3LkY.s:89 .text.BusFault_Handler:00000000 $t
- /tmp/ccMf3LkY.s:95 .text.BusFault_Handler:00000000 BusFault_Handler
- /tmp/ccMf3LkY.s:112 .text.UsageFault_Handler:00000000 $t
- /tmp/ccMf3LkY.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler
- /tmp/ccMf3LkY.s:135 .text.SVC_Handler:00000000 $t
- /tmp/ccMf3LkY.s:141 .text.SVC_Handler:00000000 SVC_Handler
- /tmp/ccMf3LkY.s:154 .text.DebugMon_Handler:00000000 $t
- /tmp/ccMf3LkY.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler
- /tmp/ccMf3LkY.s:173 .text.PendSV_Handler:00000000 $t
- /tmp/ccMf3LkY.s:179 .text.PendSV_Handler:00000000 PendSV_Handler
- /tmp/ccMf3LkY.s:192 .text.SysTick_Handler:00000000 $t
- /tmp/ccMf3LkY.s:198 .text.SysTick_Handler:00000000 SysTick_Handler
- /tmp/ccMf3LkY.s:218 .text.ADC_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler
- /tmp/ccMf3LkY.s:248 .text.ADC_IRQHandler:00000010 $d
- /tmp/ccMf3LkY.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler
- /tmp/ccMf3LkY.s:301 .text.TIM1_UP_TIM10_IRQHandler:00000024 $d
- /tmp/ccMf3LkY.s:309 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:315 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler
- /tmp/ccMf3LkY.s:355 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000028 $d
- /tmp/ccMf3LkY.s:362 .text.TIM2_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:368 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
- /tmp/ccMf3LkY.s:381 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:387 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler
- /tmp/ccMf3LkY.s:453 .text.TIM8_UP_TIM13_IRQHandler:00000048 $d
- /tmp/ccMf3LkY.s:459 .text.TIM5_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:465 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler
- /tmp/ccMf3LkY.s:478 .text.TIM6_DAC_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:484 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler
- /tmp/ccMf3LkY.s:543 .text.TIM6_DAC_IRQHandler:00000028 $d
- /tmp/ccMf3LkY.s:550 .text.TIM7_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:556 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler
- /tmp/ccMf3LkY.s:605 .text.TIM7_IRQHandler:0000001c $d
- /tmp/ccMf3LkY.s:611 .text.UART_RxCpltCallback:00000000 $t
- /tmp/ccMf3LkY.s:617 .text.UART_RxCpltCallback:00000000 UART_RxCpltCallback
- /tmp/ccMf3LkY.s:655 .text.UART_RxCpltCallback:0000001a $d
- /tmp/ccMf3LkY.s:687 .text.UART_RxCpltCallback:0000005a $t
- /tmp/ccMf3LkY.s:1080 .text.UART_RxCpltCallback:0000026c $d
- /tmp/ccMf3LkY.s:1094 .text.UART_RxCpltCallback:00000298 $t
- /tmp/ccMf3LkY.s:1475 .text.UART_RxCpltCallback:000004a0 $d
- /tmp/ccMf3LkY.s:1485 .text.USART1_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:1491 .text.USART1_IRQHandler:00000000 USART1_IRQHandler
- /tmp/ccMf3LkY.s:1804 .text.USART1_IRQHandler:000000c8 $d
- /tmp/ccMf3LkY.s:1810 .text.DMA2_Stream7_TransferComplete:00000000 $t
- /tmp/ccMf3LkY.s:1816 .text.DMA2_Stream7_TransferComplete:00000000 DMA2_Stream7_TransferComplete
- /tmp/ccMf3LkY.s:1843 .text.DMA2_Stream7_TransferComplete:0000000c $d
- /tmp/ccMf3LkY.s:1848 .text.DMA2_Stream7_IRQHandler:00000000 $t
- /tmp/ccMf3LkY.s:1854 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler
- ARM GAS /tmp/ccMf3LkY.s page 245
-
-
- /tmp/ccMf3LkY.s:1929 .text.DMA2_Stream7_IRQHandler:0000002c $d
+ /tmp/ccnmuCkZ.s:20 .text.NMI_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:26 .text.NMI_Handler:00000000 NMI_Handler
+ /tmp/ccnmuCkZ.s:43 .text.HardFault_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:49 .text.HardFault_Handler:00000000 HardFault_Handler
+ /tmp/ccnmuCkZ.s:66 .text.MemManage_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:72 .text.MemManage_Handler:00000000 MemManage_Handler
+ /tmp/ccnmuCkZ.s:89 .text.BusFault_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:95 .text.BusFault_Handler:00000000 BusFault_Handler
+ /tmp/ccnmuCkZ.s:112 .text.UsageFault_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:118 .text.UsageFault_Handler:00000000 UsageFault_Handler
+ /tmp/ccnmuCkZ.s:135 .text.SVC_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:141 .text.SVC_Handler:00000000 SVC_Handler
+ /tmp/ccnmuCkZ.s:154 .text.DebugMon_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:160 .text.DebugMon_Handler:00000000 DebugMon_Handler
+ /tmp/ccnmuCkZ.s:173 .text.PendSV_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:179 .text.PendSV_Handler:00000000 PendSV_Handler
+ /tmp/ccnmuCkZ.s:192 .text.SysTick_Handler:00000000 $t
+ /tmp/ccnmuCkZ.s:198 .text.SysTick_Handler:00000000 SysTick_Handler
+ /tmp/ccnmuCkZ.s:218 .text.ADC_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:224 .text.ADC_IRQHandler:00000000 ADC_IRQHandler
+ /tmp/ccnmuCkZ.s:248 .text.ADC_IRQHandler:00000010 $d
+ /tmp/ccnmuCkZ.s:254 .text.TIM1_UP_TIM10_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:260 .text.TIM1_UP_TIM10_IRQHandler:00000000 TIM1_UP_TIM10_IRQHandler
+ /tmp/ccnmuCkZ.s:273 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:279 .text.TIM1_TRG_COM_TIM11_IRQHandler:00000000 TIM1_TRG_COM_TIM11_IRQHandler
+ /tmp/ccnmuCkZ.s:292 .text.TIM2_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:298 .text.TIM2_IRQHandler:00000000 TIM2_IRQHandler
+ /tmp/ccnmuCkZ.s:311 .text.USART1_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:317 .text.USART1_IRQHandler:00000000 USART1_IRQHandler
+ /tmp/ccnmuCkZ.s:672 .text.USART1_IRQHandler:000000b0 $d
+ /tmp/ccnmuCkZ.s:679 .text.TIM8_UP_TIM13_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:685 .text.TIM8_UP_TIM13_IRQHandler:00000000 TIM8_UP_TIM13_IRQHandler
+ /tmp/ccnmuCkZ.s:698 .text.TIM5_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:704 .text.TIM5_IRQHandler:00000000 TIM5_IRQHandler
+ /tmp/ccnmuCkZ.s:717 .text.TIM6_DAC_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:723 .text.TIM6_DAC_IRQHandler:00000000 TIM6_DAC_IRQHandler
+ /tmp/ccnmuCkZ.s:774 .text.TIM6_DAC_IRQHandler:0000001c $d
+ /tmp/ccnmuCkZ.s:779 .text.TIM7_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:785 .text.TIM7_IRQHandler:00000000 TIM7_IRQHandler
+ /tmp/ccnmuCkZ.s:835 .text.TIM7_IRQHandler:0000001c $d
+ /tmp/ccnmuCkZ.s:840 .text.DMA2_Stream7_IRQHandler:00000000 $t
+ /tmp/ccnmuCkZ.s:846 .text.DMA2_Stream7_IRQHandler:00000000 DMA2_Stream7_IRQHandler
+ /tmp/ccnmuCkZ.s:931 .text.DMA2_Stream7_IRQHandler:00000030 $d
UNDEFINED SYMBOLS
HAL_IncTick
HAL_ADC_IRQHandler
hadc1
hadc3
-HAL_TIM_IRQHandler
-TO10
-TO10_counter
-htim10
-TIM10_coflag
-htim11
-Set_LTEC
-HAL_GPIO_WritePin
-LD_blinker
-htim8
-HAL_GPIO_TogglePin
-TO6
-TO7
-uart_buf
-UART_rec_incr
-TO6_uart
-flg_tmt
-UART_header
-CPU_state
-State_Data
-COMMAND
-UART_transmission_request
-u_tx_flg
+app_on_uart_byte
+app_on_uart_error
+app_on_tim6_tick
+app_on_tim7_tick
+app_on_dma_tx_complete
diff --git a/build/stm32f7xx_it.o b/build/stm32f7xx_it.o
index d68e210..5193c8b 100644
Binary files a/build/stm32f7xx_it.o and b/build/stm32f7xx_it.o differ
diff --git a/build/stm32f7xx_ll_dma.lst b/build/stm32f7xx_ll_dma.lst
index 5c43fa2..ae0599d 100644
--- a/build/stm32f7xx_ll_dma.lst
+++ b/build/stm32f7xx_ll_dma.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cccCOnvd.s page 1
+ARM GAS /tmp/cctleUbk.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /** @addtogroup STM32F7xx_LL_Driver
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * @{
- ARM GAS /tmp/cccCOnvd.s page 2
+ ARM GAS /tmp/cctleUbk.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** */
@@ -118,7 +118,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((__VALUE__) == LL_DMA_CHANNEL_14) || \
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((__VALUE__) == LL_DMA_CHANNEL_15))
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
- ARM GAS /tmp/cccCOnvd.s page 3
+ ARM GAS /tmp/cctleUbk.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** #else
@@ -178,7 +178,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** ((BURST) == LL_DMA_PBURST_INC16))
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /**
- ARM GAS /tmp/cccCOnvd.s page 4
+ ARM GAS /tmp/cctleUbk.s page 4
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * @}
@@ -238,7 +238,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
42 .LCFI0:
43 .cfi_def_cfa_offset 8
44 .cfi_offset 4, -8
- ARM GAS /tmp/cccCOnvd.s page 5
+ ARM GAS /tmp/cctleUbk.s page 5
45 .cfi_offset 14, -4
@@ -298,7 +298,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #ifdef __cplusplus
24:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** extern "C" {
25:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #endif
- ARM GAS /tmp/cccCOnvd.s page 6
+ ARM GAS /tmp/cctleUbk.s page 6
26:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -358,7 +358,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** typedef struct
81:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
82:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer
- ARM GAS /tmp/cccCOnvd.s page 7
+ ARM GAS /tmp/cctleUbk.s page 7
83:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** or as Source base address in case of memory to memory trans
@@ -418,7 +418,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_CHANNEL
138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct
- ARM GAS /tmp/cccCOnvd.s page 8
+ ARM GAS /tmp/cctleUbk.s page 8
140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_7 0x00000007U
195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_STREAM_ALL 0xFFFF0000U
196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/cccCOnvd.s page 9
+ ARM GAS /tmp/cctleUbk.s page 9
197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
@@ -538,7 +538,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_HALFWORD DMA_SxCR_PSIZE_0 /*!< Peripheral data alignment
252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PDATAALIGN_WORD DMA_SxCR_PSIZE_1 /*!< Peripheral data alignment
253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/cccCOnvd.s page 10
+ ARM GAS /tmp/cctleUbk.s page 10
254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
@@ -598,7 +598,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @}
310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/cccCOnvd.s page 11
+ ARM GAS /tmp/cctleUbk.s page 11
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -658,7 +658,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_CURRENTTARGETMEM CURRENTTARGETMEM
- ARM GAS /tmp/cccCOnvd.s page 12
+ ARM GAS /tmp/cctleUbk.s page 12
368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
@@ -718,7 +718,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval LL_DMA_CHANNEL_y
423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM(__STREAM_INSTANCE__) \
- ARM GAS /tmp/cccCOnvd.s page 13
+ ARM GAS /tmp/cctleUbk.s page 13
425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__STREAM_INSTANCE__) == ((uint32_t)DMA1_Stream0)) ? LL_DMA_STREAM_0 : \
@@ -778,7 +778,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EF_Configuration Configuration
480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{
481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/cccCOnvd.s page 14
+ ARM GAS /tmp/cctleUbk.s page 14
482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
@@ -838,7 +838,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
64 .loc 1 213 34 is_stmt 0 view .LVU12
65 001a 664B ldr r3, .L38+4
66 001c C31A subs r3, r0, r3
- ARM GAS /tmp/cccCOnvd.s page 15
+ ARM GAS /tmp/cctleUbk.s page 15
67 001e 18BF it ne
@@ -898,7 +898,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
121 008c 0122 movne r2, #1
122 008e 53EA0204 orrs r4, r3, r2
123 0092 5AD0 beq .L26
- ARM GAS /tmp/cccCOnvd.s page 16
+ ARM GAS /tmp/cctleUbk.s page 16
124 .loc 1 213 34 discriminator 21 view .LVU24
@@ -958,7 +958,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
224:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /* Reset DMAx_Streamy memory address register */
225:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** LL_DMA_WriteReg(tmp, M0AR, 0U);
226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
- ARM GAS /tmp/cccCOnvd.s page 17
+ ARM GAS /tmp/cctleUbk.s page 17
227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /* Reset DMAx_Streamy memory address register */
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
282:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** return status;
163 .loc 1 282 3 is_stmt 1 view .LVU34
- ARM GAS /tmp/cccCOnvd.s page 18
+ ARM GAS /tmp/cctleUbk.s page 18
283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** }
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver
47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
- ARM GAS /tmp/cccCOnvd.s page 19
+ ARM GAS /tmp/cctleUbk.s page 19
48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN
103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN
104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM2 RCC_AHB1LPENR_SRAM2LPEN
- ARM GAS /tmp/cccCOnvd.s page 20
+ ARM GAS /tmp/cctleUbk.s page 20
105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN
160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN
161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPDIFRX)
- ARM GAS /tmp/cccCOnvd.s page 21
+ ARM GAS /tmp/cctleUbk.s page 21
162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPDIFRX RCC_APB1ENR_SPDIFRXEN
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN
217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6)
218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI6 RCC_APB2ENR_SPI6EN
- ARM GAS /tmp/cccCOnvd.s page 22
+ ARM GAS /tmp/cctleUbk.s page 22
219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* SPI6 */
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n
274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n
275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACEN LL_AHB1_GRP1_EnableClock\n
- ARM GAS /tmp/cccCOnvd.s page 23
+ ARM GAS /tmp/cctleUbk.s page 23
276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR ETHMACTXEN LL_AHB1_GRP1_EnableClock\n
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n
331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_IsEnabledClock\n
- ARM GAS /tmp/cccCOnvd.s page 24
+ ARM GAS /tmp/cctleUbk.s page 24
333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_IsEnabledClock\n
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n
388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n
389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_DisableClock\n
- ARM GAS /tmp/cccCOnvd.s page 25
+ ARM GAS /tmp/cctleUbk.s page 25
390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR BKPSRAMEN LL_AHB1_GRP1_DisableClock\n
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n
445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n
446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ForceReset\n
- ARM GAS /tmp/cccCOnvd.s page 26
+ ARM GAS /tmp/cctleUbk.s page 26
447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR CRCRST LL_AHB1_GRP1_ForceReset\n
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIODRST LL_AHB1_GRP1_ReleaseReset\n
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOERST LL_AHB1_GRP1_ReleaseReset\n
488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOFRST LL_AHB1_GRP1_ReleaseReset\n
- ARM GAS /tmp/cccCOnvd.s page 27
+ ARM GAS /tmp/cctleUbk.s page 27
489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
201 .loc 3 526 1 view .LVU45
202 00de 7047 bx lr
203 .LVL8:
- ARM GAS /tmp/cccCOnvd.s page 28
+ ARM GAS /tmp/cctleUbk.s page 28
204 .L37:
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
249 .LBE42:
250 .LBE43:
213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
- ARM GAS /tmp/cccCOnvd.s page 29
+ ARM GAS /tmp/cctleUbk.s page 29
251 .loc 1 213 11 discriminator 2 view .LVU58
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n
547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MINC LL_DMA_ConfigTransfer\n
- ARM GAS /tmp/cccCOnvd.s page 30
+ ARM GAS /tmp/cctleUbk.s page 30
548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory).
- ARM GAS /tmp/cccCOnvd.s page 31
+ ARM GAS /tmp/cctleUbk.s page 31
605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
- ARM GAS /tmp/cccCOnvd.s page 32
+ ARM GAS /tmp/cctleUbk.s page 32
662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))-
718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
- ARM GAS /tmp/cccCOnvd.s page 33
+ ARM GAS /tmp/cctleUbk.s page 33
719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4
775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
- ARM GAS /tmp/cccCOnvd.s page 34
+ ARM GAS /tmp/cctleUbk.s page 34
776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size)
832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
- ARM GAS /tmp/cccCOnvd.s page 35
+ ARM GAS /tmp/cctleUbk.s page 35
833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
- ARM GAS /tmp/cccCOnvd.s page 36
+ ARM GAS /tmp/cctleUbk.s page 36
890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM
945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH
946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH
- ARM GAS /tmp/cccCOnvd.s page 37
+ ARM GAS /tmp/cctleUbk.s page 37
947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance
1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
- ARM GAS /tmp/cccCOnvd.s page 38
+ ARM GAS /tmp/cctleUbk.s page 38
1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
295 0123 37 .byte (.L9-.L7)/2
296 0124 3C .byte (.L8-.L7)/2
297 0125 41 .byte (.L6-.L7)/2
- ARM GAS /tmp/cccCOnvd.s page 39
+ ARM GAS /tmp/cctleUbk.s page 39
298 .LVL17:
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
341 .loc 1 213 34 discriminator 24 view .LVU81
342 014e 264B ldr r3, .L38+56
343 0150 D3E7 b .L5
- ARM GAS /tmp/cccCOnvd.s page 40
+ ARM GAS /tmp/cctleUbk.s page 40
344 .L28:
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
385 0174 8360 str r3, [r0, #8]
179:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
386 .loc 1 179 15 view .LVU96
- ARM GAS /tmp/cccCOnvd.s page 41
+ ARM GAS /tmp/cctleUbk.s page 41
387 0176 0020 movs r0, #0
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
269:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** }
427 .loc 1 269 20 is_stmt 0 view .LVU111
428 0196 4FF47C13 mov r3, #4128768
- ARM GAS /tmp/cccCOnvd.s page 42
+ ARM GAS /tmp/cctleUbk.s page 42
429 019a C360 str r3, [r0, #12]
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
477 .LBE47:
478 .cfi_endproc
479 .LFE320:
- ARM GAS /tmp/cccCOnvd.s page 43
+ ARM GAS /tmp/cctleUbk.s page 43
481 .section .text.LL_DMA_Init,"ax",%progbits
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** assert_param(IS_LL_DMA_MEMORYINCMODE(DMA_InitStruct->MemoryOrM2MDstIncMode));
506 .loc 1 314 3 view .LVU126
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** assert_param(IS_LL_DMA_PERIPHDATASIZE(DMA_InitStruct->PeriphOrM2MSrcDataSize));
- ARM GAS /tmp/cccCOnvd.s page 44
+ ARM GAS /tmp/cctleUbk.s page 44
507 .loc 1 315 3 view .LVU127
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
529 000c 5469 ldr r4, [r2, #20]
344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** DMA_InitStruct->PeriphOrM2MSrcIncMode | \
530 .loc 1 344 65 view .LVU144
- ARM GAS /tmp/cccCOnvd.s page 45
+ ARM GAS /tmp/cctleUbk.s page 45
531 000e 2343 orrs r3, r3, r4
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
352:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** {
353:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /*---------------------------- DMAx SxFCR Configuration ------------------------
354:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * Configure DMAx_Streamy: fifo mode and fifo threshold with parameters :
- ARM GAS /tmp/cccCOnvd.s page 46
+ ARM GAS /tmp/cctleUbk.s page 46
355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** * - FIFOMode: DMA_SxFCR_DMDIS bit
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
- ARM GAS /tmp/cccCOnvd.s page 47
+ ARM GAS /tmp/cctleUbk.s page 47
1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Pburst This parameter can be one of the following values:
1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_SINGLE
1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC4
- ARM GAS /tmp/cccCOnvd.s page 48
+ ARM GAS /tmp/cctleUbk.s page 48
1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PBURST_INC8
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h ****
1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /**
- ARM GAS /tmp/cccCOnvd.s page 49
+ ARM GAS /tmp/cctleUbk.s page 49
1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0.
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None
1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_DisableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream)
- ARM GAS /tmp/cccCOnvd.s page 50
+ ARM GAS /tmp/cctleUbk.s page 50
1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values:
1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0
1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1
- ARM GAS /tmp/cccCOnvd.s page 51
+ ARM GAS /tmp/cctleUbk.s page 51
1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_3_4
1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */
- ARM GAS /tmp/cccCOnvd.s page 52
+ ARM GAS /tmp/cctleUbk.s page 52
1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream)
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
592 .LVL44:
593 .LBB52:
594 .LBI52:
- ARM GAS /tmp/cccCOnvd.s page 53
+ ARM GAS /tmp/cctleUbk.s page 53
1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** {
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
628 005c 5368 ldr r3, [r2, #4]
629 .LVL50:
630 .LBB56:
- ARM GAS /tmp/cccCOnvd.s page 54
+ ARM GAS /tmp/cctleUbk.s page 54
631 .LBI56:
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5
1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6
1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7
- ARM GAS /tmp/cccCOnvd.s page 55
+ ARM GAS /tmp/cctleUbk.s page 55
1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
651 .LBE59:
652 .LBE58:
384:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c ****
- ARM GAS /tmp/cccCOnvd.s page 56
+ ARM GAS /tmp/cctleUbk.s page 56
385:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** /*--------------------------- DMAx SxNDTR Configuration -------------------------
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
688 .LVL60:
1034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** }
689 .loc 2 1034 3 view .LVU192
- ARM GAS /tmp/cccCOnvd.s page 57
+ ARM GAS /tmp/cctleUbk.s page 57
690 .LBE63:
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/cccCOnvd.s page 1
731 0006 8360 str r3, [r0, #8]
411:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_dma.c **** DMA_InitStruct->Mode = LL_DMA_MODE_NORMAL;
732 .loc 1 411 3 is_stmt 1 view .LVU203
- ARM GAS /tmp/cccCOnvd.s page 58
+ ARM GAS /tmp/cctleUbk.s page 58
733 .loc 1 411 42 is_stmt 0 view .LVU204
@@ -3478,29 +3478,29 @@ ARM GAS /tmp/cccCOnvd.s page 1
778 0000 10284058 .ascii "\020(@Xp\210\240\270"
778 7088A0B8
779 .text
- ARM GAS /tmp/cccCOnvd.s page 59
+ ARM GAS /tmp/cctleUbk.s page 59
780 .Letext0:
781 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
782 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
783 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/cccCOnvd.s page 60
+ ARM GAS /tmp/cctleUbk.s page 60
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_dma.c
- /tmp/cccCOnvd.s:20 .text.LL_DMA_DeInit:00000000 $t
- /tmp/cccCOnvd.s:26 .text.LL_DMA_DeInit:00000000 LL_DMA_DeInit
- /tmp/cccCOnvd.s:290 .text.LL_DMA_DeInit:0000011e $d
- /tmp/cccCOnvd.s:299 .text.LL_DMA_DeInit:00000126 $t
- /tmp/cccCOnvd.s:458 .text.LL_DMA_DeInit:000001b0 $d
- /tmp/cccCOnvd.s:777 .rodata.STREAM_OFFSET_TAB:00000000 STREAM_OFFSET_TAB
- /tmp/cccCOnvd.s:482 .text.LL_DMA_Init:00000000 $t
- /tmp/cccCOnvd.s:488 .text.LL_DMA_Init:00000000 LL_DMA_Init
- /tmp/cccCOnvd.s:701 .text.LL_DMA_Init:00000090 $d
- /tmp/cccCOnvd.s:708 .text.LL_DMA_StructInit:00000000 $t
- /tmp/cccCOnvd.s:714 .text.LL_DMA_StructInit:00000000 LL_DMA_StructInit
- /tmp/cccCOnvd.s:774 .rodata.STREAM_OFFSET_TAB:00000000 $d
+ /tmp/cctleUbk.s:20 .text.LL_DMA_DeInit:00000000 $t
+ /tmp/cctleUbk.s:26 .text.LL_DMA_DeInit:00000000 LL_DMA_DeInit
+ /tmp/cctleUbk.s:290 .text.LL_DMA_DeInit:0000011e $d
+ /tmp/cctleUbk.s:299 .text.LL_DMA_DeInit:00000126 $t
+ /tmp/cctleUbk.s:458 .text.LL_DMA_DeInit:000001b0 $d
+ /tmp/cctleUbk.s:777 .rodata.STREAM_OFFSET_TAB:00000000 STREAM_OFFSET_TAB
+ /tmp/cctleUbk.s:482 .text.LL_DMA_Init:00000000 $t
+ /tmp/cctleUbk.s:488 .text.LL_DMA_Init:00000000 LL_DMA_Init
+ /tmp/cctleUbk.s:701 .text.LL_DMA_Init:00000090 $d
+ /tmp/cctleUbk.s:708 .text.LL_DMA_StructInit:00000000 $t
+ /tmp/cctleUbk.s:714 .text.LL_DMA_StructInit:00000000 LL_DMA_StructInit
+ /tmp/cctleUbk.s:774 .rodata.STREAM_OFFSET_TAB:00000000 $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_ll_exti.lst b/build/stm32f7xx_ll_exti.lst
index 2961815..eb5edc6 100644
--- a/build/stm32f7xx_ll_exti.lst
+++ b/build/stm32f7xx_ll_exti.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccVndrET.s page 1
+ARM GAS /tmp/ccg0VO2D.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccVndrET.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** * @{
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** */
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c ****
- ARM GAS /tmp/ccVndrET.s page 2
+ ARM GAS /tmp/ccg0VO2D.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** #if defined (EXTI)
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccVndrET.s page 1
81:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** /* Interrupt mask register set to default reset values */
82:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** LL_EXTI_WriteReg(IMR, 0x00000000U);
33 .loc 1 82 3 view .LVU1
- ARM GAS /tmp/ccVndrET.s page 3
+ ARM GAS /tmp/ccg0VO2D.s page 3
34 0000 054B ldr r3, .L2
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccVndrET.s page 1
105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** {
68 .loc 1 105 1 is_stmt 1 view -0
69 .cfi_startproc
- ARM GAS /tmp/ccVndrET.s page 4
+ ARM GAS /tmp/ccg0VO2D.s page 4
70 @ args = 0, pretend = 0, frame = 0
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccVndrET.s page 1
122:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** case LL_EXTI_MODE_IT:
123:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** /* First Disable Event on provided Lines */
124:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** LL_EXTI_DisableEvent_0_31(EXTI_InitStruct->Line_0_31);
- ARM GAS /tmp/ccVndrET.s page 5
+ ARM GAS /tmp/ccg0VO2D.s page 5
108 .loc 1 124 11 is_stmt 1 view .LVU25
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccVndrET.s page 1
50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** */
51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #endif /*USE_FULL_LL_DRIVER*/
52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /* Exported types ------------------------------------------------------------*/
- ARM GAS /tmp/ccVndrET.s page 6
+ ARM GAS /tmp/ccg0VO2D.s page 6
53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #if defined(USE_FULL_LL_DRIVER)
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccVndrET.s page 1
107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #define LL_EXTI_LINE_18 EXTI_IMR_IM18 /*!< Extended line 18 */
108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #endif
109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #define LL_EXTI_LINE_19 EXTI_IMR_IM19 /*!< Extended line 19 */
- ARM GAS /tmp/ccVndrET.s page 7
+ ARM GAS /tmp/ccg0VO2D.s page 7
110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** #if defined(EXTI_IMR_IM20)
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccVndrET.s page 1
164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /**
165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @}
166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** */
- ARM GAS /tmp/ccVndrET.s page 8
+ ARM GAS /tmp/ccg0VO2D.s page 8
167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccVndrET.s page 1
221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /* Exported functions --------------------------------------------------------*/
223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
- ARM GAS /tmp/ccVndrET.s page 9
+ ARM GAS /tmp/ccg0VO2D.s page 9
224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @{
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccVndrET.s page 1
278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @param ExtiLine This parameter can be one of the following values:
279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_0
280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_1
- ARM GAS /tmp/ccVndrET.s page 10
+ ARM GAS /tmp/ccg0VO2D.s page 10
281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_2
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccVndrET.s page 1
335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_13
336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_14
337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_15
- ARM GAS /tmp/ccVndrET.s page 11
+ ARM GAS /tmp/ccg0VO2D.s page 11
338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_16
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccVndrET.s page 1
392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_22
393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_23
394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_24(*)
- ARM GAS /tmp/ccVndrET.s page 12
+ ARM GAS /tmp/ccg0VO2D.s page 12
395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_ALL_0_31
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccVndrET.s page 1
118 0022 24EA0202 bic r2, r4, r2
119 .LVL4:
120 .loc 2 443 3 is_stmt 0 view .LVU28
- ARM GAS /tmp/ccVndrET.s page 13
+ ARM GAS /tmp/ccg0VO2D.s page 13
121 0026 4A60 str r2, [r1, #4]
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccVndrET.s page 1
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** switch (EXTI_InitStruct->Trigger)
151 .loc 1 145 9 is_stmt 1 view .LVU39
152 0036 022A cmp r2, #2
- ARM GAS /tmp/ccVndrET.s page 14
+ ARM GAS /tmp/ccg0VO2D.s page 14
153 0038 25D0 beq .L10
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccVndrET.s page 1
484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** }
486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
- ARM GAS /tmp/ccVndrET.s page 15
+ ARM GAS /tmp/ccg0VO2D.s page 15
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccVndrET.s page 1
541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @note The configurable wakeup lines are edge-triggered. No glitch must be
542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * generated on these lines. If a rising edge on a configurable interrupt
543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * line occurs during a write operation in the EXTI_RTSR register, the
- ARM GAS /tmp/ccVndrET.s page 16
+ ARM GAS /tmp/ccg0VO2D.s page 16
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * pending bit is not set.
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccVndrET.s page 1
598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_12
599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_13
600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_14
- ARM GAS /tmp/ccVndrET.s page 17
+ ARM GAS /tmp/ccg0VO2D.s page 17
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_15
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccVndrET.s page 1
655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_20
656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_21
657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @arg @ref LL_EXTI_LINE_22
- ARM GAS /tmp/ccVndrET.s page 18
+ ARM GAS /tmp/ccg0VO2D.s page 18
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** * @note Please check each device line mapping for EXTI Line availability
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccVndrET.s page 1
170 .LVL10:
171 .loc 2 704 3 is_stmt 0 view .LVU43
172 .LBE35:
- ARM GAS /tmp/ccVndrET.s page 19
+ ARM GAS /tmp/ccg0VO2D.s page 19
173 .LBE34:
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccVndrET.s page 1
311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** }
214 .loc 2 311 3 view .LVU56
215 .LBE41:
- ARM GAS /tmp/ccVndrET.s page 20
+ ARM GAS /tmp/ccg0VO2D.s page 20
216 .LBE40:
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccVndrET.s page 1
257 0074 0A60 str r2, [r1]
258 .LVL22:
269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** }
- ARM GAS /tmp/ccVndrET.s page 21
+ ARM GAS /tmp/ccg0VO2D.s page 21
259 .loc 2 269 3 view .LVU70
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccVndrET.s page 1
575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** {
300 .loc 2 575 22 view .LVU82
301 .LBB53:
- ARM GAS /tmp/ccVndrET.s page 22
+ ARM GAS /tmp/ccg0VO2D.s page 22
577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccVndrET.s page 1
532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h **** {
343 .loc 2 532 22 view .LVU94
344 .LBB59:
- ARM GAS /tmp/ccVndrET.s page 23
+ ARM GAS /tmp/ccg0VO2D.s page 23
534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_exti.h ****
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccVndrET.s page 1
168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** }
169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** }
170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** /* DISABLE LineCommand */
- ARM GAS /tmp/ccVndrET.s page 24
+ ARM GAS /tmp/ccg0VO2D.s page 24
171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** else
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccVndrET.s page 1
422 .cfi_def_cfa_offset 0
423 00ca 7047 bx lr
424 .LVL44:
- ARM GAS /tmp/ccVndrET.s page 25
+ ARM GAS /tmp/ccg0VO2D.s page 25
425 .L12:
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccVndrET.s page 1
467 .loc 1 189 3 is_stmt 1 view .LVU125
468 .loc 1 189 35 is_stmt 0 view .LVU126
469 0006 4371 strb r3, [r0, #5]
- ARM GAS /tmp/ccVndrET.s page 26
+ ARM GAS /tmp/ccg0VO2D.s page 26
190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_exti.c **** EXTI_InitStruct->Trigger = LL_EXTI_TRIGGER_FALLING;
@@ -1516,18 +1516,18 @@ ARM GAS /tmp/ccVndrET.s page 1
481 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
482 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
483 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/ccVndrET.s page 27
+ ARM GAS /tmp/ccg0VO2D.s page 27
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_exti.c
- /tmp/ccVndrET.s:20 .text.LL_EXTI_DeInit:00000000 $t
- /tmp/ccVndrET.s:26 .text.LL_EXTI_DeInit:00000000 LL_EXTI_DeInit
- /tmp/ccVndrET.s:54 .text.LL_EXTI_DeInit:00000018 $d
- /tmp/ccVndrET.s:59 .text.LL_EXTI_Init:00000000 $t
- /tmp/ccVndrET.s:65 .text.LL_EXTI_Init:00000000 LL_EXTI_Init
- /tmp/ccVndrET.s:441 .text.LL_EXTI_Init:000000d4 $d
- /tmp/ccVndrET.s:446 .text.LL_EXTI_StructInit:00000000 $t
- /tmp/ccVndrET.s:452 .text.LL_EXTI_StructInit:00000000 LL_EXTI_StructInit
+ /tmp/ccg0VO2D.s:20 .text.LL_EXTI_DeInit:00000000 $t
+ /tmp/ccg0VO2D.s:26 .text.LL_EXTI_DeInit:00000000 LL_EXTI_DeInit
+ /tmp/ccg0VO2D.s:54 .text.LL_EXTI_DeInit:00000018 $d
+ /tmp/ccg0VO2D.s:59 .text.LL_EXTI_Init:00000000 $t
+ /tmp/ccg0VO2D.s:65 .text.LL_EXTI_Init:00000000 LL_EXTI_Init
+ /tmp/ccg0VO2D.s:441 .text.LL_EXTI_Init:000000d4 $d
+ /tmp/ccg0VO2D.s:446 .text.LL_EXTI_StructInit:00000000 $t
+ /tmp/ccg0VO2D.s:452 .text.LL_EXTI_StructInit:00000000 LL_EXTI_StructInit
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_ll_gpio.lst b/build/stm32f7xx_ll_gpio.lst
index 9cb7c0f..3a2db9c 100644
--- a/build/stm32f7xx_ll_gpio.lst
+++ b/build/stm32f7xx_ll_gpio.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccBN2W7T.s page 1
+ARM GAS /tmp/ccGKu99F.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** #include "stm32f7xx.h"
29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /** @addtogroup STM32F7xx_LL_Driver
- ARM GAS /tmp/ccBN2W7T.s page 2
+ ARM GAS /tmp/ccGKu99F.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @{
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** GPIO HW configuration can be modified afterwards using unitary functi
87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
- ARM GAS /tmp/ccBN2W7T.s page 3
+ ARM GAS /tmp/ccGKu99F.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** uint32_t Alternate; /*!< Specifies the Peripheral to be connected to the selected pins.
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** */
143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /** @defgroup GPIO_LL_EC_OUTPUT Output Type
- ARM GAS /tmp/ccBN2W7T.s page 4
+ ARM GAS /tmp/ccGKu99F.s page 4
145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @{
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** */
200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /* Exported macro ------------------------------------------------------------*/
- ARM GAS /tmp/ccBN2W7T.s page 5
+ ARM GAS /tmp/ccGKu99F.s page 5
202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /** @defgroup GPIO_LL_Exported_Macros GPIO Exported Macros
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_6
257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_7
258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_8
- ARM GAS /tmp/ccBN2W7T.s page 6
+ ARM GAS /tmp/ccGKu99F.s page 6
259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_9
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /**
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @brief Configure gpio output type for several pins on dedicated port.
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @note Output type as to be set when gpio pin is in output or
- ARM GAS /tmp/ccBN2W7T.s page 7
+ ARM GAS /tmp/ccGKu99F.s page 7
316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * alternate modes. Possible type are Push-pull or Open-drain.
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_15
371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_ALL
372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccBN2W7T.s page 8
+ ARM GAS /tmp/ccGKu99F.s page 8
373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_OUTPUT_PUSHPULL
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
40 .LVL1:
41 .LBB76:
42 .LBI76:
- ARM GAS /tmp/ccBN2W7T.s page 9
+ ARM GAS /tmp/ccGKu99F.s page 9
43 .file 3 "Drivers/CMSIS/Include/cmsis_gcc.h"
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED
56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used))
- ARM GAS /tmp/ccBN2W7T.s page 10
+ ARM GAS /tmp/ccGKu99F.s page 10
57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x)))
112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT
- ARM GAS /tmp/ccBN2W7T.s page 11
+ ARM GAS /tmp/ccGKu99F.s page 11
114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
169:Drivers/CMSIS/Include/cmsis_gcc.h ****
170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
- ARM GAS /tmp/ccBN2W7T.s page 12
+ ARM GAS /tmp/ccGKu99F.s page 12
171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result);
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
225:Drivers/CMSIS/Include/cmsis_gcc.h **** }
226:Drivers/CMSIS/Include/cmsis_gcc.h ****
227:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccBN2W7T.s page 13
+ ARM GAS /tmp/ccGKu99F.s page 13
228:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
282:Drivers/CMSIS/Include/cmsis_gcc.h ****
283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
284:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
- ARM GAS /tmp/ccBN2W7T.s page 14
+ ARM GAS /tmp/ccGKu99F.s page 14
285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure)
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure)
340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set
- ARM GAS /tmp/ccBN2W7T.s page 15
+ ARM GAS /tmp/ccGKu99F.s page 15
342:Drivers/CMSIS/Include/cmsis_gcc.h **** */
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
396:Drivers/CMSIS/Include/cmsis_gcc.h **** */
397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
398:Drivers/CMSIS/Include/cmsis_gcc.h **** {
- ARM GAS /tmp/ccBN2W7T.s page 16
+ ARM GAS /tmp/ccGKu99F.s page 16
399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result;
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
453:Drivers/CMSIS/Include/cmsis_gcc.h **** }
454:Drivers/CMSIS/Include/cmsis_gcc.h ****
455:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccBN2W7T.s page 17
+ ARM GAS /tmp/ccGKu99F.s page 17
456:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
510:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition
512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable
- ARM GAS /tmp/ccBN2W7T.s page 18
+ ARM GAS /tmp/ccGKu99F.s page 18
513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level.
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set
568:Drivers/CMSIS/Include/cmsis_gcc.h **** */
569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
- ARM GAS /tmp/ccBN2W7T.s page 19
+ ARM GAS /tmp/ccGKu99F.s page 19
570:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
624:Drivers/CMSIS/Include/cmsis_gcc.h **** }
625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
626:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccBN2W7T.s page 20
+ ARM GAS /tmp/ccGKu99F.s page 20
627:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI
- ARM GAS /tmp/ccBN2W7T.s page 21
+ ARM GAS /tmp/ccGKu99F.s page 21
684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U;
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
738:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure)
740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
- ARM GAS /tmp/ccBN2W7T.s page 22
+ ARM GAS /tmp/ccGKu99F.s page 22
741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored.
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr)
797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed
- ARM GAS /tmp/ccBN2W7T.s page 23
+ ARM GAS /tmp/ccGKu99F.s page 23
798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
852:Drivers/CMSIS/Include/cmsis_gcc.h ****
853:Drivers/CMSIS/Include/cmsis_gcc.h **** /**
854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event
- ARM GAS /tmp/ccBN2W7T.s page 24
+ ARM GAS /tmp/ccGKu99F.s page 24
855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif
910:Drivers/CMSIS/Include/cmsis_gcc.h **** }
911:Drivers/CMSIS/Include/cmsis_gcc.h ****
- ARM GAS /tmp/ccBN2W7T.s page 25
+ ARM GAS /tmp/ccGKu99F.s page 25
912:Drivers/CMSIS/Include/cmsis_gcc.h ****
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint
967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state.
968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula
- ARM GAS /tmp/ccBN2W7T.s page 26
+ ARM GAS /tmp/ccGKu99F.s page 26
969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor.
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
65 .LVL3:
66 .LBB78:
67 .LBI78:
- ARM GAS /tmp/ccBN2W7T.s page 27
+ ARM GAS /tmp/ccGKu99F.s page 27
981:Drivers/CMSIS/Include/cmsis_gcc.h **** {
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_4
433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_5
434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_6
- ARM GAS /tmp/ccBN2W7T.s page 28
+ ARM GAS /tmp/ccGKu99F.s page 28
435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_PIN_7
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
108 @ frame_needed = 0, uses_anonymous_args = 0
109 .loc 2 485 1 is_stmt 0 view .LVU18
110 0000 00B5 push {lr}
- ARM GAS /tmp/ccBN2W7T.s page 29
+ ARM GAS /tmp/ccGKu99F.s page 29
111 .LCFI1:
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
158 .loc 2 486 3 discriminator 4 view .LVU31
159 0020 B1FA81F1 clz r1, r1
160 0024 4900 lsls r1, r1, #1
- ARM GAS /tmp/ccBN2W7T.s page 30
+ ARM GAS /tmp/ccGKu99F.s page 30
161 0026 8A40 lsls r2, r2, r1
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @note Possible values are from AF0 to AF15 depending on target.
525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @note Warning: only one pin can be passed as parameter.
526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @rmtoll AFRL AFSELy LL_GPIO_SetAFPin_0_7
- ARM GAS /tmp/ccBN2W7T.s page 31
+ ARM GAS /tmp/ccGKu99F.s page 31
527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @param GPIOx GPIO Port
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
199 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
200 0004 91FAA1FC rbit ip, r1
201 @ 0 "" 2
- ARM GAS /tmp/ccBN2W7T.s page 32
+ ARM GAS /tmp/ccGKu99F.s page 32
202 .LVL14:
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
253 .LVL18:
254 .LFB151:
561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h ****
- ARM GAS /tmp/ccBN2W7T.s page 33
+ ARM GAS /tmp/ccGKu99F.s page 33
562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** /**
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_1
617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_2
618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_3
- ARM GAS /tmp/ccBN2W7T.s page 34
+ ARM GAS /tmp/ccGKu99F.s page 34
619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** * @arg @ref LL_GPIO_AF_4
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
289 0016 0EFA0CFC lsl ip, lr, ip
290 001a 23EA0C03 bic r3, r3, ip
291 .LVL21:
- ARM GAS /tmp/ccBN2W7T.s page 35
+ ARM GAS /tmp/ccGKu99F.s page 35
292 .LBB90:
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
340 .loc 2 275 3 is_stmt 1 view .LVU70
341 0002 0368 ldr r3, [r0]
342 .LVL25:
- ARM GAS /tmp/ccBN2W7T.s page 36
+ ARM GAS /tmp/ccGKu99F.s page 36
343 .LBB92:
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h **** }
389 .loc 2 275 3 discriminator 4 view .LVU83
390 0028 1343 orrs r3, r3, r2
- ARM GAS /tmp/ccBN2W7T.s page 37
+ ARM GAS /tmp/ccGKu99F.s page 37
391 002a 0360 str r3, [r0]
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
40:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private variables ---------------------------------------------------------*/
41:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private constants ---------------------------------------------------------*/
42:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /* Private macros ------------------------------------------------------------*/
- ARM GAS /tmp/ccBN2W7T.s page 38
+ ARM GAS /tmp/ccGKu99F.s page 38
43:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** /** @addtogroup GPIO_LL_Private_Macros
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
97:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @brief De-initialize GPIO registers (Registers restored to their default values).
98:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @param GPIOx GPIO Port
99:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * @retval An ErrorStatus enumeration value:
- ARM GAS /tmp/ccBN2W7T.s page 39
+ ARM GAS /tmp/ccGKu99F.s page 39
100:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** * - SUCCESS: GPIO registers are de-initialized
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
433 0016 3AD0 beq .L27
128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** {
129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD);
- ARM GAS /tmp/ccBN2W7T.s page 40
+ ARM GAS /tmp/ccGKu99F.s page 40
130:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD);
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
455 .loc 1 162 11 is_stmt 0 view .LVU105
456 0030 4F4B ldr r3, .L35+32
457 0032 9842 cmp r0, r3
- ARM GAS /tmp/ccBN2W7T.s page 41
+ ARM GAS /tmp/ccGKu99F.s page 41
458 0034 67D0 beq .L32
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Header file of BUS LL module.
6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @verbatim
- ARM GAS /tmp/ccBN2W7T.s page 42
+ ARM GAS /tmp/ccGKu99F.s page 42
8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ##### RCC Limitations #####
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants
63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{
64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- ARM GAS /tmp/ccBN2W7T.s page 43
+ ARM GAS /tmp/ccGKu99F.s page 43
65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CRYP)
120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB2_GRP1_PERIPH_CRYP RCC_AHB2ENR_CRYPEN
121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CRYP */
- ARM GAS /tmp/ccBN2W7T.s page 44
+ ARM GAS /tmp/ccGKu99F.s page 44
122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(AES)
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN
177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CAN2 */
178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CAN3)
- ARM GAS /tmp/ccBN2W7T.s page 45
+ ARM GAS /tmp/ccGKu99F.s page 45
179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN3 RCC_APB1ENR_CAN3EN
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* MDIOS */
234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(USB_HS_PHYC)
235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_OTGPHYC RCC_APB2ENR_OTGPHYCEN
- ARM GAS /tmp/ccBN2W7T.s page 46
+ ARM GAS /tmp/ccGKu99F.s page 46
236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* USB_HS_PHYC */
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*)
- ARM GAS /tmp/ccBN2W7T.s page 47
+ ARM GAS /tmp/ccGKu99F.s page 47
293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
- ARM GAS /tmp/ccBN2W7T.s page 48
+ ARM GAS /tmp/ccGKu99F.s page 48
350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
- ARM GAS /tmp/ccBN2W7T.s page 49
+ ARM GAS /tmp/ccGKu99F.s page 49
407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOF
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOG
462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOH
463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI
- ARM GAS /tmp/ccBN2W7T.s page 50
+ ARM GAS /tmp/ccGKu99F.s page 50
464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*)
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOC
505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOD
- ARM GAS /tmp/ccBN2W7T.s page 51
+ ARM GAS /tmp/ccGKu99F.s page 51
506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOE
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
524 0062 1A69 ldr r2, [r3, #16]
525 0064 42F00202 orr r2, r2, #2
526 0068 1A61 str r2, [r3, #16]
- ARM GAS /tmp/ccBN2W7T.s page 52
+ ARM GAS /tmp/ccGKu99F.s page 52
527 .LVL37:
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
570 .loc 1 124 5 is_stmt 1 view .LVU139
571 .LBB110:
572 .LBI110:
- ARM GAS /tmp/ccBN2W7T.s page 53
+ ARM GAS /tmp/ccGKu99F.s page 53
523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
616 009c 22F00802 bic r2, r2, #8
617 00a0 1A61 str r2, [r3, #16]
618 .LVL46:
- ARM GAS /tmp/ccBN2W7T.s page 54
+ ARM GAS /tmp/ccGKu99F.s page 54
525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
662 00ba 0020 movs r0, #0
663 .LVL51:
664 .LBB125:
- ARM GAS /tmp/ccBN2W7T.s page 55
+ ARM GAS /tmp/ccGKu99F.s page 55
665 .LBB124:
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
710 .LBE130:
711 .LBE131:
150:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOG);
- ARM GAS /tmp/ccBN2W7T.s page 56
+ ARM GAS /tmp/ccGKu99F.s page 56
712 .loc 1 150 5 is_stmt 1 view .LVU179
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
756 .loc 4 478 3 view .LVU192
757 00ee 03F5E053 add r3, r3, #7168
- ARM GAS /tmp/ccBN2W7T.s page 57
+ ARM GAS /tmp/ccGKu99F.s page 57
758 00f2 1A69 ldr r2, [r3, #16]
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
802 .LBE145:
803 .LBE144:
165:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** }
- ARM GAS /tmp/ccBN2W7T.s page 58
+ ARM GAS /tmp/ccGKu99F.s page 58
804 .loc 1 165 5 is_stmt 1 view .LVU205
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
848 .loc 4 525 3 view .LVU218
849 012a 1A69 ldr r2, [r3, #16]
- ARM GAS /tmp/ccBN2W7T.s page 59
+ ARM GAS /tmp/ccGKu99F.s page 59
850 012c 22F40072 bic r2, r2, #512
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
894 .LBE158:
105:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c ****
895 .loc 1 105 15 view .LVU231
- ARM GAS /tmp/ccBN2W7T.s page 60
+ ARM GAS /tmp/ccGKu99F.s page 60
896 014a 0020 movs r0, #0
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
940 .cfi_offset 4, -20
941 .cfi_offset 5, -16
942 .cfi_offset 6, -12
- ARM GAS /tmp/ccBN2W7T.s page 61
+ ARM GAS /tmp/ccGKu99F.s page 61
943 .cfi_offset 7, -8
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
979 .loc 1 215 9 is_stmt 0 view .LVU250
980 0010 19E0 b .L38
981 .LVL81:
- ARM GAS /tmp/ccBN2W7T.s page 62
+ ARM GAS /tmp/ccGKu99F.s page 62
982 .L46:
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
1012 .LBE165:
1013 .LBE164:
235:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c **** }
- ARM GAS /tmp/ccBN2W7T.s page 63
+ ARM GAS /tmp/ccGKu99F.s page 63
236:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_gpio.c ****
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
1040 .loc 1 218 56 is_stmt 0 view .LVU268
1041 004e 0122 movs r2, #1
1042 0050 AA40 lsls r2, r2, r5
- ARM GAS /tmp/ccBN2W7T.s page 64
+ ARM GAS /tmp/ccGKu99F.s page 64
1043 .LVL89:
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
1081 @ 988 "Drivers/CMSIS/Include/cmsis_gcc.h" 1
1082 006e 94FAA4F3 rbit r3, r4
1083 @ 0 "" 2
- ARM GAS /tmp/ccBN2W7T.s page 65
+ ARM GAS /tmp/ccGKu99F.s page 65
1084 .LVL93:
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccBN2W7T.s page 1
1124 .cfi_startproc
1125 @ args = 0, pretend = 0, frame = 0
1126 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccBN2W7T.s page 66
+ ARM GAS /tmp/ccGKu99F.s page 66
1127 @ link register save eliminated.
@@ -3940,27 +3940,27 @@ ARM GAS /tmp/ccBN2W7T.s page 1
1156 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
1157 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
1158 .file 7 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/ccBN2W7T.s page 67
+ ARM GAS /tmp/ccGKu99F.s page 67
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_gpio.c
- /tmp/ccBN2W7T.s:20 .text.LL_GPIO_SetPinSpeed:00000000 $t
- /tmp/ccBN2W7T.s:25 .text.LL_GPIO_SetPinSpeed:00000000 LL_GPIO_SetPinSpeed
- /tmp/ccBN2W7T.s:97 .text.LL_GPIO_SetPinPull:00000000 $t
- /tmp/ccBN2W7T.s:102 .text.LL_GPIO_SetPinPull:00000000 LL_GPIO_SetPinPull
- /tmp/ccBN2W7T.s:172 .text.LL_GPIO_SetAFPin_0_7:00000000 $t
- /tmp/ccBN2W7T.s:177 .text.LL_GPIO_SetAFPin_0_7:00000000 LL_GPIO_SetAFPin_0_7
- /tmp/ccBN2W7T.s:247 .text.LL_GPIO_SetAFPin_8_15:00000000 $t
- /tmp/ccBN2W7T.s:252 .text.LL_GPIO_SetAFPin_8_15:00000000 LL_GPIO_SetAFPin_8_15
- /tmp/ccBN2W7T.s:323 .text.LL_GPIO_SetPinMode:00000000 $t
- /tmp/ccBN2W7T.s:328 .text.LL_GPIO_SetPinMode:00000000 LL_GPIO_SetPinMode
- /tmp/ccBN2W7T.s:398 .text.LL_GPIO_DeInit:00000000 $t
- /tmp/ccBN2W7T.s:404 .text.LL_GPIO_DeInit:00000000 LL_GPIO_DeInit
- /tmp/ccBN2W7T.s:905 .text.LL_GPIO_DeInit:00000150 $d
- /tmp/ccBN2W7T.s:922 .text.LL_GPIO_Init:00000000 $t
- /tmp/ccBN2W7T.s:928 .text.LL_GPIO_Init:00000000 LL_GPIO_Init
- /tmp/ccBN2W7T.s:1114 .text.LL_GPIO_StructInit:00000000 $t
- /tmp/ccBN2W7T.s:1120 .text.LL_GPIO_StructInit:00000000 LL_GPIO_StructInit
+ /tmp/ccGKu99F.s:20 .text.LL_GPIO_SetPinSpeed:00000000 $t
+ /tmp/ccGKu99F.s:25 .text.LL_GPIO_SetPinSpeed:00000000 LL_GPIO_SetPinSpeed
+ /tmp/ccGKu99F.s:97 .text.LL_GPIO_SetPinPull:00000000 $t
+ /tmp/ccGKu99F.s:102 .text.LL_GPIO_SetPinPull:00000000 LL_GPIO_SetPinPull
+ /tmp/ccGKu99F.s:172 .text.LL_GPIO_SetAFPin_0_7:00000000 $t
+ /tmp/ccGKu99F.s:177 .text.LL_GPIO_SetAFPin_0_7:00000000 LL_GPIO_SetAFPin_0_7
+ /tmp/ccGKu99F.s:247 .text.LL_GPIO_SetAFPin_8_15:00000000 $t
+ /tmp/ccGKu99F.s:252 .text.LL_GPIO_SetAFPin_8_15:00000000 LL_GPIO_SetAFPin_8_15
+ /tmp/ccGKu99F.s:323 .text.LL_GPIO_SetPinMode:00000000 $t
+ /tmp/ccGKu99F.s:328 .text.LL_GPIO_SetPinMode:00000000 LL_GPIO_SetPinMode
+ /tmp/ccGKu99F.s:398 .text.LL_GPIO_DeInit:00000000 $t
+ /tmp/ccGKu99F.s:404 .text.LL_GPIO_DeInit:00000000 LL_GPIO_DeInit
+ /tmp/ccGKu99F.s:905 .text.LL_GPIO_DeInit:00000150 $d
+ /tmp/ccGKu99F.s:922 .text.LL_GPIO_Init:00000000 $t
+ /tmp/ccGKu99F.s:928 .text.LL_GPIO_Init:00000000 LL_GPIO_Init
+ /tmp/ccGKu99F.s:1114 .text.LL_GPIO_StructInit:00000000 $t
+ /tmp/ccGKu99F.s:1120 .text.LL_GPIO_StructInit:00000000 LL_GPIO_StructInit
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_ll_rcc.lst b/build/stm32f7xx_ll_rcc.lst
index f479f61..eb73a78 100644
--- a/build/stm32f7xx_ll_rcc.lst
+++ b/build/stm32f7xx_ll_rcc.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cct9WEL1.s page 1
+ARM GAS /tmp/cct62l6h.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #if defined(RCC)
- ARM GAS /tmp/cct9WEL1.s page 2
+ ARM GAS /tmp/cct62l6h.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #define IS_LL_RCC_I2S_CLKSOURCE(__VALUE__) (((__VALUE__) == LL_RCC_I2S1_CLKSOURCE))
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
- ARM GAS /tmp/cct9WEL1.s page 3
+ ARM GAS /tmp/cct62l6h.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #if defined(CEC)
@@ -178,7 +178,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /** @addtogroup RCC_LL_EF_Init
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @{
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */
- ARM GAS /tmp/cct9WEL1.s page 4
+ ARM GAS /tmp/cct62l6h.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
@@ -238,7 +238,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
20:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __STM32F7xx_LL_RCC_H
21:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
22:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #ifdef __cplusplus
- ARM GAS /tmp/cct9WEL1.s page 5
+ ARM GAS /tmp/cct62l6h.s page 5
23:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** extern "C" {
@@ -298,7 +298,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
77:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t SYSCLK_Frequency; /*!< SYSCLK clock frequency */
78:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t HCLK_Frequency; /*!< HCLK clock frequency */
79:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t PCLK1_Frequency; /*!< PCLK1 clock frequency */
- ARM GAS /tmp/cct9WEL1.s page 6
+ ARM GAS /tmp/cct62l6h.s page 6
80:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** uint32_t PCLK2_Frequency; /*!< PCLK2 clock frequency */
@@ -358,7 +358,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CLEAR_FLAG Clear Flags Defines
135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Flags defines which can be used with LL_RCC_WriteReg function
136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
- ARM GAS /tmp/cct9WEL1.s page 7
+ ARM GAS /tmp/cct62l6h.s page 7
137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -418,7 +418,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
191:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_LOW 0x00000000U /*!< Xtal mode lower driving cap
192:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMHIGH RCC_BDCR_LSEDRV_0 /*!< Xtal mode medium high drivi
193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_MEDIUMLOW RCC_BDCR_LSEDRV_1 /*!< Xtal mode medium low drivin
- ARM GAS /tmp/cct9WEL1.s page 8
+ ARM GAS /tmp/cct62l6h.s page 8
194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_LSEDRIVE_HIGH RCC_BDCR_LSEDRV /*!< Xtal mode higher driving ca
@@ -478,7 +478,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
248:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
249:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_1 RCC_CFGR_PPRE2_DIV1 /*!< HCLK not divided */
250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_2 RCC_CFGR_PPRE2_DIV2 /*!< HCLK divided by 2 */
- ARM GAS /tmp/cct9WEL1.s page 9
+ ARM GAS /tmp/cct62l6h.s page 9
251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_APB2_DIV_4 RCC_CFGR_PPRE2_DIV4 /*!< HCLK divided by 4 */
@@ -538,7 +538,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
305:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_13 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_0)
306:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_14 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1)
307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_15 (RCC_CFGR_RTCPRE_3|RCC_CFGR_RTCPRE_2|RCC_CFGR_RTCPRE_1|
- ARM GAS /tmp/cct9WEL1.s page 10
+ ARM GAS /tmp/cct62l6h.s page 10
308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_HSE_DIV_16 RCC_CFGR_RTCPRE_4 /*!< HSE clock divided by 16 */
@@ -598,7 +598,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
362:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_UARTx_CLKSOURCE Peripheral UART clock source selection
363:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 11
+ ARM GAS /tmp/cct62l6h.s page 11
365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_UART4_CLKSOURCE_PCLK1 (uint32_t)((RCC_DCKCFGR2_UART4SEL << 16U) | 0x00000000U)
@@ -658,7 +658,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
419:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PLLSAI (uint32_t)(RCC_DCKCFGR1_SAI1SEL | 0x00000000U)
421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PLLI2S (uint32_t)(RCC_DCKCFGR1_SAI1SEL | (RCC_DCKCFGR1_SAI1SEL_
- ARM GAS /tmp/cct9WEL1.s page 12
+ ARM GAS /tmp/cct62l6h.s page 12
422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SAI1_CLKSOURCE_PIN (uint32_t)(RCC_DCKCFGR1_SAI1SEL | (RCC_DCKCFGR1_SAI1SEL_
@@ -718,7 +718,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
476:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DSI */
477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC)
- ARM GAS /tmp/cct9WEL1.s page 13
+ ARM GAS /tmp/cct62l6h.s page 13
479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CEC_CLKSOURCE Peripheral CEC clock source selection
@@ -778,7 +778,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART6_CLKSOURCE RCC_DCKCFGR2_USART6SEL /*!< USART6 Clock source selectio
534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
- ARM GAS /tmp/cct9WEL1.s page 14
+ ARM GAS /tmp/cct62l6h.s page 14
536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -838,7 +838,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_CK48M Peripheral CK48M get clock source
591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 15
+ ARM GAS /tmp/cct62l6h.s page 15
593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_CK48M_CLKSOURCE RCC_DCKCFGR2_CK48MSEL /*!< CK48M Domain clock source sel
@@ -898,7 +898,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
647:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DFSDM1_Channel0 */
648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(DSI)
- ARM GAS /tmp/cct9WEL1.s page 16
+ ARM GAS /tmp/cct62l6h.s page 16
650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_DSI Peripheral DSI get clock source
@@ -958,7 +958,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
705:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
706:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 17
+ ARM GAS /tmp/cct62l6h.s page 17
707:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_52 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P
762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_53 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P
763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_54 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P
- ARM GAS /tmp/cct9WEL1.s page 18
+ ARM GAS /tmp/cct62l6h.s page 18
764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_55 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_P
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
818:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_14 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_
819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLQ_DIV_15 (RCC_PLLCFGR_PLLQ_3|RCC_PLLCFGR_PLLQ_2|RCC_PLLCFGR_PLLQ_
820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/cct9WEL1.s page 19
+ ARM GAS /tmp/cct62l6h.s page 19
821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
875:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_19 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_1)
876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_20 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_1 |
877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_21 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_2)
- ARM GAS /tmp/cct9WEL1.s page 20
+ ARM GAS /tmp/cct62l6h.s page 20
878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SDIVQ_DIV_22 (RCC_DCKCFGR1_PLLI2SDIVQ_4 | RCC_DCKCFGR1_PLLI2SDIVQ_2 |
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
932:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_12 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2)
933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_13 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC
934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_14 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC
- ARM GAS /tmp/cct9WEL1.s page 21
+ ARM GAS /tmp/cct62l6h.s page 21
935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIQ_DIV_15 (RCC_PLLSAICFGR_PLLSAIQ_3 | RCC_PLLSAICFGR_PLLSAIQ_2 | RC
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
989:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 22
+ ARM GAS /tmp/cct62l6h.s page 22
992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* RCC_PLLSAICFGR_PLLSAIR */
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1046:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
1047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
1048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 23
+ ARM GAS /tmp/cct62l6h.s page 23
1049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_CALC_FREQ Calculate frequencies
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46
1104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47
1105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48
- ARM GAS /tmp/cct9WEL1.s page 24
+ ARM GAS /tmp/cct62l6h.s page 24
1106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24
1161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25
1162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26
- ARM GAS /tmp/cct9WEL1.s page 25
+ ARM GAS /tmp/cct62l6h.s page 25
1163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
1218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLCLK_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLN__, __PLLQ__) ((__INPUTFREQ__)
1219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** ((__PLLQ__) >> RCC_PLLCFGR_PLLQ_Pos ))
- ARM GAS /tmp/cct9WEL1.s page 26
+ ARM GAS /tmp/cct62l6h.s page 26
1220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48
1275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49
1276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50
- ARM GAS /tmp/cct9WEL1.s page 27
+ ARM GAS /tmp/cct62l6h.s page 27
1277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23
1332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24
1333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25
- ARM GAS /tmp/cct9WEL1.s page 28
+ ARM GAS /tmp/cct62l6h.s page 28
1334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __PLLSAIDIVQ__ This parameter can be one of the following values:
1389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_1
1390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_2
- ARM GAS /tmp/cct9WEL1.s page 29
+ ARM GAS /tmp/cct62l6h.s page 29
1391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIDIVQ_DIV_3
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15
1446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_16
1447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_17
- ARM GAS /tmp/cct9WEL1.s page 30
+ ARM GAS /tmp/cct62l6h.s page 30
1448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_18
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLSAI_48M_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIP__) (((__INPUT
1503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** ((((__PLLSAIP__) >> RCC_PLLSAICFGR_PLLSAIP_Pos) + 1U ) * 2U))
1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 31
+ ARM GAS /tmp/cct62l6h.s page 31
1505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(LTDC)
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_49
1560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50
1561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51
- ARM GAS /tmp/cct9WEL1.s page 32
+ ARM GAS /tmp/cct62l6h.s page 32
1562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_19
1617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20
1618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21
- ARM GAS /tmp/cct9WEL1.s page 33
+ ARM GAS /tmp/cct62l6h.s page 33
1619:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_12
1674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_13
1675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_14
- ARM GAS /tmp/cct9WEL1.s page 34
+ ARM GAS /tmp/cct62l6h.s page 34
1676:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_15
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10
1731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_11
1732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12
- ARM GAS /tmp/cct9WEL1.s page 35
+ ARM GAS /tmp/cct62l6h.s page 35
1733:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_4
1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_6
1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_8
- ARM GAS /tmp/cct9WEL1.s page 36
+ ARM GAS /tmp/cct62l6h.s page 36
1790:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PLLI2S clock frequency (in Hz)
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44
1845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45
1846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46
- ARM GAS /tmp/cct9WEL1.s page 37
+ ARM GAS /tmp/cct62l6h.s page 37
1847:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB1_DIV_8
1902:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB1_DIV_16
1903:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PCLK1 clock frequency (in Hz)
- ARM GAS /tmp/cct9WEL1.s page 38
+ ARM GAS /tmp/cct62l6h.s page 38
1904:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable HSE external oscillator (HSE Bypass)
1959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR HSEBYP LL_RCC_HSE_DisableBypass
1960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None
- ARM GAS /tmp/cct9WEL1.s page 39
+ ARM GAS /tmp/cct62l6h.s page 39
1961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
43 .loc 2 2012 3 view .LVU4
44 0002 224A ldr r2, .L7
45 0004 1368 ldr r3, [r2]
- ARM GAS /tmp/cct9WEL1.s page 40
+ ARM GAS /tmp/cct62l6h.s page 40
46 0006 43F00103 orr r3, r3, #1
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
175:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
176:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Read CR register */
177:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** vl_mask = LL_RCC_ReadReg(CR);
- ARM GAS /tmp/cct9WEL1.s page 41
+ ARM GAS /tmp/cct62l6h.s page 41
71 .loc 1 177 3 view .LVU13
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
90 .loc 2 2058 3 view .LVU20
91 002c 1A68 ldr r2, [r3]
92 002e 22F0F802 bic r2, r2, #248
- ARM GAS /tmp/cct9WEL1.s page 42
+ ARM GAS /tmp/cct62l6h.s page 42
93 0032 42F08002 orr r2, r2, #128
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSEON);
2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 43
+ ARM GAS /tmp/cct62l6h.s page 43
2099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_LSE_IsReady(void)
2155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
- ARM GAS /tmp/cct9WEL1.s page 44
+ ARM GAS /tmp/cct62l6h.s page 44
2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (READ_BIT(RCC->BDCR, RCC_BDCR_LSERDY) == (RCC_BDCR_LSERDY));
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_HSE
2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_PLL
2212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None
- ARM GAS /tmp/cct9WEL1.s page 45
+ ARM GAS /tmp/cct62l6h.s page 45
2213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Set APB2 prescaler
- ARM GAS /tmp/cct9WEL1.s page 46
+ ARM GAS /tmp/cct62l6h.s page 46
2270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CFGR PPRE2 LL_RCC_SetAPB2Prescaler
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_4
2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_8
2326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_APB2_DIV_16
- ARM GAS /tmp/cct9WEL1.s page 47
+ ARM GAS /tmp/cct62l6h.s page 47
2327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure USARTx clock source
- ARM GAS /tmp/cct9WEL1.s page 48
+ ARM GAS /tmp/cct62l6h.s page 48
2384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 USART1SEL LL_RCC_SetUSARTClockSource\n
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->DCKCFGR2, (UARTxSource >> 16U), (UARTxSource & 0x0000FFFFU));
2440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/cct9WEL1.s page 49
+ ARM GAS /tmp/cct62l6h.s page 49
2441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLI2S
2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PIN
2497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SAI2_CLKSOURCE_PLLSRC (*)
- ARM GAS /tmp/cct9WEL1.s page 50
+ ARM GAS /tmp/cct62l6h.s page 50
2498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** *
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure USB clock source
2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 CK48MSEL LL_RCC_SetUSBClockSource
2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param USBxSource This parameter can be one of the following values:
- ARM GAS /tmp/cct9WEL1.s page 51
+ ARM GAS /tmp/cct62l6h.s page 51
2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USB_CLKSOURCE_PLL
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure DFSDM Audio clock source
2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 ADFSDM1SEL LL_RCC_SetDFSDMAudioClockSource
2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Source This parameter can be one of the following values:
- ARM GAS /tmp/cct9WEL1.s page 52
+ ARM GAS /tmp/cct62l6h.s page 52
2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI1
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, USARTx) | (USARTx << 16U));
2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 53
+ ARM GAS /tmp/cct62l6h.s page 53
2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C3_CLKSOURCE_HSI
2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_PCLK1 (*)
2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_SYSCLK (*)
- ARM GAS /tmp/cct9WEL1.s page 54
+ ARM GAS /tmp/cct62l6h.s page 54
2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C4_CLKSOURCE_HSI (*)
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE
2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE (*)
2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/cct9WEL1.s page 55
+ ARM GAS /tmp/cct62l6h.s page 55
2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SDMMC1_CLKSOURCE_PLL48CLK
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC)
2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get CEC Clock Source
- ARM GAS /tmp/cct9WEL1.s page 56
+ ARM GAS /tmp/cct62l6h.s page 56
2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 CECSEL LL_RCC_GetCECClockSource
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* DFSDM1_Channel0 */
2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 57
+ ARM GAS /tmp/cct62l6h.s page 57
2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(DSI)
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/cct9WEL1.s page 58
+ ARM GAS /tmp/cct62l6h.s page 58
2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Enable RTC
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_2
3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_3
3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_4
- ARM GAS /tmp/cct9WEL1.s page 59
+ ARM GAS /tmp/cct62l6h.s page 59
3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_5
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_17
3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_18
3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_19
- ARM GAS /tmp/cct9WEL1.s page 60
+ ARM GAS /tmp/cct62l6h.s page 60
3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_20
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
3123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_PLL PLL
3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
- ARM GAS /tmp/cct9WEL1.s page 61
+ ARM GAS /tmp/cct62l6h.s page 61
3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
3158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
3159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLL used for SYSCLK Domain
- ARM GAS /tmp/cct9WEL1.s page 62
+ ARM GAS /tmp/cct62l6h.s page 62
3160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note PLL Source and PLLM Divider can be written only when PLL,
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45
3215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46
3216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47
- ARM GAS /tmp/cct9WEL1.s page 63
+ ARM GAS /tmp/cct62l6h.s page 63
3217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12
3272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13
3273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_14
- ARM GAS /tmp/cct9WEL1.s page 64
+ ARM GAS /tmp/cct62l6h.s page 64
3274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_5
3329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_6
3330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_7
- ARM GAS /tmp/cct9WEL1.s page 65
+ ARM GAS /tmp/cct62l6h.s page 65
3331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_8
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25
3386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26
3387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
- ARM GAS /tmp/cct9WEL1.s page 66
+ ARM GAS /tmp/cct62l6h.s page 66
3388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLL clock source
3443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll PLLCFGR PLLSRC LL_RCC_PLL_SetMainSource
3444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLSource This parameter can be one of the following values:
- ARM GAS /tmp/cct9WEL1.s page 67
+ ARM GAS /tmp/cct62l6h.s page 67
3445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSOURCE_HSI
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_6
3500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_7
3501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_8
- ARM GAS /tmp/cct9WEL1.s page 68
+ ARM GAS /tmp/cct62l6h.s page 68
3502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_9
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20
3557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21
3558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22
- ARM GAS /tmp/cct9WEL1.s page 69
+ ARM GAS /tmp/cct62l6h.s page 69
3559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Inc Between Min_Data=0 and Max_Data=32767
3614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Sel This parameter can be one of the following values:
3615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SPREAD_SELECT_CENTER
- ARM GAS /tmp/cct9WEL1.s page 70
+ ARM GAS /tmp/cct62l6h.s page 70
3616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SPREAD_SELECT_DOWN
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll SSCGR SSCGEN LL_RCC_PLL_SpreadSpectrum_Disable
3671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None
3672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 71
+ ARM GAS /tmp/cct62l6h.s page 71
3673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_SpreadSpectrum_Disable(void)
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Wait for PLLSAI READY bit to be reset */
197:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** while(LL_RCC_PLLSAI_IsReady() != 0U)
- ARM GAS /tmp/cct9WEL1.s page 72
+ ARM GAS /tmp/cct62l6h.s page 72
198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {}
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3762:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_33
3763:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_34
3764:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35
- ARM GAS /tmp/cct9WEL1.s page 73
+ ARM GAS /tmp/cct62l6h.s page 73
3765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_36
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3819:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_10
3820:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_11
3821:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_12
- ARM GAS /tmp/cct9WEL1.s page 74
+ ARM GAS /tmp/cct62l6h.s page 74
3822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_13
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3876:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_12
3877:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_13
3878:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_14
- ARM GAS /tmp/cct9WEL1.s page 75
+ ARM GAS /tmp/cct62l6h.s page 75
3879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_15
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3933:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SP_DIV_8
3934:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval None
3935:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/cct9WEL1.s page 76
+ ARM GAS /tmp/cct62l6h.s page 76
3936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLLI2S_ConfigDomain_SPDIFRX(uint32_t Source, uint32_t PLLM, uint32_t PL
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3990:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35
3991:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_36
3992:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_37
- ARM GAS /tmp/cct9WEL1.s page 77
+ ARM GAS /tmp/cct62l6h.s page 77
3993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_38
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4047:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll PLLI2SCFGR PLLI2SQ LL_RCC_PLLI2S_GetQ
4048:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values:
4049:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_2
- ARM GAS /tmp/cct9WEL1.s page 78
+ ARM GAS /tmp/cct62l6h.s page 78
4050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SQ_DIV_3
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get I2SPLL division factor for PLLI2SDIVQ
4105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note used PLLSAI1CLK, PLLSAI2CLK selected (SAI1 and SAI2 clock)
4106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 PLLI2SDIVQ LL_RCC_PLLI2S_GetDIVQ
- ARM GAS /tmp/cct9WEL1.s page 79
+ ARM GAS /tmp/cct62l6h.s page 79
4107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values:
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** SET_BIT(RCC->CR, RCC_CR_PLLSAION);
4162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
4163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/cct9WEL1.s page 80
+ ARM GAS /tmp/cct62l6h.s page 80
4164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
160 006c DA60 str r2, [r3, #12]
211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
212:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Clear all interrupt flags */
- ARM GAS /tmp/cct9WEL1.s page 81
+ ARM GAS /tmp/cct62l6h.s page 81
213:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** SET_BIT(RCC->CIR, RCC_CIR_LSIRDYC | RCC_CIR_LSERDYC | RCC_CIR_HSIRDYC | RCC_CIR_HSERDYC | RCC_CIR
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * and different peripheral clocks available on the device.
231:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(**)
232:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is HSE, function returns values based on HSE_VALUE(***)
- ARM GAS /tmp/cct9WEL1.s page 82
+ ARM GAS /tmp/cct62l6h.s page 82
233:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @note If SYSCLK source is PLL, function returns values based on HSE_VALUE(***)
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** assert_param(IS_LL_RCC_USART_CLKSOURCE(USARTxSource));
288:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
289:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** if (USARTxSource == LL_RCC_USART1_CLKSOURCE)
- ARM GAS /tmp/cct9WEL1.s page 83
+ ARM GAS /tmp/cct62l6h.s page 83
290:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
344:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
345:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 84
+ ARM GAS /tmp/cct62l6h.s page 84
347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** else if (USARTxSource == LL_RCC_USART6_CLKSOURCE)
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
401:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_USART3_CLKSOURCE_PCLK1: /* USART3 Clock is PCLK1 */
402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default:
403:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** usart_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
- ARM GAS /tmp/cct9WEL1.s page 85
+ ARM GAS /tmp/cct62l6h.s page 85
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
458:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* UART5CLK clock frequency */
460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetUARTClockSource(UARTxSource))
- ARM GAS /tmp/cct9WEL1.s page 86
+ ARM GAS /tmp/cct62l6h.s page 86
461:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
515:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** else
516:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** if (UARTxSource == LL_RCC_UART8_CLKSOURCE)
- ARM GAS /tmp/cct9WEL1.s page 87
+ ARM GAS /tmp/cct62l6h.s page 87
518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
572:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetI2CClockSource(I2CxSource))
573:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_I2C1_CLKSOURCE_SYSCLK: /* I2C1 Clock is System Clock */
- ARM GAS /tmp/cct9WEL1.s page 88
+ ARM GAS /tmp/cct62l6h.s page 88
575:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** i2c_frequency = RCC_GetSystemClockFreq();
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
629:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_I2C3_CLKSOURCE_PCLK1: /* I2C3 Clock is PCLK1 */
630:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default:
631:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** i2c_frequency = RCC_GetPCLK1ClockFreq(RCC_GetHCLKClockFreq(RCC_GetSystemClockFreq()));
- ARM GAS /tmp/cct9WEL1.s page 89
+ ARM GAS /tmp/cct62l6h.s page 89
632:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
686:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
687:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* I2S1 CLK clock frequency */
688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** switch (LL_RCC_GetI2SClockSource(I2SxSource))
- ARM GAS /tmp/cct9WEL1.s page 90
+ ARM GAS /tmp/cct62l6h.s page 90
689:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
743:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** lptim_frequency = LSE_VALUE;
744:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
745:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 91
+ ARM GAS /tmp/cct62l6h.s page 91
746:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
800:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
801:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
802:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSI: /* HSI clock used as SAI1 clock source */
- ARM GAS /tmp/cct9WEL1.s page 92
+ ARM GAS /tmp/cct62l6h.s page 92
803:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default:
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
857:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
858:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
859:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 93
+ ARM GAS /tmp/cct62l6h.s page 93
860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
914:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
915:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
916:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
- ARM GAS /tmp/cct9WEL1.s page 94
+ ARM GAS /tmp/cct62l6h.s page 94
917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_SDMMC1_CLKSOURCE_SYSCLK: /* PLL clock used as SDMMC1 clock source */
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* Check parameter */
972:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** assert_param(IS_LL_RCC_RNG_CLKSOURCE(RNGxSource));
973:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
- ARM GAS /tmp/cct9WEL1.s page 95
+ ARM GAS /tmp/cct62l6h.s page 95
974:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* RNGCLK clock frequency */
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
213 .loc 2 2849 21 is_stmt 0 view .LVU56
214 0000 0A4B ldr r3, .L15
- ARM GAS /tmp/cct9WEL1.s page 96
+ ARM GAS /tmp/cct62l6h.s page 96
215 0002 D3F89030 ldr r3, [r3, #144]
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1023:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
245 .loc 1 1023 7 is_stmt 1 view .LVU66
246 .LBB250:
- ARM GAS /tmp/cct9WEL1.s page 97
+ ARM GAS /tmp/cct62l6h.s page 97
247 .LBI250:
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @arg @ref LL_RCC_USB_CLKSOURCE
1038:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @retval USB clock frequency (in Hz)
1039:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */
- ARM GAS /tmp/cct9WEL1.s page 98
+ ARM GAS /tmp/cct62l6h.s page 98
1040:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t LL_RCC_GetUSBClockFreq(uint32_t USBxSource)
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1094:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
1095:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
1096:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return dfsdm_frequency;
- ARM GAS /tmp/cct9WEL1.s page 99
+ ARM GAS /tmp/cct62l6h.s page 99
1097:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1151:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
1152:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** dsi_frequency = RCC_PLL_GetFreqDomain_DSI();
1153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 100
+ ARM GAS /tmp/cct62l6h.s page 100
1154:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1208:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
1209:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return spdifrx_frequency;
- ARM GAS /tmp/cct9WEL1.s page 101
+ ARM GAS /tmp/cct62l6h.s page 101
1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
290 .cfi_startproc
291 @ args = 0, pretend = 0, frame = 0
292 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/cct9WEL1.s page 102
+ ARM GAS /tmp/cct62l6h.s page 102
293 @ link register save eliminated.
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
335 @ frame_needed = 0, uses_anonymous_args = 0
336 @ link register save eliminated.
1275:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PCLK1 clock frequency */
- ARM GAS /tmp/cct9WEL1.s page 103
+ ARM GAS /tmp/cct62l6h.s page 103
1276:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PCLK1_FREQ(HCLK_Frequency, LL_RCC_GetAPB1Prescaler());
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PCLK2 clock frequency */
1287:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PCLK2_FREQ(HCLK_Frequency, LL_RCC_GetAPB2Prescaler());
380 .loc 1 1287 3 view .LVU93
- ARM GAS /tmp/cct9WEL1.s page 104
+ ARM GAS /tmp/cct62l6h.s page 104
381 .LBB256:
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1298:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN
1299:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** SYSCLK = PLL_VCO / PLLP
1300:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** */
- ARM GAS /tmp/cct9WEL1.s page 105
+ ARM GAS /tmp/cct62l6h.s page 105
1301:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllsource = LL_RCC_PLL_GetMainSource();
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
453 .LVL19:
3603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
454 .loc 2 3603 21 view .LVU114
- ARM GAS /tmp/cct9WEL1.s page 106
+ ARM GAS /tmp/cct62l6h.s page 106
455 000e 5A68 ldr r2, [r3, #4]
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
498 0036 00BF .align 2
499 .L29:
500 0038 00380240 .word 1073887232
- ARM GAS /tmp/cct9WEL1.s page 107
+ ARM GAS /tmp/cct62l6h.s page 107
501 003c 0024F400 .word 16000000
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
547 .LVL23:
1247:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
548 .loc 1 1247 7 is_stmt 1 view .LVU138
- ARM GAS /tmp/cct9WEL1.s page 108
+ ARM GAS /tmp/cct62l6h.s page 108
549 .L31:
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
596 0004 FFF7FEFF bl RCC_GetSystemClockFreq
597 .LVL27:
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
- ARM GAS /tmp/cct9WEL1.s page 109
+ ARM GAS /tmp/cct62l6h.s page 109
598 .loc 1 260 32 discriminator 1 view .LVU148
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
641 .LCFI4:
642 .cfi_def_cfa_offset 8
643 .cfi_offset 3, -8
- ARM GAS /tmp/cct9WEL1.s page 110
+ ARM GAS /tmp/cct62l6h.s page 110
644 .cfi_offset 14, -4
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
682 .loc 2 2666 10 view .LVU178
683 0020 43EA0043 orr r3, r3, r0, lsl #16
- ARM GAS /tmp/cct9WEL1.s page 111
+ ARM GAS /tmp/cct62l6h.s page 111
684 .LVL35:
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
726 .loc 1 306 9 is_stmt 1 view .LVU191
727 .LBB272:
- ARM GAS /tmp/cct9WEL1.s page 112
+ ARM GAS /tmp/cct62l6h.s page 112
728 .LBI272:
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
767 .loc 2 2666 21 is_stmt 0 view .LVU206
768 0068 3D4B ldr r3, .L71
769 006a D3F89030 ldr r3, [r3, #144]
- ARM GAS /tmp/cct9WEL1.s page 113
+ ARM GAS /tmp/cct62l6h.s page 113
770 006e 0340 ands r3, r3, r0
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
811 0096 3448 ldr r0, .L71+8
812 0098 BDE7 b .L40
813 .LVL50:
- ARM GAS /tmp/cct9WEL1.s page 114
+ ARM GAS /tmp/cct62l6h.s page 114
814 .L48:
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
854 .LBB281:
2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
855 .loc 2 2666 3 view .LVU234
- ARM GAS /tmp/cct9WEL1.s page 115
+ ARM GAS /tmp/cct62l6h.s page 115
2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
897 00e2 10F00200 ands r0, r0, #2
898 00e6 96D0 beq .L40
359:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 116
+ ARM GAS /tmp/cct62l6h.s page 116
899 .loc 1 359 27 view .LVU248
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
940 .LBB286:
941 .LBI286:
2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
- ARM GAS /tmp/cct9WEL1.s page 117
+ ARM GAS /tmp/cct62l6h.s page 117
942 .loc 2 2664 26 view .LVU262
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
983 .LBE289:
984 .LBE288:
388:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 118
+ ARM GAS /tmp/cct62l6h.s page 118
985 .loc 1 388 14 discriminator 1 view .LVU276
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1025 0158 FFF7FEFF bl RCC_GetPCLK1ClockFreq
1026 .LVL78:
404:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 119
+ ARM GAS /tmp/cct62l6h.s page 119
1027 .loc 1 404 11 is_stmt 1 view .LVU291
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1073 .loc 1 486 11 is_stmt 0 view .LVU301
1074 000c B0F5405F cmp r0, #12288
1075 0010 55D0 beq .L102
- ARM GAS /tmp/cct9WEL1.s page 120
+ ARM GAS /tmp/cct62l6h.s page 120
517:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
1117 .loc 1 435 9 is_stmt 1 view .LVU315
1118 003e ECE7 b .L73
- ARM GAS /tmp/cct9WEL1.s page 121
+ ARM GAS /tmp/cct62l6h.s page 121
1119 .LVL85:
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1159 0058 4FF40040 mov r0, #32768
1160 005c DDE7 b .L73
1161 .LVL89:
- ARM GAS /tmp/cct9WEL1.s page 122
+ ARM GAS /tmp/cct62l6h.s page 122
1162 .L77:
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
463:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
1203 .loc 1 463 26 is_stmt 0 view .LVU343
1204 008c FFF7FEFF bl RCC_GetSystemClockFreq
- ARM GAS /tmp/cct9WEL1.s page 123
+ ARM GAS /tmp/cct62l6h.s page 123
1205 .LVL95:
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1245 00a4 10F00200 ands r0, r0, #2
1246 00a8 B7D0 beq .L73
476:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 124
+ ARM GAS /tmp/cct62l6h.s page 124
1247 .loc 1 476 26 view .LVU358
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1289 00da 9342 cmp r3, r2
1290 00dc 11D1 bne .L86
492:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 125
+ ARM GAS /tmp/cct62l6h.s page 125
1291 .loc 1 492 9 is_stmt 1 view .LVU371
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1331 .LBE309:
1332 .LBE308:
503:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 126
+ ARM GAS /tmp/cct62l6h.s page 126
1333 .loc 1 503 12 discriminator 1 view .LVU386
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1374 0120 09D0 beq .L87
1375 0122 B3F1C02F cmp r3, #-1073692672
1376 0126 0ED0 beq .L88
- ARM GAS /tmp/cct9WEL1.s page 127
+ ARM GAS /tmp/cct62l6h.s page 127
1377 0128 A2F58042 sub r2, r2, #16384
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1417 0148 186F ldr r0, [r3, #112]
1418 .LVL121:
2156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/cct9WEL1.s page 128
+ ARM GAS /tmp/cct62l6h.s page 128
1419 .loc 2 2156 11 view .LVU414
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1466 .LFB299:
563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t i2c_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
1467 .loc 1 563 1 view -0
- ARM GAS /tmp/cct9WEL1.s page 129
+ ARM GAS /tmp/cct62l6h.s page 129
1468 .cfi_startproc
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1507 .loc 2 2730 26 view .LVU439
1508 .LBB317:
2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/cct9WEL1.s page 130
+ ARM GAS /tmp/cct62l6h.s page 130
1509 .loc 2 2732 3 view .LVU440
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1550 .LBB318:
1551 .LBI318:
2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
- ARM GAS /tmp/cct9WEL1.s page 131
+ ARM GAS /tmp/cct62l6h.s page 131
1552 .loc 2 2030 26 view .LVU454
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1593 0070 FFF7FEFF bl RCC_GetSystemClockFreq
1594 .LVL140:
609:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 132
+ ARM GAS /tmp/cct62l6h.s page 132
1595 .loc 1 609 25 discriminator 1 view .LVU468
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1636 .LBB325:
2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
1637 .loc 2 2732 3 view .LVU482
- ARM GAS /tmp/cct9WEL1.s page 133
+ ARM GAS /tmp/cct62l6h.s page 133
2732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1679 .LBI326:
2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
1680 .loc 2 2030 26 view .LVU496
- ARM GAS /tmp/cct9WEL1.s page 134
+ ARM GAS /tmp/cct62l6h.s page 134
1681 .LBB327:
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1722 .LVL156:
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
1723 .loc 1 656 27 discriminator 1 view .LVU510
- ARM GAS /tmp/cct9WEL1.s page 135
+ ARM GAS /tmp/cct62l6h.s page 135
1724 00e8 FFF7FEFF bl RCC_GetHCLKClockFreq
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1765 010c 01000300 .word 196609
1766 0110 0024F400 .word 16000000
1767 0114 04000C00 .word 786436
- ARM GAS /tmp/cct9WEL1.s page 136
+ ARM GAS /tmp/cct62l6h.s page 136
1768 0118 10003000 .word 3145744
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
1813 .loc 2 2748 21 is_stmt 0 view .LVU535
1814 000c 154B ldr r3, .L153
- ARM GAS /tmp/cct9WEL1.s page 137
+ ARM GAS /tmp/cct62l6h.s page 137
1815 000e D3F89030 ldr r3, [r3, #144]
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
1856 .loc 2 2032 11 is_stmt 0 view .LVU549
1857 0038 0A4B ldr r3, .L153
- ARM GAS /tmp/cct9WEL1.s page 138
+ ARM GAS /tmp/cct62l6h.s page 138
1858 003a 1868 ldr r0, [r3]
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1898 .LVL175:
749:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
1899 .loc 1 749 27 discriminator 1 view .LVU564
- ARM GAS /tmp/cct9WEL1.s page 139
+ ARM GAS /tmp/cct62l6h.s page 139
1900 005a FFF7FEFF bl RCC_GetHCLKClockFreq
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
1946 .loc 2 2893 21 is_stmt 0 view .LVU575
1947 0002 084B ldr r3, .L160
- ARM GAS /tmp/cct9WEL1.s page 140
+ ARM GAS /tmp/cct62l6h.s page 140
1948 0004 D3F88C30 ldr r3, [r3, #140]
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1990 .global RCC_PLL_GetFreqDomain_48M
1991 .syntax unified
1992 .thumb
- ARM GAS /tmp/cct9WEL1.s page 141
+ ARM GAS /tmp/cct62l6h.s page 141
1993 .thumb_func
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
1339:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSE: /* HSE used as PLL clock source */
- ARM GAS /tmp/cct9WEL1.s page 142
+ ARM GAS /tmp/cct62l6h.s page 142
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllinputfreq = HSE_VALUE;
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2060 0022 5068 ldr r0, [r2, #4]
2061 .LBE349:
2062 .LBE348:
- ARM GAS /tmp/cct9WEL1.s page 143
+ ARM GAS /tmp/cct62l6h.s page 143
2063 .loc 1 1348 10 discriminator 3 view .LVU613
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** default:
1374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** pllinputfreq = HSI_VALUE;
1375:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 144
+ ARM GAS /tmp/cct62l6h.s page 144
1376:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2119 .L168:
2120 .LVL194:
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 145
+ ARM GAS /tmp/cct62l6h.s page 145
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_6
4204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7
4205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8
- ARM GAS /tmp/cct9WEL1.s page 146
+ ARM GAS /tmp/cct62l6h.s page 146
4206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_63
4261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432
4262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLQ This parameter can be one of the following values:
- ARM GAS /tmp/cct9WEL1.s page 147
+ ARM GAS /tmp/cct62l6h.s page 147
4263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_2
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
4318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
4319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/cct9WEL1.s page 148
+ ARM GAS /tmp/cct62l6h.s page 148
4320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure PLLSAI used for 48Mhz domain clock
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_43
4375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44
4376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45
- ARM GAS /tmp/cct9WEL1.s page 149
+ ARM GAS /tmp/cct62l6h.s page 149
4377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8
4432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9
4433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10
- ARM GAS /tmp/cct9WEL1.s page 150
+ ARM GAS /tmp/cct62l6h.s page 150
4434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_11
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLR This parameter can be one of the following values:
4489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_2
4490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_3
- ARM GAS /tmp/cct9WEL1.s page 151
+ ARM GAS /tmp/cct62l6h.s page 151
4491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIR_DIV_4
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4532:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_10
4533:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_11
4534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_12
- ARM GAS /tmp/cct9WEL1.s page 152
+ ARM GAS /tmp/cct62l6h.s page 152
4535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLSAIQ_DIV_13
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
4578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
4579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get SAIPLL division factor for PLLSAIDIVQ
4580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note used PLLSAI1CLK, PLLSAI2CLK selected (SAI1 and SAI2 clock)
- ARM GAS /tmp/cct9WEL1.s page 153
+ ARM GAS /tmp/cct62l6h.s page 153
4581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 PLLSAIDIVQ LL_RCC_PLLSAI_GetDIVQ
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2178 .L169:
1402:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
2179 .loc 1 1402 20 view .LVU647
- ARM GAS /tmp/cct9WEL1.s page 154
+ ARM GAS /tmp/cct62l6h.s page 154
2180 003e 0348 ldr r0, .L170+8
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2219 .loc 2 3463 10 view .LVU655
2220 .LBE361:
- ARM GAS /tmp/cct9WEL1.s page 155
+ ARM GAS /tmp/cct62l6h.s page 155
2221 .LBE360:
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2251 .loc 2 4517 21 is_stmt 0 view .LVU667
2252 0018 D3F88820 ldr r2, [r3, #136]
4517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/cct9WEL1.s page 156
+ ARM GAS /tmp/cct62l6h.s page 156
2253 .loc 2 4517 10 view .LVU668
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2302 @ frame_needed = 0, uses_anonymous_args = 0
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t sdmmc_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
2303 .loc 1 886 1 is_stmt 0 view .LVU677
- ARM GAS /tmp/cct9WEL1.s page 157
+ ARM GAS /tmp/cct62l6h.s page 157
2304 0000 08B5 push {r3, lr}
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2343 .loc 2 2806 21 is_stmt 0 view .LVU692
2344 001a 1D4B ldr r3, .L186
2345 001c D3F89030 ldr r3, [r3, #144]
- ARM GAS /tmp/cct9WEL1.s page 158
+ ARM GAS /tmp/cct62l6h.s page 158
2346 .LVL209:
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2386 .LVL212:
2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2387 .loc 2 2792 10 view .LVU707
- ARM GAS /tmp/cct9WEL1.s page 159
+ ARM GAS /tmp/cct62l6h.s page 159
2388 .LBE375:
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2428 0062 14E0 b .L177
2429 .LVL216:
2430 .L180:
- ARM GAS /tmp/cct9WEL1.s page 160
+ ARM GAS /tmp/cct62l6h.s page 160
909:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2470 .LBE383:
2471 .LBE382:
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 161
+ ARM GAS /tmp/cct62l6h.s page 161
2472 .loc 1 941 17 discriminator 1 view .LVU737
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2518 .cfi_offset 14, -4
969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
2519 .loc 1 969 3 is_stmt 1 view .LVU748
- ARM GAS /tmp/cct9WEL1.s page 162
+ ARM GAS /tmp/cct62l6h.s page 162
2520 .LVL225:
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
2560 .loc 1 980 9 is_stmt 1 view .LVU763
980:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 163
+ ARM GAS /tmp/cct62l6h.s page 163
2561 .loc 1 980 25 is_stmt 0 view .LVU764
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2606 .LVL234:
2607 .LFB306:
1041:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** uint32_t usb_frequency = LL_RCC_PERIPH_FREQUENCY_NO;
- ARM GAS /tmp/cct9WEL1.s page 164
+ ARM GAS /tmp/cct62l6h.s page 164
2608 .loc 1 1041 1 is_stmt 1 view -0
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2648 .LBE393:
2649 .LBE392:
1051:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 165
+ ARM GAS /tmp/cct62l6h.s page 165
2650 .loc 1 1051 10 discriminator 1 view .LVU791
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2690 .L201:
2691 002e 00BF .align 2
2692 .L200:
- ARM GAS /tmp/cct9WEL1.s page 166
+ ARM GAS /tmp/cct62l6h.s page 166
2693 0030 00380240 .word 1073887232
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2728 .loc 1 1458 3 is_stmt 1 view .LVU814
2729 0008 DBB9 cbnz r3, .L204
1459:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 167
+ ARM GAS /tmp/cct62l6h.s page 167
1460:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** case LL_RCC_PLLSOURCE_HSI: /* HSI used as PLLSAI clock source */
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2763 0020 03FB00F0 mul r0, r3, r0
2764 .LBB402:
2765 .LBI402:
- ARM GAS /tmp/cct9WEL1.s page 168
+ ARM GAS /tmp/cct62l6h.s page 168
4557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2798 0046 00BF .align 2
2799 .L205:
2800 0048 00380240 .word 1073887232
- ARM GAS /tmp/cct9WEL1.s page 169
+ ARM GAS /tmp/cct62l6h.s page 169
2801 004c 0024F400 .word 16000000
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2847 .L207:
1187:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #endif /* LTDC */
2848 .loc 1 1187 1 view .LVU847
- ARM GAS /tmp/cct9WEL1.s page 170
+ ARM GAS /tmp/cct62l6h.s page 170
2849 000c 08BD pop {r3, pc}
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2886 .LBB409:
3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2887 .loc 2 3463 3 view .LVU856
- ARM GAS /tmp/cct9WEL1.s page 171
+ ARM GAS /tmp/cct62l6h.s page 171
3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2919 .LVL260:
2920 .LBB412:
2921 .LBI412:
- ARM GAS /tmp/cct9WEL1.s page 172
+ ARM GAS /tmp/cct62l6h.s page 172
4040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
2962 .loc 1 1497 20 view .LVU883
2963 003e 0348 ldr r0, .L216+8
2964 0040 E4E7 b .L214
- ARM GAS /tmp/cct9WEL1.s page 173
+ ARM GAS /tmp/cct62l6h.s page 173
2965 .L217:
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3011 .LVL265:
3012 .L239:
775:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 174
+ ARM GAS /tmp/cct62l6h.s page 174
3013 .loc 1 775 5 is_stmt 1 view .LVU894
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3054 .loc 1 787 27 is_stmt 0 view .LVU907
3055 003c FFF7FEFF bl RCC_PLLI2S_GetFreqDomain_SAI
3056 .LVL267:
- ARM GAS /tmp/cct9WEL1.s page 175
+ ARM GAS /tmp/cct62l6h.s page 175
787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3098 .loc 1 775 5 discriminator 1 view .LVU920
3099 0064 0020 movs r0, #0
3100 0066 D3E7 b .L218
- ARM GAS /tmp/cct9WEL1.s page 176
+ ARM GAS /tmp/cct62l6h.s page 176
3101 .L222:
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3141 .LVL271:
3142 .L240:
825:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
- ARM GAS /tmp/cct9WEL1.s page 177
+ ARM GAS /tmp/cct62l6h.s page 177
3143 .loc 1 825 7 is_stmt 1 view .LVU935
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3184 .loc 1 837 27 is_stmt 0 view .LVU948
3185 00b0 FFF7FEFF bl RCC_PLLI2S_GetFreqDomain_SAI
3186 .LVL273:
- ARM GAS /tmp/cct9WEL1.s page 178
+ ARM GAS /tmp/cct62l6h.s page 178
837:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3228 .loc 1 825 7 discriminator 1 view .LVU961
3229 00d8 0020 movs r0, #0
3230 00da 99E7 b .L218
- ARM GAS /tmp/cct9WEL1.s page 179
+ ARM GAS /tmp/cct62l6h.s page 179
3231 .L227:
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
3271 .loc 1 872 3 is_stmt 1 view .LVU976
872:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
- ARM GAS /tmp/cct9WEL1.s page 180
+ ARM GAS /tmp/cct62l6h.s page 180
3272 .loc 1 872 10 is_stmt 0 view .LVU977
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3320 .loc 2 2877 26 view .LVU985
3321 .LBB443:
2879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/cct9WEL1.s page 181
+ ARM GAS /tmp/cct62l6h.s page 181
3322 .loc 2 2879 3 view .LVU986
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3362 .LFE308:
3364 .section .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX,"ax",%progbits
3365 .align 1
- ARM GAS /tmp/cct9WEL1.s page 182
+ ARM GAS /tmp/cct62l6h.s page 182
3366 .global RCC_PLLI2S_GetFreqDomain_SPDIFRX
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3397 .loc 1 1525 20 is_stmt 0 view .LVU1010
3398 000a 0D48 ldr r0, .L256+4
3399 .L254:
- ARM GAS /tmp/cct9WEL1.s page 183
+ ARM GAS /tmp/cct62l6h.s page 183
3400 .LVL289:
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3433 .LBI450:
4097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
3434 .loc 2 4097 26 is_stmt 1 view .LVU1023
- ARM GAS /tmp/cct9WEL1.s page 184
+ ARM GAS /tmp/cct62l6h.s page 184
3435 .LBB451:
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3483 .LVL294:
1203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
3484 .loc 1 1203 3 view .LVU1032
- ARM GAS /tmp/cct9WEL1.s page 185
+ ARM GAS /tmp/cct62l6h.s page 185
1205:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1540:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** #endif /* SPDIFRX */
1541:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c ****
1542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** /**
- ARM GAS /tmp/cct9WEL1.s page 186
+ ARM GAS /tmp/cct62l6h.s page 186
1543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** * @brief Return PLLI2S clock frequency used for I2S domain
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
1566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** return __LL_RCC_CALC_PLLI2S_I2S_FREQ(pllinputfreq, LL_RCC_PLL_GetDivider(),
3557 .loc 1 1566 3 is_stmt 1 view .LVU1053
3558 .LBB456:
- ARM GAS /tmp/cct9WEL1.s page 187
+ ARM GAS /tmp/cct62l6h.s page 187
3559 .LBI456:
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3600 .LVL303:
3601 .L266:
1563:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** break;
- ARM GAS /tmp/cct9WEL1.s page 188
+ ARM GAS /tmp/cct62l6h.s page 188
3602 .loc 1 1563 20 view .LVU1069
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
688:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** {
3649 .loc 1 688 5 is_stmt 1 view .LVU1079
3650 .LVL308:
- ARM GAS /tmp/cct9WEL1.s page 189
+ ARM GAS /tmp/cct62l6h.s page 189
3651 .LBB462:
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/cct9WEL1.s page 1
3691 .LVL313:
693:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_rcc.c **** }
3692 .loc 1 693 27 view .LVU1094
- ARM GAS /tmp/cct9WEL1.s page 190
+ ARM GAS /tmp/cct62l6h.s page 190
3693 0024 FBE7 b .L269
@@ -11370,99 +11370,99 @@ ARM GAS /tmp/cct9WEL1.s page 1
3719 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
3720 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
3721 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/cct9WEL1.s page 191
+ ARM GAS /tmp/cct62l6h.s page 191
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_rcc.c
- /tmp/cct9WEL1.s:20 .text.LL_RCC_DeInit:00000000 $t
- /tmp/cct9WEL1.s:26 .text.LL_RCC_DeInit:00000000 LL_RCC_DeInit
- /tmp/cct9WEL1.s:184 .text.LL_RCC_DeInit:0000008c $d
- /tmp/cct9WEL1.s:191 .text.LL_RCC_GetCECClockFreq:00000000 $t
- /tmp/cct9WEL1.s:197 .text.LL_RCC_GetCECClockFreq:00000000 LL_RCC_GetCECClockFreq
- /tmp/cct9WEL1.s:275 .text.LL_RCC_GetCECClockFreq:0000002c $d
- /tmp/cct9WEL1.s:280 .text.RCC_GetHCLKClockFreq:00000000 $t
- /tmp/cct9WEL1.s:286 .text.RCC_GetHCLKClockFreq:00000000 RCC_GetHCLKClockFreq
- /tmp/cct9WEL1.s:317 .text.RCC_GetHCLKClockFreq:00000010 $d
- /tmp/cct9WEL1.s:323 .text.RCC_GetPCLK1ClockFreq:00000000 $t
- /tmp/cct9WEL1.s:329 .text.RCC_GetPCLK1ClockFreq:00000000 RCC_GetPCLK1ClockFreq
- /tmp/cct9WEL1.s:360 .text.RCC_GetPCLK1ClockFreq:00000010 $d
- /tmp/cct9WEL1.s:366 .text.RCC_GetPCLK2ClockFreq:00000000 $t
- /tmp/cct9WEL1.s:372 .text.RCC_GetPCLK2ClockFreq:00000000 RCC_GetPCLK2ClockFreq
- /tmp/cct9WEL1.s:403 .text.RCC_GetPCLK2ClockFreq:00000010 $d
- /tmp/cct9WEL1.s:409 .text.RCC_PLL_GetFreqDomain_SYS:00000000 $t
- /tmp/cct9WEL1.s:415 .text.RCC_PLL_GetFreqDomain_SYS:00000000 RCC_PLL_GetFreqDomain_SYS
- /tmp/cct9WEL1.s:500 .text.RCC_PLL_GetFreqDomain_SYS:00000038 $d
- /tmp/cct9WEL1.s:507 .text.RCC_GetSystemClockFreq:00000000 $t
- /tmp/cct9WEL1.s:513 .text.RCC_GetSystemClockFreq:00000000 RCC_GetSystemClockFreq
- /tmp/cct9WEL1.s:567 .text.RCC_GetSystemClockFreq:00000020 $d
- /tmp/cct9WEL1.s:574 .text.LL_RCC_GetSystemClocksFreq:00000000 $t
- /tmp/cct9WEL1.s:580 .text.LL_RCC_GetSystemClocksFreq:00000000 LL_RCC_GetSystemClocksFreq
- /tmp/cct9WEL1.s:626 .text.LL_RCC_GetUSARTClockFreq:00000000 $t
- /tmp/cct9WEL1.s:632 .text.LL_RCC_GetUSARTClockFreq:00000000 LL_RCC_GetUSARTClockFreq
- /tmp/cct9WEL1.s:1032 .text.LL_RCC_GetUSARTClockFreq:00000160 $d
- /tmp/cct9WEL1.s:1042 .text.LL_RCC_GetUARTClockFreq:00000000 $t
- /tmp/cct9WEL1.s:1048 .text.LL_RCC_GetUARTClockFreq:00000000 LL_RCC_GetUARTClockFreq
- /tmp/cct9WEL1.s:1448 .text.LL_RCC_GetUARTClockFreq:00000168 $d
- /tmp/cct9WEL1.s:1458 .text.LL_RCC_GetI2CClockFreq:00000000 $t
- /tmp/cct9WEL1.s:1464 .text.LL_RCC_GetI2CClockFreq:00000000 LL_RCC_GetI2CClockFreq
- /tmp/cct9WEL1.s:1764 .text.LL_RCC_GetI2CClockFreq:00000108 $d
- /tmp/cct9WEL1.s:1774 .text.LL_RCC_GetLPTIMClockFreq:00000000 $t
- /tmp/cct9WEL1.s:1780 .text.LL_RCC_GetLPTIMClockFreq:00000000 LL_RCC_GetLPTIMClockFreq
- /tmp/cct9WEL1.s:1912 .text.LL_RCC_GetLPTIMClockFreq:00000064 $d
- /tmp/cct9WEL1.s:1918 .text.LL_RCC_GetDFSDMClockFreq:00000000 $t
- /tmp/cct9WEL1.s:1924 .text.LL_RCC_GetDFSDMClockFreq:00000000 LL_RCC_GetDFSDMClockFreq
- /tmp/cct9WEL1.s:1984 .text.LL_RCC_GetDFSDMClockFreq:00000024 $d
- /tmp/cct9WEL1.s:1989 .text.RCC_PLL_GetFreqDomain_48M:00000000 $t
- /tmp/cct9WEL1.s:1995 .text.RCC_PLL_GetFreqDomain_48M:00000000 RCC_PLL_GetFreqDomain_48M
- /tmp/cct9WEL1.s:2078 .text.RCC_PLL_GetFreqDomain_48M:00000034 $d
- /tmp/cct9WEL1.s:2085 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 $t
- /tmp/cct9WEL1.s:2091 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 RCC_PLLSAI_GetFreqDomain_SAI
- /tmp/cct9WEL1.s:2185 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000044 $d
- /tmp/cct9WEL1.s:2192 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 $t
- /tmp/cct9WEL1.s:2198 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 RCC_PLLSAI_GetFreqDomain_48M
- /tmp/cct9WEL1.s:2283 .text.RCC_PLLSAI_GetFreqDomain_48M:0000003c $d
- /tmp/cct9WEL1.s:2290 .text.LL_RCC_GetSDMMCClockFreq:00000000 $t
- /tmp/cct9WEL1.s:2296 .text.LL_RCC_GetSDMMCClockFreq:00000000 LL_RCC_GetSDMMCClockFreq
- /tmp/cct9WEL1.s:2495 .text.LL_RCC_GetSDMMCClockFreq:00000090 $d
- /tmp/cct9WEL1.s:2500 .text.LL_RCC_GetRNGClockFreq:00000000 $t
- /tmp/cct9WEL1.s:2506 .text.LL_RCC_GetRNGClockFreq:00000000 LL_RCC_GetRNGClockFreq
- /tmp/cct9WEL1.s:2594 .text.LL_RCC_GetRNGClockFreq:00000030 $d
- /tmp/cct9WEL1.s:2599 .text.LL_RCC_GetUSBClockFreq:00000000 $t
- /tmp/cct9WEL1.s:2605 .text.LL_RCC_GetUSBClockFreq:00000000 LL_RCC_GetUSBClockFreq
- ARM GAS /tmp/cct9WEL1.s page 192
+ /tmp/cct62l6h.s:20 .text.LL_RCC_DeInit:00000000 $t
+ /tmp/cct62l6h.s:26 .text.LL_RCC_DeInit:00000000 LL_RCC_DeInit
+ /tmp/cct62l6h.s:184 .text.LL_RCC_DeInit:0000008c $d
+ /tmp/cct62l6h.s:191 .text.LL_RCC_GetCECClockFreq:00000000 $t
+ /tmp/cct62l6h.s:197 .text.LL_RCC_GetCECClockFreq:00000000 LL_RCC_GetCECClockFreq
+ /tmp/cct62l6h.s:275 .text.LL_RCC_GetCECClockFreq:0000002c $d
+ /tmp/cct62l6h.s:280 .text.RCC_GetHCLKClockFreq:00000000 $t
+ /tmp/cct62l6h.s:286 .text.RCC_GetHCLKClockFreq:00000000 RCC_GetHCLKClockFreq
+ /tmp/cct62l6h.s:317 .text.RCC_GetHCLKClockFreq:00000010 $d
+ /tmp/cct62l6h.s:323 .text.RCC_GetPCLK1ClockFreq:00000000 $t
+ /tmp/cct62l6h.s:329 .text.RCC_GetPCLK1ClockFreq:00000000 RCC_GetPCLK1ClockFreq
+ /tmp/cct62l6h.s:360 .text.RCC_GetPCLK1ClockFreq:00000010 $d
+ /tmp/cct62l6h.s:366 .text.RCC_GetPCLK2ClockFreq:00000000 $t
+ /tmp/cct62l6h.s:372 .text.RCC_GetPCLK2ClockFreq:00000000 RCC_GetPCLK2ClockFreq
+ /tmp/cct62l6h.s:403 .text.RCC_GetPCLK2ClockFreq:00000010 $d
+ /tmp/cct62l6h.s:409 .text.RCC_PLL_GetFreqDomain_SYS:00000000 $t
+ /tmp/cct62l6h.s:415 .text.RCC_PLL_GetFreqDomain_SYS:00000000 RCC_PLL_GetFreqDomain_SYS
+ /tmp/cct62l6h.s:500 .text.RCC_PLL_GetFreqDomain_SYS:00000038 $d
+ /tmp/cct62l6h.s:507 .text.RCC_GetSystemClockFreq:00000000 $t
+ /tmp/cct62l6h.s:513 .text.RCC_GetSystemClockFreq:00000000 RCC_GetSystemClockFreq
+ /tmp/cct62l6h.s:567 .text.RCC_GetSystemClockFreq:00000020 $d
+ /tmp/cct62l6h.s:574 .text.LL_RCC_GetSystemClocksFreq:00000000 $t
+ /tmp/cct62l6h.s:580 .text.LL_RCC_GetSystemClocksFreq:00000000 LL_RCC_GetSystemClocksFreq
+ /tmp/cct62l6h.s:626 .text.LL_RCC_GetUSARTClockFreq:00000000 $t
+ /tmp/cct62l6h.s:632 .text.LL_RCC_GetUSARTClockFreq:00000000 LL_RCC_GetUSARTClockFreq
+ /tmp/cct62l6h.s:1032 .text.LL_RCC_GetUSARTClockFreq:00000160 $d
+ /tmp/cct62l6h.s:1042 .text.LL_RCC_GetUARTClockFreq:00000000 $t
+ /tmp/cct62l6h.s:1048 .text.LL_RCC_GetUARTClockFreq:00000000 LL_RCC_GetUARTClockFreq
+ /tmp/cct62l6h.s:1448 .text.LL_RCC_GetUARTClockFreq:00000168 $d
+ /tmp/cct62l6h.s:1458 .text.LL_RCC_GetI2CClockFreq:00000000 $t
+ /tmp/cct62l6h.s:1464 .text.LL_RCC_GetI2CClockFreq:00000000 LL_RCC_GetI2CClockFreq
+ /tmp/cct62l6h.s:1764 .text.LL_RCC_GetI2CClockFreq:00000108 $d
+ /tmp/cct62l6h.s:1774 .text.LL_RCC_GetLPTIMClockFreq:00000000 $t
+ /tmp/cct62l6h.s:1780 .text.LL_RCC_GetLPTIMClockFreq:00000000 LL_RCC_GetLPTIMClockFreq
+ /tmp/cct62l6h.s:1912 .text.LL_RCC_GetLPTIMClockFreq:00000064 $d
+ /tmp/cct62l6h.s:1918 .text.LL_RCC_GetDFSDMClockFreq:00000000 $t
+ /tmp/cct62l6h.s:1924 .text.LL_RCC_GetDFSDMClockFreq:00000000 LL_RCC_GetDFSDMClockFreq
+ /tmp/cct62l6h.s:1984 .text.LL_RCC_GetDFSDMClockFreq:00000024 $d
+ /tmp/cct62l6h.s:1989 .text.RCC_PLL_GetFreqDomain_48M:00000000 $t
+ /tmp/cct62l6h.s:1995 .text.RCC_PLL_GetFreqDomain_48M:00000000 RCC_PLL_GetFreqDomain_48M
+ /tmp/cct62l6h.s:2078 .text.RCC_PLL_GetFreqDomain_48M:00000034 $d
+ /tmp/cct62l6h.s:2085 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 $t
+ /tmp/cct62l6h.s:2091 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000000 RCC_PLLSAI_GetFreqDomain_SAI
+ /tmp/cct62l6h.s:2185 .text.RCC_PLLSAI_GetFreqDomain_SAI:00000044 $d
+ /tmp/cct62l6h.s:2192 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 $t
+ /tmp/cct62l6h.s:2198 .text.RCC_PLLSAI_GetFreqDomain_48M:00000000 RCC_PLLSAI_GetFreqDomain_48M
+ /tmp/cct62l6h.s:2283 .text.RCC_PLLSAI_GetFreqDomain_48M:0000003c $d
+ /tmp/cct62l6h.s:2290 .text.LL_RCC_GetSDMMCClockFreq:00000000 $t
+ /tmp/cct62l6h.s:2296 .text.LL_RCC_GetSDMMCClockFreq:00000000 LL_RCC_GetSDMMCClockFreq
+ /tmp/cct62l6h.s:2495 .text.LL_RCC_GetSDMMCClockFreq:00000090 $d
+ /tmp/cct62l6h.s:2500 .text.LL_RCC_GetRNGClockFreq:00000000 $t
+ /tmp/cct62l6h.s:2506 .text.LL_RCC_GetRNGClockFreq:00000000 LL_RCC_GetRNGClockFreq
+ /tmp/cct62l6h.s:2594 .text.LL_RCC_GetRNGClockFreq:00000030 $d
+ /tmp/cct62l6h.s:2599 .text.LL_RCC_GetUSBClockFreq:00000000 $t
+ /tmp/cct62l6h.s:2605 .text.LL_RCC_GetUSBClockFreq:00000000 LL_RCC_GetUSBClockFreq
+ ARM GAS /tmp/cct62l6h.s page 192
- /tmp/cct9WEL1.s:2693 .text.LL_RCC_GetUSBClockFreq:00000030 $d
- /tmp/cct9WEL1.s:2698 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 $t
- /tmp/cct9WEL1.s:2704 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 RCC_PLLSAI_GetFreqDomain_LTDC
- /tmp/cct9WEL1.s:2800 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000048 $d
- /tmp/cct9WEL1.s:3714 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 aRCC_PLLSAIDIVRPrescTable
- /tmp/cct9WEL1.s:2808 .text.LL_RCC_GetLTDCClockFreq:00000000 $t
- /tmp/cct9WEL1.s:2814 .text.LL_RCC_GetLTDCClockFreq:00000000 LL_RCC_GetLTDCClockFreq
- /tmp/cct9WEL1.s:2862 .text.LL_RCC_GetLTDCClockFreq:00000014 $d
- /tmp/cct9WEL1.s:2867 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 $t
- /tmp/cct9WEL1.s:2873 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 RCC_PLLI2S_GetFreqDomain_SAI
- /tmp/cct9WEL1.s:2968 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000044 $d
- /tmp/cct9WEL1.s:2975 .text.LL_RCC_GetSAIClockFreq:00000000 $t
- /tmp/cct9WEL1.s:2981 .text.LL_RCC_GetSAIClockFreq:00000000 LL_RCC_GetSAIClockFreq
- /tmp/cct9WEL1.s:3286 .text.LL_RCC_GetSAIClockFreq:00000108 $d
- /tmp/cct9WEL1.s:3295 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 $t
- /tmp/cct9WEL1.s:3301 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 LL_RCC_GetDFSDMAudioClockFreq
- /tmp/cct9WEL1.s:3360 .text.LL_RCC_GetDFSDMAudioClockFreq:00000020 $d
- /tmp/cct9WEL1.s:3365 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 $t
- /tmp/cct9WEL1.s:3371 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 RCC_PLLI2S_GetFreqDomain_SPDIFRX
- /tmp/cct9WEL1.s:3456 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:0000003c $d
- /tmp/cct9WEL1.s:3463 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 $t
- /tmp/cct9WEL1.s:3469 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 LL_RCC_GetSPDIFRXClockFreq
- /tmp/cct9WEL1.s:3517 .text.LL_RCC_GetSPDIFRXClockFreq:00000014 $d
- /tmp/cct9WEL1.s:3522 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 $t
- /tmp/cct9WEL1.s:3528 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 RCC_PLLI2S_GetFreqDomain_I2S
- /tmp/cct9WEL1.s:3610 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000038 $d
- /tmp/cct9WEL1.s:3617 .text.LL_RCC_GetI2SClockFreq:00000000 $t
- /tmp/cct9WEL1.s:3623 .text.LL_RCC_GetI2SClockFreq:00000000 LL_RCC_GetI2SClockFreq
- /tmp/cct9WEL1.s:3705 .text.LL_RCC_GetI2SClockFreq:0000002c $d
- /tmp/cct9WEL1.s:3711 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 $d
+ /tmp/cct62l6h.s:2693 .text.LL_RCC_GetUSBClockFreq:00000030 $d
+ /tmp/cct62l6h.s:2698 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 $t
+ /tmp/cct62l6h.s:2704 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000000 RCC_PLLSAI_GetFreqDomain_LTDC
+ /tmp/cct62l6h.s:2800 .text.RCC_PLLSAI_GetFreqDomain_LTDC:00000048 $d
+ /tmp/cct62l6h.s:3714 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 aRCC_PLLSAIDIVRPrescTable
+ /tmp/cct62l6h.s:2808 .text.LL_RCC_GetLTDCClockFreq:00000000 $t
+ /tmp/cct62l6h.s:2814 .text.LL_RCC_GetLTDCClockFreq:00000000 LL_RCC_GetLTDCClockFreq
+ /tmp/cct62l6h.s:2862 .text.LL_RCC_GetLTDCClockFreq:00000014 $d
+ /tmp/cct62l6h.s:2867 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 $t
+ /tmp/cct62l6h.s:2873 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000000 RCC_PLLI2S_GetFreqDomain_SAI
+ /tmp/cct62l6h.s:2968 .text.RCC_PLLI2S_GetFreqDomain_SAI:00000044 $d
+ /tmp/cct62l6h.s:2975 .text.LL_RCC_GetSAIClockFreq:00000000 $t
+ /tmp/cct62l6h.s:2981 .text.LL_RCC_GetSAIClockFreq:00000000 LL_RCC_GetSAIClockFreq
+ /tmp/cct62l6h.s:3286 .text.LL_RCC_GetSAIClockFreq:00000108 $d
+ /tmp/cct62l6h.s:3295 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 $t
+ /tmp/cct62l6h.s:3301 .text.LL_RCC_GetDFSDMAudioClockFreq:00000000 LL_RCC_GetDFSDMAudioClockFreq
+ /tmp/cct62l6h.s:3360 .text.LL_RCC_GetDFSDMAudioClockFreq:00000020 $d
+ /tmp/cct62l6h.s:3365 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 $t
+ /tmp/cct62l6h.s:3371 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:00000000 RCC_PLLI2S_GetFreqDomain_SPDIFRX
+ /tmp/cct62l6h.s:3456 .text.RCC_PLLI2S_GetFreqDomain_SPDIFRX:0000003c $d
+ /tmp/cct62l6h.s:3463 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 $t
+ /tmp/cct62l6h.s:3469 .text.LL_RCC_GetSPDIFRXClockFreq:00000000 LL_RCC_GetSPDIFRXClockFreq
+ /tmp/cct62l6h.s:3517 .text.LL_RCC_GetSPDIFRXClockFreq:00000014 $d
+ /tmp/cct62l6h.s:3522 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 $t
+ /tmp/cct62l6h.s:3528 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000000 RCC_PLLI2S_GetFreqDomain_I2S
+ /tmp/cct62l6h.s:3610 .text.RCC_PLLI2S_GetFreqDomain_I2S:00000038 $d
+ /tmp/cct62l6h.s:3617 .text.LL_RCC_GetI2SClockFreq:00000000 $t
+ /tmp/cct62l6h.s:3623 .text.LL_RCC_GetI2SClockFreq:00000000 LL_RCC_GetI2SClockFreq
+ /tmp/cct62l6h.s:3705 .text.LL_RCC_GetI2SClockFreq:0000002c $d
+ /tmp/cct62l6h.s:3711 .rodata.aRCC_PLLSAIDIVRPrescTable:00000000 $d
UNDEFINED SYMBOLS
AHBPrescTable
diff --git a/build/stm32f7xx_ll_sdmmc.lst b/build/stm32f7xx_ll_sdmmc.lst
index 72bc278..32064ac 100644
--- a/build/stm32f7xx_ll_sdmmc.lst
+++ b/build/stm32f7xx_ll_sdmmc.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cc7d48pz.s page 1
+ARM GAS /tmp/cceUajAB.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** devices.
- ARM GAS /tmp/cc7d48pz.s page 2
+ ARM GAS /tmp/cceUajAB.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** to the selected command to be sent.
- ARM GAS /tmp/cc7d48pz.s page 3
+ ARM GAS /tmp/cceUajAB.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** The parameters that should be filled are:
@@ -178,7 +178,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (#) Use the SDMMC flags/interrupts to check the transfer status.
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** *** Command management operations ***
- ARM GAS /tmp/cc7d48pz.s page 4
+ ARM GAS /tmp/cceUajAB.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** =====================================
@@ -238,7 +238,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /**
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Initializes the SDMMC according to the specified
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * parameters in the SDMMC_InitTypeDef and create the associated handle.
- ARM GAS /tmp/cc7d48pz.s page 5
+ ARM GAS /tmp/cceUajAB.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
@@ -298,7 +298,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
- ARM GAS /tmp/cc7d48pz.s page 6
+ ARM GAS /tmp/cceUajAB.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
@@ -358,7 +358,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
- ARM GAS /tmp/cc7d48pz.s page 7
+ ARM GAS /tmp/cceUajAB.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
@@ -418,7 +418,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /**
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Return the command index of last command for which response received
- ARM GAS /tmp/cc7d48pz.s page 8
+ ARM GAS /tmp/cceUajAB.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
@@ -478,7 +478,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Set the SDMMC DataLength value */
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMCx->DLEN = Data->DataLength;
- ARM GAS /tmp/cc7d48pz.s page 9
+ ARM GAS /tmp/cceUajAB.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -538,7 +538,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /**
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @}
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
- ARM GAS /tmp/cc7d48pz.s page 10
+ ARM GAS /tmp/cceUajAB.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -598,7 +598,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
- ARM GAS /tmp/cc7d48pz.s page 11
+ ARM GAS /tmp/cceUajAB.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -658,7 +658,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /**
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @brief Send the Write Multi Block command and check the response
- ARM GAS /tmp/cc7d48pz.s page 12
+ ARM GAS /tmp/cceUajAB.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
@@ -718,7 +718,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate;
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Set Block Size for Card */
- ARM GAS /tmp/cc7d48pz.s page 13
+ ARM GAS /tmp/cceUajAB.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
@@ -778,7 +778,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Check for error conditions */
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
- ARM GAS /tmp/cc7d48pz.s page 14
+ ARM GAS /tmp/cceUajAB.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -838,7 +838,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param SDMMCx: Pointer to SDMMC register base
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param addr: Address of the card to be selected
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status
- ARM GAS /tmp/cc7d48pz.s page 15
+ ARM GAS /tmp/cceUajAB.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
@@ -898,7 +898,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
827:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Argument: - [31:12]: Reserved (shall be set to '0')
828:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
829:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** - [7:0]: Check Pattern (recommended 0xAA) */
- ARM GAS /tmp/cc7d48pz.s page 16
+ ARM GAS /tmp/cceUajAB.s page 16
830:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* CMD Response: R7 */
@@ -958,7 +958,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
885:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = SDMMC_VOLTAGE_WINDOW_SD | Argument;
886:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
- ARM GAS /tmp/cc7d48pz.s page 17
+ ARM GAS /tmp/cceUajAB.s page 17
887:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
941:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT);
942:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
943:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return errorstate;
- ARM GAS /tmp/cc7d48pz.s page 18
+ ARM GAS /tmp/cceUajAB.s page 18
944:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
998:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @param pRCA: Card RCA
999:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @retval HAL status
1000:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
- ARM GAS /tmp/cc7d48pz.s page 19
+ ARM GAS /tmp/cceUajAB.s page 19
1001:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA)
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1055:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1056:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Argument = Argument;
1057:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
- ARM GAS /tmp/cc7d48pz.s page 20
+ ARM GAS /tmp/cceUajAB.s page 20
1058:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** errorstate = SDMMC_GetCmdResp3(SDMMCx);
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return errorstate;
- ARM GAS /tmp/cc7d48pz.s page 21
+ ARM GAS /tmp/cceUajAB.s page 21
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1169:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** * @}
1170:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** */
1171:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 22
+ ARM GAS /tmp/cceUajAB.s page 22
1172:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /** @defgroup HAL_SDMMC_LL_Group5 Responses management functions
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1227:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* Clear all the static flags */
1228:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
- ARM GAS /tmp/cc7d48pz.s page 23
+ ARM GAS /tmp/cceUajAB.s page 23
1229:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1283:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_CC_ERR;
- ARM GAS /tmp/cc7d48pz.s page 24
+ ARM GAS /tmp/cceUajAB.s page 24
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
1341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 25
+ ARM GAS /tmp/cceUajAB.s page 25
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
1398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_NONE;
- ARM GAS /tmp/cc7d48pz.s page 26
+ ARM GAS /tmp/cceUajAB.s page 26
1400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** /* We have received response, retrieve it. */
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
- ARM GAS /tmp/cc7d48pz.s page 27
+ ARM GAS /tmp/cceUajAB.s page 27
1457:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1511:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1512:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return SDMMC_ERROR_CMD_CRC_FAIL;
1513:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
- ARM GAS /tmp/cc7d48pz.s page 28
+ ARM GAS /tmp/cceUajAB.s page 28
1514:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** else
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1550:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
1551:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** if (count-- == 0U)
46 .loc 1 1551 5 view .LVU5
- ARM GAS /tmp/cc7d48pz.s page 29
+ ARM GAS /tmp/cceUajAB.s page 29
47 0014 1A46 mov r2, r3
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
90 .thumb_func
92 SDMMC_Init:
93 .LVL7:
- ARM GAS /tmp/cc7d48pz.s page 30
+ ARM GAS /tmp/cceUajAB.s page 30
94 .LFB141:
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
130 0018 1343 orrs r3, r3, r2
226:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** );
131 .loc 1 226 18 view .LVU36
- ARM GAS /tmp/cc7d48pz.s page 31
+ ARM GAS /tmp/cceUajAB.s page 31
132 001a 069A ldr r2, [sp, #24]
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
264:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
179 .loc 1 264 1 view .LVU46
180 0004 7047 bx lr
- ARM GAS /tmp/cc7d48pz.s page 32
+ ARM GAS /tmp/cceUajAB.s page 32
181 .cfi_endproc
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
229 .loc 1 307 17 is_stmt 0 view .LVU56
230 0000 0323 movs r3, #3
231 0002 0360 str r3, [r0]
- ARM GAS /tmp/cc7d48pz.s page 33
+ ARM GAS /tmp/cceUajAB.s page 33
309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
335:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
280 .loc 1 335 1 is_stmt 1 view -0
281 .cfi_startproc
- ARM GAS /tmp/cc7d48pz.s page 34
+ ARM GAS /tmp/cceUajAB.s page 34
282 @ args = 0, pretend = 0, frame = 0
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
323 .loc 1 362 31 view .LVU82
324 0006 8A68 ldr r2, [r1, #8]
361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** Command->Response |\
- ARM GAS /tmp/cc7d48pz.s page 35
+ ARM GAS /tmp/cceUajAB.s page 35
325 .loc 1 361 50 view .LVU83
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
369 .loc 1 379 26 is_stmt 0 view .LVU95
370 0000 0069 ldr r0, [r0, #16]
371 .LVL28:
- ARM GAS /tmp/cc7d48pz.s page 36
+ ARM GAS /tmp/cceUajAB.s page 36
380:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
420 @ args = 0, pretend = 0, frame = 0
421 @ frame_needed = 0, uses_anonymous_args = 0
422 @ link register save eliminated.
- ARM GAS /tmp/cc7d48pz.s page 37
+ ARM GAS /tmp/cceUajAB.s page 37
417:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
456 0016 C26A ldr r2, [r0, #44]
457 0018 22F0F702 bic r2, r2, #247
458 001c 1343 orrs r3, r3, r2
- ARM GAS /tmp/cc7d48pz.s page 38
+ ARM GAS /tmp/cceUajAB.s page 38
459 .LVL34:
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
508 @ args = 0, pretend = 0, frame = 0
509 @ frame_needed = 0, uses_anonymous_args = 0
510 @ link register save eliminated.
- ARM GAS /tmp/cc7d48pz.s page 39
+ ARM GAS /tmp/cceUajAB.s page 39
462:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
799:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit;
560 .loc 1 799 1 is_stmt 1 view -0
561 .cfi_startproc
- ARM GAS /tmp/cc7d48pz.s page 40
+ ARM GAS /tmp/cceUajAB.s page 40
562 @ args = 0, pretend = 0, frame = 24
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
599 .loc 1 811 16 is_stmt 0 view .LVU162
600 001c 2046 mov r0, r4
601 001e FFF7FEFF bl SDMMC_GetCmdError
- ARM GAS /tmp/cc7d48pz.s page 41
+ ARM GAS /tmp/cceUajAB.s page 41
602 .LVL45:
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
648 0010 5B0A lsrs r3, r3, #9
1198:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
649 .loc 1 1198 12 view .LVU173
- ARM GAS /tmp/cc7d48pz.s page 42
+ ARM GAS /tmp/cceUajAB.s page 42
650 0012 03FB02F2 mul r2, r3, r2
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
688 .loc 1 1218 5 is_stmt 0 view .LVU189
689 003e A063 str r0, [r4, #56]
1220:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
- ARM GAS /tmp/cc7d48pz.s page 43
+ ARM GAS /tmp/cceUajAB.s page 43
690 .loc 1 1220 5 is_stmt 1 view .LVU190
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
730 .LVL59:
1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
731 .loc 1 1239 3 is_stmt 1 view .LVU205
- ARM GAS /tmp/cc7d48pz.s page 44
+ ARM GAS /tmp/cceUajAB.s page 44
1239:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
768 .loc 1 1271 10 is_stmt 0 view .LVU224
769 0092 13F4000F tst r3, #8388608
- ARM GAS /tmp/cc7d48pz.s page 45
+ ARM GAS /tmp/cceUajAB.s page 45
770 0096 36D1 bne .L39
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
806 00cc 36D1 bne .L48
1311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
807 .loc 1 1311 8 is_stmt 1 view .LVU243
- ARM GAS /tmp/cc7d48pz.s page 46
+ ARM GAS /tmp/cceUajAB.s page 46
1311:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
851 .L39:
1273:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
852 .loc 1 1273 12 view .LVU255
- ARM GAS /tmp/cc7d48pz.s page 47
+ ARM GAS /tmp/cceUajAB.s page 47
853 0106 4FF48050 mov r0, #4096
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
897 .L53:
898 0148 00000000 .word SystemCoreClock
899 014c D34D6210 .word 274877907
- ARM GAS /tmp/cc7d48pz.s page 48
+ ARM GAS /tmp/cceUajAB.s page 48
900 0150 08E0FFFD .word -33562616
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
944 0010 0023 movs r3, #0
945 0012 0493 str r3, [sp, #16]
519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
- ARM GAS /tmp/cc7d48pz.s page 49
+ ARM GAS /tmp/cceUajAB.s page 49
946 .loc 1 519 3 is_stmt 1 view .LVU278
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
991 .LCFI9:
992 .cfi_def_cfa_offset 12
993 .cfi_offset 4, -12
- ARM GAS /tmp/cc7d48pz.s page 50
+ ARM GAS /tmp/cceUajAB.s page 50
994 .cfi_offset 5, -8
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1031 0024 2946 mov r1, r5
1032 0026 2046 mov r0, r4
1033 0028 FFF7FEFF bl SDMMC_GetCmdResp1
- ARM GAS /tmp/cc7d48pz.s page 51
+ ARM GAS /tmp/cceUajAB.s page 51
1034 .LVL71:
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1079 000a 0295 str r5, [sp, #8]
565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1080 .loc 1 565 3 is_stmt 1 view .LVU318
- ARM GAS /tmp/cc7d48pz.s page 52
+ ARM GAS /tmp/cceUajAB.s page 52
565:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1124 SDMMC_CmdWriteSingleBlock:
1125 .LVL76:
1126 .LFB157:
- ARM GAS /tmp/cc7d48pz.s page 53
+ ARM GAS /tmp/cceUajAB.s page 53
582:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit;
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1165 001a 01A9 add r1, sp, #4
1166 .LVL77:
592:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 54
+ ARM GAS /tmp/cceUajAB.s page 54
1167 .loc 1 592 9 view .LVU348
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1214 .loc 1 608 3 view .LVU357
611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
1215 .loc 1 611 3 view .LVU358
- ARM GAS /tmp/cc7d48pz.s page 55
+ ARM GAS /tmp/cceUajAB.s page 55
611:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1254 002e 30BD pop {r4, r5, pc}
622:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1255 .loc 1 622 1 view .LVU375
- ARM GAS /tmp/cc7d48pz.s page 56
+ ARM GAS /tmp/cceUajAB.s page 56
1256 .cfi_endproc
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1300 0012 0493 str r3, [sp, #16]
639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1301 .loc 1 639 3 is_stmt 1 view .LVU388
- ARM GAS /tmp/cc7d48pz.s page 57
+ ARM GAS /tmp/cceUajAB.s page 57
639:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1347 .cfi_def_cfa_offset 12
1348 .cfi_offset 4, -12
1349 .cfi_offset 5, -8
- ARM GAS /tmp/cc7d48pz.s page 58
+ ARM GAS /tmp/cceUajAB.s page 58
1350 .cfi_offset 14, -4
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1387 0026 2046 mov r0, r4
1388 0028 FFF7FEFF bl SDMMC_GetCmdResp1
1389 .LVL91:
- ARM GAS /tmp/cc7d48pz.s page 59
+ ARM GAS /tmp/cceUajAB.s page 59
669:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1435 .loc 1 685 3 is_stmt 1 view .LVU428
685:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
- ARM GAS /tmp/cc7d48pz.s page 60
+ ARM GAS /tmp/cceUajAB.s page 60
1436 .loc 1 685 34 is_stmt 0 view .LVU429
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1480 .LVL96:
1481 .LFB162:
702:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit;
- ARM GAS /tmp/cc7d48pz.s page 61
+ ARM GAS /tmp/cceUajAB.s page 61
1482 .loc 1 702 1 is_stmt 1 view -0
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1521 .LVL97:
712:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1522 .loc 1 712 9 view .LVU458
- ARM GAS /tmp/cc7d48pz.s page 62
+ ARM GAS /tmp/cceUajAB.s page 62
1523 001c FFF7FEFF bl SDMMC_SendCommand
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
1570 .loc 1 731 3 view .LVU468
731:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
- ARM GAS /tmp/cc7d48pz.s page 63
+ ARM GAS /tmp/cceUajAB.s page 63
1571 .loc 1 731 34 is_stmt 0 view .LVU469
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1610 .LFE163:
1612 .section .text.SDMMC_CmdStopTransfer,"ax",%progbits
1613 .align 1
- ARM GAS /tmp/cc7d48pz.s page 64
+ ARM GAS /tmp/cceUajAB.s page 64
1614 .global SDMMC_CmdStopTransfer
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1655 .loc 1 759 34 is_stmt 0 view .LVU498
1656 0014 4FF48063 mov r3, #1024
1657 0018 0593 str r3, [sp, #20]
- ARM GAS /tmp/cc7d48pz.s page 65
+ ARM GAS /tmp/cceUajAB.s page 65
760:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1705 .cfi_offset 5, -8
1706 .cfi_offset 14, -4
1707 0002 87B0 sub sp, sp, #28
- ARM GAS /tmp/cc7d48pz.s page 66
+ ARM GAS /tmp/cceUajAB.s page 66
1708 .LCFI40:
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
791:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1745 .loc 1 791 1 is_stmt 0 view .LVU525
1746 002c 07B0 add sp, sp, #28
- ARM GAS /tmp/cc7d48pz.s page 67
+ ARM GAS /tmp/cceUajAB.s page 67
1747 .LCFI41:
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1792 000e 0393 str r3, [sp, #12]
860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1793 .loc 1 860 3 is_stmt 1 view .LVU537
- ARM GAS /tmp/cc7d48pz.s page 68
+ ARM GAS /tmp/cceUajAB.s page 68
860:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1838 @ args = 0, pretend = 0, frame = 24
1839 @ frame_needed = 0, uses_anonymous_args = 0
905:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** SDMMC_CmdInitTypeDef sdmmc_cmdinit;
- ARM GAS /tmp/cc7d48pz.s page 69
+ ARM GAS /tmp/cceUajAB.s page 69
1840 .loc 1 905 1 is_stmt 0 view .LVU550
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
1879 .loc 1 917 3 is_stmt 1 view .LVU566
917:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 70
+ ARM GAS /tmp/cceUajAB.s page 70
1880 .loc 1 917 16 is_stmt 0 view .LVU567
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1927 0008 0193 str r3, [sp, #4]
934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1928 .loc 1 934 3 is_stmt 1 view .LVU577
- ARM GAS /tmp/cc7d48pz.s page 71
+ ARM GAS /tmp/cceUajAB.s page 71
934:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1970 .thumb
1971 .thumb_func
1973 SDMMC_CmdSetRelAddMmc:
- ARM GAS /tmp/cc7d48pz.s page 72
+ ARM GAS /tmp/cceUajAB.s page 72
1974 .LVL121:
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2013 0016 4FF48063 mov r3, #1024
2014 001a 0593 str r3, [sp, #20]
1037:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 73
+ ARM GAS /tmp/cceUajAB.s page 73
2015 .loc 1 1037 3 is_stmt 1 view .LVU607
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1053:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate;
2063 .loc 1 1053 3 is_stmt 1 view .LVU616
1054:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 74
+ ARM GAS /tmp/cceUajAB.s page 74
2064 .loc 1 1054 3 view .LVU617
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2101 .LCFI56:
2102 .cfi_def_cfa_offset 12
2103 @ sp needed
- ARM GAS /tmp/cc7d48pz.s page 75
+ ARM GAS /tmp/cceUajAB.s page 75
2104 002e 30BD pop {r4, r5, pc}
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2148 .loc 1 1082 3 is_stmt 1 view .LVU646
1082:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
2149 .loc 1 1082 34 is_stmt 0 view .LVU647
- ARM GAS /tmp/cc7d48pz.s page 76
+ ARM GAS /tmp/cceUajAB.s page 76
2150 0012 0493 str r3, [sp, #16]
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2195 .cfi_def_cfa_offset 12
2196 .cfi_offset 4, -12
2197 .cfi_offset 5, -8
- ARM GAS /tmp/cc7d48pz.s page 77
+ ARM GAS /tmp/cceUajAB.s page 77
2198 .cfi_offset 14, -4
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2235 0026 2046 mov r0, r4
2236 0028 FFF7FEFF bl SDMMC_GetCmdResp1
2237 .LVL135:
- ARM GAS /tmp/cc7d48pz.s page 78
+ ARM GAS /tmp/cceUajAB.s page 78
1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
2283 .loc 1 1157 3 is_stmt 1 view .LVU687
1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
- ARM GAS /tmp/cc7d48pz.s page 79
+ ARM GAS /tmp/cceUajAB.s page 79
2284 .loc 1 1157 34 is_stmt 0 view .LVU688
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2328 .LVL140:
2329 .LFB182:
1327:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t sta_reg;
- ARM GAS /tmp/cc7d48pz.s page 80
+ ARM GAS /tmp/cceUajAB.s page 80
2330 .loc 1 1327 1 is_stmt 1 view -0
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2369 .loc 1 1343 7 is_stmt 0 view .LVU716
2370 002a 4B6B ldr r3, [r1, #52]
2371 .LVL144:
- ARM GAS /tmp/cc7d48pz.s page 81
+ ARM GAS /tmp/cceUajAB.s page 81
1343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2410 .loc 1 1363 1 view .LVU732
2411 0050 7047 bx lr
2412 .L106:
- ARM GAS /tmp/cc7d48pz.s page 82
+ ARM GAS /tmp/cceUajAB.s page 82
2413 0052 00BF .align 2
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2458 .loc 1 960 3 is_stmt 1 view .LVU743
960:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
2459 .loc 1 960 34 is_stmt 0 view .LVU744
- ARM GAS /tmp/cc7d48pz.s page 83
+ ARM GAS /tmp/cceUajAB.s page 83
2460 0012 0493 str r3, [sp, #16]
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2505 .cfi_offset 14, -4
2506 0002 86B0 sub sp, sp, #24
2507 .LCFI70:
- ARM GAS /tmp/cc7d48pz.s page 84
+ ARM GAS /tmp/cceUajAB.s page 84
2508 .cfi_def_cfa_offset 32
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
993:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
2544 .loc 1 993 1 is_stmt 0 view .LVU774
2545 0026 06B0 add sp, sp, #24
- ARM GAS /tmp/cc7d48pz.s page 85
+ ARM GAS /tmp/cceUajAB.s page 85
2546 .LCFI71:
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2591 001a 82B1 cbz r2, .L115
1383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
2592 .loc 1 1383 5 is_stmt 1 view .LVU786
- ARM GAS /tmp/cc7d48pz.s page 86
+ ARM GAS /tmp/cceUajAB.s page 86
1383:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2632 .L118:
2633 .align 2
2634 .L117:
- ARM GAS /tmp/cc7d48pz.s page 87
+ ARM GAS /tmp/cceUajAB.s page 87
2635 0044 00000000 .word SystemCoreClock
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
2680 .loc 1 888 3 is_stmt 1 view .LVU813
888:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
- ARM GAS /tmp/cc7d48pz.s page 88
+ ARM GAS /tmp/cceUajAB.s page 88
2681 .loc 1 888 34 is_stmt 0 view .LVU814
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2726 .loc 1 1100 1 is_stmt 1 view -0
2727 .cfi_startproc
2728 @ args = 0, pretend = 0, frame = 24
- ARM GAS /tmp/cc7d48pz.s page 89
+ ARM GAS /tmp/cceUajAB.s page 89
2729 @ frame_needed = 0, uses_anonymous_args = 0
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2767 .LVL173:
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
2768 .loc 1 1112 3 is_stmt 1 view .LVU842
- ARM GAS /tmp/cc7d48pz.s page 90
+ ARM GAS /tmp/cceUajAB.s page 90
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2815 0008 234B ldr r3, .L139
2816 000a 1B68 ldr r3, [r3]
2817 000c 234A ldr r2, .L139+4
- ARM GAS /tmp/cc7d48pz.s page 91
+ ARM GAS /tmp/cceUajAB.s page 91
2818 .LVL176:
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2856 003a 13F0010F tst r3, #1
2857 003e 05D0 beq .L129
1437:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 92
+ ARM GAS /tmp/cceUajAB.s page 92
2858 .loc 1 1437 5 is_stmt 1 view .LVU869
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
2897 .loc 1 1456 17 is_stmt 0 view .LVU885
2898 005e 0021 movs r1, #0
- ARM GAS /tmp/cc7d48pz.s page 93
+ ARM GAS /tmp/cceUajAB.s page 93
2899 0060 2846 mov r0, r5
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
2938 008a F8BD pop {r3, r4, r5, r6, r7, pc}
2939 .LVL193:
2940 .L133:
- ARM GAS /tmp/cc7d48pz.s page 94
+ ARM GAS /tmp/cceUajAB.s page 94
1466:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** }
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
1008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
2989 .loc 1 1008 3 is_stmt 1 view .LVU909
1008:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
- ARM GAS /tmp/cc7d48pz.s page 95
+ ARM GAS /tmp/cceUajAB.s page 95
2990 .loc 1 1008 34 is_stmt 0 view .LVU910
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
3031 .global SDMMC_GetCmdResp7
3032 .syntax unified
3033 .thumb
- ARM GAS /tmp/cc7d48pz.s page 96
+ ARM GAS /tmp/cceUajAB.s page 96
3034 .thumb_func
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
3075 0024 12F4006F tst r2, #2048
3076 0028 F5D1 bne .L145
1500:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** {
- ARM GAS /tmp/cc7d48pz.s page 97
+ ARM GAS /tmp/cceUajAB.s page 97
3077 .loc 1 1500 3 is_stmt 1 view .LVU939
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
3115 004e 7047 bx lr
3116 .LVL207:
3117 .L150:
- ARM GAS /tmp/cc7d48pz.s page 98
+ ARM GAS /tmp/cceUajAB.s page 98
1510:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
823:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c **** uint32_t errorstate;
3166 .loc 1 823 3 is_stmt 1 view .LVU964
824:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
- ARM GAS /tmp/cc7d48pz.s page 99
+ ARM GAS /tmp/cceUajAB.s page 99
3167 .loc 1 824 3 view .LVU965
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/cc7d48pz.s page 1
842:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_sdmmc.c ****
3205 .loc 1 842 1 view .LVU982
3206 .cfi_endproc
- ARM GAS /tmp/cc7d48pz.s page 100
+ ARM GAS /tmp/cceUajAB.s page 100
3207 .LFE167:
@@ -5949,115 +5949,115 @@ ARM GAS /tmp/cc7d48pz.s page 1
3213 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h"
3214 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h"
3215 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
- ARM GAS /tmp/cc7d48pz.s page 101
+ ARM GAS /tmp/cceUajAB.s page 101
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_sdmmc.c
- /tmp/cc7d48pz.s:20 .text.SDMMC_GetCmdError:00000000 $t
- /tmp/cc7d48pz.s:25 .text.SDMMC_GetCmdError:00000000 SDMMC_GetCmdError
- /tmp/cc7d48pz.s:80 .text.SDMMC_GetCmdError:00000030 $d
- /tmp/cc7d48pz.s:86 .text.SDMMC_Init:00000000 $t
- /tmp/cc7d48pz.s:92 .text.SDMMC_Init:00000000 SDMMC_Init
- /tmp/cc7d48pz.s:156 .text.SDMMC_Init:00000030 $d
- /tmp/cc7d48pz.s:161 .text.SDMMC_ReadFIFO:00000000 $t
- /tmp/cc7d48pz.s:167 .text.SDMMC_ReadFIFO:00000000 SDMMC_ReadFIFO
- /tmp/cc7d48pz.s:185 .text.SDMMC_WriteFIFO:00000000 $t
- /tmp/cc7d48pz.s:191 .text.SDMMC_WriteFIFO:00000000 SDMMC_WriteFIFO
- /tmp/cc7d48pz.s:214 .text.SDMMC_PowerState_ON:00000000 $t
- /tmp/cc7d48pz.s:220 .text.SDMMC_PowerState_ON:00000000 SDMMC_PowerState_ON
- /tmp/cc7d48pz.s:242 .text.SDMMC_PowerState_OFF:00000000 $t
- /tmp/cc7d48pz.s:248 .text.SDMMC_PowerState_OFF:00000000 SDMMC_PowerState_OFF
- /tmp/cc7d48pz.s:271 .text.SDMMC_GetPowerState:00000000 $t
- /tmp/cc7d48pz.s:277 .text.SDMMC_GetPowerState:00000000 SDMMC_GetPowerState
- /tmp/cc7d48pz.s:296 .text.SDMMC_SendCommand:00000000 $t
- /tmp/cc7d48pz.s:302 .text.SDMMC_SendCommand:00000000 SDMMC_SendCommand
- /tmp/cc7d48pz.s:354 .text.SDMMC_GetCommandResponse:00000000 $t
- /tmp/cc7d48pz.s:360 .text.SDMMC_GetCommandResponse:00000000 SDMMC_GetCommandResponse
- /tmp/cc7d48pz.s:379 .text.SDMMC_GetResponse:00000000 $t
- /tmp/cc7d48pz.s:385 .text.SDMMC_GetResponse:00000000 SDMMC_GetResponse
- /tmp/cc7d48pz.s:409 .text.SDMMC_ConfigData:00000000 $t
- /tmp/cc7d48pz.s:415 .text.SDMMC_ConfigData:00000000 SDMMC_ConfigData
- /tmp/cc7d48pz.s:473 .text.SDMMC_GetDataCounter:00000000 $t
- /tmp/cc7d48pz.s:479 .text.SDMMC_GetDataCounter:00000000 SDMMC_GetDataCounter
- /tmp/cc7d48pz.s:497 .text.SDMMC_GetFIFOCount:00000000 $t
- /tmp/cc7d48pz.s:503 .text.SDMMC_GetFIFOCount:00000000 SDMMC_GetFIFOCount
- /tmp/cc7d48pz.s:521 .text.SDMMC_SetSDMMCReadWaitMode:00000000 $t
- /tmp/cc7d48pz.s:527 .text.SDMMC_SetSDMMCReadWaitMode:00000000 SDMMC_SetSDMMCReadWaitMode
- /tmp/cc7d48pz.s:551 .text.SDMMC_CmdGoIdleState:00000000 $t
- /tmp/cc7d48pz.s:557 .text.SDMMC_CmdGoIdleState:00000000 SDMMC_CmdGoIdleState
- /tmp/cc7d48pz.s:615 .text.SDMMC_GetCmdResp1:00000000 $t
- /tmp/cc7d48pz.s:621 .text.SDMMC_GetCmdResp1:00000000 SDMMC_GetCmdResp1
- /tmp/cc7d48pz.s:898 .text.SDMMC_GetCmdResp1:00000148 $d
- /tmp/cc7d48pz.s:905 .text.SDMMC_CmdBlockLength:00000000 $t
- /tmp/cc7d48pz.s:911 .text.SDMMC_CmdBlockLength:00000000 SDMMC_CmdBlockLength
- /tmp/cc7d48pz.s:976 .text.SDMMC_CmdReadSingleBlock:00000000 $t
- /tmp/cc7d48pz.s:982 .text.SDMMC_CmdReadSingleBlock:00000000 SDMMC_CmdReadSingleBlock
- /tmp/cc7d48pz.s:1047 .text.SDMMC_CmdReadMultiBlock:00000000 $t
- /tmp/cc7d48pz.s:1053 .text.SDMMC_CmdReadMultiBlock:00000000 SDMMC_CmdReadMultiBlock
- /tmp/cc7d48pz.s:1118 .text.SDMMC_CmdWriteSingleBlock:00000000 $t
- /tmp/cc7d48pz.s:1124 .text.SDMMC_CmdWriteSingleBlock:00000000 SDMMC_CmdWriteSingleBlock
- /tmp/cc7d48pz.s:1189 .text.SDMMC_CmdWriteMultiBlock:00000000 $t
- /tmp/cc7d48pz.s:1195 .text.SDMMC_CmdWriteMultiBlock:00000000 SDMMC_CmdWriteMultiBlock
- /tmp/cc7d48pz.s:1260 .text.SDMMC_CmdSDEraseStartAdd:00000000 $t
- /tmp/cc7d48pz.s:1266 .text.SDMMC_CmdSDEraseStartAdd:00000000 SDMMC_CmdSDEraseStartAdd
- /tmp/cc7d48pz.s:1331 .text.SDMMC_CmdSDEraseEndAdd:00000000 $t
- /tmp/cc7d48pz.s:1337 .text.SDMMC_CmdSDEraseEndAdd:00000000 SDMMC_CmdSDEraseEndAdd
- /tmp/cc7d48pz.s:1402 .text.SDMMC_CmdEraseStartAdd:00000000 $t
- /tmp/cc7d48pz.s:1408 .text.SDMMC_CmdEraseStartAdd:00000000 SDMMC_CmdEraseStartAdd
- /tmp/cc7d48pz.s:1473 .text.SDMMC_CmdEraseEndAdd:00000000 $t
- /tmp/cc7d48pz.s:1479 .text.SDMMC_CmdEraseEndAdd:00000000 SDMMC_CmdEraseEndAdd
- /tmp/cc7d48pz.s:1544 .text.SDMMC_CmdErase:00000000 $t
- /tmp/cc7d48pz.s:1550 .text.SDMMC_CmdErase:00000000 SDMMC_CmdErase
- ARM GAS /tmp/cc7d48pz.s page 102
+ /tmp/cceUajAB.s:20 .text.SDMMC_GetCmdError:00000000 $t
+ /tmp/cceUajAB.s:25 .text.SDMMC_GetCmdError:00000000 SDMMC_GetCmdError
+ /tmp/cceUajAB.s:80 .text.SDMMC_GetCmdError:00000030 $d
+ /tmp/cceUajAB.s:86 .text.SDMMC_Init:00000000 $t
+ /tmp/cceUajAB.s:92 .text.SDMMC_Init:00000000 SDMMC_Init
+ /tmp/cceUajAB.s:156 .text.SDMMC_Init:00000030 $d
+ /tmp/cceUajAB.s:161 .text.SDMMC_ReadFIFO:00000000 $t
+ /tmp/cceUajAB.s:167 .text.SDMMC_ReadFIFO:00000000 SDMMC_ReadFIFO
+ /tmp/cceUajAB.s:185 .text.SDMMC_WriteFIFO:00000000 $t
+ /tmp/cceUajAB.s:191 .text.SDMMC_WriteFIFO:00000000 SDMMC_WriteFIFO
+ /tmp/cceUajAB.s:214 .text.SDMMC_PowerState_ON:00000000 $t
+ /tmp/cceUajAB.s:220 .text.SDMMC_PowerState_ON:00000000 SDMMC_PowerState_ON
+ /tmp/cceUajAB.s:242 .text.SDMMC_PowerState_OFF:00000000 $t
+ /tmp/cceUajAB.s:248 .text.SDMMC_PowerState_OFF:00000000 SDMMC_PowerState_OFF
+ /tmp/cceUajAB.s:271 .text.SDMMC_GetPowerState:00000000 $t
+ /tmp/cceUajAB.s:277 .text.SDMMC_GetPowerState:00000000 SDMMC_GetPowerState
+ /tmp/cceUajAB.s:296 .text.SDMMC_SendCommand:00000000 $t
+ /tmp/cceUajAB.s:302 .text.SDMMC_SendCommand:00000000 SDMMC_SendCommand
+ /tmp/cceUajAB.s:354 .text.SDMMC_GetCommandResponse:00000000 $t
+ /tmp/cceUajAB.s:360 .text.SDMMC_GetCommandResponse:00000000 SDMMC_GetCommandResponse
+ /tmp/cceUajAB.s:379 .text.SDMMC_GetResponse:00000000 $t
+ /tmp/cceUajAB.s:385 .text.SDMMC_GetResponse:00000000 SDMMC_GetResponse
+ /tmp/cceUajAB.s:409 .text.SDMMC_ConfigData:00000000 $t
+ /tmp/cceUajAB.s:415 .text.SDMMC_ConfigData:00000000 SDMMC_ConfigData
+ /tmp/cceUajAB.s:473 .text.SDMMC_GetDataCounter:00000000 $t
+ /tmp/cceUajAB.s:479 .text.SDMMC_GetDataCounter:00000000 SDMMC_GetDataCounter
+ /tmp/cceUajAB.s:497 .text.SDMMC_GetFIFOCount:00000000 $t
+ /tmp/cceUajAB.s:503 .text.SDMMC_GetFIFOCount:00000000 SDMMC_GetFIFOCount
+ /tmp/cceUajAB.s:521 .text.SDMMC_SetSDMMCReadWaitMode:00000000 $t
+ /tmp/cceUajAB.s:527 .text.SDMMC_SetSDMMCReadWaitMode:00000000 SDMMC_SetSDMMCReadWaitMode
+ /tmp/cceUajAB.s:551 .text.SDMMC_CmdGoIdleState:00000000 $t
+ /tmp/cceUajAB.s:557 .text.SDMMC_CmdGoIdleState:00000000 SDMMC_CmdGoIdleState
+ /tmp/cceUajAB.s:615 .text.SDMMC_GetCmdResp1:00000000 $t
+ /tmp/cceUajAB.s:621 .text.SDMMC_GetCmdResp1:00000000 SDMMC_GetCmdResp1
+ /tmp/cceUajAB.s:898 .text.SDMMC_GetCmdResp1:00000148 $d
+ /tmp/cceUajAB.s:905 .text.SDMMC_CmdBlockLength:00000000 $t
+ /tmp/cceUajAB.s:911 .text.SDMMC_CmdBlockLength:00000000 SDMMC_CmdBlockLength
+ /tmp/cceUajAB.s:976 .text.SDMMC_CmdReadSingleBlock:00000000 $t
+ /tmp/cceUajAB.s:982 .text.SDMMC_CmdReadSingleBlock:00000000 SDMMC_CmdReadSingleBlock
+ /tmp/cceUajAB.s:1047 .text.SDMMC_CmdReadMultiBlock:00000000 $t
+ /tmp/cceUajAB.s:1053 .text.SDMMC_CmdReadMultiBlock:00000000 SDMMC_CmdReadMultiBlock
+ /tmp/cceUajAB.s:1118 .text.SDMMC_CmdWriteSingleBlock:00000000 $t
+ /tmp/cceUajAB.s:1124 .text.SDMMC_CmdWriteSingleBlock:00000000 SDMMC_CmdWriteSingleBlock
+ /tmp/cceUajAB.s:1189 .text.SDMMC_CmdWriteMultiBlock:00000000 $t
+ /tmp/cceUajAB.s:1195 .text.SDMMC_CmdWriteMultiBlock:00000000 SDMMC_CmdWriteMultiBlock
+ /tmp/cceUajAB.s:1260 .text.SDMMC_CmdSDEraseStartAdd:00000000 $t
+ /tmp/cceUajAB.s:1266 .text.SDMMC_CmdSDEraseStartAdd:00000000 SDMMC_CmdSDEraseStartAdd
+ /tmp/cceUajAB.s:1331 .text.SDMMC_CmdSDEraseEndAdd:00000000 $t
+ /tmp/cceUajAB.s:1337 .text.SDMMC_CmdSDEraseEndAdd:00000000 SDMMC_CmdSDEraseEndAdd
+ /tmp/cceUajAB.s:1402 .text.SDMMC_CmdEraseStartAdd:00000000 $t
+ /tmp/cceUajAB.s:1408 .text.SDMMC_CmdEraseStartAdd:00000000 SDMMC_CmdEraseStartAdd
+ /tmp/cceUajAB.s:1473 .text.SDMMC_CmdEraseEndAdd:00000000 $t
+ /tmp/cceUajAB.s:1479 .text.SDMMC_CmdEraseEndAdd:00000000 SDMMC_CmdEraseEndAdd
+ /tmp/cceUajAB.s:1544 .text.SDMMC_CmdErase:00000000 $t
+ /tmp/cceUajAB.s:1550 .text.SDMMC_CmdErase:00000000 SDMMC_CmdErase
+ ARM GAS /tmp/cceUajAB.s page 102
- /tmp/cc7d48pz.s:1613 .text.SDMMC_CmdStopTransfer:00000000 $t
- /tmp/cc7d48pz.s:1619 .text.SDMMC_CmdStopTransfer:00000000 SDMMC_CmdStopTransfer
- /tmp/cc7d48pz.s:1682 .text.SDMMC_CmdStopTransfer:00000030 $d
- /tmp/cc7d48pz.s:1687 .text.SDMMC_CmdSelDesel:00000000 $t
- /tmp/cc7d48pz.s:1693 .text.SDMMC_CmdSelDesel:00000000 SDMMC_CmdSelDesel
- /tmp/cc7d48pz.s:1756 .text.SDMMC_CmdAppCommand:00000000 $t
- /tmp/cc7d48pz.s:1762 .text.SDMMC_CmdAppCommand:00000000 SDMMC_CmdAppCommand
- /tmp/cc7d48pz.s:1827 .text.SDMMC_CmdBusWidth:00000000 $t
- /tmp/cc7d48pz.s:1833 .text.SDMMC_CmdBusWidth:00000000 SDMMC_CmdBusWidth
- /tmp/cc7d48pz.s:1898 .text.SDMMC_CmdSendSCR:00000000 $t
- /tmp/cc7d48pz.s:1904 .text.SDMMC_CmdSendSCR:00000000 SDMMC_CmdSendSCR
- /tmp/cc7d48pz.s:1967 .text.SDMMC_CmdSetRelAddMmc:00000000 $t
- /tmp/cc7d48pz.s:1973 .text.SDMMC_CmdSetRelAddMmc:00000000 SDMMC_CmdSetRelAddMmc
- /tmp/cc7d48pz.s:2039 .text.SDMMC_CmdSendStatus:00000000 $t
- /tmp/cc7d48pz.s:2045 .text.SDMMC_CmdSendStatus:00000000 SDMMC_CmdSendStatus
- /tmp/cc7d48pz.s:2110 .text.SDMMC_CmdStatusRegister:00000000 $t
- /tmp/cc7d48pz.s:2116 .text.SDMMC_CmdStatusRegister:00000000 SDMMC_CmdStatusRegister
- /tmp/cc7d48pz.s:2179 .text.SDMMC_CmdSwitch:00000000 $t
- /tmp/cc7d48pz.s:2185 .text.SDMMC_CmdSwitch:00000000 SDMMC_CmdSwitch
- /tmp/cc7d48pz.s:2250 .text.SDMMC_CmdSendEXTCSD:00000000 $t
- /tmp/cc7d48pz.s:2256 .text.SDMMC_CmdSendEXTCSD:00000000 SDMMC_CmdSendEXTCSD
- /tmp/cc7d48pz.s:2321 .text.SDMMC_GetCmdResp2:00000000 $t
- /tmp/cc7d48pz.s:2327 .text.SDMMC_GetCmdResp2:00000000 SDMMC_GetCmdResp2
- /tmp/cc7d48pz.s:2415 .text.SDMMC_GetCmdResp2:00000054 $d
- /tmp/cc7d48pz.s:2421 .text.SDMMC_CmdSendCID:00000000 $t
- /tmp/cc7d48pz.s:2427 .text.SDMMC_CmdSendCID:00000000 SDMMC_CmdSendCID
- /tmp/cc7d48pz.s:2487 .text.SDMMC_CmdSendCSD:00000000 $t
- /tmp/cc7d48pz.s:2493 .text.SDMMC_CmdSendCSD:00000000 SDMMC_CmdSendCSD
- /tmp/cc7d48pz.s:2555 .text.SDMMC_GetCmdResp3:00000000 $t
- /tmp/cc7d48pz.s:2561 .text.SDMMC_GetCmdResp3:00000000 SDMMC_GetCmdResp3
- /tmp/cc7d48pz.s:2635 .text.SDMMC_GetCmdResp3:00000044 $d
- /tmp/cc7d48pz.s:2641 .text.SDMMC_CmdAppOperCommand:00000000 $t
- /tmp/cc7d48pz.s:2647 .text.SDMMC_CmdAppOperCommand:00000000 SDMMC_CmdAppOperCommand
- /tmp/cc7d48pz.s:2712 .text.SDMMC_CmdAppOperCommand:00000030 $d
- /tmp/cc7d48pz.s:2717 .text.SDMMC_CmdOpCondition:00000000 $t
- /tmp/cc7d48pz.s:2723 .text.SDMMC_CmdOpCondition:00000000 SDMMC_CmdOpCondition
- /tmp/cc7d48pz.s:2785 .text.SDMMC_GetCmdResp6:00000000 $t
- /tmp/cc7d48pz.s:2791 .text.SDMMC_GetCmdResp6:00000000 SDMMC_GetCmdResp6
- /tmp/cc7d48pz.s:2951 .text.SDMMC_GetCmdResp6:00000098 $d
- /tmp/cc7d48pz.s:2957 .text.SDMMC_CmdSetRelAdd:00000000 $t
- /tmp/cc7d48pz.s:2963 .text.SDMMC_CmdSetRelAdd:00000000 SDMMC_CmdSetRelAdd
- /tmp/cc7d48pz.s:3030 .text.SDMMC_GetCmdResp7:00000000 $t
- /tmp/cc7d48pz.s:3036 .text.SDMMC_GetCmdResp7:00000000 SDMMC_GetCmdResp7
- /tmp/cc7d48pz.s:3137 .text.SDMMC_GetCmdResp7:0000005c $d
- /tmp/cc7d48pz.s:3143 .text.SDMMC_CmdOperCond:00000000 $t
- /tmp/cc7d48pz.s:3149 .text.SDMMC_CmdOperCond:00000000 SDMMC_CmdOperCond
+ /tmp/cceUajAB.s:1613 .text.SDMMC_CmdStopTransfer:00000000 $t
+ /tmp/cceUajAB.s:1619 .text.SDMMC_CmdStopTransfer:00000000 SDMMC_CmdStopTransfer
+ /tmp/cceUajAB.s:1682 .text.SDMMC_CmdStopTransfer:00000030 $d
+ /tmp/cceUajAB.s:1687 .text.SDMMC_CmdSelDesel:00000000 $t
+ /tmp/cceUajAB.s:1693 .text.SDMMC_CmdSelDesel:00000000 SDMMC_CmdSelDesel
+ /tmp/cceUajAB.s:1756 .text.SDMMC_CmdAppCommand:00000000 $t
+ /tmp/cceUajAB.s:1762 .text.SDMMC_CmdAppCommand:00000000 SDMMC_CmdAppCommand
+ /tmp/cceUajAB.s:1827 .text.SDMMC_CmdBusWidth:00000000 $t
+ /tmp/cceUajAB.s:1833 .text.SDMMC_CmdBusWidth:00000000 SDMMC_CmdBusWidth
+ /tmp/cceUajAB.s:1898 .text.SDMMC_CmdSendSCR:00000000 $t
+ /tmp/cceUajAB.s:1904 .text.SDMMC_CmdSendSCR:00000000 SDMMC_CmdSendSCR
+ /tmp/cceUajAB.s:1967 .text.SDMMC_CmdSetRelAddMmc:00000000 $t
+ /tmp/cceUajAB.s:1973 .text.SDMMC_CmdSetRelAddMmc:00000000 SDMMC_CmdSetRelAddMmc
+ /tmp/cceUajAB.s:2039 .text.SDMMC_CmdSendStatus:00000000 $t
+ /tmp/cceUajAB.s:2045 .text.SDMMC_CmdSendStatus:00000000 SDMMC_CmdSendStatus
+ /tmp/cceUajAB.s:2110 .text.SDMMC_CmdStatusRegister:00000000 $t
+ /tmp/cceUajAB.s:2116 .text.SDMMC_CmdStatusRegister:00000000 SDMMC_CmdStatusRegister
+ /tmp/cceUajAB.s:2179 .text.SDMMC_CmdSwitch:00000000 $t
+ /tmp/cceUajAB.s:2185 .text.SDMMC_CmdSwitch:00000000 SDMMC_CmdSwitch
+ /tmp/cceUajAB.s:2250 .text.SDMMC_CmdSendEXTCSD:00000000 $t
+ /tmp/cceUajAB.s:2256 .text.SDMMC_CmdSendEXTCSD:00000000 SDMMC_CmdSendEXTCSD
+ /tmp/cceUajAB.s:2321 .text.SDMMC_GetCmdResp2:00000000 $t
+ /tmp/cceUajAB.s:2327 .text.SDMMC_GetCmdResp2:00000000 SDMMC_GetCmdResp2
+ /tmp/cceUajAB.s:2415 .text.SDMMC_GetCmdResp2:00000054 $d
+ /tmp/cceUajAB.s:2421 .text.SDMMC_CmdSendCID:00000000 $t
+ /tmp/cceUajAB.s:2427 .text.SDMMC_CmdSendCID:00000000 SDMMC_CmdSendCID
+ /tmp/cceUajAB.s:2487 .text.SDMMC_CmdSendCSD:00000000 $t
+ /tmp/cceUajAB.s:2493 .text.SDMMC_CmdSendCSD:00000000 SDMMC_CmdSendCSD
+ /tmp/cceUajAB.s:2555 .text.SDMMC_GetCmdResp3:00000000 $t
+ /tmp/cceUajAB.s:2561 .text.SDMMC_GetCmdResp3:00000000 SDMMC_GetCmdResp3
+ /tmp/cceUajAB.s:2635 .text.SDMMC_GetCmdResp3:00000044 $d
+ /tmp/cceUajAB.s:2641 .text.SDMMC_CmdAppOperCommand:00000000 $t
+ /tmp/cceUajAB.s:2647 .text.SDMMC_CmdAppOperCommand:00000000 SDMMC_CmdAppOperCommand
+ /tmp/cceUajAB.s:2712 .text.SDMMC_CmdAppOperCommand:00000030 $d
+ /tmp/cceUajAB.s:2717 .text.SDMMC_CmdOpCondition:00000000 $t
+ /tmp/cceUajAB.s:2723 .text.SDMMC_CmdOpCondition:00000000 SDMMC_CmdOpCondition
+ /tmp/cceUajAB.s:2785 .text.SDMMC_GetCmdResp6:00000000 $t
+ /tmp/cceUajAB.s:2791 .text.SDMMC_GetCmdResp6:00000000 SDMMC_GetCmdResp6
+ /tmp/cceUajAB.s:2951 .text.SDMMC_GetCmdResp6:00000098 $d
+ /tmp/cceUajAB.s:2957 .text.SDMMC_CmdSetRelAdd:00000000 $t
+ /tmp/cceUajAB.s:2963 .text.SDMMC_CmdSetRelAdd:00000000 SDMMC_CmdSetRelAdd
+ /tmp/cceUajAB.s:3030 .text.SDMMC_GetCmdResp7:00000000 $t
+ /tmp/cceUajAB.s:3036 .text.SDMMC_GetCmdResp7:00000000 SDMMC_GetCmdResp7
+ /tmp/cceUajAB.s:3137 .text.SDMMC_GetCmdResp7:0000005c $d
+ /tmp/cceUajAB.s:3143 .text.SDMMC_CmdOperCond:00000000 $t
+ /tmp/cceUajAB.s:3149 .text.SDMMC_CmdOperCond:00000000 SDMMC_CmdOperCond
UNDEFINED SYMBOLS
SystemCoreClock
diff --git a/build/stm32f7xx_ll_spi.lst b/build/stm32f7xx_ll_spi.lst
index c942faf..e2cb9df 100644
--- a/build/stm32f7xx_ll_spi.lst
+++ b/build/stm32f7xx_ll_spi.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccVg7Rz4.s page 1
+ARM GAS /tmp/ccOhrhtS.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** #define assert_param(expr) ((void)0U)
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** #endif /* USE_FULL_ASSERT */
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
- ARM GAS /tmp/ccVg7Rz4.s page 2
+ ARM GAS /tmp/ccOhrhtS.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /** @addtogroup STM32F7xx_LL_Driver
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** || ((__VALUE__) == LL_SPI_POLARITY_HIGH))
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** #define IS_LL_SPI_PHASE(__VALUE__) (((__VALUE__) == LL_SPI_PHASE_1EDGE) \
- ARM GAS /tmp/ccVg7Rz4.s page 3
+ ARM GAS /tmp/ccOhrhtS.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** || ((__VALUE__) == LL_SPI_PHASE_2EDGE))
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
135:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** ErrorStatus status = ERROR;
36 .loc 1 135 3 is_stmt 1 view .LVU2
37 .LVL1:
- ARM GAS /tmp/ccVg7Rz4.s page 4
+ ARM GAS /tmp/ccOhrhtS.s page 4
136:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
61 .L4:
166:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** {
167:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /* Force reset of SPI clock */
- ARM GAS /tmp/ccVg7Rz4.s page 5
+ ARM GAS /tmp/ccOhrhtS.s page 5
168:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_SPI3);
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
82 .L7:
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** {
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /* Force reset of SPI clock */
- ARM GAS /tmp/ccVg7Rz4.s page 6
+ ARM GAS /tmp/ccOhrhtS.s page 6
204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_SPI6);
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H
- ARM GAS /tmp/ccVg7Rz4.s page 7
+ ARM GAS /tmp/ccOhrhtS.s page 7
37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define __STM32F7xx_LL_BUS_H
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN
92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* DMA2D */
93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH)
- ARM GAS /tmp/ccVg7Rz4.s page 8
+ ARM GAS /tmp/ccOhrhtS.s page 8
94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ETHMAC RCC_AHB1ENR_ETHMACEN
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN
149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN
150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN
- ARM GAS /tmp/ccVg7Rz4.s page 9
+ ARM GAS /tmp/ccOhrhtS.s page 9
151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM5 RCC_APB1ENR_TIM5EN
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN
206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC1 RCC_APB2ENR_SDMMC1EN
207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2)
- ARM GAS /tmp/ccVg7Rz4.s page 10
+ ARM GAS /tmp/ccOhrhtS.s page 10
208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC2 RCC_APB2ENR_SDMMC2EN
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n
263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n
264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccVg7Rz4.s page 11
+ ARM GAS /tmp/ccOhrhtS.s page 11
265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_EnableClock\n
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not
320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n
321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n
- ARM GAS /tmp/ccVg7Rz4.s page 12
+ ARM GAS /tmp/ccOhrhtS.s page 12
322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOCEN LL_AHB1_GRP1_IsEnabledClock\n
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock.
378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccVg7Rz4.s page 13
+ ARM GAS /tmp/ccOhrhtS.s page 13
379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_DisableClock\n
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB1 peripherals reset.
- ARM GAS /tmp/ccVg7Rz4.s page 14
+ ARM GAS /tmp/ccOhrhtS.s page 14
436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1RSTR GPIOARST LL_AHB1_GRP1_ForceReset\n
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n
491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n
492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccVg7Rz4.s page 15
+ ARM GAS /tmp/ccOhrhtS.s page 15
493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOKRST LL_AHB1_GRP1_ReleaseReset\n
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- ARM GAS /tmp/ccVg7Rz4.s page 16
+ ARM GAS /tmp/ccOhrhtS.s page 16
550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2DLPEN LL_AHB1_GRP1_EnableClockLowPower\n
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n
605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccVg7Rz4.s page 17
+ ARM GAS /tmp/ccOhrhtS.s page 17
607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOHLPEN LL_AHB1_GRP1_DisableClockLowPower\n
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1LPENR, Periphs);
662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccVg7Rz4.s page 18
+ ARM GAS /tmp/ccOhrhtS.s page 18
664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- ARM GAS /tmp/ccVg7Rz4.s page 19
+ ARM GAS /tmp/ccOhrhtS.s page 19
721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)
777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
- ARM GAS /tmp/ccVg7Rz4.s page 20
+ ARM GAS /tmp/ccOhrhtS.s page 20
778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2RSTR, Periphs);
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs);
833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);
- ARM GAS /tmp/ccVg7Rz4.s page 21
+ ARM GAS /tmp/ccOhrhtS.s page 21
835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccVg7Rz4.s page 22
+ ARM GAS /tmp/ccOhrhtS.s page 22
892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
- ARM GAS /tmp/ccVg7Rz4.s page 23
+ ARM GAS /tmp/ccOhrhtS.s page 23
949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock.
1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccVg7Rz4.s page 24
+ ARM GAS /tmp/ccOhrhtS.s page 24
1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM4EN LL_APB1_GRP1_EnableClock\n
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
- ARM GAS /tmp/ccVg7Rz4.s page 25
+ ARM GAS /tmp/ccOhrhtS.s page 25
1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
- ARM GAS /tmp/ccVg7Rz4.s page 26
+ ARM GAS /tmp/ccOhrhtS.s page 26
1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccVg7Rz4.s page 27
+ ARM GAS /tmp/ccOhrhtS.s page 27
1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C4EN LL_APB1_GRP1_DisableClock\n
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n
1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccVg7Rz4.s page 28
+ ARM GAS /tmp/ccOhrhtS.s page 28
1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM6RST LL_APB1_GRP1_ForceReset\n
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
- ARM GAS /tmp/ccVg7Rz4.s page 29
+ ARM GAS /tmp/ccOhrhtS.s page 29
1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- ARM GAS /tmp/ccVg7Rz4.s page 30
+ ARM GAS /tmp/ccOhrhtS.s page 30
1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n
1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n
1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower
- ARM GAS /tmp/ccVg7Rz4.s page 31
+ ARM GAS /tmp/ccOhrhtS.s page 31
1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n
1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n
1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccVg7Rz4.s page 32
+ ARM GAS /tmp/ccOhrhtS.s page 32
1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_DisableClockLowPower\n
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
- ARM GAS /tmp/ccVg7Rz4.s page 33
+ ARM GAS /tmp/ccOhrhtS.s page 33
1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_DisableClockLowPower(uint32_t Periphs)
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
- ARM GAS /tmp/ccVg7Rz4.s page 34
+ ARM GAS /tmp/ccOhrhtS.s page 34
1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*)
1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
- ARM GAS /tmp/ccVg7Rz4.s page 35
+ ARM GAS /tmp/ccOhrhtS.s page 35
1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI4
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2
1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3
- ARM GAS /tmp/ccVg7Rz4.s page 36
+ ARM GAS /tmp/ccOhrhtS.s page 36
1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1
1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6
1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC
- ARM GAS /tmp/ccVg7Rz4.s page 37
+ ARM GAS /tmp/ccOhrhtS.s page 37
1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n
1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n
1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccVg7Rz4.s page 38
+ ARM GAS /tmp/ccOhrhtS.s page 38
1789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI6RST LL_APB2_GRP1_ReleaseReset\n
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
119 .LVL11:
149:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** }
120 .loc 1 149 12 view .LVU29
- ARM GAS /tmp/ccVg7Rz4.s page 39
+ ARM GAS /tmp/ccOhrhtS.s page 39
121 0040 E3E7 b .L2
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
162 .loc 2 1297 3 view .LVU42
163 005a 02F5FE32 add r2, r2, #130048
164 005e 116A ldr r1, [r2, #32]
- ARM GAS /tmp/ccVg7Rz4.s page 40
+ ARM GAS /tmp/ccOhrhtS.s page 40
165 0060 41F40041 orr r1, r1, #32768
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
207 .loc 2 1825 22 view .LVU55
208 .LBB49:
- ARM GAS /tmp/ccVg7Rz4.s page 41
+ ARM GAS /tmp/ccOhrhtS.s page 41
209 .loc 2 1827 3 view .LVU56
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
253 00a0 BFE7 b .L6
254 .LVL24:
255 .L14:
- ARM GAS /tmp/ccVg7Rz4.s page 42
+ ARM GAS /tmp/ccOhrhtS.s page 42
204:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
302 .section .text.LL_SPI_Init,"ax",%progbits
303 .align 1
304 .global LL_SPI_Init
- ARM GAS /tmp/ccVg7Rz4.s page 43
+ ARM GAS /tmp/ccOhrhtS.s page 43
305 .syntax unified
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
332 .LBB58:
333 .LBI58:
334 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h"
- ARM GAS /tmp/ccVg7Rz4.s page 44
+ ARM GAS /tmp/ccOhrhtS.s page 44
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t TransferDirection; /*!< Specifies the SPI unidirectional or bidirectional data mod
56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_TRANSFER_M
57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- ARM GAS /tmp/ccVg7Rz4.s page 45
+ ARM GAS /tmp/ccOhrhtS.s page 45
58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported constants --------------------------------------------------------*/
114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_Exported_Constants SPI Exported Constants
- ARM GAS /tmp/ccVg7Rz4.s page 46
+ ARM GAS /tmp/ccOhrhtS.s page 46
115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_POLARITY Clock Polarity
- ARM GAS /tmp/ccVg7Rz4.s page 47
+ ARM GAS /tmp/ccOhrhtS.s page 47
172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_DATAWIDTH_4BIT (SPI_CR2_DS_0 | SPI_CR2_DS_1)
- ARM GAS /tmp/ccVg7Rz4.s page 48
+ ARM GAS /tmp/ccOhrhtS.s page 48
229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_DATAWIDTH_5BIT (SPI_CR2_DS_2)
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_TX_FIFO TX FIFO Level
- ARM GAS /tmp/ccVg7Rz4.s page 49
+ ARM GAS /tmp/ccOhrhtS.s page 49
286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @}
341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- ARM GAS /tmp/ccVg7Rz4.s page 50
+ ARM GAS /tmp/ccOhrhtS.s page 50
343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Exported functions --------------------------------------------------------*/
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
347 .LCFI0:
348 .cfi_def_cfa_offset 4
349 .cfi_offset 4, -4
- ARM GAS /tmp/ccVg7Rz4.s page 51
+ ARM GAS /tmp/ccOhrhtS.s page 51
350 .LVL30:
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
379 003c B1F816C0 ldrh ip, [r1, #22]
380 0040 40EA0C00 orr r0, r0, ip
381 0044 0243 orrs r2, r2, r0
- ARM GAS /tmp/ccVg7Rz4.s page 52
+ ARM GAS /tmp/ccOhrhtS.s page 52
382 0046 5A60 str r2, [r3, #4]
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
420:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param Standard This parameter can be one of the following values:
422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_MOTOROLA
- ARM GAS /tmp/ccVg7Rz4.s page 53
+ ARM GAS /tmp/ccOhrhtS.s page 53
423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PROTOCOL_TI
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
477:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CPOL LL_SPI_SetClockPolarity
478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param ClockPolarity This parameter can be one of the following values:
- ARM GAS /tmp/ccVg7Rz4.s page 54
+ ARM GAS /tmp/ccOhrhtS.s page 54
480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_POLARITY_LOW
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
534:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV128
535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV256
536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- ARM GAS /tmp/ccVg7Rz4.s page 55
+ ARM GAS /tmp/ccOhrhtS.s page 55
537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetBaudRatePrescaler(SPI_TypeDef *SPIx)
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
591:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get transfer direction mode
592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 RXONLY LL_SPI_GetTransferDirection\n
593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIMODE LL_SPI_GetTransferDirection\n
- ARM GAS /tmp/ccVg7Rz4.s page 56
+ ARM GAS /tmp/ccOhrhtS.s page 56
594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * CR1 BIDIOE LL_SPI_GetTransferDirection
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_15BIT
649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_16BIT
650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- ARM GAS /tmp/ccVg7Rz4.s page 57
+ ARM GAS /tmp/ccOhrhtS.s page 57
651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDataWidth(SPI_TypeDef *SPIx)
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
414 .loc 1 290 3 is_stmt 1 view .LVU114
415 0062 DA69 ldr r2, [r3, #28]
416 0064 22F40062 bic r2, r2, #2048
- ARM GAS /tmp/ccVg7Rz4.s page 58
+ ARM GAS /tmp/ccOhrhtS.s page 58
417 0068 DA61 str r2, [r3, #28]
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
701:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
702:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
703:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccVg7Rz4.s page 59
+ ARM GAS /tmp/ccOhrhtS.s page 59
704:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable CRC
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
758:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCNEXT LL_SPI_SetCRCNext
759:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
760:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None
- ARM GAS /tmp/ccVg7Rz4.s page 60
+ ARM GAS /tmp/ccOhrhtS.s page 60
761:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
467 .L28:
468 .align 2
469 .L27:
- ARM GAS /tmp/ccVg7Rz4.s page 61
+ ARM GAS /tmp/ccOhrhtS.s page 61
470 0084 4000FFFF .word -65472
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
309:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** SPI_InitStruct->BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV2;
510 .loc 1 309 3 is_stmt 1 view .LVU142
511 .loc 1 309 37 is_stmt 0 view .LVU143
- ARM GAS /tmp/ccVg7Rz4.s page 62
+ ARM GAS /tmp/ccOhrhtS.s page 62
512 0012 8361 str r3, [r0, #24]
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** SPI_I2SCFGR_I2SCFG | SPI_I2SCFGR_I2SMOD )
341:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
342:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** #define I2S_I2SPR_CLEAR_MASK 0x0002U
- ARM GAS /tmp/ccVg7Rz4.s page 63
+ ARM GAS /tmp/ccOhrhtS.s page 63
343:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /**
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @brief De-initialize the SPI/I2S registers to their default reset values.
398:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @param SPIx SPI Instance
399:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @retval An ErrorStatus enumeration value:
- ARM GAS /tmp/ccVg7Rz4.s page 64
+ ARM GAS /tmp/ccOhrhtS.s page 64
400:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * - SUCCESS: SPI registers are de-initialized
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
574 .cfi_def_cfa_offset 24
575 .cfi_offset 3, -24
576 .cfi_offset 4, -20
- ARM GAS /tmp/ccVg7Rz4.s page 65
+ ARM GAS /tmp/ccOhrhtS.s page 65
577 .cfi_offset 5, -16
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value is a number between Min_Data = 0x00 and Max_Data = 0xFFFF
795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetRxCRC(SPI_TypeDef *SPIx)
- ARM GAS /tmp/ccVg7Rz4.s page 66
+ ARM GAS /tmp/ccOhrhtS.s page 66
797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t Ssoe = (READ_BIT(SPIx->CR2, SPI_CR2_SSOE) << 16U);
852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (Ssm | Ssoe);
853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccVg7Rz4.s page 67
+ ARM GAS /tmp/ccOhrhtS.s page 67
854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccVg7Rz4.s page 68
+ ARM GAS /tmp/ccOhrhtS.s page 68
911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if Tx buffer is empty
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0).
966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_IsActiveFlag_BSY(SPI_TypeDef *SPIx)
- ARM GAS /tmp/ccVg7Rz4.s page 69
+ ARM GAS /tmp/ccOhrhtS.s page 69
968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccVg7Rz4.s page 70
+ ARM GAS /tmp/ccOhrhtS.s page 70
1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear mode fault error flag
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable error interrupt
1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit controls the generation of an interrupt when an error condition occurs (CRCERR
- ARM GAS /tmp/ccVg7Rz4.s page 71
+ ARM GAS /tmp/ccOhrhtS.s page 71
1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 ERRIE LL_SPI_EnableIT_ERR
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Tx buffer empty interrupt
1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXEIE LL_SPI_DisableIT_TXE
- ARM GAS /tmp/ccVg7Rz4.s page 72
+ ARM GAS /tmp/ccOhrhtS.s page 72
1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableDMAReq_RX(SPI_TypeDef *SPIx)
1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
- ARM GAS /tmp/ccVg7Rz4.s page 73
+ ARM GAS /tmp/ccOhrhtS.s page 73
1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_RXDMAEN);
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** {
1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return ((READ_BIT(SPIx->CR2, SPI_CR2_TXDMAEN) == (SPI_CR2_TXDMAEN)) ? 1UL : 0UL);
1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
- ARM GAS /tmp/ccVg7Rz4.s page 74
+ ARM GAS /tmp/ccOhrhtS.s page 74
1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get the data register address used for DMA transfer
- ARM GAS /tmp/ccVg7Rz4.s page 75
+ ARM GAS /tmp/ccOhrhtS.s page 75
1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll DR DR LL_SPI_DMA_GetRegAddr
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccVg7Rz4.s page 76
+ ARM GAS /tmp/ccOhrhtS.s page 76
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write 16-Bits in the data register
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief I2S Init structure definition
1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
- ARM GAS /tmp/ccVg7Rz4.s page 77
+ ARM GAS /tmp/ccOhrhtS.s page 77
1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_RXNE LL_SPI_SR_RXNE /*!< Rx buffer not empty flag
1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_TXE LL_SPI_SR_TXE /*!< Tx buffer empty flag
1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_BSY LL_SPI_SR_BSY /*!< Busy flag
- ARM GAS /tmp/ccVg7Rz4.s page 78
+ ARM GAS /tmp/ccOhrhtS.s page 78
1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_SR_UDR SPI_SR_UDR /*!< Underrun flag
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1535:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0) /*!< Slave
1536:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1) /*!< Maste
1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_I2S_MODE_MASTER_RX (SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1) /*!< Maste
- ARM GAS /tmp/ccVg7Rz4.s page 79
+ ARM GAS /tmp/ccOhrhtS.s page 79
1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */
1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
- ARM GAS /tmp/ccVg7Rz4.s page 80
+ ARM GAS /tmp/ccOhrhtS.s page 80
1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write a value in I2S register
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
1649:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->I2SCFGR, SPI_I2SCFGR_I2SMOD | SPI_I2SCFGR_I2SE);
1650:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** }
1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h ****
- ARM GAS /tmp/ccVg7Rz4.s page 81
+ ARM GAS /tmp/ccOhrhtS.s page 81
1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /**
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
452:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
453:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /*---------------------------- SPIx I2SPR Configuration ----------------------
454:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * Configure SPIx I2SPR with parameters:
- ARM GAS /tmp/ccVg7Rz4.s page 82
+ ARM GAS /tmp/ccOhrhtS.s page 82
455:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * - MCLKOutput: SPI_I2SPR_MCKOE bit
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
480:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** {
481:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /* MCLK output is enabled */
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** tmp = (((((sourceclock / 256U) * 10U) / I2S_InitStruct->AudioFreq)) + 5U);
- ARM GAS /tmp/ccVg7Rz4.s page 83
+ ARM GAS /tmp/ccOhrhtS.s page 83
483:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** }
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
692 006a 1202 lsls r2, r2, #8
693 .LVL56:
694 .L34:
- ARM GAS /tmp/ccVg7Rz4.s page 84
+ ARM GAS /tmp/ccOhrhtS.s page 84
501:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** }
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
729 0084 000A lsrs r0, r0, #8
730 .LVL63:
482:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** }
- ARM GAS /tmp/ccVg7Rz4.s page 85
+ ARM GAS /tmp/ccOhrhtS.s page 85
731 .loc 1 482 40 view .LVU220
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
778 .LVL70:
779 .LFB456:
518:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
- ARM GAS /tmp/ccVg7Rz4.s page 86
+ ARM GAS /tmp/ccOhrhtS.s page 86
519:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /**
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
535:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c ****
536:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** /**
537:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @brief Set linear and parity prescaler.
- ARM GAS /tmp/ccVg7Rz4.s page 87
+ ARM GAS /tmp/ccOhrhtS.s page 87
538:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_spi.c **** * @note To calculate value of PrescalerLinear(I2SDIV[7:0] bits) and PrescalerParity(ODD bit)\n
@@ -5206,28 +5206,28 @@ ARM GAS /tmp/ccVg7Rz4.s page 1
844 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
845 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
846 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- ARM GAS /tmp/ccVg7Rz4.s page 88
+ ARM GAS /tmp/ccOhrhtS.s page 88
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_spi.c
- /tmp/ccVg7Rz4.s:20 .text.LL_SPI_DeInit:00000000 $t
- /tmp/ccVg7Rz4.s:26 .text.LL_SPI_DeInit:00000000 LL_SPI_DeInit
- /tmp/ccVg7Rz4.s:292 .text.LL_SPI_DeInit:000000b8 $d
- /tmp/ccVg7Rz4.s:303 .text.LL_SPI_Init:00000000 $t
- /tmp/ccVg7Rz4.s:309 .text.LL_SPI_Init:00000000 LL_SPI_Init
- /tmp/ccVg7Rz4.s:470 .text.LL_SPI_Init:00000084 $d
- /tmp/ccVg7Rz4.s:476 .text.LL_SPI_StructInit:00000000 $t
- /tmp/ccVg7Rz4.s:482 .text.LL_SPI_StructInit:00000000 LL_SPI_StructInit
- /tmp/ccVg7Rz4.s:529 .text.LL_I2S_DeInit:00000000 $t
- /tmp/ccVg7Rz4.s:535 .text.LL_I2S_DeInit:00000000 LL_I2S_DeInit
- /tmp/ccVg7Rz4.s:558 .text.LL_I2S_Init:00000000 $t
- /tmp/ccVg7Rz4.s:564 .text.LL_I2S_Init:00000000 LL_I2S_Init
- /tmp/ccVg7Rz4.s:765 .text.LL_I2S_Init:000000a4 $d
- /tmp/ccVg7Rz4.s:771 .text.LL_I2S_StructInit:00000000 $t
- /tmp/ccVg7Rz4.s:777 .text.LL_I2S_StructInit:00000000 LL_I2S_StructInit
- /tmp/ccVg7Rz4.s:811 .text.LL_I2S_ConfigPrescaler:00000000 $t
- /tmp/ccVg7Rz4.s:817 .text.LL_I2S_ConfigPrescaler:00000000 LL_I2S_ConfigPrescaler
+ /tmp/ccOhrhtS.s:20 .text.LL_SPI_DeInit:00000000 $t
+ /tmp/ccOhrhtS.s:26 .text.LL_SPI_DeInit:00000000 LL_SPI_DeInit
+ /tmp/ccOhrhtS.s:292 .text.LL_SPI_DeInit:000000b8 $d
+ /tmp/ccOhrhtS.s:303 .text.LL_SPI_Init:00000000 $t
+ /tmp/ccOhrhtS.s:309 .text.LL_SPI_Init:00000000 LL_SPI_Init
+ /tmp/ccOhrhtS.s:470 .text.LL_SPI_Init:00000084 $d
+ /tmp/ccOhrhtS.s:476 .text.LL_SPI_StructInit:00000000 $t
+ /tmp/ccOhrhtS.s:482 .text.LL_SPI_StructInit:00000000 LL_SPI_StructInit
+ /tmp/ccOhrhtS.s:529 .text.LL_I2S_DeInit:00000000 $t
+ /tmp/ccOhrhtS.s:535 .text.LL_I2S_DeInit:00000000 LL_I2S_DeInit
+ /tmp/ccOhrhtS.s:558 .text.LL_I2S_Init:00000000 $t
+ /tmp/ccOhrhtS.s:564 .text.LL_I2S_Init:00000000 LL_I2S_Init
+ /tmp/ccOhrhtS.s:765 .text.LL_I2S_Init:000000a4 $d
+ /tmp/ccOhrhtS.s:771 .text.LL_I2S_StructInit:00000000 $t
+ /tmp/ccOhrhtS.s:777 .text.LL_I2S_StructInit:00000000 LL_I2S_StructInit
+ /tmp/ccOhrhtS.s:811 .text.LL_I2S_ConfigPrescaler:00000000 $t
+ /tmp/ccOhrhtS.s:817 .text.LL_I2S_ConfigPrescaler:00000000 LL_I2S_ConfigPrescaler
UNDEFINED SYMBOLS
LL_RCC_GetI2SClockFreq
diff --git a/build/stm32f7xx_ll_tim.lst b/build/stm32f7xx_ll_tim.lst
index 91a60ee..001dd26 100644
--- a/build/stm32f7xx_ll_tim.lst
+++ b/build/stm32f7xx_ll_tim.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccNvm23w.s page 1
+ARM GAS /tmp/ccf4acmH.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /** @addtogroup STM32F7xx_LL_Driver
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @{
- ARM GAS /tmp/ccNvm23w.s page 2
+ ARM GAS /tmp/ccf4acmH.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV2) \
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV4) \
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_ICPSC_DIV8))
- ARM GAS /tmp/ccNvm23w.s page 3
+ ARM GAS /tmp/ccf4acmH.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV8_N6) \
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV8_N8) \
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV16_N5) \
- ARM GAS /tmp/ccNvm23w.s page 4
+ ARM GAS /tmp/ccf4acmH.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** || ((__VALUE__) == LL_TIM_BREAK_FILTER_FDIV16_N6) \
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Exported functions --------------------------------------------------------*/
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /** @addtogroup TIM_LL_Exported_Functions
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @{
- ARM GAS /tmp/ccNvm23w.s page 5
+ ARM GAS /tmp/ccf4acmH.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_TIM6);
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM6);
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
- ARM GAS /tmp/ccNvm23w.s page 6
+ ARM GAS /tmp/ccf4acmH.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** #endif /* TIM6 */
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM14);
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** #endif /* TIM14 */
- ARM GAS /tmp/ccNvm23w.s page 7
+ ARM GAS /tmp/ccf4acmH.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** else
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Write to TIMx CR1 */
- ARM GAS /tmp/ccNvm23w.s page 8
+ ARM GAS /tmp/ccf4acmH.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_TIM_WriteReg(TIMx, CR1, tmpcr1);
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx output channel is initialized
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: TIMx output channel is not initialized
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */
- ARM GAS /tmp/ccNvm23w.s page 9
+ ARM GAS /tmp/ccf4acmH.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** ErrorStatus LL_TIM_OC_Init(TIM_TypeDef *TIMx, uint32_t Channel, const LL_TIM_OC_InitTypeDef *TIM_OC
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @arg @ref LL_TIM_CHANNEL_CH4
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_IC_InitStruct pointer to a @ref LL_TIM_IC_InitTypeDef structure (TIMx input channel
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * structure)
- ARM GAS /tmp/ccNvm23w.s page 10
+ ARM GAS /tmp/ccf4acmH.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value:
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value:
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable
- ARM GAS /tmp/ccNvm23w.s page 11
+ ARM GAS /tmp/ccf4acmH.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** return SUCCESS;
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
- ARM GAS /tmp/ccNvm23w.s page 12
+ ARM GAS /tmp/ccf4acmH.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /**
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpcr2 = LL_TIM_ReadReg(TIMx, CR2);
657:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
658:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Get the TIMx CCMR1 register value */
- ARM GAS /tmp/ccNvm23w.s page 13
+ ARM GAS /tmp/ccf4acmH.s page 13
659:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 = LL_TIM_ReadReg(TIMx, CCMR1);
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
713:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * to their default values.
714:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_BDTRInitStruct pointer to a @ref LL_TIM_BDTR_InitTypeDef structure (Break and Dead
715:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * data structure)
- ARM GAS /tmp/ccNvm23w.s page 14
+ ARM GAS /tmp/ccf4acmH.s page 14
716:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval None
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, TIM_BDTRInitStruct->LockLevel);
771:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState);
772:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, TIM_BDTRInitStruct->OSSRState);
- ARM GAS /tmp/ccNvm23w.s page 15
+ ARM GAS /tmp/ccf4acmH.s page 15
773:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, TIM_BDTRInitStruct->BreakState);
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
38 .cfi_offset 5, -8
39 .cfi_offset 6, -4
817:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccmr1;
- ARM GAS /tmp/ccNvm23w.s page 16
+ ARM GAS /tmp/ccf4acmH.s page 16
40 .loc 1 817 3 is_stmt 1 view .LVU2
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
68 .LVL4:
69 .loc 1 843 3 is_stmt 0 view .LVU18
70 0016 2C43 orrs r4, r4, r5
- ARM GAS /tmp/ccNvm23w.s page 17
+ ARM GAS /tmp/ccf4acmH.s page 17
71 .LVL5:
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
106 003e 23F00403 bic r3, r3, #4
107 .LVL12:
108 .loc 1 862 5 is_stmt 0 view .LVU32
- ARM GAS /tmp/ccNvm23w.s page 18
+ ARM GAS /tmp/ccf4acmH.s page 18
109 0042 8D68 ldr r5, [r1, #8]
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * Copyright (c) 2017 STMicroelectronics.
10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * All rights reserved.
11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
- ARM GAS /tmp/ccNvm23w.s page 19
+ ARM GAS /tmp/ccf4acmH.s page 19
12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * This software is licensed under terms that can be found in the LICENSE file
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U, /* 6: OC4M, OC4FE, OC4PE */
67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 7: OC5M, OC5FE, OC5PE */
68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 8U /* 8: OC6M, OC6FE, OC6PE */
- ARM GAS /tmp/ccNvm23w.s page 20
+ ARM GAS /tmp/ccf4acmH.s page 20
69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** };
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIMx_AF1_BKINP TIM1_AF1_BKINP /*!< BRK BKIN input polarity */
124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #endif /* TIM_BREAK_INPUT_SUPPORT */
125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 21
+ ARM GAS /tmp/ccf4acmH.s page 21
126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Remap mask definitions */
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- ARM GAS /tmp/ccNvm23w.s page 22
+ ARM GAS /tmp/ccf4acmH.s page 22
183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval none
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - the number of half PWM period in center-aligned mode
238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** GP timers: this parameter must be a number between Min_Data = 0x
239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Max_Data = 0xFF.
- ARM GAS /tmp/ccNvm23w.s page 23
+ ARM GAS /tmp/ccf4acmH.s page 23
240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Advanced timers: this parameter must be a number between Min_Dat
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCIDLESTATE.
- ARM GAS /tmp/ccNvm23w.s page 24
+ ARM GAS /tmp/ccf4acmH.s page 24
297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1ActiveInput; /*!< Specifies the TI1 input source
353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ACTIVEINPUT.
- ARM GAS /tmp/ccNvm23w.s page 25
+ ARM GAS /tmp/ccf4acmH.s page 25
354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Prescaler; /*!< Specifies the TI1 input prescaler value.
409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** Prescaler must be set to get a maximum counter period longer th
410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** time interval between 2 consecutive changes on the Hall inputs.
- ARM GAS /tmp/ccNvm23w.s page 26
+ ARM GAS /tmp/ccf4acmH.s page 26
411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ICPSC.
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio
466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetDeadTime()
467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 27
+ ARM GAS /tmp/ccf4acmH.s page 27
468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve
523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */
524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 28
+ ARM GAS /tmp/ccf4acmH.s page 28
525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t AutomaticOutput; /*!< Specifies whether the TIM Automatic Output feature is enabled
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK2_ENABLE Break2 Enable
580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 29
+ ARM GAS /tmp/ccf4acmH.s page 29
582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK2_DISABLE 0x00000000U /*!< Break2 function disabled */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_DOWN TIM_CR1_DIR /*!< Counter used as downcounte
637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_DOWN TIM_CR1_CMS_0 /*!< The counter counts up and
638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP TIM_CR1_CMS_1 /*!< The counter counts up and
- ARM GAS /tmp/ccNvm23w.s page 30
+ ARM GAS /tmp/ccf4acmH.s page 30
639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_COUNTERMODE_CENTER_UP_DOWN TIM_CR1_CMS /*!< The counter counts up and
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1 TIM_CCER_CC1E /*!< Timer input/output channel 1
- ARM GAS /tmp/ccNvm23w.s page 31
+ ARM GAS /tmp/ccf4acmH.s page 31
696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_CHANNEL_CH1N TIM_CCER_CC1NE /*!< Timer complementary output ch
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_HIGH 0x00000000U /*!< OCxactive high*/
- ARM GAS /tmp/ccNvm23w.s page 32
+ ARM GAS /tmp/ccf4acmH.s page 32
753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCPOLARITY_LOW TIM_CCER_CC1P /*!< OCxactive low*/
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV2_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_0) << 16U)
808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N6 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1) << 16U)
809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV4_N8 ((TIM_CCMR1_IC1F_2 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_IC
- ARM GAS /tmp/ccNvm23w.s page 33
+ ARM GAS /tmp/ccf4acmH.s page 33
810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_IC_FILTER_FDIV8_N6 (TIM_CCMR1_IC1F_3 << 16U)
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 34
+ ARM GAS /tmp/ccf4acmH.s page 34
867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO2 Trigger Output 2
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ETR_POLARITY_INVERTED TIM_SMCR_ETP /*!< ETR is inverted, active
922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
- ARM GAS /tmp/ccNvm23w.s page 35
+ ARM GAS /tmp/ccf4acmH.s page 35
924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV2_N8 0x00050000U /*!< fSAMPLING=fDTS/2, N=8 */
979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N6 0x00060000U /*!< fSAMPLING=fDTS/4, N=6 */
980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV4_N8 0x00070000U /*!< fSAMPLING=fDTS/4, N=8 */
- ARM GAS /tmp/ccNvm23w.s page 36
+ ARM GAS /tmp/ccf4acmH.s page 36
981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_FILTER_FDIV8_N6 0x00080000U /*!< fSAMPLING=fDTS/8, N=6 */
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_DISABLE 0x00000000U /*!< When inactive, OCx/OCxN
- ARM GAS /tmp/ccNvm23w.s page 37
+ ARM GAS /tmp/ccf4acmH.s page 37
1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSR_ENABLE TIM_BDTR_OSSR /*!< When inactive, OC/OCN o
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_BDTR (TIM_DCR_DBA_4 | TIM_DCR_DBA_0)
1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_OR (TIM_DCR_DBA_4 | TIM_DCR_DBA_2)
1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR3 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_0)
- ARM GAS /tmp/ccNvm23w.s page 38
+ ARM GAS /tmp/ccf4acmH.s page 38
1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCR5 (TIM_DCR_DBA_4 | TIM_DCR_DBA_2 | TIM_DCR_DBA_1)
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 39
+ ARM GAS /tmp/ccf4acmH.s page 39
1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (READ_BIT((__CNT__), TIM_CNT_UIFCPY) >> TIM_CNT_UIFCPY_Pos)
1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 40
+ ARM GAS /tmp/ccf4acmH.s page 40
1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating DTG[0:7] in the TIMx_BDTR register to achieve the requested de
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_DELAY(__TIMCLK__, __PSC__, __DELAY__) \
1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((uint32_t)(((uint64_t)(__TIMCLK__) * (uint64_t)(__DELAY__)) \
1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** / ((uint64_t)1000000U * (uint64_t)((__PSC__) + 1U))))
- ARM GAS /tmp/ccNvm23w.s page 41
+ ARM GAS /tmp/ccf4acmH.s page 41
1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_DisableCounter
1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccNvm23w.s page 42
+ ARM GAS /tmp/ccf4acmH.s page 42
1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Counter overflow/underflow
1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Setting the UG bit
1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - Update generation through the slave mode controller
- ARM GAS /tmp/ccNvm23w.s page 43
+ ARM GAS /tmp/ccf4acmH.s page 43
1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Update event source set to LL_TIM_UPDATESOURCE_COUNTER: only counter
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the timer counter counting mode.
1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx) can be used to
- ARM GAS /tmp/ccNvm23w.s page 44
+ ARM GAS /tmp/ccf4acmH.s page 44
1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * check whether or not the counter mode selection feature is supported
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableARRPreload(TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccNvm23w.s page 45
+ ARM GAS /tmp/ccf4acmH.s page 45
1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV1
1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV2
1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CLOCKDIVISION_DIV4
- ARM GAS /tmp/ccNvm23w.s page 46
+ ARM GAS /tmp/ccf4acmH.s page 46
1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Prescaler between Min_Data=0 and Max_Data=65535
1606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
1607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 47
+ ARM GAS /tmp/ccf4acmH.s page 47
1608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetPrescaler(TIM_TypeDef *TIMx, uint32_t Prescaler)
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
1663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetRepetitionCounter(TIM_TypeDef *TIMx, uint32_t RepetitionCounter)
1664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccNvm23w.s page 48
+ ARM GAS /tmp/ccf4acmH.s page 48
1665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->RCR, RepetitionCounter);
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Capture_Compare Capture Compare configuration
1720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{
1721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 49
+ ARM GAS /tmp/ccf4acmH.s page 49
1722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
1777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
1778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 50
+ ARM GAS /tmp/ccf4acmH.s page 50
1779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger of the capture/compare DMA request.
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_EnableChannel\n
1834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_EnableChannel
1835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccNvm23w.s page 51
+ ARM GAS /tmp/ccf4acmH.s page 51
1836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values:
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4E LL_TIM_CC_IsEnabledChannel\n
1891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_IsEnabledChannel\n
1892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_IsEnabledChannel
- ARM GAS /tmp/ccNvm23w.s page 52
+ ARM GAS /tmp/ccf4acmH.s page 52
1893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCPOLARITY_HIGH or @ref LL_TIM_OCPOLARITY_LOW
1948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCIDLESTATE_LOW or @ref LL_TIM_OCIDLESTATE_HIGH
1949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccNvm23w.s page 53
+ ARM GAS /tmp/ccf4acmH.s page 53
1950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the output compare mode of an output channel.
2005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1M LL_TIM_OC_GetMode\n
2006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2M LL_TIM_OC_GetMode\n
- ARM GAS /tmp/ccNvm23w.s page 54
+ ARM GAS /tmp/ccf4acmH.s page 54
2007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3M LL_TIM_OC_GetMode\n
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
- ARM GAS /tmp/ccNvm23w.s page 55
+ ARM GAS /tmp/ccf4acmH.s page 55
2064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Polarity This parameter can be one of the following values:
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_SetIdleState\n
2119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_SetIdleState\n
2120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_SetIdleState\n
- ARM GAS /tmp/ccNvm23w.s page 56
+ ARM GAS /tmp/ccf4acmH.s page 56
2121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_SetIdleState
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
2176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
2177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable fast mode for the output channel.
- ARM GAS /tmp/ccNvm23w.s page 57
+ ARM GAS /tmp/ccf4acmH.s page 57
2178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Acts only if the channel is configured in PWM1 or PWM2 mode.
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_IsEnabledFast\n
2233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_IsEnabledFast\n
2234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_IsEnabledFast\n
- ARM GAS /tmp/ccNvm23w.s page 58
+ ARM GAS /tmp/ccf4acmH.s page 58
2235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_IsEnabledFast\n
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
2291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
- ARM GAS /tmp/ccNvm23w.s page 59
+ ARM GAS /tmp/ccf4acmH.s page 59
2292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
2347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
- ARM GAS /tmp/ccNvm23w.s page 60
+ ARM GAS /tmp/ccf4acmH.s page 60
2349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5
2405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6
- ARM GAS /tmp/ccNvm23w.s page 61
+ ARM GAS /tmp/ccf4acmH.s page 61
2406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
882:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
883:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** return SUCCESS;
149 .loc 1 883 3 view .LVU46
- ARM GAS /tmp/ccNvm23w.s page 62
+ ARM GAS /tmp/ccf4acmH.s page 62
884:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
193 .loc 1 896 3 is_stmt 1 view .LVU52
897:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccer;
194 .loc 1 897 3 view .LVU53
- ARM GAS /tmp/ccNvm23w.s page 63
+ ARM GAS /tmp/ccf4acmH.s page 63
898:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpcr2;
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
224 .LVL27:
923:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
924:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the Output Compare Polarity */
- ARM GAS /tmp/ccNvm23w.s page 64
+ ARM GAS /tmp/ccf4acmH.s page 64
925:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpccer, TIM_CCER_CC2P, TIM_OCInitStruct->OCPolarity << 4U);
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
262 .loc 1 941 5 is_stmt 0 view .LVU83
263 0048 8D68 ldr r5, [r1, #8]
264 .loc 1 941 5 view .LVU84
- ARM GAS /tmp/ccNvm23w.s page 65
+ ARM GAS /tmp/ccf4acmH.s page 65
265 004a 43EA8513 orr r3, r3, r5, lsl #6
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
2459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccNvm23w.s page 66
+ ARM GAS /tmp/ccf4acmH.s page 66
2460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
968:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 3 configuration data structure
969:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value:
970:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized
- ARM GAS /tmp/ccNvm23w.s page 67
+ ARM GAS /tmp/ccf4acmH.s page 67
971:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
994:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Get the TIMx CCMR2 register value */
995:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr2 = LL_TIM_ReadReg(TIMx, CCMR2);
366 .loc 1 995 3 is_stmt 1 view .LVU116
- ARM GAS /tmp/ccNvm23w.s page 68
+ ARM GAS /tmp/ccf4acmH.s page 68
367 .loc 1 995 12 is_stmt 0 view .LVU117
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1013:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
404 .loc 1 1013 5 view .LVU130
1014:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCIDLESTATE(TIM_OCInitStruct->OCNIdleState));
- ARM GAS /tmp/ccNvm23w.s page 69
+ ARM GAS /tmp/ccf4acmH.s page 69
405 .loc 1 1014 5 view .LVU131
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
440 0062 C461 str r4, [r0, #28]
1034:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
1035:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the Capture Compare Register value */
- ARM GAS /tmp/ccNvm23w.s page 70
+ ARM GAS /tmp/ccf4acmH.s page 70
1036:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_TIM_OC_SetCompareCH3(TIMx, TIM_OCInitStruct->CompareValue);
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
471 .L15:
472 .align 2
473 .L14:
- ARM GAS /tmp/ccNvm23w.s page 71
+ ARM GAS /tmp/ccf4acmH.s page 71
474 0070 8CFFFEFF .word -65652
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1065:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** CLEAR_BIT(TIMx->CCER, TIM_CCER_CC4E);
508 .loc 1 1065 3 view .LVU163
509 0002 036A ldr r3, [r0, #32]
- ARM GAS /tmp/ccNvm23w.s page 72
+ ARM GAS /tmp/ccf4acmH.s page 72
510 0004 23F48053 bic r3, r3, #4096
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
543 .loc 1 1086 3 is_stmt 0 view .LVU176
544 0028 4D68 ldr r5, [r1, #4]
545 .loc 1 1086 3 view .LVU177
- ARM GAS /tmp/ccNvm23w.s page 73
+ ARM GAS /tmp/ccf4acmH.s page 73
546 002a 43EA0533 orr r3, r3, r5, lsl #12
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance.
2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4
2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccNvm23w.s page 74
+ ARM GAS /tmp/ccf4acmH.s page 74
2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1112:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @brief Configure the TIMx output channel 5.
1113:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIMx Timer Instance
1114:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @param TIM_OCInitStruct pointer to the the TIMx output channel 5 configuration data structure
- ARM GAS /tmp/ccNvm23w.s page 75
+ ARM GAS /tmp/ccf4acmH.s page 75
1115:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * @retval An ErrorStatus enumeration value:
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
646 000c 446D ldr r4, [r0, #84]
647 .LVL84:
1140:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
- ARM GAS /tmp/ccNvm23w.s page 76
+ ARM GAS /tmp/ccf4acmH.s page 76
1141:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Select the Output Compare Mode */
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
686 0042 4460 str r4, [r0, #4]
687 .L22:
1157:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
- ARM GAS /tmp/ccNvm23w.s page 77
+ ARM GAS /tmp/ccf4acmH.s page 77
1158:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
715 .LCFI9:
716 .cfi_restore 5
717 .cfi_restore 4
- ARM GAS /tmp/ccNvm23w.s page 78
+ ARM GAS /tmp/ccf4acmH.s page 78
718 .cfi_def_cfa_offset 0
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1190:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCPOLARITY(TIM_OCInitStruct->OCNPolarity));
755 .loc 1 1190 3 view .LVU241
1191:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_OCSTATE(TIM_OCInitStruct->OCNState));
- ARM GAS /tmp/ccNvm23w.s page 79
+ ARM GAS /tmp/ccf4acmH.s page 79
756 .loc 1 1191 3 view .LVU242
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1210:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
1211:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** if (IS_TIM_BREAK_INSTANCE(TIMx))
792 .loc 1 1211 3 is_stmt 1 view .LVU255
- ARM GAS /tmp/ccNvm23w.s page 80
+ ARM GAS /tmp/ccf4acmH.s page 80
793 .loc 1 1211 6 is_stmt 0 view .LVU256
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
820 004a C265 str r2, [r0, #92]
821 .LVL105:
822 .loc 2 2525 3 is_stmt 0 view .LVU265
- ARM GAS /tmp/ccNvm23w.s page 81
+ ARM GAS /tmp/ccf4acmH.s page 81
823 .LBE93:
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
862 0000 10B4 push {r4}
863 .LCFI12:
864 .cfi_def_cfa_offset 4
- ARM GAS /tmp/ccNvm23w.s page 82
+ ARM GAS /tmp/ccf4acmH.s page 82
865 .cfi_offset 4, -4
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
897 .LVL108:
898 .loc 1 1263 1 view .LVU284
899 0032 5DF8044B ldr r4, [sp], #4
- ARM GAS /tmp/ccNvm23w.s page 83
+ ARM GAS /tmp/ccf4acmH.s page 83
900 .LCFI13:
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
936 0008 0362 str r3, [r0, #32]
1284:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
1285:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Select the Input and set the filter and the prescaler value */
- ARM GAS /tmp/ccNvm23w.s page 84
+ ARM GAS /tmp/ccf4acmH.s page 84
1286:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(TIMx->CCMR1,
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1303:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - SUCCESS: TIMx registers are de-initialized
1304:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** * - ERROR: not applicable
1305:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** */
- ARM GAS /tmp/ccNvm23w.s page 85
+ ARM GAS /tmp/ccf4acmH.s page 85
1306:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** static ErrorStatus IC3Config(TIM_TypeDef *TIMx, const LL_TIM_IC_InitTypeDef *TIM_ICInitStruct)
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1011 0028 43EA0223 orr r3, r3, r2, lsl #8
1012 002c 43F48073 orr r3, r3, #256
1013 0030 0362 str r3, [r0, #32]
- ARM GAS /tmp/ccNvm23w.s page 86
+ ARM GAS /tmp/ccf4acmH.s page 86
1325:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** (TIM_CCER_CC3P | TIM_CCER_CC3NP),
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1049 .loc 1 1345 3 view .LVU320
1346:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** assert_param(IS_LL_TIM_IC_FILTER(TIM_ICInitStruct->ICFilter));
1050 .loc 1 1346 3 view .LVU321
- ARM GAS /tmp/ccNvm23w.s page 87
+ ARM GAS /tmp/ccf4acmH.s page 87
1347:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1090 .syntax unified
1091 .thumb
1092 .thumb_func
- ARM GAS /tmp/ccNvm23w.s page 88
+ ARM GAS /tmp/ccf4acmH.s page 88
1094 LL_TIM_DeInit:
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
1133 .loc 1 262 8 is_stmt 1 view .LVU345
262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
- ARM GAS /tmp/ccNvm23w.s page 89
+ ARM GAS /tmp/ccf4acmH.s page 89
1134 .loc 1 262 11 is_stmt 0 view .LVU346
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1173 .loc 1 319 12 view .LVU361
1174 005c 0120 movs r0, #1
1175 .LVL116:
- ARM GAS /tmp/ccNvm23w.s page 90
+ ARM GAS /tmp/ccf4acmH.s page 90
322:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Includes ------------------------------------------------------------------*/
44:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #include "stm32f7xx.h"
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccNvm23w.s page 91
+ ARM GAS /tmp/ccf4acmH.s page 91
46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @addtogroup STM32F7xx_LL_Driver
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_OTGHSULPI RCC_AHB1ENR_OTGHSULPIEN
101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_AXI RCC_AHB1LPENR_AXILPEN
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_FLITF RCC_AHB1LPENR_FLITFLPEN
- ARM GAS /tmp/ccNvm23w.s page 92
+ ARM GAS /tmp/ccf4acmH.s page 92
103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_SRAM1 RCC_AHB1LPENR_SRAM1LPEN
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_LPTIM1 RCC_APB1ENR_LPTIM1EN
158:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_WWDG RCC_APB1ENR_WWDGEN
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI2 RCC_APB1ENR_SPI2EN
- ARM GAS /tmp/ccNvm23w.s page 93
+ ARM GAS /tmp/ccf4acmH.s page 93
160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_SPI3 RCC_APB1ENR_SPI3EN
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM10 RCC_APB2ENR_TIM10EN
215:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_TIM11 RCC_APB2ENR_TIM11EN
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SPI5 RCC_APB2ENR_SPI5EN
- ARM GAS /tmp/ccNvm23w.s page 94
+ ARM GAS /tmp/ccf4acmH.s page 94
217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SPI6)
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
271:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DTCMRAMEN LL_AHB1_GRP1_EnableClock\n
272:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA1EN LL_AHB1_GRP1_EnableClock\n
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2EN LL_AHB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccNvm23w.s page 95
+ ARM GAS /tmp/ccf4acmH.s page 95
274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR DMA2DEN LL_AHB1_GRP1_EnableClock\n
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
328:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_IsEnabledClock\n
329:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_IsEnabledClock\n
330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_IsEnabledClock\n
- ARM GAS /tmp/ccNvm23w.s page 96
+ ARM GAS /tmp/ccf4acmH.s page 96
331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR CRCEN LL_AHB1_GRP1_IsEnabledClock\n
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOHEN LL_AHB1_GRP1_DisableClock\n
386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOIEN LL_AHB1_GRP1_DisableClock\n
387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOJEN LL_AHB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccNvm23w.s page 97
+ ARM GAS /tmp/ccf4acmH.s page 97
388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOKEN LL_AHB1_GRP1_DisableClock\n
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ForceReset\n
443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ForceReset\n
444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccNvm23w.s page 98
+ ARM GAS /tmp/ccf4acmH.s page 98
445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ForceReset\n
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR OTGHSRST LL_AHB1_GRP1_ReleaseReset
500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ALL
- ARM GAS /tmp/ccNvm23w.s page 99
+ ARM GAS /tmp/ccf4acmH.s page 99
502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR OTGHSULPILPEN LL_AHB1_GRP1_EnableClockLowPower
557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOA
- ARM GAS /tmp/ccNvm23w.s page 100
+ ARM GAS /tmp/ccf4acmH.s page 100
559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOB
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR FLITFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM1LPEN LL_AHB1_GRP1_DisableClockLowPower\n
615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR SRAM2LPEN LL_AHB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccNvm23w.s page 101
+ ARM GAS /tmp/ccf4acmH.s page 101
616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_DisableClockLowPower\n
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 102
+ ARM GAS /tmp/ccf4acmH.s page 102
673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripherals clock.
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB2 peripherals clock.
- ARM GAS /tmp/ccNvm23w.s page 103
+ ARM GAS /tmp/ccf4acmH.s page 103
730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2ENR DCMIEN LL_AHB2_GRP1_DisableClock\n
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ReleaseReset\n
785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR CRYPRST LL_AHB2_GRP1_ReleaseReset\n
786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR AESRST LL_AHB2_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccNvm23w.s page 104
+ ARM GAS /tmp/ccf4acmH.s page 104
787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR HASHRST LL_AHB2_GRP1_ReleaseReset\n
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_DisableClockLowPower\n
842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_DisableClockLowPower\n
843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccNvm23w.s page 105
+ ARM GAS /tmp/ccf4acmH.s page 105
844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_DisableClockLowPower\n
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
900:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- ARM GAS /tmp/ccNvm23w.s page 106
+ ARM GAS /tmp/ccf4acmH.s page 106
901:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval State of Periphs (1 or 0).
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3RSTR, Periphs);
956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccNvm23w.s page 107
+ ARM GAS /tmp/ccf4acmH.s page 107
958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM14EN LL_APB1_GRP1_EnableClock\n
1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR LPTIM1EN LL_APB1_GRP1_EnableClock\n
1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccNvm23w.s page 108
+ ARM GAS /tmp/ccf4acmH.s page 108
1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_EnableClock\n
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClock(uint32_t Periphs)
- ARM GAS /tmp/ccNvm23w.s page 109
+ ARM GAS /tmp/ccf4acmH.s page 109
1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
- ARM GAS /tmp/ccNvm23w.s page 110
+ ARM GAS /tmp/ccf4acmH.s page 110
1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART3
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR DACEN LL_APB1_GRP1_DisableClock\n
1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART7EN LL_APB1_GRP1_DisableClock\n
1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART8EN LL_APB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccNvm23w.s page 111
+ ARM GAS /tmp/ccf4acmH.s page 111
1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR RTCEN LL_APB1_GRP1_DisableClock
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR WWDGRST LL_APB1_GRP1_ForceReset\n
1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI2RST LL_APB1_GRP1_ForceReset\n
1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPI3RST LL_APB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccNvm23w.s page 112
+ ARM GAS /tmp/ccf4acmH.s page 112
1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR SPDIFRXRST LL_APB1_GRP1_ForceReset\n
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1RSTR, Periphs);
1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccNvm23w.s page 113
+ ARM GAS /tmp/ccf4acmH.s page 113
1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*)
1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1
1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
- ARM GAS /tmp/ccNvm23w.s page 114
+ ARM GAS /tmp/ccf4acmH.s page 114
1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
1412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12
1413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13
- ARM GAS /tmp/ccNvm23w.s page 115
+ ARM GAS /tmp/ccf4acmH.s page 115
1414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART4LPEN LL_APB1_GRP1_DisableClockLowPower\n
1469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART5LPEN LL_APB1_GRP1_DisableClockLowPower\n
1470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C1LPEN LL_APB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccNvm23w.s page 116
+ ARM GAS /tmp/ccf4acmH.s page 116
1471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR I2C2LPEN LL_APB1_GRP1_DisableClockLowPower\n
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @}
1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
- ARM GAS /tmp/ccNvm23w.s page 117
+ ARM GAS /tmp/ccf4acmH.s page 117
1528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_APB2 APB2
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_OTGPHYC (*)
1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
- ARM GAS /tmp/ccNvm23w.s page 118
+ ARM GAS /tmp/ccf4acmH.s page 118
1585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI1
1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SAI2
- ARM GAS /tmp/ccNvm23w.s page 119
+ ARM GAS /tmp/ccf4acmH.s page 119
1642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_LTDC (*)
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10
1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
- ARM GAS /tmp/ccNvm23w.s page 120
+ ARM GAS /tmp/ccf4acmH.s page 120
1699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10
1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
- ARM GAS /tmp/ccNvm23w.s page 121
+ ARM GAS /tmp/ccf4acmH.s page 121
1756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR MDIORST LL_APB2_GRP1_ReleaseReset\n
1796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR OTGPHYCRST LL_APB2_GRP1_ReleaseReset
1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
- ARM GAS /tmp/ccNvm23w.s page 122
+ ARM GAS /tmp/ccf4acmH.s page 122
1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ALL
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
230:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_TIM2);
1221 .loc 1 230 5 is_stmt 1 view .LVU375
1222 .LBB100:
- ARM GAS /tmp/ccNvm23w.s page 123
+ ARM GAS /tmp/ccf4acmH.s page 123
1223 .LBI100:
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
1265 .loc 3 1297 3 view .LVU388
1266 008e 03F50D33 add r3, r3, #144384
- ARM GAS /tmp/ccNvm23w.s page 124
+ ARM GAS /tmp/ccf4acmH.s page 124
1267 0092 1A6A ldr r2, [r3, #32]
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
1310 .loc 3 1297 3 is_stmt 0 view .LVU400
1311 .LBE113:
- ARM GAS /tmp/ccNvm23w.s page 125
+ ARM GAS /tmp/ccf4acmH.s page 125
1312 .LBE112:
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1354 .LBI120:
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
1355 .loc 3 1367 22 view .LVU413
- ARM GAS /tmp/ccNvm23w.s page 126
+ ARM GAS /tmp/ccf4acmH.s page 126
1356 .LBB121:
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1398 00e4 22F01002 bic r2, r2, #16
1399 00e8 1A62 str r2, [r3, #32]
1400 .LVL139:
- ARM GAS /tmp/ccNvm23w.s page 127
+ ARM GAS /tmp/ccf4acmH.s page 127
1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
1443 .loc 1 218 15 view .LVU438
1444 0102 0020 movs r0, #0
- ARM GAS /tmp/ccNvm23w.s page 128
+ ARM GAS /tmp/ccf4acmH.s page 128
1445 .LVL144:
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1488 011c 7047 bx lr
1489 .LVL149:
1490 .L63:
- ARM GAS /tmp/ccNvm23w.s page 129
+ ARM GAS /tmp/ccf4acmH.s page 129
1491 .loc 3 1828 1 view .LVU451
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1535 .LBI148:
1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
1536 .loc 3 1768 22 view .LVU464
- ARM GAS /tmp/ccNvm23w.s page 130
+ ARM GAS /tmp/ccf4acmH.s page 130
1537 .LBB149:
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1581 0158 5A62 str r2, [r3, #36]
1582 .LVL158:
1770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- ARM GAS /tmp/ccNvm23w.s page 131
+ ARM GAS /tmp/ccf4acmH.s page 131
1583 .loc 3 1770 3 is_stmt 0 view .LVU477
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1627 .LBI162:
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
1628 .loc 3 1367 22 view .LVU490
- ARM GAS /tmp/ccNvm23w.s page 132
+ ARM GAS /tmp/ccf4acmH.s page 132
1629 .LBB163:
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1671 018c 22F08002 bic r2, r2, #128
1672 0190 1A62 str r2, [r3, #32]
1673 .LVL167:
- ARM GAS /tmp/ccNvm23w.s page 133
+ ARM GAS /tmp/ccf4acmH.s page 133
1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
218:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
1716 .loc 1 218 15 view .LVU515
1717 01aa 0020 movs r0, #0
- ARM GAS /tmp/ccNvm23w.s page 134
+ ARM GAS /tmp/ccf4acmH.s page 134
1718 .LVL172:
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1767 .loc 1 336 3 is_stmt 1 view .LVU522
336:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_InitStruct->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
1768 .loc 1 336 37 is_stmt 0 view .LVU523
- ARM GAS /tmp/ccNvm23w.s page 135
+ ARM GAS /tmp/ccf4acmH.s page 135
1769 0006 4FF0FF32 mov r2, #-1
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1811 .loc 1 361 3 is_stmt 1 view .LVU537
361:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
1812 .loc 1 361 7 is_stmt 0 view .LVU538
- ARM GAS /tmp/ccNvm23w.s page 136
+ ARM GAS /tmp/ccf4acmH.s page 136
1813 0004 3B4A ldr r2, .L81
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1859 0058 274A ldr r2, .L81+4
1860 005a 9042 cmp r0, r2
1861 005c 14BF ite ne
- ARM GAS /tmp/ccNvm23w.s page 137
+ ARM GAS /tmp/ccf4acmH.s page 137
1862 005e 0022 movne r2, #0
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1911 00c0 23F4407C bic ip, r3, #768
1912 00c4 CB68 ldr r3, [r1, #12]
1913 .LVL178:
- ARM GAS /tmp/ccNvm23w.s page 138
+ ARM GAS /tmp/ccf4acmH.s page 138
370:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1954 00dc 4EF00103 orreq r3, lr, #1
1955 .LVL184:
382:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
- ARM GAS /tmp/ccNvm23w.s page 139
+ ARM GAS /tmp/ccf4acmH.s page 139
1956 .loc 1 382 6 view .LVU566
@@ -8338,7 +8338,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH2(const TIM_TypeDef *TIMx)
2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccNvm23w.s page 140
+ ARM GAS /tmp/ccf4acmH.s page 140
2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR2));
@@ -8398,7 +8398,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535)
2612:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2613:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetCompareCH6(const TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccNvm23w.s page 141
+ ARM GAS /tmp/ccf4acmH.s page 141
2614:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -8458,7 +8458,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2668:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values:
2669:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1
2670:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
- ARM GAS /tmp/ccNvm23w.s page 142
+ ARM GAS /tmp/ccf4acmH.s page 142
2671:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
@@ -8518,7 +8518,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2725:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2
2726:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
2727:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
- ARM GAS /tmp/ccNvm23w.s page 143
+ ARM GAS /tmp/ccf4acmH.s page 143
2728:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
@@ -8578,7 +8578,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2782:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV8
2783:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
2784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetPrescaler(const TIM_TypeDef *TIMx, uint32_t Channel)
- ARM GAS /tmp/ccNvm23w.s page 144
+ ARM GAS /tmp/ccf4acmH.s page 144
2785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -8638,7 +8638,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2839:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3
2840:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4
2841:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values:
- ARM GAS /tmp/ccNvm23w.s page 145
+ ARM GAS /tmp/ccf4acmH.s page 145
2842:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_IC_FILTER_FDIV1
@@ -8698,7 +8698,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2896:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current input channel polarity.
2897:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCER CC1P LL_TIM_IC_GetPolarity\n
2898:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_GetPolarity\n
- ARM GAS /tmp/ccNvm23w.s page 146
+ ARM GAS /tmp/ccf4acmH.s page 146
2899:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_GetPolarity\n
@@ -8758,7 +8758,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2953:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 TI1S LL_TIM_IC_IsEnabledXORCombination
2954:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
2955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccNvm23w.s page 147
+ ARM GAS /tmp/ccf4acmH.s page 147
2956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -8818,7 +8818,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3010:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
3011:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get captured value for input channel 4.
3012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned captured value can be between 0x00000000 and 0xF
- ARM GAS /tmp/ccNvm23w.s page 148
+ ARM GAS /tmp/ccf4acmH.s page 148
3013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check
@@ -8878,7 +8878,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3067:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3068:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledExternalClock(const TIM_TypeDef *TIMx)
3069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccNvm23w.s page 149
+ ARM GAS /tmp/ccf4acmH.s page 149
3070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SMCR, TIM_SMCR_ECE) == (TIM_SMCR_ECE)) ? 1UL : 0UL);
@@ -8938,7 +8938,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can operate as a master timer.
3125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS LL_TIM_SetTriggerOutput
3126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccNvm23w.s page 150
+ ARM GAS /tmp/ccf4acmH.s page 150
3127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TimerSynchronization This parameter can be one of the following values:
@@ -8998,7 +8998,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_RESET
3182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_GATED
3183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_TRIGGER
- ARM GAS /tmp/ccNvm23w.s page 151
+ ARM GAS /tmp/ccf4acmH.s page 151
3184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_SLAVEMODE_COMBINED_RESETTRIGGER
@@ -9058,7 +9058,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 152
+ ARM GAS /tmp/ccf4acmH.s page 152
3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled.
@@ -9118,7 +9118,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @}
3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 153
+ ARM GAS /tmp/ccf4acmH.s page 153
3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration
@@ -9178,7 +9178,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6
3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8
3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
- ARM GAS /tmp/ccNvm23w.s page 154
+ ARM GAS /tmp/ccf4acmH.s page 154
3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -9238,7 +9238,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5
3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6
3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8
- ARM GAS /tmp/ccNvm23w.s page 155
+ ARM GAS /tmp/ccf4acmH.s page 155
3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5
@@ -9298,7 +9298,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 156
+ ARM GAS /tmp/ccf4acmH.s page 156
3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled.
@@ -9358,7 +9358,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT)
3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 157
+ ARM GAS /tmp/ccf4acmH.s page 157
3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input.
@@ -9418,7 +9418,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values:
3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN
3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2
- ARM GAS /tmp/ccNvm23w.s page 158
+ ARM GAS /tmp/ccf4acmH.s page 158
3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values:
@@ -9478,7 +9478,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices
3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values:
3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER
- ARM GAS /tmp/ccNvm23w.s page 159
+ ARM GAS /tmp/ccf4acmH.s page 159
3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS
@@ -9538,7 +9538,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** *
3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO
3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI
- ARM GAS /tmp/ccNvm23w.s page 160
+ ARM GAS /tmp/ccf4acmH.s page 160
3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE
@@ -9598,7 +9598,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF));
3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
- ARM GAS /tmp/ccNvm23w.s page 161
+ ARM GAS /tmp/ccf4acmH.s page 161
3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
@@ -9658,7 +9658,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F).
- ARM GAS /tmp/ccNvm23w.s page 162
+ ARM GAS /tmp/ccf4acmH.s page 162
3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4
@@ -9718,7 +9718,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 inte
3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6
3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccNvm23w.s page 163
+ ARM GAS /tmp/ccf4acmH.s page 163
3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
@@ -9778,7 +9778,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 164
+ ARM GAS /tmp/ccf4acmH.s page 164
3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx)
@@ -9838,7 +9838,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
3979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccNvm23w.s page 165
+ ARM GAS /tmp/ccf4acmH.s page 165
3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -9898,7 +9898,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccNvm23w.s page 166
+ ARM GAS /tmp/ccf4acmH.s page 166
4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -9958,7 +9958,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
4094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
4095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
- ARM GAS /tmp/ccNvm23w.s page 167
+ ARM GAS /tmp/ccf4acmH.s page 167
4096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt (UIE).
@@ -10018,7 +10018,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /**
4151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable capture/compare 2 interrupt (CC2IE).
4152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER CC2IE LL_TIM_EnableIT_CC2
- ARM GAS /tmp/ccNvm23w.s page 168
+ ARM GAS /tmp/ccf4acmH.s page 168
4153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
@@ -10078,7 +10078,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER CC3IE LL_TIM_IsEnabledIT_CC3
4208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
4209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
- ARM GAS /tmp/ccNvm23w.s page 169
+ ARM GAS /tmp/ccf4acmH.s page 169
4210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
@@ -10138,7 +10138,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
4265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
4266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableIT_COM(TIM_TypeDef *TIMx)
- ARM GAS /tmp/ccNvm23w.s page 170
+ ARM GAS /tmp/ccf4acmH.s page 170
4267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
@@ -10198,7 +10198,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_BRK(TIM_TypeDef *TIMx)
4322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
4323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_BIE);
- ARM GAS /tmp/ccNvm23w.s page 171
+ ARM GAS /tmp/ccf4acmH.s page 171
4324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
@@ -10258,7 +10258,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the update DMA request (UDE) is enabled.
4379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll DIER UDE LL_TIM_IsEnabledDMAReq_UPDATE
4380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
- ARM GAS /tmp/ccNvm23w.s page 172
+ ARM GAS /tmp/ccf4acmH.s page 172
4381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0).
@@ -10318,7 +10318,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance
4436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None
4437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
- ARM GAS /tmp/ccNvm23w.s page 173
+ ARM GAS /tmp/ccf4acmH.s page 173
4438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableDMAReq_CC2(TIM_TypeDef *TIMx)
@@ -10378,7 +10378,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */
4493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableDMAReq_CC4(TIM_TypeDef *TIMx)
4494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
- ARM GAS /tmp/ccNvm23w.s page 174
+ ARM GAS /tmp/ccf4acmH.s page 174
4495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_CC4DE);
@@ -10438,7 +10438,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
4549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** {
4550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->DIER, TIM_DIER_COMDE) == (TIM_DIER_COMDE)) ? 1UL : 0UL);
4551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }
- ARM GAS /tmp/ccNvm23w.s page 175
+ ARM GAS /tmp/ccf4acmH.s page 175
4552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h ****
@@ -10498,7 +10498,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
1980 00e8 43F00103 orr r3, r3, #1
1981 00ec 4361 str r3, [r0, #20]
1982 .LVL187:
- ARM GAS /tmp/ccNvm23w.s page 176
+ ARM GAS /tmp/ccf4acmH.s page 176
1983 .loc 2 4601 3 is_stmt 0 view .LVU575
@@ -10558,7 +10558,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2029 0006 8360 str r3, [r0, #8]
408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH;
2030 .loc 1 408 3 is_stmt 1 view .LVU586
- ARM GAS /tmp/ccNvm23w.s page 177
+ ARM GAS /tmp/ccf4acmH.s page 177
408:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_OC_InitStruct->OCPolarity = LL_TIM_OCPOLARITY_HIGH;
@@ -10618,7 +10618,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
2074 .loc 1 435 3 view .LVU600
2075 0006 B3F5805F cmp r3, #4096
- ARM GAS /tmp/ccNvm23w.s page 178
+ ARM GAS /tmp/ccf4acmH.s page 178
2076 000a 1DD0 beq .L85
@@ -10678,7 +10678,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
435:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
2118 .loc 1 435 3 view .LVU613
2119 003a F1E7 b .L90
- ARM GAS /tmp/ccNvm23w.s page 179
+ ARM GAS /tmp/ccf4acmH.s page 179
2120 .LVL199:
@@ -10738,7 +10738,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2164 .LFB383:
470:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** /* Set the default configuration */
2165 .loc 1 470 1 view -0
- ARM GAS /tmp/ccNvm23w.s page 180
+ ARM GAS /tmp/ccf4acmH.s page 180
2166 .cfi_startproc
@@ -10798,7 +10798,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2211 .LVL209:
494:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
2212 .loc 1 494 3 is_stmt 1 view .LVU638
- ARM GAS /tmp/ccNvm23w.s page 181
+ ARM GAS /tmp/ccf4acmH.s page 181
496:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** {
@@ -10858,7 +10858,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2254 .loc 1 499 7 is_stmt 1 view .LVU651
499:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** break;
2255 .loc 1 499 16 is_stmt 0 view .LVU652
- ARM GAS /tmp/ccNvm23w.s page 182
+ ARM GAS /tmp/ccf4acmH.s page 182
2256 0030 FFF7FEFF bl IC1Config
@@ -10918,7 +10918,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2299 0008 4FF48032 mov r2, #65536
2300 000c 8260 str r2, [r0, #8]
529:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_EncoderInitStruct->IC1Filter = LL_TIM_IC_FILTER_FDIV1;
- ARM GAS /tmp/ccNvm23w.s page 183
+ ARM GAS /tmp/ccf4acmH.s page 183
2301 .loc 1 529 3 is_stmt 1 view .LVU666
@@ -10978,7 +10978,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2343 .cfi_offset 4, -8
2344 .cfi_offset 5, -4
548:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** uint32_t tmpccer;
- ARM GAS /tmp/ccNvm23w.s page 184
+ ARM GAS /tmp/ccf4acmH.s page 184
2345 .loc 1 548 3 is_stmt 1 view .LVU681
@@ -11038,7 +11038,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2377 0012 4B89 ldrh r3, [r1, #10]
574:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_EncoderInitStruct->IC1Filter >> 16U);
2378 .loc 1 574 12 view .LVU704
- ARM GAS /tmp/ccNvm23w.s page 185
+ ARM GAS /tmp/ccf4acmH.s page 185
2379 0014 1343 orrs r3, r3, r2
@@ -11098,7 +11098,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2415 .loc 1 585 3 is_stmt 1 view .LVU722
585:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccer |= (uint32_t)(TIM_EncoderInitStruct->IC1Polarity);
2416 .loc 1 585 11 is_stmt 0 view .LVU723
- ARM GAS /tmp/ccNvm23w.s page 186
+ ARM GAS /tmp/ccf4acmH.s page 186
2417 0034 24F0AA04 bic r4, r4, #170
@@ -11158,7 +11158,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2456 0052 8361 str r3, [r0, #24]
597:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
2457 .loc 1 597 3 view .LVU739
- ARM GAS /tmp/ccNvm23w.s page 187
+ ARM GAS /tmp/ccf4acmH.s page 187
2458 0054 0262 str r2, [r0, #32]
@@ -11218,7 +11218,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
615:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
2503 .loc 1 615 47 is_stmt 0 view .LVU751
2504 0008 C360 str r3, [r0, #12]
- ARM GAS /tmp/ccNvm23w.s page 188
+ ARM GAS /tmp/ccf4acmH.s page 188
616:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
@@ -11278,7 +11278,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2546 .loc 1 656 3 is_stmt 1 view .LVU766
656:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
2547 .loc 1 656 10 is_stmt 0 view .LVU767
- ARM GAS /tmp/ccNvm23w.s page 189
+ ARM GAS /tmp/ccf4acmH.s page 189
2548 000a 4568 ldr r5, [r0, #4]
@@ -11338,7 +11338,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2584 .LVL251:
681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);
2585 .loc 1 681 3 is_stmt 1 view .LVU786
- ARM GAS /tmp/ccNvm23w.s page 190
+ ARM GAS /tmp/ccf4acmH.s page 190
681:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** tmpccmr1 |= (uint32_t)(TIM_HallSensorInitStruct->IC1Prescaler >> 16U);
@@ -11398,7 +11398,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2622 .loc 1 697 3 view .LVU804
2623 0046 8460 str r4, [r0, #8]
700:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c ****
- ARM GAS /tmp/ccNvm23w.s page 191
+ ARM GAS /tmp/ccf4acmH.s page 191
2624 .loc 1 700 3 view .LVU805
@@ -11458,7 +11458,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2669 .thumb_func
2671 LL_TIM_BDTR_StructInit:
2672 .LVL263:
- ARM GAS /tmp/ccNvm23w.s page 192
+ ARM GAS /tmp/ccf4acmH.s page 192
2673 .LFB389:
@@ -11518,7 +11518,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2707 .loc 1 730 3 is_stmt 1 view .LVU835
730:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** TIM_BDTRInitStruct->AutomaticOutput = LL_TIM_AUTOMATICOUTPUT_DISABLE;
2708 .loc 1 730 39 is_stmt 0 view .LVU836
- ARM GAS /tmp/ccNvm23w.s page 193
+ ARM GAS /tmp/ccf4acmH.s page 193
2709 0014 0362 str r3, [r0, #32]
@@ -11578,7 +11578,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2749 .loc 1 770 3 view .LVU852
2750 0002 0B7B ldrb r3, [r1, #12] @ zero_extendqisi2
2751 .LVL266:
- ARM GAS /tmp/ccNvm23w.s page 194
+ ARM GAS /tmp/ccf4acmH.s page 194
770:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, TIM_BDTRInitStruct->OSSIState);
@@ -11638,7 +11638,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2792 .loc 1 775 3 is_stmt 1 view .LVU866
2793 0028 23F48043 bic r3, r3, #16384
2794 .LVL280:
- ARM GAS /tmp/ccNvm23w.s page 195
+ ARM GAS /tmp/ccf4acmH.s page 195
775:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, TIM_BDTRInitStruct->BreakFilter);
@@ -11698,7 +11698,7 @@ ARM GAS /tmp/ccNvm23w.s page 1
2834 .loc 1 786 5 view .LVU881
2835 0052 1343 orrs r3, r3, r2
2836 .LVL290:
- ARM GAS /tmp/ccNvm23w.s page 196
+ ARM GAS /tmp/ccf4acmH.s page 196
787:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_tim.c **** }
@@ -11742,70 +11742,70 @@ ARM GAS /tmp/ccNvm23w.s page 1
2869 .file 4 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
2870 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
2871 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/ccNvm23w.s page 197
+ ARM GAS /tmp/ccf4acmH.s page 197
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_tim.c
- /tmp/ccNvm23w.s:20 .text.OC1Config:00000000 $t
- /tmp/ccNvm23w.s:25 .text.OC1Config:00000000 OC1Config
- /tmp/ccNvm23w.s:166 .text.OC1Config:0000006c $d
- /tmp/ccNvm23w.s:173 .text.OC2Config:00000000 $t
- /tmp/ccNvm23w.s:178 .text.OC2Config:00000000 OC2Config
- /tmp/ccNvm23w.s:320 .text.OC2Config:00000074 $d
- /tmp/ccNvm23w.s:327 .text.OC3Config:00000000 $t
- /tmp/ccNvm23w.s:332 .text.OC3Config:00000000 OC3Config
- /tmp/ccNvm23w.s:474 .text.OC3Config:00000070 $d
- /tmp/ccNvm23w.s:481 .text.OC4Config:00000000 $t
- /tmp/ccNvm23w.s:486 .text.OC4Config:00000000 OC4Config
- /tmp/ccNvm23w.s:602 .text.OC4Config:00000054 $d
- /tmp/ccNvm23w.s:609 .text.OC5Config:00000000 $t
- /tmp/ccNvm23w.s:614 .text.OC5Config:00000000 OC5Config
- /tmp/ccNvm23w.s:723 .text.OC5Config:00000054 $d
- /tmp/ccNvm23w.s:730 .text.OC6Config:00000000 $t
- /tmp/ccNvm23w.s:735 .text.OC6Config:00000000 OC6Config
- /tmp/ccNvm23w.s:841 .text.OC6Config:00000054 $d
- /tmp/ccNvm23w.s:848 .text.IC1Config:00000000 $t
- /tmp/ccNvm23w.s:853 .text.IC1Config:00000000 IC1Config
- /tmp/ccNvm23w.s:908 .text.IC2Config:00000000 $t
- /tmp/ccNvm23w.s:913 .text.IC2Config:00000000 IC2Config
- /tmp/ccNvm23w.s:968 .text.IC3Config:00000000 $t
- /tmp/ccNvm23w.s:973 .text.IC3Config:00000000 IC3Config
- /tmp/ccNvm23w.s:1028 .text.IC4Config:00000000 $t
- /tmp/ccNvm23w.s:1033 .text.IC4Config:00000000 IC4Config
- /tmp/ccNvm23w.s:1088 .text.LL_TIM_DeInit:00000000 $t
- /tmp/ccNvm23w.s:1094 .text.LL_TIM_DeInit:00000000 LL_TIM_DeInit
- /tmp/ccNvm23w.s:1726 .text.LL_TIM_DeInit:000001b0 $d
- /tmp/ccNvm23w.s:1746 .text.LL_TIM_StructInit:00000000 $t
- /tmp/ccNvm23w.s:1752 .text.LL_TIM_StructInit:00000000 LL_TIM_StructInit
- /tmp/ccNvm23w.s:1783 .text.LL_TIM_Init:00000000 $t
- /tmp/ccNvm23w.s:1789 .text.LL_TIM_Init:00000000 LL_TIM_Init
- /tmp/ccNvm23w.s:1995 .text.LL_TIM_Init:000000f4 $d
- /tmp/ccNvm23w.s:2006 .text.LL_TIM_OC_StructInit:00000000 $t
- /tmp/ccNvm23w.s:2012 .text.LL_TIM_OC_StructInit:00000000 LL_TIM_OC_StructInit
- /tmp/ccNvm23w.s:2051 .text.LL_TIM_OC_Init:00000000 $t
- /tmp/ccNvm23w.s:2057 .text.LL_TIM_OC_Init:00000000 LL_TIM_OC_Init
- /tmp/ccNvm23w.s:2156 .text.LL_TIM_IC_StructInit:00000000 $t
- /tmp/ccNvm23w.s:2162 .text.LL_TIM_IC_StructInit:00000000 LL_TIM_IC_StructInit
- /tmp/ccNvm23w.s:2190 .text.LL_TIM_IC_Init:00000000 $t
- /tmp/ccNvm23w.s:2196 .text.LL_TIM_IC_Init:00000000 LL_TIM_IC_Init
- /tmp/ccNvm23w.s:2275 .text.LL_TIM_ENCODER_StructInit:00000000 $t
- /tmp/ccNvm23w.s:2281 .text.LL_TIM_ENCODER_StructInit:00000000 LL_TIM_ENCODER_StructInit
- /tmp/ccNvm23w.s:2325 .text.LL_TIM_ENCODER_Init:00000000 $t
- /tmp/ccNvm23w.s:2331 .text.LL_TIM_ENCODER_Init:00000000 LL_TIM_ENCODER_Init
- /tmp/ccNvm23w.s:2473 .text.LL_TIM_ENCODER_Init:0000005c $d
- /tmp/ccNvm23w.s:2478 .text.LL_TIM_HALLSENSOR_StructInit:00000000 $t
- /tmp/ccNvm23w.s:2484 .text.LL_TIM_HALLSENSOR_StructInit:00000000 LL_TIM_HALLSENSOR_StructInit
- /tmp/ccNvm23w.s:2511 .text.LL_TIM_HALLSENSOR_Init:00000000 $t
- /tmp/ccNvm23w.s:2517 .text.LL_TIM_HALLSENSOR_Init:00000000 LL_TIM_HALLSENSOR_Init
- /tmp/ccNvm23w.s:2659 .text.LL_TIM_HALLSENSOR_Init:00000058 $d
- /tmp/ccNvm23w.s:2665 .text.LL_TIM_BDTR_StructInit:00000000 $t
- /tmp/ccNvm23w.s:2671 .text.LL_TIM_BDTR_StructInit:00000000 LL_TIM_BDTR_StructInit
- /tmp/ccNvm23w.s:2719 .text.LL_TIM_BDTR_Init:00000000 $t
- ARM GAS /tmp/ccNvm23w.s page 198
+ /tmp/ccf4acmH.s:20 .text.OC1Config:00000000 $t
+ /tmp/ccf4acmH.s:25 .text.OC1Config:00000000 OC1Config
+ /tmp/ccf4acmH.s:166 .text.OC1Config:0000006c $d
+ /tmp/ccf4acmH.s:173 .text.OC2Config:00000000 $t
+ /tmp/ccf4acmH.s:178 .text.OC2Config:00000000 OC2Config
+ /tmp/ccf4acmH.s:320 .text.OC2Config:00000074 $d
+ /tmp/ccf4acmH.s:327 .text.OC3Config:00000000 $t
+ /tmp/ccf4acmH.s:332 .text.OC3Config:00000000 OC3Config
+ /tmp/ccf4acmH.s:474 .text.OC3Config:00000070 $d
+ /tmp/ccf4acmH.s:481 .text.OC4Config:00000000 $t
+ /tmp/ccf4acmH.s:486 .text.OC4Config:00000000 OC4Config
+ /tmp/ccf4acmH.s:602 .text.OC4Config:00000054 $d
+ /tmp/ccf4acmH.s:609 .text.OC5Config:00000000 $t
+ /tmp/ccf4acmH.s:614 .text.OC5Config:00000000 OC5Config
+ /tmp/ccf4acmH.s:723 .text.OC5Config:00000054 $d
+ /tmp/ccf4acmH.s:730 .text.OC6Config:00000000 $t
+ /tmp/ccf4acmH.s:735 .text.OC6Config:00000000 OC6Config
+ /tmp/ccf4acmH.s:841 .text.OC6Config:00000054 $d
+ /tmp/ccf4acmH.s:848 .text.IC1Config:00000000 $t
+ /tmp/ccf4acmH.s:853 .text.IC1Config:00000000 IC1Config
+ /tmp/ccf4acmH.s:908 .text.IC2Config:00000000 $t
+ /tmp/ccf4acmH.s:913 .text.IC2Config:00000000 IC2Config
+ /tmp/ccf4acmH.s:968 .text.IC3Config:00000000 $t
+ /tmp/ccf4acmH.s:973 .text.IC3Config:00000000 IC3Config
+ /tmp/ccf4acmH.s:1028 .text.IC4Config:00000000 $t
+ /tmp/ccf4acmH.s:1033 .text.IC4Config:00000000 IC4Config
+ /tmp/ccf4acmH.s:1088 .text.LL_TIM_DeInit:00000000 $t
+ /tmp/ccf4acmH.s:1094 .text.LL_TIM_DeInit:00000000 LL_TIM_DeInit
+ /tmp/ccf4acmH.s:1726 .text.LL_TIM_DeInit:000001b0 $d
+ /tmp/ccf4acmH.s:1746 .text.LL_TIM_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:1752 .text.LL_TIM_StructInit:00000000 LL_TIM_StructInit
+ /tmp/ccf4acmH.s:1783 .text.LL_TIM_Init:00000000 $t
+ /tmp/ccf4acmH.s:1789 .text.LL_TIM_Init:00000000 LL_TIM_Init
+ /tmp/ccf4acmH.s:1995 .text.LL_TIM_Init:000000f4 $d
+ /tmp/ccf4acmH.s:2006 .text.LL_TIM_OC_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:2012 .text.LL_TIM_OC_StructInit:00000000 LL_TIM_OC_StructInit
+ /tmp/ccf4acmH.s:2051 .text.LL_TIM_OC_Init:00000000 $t
+ /tmp/ccf4acmH.s:2057 .text.LL_TIM_OC_Init:00000000 LL_TIM_OC_Init
+ /tmp/ccf4acmH.s:2156 .text.LL_TIM_IC_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:2162 .text.LL_TIM_IC_StructInit:00000000 LL_TIM_IC_StructInit
+ /tmp/ccf4acmH.s:2190 .text.LL_TIM_IC_Init:00000000 $t
+ /tmp/ccf4acmH.s:2196 .text.LL_TIM_IC_Init:00000000 LL_TIM_IC_Init
+ /tmp/ccf4acmH.s:2275 .text.LL_TIM_ENCODER_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:2281 .text.LL_TIM_ENCODER_StructInit:00000000 LL_TIM_ENCODER_StructInit
+ /tmp/ccf4acmH.s:2325 .text.LL_TIM_ENCODER_Init:00000000 $t
+ /tmp/ccf4acmH.s:2331 .text.LL_TIM_ENCODER_Init:00000000 LL_TIM_ENCODER_Init
+ /tmp/ccf4acmH.s:2473 .text.LL_TIM_ENCODER_Init:0000005c $d
+ /tmp/ccf4acmH.s:2478 .text.LL_TIM_HALLSENSOR_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:2484 .text.LL_TIM_HALLSENSOR_StructInit:00000000 LL_TIM_HALLSENSOR_StructInit
+ /tmp/ccf4acmH.s:2511 .text.LL_TIM_HALLSENSOR_Init:00000000 $t
+ /tmp/ccf4acmH.s:2517 .text.LL_TIM_HALLSENSOR_Init:00000000 LL_TIM_HALLSENSOR_Init
+ /tmp/ccf4acmH.s:2659 .text.LL_TIM_HALLSENSOR_Init:00000058 $d
+ /tmp/ccf4acmH.s:2665 .text.LL_TIM_BDTR_StructInit:00000000 $t
+ /tmp/ccf4acmH.s:2671 .text.LL_TIM_BDTR_StructInit:00000000 LL_TIM_BDTR_StructInit
+ /tmp/ccf4acmH.s:2719 .text.LL_TIM_BDTR_Init:00000000 $t
+ ARM GAS /tmp/ccf4acmH.s page 198
- /tmp/ccNvm23w.s:2725 .text.LL_TIM_BDTR_Init:00000000 LL_TIM_BDTR_Init
- /tmp/ccNvm23w.s:2862 .text.LL_TIM_BDTR_Init:00000068 $d
+ /tmp/ccf4acmH.s:2725 .text.LL_TIM_BDTR_Init:00000000 LL_TIM_BDTR_Init
+ /tmp/ccf4acmH.s:2862 .text.LL_TIM_BDTR_Init:00000068 $d
NO UNDEFINED SYMBOLS
diff --git a/build/stm32f7xx_ll_usart.lst b/build/stm32f7xx_ll_usart.lst
index 1bf52c1..a432ca2 100644
--- a/build/stm32f7xx_ll_usart.lst
+++ b/build/stm32f7xx_ll_usart.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccI996jB.s page 1
+ARM GAS /tmp/ccImspJW.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccI996jB.s page 1
28:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #include "stm32f7xx.h"
29:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver
- ARM GAS /tmp/ccI996jB.s page 2
+ ARM GAS /tmp/ccImspJW.s page 2
31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccI996jB.s page 1
85:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_STOPBI
86:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary
- ARM GAS /tmp/ccI996jB.s page 3
+ ARM GAS /tmp/ccImspJW.s page 3
88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetStopBitsLength().*/
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccI996jB.s page 1
142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t LastBitClockPulse; /*!< Specifies whether the clock pulse corresponding to the l
143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data bit (MSB) has to be output on the SCLK pin in synch
144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_LASTCL
- ARM GAS /tmp/ccI996jB.s page 4
+ ARM GAS /tmp/ccImspJW.s page 4
145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccI996jB.s page 1
199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TC USART_ISR_TC /*!< Transmission com
200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_TXE USART_ISR_TXE /*!< Transmit data re
201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detect
- ARM GAS /tmp/ccI996jB.s page 5
+ ARM GAS /tmp/ccImspJW.s page 5
202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt fl
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccI996jB.s page 1
256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter
- ARM GAS /tmp/ccI996jB.s page 6
+ ARM GAS /tmp/ccImspJW.s page 6
259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccI996jB.s page 1
313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /*USE_FULL_LL_DRIVER*/
315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 7
+ ARM GAS /tmp/ccImspJW.s page 7
316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccI996jB.s page 1
370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion
- ARM GAS /tmp/ccI996jB.s page 8
+ ARM GAS /tmp/ccImspJW.s page 8
373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccI996jB.s page 1
427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 9
+ ARM GAS /tmp/ccImspJW.s page 9
430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM)
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccI996jB.s page 1
484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported macro ------------------------------------------------------------*/
485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Macros USART Exported Macros
486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{
- ARM GAS /tmp/ccI996jB.s page 10
+ ARM GAS /tmp/ccImspJW.s page 10
487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccI996jB.s page 1
541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @}
542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 11
+ ARM GAS /tmp/ccImspJW.s page 11
544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccI996jB.s page 1
598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccI996jB.s page 12
+ ARM GAS /tmp/ccImspJW.s page 12
601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx)
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccI996jB.s page 1
655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR3, USART_CR3_UCESM);
656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 13
+ ARM GAS /tmp/ccImspJW.s page 13
658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccI996jB.s page 1
712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TE);
713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 14
+ ARM GAS /tmp/ccImspJW.s page 14
715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccI996jB.s page 1
769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PS LL_USART_GetParity\n
771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity
- ARM GAS /tmp/ccI996jB.s page 15
+ ARM GAS /tmp/ccImspJW.s page 15
772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccI996jB.s page 1
826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n
- ARM GAS /tmp/ccI996jB.s page 16
+ ARM GAS /tmp/ccImspJW.s page 16
829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccI996jB.s page 1
883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetOverSampling(USART_TypeDef *USARTx, uint32_t OverSampling)
884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling);
- ARM GAS /tmp/ccI996jB.s page 17
+ ARM GAS /tmp/ccImspJW.s page 17
886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccI996jB.s page 1
940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_1EDGE
941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PHASE_2EDGE
942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccI996jB.s page 18
+ ARM GAS /tmp/ccImspJW.s page 18
943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccI996jB.s page 1
997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_INSTANCE(USARTx) can be used to check whether or not
998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Synchronous mode is supported by the USARTx instance.
999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence :
- ARM GAS /tmp/ccI996jB.s page 19
+ ARM GAS /tmp/ccImspJW.s page 19
1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0).
1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
- ARM GAS /tmp/ccI996jB.s page 20
+ ARM GAS /tmp/ccImspJW.s page 20
1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx)
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN
1112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD
1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values:
- ARM GAS /tmp/ccI996jB.s page 21
+ ARM GAS /tmp/ccImspJW.s page 21
1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve RX pin active level logic configuration
1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel
- ARM GAS /tmp/ccI996jB.s page 22
+ ARM GAS /tmp/ccImspJW.s page 22
1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Retrieve Binary data configuration
1226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 DATAINV LL_USART_GetBinaryDataLogic
1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
- ARM GAS /tmp/ccI996jB.s page 23
+ ARM GAS /tmp/ccImspJW.s page 23
1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Auto Baud-Rate Detection
1283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(USARTx) can be used to check whether or
1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance.
- ARM GAS /tmp/ccI996jB.s page 24
+ ARM GAS /tmp/ccImspJW.s page 24
1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_ABRMODE));
1340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h ****
- ARM GAS /tmp/ccI996jB.s page 25
+ ARM GAS /tmp/ccImspJW.s page 25
1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
1397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_
- ARM GAS /tmp/ccI996jB.s page 26
+ ARM GAS /tmp/ccImspJW.s page 26
1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableRTSHWFlowCtrl(USART_TypeDef *USARTx)
1454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** {
1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE);
- ARM GAS /tmp/ccI996jB.s page 27
+ ARM GAS /tmp/ccImspJW.s page 27
1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** }
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values:
1511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_NONE
1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS
- ARM GAS /tmp/ccI996jB.s page 28
+ ARM GAS /tmp/ccImspJW.s page 28
1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 OVRDIS LL_USART_DisableOverrunDetect
1568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance
1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None
- ARM GAS /tmp/ccI996jB.s page 29
+ ARM GAS /tmp/ccImspJW.s page 29
1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /**
1625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure USART BRR register for achieving expected Baud Rate value.
1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content)
- ARM GAS /tmp/ccI996jB.s page 30
+ ARM GAS /tmp/ccImspJW.s page 30
1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccI996jB.s page 1
52 .L4:
1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U;
53 .loc 2 1648 5 is_stmt 1 view .LVU10
- ARM GAS /tmp/ccI996jB.s page 31
+ ARM GAS /tmp/ccImspJW.s page 31
1648:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrtemp = usartdiv & 0xFFF0U;
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccI996jB.s page 1
12:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * This software is licensed under terms that can be found in the LICENSE file
13:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * in the root directory of this software component.
14:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
- ARM GAS /tmp/ccI996jB.s page 32
+ ARM GAS /tmp/ccImspJW.s page 32
15:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** *
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccI996jB.s page 1
69:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** || ((__VALUE__) == LL_USART_DIRECTION_TX) \
70:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
71:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c ****
- ARM GAS /tmp/ccI996jB.s page 33
+ ARM GAS /tmp/ccImspJW.s page 33
72:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccI996jB.s page 1
126:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** */
127:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** ErrorStatus LL_USART_DeInit(const USART_TypeDef *USARTx)
128:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** {
- ARM GAS /tmp/ccI996jB.s page 34
+ ARM GAS /tmp/ccImspJW.s page 34
90 .loc 1 128 1 is_stmt 1 view -0
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccI996jB.s page 1
114 0012 3B4B ldr r3, .L23+12
115 0014 9842 cmp r0, r3
116 0016 31D0 beq .L18
- ARM GAS /tmp/ccI996jB.s page 35
+ ARM GAS /tmp/ccImspJW.s page 35
159:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** {
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccI996jB.s page 1
193:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
194:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c ****
195:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Release reset of UART clock */
- ARM GAS /tmp/ccI996jB.s page 36
+ ARM GAS /tmp/ccImspJW.s page 36
196:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccI996jB.s page 1
33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Define to prevent recursive inclusion -------------------------------------*/
- ARM GAS /tmp/ccI996jB.s page 37
+ ARM GAS /tmp/ccImspJW.s page 37
36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #ifndef __STM32F7xx_LL_BUS_H
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccI996jB.s page 1
90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(DMA2D)
91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_DMA2D RCC_AHB1ENR_DMA2DEN
92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* DMA2D */
- ARM GAS /tmp/ccI996jB.s page 38
+ ARM GAS /tmp/ccImspJW.s page 38
93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(ETH)
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccI996jB.s page 1
147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_ALL 0xFFFFFFFFU
148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM2 RCC_APB1ENR_TIM2EN
149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM3 RCC_APB1ENR_TIM3EN
- ARM GAS /tmp/ccI996jB.s page 39
+ ARM GAS /tmp/ccImspJW.s page 39
150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_TIM4 RCC_APB1ENR_TIM4EN
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccI996jB.s page 1
204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC2 RCC_APB2ENR_ADC2EN
205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC3 RCC_APB2ENR_ADC3EN
206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_SDMMC1 RCC_APB2ENR_SDMMC1EN
- ARM GAS /tmp/ccI996jB.s page 40
+ ARM GAS /tmp/ccImspJW.s page 40
207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(SDMMC2)
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccI996jB.s page 1
261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIODEN LL_AHB1_GRP1_EnableClock\n
262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOEEN LL_AHB1_GRP1_EnableClock\n
263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOFEN LL_AHB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccI996jB.s page 41
+ ARM GAS /tmp/ccImspJW.s page 41
264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOGEN LL_AHB1_GRP1_EnableClock\n
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccI996jB.s page 1
318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Check if AHB1 peripheral clock is enabled or not
320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_IsEnabledClock\n
- ARM GAS /tmp/ccI996jB.s page 42
+ ARM GAS /tmp/ccImspJW.s page 42
321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1ENR GPIOBEN LL_AHB1_GRP1_IsEnabledClock\n
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccI996jB.s page 1
375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB1 peripherals clock.
- ARM GAS /tmp/ccI996jB.s page 43
+ ARM GAS /tmp/ccImspJW.s page 43
378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB1ENR GPIOAEN LL_AHB1_GRP1_DisableClock\n
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccI996jB.s page 1
432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
- ARM GAS /tmp/ccI996jB.s page 44
+ ARM GAS /tmp/ccImspJW.s page 44
435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB1 peripherals reset.
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccI996jB.s page 1
489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOGRST LL_AHB1_GRP1_ReleaseReset\n
490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOHRST LL_AHB1_GRP1_ReleaseReset\n
491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOIRST LL_AHB1_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccI996jB.s page 45
+ ARM GAS /tmp/ccImspJW.s page 45
492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1RSTR GPIOJRST LL_AHB1_GRP1_ReleaseReset\n
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccI996jB.s page 1
546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR BKPSRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DTCMRAMLPEN LL_AHB1_GRP1_EnableClockLowPower\n
548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA1LPEN LL_AHB1_GRP1_EnableClockLowPower\n
- ARM GAS /tmp/ccI996jB.s page 46
+ ARM GAS /tmp/ccImspJW.s page 46
549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR DMA2LPEN LL_AHB1_GRP1_EnableClockLowPower\n
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccI996jB.s page 1
603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIODLPEN LL_AHB1_GRP1_DisableClockLowPower\n
604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOELPEN LL_AHB1_GRP1_DisableClockLowPower\n
605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOFLPEN LL_AHB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccI996jB.s page 47
+ ARM GAS /tmp/ccImspJW.s page 47
606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB1LPENR GPIOGLPEN LL_AHB1_GRP1_DisableClockLowPower\n
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccI996jB.s page 1
660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB1LPENR, Periphs);
662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- ARM GAS /tmp/ccI996jB.s page 48
+ ARM GAS /tmp/ccImspJW.s page 48
663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccI996jB.s page 1
717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_RNG
718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_OTGFS
719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
- ARM GAS /tmp/ccI996jB.s page 49
+ ARM GAS /tmp/ccImspJW.s page 49
720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccI996jB.s page 1
774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_ForceReset(uint32_t Periphs)
- ARM GAS /tmp/ccI996jB.s page 50
+ ARM GAS /tmp/ccImspJW.s page 50
777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccI996jB.s page 1
831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg;
832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2LPENR, Periphs);
833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */
- ARM GAS /tmp/ccI996jB.s page 51
+ ARM GAS /tmp/ccImspJW.s page 51
834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2LPENR, Periphs);
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccI996jB.s page 1
888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB3ENR, Periphs);
889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg;
890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- ARM GAS /tmp/ccI996jB.s page 52
+ ARM GAS /tmp/ccImspJW.s page 52
891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h ****
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccI996jB.s page 1
945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values:
946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB2_GRP1_PERIPH_ALL
947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*)
- ARM GAS /tmp/ccI996jB.s page 53
+ ARM GAS /tmp/ccImspJW.s page 53
948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /**
1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable APB1 peripherals clock.
1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_EnableClock\n
- ARM GAS /tmp/ccI996jB.s page 54
+ ARM GAS /tmp/ccImspJW.s page 54
1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR TIM3EN LL_APB1_GRP1_EnableClock\n
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*)
1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*)
1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*)
- ARM GAS /tmp/ccI996jB.s page 55
+ ARM GAS /tmp/ccImspJW.s page 55
1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4
1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5
1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6
- ARM GAS /tmp/ccI996jB.s page 56
+ ARM GAS /tmp/ccImspJW.s page 56
1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_DisableClock\n
1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C1EN LL_APB1_GRP1_DisableClock\n
1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C2EN LL_APB1_GRP1_DisableClock\n
- ARM GAS /tmp/ccI996jB.s page 57
+ ARM GAS /tmp/ccImspJW.s page 57
1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR I2C3EN LL_APB1_GRP1_DisableClock\n
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1RSTR TIM2RST LL_APB1_GRP1_ForceReset\n
1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM3RST LL_APB1_GRP1_ForceReset\n
1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM4RST LL_APB1_GRP1_ForceReset\n
- ARM GAS /tmp/ccI996jB.s page 58
+ ARM GAS /tmp/ccImspJW.s page 58
1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR TIM5RST LL_APB1_GRP1_ForceReset\n
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_PWR
1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_DAC1
1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7
- ARM GAS /tmp/ccI996jB.s page 59
+ ARM GAS /tmp/ccImspJW.s page 59
1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2
1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3
1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*)
- ARM GAS /tmp/ccI996jB.s page 60
+ ARM GAS /tmp/ccImspJW.s page 60
1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR DACLPEN LL_APB1_GRP1_EnableClockLowPower\n
1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART7LPEN LL_APB1_GRP1_EnableClockLowPower\n
1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR UART8LPEN LL_APB1_GRP1_EnableClockLowPower\n
- ARM GAS /tmp/ccI996jB.s page 61
+ ARM GAS /tmp/ccImspJW.s page 61
1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR RTCLPEN LL_APB1_GRP1_EnableClockLowPower
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_DisableClockLowPower\n
1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_DisableClockLowPower\n
1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_DisableClockLowPower\n
- ARM GAS /tmp/ccI996jB.s page 62
+ ARM GAS /tmp/ccImspJW.s page 62
1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_DisableClockLowPower\n
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** *
1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices.
1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None
- ARM GAS /tmp/ccI996jB.s page 63
+ ARM GAS /tmp/ccImspJW.s page 63
1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM10
1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM11
1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI5
- ARM GAS /tmp/ccI996jB.s page 64
+ ARM GAS /tmp/ccImspJW.s page 64
1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI6 (*)
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3
1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC1
1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SDMMC2 (*)
- ARM GAS /tmp/ccI996jB.s page 65
+ ARM GAS /tmp/ccImspJW.s page 65
1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_SPI1
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6
1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC1
1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC2
- ARM GAS /tmp/ccI996jB.s page 66
+ ARM GAS /tmp/ccImspJW.s page 66
1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC3
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_TIM8
1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART1
1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_USART6
- ARM GAS /tmp/ccI996jB.s page 67
+ ARM GAS /tmp/ccImspJW.s page 67
1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB2_GRP1_PERIPH_ADC
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1785:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM9RST LL_APB2_GRP1_ReleaseReset\n
1786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM10RST LL_APB2_GRP1_ReleaseReset\n
1787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR TIM11RST LL_APB2_GRP1_ReleaseReset\n
- ARM GAS /tmp/ccI996jB.s page 68
+ ARM GAS /tmp/ccImspJW.s page 68
1788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2RSTR SPI5RST LL_APB2_GRP1_ReleaseReset\n
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccI996jB.s page 1
176 .LBB49:
177 .LBB48:
1828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
- ARM GAS /tmp/ccI996jB.s page 69
+ ARM GAS /tmp/ccImspJW.s page 69
178 .loc 3 1828 1 view .LVU51
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccI996jB.s page 1
221 .loc 3 1370 1 view .LVU63
222 .LBE54:
223 .LBE55:
- ARM GAS /tmp/ccI996jB.s page 70
+ ARM GAS /tmp/ccImspJW.s page 70
153:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c ****
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccI996jB.s page 1
1295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** {
266 .loc 3 1295 22 view .LVU76
267 .LBB63:
- ARM GAS /tmp/ccI996jB.s page 71
+ ARM GAS /tmp/ccImspJW.s page 71
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccI996jB.s page 1
310 009a 42F48012 orr r2, r2, #1048576
311 009e 1A62 str r2, [r3, #32]
312 .LVL27:
- ARM GAS /tmp/ccI996jB.s page 72
+ ARM GAS /tmp/ccImspJW.s page 72
1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** }
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccI996jB.s page 1
180:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
355 .loc 1 180 5 is_stmt 1 view .LVU101
356 .LBB76:
- ARM GAS /tmp/ccI996jB.s page 73
+ ARM GAS /tmp/ccImspJW.s page 73
357 .LBI76:
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccI996jB.s page 1
400 00d0 1A6A ldr r2, [r3, #32]
401 00d2 22F08042 bic r2, r2, #1073741824
402 00d6 1A62 str r2, [r3, #32]
- ARM GAS /tmp/ccI996jB.s page 74
+ ARM GAS /tmp/ccImspJW.s page 74
403 .LVL36:
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccI996jB.s page 1
445 .LBE88:
129:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c ****
446 .loc 1 129 15 view .LVU127
- ARM GAS /tmp/ccI996jB.s page 75
+ ARM GAS /tmp/ccImspJW.s page 75
447 00f0 0020 movs r0, #0
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccI996jB.s page 1
485 .LCFI0:
486 .cfi_def_cfa_offset 16
487 .cfi_offset 3, -16
- ARM GAS /tmp/ccI996jB.s page 76
+ ARM GAS /tmp/ccImspJW.s page 76
488 .cfi_offset 4, -12
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccI996jB.s page 1
240:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters
241:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - DataWidth: USART_CR1_M bits according to USART_InitStruct->DataWidth value
242:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Parity: USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity
- ARM GAS /tmp/ccI996jB.s page 77
+ ARM GAS /tmp/ccImspJW.s page 77
243:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - TransferDirection: USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->Transfe
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccI996jB.s page 1
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /*---------------------------- USART CR3 Configuration ---------------------
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * Configure USARTx CR3 (Hardware Flow Control) with parameters:
261:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to
- ARM GAS /tmp/ccI996jB.s page 78
+ ARM GAS /tmp/ccImspJW.s page 78
262:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * USART_InitStruct->HardwareFlowControl value.
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccI996jB.s page 1
278:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** {
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
280:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
- ARM GAS /tmp/ccI996jB.s page 79
+ ARM GAS /tmp/ccImspJW.s page 79
281:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** else if (USARTx == UART4)
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccI996jB.s page 1
620 .loc 1 271 19 is_stmt 0 view .LVU180
621 0072 0320 movs r0, #3
622 .LVL54:
- ARM GAS /tmp/ccI996jB.s page 80
+ ARM GAS /tmp/ccImspJW.s page 80
271:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccI996jB.s page 1
654 .loc 1 279 19 is_stmt 0 view .LVU194
655 008a 3020 movs r0, #48
656 .LVL61:
- ARM GAS /tmp/ccI996jB.s page 81
+ ARM GAS /tmp/ccImspJW.s page 81
279:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccI996jB.s page 1
295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
697 .loc 1 295 7 is_stmt 1 view .LVU209
295:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
- ARM GAS /tmp/ccI996jB.s page 82
+ ARM GAS /tmp/ccImspJW.s page 82
698 .loc 1 295 19 is_stmt 0 view .LVU210
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccI996jB.s page 1
319:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Check BRR is greater than or equal to 16d */
320:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
737 .loc 1 320 7 is_stmt 1 view .LVU222
- ARM GAS /tmp/ccI996jB.s page 83
+ ARM GAS /tmp/ccImspJW.s page 83
321:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** }
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccI996jB.s page 1
776 @ frame_needed = 0, uses_anonymous_args = 0
777 @ link register save eliminated.
337:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** /* Set USART_InitStruct fields to default values */
- ARM GAS /tmp/ccI996jB.s page 84
+ ARM GAS /tmp/ccImspJW.s page 84
338:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** USART_InitStruct->BaudRate = USART_DEFAULT_BAUDRATE;
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccI996jB.s page 1
355:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * that contains the Clock configuration information for the specified USART peripheral.
356:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * @retval An ErrorStatus enumeration value:
357:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - SUCCESS: USART registers related to Clock settings are initialized according
- ARM GAS /tmp/ccI996jB.s page 85
+ ARM GAS /tmp/ccImspJW.s page 85
358:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * to USART_ClockInitStruct content
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccI996jB.s page 1
379:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** LL_USART_DisableSCLKOutput(USARTx);
845 .loc 1 379 7 is_stmt 1 view .LVU256
846 .LVL88:
- ARM GAS /tmp/ccI996jB.s page 86
+ ARM GAS /tmp/ccImspJW.s page 86
847 .LBB100:
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccI996jB.s page 1
394:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Clock Polarity: USART_CR2_CPOL bit according to USART_ClockInitStruct->Cloc
395:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Clock Phase: USART_CR2_CPHA bit according to USART_ClockInitStruct->Cloc
396:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->Last
- ARM GAS /tmp/ccI996jB.s page 87
+ ARM GAS /tmp/ccImspJW.s page 87
397:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_usart.c **** */
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccI996jB.s page 1
917 .syntax unified
918 .thumb
919 .thumb_func
- ARM GAS /tmp/ccI996jB.s page 88
+ ARM GAS /tmp/ccImspJW.s page 88
921 LL_USART_ClockStructInit:
@@ -5270,25 +5270,25 @@ ARM GAS /tmp/ccI996jB.s page 1
950 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
951 .file 6 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
952 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- ARM GAS /tmp/ccI996jB.s page 89
+ ARM GAS /tmp/ccImspJW.s page 89
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_usart.c
- /tmp/ccI996jB.s:20 .text.LL_USART_SetBaudRate:00000000 $t
- /tmp/ccI996jB.s:25 .text.LL_USART_SetBaudRate:00000000 LL_USART_SetBaudRate
- /tmp/ccI996jB.s:81 .text.LL_USART_DeInit:00000000 $t
- /tmp/ccI996jB.s:87 .text.LL_USART_DeInit:00000000 LL_USART_DeInit
- /tmp/ccI996jB.s:456 .text.LL_USART_DeInit:000000f4 $d
- /tmp/ccI996jB.s:470 .text.LL_USART_Init:00000000 $t
- /tmp/ccI996jB.s:476 .text.LL_USART_Init:00000000 LL_USART_Init
- /tmp/ccI996jB.s:751 .text.LL_USART_Init:000000d8 $d
- /tmp/ccI996jB.s:764 .text.LL_USART_StructInit:00000000 $t
- /tmp/ccI996jB.s:770 .text.LL_USART_StructInit:00000000 LL_USART_StructInit
- /tmp/ccI996jB.s:808 .text.LL_USART_ClockInit:00000000 $t
- /tmp/ccI996jB.s:814 .text.LL_USART_ClockInit:00000000 LL_USART_ClockInit
- /tmp/ccI996jB.s:915 .text.LL_USART_ClockStructInit:00000000 $t
- /tmp/ccI996jB.s:921 .text.LL_USART_ClockStructInit:00000000 LL_USART_ClockStructInit
+ /tmp/ccImspJW.s:20 .text.LL_USART_SetBaudRate:00000000 $t
+ /tmp/ccImspJW.s:25 .text.LL_USART_SetBaudRate:00000000 LL_USART_SetBaudRate
+ /tmp/ccImspJW.s:81 .text.LL_USART_DeInit:00000000 $t
+ /tmp/ccImspJW.s:87 .text.LL_USART_DeInit:00000000 LL_USART_DeInit
+ /tmp/ccImspJW.s:456 .text.LL_USART_DeInit:000000f4 $d
+ /tmp/ccImspJW.s:470 .text.LL_USART_Init:00000000 $t
+ /tmp/ccImspJW.s:476 .text.LL_USART_Init:00000000 LL_USART_Init
+ /tmp/ccImspJW.s:751 .text.LL_USART_Init:000000d8 $d
+ /tmp/ccImspJW.s:764 .text.LL_USART_StructInit:00000000 $t
+ /tmp/ccImspJW.s:770 .text.LL_USART_StructInit:00000000 LL_USART_StructInit
+ /tmp/ccImspJW.s:808 .text.LL_USART_ClockInit:00000000 $t
+ /tmp/ccImspJW.s:814 .text.LL_USART_ClockInit:00000000 LL_USART_ClockInit
+ /tmp/ccImspJW.s:915 .text.LL_USART_ClockStructInit:00000000 $t
+ /tmp/ccImspJW.s:921 .text.LL_USART_ClockStructInit:00000000 LL_USART_ClockStructInit
UNDEFINED SYMBOLS
LL_RCC_GetUSARTClockFreq
diff --git a/build/stm32f7xx_ll_utils.lst b/build/stm32f7xx_ll_utils.lst
index 7f1dcca..e96ad6b 100644
--- a/build/stm32f7xx_ll_utils.lst
+++ b/build/stm32f7xx_ll_utils.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccqw5Uyy.s page 1
+ARM GAS /tmp/ccdXEeLg.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
29:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup STM32F7xx_LL_Driver
30:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @{
31:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */
- ARM GAS /tmp/ccqw5Uyy.s page 2
+ ARM GAS /tmp/ccdXEeLg.s page 2
32:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
86:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_16) \
87:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_64) \
88:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_128) \
- ARM GAS /tmp/ccqw5Uyy.s page 3
+ ARM GAS /tmp/ccdXEeLg.s page 3
89:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_SYSCLK_DIV_256) \
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
143:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_41) \
144:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_42) \
145:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_43) \
- ARM GAS /tmp/ccqw5Uyy.s page 4
+ ARM GAS /tmp/ccdXEeLg.s page 4
146:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** || ((__VALUE__) == LL_RCC_PLLM_DIV_44) \
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
200:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
201:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* Exported functions --------------------------------------------------------*/
202:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup UTILS_LL_Exported_Functions
- ARM GAS /tmp/ccqw5Uyy.s page 5
+ ARM GAS /tmp/ccdXEeLg.s page 5
203:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @{
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
257:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */
258:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
259:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /** @addtogroup UTILS_EF_SYSTEM
- ARM GAS /tmp/ccqw5Uyy.s page 6
+ ARM GAS /tmp/ccdXEeLg.s page 6
260:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @brief System Configuration functions
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
314:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** SystemCoreClock = HCLKFrequency;
315:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
316:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
- ARM GAS /tmp/ccqw5Uyy.s page 7
+ ARM GAS /tmp/ccdXEeLg.s page 7
317:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /**
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
371:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
372:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */
373:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** latency = LL_FLASH_LATENCY_2;
- ARM GAS /tmp/ccqw5Uyy.s page 8
+ ARM GAS /tmp/ccdXEeLg.s page 8
374:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
428:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
429:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** else if(HCLK_Frequency > UTILS_SCALE3_LATENCY2_FREQ)
430:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
- ARM GAS /tmp/ccqw5Uyy.s page 9
+ ARM GAS /tmp/ccdXEeLg.s page 9
431:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* 60 < HCLK <= 90 => 2WS (3 CPU cycles) */
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
485:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - SUCCESS: Max frequency configuration done
486:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - ERROR: Max frequency configuration not done
487:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */
- ARM GAS /tmp/ccqw5Uyy.s page 10
+ ARM GAS /tmp/ccdXEeLg.s page 10
488:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** ErrorStatus LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef *UTILS_PLLInitStruct,
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
542:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @retval An ErrorStatus enumeration value:
543:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - SUCCESS: Max frequency configuration done
544:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * - ERROR: Max frequency configuration not done
- ARM GAS /tmp/ccqw5Uyy.s page 11
+ ARM GAS /tmp/ccdXEeLg.s page 11
545:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
599:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /**
600:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** * @}
601:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** */
- ARM GAS /tmp/ccqw5Uyy.s page 12
+ ARM GAS /tmp/ccdXEeLg.s page 12
602:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
51 .loc 1 632 11 view .LVU13
52 0010 03FB00F0 mul r0, r3, r0
53 .LVL2:
- ARM GAS /tmp/ccqw5Uyy.s page 13
+ ARM GAS /tmp/ccdXEeLg.s page 13
633:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** assert_param(IS_LL_UTILS_PLLVCO_OUTPUT(pllfreq));
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
89 .LBB54:
90 .LBI54:
91 .file 2 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
- ARM GAS /tmp/ccqw5Uyy.s page 14
+ ARM GAS /tmp/ccdXEeLg.s page 14
1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -838,7 +838,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_Private_Macros RCC Private Macros
56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/ccqw5Uyy.s page 15
+ ARM GAS /tmp/ccdXEeLg.s page 15
58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -898,7 +898,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LSE_VALUE 32768U /*!< Value of the LSE oscillator in Hz */
113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* LSE_VALUE */
114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 16
+ ARM GAS /tmp/ccdXEeLg.s page 16
115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if !defined (LSI_VALUE)
@@ -958,7 +958,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/ccqw5Uyy.s page 17
+ ARM GAS /tmp/ccdXEeLg.s page 17
172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_16 RCC_CFGR_HPRE_DIV16 /*!< SYSCLK divided by 16 */
227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_64 RCC_CFGR_HPRE_DIV64 /*!< SYSCLK divided by 64 */
228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_128 RCC_CFGR_HPRE_DIV128 /*!< SYSCLK divided by 128 */
- ARM GAS /tmp/ccqw5Uyy.s page 18
+ ARM GAS /tmp/ccdXEeLg.s page 18
229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_SYSCLK_DIV_256 RCC_CFGR_HPRE_DIV256 /*!< SYSCLK divided by 256 */
@@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_3 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFG
284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_4 (uint32_t)(RCC_CFGR_MCO2PRE|((RCC_CFGR_MCO2PRE_2|RCC_CFG
285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_MCO2_DIV_5 (uint32_t)(RCC_CFGR_MCO2PRE|(RCC_CFGR_MCO2PRE >> 16U))
- ARM GAS /tmp/ccqw5Uyy.s page 19
+ ARM GAS /tmp/ccdXEeLg.s page 19
286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_PCLK2 (uint32_t)((RCC_DCKCFGR2_USART1SEL << 16U) | 0x00000000U
- ARM GAS /tmp/ccqw5Uyy.s page 20
+ ARM GAS /tmp/ccdXEeLg.s page 20
343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_USART1_CLKSOURCE_SYSCLK (uint32_t)((RCC_DCKCFGR2_USART1SEL << 16U) | RCC_DCKCFGR
@@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(I2C4)
398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_PCLK1 (uint32_t)(RCC_DCKCFGR2_I2C4SEL|0x00000000U) /*!< PCLK1
399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_SYSCLK (uint32_t)(RCC_DCKCFGR2_I2C4SEL|(RCC_DCKCFGR2_I2C4SEL_0
- ARM GAS /tmp/ccqw5Uyy.s page 21
+ ARM GAS /tmp/ccdXEeLg.s page 21
400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2C4_CLKSOURCE_HSI (uint32_t)(RCC_DCKCFGR2_I2C4SEL|(RCC_DCKCFGR2_I2C4SEL_1
@@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
- ARM GAS /tmp/ccqw5Uyy.s page 22
+ ARM GAS /tmp/ccdXEeLg.s page 22
457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI1 0x00000000U /*!< SAI1 clock used as D
512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_DFSDM1_AUDIO_CLKSOURCE_SAI2 RCC_DCKCFGR1_ADFSDM1SEL /*!< SAI2 clock used as D
513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/ccqw5Uyy.s page 23
+ ARM GAS /tmp/ccdXEeLg.s page 23
514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
@@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_SAIx Peripheral SAI get clock source
- ARM GAS /tmp/ccqw5Uyy.s page 24
+ ARM GAS /tmp/ccdXEeLg.s page 24
571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
@@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_I2S1_CLKSOURCE RCC_CFGR_I2SSRC /*!< I2S Clock source selection */
- ARM GAS /tmp/ccqw5Uyy.s page 25
+ ARM GAS /tmp/ccdXEeLg.s page 25
628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_NONE 0x00000000U /*!< No clock used as RTC clock
683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSE RCC_BDCR_RTCSEL_0 /*!< LSE oscillator clock used a
684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_LSI RCC_BDCR_RTCSEL_1 /*!< LSI oscillator clock used a
- ARM GAS /tmp/ccqw5Uyy.s page 26
+ ARM GAS /tmp/ccdXEeLg.s page 26
685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_RTC_CLKSOURCE_HSE RCC_BDCR_RTCSEL /*!< HSE oscillator clock divide
@@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_30 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_P
740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_31 (RCC_PLLCFGR_PLLM_4 | RCC_PLLCFGR_PLLM_3 | RCC_PLLCFGR_P
741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_32 (RCC_PLLCFGR_PLLM_5) /*!< PLL, PLLI2S and PLLSAI divisio
- ARM GAS /tmp/ccqw5Uyy.s page 27
+ ARM GAS /tmp/ccdXEeLg.s page 27
742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLM_DIV_33 (RCC_PLLCFGR_PLLM_5 | RCC_PLLCFGR_PLLM_0) /*!< PLL, PLLI
@@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_4 RCC_PLLCFGR_PLLP_0 /*!< Main PLL division factor for
797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_6 RCC_PLLCFGR_PLLP_1 /*!< Main PLL division factor for
798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLP_DIV_8 (RCC_PLLCFGR_PLLP_1 | RCC_PLLCFGR_PLLP_0) /*!< Main PL
- ARM GAS /tmp/ccqw5Uyy.s page 28
+ ARM GAS /tmp/ccdXEeLg.s page 28
799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EC_PLLI2SDIVQ PLLI2SDIVQ division factor (PLLI2SDIVQ)
855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
- ARM GAS /tmp/ccqw5Uyy.s page 29
+ ARM GAS /tmp/ccdXEeLg.s page 29
856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_2 0x00000000U /*!< PLLI2S division factor for PL
911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_4 RCC_PLLI2SCFGR_PLLI2SP_0 /*!< PLLI2S division fact
912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_6 RCC_PLLI2SCFGR_PLLI2SP_1 /*!< PLLI2S division fact
- ARM GAS /tmp/ccqw5Uyy.s page 30
+ ARM GAS /tmp/ccdXEeLg.s page 30
913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLI2SP_DIV_8 (RCC_PLLI2SCFGR_PLLI2SP_1 | RCC_PLLI2SCFGR_PLLI2SP_0)
@@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_25 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3)
968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_26 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 |
969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_27 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 |
- ARM GAS /tmp/ccqw5Uyy.s page 31
+ ARM GAS /tmp/ccdXEeLg.s page 31
970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define LL_RCC_PLLSAIDIVQ_DIV_28 (RCC_DCKCFGR1_PLLSAIDIVQ_4 | RCC_DCKCFGR1_PLLSAIDIVQ_3 |
@@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 32
+ ARM GAS /tmp/ccdXEeLg.s page 32
1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EM_WRITE_READ Common Write and read registers Macros
@@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24
1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25
1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26
- ARM GAS /tmp/ccqw5Uyy.s page 33
+ ARM GAS /tmp/ccdXEeLg.s page 33
1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
@@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_2
1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_3
1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_4
- ARM GAS /tmp/ccqw5Uyy.s page 34
+ ARM GAS /tmp/ccdXEeLg.s page 34
1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_5
@@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_59
1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_60
1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_61
- ARM GAS /tmp/ccqw5Uyy.s page 35
+ ARM GAS /tmp/ccdXEeLg.s page 35
1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_62
@@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_26
1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28
- ARM GAS /tmp/ccqw5Uyy.s page 36
+ ARM GAS /tmp/ccdXEeLg.s page 36
1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29
@@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __PLLM__ This parameter can be one of the following values:
1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_2
1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_3
- ARM GAS /tmp/ccqw5Uyy.s page 37
+ ARM GAS /tmp/ccdXEeLg.s page 37
1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_4
@@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_58
1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_59
1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_60
- ARM GAS /tmp/ccqw5Uyy.s page 38
+ ARM GAS /tmp/ccdXEeLg.s page 38
1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_61
@@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #define __LL_RCC_CALC_PLLSAI_SAI_FREQ(__INPUTFREQ__, __PLLM__, __PLLSAIN__, __PLLSAIQ__, __PLLSAIDI
1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** (((__PLLSAIQ__) >> RCC_PLLSAICFGR_PLLSAIQ_Pos) * (((__PLLSAIDIVQ__) >> RCC_DCKCF
1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 39
+ ARM GAS /tmp/ccdXEeLg.s page 39
1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_50
1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_51
1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52
- ARM GAS /tmp/ccqw5Uyy.s page 40
+ ARM GAS /tmp/ccdXEeLg.s page 40
1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_53
@@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1537:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
1538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28
1539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29
- ARM GAS /tmp/ccqw5Uyy.s page 41
+ ARM GAS /tmp/ccdXEeLg.s page 41
1540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_30
@@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1594:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Helper macro to calculate the PLLI2S frequency used for SAI1 and SAI2 domains
1595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note ex: @ref __LL_RCC_CALC_PLLI2S_SAI_FREQ (HSE_VALUE,@ref LL_RCC_PLL_GetDivider (),
1596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @ref LL_RCC_PLLI2S_GetN (), @ref LL_RCC_PLLI2S_GetQ (), @ref LL_RCC_PLLI2S_GetDIVQ
- ARM GAS /tmp/ccqw5Uyy.s page 42
+ ARM GAS /tmp/ccdXEeLg.s page 42
1597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __INPUTFREQ__ PLL Input frequency (based on HSE/HSI)
@@ -2518,7 +2518,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1651:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_54
1652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_55
1653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_56
- ARM GAS /tmp/ccqw5Uyy.s page 43
+ ARM GAS /tmp/ccdXEeLg.s page 43
1654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_57
@@ -2578,7 +2578,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1708:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_31
1709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_32
1710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval PLLI2S clock frequency (in Hz)
- ARM GAS /tmp/ccqw5Uyy.s page 44
+ ARM GAS /tmp/ccdXEeLg.s page 44
1711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -2638,7 +2638,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1765:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_45
1766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_46
1767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_47
- ARM GAS /tmp/ccqw5Uyy.s page 45
+ ARM GAS /tmp/ccdXEeLg.s page 45
1768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_48
@@ -2698,7 +2698,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1822:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22
1823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_23
1824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_24
- ARM GAS /tmp/ccqw5Uyy.s page 46
+ ARM GAS /tmp/ccdXEeLg.s page 46
1825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_25
@@ -2758,7 +2758,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1879:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __SYSCLKFREQ__ SYSCLK frequency (based on HSE/HSI/PLLCLK)
1880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param __AHBPRESCALER__ This parameter can be one of the following values:
1881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYSCLK_DIV_1
- ARM GAS /tmp/ccqw5Uyy.s page 47
+ ARM GAS /tmp/ccdXEeLg.s page 47
1882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYSCLK_DIV_2
@@ -2818,7 +2818,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1936:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
1937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
1938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Enable the Clock Security System.
- ARM GAS /tmp/ccqw5Uyy.s page 48
+ ARM GAS /tmp/ccdXEeLg.s page 48
1939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR CSSON LL_RCC_HSE_EnableCSS
@@ -2878,7 +2878,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1993:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
1994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (READ_BIT(RCC->CR, RCC_CR_HSERDY) == (RCC_CR_HSERDY));
1995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 49
+ ARM GAS /tmp/ccdXEeLg.s page 49
1996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -2938,7 +2938,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2050:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @note Default value is 16, which, when added to the HSICAL value,
2051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * should trim the HSI to 16 MHz +/- 1 %
2052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CR HSITRIM LL_RCC_HSI_SetCalibTrimming
- ARM GAS /tmp/ccqw5Uyy.s page 50
+ ARM GAS /tmp/ccdXEeLg.s page 50
2053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Value Between Min_Data = 0 and Max_Data = 31
@@ -2998,7 +2998,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
2108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/ccqw5Uyy.s page 51
+ ARM GAS /tmp/ccdXEeLg.s page 51
2110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable external clock source (LSE bypass).
@@ -3058,7 +3058,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
2165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
2166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 52
+ ARM GAS /tmp/ccdXEeLg.s page 52
2167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
@@ -3118,7 +3118,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll CFGR SWS LL_RCC_GetSysClkSource
2222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values:
2223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSI
- ARM GAS /tmp/ccqw5Uyy.s page 53
+ ARM GAS /tmp/ccdXEeLg.s page 53
2224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_SYS_CLKSOURCE_STATUS_HSE
@@ -3178,7 +3178,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
2279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_SetAPB2Prescaler(uint32_t Prescaler)
2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
- ARM GAS /tmp/ccqw5Uyy.s page 54
+ ARM GAS /tmp/ccdXEeLg.s page 54
2281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, Prescaler);
@@ -3238,7 +3238,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
2336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /** @defgroup RCC_LL_EF_MCO MCO
- ARM GAS /tmp/ccqw5Uyy.s page 55
+ ARM GAS /tmp/ccdXEeLg.s page 55
2338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @{
@@ -3298,7 +3298,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART1_CLKSOURCE_LSE
2393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_PCLK1
2394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_SYSCLK
- ARM GAS /tmp/ccqw5Uyy.s page 56
+ ARM GAS /tmp/ccdXEeLg.s page 56
2395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_USART2_CLKSOURCE_HSI
@@ -3358,7 +3358,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_PCLK1
2450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_SYSCLK
2451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C1_CLKSOURCE_HSI
- ARM GAS /tmp/ccqw5Uyy.s page 57
+ ARM GAS /tmp/ccdXEeLg.s page 57
2452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_I2C2_CLKSOURCE_PCLK1
@@ -3418,7 +3418,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure SDMMC clock source
- ARM GAS /tmp/ccqw5Uyy.s page 58
+ ARM GAS /tmp/ccdXEeLg.s page 58
2509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 SDMMC1SEL LL_RCC_SetSDMMCClockSource\n
@@ -3478,7 +3478,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(CEC)
2565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
- ARM GAS /tmp/ccqw5Uyy.s page 59
+ ARM GAS /tmp/ccdXEeLg.s page 59
2566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure CEC clock source
@@ -3538,7 +3538,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Configure DFSDM Kernel clock source
- ARM GAS /tmp/ccqw5Uyy.s page 60
+ ARM GAS /tmp/ccdXEeLg.s page 60
2623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR1 DFSDM1SEL LL_RCC_SetDFSDMClockSource
@@ -3598,7 +3598,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART5_CLKSOURCE
2678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART7_CLKSOURCE
2679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_UART8_CLKSOURCE
- ARM GAS /tmp/ccqw5Uyy.s page 61
+ ARM GAS /tmp/ccdXEeLg.s page 61
2680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @retval Returned value can be one of the following values:
@@ -3658,7 +3658,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Get LPTIMx clock source
- ARM GAS /tmp/ccqw5Uyy.s page 62
+ ARM GAS /tmp/ccdXEeLg.s page 62
2737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll DCKCFGR2 LPTIM1SEL LL_RCC_GetLPTIMClockSource
@@ -3718,7 +3718,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
2792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, SDMMCx) >> 16U | SDMMCx);
2793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 63
+ ARM GAS /tmp/ccdXEeLg.s page 63
2794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -3778,7 +3778,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
2849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** return (uint32_t)(READ_BIT(RCC->DCKCFGR2, CECx));
2850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 64
+ ARM GAS /tmp/ccdXEeLg.s page 64
2851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #endif /* CEC */
@@ -3838,7 +3838,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_DSI_CLKSOURCE_PLL
2906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
2907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE uint32_t LL_RCC_GetDSIClockSource(uint32_t DSIx)
- ARM GAS /tmp/ccqw5Uyy.s page 65
+ ARM GAS /tmp/ccdXEeLg.s page 65
2908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
@@ -3898,7 +3898,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
2962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
2963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
2964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @brief Disable RTC
- ARM GAS /tmp/ccqw5Uyy.s page 66
+ ARM GAS /tmp/ccdXEeLg.s page 66
2965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @rmtoll BDCR RTCEN LL_RCC_DisableRTC
@@ -3958,7 +3958,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_13
3020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_14
3021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_15
- ARM GAS /tmp/ccqw5Uyy.s page 67
+ ARM GAS /tmp/ccdXEeLg.s page 67
3022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_16
@@ -4018,7 +4018,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_28
3077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_29
3078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_30
- ARM GAS /tmp/ccqw5Uyy.s page 68
+ ARM GAS /tmp/ccdXEeLg.s page 68
3079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_RTC_HSE_DIV_31
@@ -4078,7 +4078,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
3134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** SET_BIT(RCC->CR, RCC_CR_PLLON);
3135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 69
+ ARM GAS /tmp/ccdXEeLg.s page 69
3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -4138,7 +4138,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLM LL_RCC_PLL_ConfigDomain_SYS\n
3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLN LL_RCC_PLL_ConfigDomain_SYS\n
3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * PLLCFGR PLLP LL_RCC_PLL_ConfigDomain_SYS
- ARM GAS /tmp/ccqw5Uyy.s page 70
+ ARM GAS /tmp/ccdXEeLg.s page 70
3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param Source This parameter can be one of the following values:
@@ -4198,7 +4198,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_52
3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_53
3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_54
- ARM GAS /tmp/ccqw5Uyy.s page 71
+ ARM GAS /tmp/ccdXEeLg.s page 71
3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_55
@@ -4258,7 +4258,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_19
3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_20
3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_21
- ARM GAS /tmp/ccqw5Uyy.s page 72
+ ARM GAS /tmp/ccdXEeLg.s page 72
3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_22
@@ -4318,7 +4318,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_12
3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_13
3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_14
- ARM GAS /tmp/ccqw5Uyy.s page 73
+ ARM GAS /tmp/ccdXEeLg.s page 73
3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_15
@@ -4378,7 +4378,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_32
3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_33
3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_34
- ARM GAS /tmp/ccqw5Uyy.s page 74
+ ARM GAS /tmp/ccdXEeLg.s page 74
3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_35
@@ -4438,7 +4438,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** __STATIC_INLINE void LL_RCC_PLL_SetMainSource(uint32_t PLLSource)
3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->PLLCFGR, RCC_PLLCFGR_PLLSRC, PLLSource);
- ARM GAS /tmp/ccqw5Uyy.s page 75
+ ARM GAS /tmp/ccdXEeLg.s page 75
3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
@@ -4498,7 +4498,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_13
3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_14
3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLQ_DIV_15
- ARM GAS /tmp/ccqw5Uyy.s page 76
+ ARM GAS /tmp/ccdXEeLg.s page 76
3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -4558,7 +4558,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_27
3564:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_28
3565:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_29
- ARM GAS /tmp/ccqw5Uyy.s page 77
+ ARM GAS /tmp/ccdXEeLg.s page 77
3566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_30
@@ -4618,7 +4618,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3620:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
3621:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->SSCGR, RCC_SSCGR_MODPER | RCC_SSCGR_INCSTEP | RCC_SSCGR_SPREADSEL, Mod | (Inc <<
3622:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 78
+ ARM GAS /tmp/ccdXEeLg.s page 78
3623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
@@ -4678,7 +4678,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3677:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
3678:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** /**
3679:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @}
- ARM GAS /tmp/ccqw5Uyy.s page 79
+ ARM GAS /tmp/ccdXEeLg.s page 79
3680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** */
@@ -4738,7 +4738,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3734:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_5
3735:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_6
3736:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7
- ARM GAS /tmp/ccqw5Uyy.s page 80
+ ARM GAS /tmp/ccdXEeLg.s page 80
3737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8
@@ -4798,7 +4798,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3791:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_62
3792:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_63
3793:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432
- ARM GAS /tmp/ccqw5Uyy.s page 81
+ ARM GAS /tmp/ccdXEeLg.s page 81
3794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLQ This parameter can be one of the following values:
@@ -4858,7 +4858,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3848:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** MODIFY_REG(RCC->DCKCFGR1, RCC_DCKCFGR1_PLLI2SDIVQ, PLLDIVQ);
3849:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
3850:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 82
+ ARM GAS /tmp/ccdXEeLg.s page 82
3851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** #if defined(SPDIFRX)
@@ -4918,7 +4918,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_41
3906:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_42
3907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_43
- ARM GAS /tmp/ccqw5Uyy.s page 83
+ ARM GAS /tmp/ccdXEeLg.s page 83
3908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_44
@@ -4978,7 +4978,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
3962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_7
3963:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_8
3964:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_9
- ARM GAS /tmp/ccqw5Uyy.s page 84
+ ARM GAS /tmp/ccdXEeLg.s page 84
3965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLM_DIV_10
@@ -5038,7 +5038,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
4019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLN Between 50 and 432
4020:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @param PLLR This parameter can be one of the following values:
4021:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_2
- ARM GAS /tmp/ccqw5Uyy.s page 85
+ ARM GAS /tmp/ccdXEeLg.s page 85
4022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_3
@@ -5098,7 +5098,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
4076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_4
4077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_5
4078:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_6
- ARM GAS /tmp/ccqw5Uyy.s page 86
+ ARM GAS /tmp/ccdXEeLg.s page 86
4079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SR_DIV_7
@@ -5158,7 +5158,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
4133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_26
4134:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_27
4135:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_28
- ARM GAS /tmp/ccqw5Uyy.s page 87
+ ARM GAS /tmp/ccdXEeLg.s page 87
4136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** * @arg @ref LL_RCC_PLLI2SDIVQ_DIV_29
@@ -5218,7 +5218,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
118 .loc 1 660 5 discriminator 1 view .LVU35
119 0010 13F0005F tst r3, #536870912
120 0014 00D0 beq .L4
- ARM GAS /tmp/ccqw5Uyy.s page 88
+ ARM GAS /tmp/ccdXEeLg.s page 88
661:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
@@ -5278,7 +5278,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
160 .global LL_Init1msTick
161 .syntax unified
162 .thumb
- ARM GAS /tmp/ccqw5Uyy.s page 89
+ ARM GAS /tmp/ccdXEeLg.s page 89
163 .thumb_func
@@ -5338,7 +5338,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** #include "stm32f7xx.h"
41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h ****
42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /** @addtogroup STM32F7xx_LL_Driver
- ARM GAS /tmp/ccqw5Uyy.s page 90
+ ARM GAS /tmp/ccdXEeLg.s page 90
43:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** * @{
@@ -5398,7 +5398,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h ****
99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** This feature can be modified afterwards using unitary function
- ARM GAS /tmp/ccqw5Uyy.s page 91
+ ARM GAS /tmp/ccdXEeLg.s page 91
100:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** @ref LL_RCC_PLL_ConfigDomain_SYS(). */
@@ -5458,7 +5458,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /**
155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** * @}
156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** */
- ARM GAS /tmp/ccqw5Uyy.s page 92
+ ARM GAS /tmp/ccdXEeLg.s page 92
157:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h ****
@@ -5518,7 +5518,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS + 8U))));
212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** }
213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h ****
- ARM GAS /tmp/ccqw5Uyy.s page 93
+ ARM GAS /tmp/ccdXEeLg.s page 93
214:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_utils.h **** /**
@@ -5578,7 +5578,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
185 0008 013B subs r3, r3, #1
186 .loc 3 259 18 view .LVU52
187 000a 4FF0E022 mov r2, #-536813568
- ARM GAS /tmp/ccqw5Uyy.s page 94
+ ARM GAS /tmp/ccdXEeLg.s page 94
188 000e 5361 str r3, [r2, #20]
@@ -5638,7 +5638,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
235 .loc 1 238 3 is_stmt 1 view .LVU64
238:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c ****
236 .loc 1 238 4 is_stmt 0 view .LVU65
- ARM GAS /tmp/ccqw5Uyy.s page 95
+ ARM GAS /tmp/ccdXEeLg.s page 95
237 000a 019B ldr r3, [sp, #4]
@@ -5698,7 +5698,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
281 .LFB407:
312:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** /* HCLK clock frequency */
282 .loc 1 312 1 is_stmt 1 view -0
- ARM GAS /tmp/ccqw5Uyy.s page 96
+ ARM GAS /tmp/ccdXEeLg.s page 96
283 .cfi_startproc
@@ -5758,7 +5758,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
328 0008 0246 mov r2, r0
340:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
329 .loc 1 340 5 is_stmt 1 view .LVU90
- ARM GAS /tmp/ccqw5Uyy.s page 97
+ ARM GAS /tmp/ccdXEeLg.s page 97
330 .LBB62:
@@ -5818,7 +5818,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @{
53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */
54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** #define LL_PWR_CR1_CSBF PWR_CR1_CSBF /*!< Clear standby flag */
- ARM GAS /tmp/ccqw5Uyy.s page 98
+ ARM GAS /tmp/ccdXEeLg.s page 98
55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h ****
@@ -5878,7 +5878,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */
110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h ****
111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** /** @defgroup PWR_LL_EC_REGU_MODE_DS_MODE Regulator Mode In Deep Sleep Mode
- ARM GAS /tmp/ccqw5Uyy.s page 99
+ ARM GAS /tmp/ccdXEeLg.s page 99
112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @{
@@ -5938,7 +5938,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__))
167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h ****
168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** /**
- ARM GAS /tmp/ccqw5Uyy.s page 100
+ ARM GAS /tmp/ccdXEeLg.s page 100
169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @brief Read a value in PWR register
@@ -5998,7 +5998,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** __STATIC_INLINE uint32_t LL_PWR_IsEnabledUnderDriveMode(void)
224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** {
225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** return (READ_BIT(PWR->CR1, PWR_CR1_UDEN) == (PWR_CR1_UDEN));
- ARM GAS /tmp/ccqw5Uyy.s page 101
+ ARM GAS /tmp/ccdXEeLg.s page 101
226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** }
@@ -6058,7 +6058,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @rmtoll CR1 ODEN LL_PWR_IsEnabledOverDriveMode
281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** * @retval State of bit (1 or 0).
282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** */
- ARM GAS /tmp/ccqw5Uyy.s page 102
+ ARM GAS /tmp/ccdXEeLg.s page 102
283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** __STATIC_INLINE uint32_t LL_PWR_IsEnabledOverDriveMode(void)
@@ -6118,7 +6118,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
354 001a 1B68 ldr r3, [r3]
355 .loc 4 312 10 view .LVU100
356 001c 03F44043 and r3, r3, #49152
- ARM GAS /tmp/ccqw5Uyy.s page 103
+ ARM GAS /tmp/ccdXEeLg.s page 103
357 .LBE65:
@@ -6178,7 +6178,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
396 0042 3F4B ldr r3, .L56
397 0044 1868 ldr r0, [r3]
398 .LVL19:
- ARM GAS /tmp/ccqw5Uyy.s page 104
+ ARM GAS /tmp/ccdXEeLg.s page 104
285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_pwr.h **** }
@@ -6238,7 +6238,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
439 007a A242 cmp r2, r4
440 007c 94BF ite ls
441 007e 0021 movls r1, #0
- ARM GAS /tmp/ccqw5Uyy.s page 105
+ ARM GAS /tmp/ccdXEeLg.s page 105
442 0080 03F00101 andhi r1, r3, #1
@@ -6298,7 +6298,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
482 .loc 1 392 14 is_stmt 0 view .LVU143
483 00b6 234B ldr r3, .L56+4
484 00b8 9842 cmp r0, r3
- ARM GAS /tmp/ccqw5Uyy.s page 106
+ ARM GAS /tmp/ccdXEeLg.s page 106
485 00ba 14D8 bhi .L40
@@ -6358,7 +6358,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
525 .loc 1 368 17 view .LVU157
526 00dc 0CE0 b .L28
527 .LVL31:
- ARM GAS /tmp/ccqw5Uyy.s page 107
+ ARM GAS /tmp/ccdXEeLg.s page 107
528 .L37:
@@ -6418,7 +6418,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
570 .L44:
422:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
571 .loc 1 422 17 view .LVU170
- ARM GAS /tmp/ccqw5Uyy.s page 108
+ ARM GAS /tmp/ccdXEeLg.s page 108
572 00f6 0420 movs r0, #4
@@ -6478,7 +6478,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */
46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h ****
47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU)
- ARM GAS /tmp/ccqw5Uyy.s page 109
+ ARM GAS /tmp/ccdXEeLg.s page 109
48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h ****
@@ -6538,7 +6538,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_PMC_ETHRMII (uint32_t)SYSCFG_PMC_MII_RMII_SEL /*!<
103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h ****
104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /**
- ARM GAS /tmp/ccqw5Uyy.s page 110
+ ARM GAS /tmp/ccdXEeLg.s page 110
105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @}
@@ -6598,7 +6598,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @{
160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */
161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_EXTI_LINE0 (0x000FU << 16U | 0U) /*!< EXTI_POSITION_0 | EXTICR[0]
- ARM GAS /tmp/ccqw5Uyy.s page 111
+ ARM GAS /tmp/ccdXEeLg.s page 111
162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_SYSCFG_EXTI_LINE1 (0x00F0U << 16U | 0U) /*!< EXTI_POSITION_4 | EXTICR[0]
@@ -6658,7 +6658,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @{
217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */
218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter
- ARM GAS /tmp/ccqw5Uyy.s page 112
+ ARM GAS /tmp/ccdXEeLg.s page 112
219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter
@@ -6718,7 +6718,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_10 FLASH_ACR_LATENCY_10WS /*!< FLASH ten wait states */
274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_11 FLASH_ACR_LATENCY_11WS /*!< FLASH eleven wait states *
275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_12 FLASH_ACR_LATENCY_12WS /*!< FLASH twelve wait states *
- ARM GAS /tmp/ccqw5Uyy.s page 113
+ ARM GAS /tmp/ccdXEeLg.s page 113
276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #define LL_FLASH_LATENCY_13 FLASH_ACR_LATENCY_13WS /*!< FLASH thirteen wait states
@@ -6778,7 +6778,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** {
331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** SET_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD);
332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** }
- ARM GAS /tmp/ccqw5Uyy.s page 114
+ ARM GAS /tmp/ccdXEeLg.s page 114
333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h ****
@@ -6838,7 +6838,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_GetPHYInterface
388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval Returned value can be one of the following values:
389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_PMC_ETHMII
- ARM GAS /tmp/ccqw5Uyy.s page 115
+ ARM GAS /tmp/ccdXEeLg.s page 115
390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_PMC_ETHRMII
@@ -6898,7 +6898,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval None
445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */
446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
- ARM GAS /tmp/ccqw5Uyy.s page 116
+ ARM GAS /tmp/ccdXEeLg.s page 116
447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** {
@@ -6958,7 +6958,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE6
502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE7
503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE8
- ARM GAS /tmp/ccqw5Uyy.s page 117
+ ARM GAS /tmp/ccdXEeLg.s page 117
504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @arg @ref LL_SYSCFG_EXTI_LINE9
@@ -7018,7 +7018,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** }
559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h ****
560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** #if defined(SYSCFG_CBR_CLL)
- ARM GAS /tmp/ccqw5Uyy.s page 118
+ ARM GAS /tmp/ccdXEeLg.s page 118
561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /**
@@ -7078,7 +7078,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
615:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
616:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** */
617:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
- ARM GAS /tmp/ccqw5Uyy.s page 119
+ ARM GAS /tmp/ccdXEeLg.s page 119
618:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** {
@@ -7138,7 +7138,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
672:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** /**
673:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @brief Disable the Debug Module during STANDBY mode
674:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode
- ARM GAS /tmp/ccqw5Uyy.s page 120
+ ARM GAS /tmp/ccdXEeLg.s page 120
675:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @retval None
@@ -7198,7 +7198,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
729:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
730:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
731:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
- ARM GAS /tmp/ccqw5Uyy.s page 121
+ ARM GAS /tmp/ccdXEeLg.s page 121
732:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n
@@ -7258,7 +7258,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
786:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
787:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
788:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB1_FZ DBG_CAN3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph
- ARM GAS /tmp/ccqw5Uyy.s page 122
+ ARM GAS /tmp/ccdXEeLg.s page 122
789:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * @param Periphs This parameter can be a combination of the following values:
@@ -7318,7 +7318,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
843:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
844:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
845:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
- ARM GAS /tmp/ccqw5Uyy.s page 123
+ ARM GAS /tmp/ccdXEeLg.s page 123
846:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_system.h **** * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph
@@ -7378,7 +7378,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
586 00fa 1368 ldr r3, [r2]
587 00fc 23F00F03 bic r3, r3, #15
588 0100 0343 orrs r3, r3, r0
- ARM GAS /tmp/ccqw5Uyy.s page 124
+ ARM GAS /tmp/ccdXEeLg.s page 124
589 0102 1360 str r3, [r2]
@@ -7438,7 +7438,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
613 .LBE71:
614 .LBE70:
456:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** } while ((getlatency != latency) && (timeout > 0));
- ARM GAS /tmp/ccqw5Uyy.s page 125
+ ARM GAS /tmp/ccdXEeLg.s page 125
615 .loc 1 456 7 is_stmt 1 view .LVU186
@@ -7498,7 +7498,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
657 .loc 1 432 17 view .LVU198
658 012e 0220 movs r0, #2
659 .LVL54:
- ARM GAS /tmp/ccqw5Uyy.s page 126
+ ARM GAS /tmp/ccdXEeLg.s page 126
432:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
@@ -7558,7 +7558,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
707 .thumb
708 .thumb_func
710 UTILS_EnablePLLAndSwitchSystem:
- ARM GAS /tmp/ccqw5Uyy.s page 127
+ ARM GAS /tmp/ccdXEeLg.s page 127
711 .LVL61:
@@ -7618,7 +7618,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
741 .loc 1 696 3 is_stmt 1 view .LVU217
742 .loc 1 696 22 is_stmt 0 view .LVU218
743 0012 244B ldr r3, .L70+4
- ARM GAS /tmp/ccqw5Uyy.s page 128
+ ARM GAS /tmp/ccdXEeLg.s page 128
744 0014 1B68 ldr r3, [r3]
@@ -7678,7 +7678,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
777 .LBE74:
707:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
778 .loc 1 707 33 discriminator 1 view .LVU230
- ARM GAS /tmp/ccqw5Uyy.s page 129
+ ARM GAS /tmp/ccdXEeLg.s page 129
779 002a 13F0007F tst r3, #33554432
@@ -7738,7 +7738,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
817 .loc 1 715 37 discriminator 1 view .LVU242
818 .LBB80:
819 .LBI80:
- ARM GAS /tmp/ccqw5Uyy.s page 130
+ ARM GAS /tmp/ccdXEeLg.s page 130
2227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** {
@@ -7798,7 +7798,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
859 .loc 2 2281 3 view .LVU255
860 0066 9968 ldr r1, [r3, #8]
861 0068 21F46041 bic r1, r1, #57344
- ARM GAS /tmp/ccqw5Uyy.s page 131
+ ARM GAS /tmp/ccdXEeLg.s page 131
862 006c 0A43 orrs r2, r2, r1
@@ -7858,7 +7858,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
894 .loc 1 699 14 view .LVU267
895 0080 FFF7FEFF bl LL_SetFlashLatency
896 .LVL78:
- ARM GAS /tmp/ccqw5Uyy.s page 132
+ ARM GAS /tmp/ccdXEeLg.s page 132
703:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
@@ -7918,7 +7918,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
945 .LCFI8:
946 .cfi_def_cfa_offset 24
947 .cfi_offset 3, -24
- ARM GAS /tmp/ccqw5Uyy.s page 133
+ ARM GAS /tmp/ccdXEeLg.s page 133
948 .cfi_offset 4, -20
@@ -7978,7 +7978,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
988 .LBB89:
2012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** }
989 .loc 2 2012 3 view .LVU290
- ARM GAS /tmp/ccqw5Uyy.s page 134
+ ARM GAS /tmp/ccdXEeLg.s page 134
990 001e 0F4A ldr r2, .L78+4
@@ -8038,7 +8038,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1032 .loc 2 3243 3 view .LVU302
1033 0044 0A43 orrs r2, r2, r1
1034 .LVL90:
- ARM GAS /tmp/ccqw5Uyy.s page 135
+ ARM GAS /tmp/ccdXEeLg.s page 135
3243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h **** Source | PLLM | PLLN << RCC_PLLCFGR_PLLN_Pos | PLLP);
@@ -8098,7 +8098,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1082 .cfi_def_cfa_offset 24
1083 .cfi_offset 3, -24
1084 .cfi_offset 4, -20
- ARM GAS /tmp/ccqw5Uyy.s page 136
+ ARM GAS /tmp/ccdXEeLg.s page 136
1085 .cfi_offset 5, -16
@@ -8158,7 +8158,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
1125 .loc 1 566 7 is_stmt 1 view .LVU326
566:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
- ARM GAS /tmp/ccqw5Uyy.s page 137
+ ARM GAS /tmp/ccdXEeLg.s page 137
1126 .loc 1 566 9 is_stmt 0 view .LVU327
@@ -8218,7 +8218,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
577:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** {
1168 .loc 1 577 35 discriminator 1 view .LVU340
1169 0040 12F4003F tst r2, #131072
- ARM GAS /tmp/ccqw5Uyy.s page 138
+ ARM GAS /tmp/ccdXEeLg.s page 138
1170 0044 FAD0 beq .L85
@@ -8278,7 +8278,7 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1212 .LVL105:
1213 .L88:
568:Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_ll_utils.c **** }
- ARM GAS /tmp/ccqw5Uyy.s page 139
+ ARM GAS /tmp/ccdXEeLg.s page 139
1214 .loc 1 568 9 is_stmt 1 view .LVU353
@@ -8320,36 +8320,36 @@ ARM GAS /tmp/ccqw5Uyy.s page 1
1246 .file 8 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
1247 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
1248 .file 10 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h"
- ARM GAS /tmp/ccqw5Uyy.s page 140
+ ARM GAS /tmp/ccdXEeLg.s page 140
DEFINED SYMBOLS
*ABS*:00000000 stm32f7xx_ll_utils.c
- /tmp/ccqw5Uyy.s:20 .text.UTILS_GetPLLOutputFrequency:00000000 $t
- /tmp/ccqw5Uyy.s:25 .text.UTILS_GetPLLOutputFrequency:00000000 UTILS_GetPLLOutputFrequency
- /tmp/ccqw5Uyy.s:74 .text.UTILS_PLL_IsBusy:00000000 $t
- /tmp/ccqw5Uyy.s:79 .text.UTILS_PLL_IsBusy:00000000 UTILS_PLL_IsBusy
- /tmp/ccqw5Uyy.s:154 .text.UTILS_PLL_IsBusy:0000002c $d
- /tmp/ccqw5Uyy.s:159 .text.LL_Init1msTick:00000000 $t
- /tmp/ccqw5Uyy.s:165 .text.LL_Init1msTick:00000000 LL_Init1msTick
- /tmp/ccqw5Uyy.s:206 .text.LL_Init1msTick:0000001c $d
- /tmp/ccqw5Uyy.s:211 .text.LL_mDelay:00000000 $t
- /tmp/ccqw5Uyy.s:217 .text.LL_mDelay:00000000 LL_mDelay
- /tmp/ccqw5Uyy.s:273 .text.LL_SetSystemCoreClock:00000000 $t
- /tmp/ccqw5Uyy.s:279 .text.LL_SetSystemCoreClock:00000000 LL_SetSystemCoreClock
- /tmp/ccqw5Uyy.s:296 .text.LL_SetSystemCoreClock:00000008 $d
- /tmp/ccqw5Uyy.s:301 .text.LL_SetFlashLatency:00000000 $t
- /tmp/ccqw5Uyy.s:307 .text.LL_SetFlashLatency:00000000 LL_SetFlashLatency
- /tmp/ccqw5Uyy.s:693 .text.LL_SetFlashLatency:00000140 $d
- /tmp/ccqw5Uyy.s:705 .text.UTILS_EnablePLLAndSwitchSystem:00000000 $t
- /tmp/ccqw5Uyy.s:710 .text.UTILS_EnablePLLAndSwitchSystem:00000000 UTILS_EnablePLLAndSwitchSystem
- /tmp/ccqw5Uyy.s:923 .text.UTILS_EnablePLLAndSwitchSystem:000000a0 $d
- /tmp/ccqw5Uyy.s:930 .text.LL_PLL_ConfigSystemClock_HSI:00000000 $t
- /tmp/ccqw5Uyy.s:936 .text.LL_PLL_ConfigSystemClock_HSI:00000000 LL_PLL_ConfigSystemClock_HSI
- /tmp/ccqw5Uyy.s:1059 .text.LL_PLL_ConfigSystemClock_HSI:00000058 $d
- /tmp/ccqw5Uyy.s:1066 .text.LL_PLL_ConfigSystemClock_HSE:00000000 $t
- /tmp/ccqw5Uyy.s:1072 .text.LL_PLL_ConfigSystemClock_HSE:00000000 LL_PLL_ConfigSystemClock_HSE
- /tmp/ccqw5Uyy.s:1237 .text.LL_PLL_ConfigSystemClock_HSE:0000007c $d
+ /tmp/ccdXEeLg.s:20 .text.UTILS_GetPLLOutputFrequency:00000000 $t
+ /tmp/ccdXEeLg.s:25 .text.UTILS_GetPLLOutputFrequency:00000000 UTILS_GetPLLOutputFrequency
+ /tmp/ccdXEeLg.s:74 .text.UTILS_PLL_IsBusy:00000000 $t
+ /tmp/ccdXEeLg.s:79 .text.UTILS_PLL_IsBusy:00000000 UTILS_PLL_IsBusy
+ /tmp/ccdXEeLg.s:154 .text.UTILS_PLL_IsBusy:0000002c $d
+ /tmp/ccdXEeLg.s:159 .text.LL_Init1msTick:00000000 $t
+ /tmp/ccdXEeLg.s:165 .text.LL_Init1msTick:00000000 LL_Init1msTick
+ /tmp/ccdXEeLg.s:206 .text.LL_Init1msTick:0000001c $d
+ /tmp/ccdXEeLg.s:211 .text.LL_mDelay:00000000 $t
+ /tmp/ccdXEeLg.s:217 .text.LL_mDelay:00000000 LL_mDelay
+ /tmp/ccdXEeLg.s:273 .text.LL_SetSystemCoreClock:00000000 $t
+ /tmp/ccdXEeLg.s:279 .text.LL_SetSystemCoreClock:00000000 LL_SetSystemCoreClock
+ /tmp/ccdXEeLg.s:296 .text.LL_SetSystemCoreClock:00000008 $d
+ /tmp/ccdXEeLg.s:301 .text.LL_SetFlashLatency:00000000 $t
+ /tmp/ccdXEeLg.s:307 .text.LL_SetFlashLatency:00000000 LL_SetFlashLatency
+ /tmp/ccdXEeLg.s:693 .text.LL_SetFlashLatency:00000140 $d
+ /tmp/ccdXEeLg.s:705 .text.UTILS_EnablePLLAndSwitchSystem:00000000 $t
+ /tmp/ccdXEeLg.s:710 .text.UTILS_EnablePLLAndSwitchSystem:00000000 UTILS_EnablePLLAndSwitchSystem
+ /tmp/ccdXEeLg.s:923 .text.UTILS_EnablePLLAndSwitchSystem:000000a0 $d
+ /tmp/ccdXEeLg.s:930 .text.LL_PLL_ConfigSystemClock_HSI:00000000 $t
+ /tmp/ccdXEeLg.s:936 .text.LL_PLL_ConfigSystemClock_HSI:00000000 LL_PLL_ConfigSystemClock_HSI
+ /tmp/ccdXEeLg.s:1059 .text.LL_PLL_ConfigSystemClock_HSI:00000058 $d
+ /tmp/ccdXEeLg.s:1066 .text.LL_PLL_ConfigSystemClock_HSE:00000000 $t
+ /tmp/ccdXEeLg.s:1072 .text.LL_PLL_ConfigSystemClock_HSE:00000000 LL_PLL_ConfigSystemClock_HSE
+ /tmp/ccdXEeLg.s:1237 .text.LL_PLL_ConfigSystemClock_HSE:0000007c $d
UNDEFINED SYMBOLS
SystemCoreClock
diff --git a/build/syscall.lst b/build/syscall.lst
index 91d701b..55ec09f 100644
--- a/build/syscall.lst
+++ b/build/syscall.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccgbe2El.s page 1
+ARM GAS /tmp/cclLMiQ7.s page 1
1 .cpu cortex-m7
@@ -24,7 +24,7 @@ ARM GAS /tmp/ccgbe2El.s page 1
21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
- ARM GAS /tmp/ccgbe2El.s page 2
+ ARM GAS /tmp/cclLMiQ7.s page 2
DEFINED SYMBOLS
diff --git a/build/syscall.o b/build/syscall.o
index c5e5a6d..8ee00d9 100644
Binary files a/build/syscall.o and b/build/syscall.o differ
diff --git a/build/syscalls.lst b/build/syscalls.lst
index 0b0109f..0170b58 100644
--- a/build/syscalls.lst
+++ b/build/syscalls.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccdCmhrK.s page 1
+ARM GAS /tmp/cct7oues.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
29:Src/syscalls.c **** #include
30:Src/syscalls.c **** #include
31:Src/syscalls.c **** #include
- ARM GAS /tmp/ccdCmhrK.s page 2
+ ARM GAS /tmp/cct7oues.s page 2
32:Src/syscalls.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
66 _kill:
67 .LVL0:
68 .LFB27:
- ARM GAS /tmp/ccdCmhrK.s page 3
+ ARM GAS /tmp/cct7oues.s page 3
52:Src/syscalls.c ****
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
114 .cfi_offset 14, -4
63:Src/syscalls.c **** _kill(status, -1);
115 .loc 1 63 3 is_stmt 1 view .LVU15
- ARM GAS /tmp/ccdCmhrK.s page 4
+ ARM GAS /tmp/cct7oues.s page 4
116 0002 4FF0FF31 mov r1, #-1
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
161 .loc 1 74 5 is_stmt 1 view .LVU26
162 .loc 1 74 14 is_stmt 0 view .LVU27
163 000a FFF7FEFF bl __io_getchar
- ARM GAS /tmp/ccdCmhrK.s page 5
+ ARM GAS /tmp/cct7oues.s page 5
164 .LVL7:
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
211 0002 0C46 mov r4, r1
212 0004 1646 mov r6, r2
82:Src/syscalls.c **** (void)file;
- ARM GAS /tmp/ccdCmhrK.s page 6
+ ARM GAS /tmp/cct7oues.s page 6
213 .loc 1 82 3 is_stmt 1 view .LVU38
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
256 .cfi_startproc
257 @ args = 0, pretend = 0, frame = 0
258 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccdCmhrK.s page 7
+ ARM GAS /tmp/cct7oues.s page 7
259 @ link register save eliminated.
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
306 _isatty:
307 .LVL22:
308 .LFB33:
- ARM GAS /tmp/ccdCmhrK.s page 8
+ ARM GAS /tmp/cct7oues.s page 8
105:Src/syscalls.c ****
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
352 .align 1
353 .global _open
354 .syntax unified
- ARM GAS /tmp/ccdCmhrK.s page 9
+ ARM GAS /tmp/cct7oues.s page 9
355 .thumb
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
401 .cfi_startproc
402 @ args = 0, pretend = 0, frame = 0
403 @ frame_needed = 0, uses_anonymous_args = 0
- ARM GAS /tmp/ccdCmhrK.s page 10
+ ARM GAS /tmp/cct7oues.s page 10
404 .loc 1 129 1 is_stmt 0 view .LVU83
@@ -598,7 +598,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
139:Src/syscalls.c **** return -1;
451 .loc 1 139 3 is_stmt 1 view .LVU94
140:Src/syscalls.c **** }
- ARM GAS /tmp/ccdCmhrK.s page 11
+ ARM GAS /tmp/cct7oues.s page 11
452 .loc 1 140 1 is_stmt 0 view .LVU95
@@ -658,7 +658,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
499 .loc 1 151 3 view .LVU103
500 .loc 1 151 15 is_stmt 0 view .LVU104
501 0000 4FF40053 mov r3, #8192
- ARM GAS /tmp/ccdCmhrK.s page 12
+ ARM GAS /tmp/cct7oues.s page 12
502 0004 4B60 str r3, [r1, #4]
@@ -718,7 +718,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
549 .global _fork
550 .syntax unified
551 .thumb
- ARM GAS /tmp/ccdCmhrK.s page 13
+ ARM GAS /tmp/cct7oues.s page 13
552 .thumb_func
@@ -778,7 +778,7 @@ ARM GAS /tmp/ccdCmhrK.s page 1
172:Src/syscalls.c **** (void)argv;
599 .loc 1 172 3 view .LVU124
173:Src/syscalls.c **** (void)env;
- ARM GAS /tmp/ccdCmhrK.s page 14
+ ARM GAS /tmp/cct7oues.s page 14
600 .loc 1 173 3 view .LVU125
@@ -819,51 +819,51 @@ ARM GAS /tmp/ccdCmhrK.s page 1
637 .file 7 "/usr/include/newlib/sys/stat.h"
638 .file 8 "/usr/include/newlib/sys/times.h"
639 .file 9 "/usr/include/newlib/sys/errno.h"
- ARM GAS /tmp/ccdCmhrK.s page 15
+ ARM GAS /tmp/cct7oues.s page 15
DEFINED SYMBOLS
*ABS*:00000000 syscalls.c
- /tmp/ccdCmhrK.s:20 .text.initialise_monitor_handles:00000000 $t
- /tmp/ccdCmhrK.s:26 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
- /tmp/ccdCmhrK.s:39 .text._getpid:00000000 $t
- /tmp/ccdCmhrK.s:45 .text._getpid:00000000 _getpid
- /tmp/ccdCmhrK.s:60 .text._kill:00000000 $t
- /tmp/ccdCmhrK.s:66 .text._kill:00000000 _kill
- /tmp/ccdCmhrK.s:95 .text._exit:00000000 $t
- /tmp/ccdCmhrK.s:101 .text._exit:00000000 _exit
- /tmp/ccdCmhrK.s:128 .text._read:00000000 $t
- /tmp/ccdCmhrK.s:134 .text._read:00000000 _read
- /tmp/ccdCmhrK.s:190 .text._write:00000000 $t
- /tmp/ccdCmhrK.s:196 .text._write:00000000 _write
- /tmp/ccdCmhrK.s:246 .text._close:00000000 $t
- /tmp/ccdCmhrK.s:252 .text._close:00000000 _close
- /tmp/ccdCmhrK.s:271 .text._fstat:00000000 $t
- /tmp/ccdCmhrK.s:277 .text._fstat:00000000 _fstat
- /tmp/ccdCmhrK.s:300 .text._isatty:00000000 $t
- /tmp/ccdCmhrK.s:306 .text._isatty:00000000 _isatty
- /tmp/ccdCmhrK.s:325 .text._lseek:00000000 $t
- /tmp/ccdCmhrK.s:331 .text._lseek:00000000 _lseek
- /tmp/ccdCmhrK.s:352 .text._open:00000000 $t
- /tmp/ccdCmhrK.s:358 .text._open:00000000 _open
- /tmp/ccdCmhrK.s:391 .text._wait:00000000 $t
- /tmp/ccdCmhrK.s:397 .text._wait:00000000 _wait
- /tmp/ccdCmhrK.s:425 .text._unlink:00000000 $t
- /tmp/ccdCmhrK.s:431 .text._unlink:00000000 _unlink
- /tmp/ccdCmhrK.s:459 .text._times:00000000 $t
- /tmp/ccdCmhrK.s:465 .text._times:00000000 _times
- /tmp/ccdCmhrK.s:484 .text._stat:00000000 $t
- /tmp/ccdCmhrK.s:490 .text._stat:00000000 _stat
- /tmp/ccdCmhrK.s:513 .text._link:00000000 $t
- /tmp/ccdCmhrK.s:519 .text._link:00000000 _link
- /tmp/ccdCmhrK.s:548 .text._fork:00000000 $t
- /tmp/ccdCmhrK.s:554 .text._fork:00000000 _fork
- /tmp/ccdCmhrK.s:579 .text._execve:00000000 $t
- /tmp/ccdCmhrK.s:585 .text._execve:00000000 _execve
- /tmp/ccdCmhrK.s:619 .data.environ:00000000 environ
- /tmp/ccdCmhrK.s:616 .data.environ:00000000 $d
- /tmp/ccdCmhrK.s:626 .bss.__env:00000000 __env
- /tmp/ccdCmhrK.s:623 .bss.__env:00000000 $d
+ /tmp/cct7oues.s:20 .text.initialise_monitor_handles:00000000 $t
+ /tmp/cct7oues.s:26 .text.initialise_monitor_handles:00000000 initialise_monitor_handles
+ /tmp/cct7oues.s:39 .text._getpid:00000000 $t
+ /tmp/cct7oues.s:45 .text._getpid:00000000 _getpid
+ /tmp/cct7oues.s:60 .text._kill:00000000 $t
+ /tmp/cct7oues.s:66 .text._kill:00000000 _kill
+ /tmp/cct7oues.s:95 .text._exit:00000000 $t
+ /tmp/cct7oues.s:101 .text._exit:00000000 _exit
+ /tmp/cct7oues.s:128 .text._read:00000000 $t
+ /tmp/cct7oues.s:134 .text._read:00000000 _read
+ /tmp/cct7oues.s:190 .text._write:00000000 $t
+ /tmp/cct7oues.s:196 .text._write:00000000 _write
+ /tmp/cct7oues.s:246 .text._close:00000000 $t
+ /tmp/cct7oues.s:252 .text._close:00000000 _close
+ /tmp/cct7oues.s:271 .text._fstat:00000000 $t
+ /tmp/cct7oues.s:277 .text._fstat:00000000 _fstat
+ /tmp/cct7oues.s:300 .text._isatty:00000000 $t
+ /tmp/cct7oues.s:306 .text._isatty:00000000 _isatty
+ /tmp/cct7oues.s:325 .text._lseek:00000000 $t
+ /tmp/cct7oues.s:331 .text._lseek:00000000 _lseek
+ /tmp/cct7oues.s:352 .text._open:00000000 $t
+ /tmp/cct7oues.s:358 .text._open:00000000 _open
+ /tmp/cct7oues.s:391 .text._wait:00000000 $t
+ /tmp/cct7oues.s:397 .text._wait:00000000 _wait
+ /tmp/cct7oues.s:425 .text._unlink:00000000 $t
+ /tmp/cct7oues.s:431 .text._unlink:00000000 _unlink
+ /tmp/cct7oues.s:459 .text._times:00000000 $t
+ /tmp/cct7oues.s:465 .text._times:00000000 _times
+ /tmp/cct7oues.s:484 .text._stat:00000000 $t
+ /tmp/cct7oues.s:490 .text._stat:00000000 _stat
+ /tmp/cct7oues.s:513 .text._link:00000000 $t
+ /tmp/cct7oues.s:519 .text._link:00000000 _link
+ /tmp/cct7oues.s:548 .text._fork:00000000 $t
+ /tmp/cct7oues.s:554 .text._fork:00000000 _fork
+ /tmp/cct7oues.s:579 .text._execve:00000000 $t
+ /tmp/cct7oues.s:585 .text._execve:00000000 _execve
+ /tmp/cct7oues.s:619 .data.environ:00000000 environ
+ /tmp/cct7oues.s:616 .data.environ:00000000 $d
+ /tmp/cct7oues.s:626 .bss.__env:00000000 __env
+ /tmp/cct7oues.s:623 .bss.__env:00000000 $d
UNDEFINED SYMBOLS
__errno
diff --git a/build/sysmem.lst b/build/sysmem.lst
index 602dc69..5a6850d 100644
--- a/build/sysmem.lst
+++ b/build/sysmem.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/cczKmYcs.s page 1
+ARM GAS /tmp/ccPuFuNR.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/cczKmYcs.s page 1
28:Src/sysmem.c **** * Pointer to the current high watermark of the heap usage
29:Src/sysmem.c **** */
30:Src/sysmem.c **** static uint8_t *__sbrk_heap_end = NULL;
- ARM GAS /tmp/cczKmYcs.s page 2
+ ARM GAS /tmp/ccPuFuNR.s page 2
31:Src/sysmem.c ****
@@ -118,7 +118,7 @@ ARM GAS /tmp/cczKmYcs.s page 1
62:Src/sysmem.c **** /* Initialize heap end at first call */
63:Src/sysmem.c **** if (NULL == __sbrk_heap_end)
51 .loc 1 63 3 view .LVU9
- ARM GAS /tmp/cczKmYcs.s page 3
+ ARM GAS /tmp/ccPuFuNR.s page 3
52 .loc 1 63 12 is_stmt 0 view .LVU10
@@ -178,7 +178,7 @@ ARM GAS /tmp/cczKmYcs.s page 1
88 0026 F2E7 b .L2
89 .LVL8:
90 .L7:
- ARM GAS /tmp/cczKmYcs.s page 4
+ ARM GAS /tmp/ccPuFuNR.s page 4
71:Src/sysmem.c **** return (void *)-1;
@@ -213,16 +213,16 @@ ARM GAS /tmp/cczKmYcs.s page 1
119 .file 2 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stddef.h"
120 .file 3 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
121 .file 4 "/usr/include/newlib/sys/errno.h"
- ARM GAS /tmp/cczKmYcs.s page 5
+ ARM GAS /tmp/ccPuFuNR.s page 5
DEFINED SYMBOLS
*ABS*:00000000 sysmem.c
- /tmp/cczKmYcs.s:20 .text._sbrk:00000000 $t
- /tmp/cczKmYcs.s:26 .text._sbrk:00000000 _sbrk
- /tmp/cczKmYcs.s:104 .text._sbrk:00000038 $d
- /tmp/cczKmYcs.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
- /tmp/cczKmYcs.s:112 .bss.__sbrk_heap_end:00000000 $d
+ /tmp/ccPuFuNR.s:20 .text._sbrk:00000000 $t
+ /tmp/ccPuFuNR.s:26 .text._sbrk:00000000 _sbrk
+ /tmp/ccPuFuNR.s:104 .text._sbrk:00000038 $d
+ /tmp/ccPuFuNR.s:115 .bss.__sbrk_heap_end:00000000 __sbrk_heap_end
+ /tmp/ccPuFuNR.s:112 .bss.__sbrk_heap_end:00000000 $d
UNDEFINED SYMBOLS
__errno
diff --git a/build/system_stm32f7xx.lst b/build/system_stm32f7xx.lst
index e9f9b2e..b143f5b 100644
--- a/build/system_stm32f7xx.lst
+++ b/build/system_stm32f7xx.lst
@@ -1,4 +1,4 @@
-ARM GAS /tmp/ccndRLUa.s page 1
+ARM GAS /tmp/cc0cCGbS.s page 1
1 .cpu cortex-m7
@@ -58,7 +58,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
29:Src/system_stm32f7xx.c **** * in the root directory of this software component.
30:Src/system_stm32f7xx.c **** * If no LICENSE file comes with this software, it is provided AS-IS.
31:Src/system_stm32f7xx.c **** *
- ARM GAS /tmp/ccndRLUa.s page 2
+ ARM GAS /tmp/cc0cCGbS.s page 2
32:Src/system_stm32f7xx.c **** ******************************************************************************
@@ -118,7 +118,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
86:Src/system_stm32f7xx.c **** #if defined(VECT_TAB_SRAM)
87:Src/system_stm32f7xx.c **** #define VECT_TAB_BASE_ADDRESS RAMDTCM_BASE /*!< Vector Table base address field.
88:Src/system_stm32f7xx.c **** This value must be a multiple of 0x200. */
- ARM GAS /tmp/ccndRLUa.s page 3
+ ARM GAS /tmp/cc0cCGbS.s page 3
89:Src/system_stm32f7xx.c **** #define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
@@ -178,7 +178,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
143:Src/system_stm32f7xx.c ****
144:Src/system_stm32f7xx.c **** /**
145:Src/system_stm32f7xx.c **** * @brief Setup the microcontroller system
- ARM GAS /tmp/ccndRLUa.s page 4
+ ARM GAS /tmp/cc0cCGbS.s page 4
146:Src/system_stm32f7xx.c **** * Initialize the Embedded Flash Interface, the PLL and update the
@@ -238,7 +238,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
172:Src/system_stm32f7xx.c **** * based on this variable will be incorrect.
173:Src/system_stm32f7xx.c **** *
174:Src/system_stm32f7xx.c **** * @note - The system frequency computed by this function is not the real
- ARM GAS /tmp/ccndRLUa.s page 5
+ ARM GAS /tmp/cc0cCGbS.s page 5
175:Src/system_stm32f7xx.c **** * frequency in the chip. It is calculated based on the predefined
@@ -298,7 +298,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
208:Src/system_stm32f7xx.c **** {
209:Src/system_stm32f7xx.c **** case 0x00: /* HSI used as system clock source */
210:Src/system_stm32f7xx.c **** SystemCoreClock = HSI_VALUE;
- ARM GAS /tmp/ccndRLUa.s page 6
+ ARM GAS /tmp/cc0cCGbS.s page 6
79 .loc 1 210 7 view .LVU11
@@ -358,7 +358,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
245:Src/system_stm32f7xx.c **** SystemCoreClock >>= tmp;
99 .loc 1 245 3 is_stmt 1 view .LVU19
100 .loc 1 245 19 is_stmt 0 view .LVU20
- ARM GAS /tmp/ccndRLUa.s page 7
+ ARM GAS /tmp/cc0cCGbS.s page 7
101 0026 1A4A ldr r2, .L11+4
@@ -418,7 +418,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
140 004a B3FBF2F3 udiv r3, r3, r2
226:Src/system_stm32f7xx.c **** }
141 .loc 1 226 44 view .LVU36
- ARM GAS /tmp/ccndRLUa.s page 8
+ ARM GAS /tmp/cc0cCGbS.s page 8
142 004e 0F4A ldr r2, .L11
@@ -478,7 +478,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
180 .loc 1 231 44 view .LVU52
181 0076 054A ldr r2, .L11
182 .LVL17:
- ARM GAS /tmp/ccndRLUa.s page 9
+ ARM GAS /tmp/cc0cCGbS.s page 9
231:Src/system_stm32f7xx.c **** }
@@ -538,7 +538,7 @@ ARM GAS /tmp/ccndRLUa.s page 1
230 .section .data.SystemCoreClock,"aw"
231 .align 2
234 SystemCoreClock:
- ARM GAS /tmp/ccndRLUa.s page 10
+ ARM GAS /tmp/cc0cCGbS.s page 10
235 0000 0024F400 .word 16000000
@@ -548,22 +548,22 @@ ARM GAS /tmp/ccndRLUa.s page 1
239 .file 3 "Drivers/CMSIS/Include/core_cm7.h"
240 .file 4 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/system_stm32f7xx.h"
241 .file 5 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h"
- ARM GAS /tmp/ccndRLUa.s page 11
+ ARM GAS /tmp/cc0cCGbS.s page 11
DEFINED SYMBOLS
*ABS*:00000000 system_stm32f7xx.c
- /tmp/ccndRLUa.s:20 .text.SystemInit:00000000 $t
- /tmp/ccndRLUa.s:26 .text.SystemInit:00000000 SystemInit
- /tmp/ccndRLUa.s:45 .text.SystemInit:00000010 $d
- /tmp/ccndRLUa.s:50 .text.SystemCoreClockUpdate:00000000 $t
- /tmp/ccndRLUa.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
- /tmp/ccndRLUa.s:206 .text.SystemCoreClockUpdate:0000008c $d
- /tmp/ccndRLUa.s:234 .data.SystemCoreClock:00000000 SystemCoreClock
- /tmp/ccndRLUa.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable
- /tmp/ccndRLUa.s:219 .rodata.APBPrescTable:00000000 APBPrescTable
- /tmp/ccndRLUa.s:216 .rodata.APBPrescTable:00000000 $d
- /tmp/ccndRLUa.s:223 .rodata.AHBPrescTable:00000000 $d
- /tmp/ccndRLUa.s:231 .data.SystemCoreClock:00000000 $d
+ /tmp/cc0cCGbS.s:20 .text.SystemInit:00000000 $t
+ /tmp/cc0cCGbS.s:26 .text.SystemInit:00000000 SystemInit
+ /tmp/cc0cCGbS.s:45 .text.SystemInit:00000010 $d
+ /tmp/cc0cCGbS.s:50 .text.SystemCoreClockUpdate:00000000 $t
+ /tmp/cc0cCGbS.s:56 .text.SystemCoreClockUpdate:00000000 SystemCoreClockUpdate
+ /tmp/cc0cCGbS.s:206 .text.SystemCoreClockUpdate:0000008c $d
+ /tmp/cc0cCGbS.s:234 .data.SystemCoreClock:00000000 SystemCoreClock
+ /tmp/cc0cCGbS.s:226 .rodata.AHBPrescTable:00000000 AHBPrescTable
+ /tmp/cc0cCGbS.s:219 .rodata.APBPrescTable:00000000 APBPrescTable
+ /tmp/cc0cCGbS.s:216 .rodata.APBPrescTable:00000000 $d
+ /tmp/cc0cCGbS.s:223 .rodata.AHBPrescTable:00000000 $d
+ /tmp/cc0cCGbS.s:231 .data.SystemCoreClock:00000000 $d
NO UNDEFINED SYMBOLS