increased SYNC_DETector frequency up to 2.42 MHz. also now ADC clock freq is equal to Mach-Zander freq. Because ADC samples at both rising and falling edges

Src/main.c

@@ -182,7 +182,9 @@ int main(void)
 	//TIM4 -> ARR = 91; // for 1 MHz
 	//TIM4 -> ARR = 45; // for 2 MHz
 //	TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
-	TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
+	//TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears.
+
+	TIM4 -> ARR = 37; //for 2.42 MHz. Highest freq for stm_ADC based on stm32G431-- 2.8 MHz
 
 	TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;