diff --git a/Src/main.c b/Src/main.c index 7d18782..8644d57 100644 --- a/Src/main.c +++ b/Src/main.c @@ -182,7 +182,9 @@ int main(void) //TIM4 -> ARR = 91; // for 1 MHz //TIM4 -> ARR = 45; // for 2 MHz // TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears. - TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears. + //TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher freq artifacts (voltage peaks) appears. + + TIM4 -> ARR = 37; //for 2.42 MHz. Highest freq for stm_ADC based on stm32G431-- 2.8 MHz TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; diff --git a/build/For_stm32.bin b/build/For_stm32.bin index 09ca838..bb4eafb 100755 Binary files a/build/For_stm32.bin and b/build/For_stm32.bin differ diff --git a/build/For_stm32.elf b/build/For_stm32.elf index e30ba87..3977866 100755 Binary files a/build/For_stm32.elf and b/build/For_stm32.elf differ diff --git a/build/For_stm32.hex b/build/For_stm32.hex index db6b24d..12a4b58 100644 --- a/build/For_stm32.hex +++ b/build/For_stm32.hex @@ -1,45 +1,45 @@ :020000040800F2 -:1000000000000820CDAA0008C53D0008C73D000833 -:10001000C93D0008CB3D0008CD3D000800000000B0 -:10002000000000000000000000000000CF3D0008BC -:10003000D13D000800000000D33D0008D53D000878 -:100040001DAB00081DAB00081DAB00081DAB000870 -:100050001DAB00081DAB00081DAB00081DAB000860 -:100060001DAB00081DAB00081DAB00081DAB000850 -:100070001DAB00081DAB00081DAB00081DAB000840 -:100080001DAB00081DAB0008DD3D00081DAB0008DE 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+:10ADA0005001002000000000000000000000000032 +:10ADB0000000000000000000000000000000000093 +:10ADC0000000000000000000000000000000000083 +:10ADD0000000000000000000000000000000000073 +:0CADE00001010000100000000024F4003D +:040000050800AAB98C :00000001FF diff --git a/build/For_stm32.map b/build/For_stm32.map index f94b964..c8eea7c 100644 --- a/build/For_stm32.map +++ b/build/For_stm32.map @@ -2080,7 +2080,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x08000000 g_pfnVectors 0x080001f8 . = ALIGN (0x4) -.text 0x08000200 0xa938 +.text 0x08000200 0xa924 0x08000200 . = ALIGN (0x4) *(.text) .text 0x08000200 0x88 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o @@ -2217,865 +2217,865 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o .text.SystemClock_Config 0x0800307c 0xb4 build/main.o 0x0800307c SystemClock_Config - .text.main 0x08003130 0xab0 build/main.o + .text.main 0x08003130 0xa9c build/main.o 0x08003130 main .text.BSP_SD_ReadBlocks - 0x08003be0 0x20 build/bsp_driver_sd.o - 0x08003be0 BSP_SD_ReadBlocks + 0x08003bcc 0x20 build/bsp_driver_sd.o + 0x08003bcc BSP_SD_ReadBlocks .text.BSP_SD_WriteBlocks - 0x08003c00 0x20 build/bsp_driver_sd.o - 0x08003c00 BSP_SD_WriteBlocks + 0x08003bec 0x20 build/bsp_driver_sd.o + 0x08003bec BSP_SD_WriteBlocks .text.BSP_SD_GetCardState - 0x08003c20 0x14 build/bsp_driver_sd.o - 0x08003c20 BSP_SD_GetCardState + 0x08003c0c 0x14 build/bsp_driver_sd.o + 0x08003c0c BSP_SD_GetCardState .text.BSP_SD_GetCardInfo - 0x08003c34 0x10 build/bsp_driver_sd.o - 0x08003c34 BSP_SD_GetCardInfo + 0x08003c20 0x10 build/bsp_driver_sd.o + 0x08003c20 BSP_SD_GetCardInfo .text.BSP_SD_IsDetected - 0x08003c44 0x20 build/bsp_driver_sd.o - 0x08003c44 BSP_SD_IsDetected + 0x08003c30 0x20 build/bsp_driver_sd.o + 0x08003c30 BSP_SD_IsDetected .text.BSP_SD_Init - 0x08003c64 0x34 build/bsp_driver_sd.o - 0x08003c64 BSP_SD_Init + 0x08003c50 0x34 build/bsp_driver_sd.o + 0x08003c50 BSP_SD_Init .text.SD_CheckStatus - 0x08003c98 0x24 build/sd_diskio.o + 0x08003c84 0x24 build/sd_diskio.o .text.SD_initialize - 0x08003cbc 0x28 build/sd_diskio.o - 0x08003cbc SD_initialize + 0x08003ca8 0x28 build/sd_diskio.o + 0x08003ca8 SD_initialize .text.SD_status - 0x08003ce4 0x8 build/sd_diskio.o - 0x08003ce4 SD_status - .text.SD_read 0x08003cec 0x24 build/sd_diskio.o - 0x08003cec SD_read + 0x08003cd0 0x8 build/sd_diskio.o + 0x08003cd0 SD_status + .text.SD_read 0x08003cd8 0x24 build/sd_diskio.o + 0x08003cd8 SD_read .text.SD_write - 0x08003d10 0x24 build/sd_diskio.o - 0x08003d10 SD_write + 0x08003cfc 0x24 build/sd_diskio.o + 0x08003cfc SD_write .text.SD_ioctl - 0x08003d34 0x58 build/sd_diskio.o - 0x08003d34 SD_ioctl + 0x08003d20 0x58 build/sd_diskio.o + 0x08003d20 SD_ioctl .text.MX_FATFS_Init - 0x08003d8c 0x1c build/fatfs.o - 0x08003d8c MX_FATFS_Init + 0x08003d78 0x1c build/fatfs.o + 0x08003d78 MX_FATFS_Init .text.get_fattime - 0x08003da8 0x4 build/fatfs.o - 0x08003da8 get_fattime + 0x08003d94 0x4 build/fatfs.o + 0x08003d94 get_fattime .text.BSP_PlatformIsDetected - 0x08003dac 0x18 build/fatfs_platform.o - 0x08003dac BSP_PlatformIsDetected + 0x08003d98 0x18 build/fatfs_platform.o + 0x08003d98 BSP_PlatformIsDetected .text.NMI_Handler - 0x08003dc4 0x2 build/stm32f7xx_it.o - 0x08003dc4 NMI_Handler + 0x08003db0 0x2 build/stm32f7xx_it.o + 0x08003db0 NMI_Handler .text.HardFault_Handler - 0x08003dc6 0x2 build/stm32f7xx_it.o - 0x08003dc6 HardFault_Handler + 0x08003db2 0x2 build/stm32f7xx_it.o + 0x08003db2 HardFault_Handler .text.MemManage_Handler - 0x08003dc8 0x2 build/stm32f7xx_it.o - 0x08003dc8 MemManage_Handler + 0x08003db4 0x2 build/stm32f7xx_it.o + 0x08003db4 MemManage_Handler .text.BusFault_Handler - 0x08003dca 0x2 build/stm32f7xx_it.o - 0x08003dca BusFault_Handler + 0x08003db6 0x2 build/stm32f7xx_it.o + 0x08003db6 BusFault_Handler .text.UsageFault_Handler - 0x08003dcc 0x2 build/stm32f7xx_it.o - 0x08003dcc UsageFault_Handler + 0x08003db8 0x2 build/stm32f7xx_it.o + 0x08003db8 UsageFault_Handler .text.SVC_Handler - 0x08003dce 0x2 build/stm32f7xx_it.o - 0x08003dce SVC_Handler + 0x08003dba 0x2 build/stm32f7xx_it.o + 0x08003dba SVC_Handler .text.DebugMon_Handler - 0x08003dd0 0x2 build/stm32f7xx_it.o - 0x08003dd0 DebugMon_Handler + 0x08003dbc 0x2 build/stm32f7xx_it.o + 0x08003dbc DebugMon_Handler .text.PendSV_Handler - 0x08003dd2 0x2 build/stm32f7xx_it.o - 0x08003dd2 PendSV_Handler + 0x08003dbe 0x2 build/stm32f7xx_it.o + 0x08003dbe PendSV_Handler .text.SysTick_Handler - 0x08003dd4 0x8 build/stm32f7xx_it.o - 0x08003dd4 SysTick_Handler + 0x08003dc0 0x8 build/stm32f7xx_it.o + 0x08003dc0 SysTick_Handler .text.ADC_IRQHandler - 0x08003ddc 0x18 build/stm32f7xx_it.o - 0x08003ddc ADC_IRQHandler + 0x08003dc8 0x18 build/stm32f7xx_it.o + 0x08003dc8 ADC_IRQHandler .text.TIM1_UP_TIM10_IRQHandler - 0x08003df4 0x34 build/stm32f7xx_it.o - 0x08003df4 TIM1_UP_TIM10_IRQHandler + 0x08003de0 0x34 build/stm32f7xx_it.o + 0x08003de0 TIM1_UP_TIM10_IRQHandler .text.TIM1_TRG_COM_TIM11_IRQHandler - 0x08003e28 0x34 build/stm32f7xx_it.o - 0x08003e28 TIM1_TRG_COM_TIM11_IRQHandler + 0x08003e14 0x34 build/stm32f7xx_it.o + 0x08003e14 TIM1_TRG_COM_TIM11_IRQHandler .text.TIM2_IRQHandler - 0x08003e5c 0x2 build/stm32f7xx_it.o - 0x08003e5c TIM2_IRQHandler - *fill* 0x08003e5e 0x2 + 0x08003e48 0x2 build/stm32f7xx_it.o + 0x08003e48 TIM2_IRQHandler + *fill* 0x08003e4a 0x2 .text.TIM8_UP_TIM13_IRQHandler - 0x08003e60 0x50 build/stm32f7xx_it.o - 0x08003e60 TIM8_UP_TIM13_IRQHandler + 0x08003e4c 0x50 build/stm32f7xx_it.o + 0x08003e4c TIM8_UP_TIM13_IRQHandler .text.TIM5_IRQHandler - 0x08003eb0 0x2 build/stm32f7xx_it.o - 0x08003eb0 TIM5_IRQHandler - *fill* 0x08003eb2 0x2 + 0x08003e9c 0x2 build/stm32f7xx_it.o + 0x08003e9c TIM5_IRQHandler + *fill* 0x08003e9e 0x2 .text.TIM6_DAC_IRQHandler - 0x08003eb4 0x34 build/stm32f7xx_it.o - 0x08003eb4 TIM6_DAC_IRQHandler + 0x08003ea0 0x34 build/stm32f7xx_it.o + 0x08003ea0 TIM6_DAC_IRQHandler .text.TIM7_IRQHandler - 0x08003ee8 0x24 build/stm32f7xx_it.o - 0x08003ee8 TIM7_IRQHandler + 0x08003ed4 0x24 build/stm32f7xx_it.o + 0x08003ed4 TIM7_IRQHandler .text.UART_RxCpltCallback - 0x08003f0c 0x28c build/stm32f7xx_it.o - 0x08003f0c UART_RxCpltCallback + 0x08003ef8 0x28c build/stm32f7xx_it.o + 0x08003ef8 UART_RxCpltCallback .text.USART1_IRQHandler - 0x08004198 0xd0 build/stm32f7xx_it.o - 0x08004198 USART1_IRQHandler + 0x08004184 0xd0 build/stm32f7xx_it.o + 0x08004184 USART1_IRQHandler .text.DMA2_Stream7_TransferComplete - 0x08004268 0x10 build/stm32f7xx_it.o - 0x08004268 DMA2_Stream7_TransferComplete + 0x08004254 0x10 build/stm32f7xx_it.o + 0x08004254 DMA2_Stream7_TransferComplete .text.DMA2_Stream7_IRQHandler - 0x08004278 0x34 build/stm32f7xx_it.o - 0x08004278 DMA2_Stream7_IRQHandler + 0x08004264 0x34 build/stm32f7xx_it.o + 0x08004264 DMA2_Stream7_IRQHandler .text.HAL_MspInit - 0x080042ac 0x30 build/stm32f7xx_hal_msp.o - 0x080042ac HAL_MspInit + 0x08004298 0x30 build/stm32f7xx_hal_msp.o + 0x08004298 HAL_MspInit .text.HAL_ADC_MspInit - 0x080042dc 0x110 build/stm32f7xx_hal_msp.o - 0x080042dc HAL_ADC_MspInit + 0x080042c8 0x110 build/stm32f7xx_hal_msp.o + 0x080042c8 HAL_ADC_MspInit .text.HAL_SD_MspInit - 0x080043ec 0xb8 build/stm32f7xx_hal_msp.o - 0x080043ec HAL_SD_MspInit + 0x080043d8 0xb8 build/stm32f7xx_hal_msp.o + 0x080043d8 HAL_SD_MspInit .text.HAL_TIM_Base_MspInit - 0x080044a4 0xc0 build/stm32f7xx_hal_msp.o - 0x080044a4 HAL_TIM_Base_MspInit + 0x08004490 0xc0 build/stm32f7xx_hal_msp.o + 0x08004490 HAL_TIM_Base_MspInit .text.HAL_TIM_MspPostInit - 0x08004564 0x8c build/stm32f7xx_hal_msp.o - 0x08004564 HAL_TIM_MspPostInit + 0x08004550 0x8c build/stm32f7xx_hal_msp.o + 0x08004550 HAL_TIM_MspPostInit .text.HAL_UART_MspInit - 0x080045f0 0x88 build/stm32f7xx_hal_msp.o - 0x080045f0 HAL_UART_MspInit + 0x080045dc 0x88 build/stm32f7xx_hal_msp.o + 0x080045dc HAL_UART_MspInit .text.ADC_Init - 0x08004678 0x134 build/stm32f7xx_hal_adc.o + 0x08004664 0x134 build/stm32f7xx_hal_adc.o .text.HAL_ADC_Init - 0x080047ac 0x58 build/stm32f7xx_hal_adc.o - 0x080047ac HAL_ADC_Init + 0x08004798 0x58 build/stm32f7xx_hal_adc.o + 0x08004798 HAL_ADC_Init .text.HAL_ADC_Start - 0x08004804 0x134 build/stm32f7xx_hal_adc.o - 0x08004804 HAL_ADC_Start + 0x080047f0 0x134 build/stm32f7xx_hal_adc.o + 0x080047f0 HAL_ADC_Start .text.HAL_ADC_Stop - 0x08004938 0x40 build/stm32f7xx_hal_adc.o - 0x08004938 HAL_ADC_Stop + 0x08004924 0x40 build/stm32f7xx_hal_adc.o + 0x08004924 HAL_ADC_Stop .text.HAL_ADC_PollForConversion - 0x08004978 0xc2 build/stm32f7xx_hal_adc.o - 0x08004978 HAL_ADC_PollForConversion + 0x08004964 0xc2 build/stm32f7xx_hal_adc.o + 0x08004964 HAL_ADC_PollForConversion .text.HAL_ADC_GetValue - 0x08004a3a 0x6 build/stm32f7xx_hal_adc.o - 0x08004a3a HAL_ADC_GetValue + 0x08004a26 0x6 build/stm32f7xx_hal_adc.o + 0x08004a26 HAL_ADC_GetValue .text.HAL_ADC_ConvCpltCallback - 0x08004a40 0x2 build/stm32f7xx_hal_adc.o - 0x08004a40 HAL_ADC_ConvCpltCallback + 0x08004a2c 0x2 build/stm32f7xx_hal_adc.o + 0x08004a2c HAL_ADC_ConvCpltCallback .text.HAL_ADC_LevelOutOfWindowCallback - 0x08004a42 0x2 build/stm32f7xx_hal_adc.o - 0x08004a42 HAL_ADC_LevelOutOfWindowCallback + 0x08004a2e 0x2 build/stm32f7xx_hal_adc.o + 0x08004a2e HAL_ADC_LevelOutOfWindowCallback .text.HAL_ADC_ErrorCallback - 0x08004a44 0x2 build/stm32f7xx_hal_adc.o - 0x08004a44 HAL_ADC_ErrorCallback + 0x08004a30 0x2 build/stm32f7xx_hal_adc.o + 0x08004a30 HAL_ADC_ErrorCallback .text.HAL_ADC_IRQHandler - 0x08004a46 0x136 build/stm32f7xx_hal_adc.o - 0x08004a46 HAL_ADC_IRQHandler + 0x08004a32 0x136 build/stm32f7xx_hal_adc.o + 0x08004a32 HAL_ADC_IRQHandler .text.HAL_ADC_ConfigChannel - 0x08004b7c 0x1e4 build/stm32f7xx_hal_adc.o - 0x08004b7c HAL_ADC_ConfigChannel + 0x08004b68 0x1e4 build/stm32f7xx_hal_adc.o + 0x08004b68 HAL_ADC_ConfigChannel .text.HAL_ADCEx_InjectedConvCpltCallback - 0x08004d60 0x2 build/stm32f7xx_hal_adc_ex.o - 0x08004d60 HAL_ADCEx_InjectedConvCpltCallback - *fill* 0x08004d62 0x2 + 0x08004d4c 0x2 build/stm32f7xx_hal_adc_ex.o + 0x08004d4c HAL_ADCEx_InjectedConvCpltCallback + *fill* 0x08004d4e 0x2 .text.HAL_RCC_OscConfig - 0x08004d64 0x444 build/stm32f7xx_hal_rcc.o - 0x08004d64 HAL_RCC_OscConfig + 0x08004d50 0x444 build/stm32f7xx_hal_rcc.o + 0x08004d50 HAL_RCC_OscConfig .text.HAL_RCC_GetSysClockFreq - 0x080051a8 0xa8 build/stm32f7xx_hal_rcc.o - 0x080051a8 HAL_RCC_GetSysClockFreq + 0x08005194 0xa8 build/stm32f7xx_hal_rcc.o + 0x08005194 HAL_RCC_GetSysClockFreq .text.HAL_RCC_ClockConfig - 0x08005250 0x16c build/stm32f7xx_hal_rcc.o - 0x08005250 HAL_RCC_ClockConfig + 0x0800523c 0x16c build/stm32f7xx_hal_rcc.o + 0x0800523c HAL_RCC_ClockConfig .text.HAL_RCC_GetHCLKFreq - 0x080053bc 0xc build/stm32f7xx_hal_rcc.o - 0x080053bc HAL_RCC_GetHCLKFreq + 0x080053a8 0xc build/stm32f7xx_hal_rcc.o + 0x080053a8 HAL_RCC_GetHCLKFreq .text.HAL_RCC_GetPCLK1Freq - 0x080053c8 0x20 build/stm32f7xx_hal_rcc.o - 0x080053c8 HAL_RCC_GetPCLK1Freq + 0x080053b4 0x20 build/stm32f7xx_hal_rcc.o + 0x080053b4 HAL_RCC_GetPCLK1Freq .text.HAL_RCC_GetPCLK2Freq - 0x080053e8 0x20 build/stm32f7xx_hal_rcc.o - 0x080053e8 HAL_RCC_GetPCLK2Freq + 0x080053d4 0x20 build/stm32f7xx_hal_rcc.o + 0x080053d4 HAL_RCC_GetPCLK2Freq .text.HAL_RCCEx_PeriphCLKConfig - 0x08005408 0x600 build/stm32f7xx_hal_rcc_ex.o - 0x08005408 HAL_RCCEx_PeriphCLKConfig + 0x080053f4 0x600 build/stm32f7xx_hal_rcc_ex.o + 0x080053f4 HAL_RCCEx_PeriphCLKConfig .text.HAL_GPIO_Init - 0x08005a08 0x204 build/stm32f7xx_hal_gpio.o - 0x08005a08 HAL_GPIO_Init + 0x080059f4 0x204 build/stm32f7xx_hal_gpio.o + 0x080059f4 HAL_GPIO_Init .text.HAL_GPIO_ReadPin - 0x08005c0c 0xe build/stm32f7xx_hal_gpio.o - 0x08005c0c HAL_GPIO_ReadPin + 0x08005bf8 0xe build/stm32f7xx_hal_gpio.o + 0x08005bf8 HAL_GPIO_ReadPin .text.HAL_GPIO_WritePin - 0x08005c1a 0xc build/stm32f7xx_hal_gpio.o - 0x08005c1a HAL_GPIO_WritePin + 0x08005c06 0xc build/stm32f7xx_hal_gpio.o + 0x08005c06 HAL_GPIO_WritePin .text.HAL_GPIO_TogglePin - 0x08005c26 0x12 build/stm32f7xx_hal_gpio.o - 0x08005c26 HAL_GPIO_TogglePin + 0x08005c12 0x12 build/stm32f7xx_hal_gpio.o + 0x08005c12 HAL_GPIO_TogglePin .text.HAL_PWREx_EnableOverDrive - 0x08005c38 0x7c build/stm32f7xx_hal_pwr_ex.o - 0x08005c38 HAL_PWREx_EnableOverDrive + 0x08005c24 0x7c build/stm32f7xx_hal_pwr_ex.o + 0x08005c24 HAL_PWREx_EnableOverDrive .text.__NVIC_SetPriority - 0x08005cb4 0x24 build/stm32f7xx_hal_cortex.o + 0x08005ca0 0x24 build/stm32f7xx_hal_cortex.o .text.NVIC_EncodePriority - 0x08005cd8 0x3e build/stm32f7xx_hal_cortex.o - *fill* 0x08005d16 0x2 + 0x08005cc4 0x3e build/stm32f7xx_hal_cortex.o + *fill* 0x08005d02 0x2 .text.HAL_NVIC_SetPriorityGrouping - 0x08005d18 0x24 build/stm32f7xx_hal_cortex.o - 0x08005d18 HAL_NVIC_SetPriorityGrouping + 0x08005d04 0x24 build/stm32f7xx_hal_cortex.o + 0x08005d04 HAL_NVIC_SetPriorityGrouping .text.HAL_NVIC_SetPriority - 0x08005d3c 0x20 build/stm32f7xx_hal_cortex.o - 0x08005d3c HAL_NVIC_SetPriority + 0x08005d28 0x20 build/stm32f7xx_hal_cortex.o + 0x08005d28 HAL_NVIC_SetPriority .text.HAL_NVIC_EnableIRQ - 0x08005d5c 0x1c build/stm32f7xx_hal_cortex.o - 0x08005d5c HAL_NVIC_EnableIRQ + 0x08005d48 0x1c build/stm32f7xx_hal_cortex.o + 0x08005d48 HAL_NVIC_EnableIRQ .text.HAL_SYSTICK_Config - 0x08005d78 0x28 build/stm32f7xx_hal_cortex.o - 0x08005d78 HAL_SYSTICK_Config + 0x08005d64 0x28 build/stm32f7xx_hal_cortex.o + 0x08005d64 HAL_SYSTICK_Config .text.HAL_InitTick - 0x08005da0 0x4c build/stm32f7xx_hal.o - 0x08005da0 HAL_InitTick + 0x08005d8c 0x4c build/stm32f7xx_hal.o + 0x08005d8c HAL_InitTick .text.HAL_Init - 0x08005dec 0x16 build/stm32f7xx_hal.o - 0x08005dec HAL_Init - *fill* 0x08005e02 0x2 + 0x08005dd8 0x16 build/stm32f7xx_hal.o + 0x08005dd8 HAL_Init + *fill* 0x08005dee 0x2 .text.HAL_IncTick - 0x08005e04 0x18 build/stm32f7xx_hal.o - 0x08005e04 HAL_IncTick + 0x08005df0 0x18 build/stm32f7xx_hal.o + 0x08005df0 HAL_IncTick .text.HAL_GetTick - 0x08005e1c 0xc build/stm32f7xx_hal.o - 0x08005e1c HAL_GetTick + 0x08005e08 0xc build/stm32f7xx_hal.o + 0x08005e08 HAL_GetTick .text.HAL_Delay - 0x08005e28 0x28 build/stm32f7xx_hal.o - 0x08005e28 HAL_Delay + 0x08005e14 0x28 build/stm32f7xx_hal.o + 0x08005e14 HAL_Delay .text.RCC_GetHCLKClockFreq - 0x08005e50 0x18 build/stm32f7xx_ll_rcc.o - 0x08005e50 RCC_GetHCLKClockFreq + 0x08005e3c 0x18 build/stm32f7xx_ll_rcc.o + 0x08005e3c RCC_GetHCLKClockFreq .text.RCC_GetPCLK1ClockFreq - 0x08005e68 0x18 build/stm32f7xx_ll_rcc.o - 0x08005e68 RCC_GetPCLK1ClockFreq + 0x08005e54 0x18 build/stm32f7xx_ll_rcc.o + 0x08005e54 RCC_GetPCLK1ClockFreq .text.RCC_GetPCLK2ClockFreq - 0x08005e80 0x18 build/stm32f7xx_ll_rcc.o - 0x08005e80 RCC_GetPCLK2ClockFreq + 0x08005e6c 0x18 build/stm32f7xx_ll_rcc.o + 0x08005e6c RCC_GetPCLK2ClockFreq .text.RCC_PLL_GetFreqDomain_SYS - 0x08005e98 0x44 build/stm32f7xx_ll_rcc.o - 0x08005e98 RCC_PLL_GetFreqDomain_SYS + 0x08005e84 0x44 build/stm32f7xx_ll_rcc.o + 0x08005e84 RCC_PLL_GetFreqDomain_SYS .text.RCC_GetSystemClockFreq - 0x08005edc 0x2c build/stm32f7xx_ll_rcc.o - 0x08005edc RCC_GetSystemClockFreq + 0x08005ec8 0x2c build/stm32f7xx_ll_rcc.o + 0x08005ec8 RCC_GetSystemClockFreq .text.LL_RCC_GetUSARTClockFreq - 0x08005f08 0x178 build/stm32f7xx_ll_rcc.o - 0x08005f08 LL_RCC_GetUSARTClockFreq + 0x08005ef4 0x178 build/stm32f7xx_ll_rcc.o + 0x08005ef4 LL_RCC_GetUSARTClockFreq .text.LL_RCC_GetUARTClockFreq - 0x08006080 0x180 build/stm32f7xx_ll_rcc.o - 0x08006080 LL_RCC_GetUARTClockFreq + 0x0800606c 0x180 build/stm32f7xx_ll_rcc.o + 0x0800606c LL_RCC_GetUARTClockFreq .text.LL_GPIO_SetPinSpeed - 0x08006200 0x30 build/stm32f7xx_ll_gpio.o + 0x080061ec 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinPull - 0x08006230 0x30 build/stm32f7xx_ll_gpio.o + 0x0800621c 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_0_7 - 0x08006260 0x30 build/stm32f7xx_ll_gpio.o + 0x0800624c 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetAFPin_8_15 - 0x08006290 0x32 build/stm32f7xx_ll_gpio.o + 0x0800627c 0x32 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_SetPinMode - 0x080062c2 0x30 build/stm32f7xx_ll_gpio.o + 0x080062ae 0x30 build/stm32f7xx_ll_gpio.o .text.LL_GPIO_Init - 0x080062f2 0x8a build/stm32f7xx_ll_gpio.o - 0x080062f2 LL_GPIO_Init + 0x080062de 0x8a build/stm32f7xx_ll_gpio.o + 0x080062de LL_GPIO_Init .text.SDMMC_GetCmdError - 0x0800637c 0x38 build/stm32f7xx_ll_sdmmc.o + 0x08006368 0x38 build/stm32f7xx_ll_sdmmc.o .text.SDMMC_Init - 0x080063b4 0x34 build/stm32f7xx_ll_sdmmc.o - 0x080063b4 SDMMC_Init + 0x080063a0 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080063a0 SDMMC_Init .text.SDMMC_ReadFIFO - 0x080063e8 0x6 build/stm32f7xx_ll_sdmmc.o - 0x080063e8 SDMMC_ReadFIFO + 0x080063d4 0x6 build/stm32f7xx_ll_sdmmc.o + 0x080063d4 SDMMC_ReadFIFO .text.SDMMC_WriteFIFO - 0x080063ee 0xa build/stm32f7xx_ll_sdmmc.o - 0x080063ee SDMMC_WriteFIFO + 0x080063da 0xa build/stm32f7xx_ll_sdmmc.o + 0x080063da SDMMC_WriteFIFO .text.SDMMC_PowerState_ON - 0x080063f8 0x8 build/stm32f7xx_ll_sdmmc.o - 0x080063f8 SDMMC_PowerState_ON + 0x080063e4 0x8 build/stm32f7xx_ll_sdmmc.o + 0x080063e4 SDMMC_PowerState_ON .text.SDMMC_GetPowerState - 0x08006400 0x8 build/stm32f7xx_ll_sdmmc.o - 0x08006400 SDMMC_GetPowerState + 0x080063ec 0x8 build/stm32f7xx_ll_sdmmc.o + 0x080063ec SDMMC_GetPowerState .text.SDMMC_SendCommand - 0x08006408 0x20 build/stm32f7xx_ll_sdmmc.o - 0x08006408 SDMMC_SendCommand + 0x080063f4 0x20 build/stm32f7xx_ll_sdmmc.o + 0x080063f4 SDMMC_SendCommand .text.SDMMC_GetCommandResponse - 0x08006428 0x6 build/stm32f7xx_ll_sdmmc.o - 0x08006428 SDMMC_GetCommandResponse + 0x08006414 0x6 build/stm32f7xx_ll_sdmmc.o + 0x08006414 SDMMC_GetCommandResponse .text.SDMMC_GetResponse - 0x0800642e 0x6 build/stm32f7xx_ll_sdmmc.o - 0x0800642e SDMMC_GetResponse + 0x0800641a 0x6 build/stm32f7xx_ll_sdmmc.o + 0x0800641a SDMMC_GetResponse .text.SDMMC_ConfigData - 0x08006434 0x24 build/stm32f7xx_ll_sdmmc.o - 0x08006434 SDMMC_ConfigData + 0x08006420 0x24 build/stm32f7xx_ll_sdmmc.o + 0x08006420 SDMMC_ConfigData .text.SDMMC_CmdGoIdleState - 0x08006458 0x26 build/stm32f7xx_ll_sdmmc.o - 0x08006458 SDMMC_CmdGoIdleState - *fill* 0x0800647e 0x2 + 0x08006444 0x26 build/stm32f7xx_ll_sdmmc.o + 0x08006444 SDMMC_CmdGoIdleState + *fill* 0x0800646a 0x2 .text.SDMMC_GetCmdResp1 - 0x08006480 0x154 build/stm32f7xx_ll_sdmmc.o - 0x08006480 SDMMC_GetCmdResp1 + 0x0800646c 0x154 build/stm32f7xx_ll_sdmmc.o + 0x0800646c SDMMC_GetCmdResp1 .text.SDMMC_CmdBlockLength - 0x080065d4 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080065d4 SDMMC_CmdBlockLength + 0x080065c0 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080065c0 SDMMC_CmdBlockLength .text.SDMMC_CmdReadSingleBlock - 0x08006604 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006604 SDMMC_CmdReadSingleBlock + 0x080065f0 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080065f0 SDMMC_CmdReadSingleBlock .text.SDMMC_CmdReadMultiBlock - 0x08006634 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006634 SDMMC_CmdReadMultiBlock + 0x08006620 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006620 SDMMC_CmdReadMultiBlock .text.SDMMC_CmdWriteSingleBlock - 0x08006664 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006664 SDMMC_CmdWriteSingleBlock + 0x08006650 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006650 SDMMC_CmdWriteSingleBlock .text.SDMMC_CmdWriteMultiBlock - 0x08006694 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006694 SDMMC_CmdWriteMultiBlock + 0x08006680 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006680 SDMMC_CmdWriteMultiBlock .text.SDMMC_CmdStopTransfer - 0x080066c4 0x34 build/stm32f7xx_ll_sdmmc.o - 0x080066c4 SDMMC_CmdStopTransfer + 0x080066b0 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080066b0 SDMMC_CmdStopTransfer .text.SDMMC_CmdSelDesel - 0x080066f8 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080066f8 SDMMC_CmdSelDesel + 0x080066e4 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080066e4 SDMMC_CmdSelDesel .text.SDMMC_CmdAppCommand - 0x08006728 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006728 SDMMC_CmdAppCommand + 0x08006714 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006714 SDMMC_CmdAppCommand .text.SDMMC_CmdBusWidth - 0x08006758 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006758 SDMMC_CmdBusWidth + 0x08006744 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006744 SDMMC_CmdBusWidth .text.SDMMC_CmdSendSCR - 0x08006788 0x30 build/stm32f7xx_ll_sdmmc.o - 0x08006788 SDMMC_CmdSendSCR + 0x08006774 0x30 build/stm32f7xx_ll_sdmmc.o + 0x08006774 SDMMC_CmdSendSCR .text.SDMMC_CmdSendStatus - 0x080067b8 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080067b8 SDMMC_CmdSendStatus + 0x080067a4 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080067a4 SDMMC_CmdSendStatus .text.SDMMC_GetCmdResp2 - 0x080067e8 0x5c build/stm32f7xx_ll_sdmmc.o - 0x080067e8 SDMMC_GetCmdResp2 + 0x080067d4 0x5c build/stm32f7xx_ll_sdmmc.o + 0x080067d4 SDMMC_GetCmdResp2 .text.SDMMC_CmdSendCID - 0x08006844 0x2a build/stm32f7xx_ll_sdmmc.o - 0x08006844 SDMMC_CmdSendCID + 0x08006830 0x2a build/stm32f7xx_ll_sdmmc.o + 0x08006830 SDMMC_CmdSendCID .text.SDMMC_CmdSendCSD - 0x0800686e 0x2a build/stm32f7xx_ll_sdmmc.o - 0x0800686e SDMMC_CmdSendCSD + 0x0800685a 0x2a build/stm32f7xx_ll_sdmmc.o + 0x0800685a SDMMC_CmdSendCSD .text.SDMMC_GetCmdResp3 - 0x08006898 0x4c build/stm32f7xx_ll_sdmmc.o - 0x08006898 SDMMC_GetCmdResp3 + 0x08006884 0x4c build/stm32f7xx_ll_sdmmc.o + 0x08006884 SDMMC_GetCmdResp3 .text.SDMMC_CmdAppOperCommand - 0x080068e4 0x34 build/stm32f7xx_ll_sdmmc.o - 0x080068e4 SDMMC_CmdAppOperCommand + 0x080068d0 0x34 build/stm32f7xx_ll_sdmmc.o + 0x080068d0 SDMMC_CmdAppOperCommand .text.SDMMC_GetCmdResp6 - 0x08006918 0xa0 build/stm32f7xx_ll_sdmmc.o - 0x08006918 SDMMC_GetCmdResp6 + 0x08006904 0xa0 build/stm32f7xx_ll_sdmmc.o + 0x08006904 SDMMC_GetCmdResp6 .text.SDMMC_CmdSetRelAdd - 0x080069b8 0x30 build/stm32f7xx_ll_sdmmc.o - 0x080069b8 SDMMC_CmdSetRelAdd + 0x080069a4 0x30 build/stm32f7xx_ll_sdmmc.o + 0x080069a4 SDMMC_CmdSetRelAdd .text.SDMMC_GetCmdResp7 - 0x080069e8 0x64 build/stm32f7xx_ll_sdmmc.o - 0x080069e8 SDMMC_GetCmdResp7 + 0x080069d4 0x64 build/stm32f7xx_ll_sdmmc.o + 0x080069d4 SDMMC_GetCmdResp7 .text.SDMMC_CmdOperCond - 0x08006a4c 0x2e build/stm32f7xx_ll_sdmmc.o - 0x08006a4c SDMMC_CmdOperCond - *fill* 0x08006a7a 0x2 + 0x08006a38 0x2e build/stm32f7xx_ll_sdmmc.o + 0x08006a38 SDMMC_CmdOperCond + *fill* 0x08006a66 0x2 .text.SD_PowerON - 0x08006a7c 0xc0 build/stm32f7xx_hal_sd.o + 0x08006a68 0xc0 build/stm32f7xx_hal_sd.o .text.SD_FindSCR - 0x08006b3c 0x100 build/stm32f7xx_hal_sd.o + 0x08006b28 0x100 build/stm32f7xx_hal_sd.o .text.SD_WideBus_Enable - 0x08006c3c 0x4e build/stm32f7xx_hal_sd.o + 0x08006c28 0x4e build/stm32f7xx_hal_sd.o .text.SD_WideBus_Disable - 0x08006c8a 0x4e build/stm32f7xx_hal_sd.o + 0x08006c76 0x4e build/stm32f7xx_hal_sd.o .text.SD_SendStatus - 0x08006cd8 0x2c build/stm32f7xx_hal_sd.o + 0x08006cc4 0x2c build/stm32f7xx_hal_sd.o .text.HAL_SD_ReadBlocks - 0x08006d04 0x248 build/stm32f7xx_hal_sd.o - 0x08006d04 HAL_SD_ReadBlocks + 0x08006cf0 0x248 build/stm32f7xx_hal_sd.o + 0x08006cf0 HAL_SD_ReadBlocks .text.HAL_SD_WriteBlocks - 0x08006f4c 0x200 build/stm32f7xx_hal_sd.o - 0x08006f4c HAL_SD_WriteBlocks + 0x08006f38 0x200 build/stm32f7xx_hal_sd.o + 0x08006f38 HAL_SD_WriteBlocks .text.HAL_SD_GetCardCSD - 0x0800714c 0x1b8 build/stm32f7xx_hal_sd.o - 0x0800714c HAL_SD_GetCardCSD + 0x08007138 0x1b8 build/stm32f7xx_hal_sd.o + 0x08007138 HAL_SD_GetCardCSD .text.SD_InitCard - 0x08007304 0x100 build/stm32f7xx_hal_sd.o + 0x080072f0 0x100 build/stm32f7xx_hal_sd.o .text.HAL_SD_InitCard - 0x08007404 0xa8 build/stm32f7xx_hal_sd.o - 0x08007404 HAL_SD_InitCard + 0x080073f0 0xa8 build/stm32f7xx_hal_sd.o + 0x080073f0 HAL_SD_InitCard .text.HAL_SD_Init - 0x080074ac 0x36 build/stm32f7xx_hal_sd.o - 0x080074ac HAL_SD_Init + 0x08007498 0x36 build/stm32f7xx_hal_sd.o + 0x08007498 HAL_SD_Init .text.HAL_SD_GetCardInfo - 0x080074e2 0x24 build/stm32f7xx_hal_sd.o - 0x080074e2 HAL_SD_GetCardInfo - *fill* 0x08007506 0x2 + 0x080074ce 0x24 build/stm32f7xx_hal_sd.o + 0x080074ce HAL_SD_GetCardInfo + *fill* 0x080074f2 0x2 .text.HAL_SD_ConfigWideBusOperation - 0x08007508 0xc0 build/stm32f7xx_hal_sd.o - 0x08007508 HAL_SD_ConfigWideBusOperation + 0x080074f4 0xc0 build/stm32f7xx_hal_sd.o + 0x080074f4 HAL_SD_ConfigWideBusOperation .text.HAL_SD_GetCardState - 0x080075c8 0x22 build/stm32f7xx_hal_sd.o - 0x080075c8 HAL_SD_GetCardState - *fill* 0x080075ea 0x2 + 0x080075b4 0x22 build/stm32f7xx_hal_sd.o + 0x080075b4 HAL_SD_GetCardState + *fill* 0x080075d6 0x2 .text.LL_SPI_Init - 0x080075ec 0x8c build/stm32f7xx_ll_spi.o - 0x080075ec LL_SPI_Init + 0x080075d8 0x8c build/stm32f7xx_ll_spi.o + 0x080075d8 LL_SPI_Init .text.TIM_OC1_SetConfig - 0x08007678 0x68 build/stm32f7xx_hal_tim.o + 0x08007664 0x68 build/stm32f7xx_hal_tim.o .text.TIM_OC3_SetConfig - 0x080076e0 0x70 build/stm32f7xx_hal_tim.o + 0x080076cc 0x70 build/stm32f7xx_hal_tim.o .text.TIM_OC4_SetConfig - 0x08007750 0x54 build/stm32f7xx_hal_tim.o + 0x0800773c 0x54 build/stm32f7xx_hal_tim.o .text.TIM_OC5_SetConfig - 0x080077a4 0x54 build/stm32f7xx_hal_tim.o + 0x08007790 0x54 build/stm32f7xx_hal_tim.o .text.TIM_OC6_SetConfig - 0x080077f8 0x54 build/stm32f7xx_hal_tim.o + 0x080077e4 0x54 build/stm32f7xx_hal_tim.o .text.TIM_TI1_ConfigInputStage - 0x0800784c 0x26 build/stm32f7xx_hal_tim.o + 0x08007838 0x26 build/stm32f7xx_hal_tim.o .text.TIM_TI2_ConfigInputStage - 0x08007872 0x28 build/stm32f7xx_hal_tim.o + 0x0800785e 0x28 build/stm32f7xx_hal_tim.o .text.TIM_ITRx_SetConfig - 0x0800789a 0x10 build/stm32f7xx_hal_tim.o + 0x08007886 0x10 build/stm32f7xx_hal_tim.o .text.HAL_TIM_Base_Stop - 0x080078aa 0x28 build/stm32f7xx_hal_tim.o - 0x080078aa HAL_TIM_Base_Stop - *fill* 0x080078d2 0x2 + 0x08007896 0x28 build/stm32f7xx_hal_tim.o + 0x08007896 HAL_TIM_Base_Stop + *fill* 0x080078be 0x2 .text.HAL_TIM_Base_Start_IT - 0x080078d4 0x90 build/stm32f7xx_hal_tim.o - 0x080078d4 HAL_TIM_Base_Start_IT + 0x080078c0 0x90 build/stm32f7xx_hal_tim.o + 0x080078c0 HAL_TIM_Base_Start_IT .text.HAL_TIM_Base_Stop_IT - 0x08007964 0x32 build/stm32f7xx_hal_tim.o - 0x08007964 HAL_TIM_Base_Stop_IT + 0x08007950 0x32 build/stm32f7xx_hal_tim.o + 0x08007950 HAL_TIM_Base_Stop_IT .text.HAL_TIM_PWM_MspInit - 0x08007996 0x2 build/stm32f7xx_hal_tim.o - 0x08007996 HAL_TIM_PWM_MspInit + 0x08007982 0x2 build/stm32f7xx_hal_tim.o + 0x08007982 HAL_TIM_PWM_MspInit .text.HAL_TIM_PeriodElapsedCallback - 0x08007998 0x2 build/stm32f7xx_hal_tim.o - 0x08007998 HAL_TIM_PeriodElapsedCallback + 0x08007984 0x2 build/stm32f7xx_hal_tim.o + 0x08007984 HAL_TIM_PeriodElapsedCallback .text.HAL_TIM_OC_DelayElapsedCallback - 0x0800799a 0x2 build/stm32f7xx_hal_tim.o - 0x0800799a HAL_TIM_OC_DelayElapsedCallback + 0x08007986 0x2 build/stm32f7xx_hal_tim.o + 0x08007986 HAL_TIM_OC_DelayElapsedCallback .text.HAL_TIM_IC_CaptureCallback - 0x0800799c 0x2 build/stm32f7xx_hal_tim.o - 0x0800799c HAL_TIM_IC_CaptureCallback + 0x08007988 0x2 build/stm32f7xx_hal_tim.o + 0x08007988 HAL_TIM_IC_CaptureCallback .text.HAL_TIM_PWM_PulseFinishedCallback - 0x0800799e 0x2 build/stm32f7xx_hal_tim.o - 0x0800799e HAL_TIM_PWM_PulseFinishedCallback + 0x0800798a 0x2 build/stm32f7xx_hal_tim.o + 0x0800798a HAL_TIM_PWM_PulseFinishedCallback .text.HAL_TIM_TriggerCallback - 0x080079a0 0x2 build/stm32f7xx_hal_tim.o - 0x080079a0 HAL_TIM_TriggerCallback + 0x0800798c 0x2 build/stm32f7xx_hal_tim.o + 0x0800798c HAL_TIM_TriggerCallback .text.HAL_TIM_IRQHandler - 0x080079a2 0x17a build/stm32f7xx_hal_tim.o - 0x080079a2 HAL_TIM_IRQHandler + 0x0800798e 0x17a build/stm32f7xx_hal_tim.o + 0x0800798e HAL_TIM_IRQHandler .text.TIM_Base_SetConfig - 0x08007b1c 0x120 build/stm32f7xx_hal_tim.o - 0x08007b1c TIM_Base_SetConfig + 0x08007b08 0x120 build/stm32f7xx_hal_tim.o + 0x08007b08 TIM_Base_SetConfig .text.HAL_TIM_Base_Init - 0x08007c3c 0x60 build/stm32f7xx_hal_tim.o - 0x08007c3c HAL_TIM_Base_Init + 0x08007c28 0x60 build/stm32f7xx_hal_tim.o + 0x08007c28 HAL_TIM_Base_Init .text.HAL_TIM_PWM_Init - 0x08007c9c 0x60 build/stm32f7xx_hal_tim.o - 0x08007c9c HAL_TIM_PWM_Init + 0x08007c88 0x60 build/stm32f7xx_hal_tim.o + 0x08007c88 HAL_TIM_PWM_Init .text.TIM_OC2_SetConfig - 0x08007cfc 0x70 build/stm32f7xx_hal_tim.o - 0x08007cfc TIM_OC2_SetConfig + 0x08007ce8 0x70 build/stm32f7xx_hal_tim.o + 0x08007ce8 TIM_OC2_SetConfig .text.HAL_TIM_PWM_ConfigChannel - 0x08007d6c 0x13a build/stm32f7xx_hal_tim.o - 0x08007d6c HAL_TIM_PWM_ConfigChannel + 0x08007d58 0x13a build/stm32f7xx_hal_tim.o + 0x08007d58 HAL_TIM_PWM_ConfigChannel .text.TIM_ETR_SetConfig - 0x08007ea6 0x1a build/stm32f7xx_hal_tim.o - 0x08007ea6 TIM_ETR_SetConfig + 0x08007e92 0x1a build/stm32f7xx_hal_tim.o + 0x08007e92 TIM_ETR_SetConfig .text.HAL_TIM_ConfigClockSource - 0x08007ec0 0x100 build/stm32f7xx_hal_tim.o - 0x08007ec0 HAL_TIM_ConfigClockSource + 0x08007eac 0x100 build/stm32f7xx_hal_tim.o + 0x08007eac HAL_TIM_ConfigClockSource .text.TIM_CCxChannelCmd - 0x08007fc0 0x1e build/stm32f7xx_hal_tim.o - 0x08007fc0 TIM_CCxChannelCmd - *fill* 0x08007fde 0x2 + 0x08007fac 0x1e build/stm32f7xx_hal_tim.o + 0x08007fac TIM_CCxChannelCmd + *fill* 0x08007fca 0x2 .text.HAL_TIM_PWM_Start - 0x08007fe0 0x158 build/stm32f7xx_hal_tim.o - 0x08007fe0 HAL_TIM_PWM_Start + 0x08007fcc 0x158 build/stm32f7xx_hal_tim.o + 0x08007fcc HAL_TIM_PWM_Start .text.HAL_TIM_PWM_Stop - 0x08008138 0xac build/stm32f7xx_hal_tim.o - 0x08008138 HAL_TIM_PWM_Stop + 0x08008124 0xac build/stm32f7xx_hal_tim.o + 0x08008124 HAL_TIM_PWM_Stop .text.HAL_TIMEx_MasterConfigSynchronization - 0x080081e4 0xa0 build/stm32f7xx_hal_tim_ex.o - 0x080081e4 HAL_TIMEx_MasterConfigSynchronization + 0x080081d0 0xa0 build/stm32f7xx_hal_tim_ex.o + 0x080081d0 HAL_TIMEx_MasterConfigSynchronization .text.HAL_TIMEx_CommutCallback - 0x08008284 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008284 HAL_TIMEx_CommutCallback + 0x08008270 0x2 build/stm32f7xx_hal_tim_ex.o + 0x08008270 HAL_TIMEx_CommutCallback .text.HAL_TIMEx_BreakCallback - 0x08008286 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008286 HAL_TIMEx_BreakCallback + 0x08008272 0x2 build/stm32f7xx_hal_tim_ex.o + 0x08008272 HAL_TIMEx_BreakCallback .text.HAL_TIMEx_Break2Callback - 0x08008288 0x2 build/stm32f7xx_hal_tim_ex.o - 0x08008288 HAL_TIMEx_Break2Callback - *fill* 0x0800828a 0x2 + 0x08008274 0x2 build/stm32f7xx_hal_tim_ex.o + 0x08008274 HAL_TIMEx_Break2Callback + *fill* 0x08008276 0x2 .text.LL_TIM_Init - 0x0800828c 0x110 build/stm32f7xx_ll_tim.o - 0x0800828c LL_TIM_Init + 0x08008278 0x110 build/stm32f7xx_ll_tim.o + 0x08008278 LL_TIM_Init .text.LL_USART_SetBaudRate - 0x0800839c 0x2e build/stm32f7xx_ll_usart.o - *fill* 0x080083ca 0x2 + 0x08008388 0x2e build/stm32f7xx_ll_usart.o + *fill* 0x080083b6 0x2 .text.LL_USART_Init - 0x080083cc 0xfc build/stm32f7xx_ll_usart.o - 0x080083cc LL_USART_Init + 0x080083b8 0xfc build/stm32f7xx_ll_usart.o + 0x080083b8 LL_USART_Init .text.SystemInit - 0x080084c8 0x14 build/system_stm32f7xx.o - 0x080084c8 SystemInit + 0x080084b4 0x14 build/system_stm32f7xx.o + 0x080084b4 SystemInit .text.Mount_SD - 0x080084dc 0x24 build/File_Handling.o - 0x080084dc Mount_SD + 0x080084c8 0x24 build/File_Handling.o + 0x080084c8 Mount_SD .text.Unmount_SD - 0x08008500 0x20 build/File_Handling.o - 0x08008500 Unmount_SD + 0x080084ec 0x20 build/File_Handling.o + 0x080084ec Unmount_SD .text.Write_File_byte - 0x08008520 0x5c build/File_Handling.o - 0x08008520 Write_File_byte + 0x0800850c 0x5c build/File_Handling.o + 0x0800850c Write_File_byte .text.Seek_Read_File - 0x0800857c 0x148 build/File_Handling.o - 0x0800857c Seek_Read_File + 0x08008568 0x148 build/File_Handling.o + 0x08008568 Seek_Read_File .text.Create_File - 0x080086c4 0x44 build/File_Handling.o - 0x080086c4 Create_File + 0x080086b0 0x44 build/File_Handling.o + 0x080086b0 Create_File .text.Remove_File - 0x08008708 0x84 build/File_Handling.o - 0x08008708 Remove_File + 0x080086f4 0x84 build/File_Handling.o + 0x080086f4 Remove_File .text.Update_File_byte - 0x0800878c 0x5c build/File_Handling.o - 0x0800878c Update_File_byte + 0x08008778 0x5c build/File_Handling.o + 0x08008778 Update_File_byte .text.disk_status - 0x080087e8 0x18 build/diskio.o - 0x080087e8 disk_status + 0x080087d4 0x18 build/diskio.o + 0x080087d4 disk_status .text.disk_initialize - 0x08008800 0x28 build/diskio.o - 0x08008800 disk_initialize + 0x080087ec 0x28 build/diskio.o + 0x080087ec disk_initialize .text.disk_read - 0x08008828 0x18 build/diskio.o - 0x08008828 disk_read + 0x08008814 0x18 build/diskio.o + 0x08008814 disk_read .text.disk_write - 0x08008840 0x18 build/diskio.o - 0x08008840 disk_write + 0x0800882c 0x18 build/diskio.o + 0x0800882c disk_write .text.disk_ioctl - 0x08008858 0x18 build/diskio.o - 0x08008858 disk_ioctl - .text.ld_word 0x08008870 0xa build/ff.o + 0x08008844 0x18 build/diskio.o + 0x08008844 disk_ioctl + .text.ld_word 0x0800885c 0xa build/ff.o .text.ld_dword - 0x0800887a 0x16 build/ff.o - .text.st_word 0x08008890 0x8 build/ff.o + 0x08008866 0x16 build/ff.o + .text.st_word 0x0800887c 0x8 build/ff.o .text.st_dword - 0x08008898 0x14 build/ff.o - .text.mem_cpy 0x080088ac 0x14 build/ff.o - .text.mem_set 0x080088c0 0xa build/ff.o - .text.mem_cmp 0x080088ca 0x1a build/ff.o - .text.chk_chr 0x080088e4 0x10 build/ff.o + 0x08008884 0x14 build/ff.o + .text.mem_cpy 0x08008898 0x14 build/ff.o + .text.mem_set 0x080088ac 0xa build/ff.o + .text.mem_cmp 0x080088b6 0x1a build/ff.o + .text.chk_chr 0x080088d0 0x10 build/ff.o .text.chk_lock - 0x080088f4 0x7c build/ff.o + 0x080088e0 0x7c build/ff.o .text.enq_lock - 0x08008970 0x20 build/ff.o + 0x0800895c 0x20 build/ff.o .text.inc_lock - 0x08008990 0xa0 build/ff.o + 0x0800897c 0xa0 build/ff.o .text.dec_lock - 0x08008a30 0x40 build/ff.o + 0x08008a1c 0x40 build/ff.o .text.clear_lock - 0x08008a70 0x3c build/ff.o + 0x08008a5c 0x3c build/ff.o .text.clust2sect - 0x08008aac 0x18 build/ff.o + 0x08008a98 0x18 build/ff.o .text.clmt_clust - 0x08008ac4 0x26 build/ff.o + 0x08008ab0 0x26 build/ff.o .text.ld_clust - 0x08008aea 0x26 build/ff.o + 0x08008ad6 0x26 build/ff.o .text.st_clust - 0x08008b10 0x26 build/ff.o + 0x08008afc 0x26 build/ff.o .text.get_fileinfo - 0x08008b36 0x6a build/ff.o + 0x08008b22 0x6a build/ff.o .text.create_name - 0x08008ba0 0xd0 build/ff.o + 0x08008b8c 0xd0 build/ff.o .text.get_ldnumber - 0x08008c70 0x48 build/ff.o + 0x08008c5c 0x48 build/ff.o .text.validate - 0x08008cb8 0x46 build/ff.o + 0x08008ca4 0x46 build/ff.o .text.sync_window - 0x08008cfe 0x54 build/ff.o + 0x08008cea 0x54 build/ff.o .text.move_window - 0x08008d52 0x36 build/ff.o + 0x08008d3e 0x36 build/ff.o .text.check_fs - 0x08008d88 0x78 build/ff.o + 0x08008d74 0x78 build/ff.o .text.find_volume - 0x08008e00 0x34c build/ff.o - .text.put_fat 0x0800914c 0x136 build/ff.o - .text.get_fat 0x08009282 0xfc build/ff.o - .text.dir_sdi 0x0800937e 0xc0 build/ff.o + 0x08008dec 0x34c build/ff.o + .text.put_fat 0x08009138 0x136 build/ff.o + .text.get_fat 0x0800926e 0xfc build/ff.o + .text.dir_sdi 0x0800936a 0xc0 build/ff.o .text.create_chain - 0x0800943e 0xd6 build/ff.o + 0x0800942a 0xd6 build/ff.o .text.remove_chain - 0x08009514 0x7e build/ff.o + 0x08009500 0x7e build/ff.o .text.dir_remove - 0x08009592 0x1c build/ff.o + 0x0800957e 0x1c build/ff.o .text.dir_next - 0x080095ae 0x118 build/ff.o + 0x0800959a 0x118 build/ff.o .text.dir_find - 0x080096c6 0x5a build/ff.o + 0x080096b2 0x5a build/ff.o .text.follow_path - 0x08009720 0x92 build/ff.o + 0x0800970c 0x92 build/ff.o .text.dir_alloc - 0x080097b2 0x4e build/ff.o + 0x0800979e 0x4e build/ff.o .text.dir_register - 0x08009800 0x3e build/ff.o + 0x080097ec 0x3e build/ff.o .text.dir_read - 0x0800983e 0x5e build/ff.o - .text.sync_fs 0x0800989c 0x88 build/ff.o - .text.f_mount 0x08009924 0x60 build/ff.o - 0x08009924 f_mount - .text.f_open 0x08009984 0x232 build/ff.o - 0x08009984 f_open - .text.f_read 0x08009bb6 0x1d8 build/ff.o - 0x08009bb6 f_read - .text.f_write 0x08009d8e 0x210 build/ff.o - 0x08009d8e f_write - .text.f_sync 0x08009f9e 0x98 build/ff.o - 0x08009f9e f_sync - .text.f_close 0x0800a036 0x2a build/ff.o - 0x0800a036 f_close - .text.f_lseek 0x0800a060 0x2a6 build/ff.o - 0x0800a060 f_lseek - .text.f_stat 0x0800a306 0x44 build/ff.o - 0x0800a306 f_stat + 0x0800982a 0x5e build/ff.o + .text.sync_fs 0x08009888 0x88 build/ff.o + .text.f_mount 0x08009910 0x60 build/ff.o + 0x08009910 f_mount + .text.f_open 0x08009970 0x232 build/ff.o + 0x08009970 f_open + .text.f_read 0x08009ba2 0x1d8 build/ff.o + 0x08009ba2 f_read + .text.f_write 0x08009d7a 0x210 build/ff.o + 0x08009d7a f_write + .text.f_sync 0x08009f8a 0x98 build/ff.o + 0x08009f8a f_sync + .text.f_close 0x0800a022 0x2a build/ff.o + 0x0800a022 f_close + .text.f_lseek 0x0800a04c 0x2a6 build/ff.o + 0x0800a04c f_lseek + .text.f_stat 0x0800a2f2 0x44 build/ff.o + 0x0800a2f2 f_stat .text.f_unlink - 0x0800a34a 0xc4 build/ff.o - 0x0800a34a f_unlink - *fill* 0x0800a40e 0x2 + 0x0800a336 0xc4 build/ff.o + 0x0800a336 f_unlink + *fill* 0x0800a3fa 0x2 .text.FATFS_LinkDriverEx - 0x0800a410 0x54 build/ff_gen_drv.o - 0x0800a410 FATFS_LinkDriverEx + 0x0800a3fc 0x54 build/ff_gen_drv.o + 0x0800a3fc FATFS_LinkDriverEx .text.FATFS_LinkDriver - 0x0800a464 0xa build/ff_gen_drv.o - 0x0800a464 FATFS_LinkDriver - *fill* 0x0800a46e 0x2 - .text._sbrk 0x0800a470 0x48 build/sysmem.o - 0x0800a470 _sbrk + 0x0800a450 0xa build/ff_gen_drv.o + 0x0800a450 FATFS_LinkDriver + *fill* 0x0800a45a 0x2 + .text._sbrk 0x0800a45c 0x48 build/sysmem.o + 0x0800a45c _sbrk .text.UART_EndRxTransfer - 0x0800a4b8 0x52 build/stm32f7xx_hal_uart.o - *fill* 0x0800a50a 0x2 + 0x0800a4a4 0x52 build/stm32f7xx_hal_uart.o + *fill* 0x0800a4f6 0x2 .text.UART_SetConfig - 0x0800a50c 0x328 build/stm32f7xx_hal_uart.o - 0x0800a50c UART_SetConfig + 0x0800a4f8 0x328 build/stm32f7xx_hal_uart.o + 0x0800a4f8 UART_SetConfig .text.UART_AdvFeatureConfig - 0x0800a834 0xca build/stm32f7xx_hal_uart.o - 0x0800a834 UART_AdvFeatureConfig + 0x0800a820 0xca build/stm32f7xx_hal_uart.o + 0x0800a820 UART_AdvFeatureConfig .text.UART_WaitOnFlagUntilTimeout - 0x0800a8fe 0xa6 build/stm32f7xx_hal_uart.o - 0x0800a8fe UART_WaitOnFlagUntilTimeout + 0x0800a8ea 0xa6 build/stm32f7xx_hal_uart.o + 0x0800a8ea UART_WaitOnFlagUntilTimeout .text.UART_CheckIdleState - 0x0800a9a4 0xc6 build/stm32f7xx_hal_uart.o - 0x0800a9a4 UART_CheckIdleState + 0x0800a990 0xc6 build/stm32f7xx_hal_uart.o + 0x0800a990 UART_CheckIdleState .text.HAL_UART_Init - 0x0800aa6a 0x62 build/stm32f7xx_hal_uart.o - 0x0800aa6a HAL_UART_Init + 0x0800aa56 0x62 build/stm32f7xx_hal_uart.o + 0x0800aa56 HAL_UART_Init .text.Reset_Handler - 0x0800aacc 0x50 build/startup_stm32f767xx.o - 0x0800aacc Reset_Handler + 0x0800aab8 0x50 build/startup_stm32f767xx.o + 0x0800aab8 Reset_Handler .text.Default_Handler - 0x0800ab1c 0x2 build/startup_stm32f767xx.o - 0x0800ab1c RTC_Alarm_IRQHandler - 0x0800ab1c EXTI2_IRQHandler - 0x0800ab1c TIM8_CC_IRQHandler - 0x0800ab1c UART8_IRQHandler - 0x0800ab1c SPI4_IRQHandler - 0x0800ab1c TIM1_CC_IRQHandler - 0x0800ab1c DMA2_Stream5_IRQHandler - 0x0800ab1c JPEG_IRQHandler - 0x0800ab1c DMA1_Stream5_IRQHandler - 0x0800ab1c CAN3_RX1_IRQHandler - 0x0800ab1c PVD_IRQHandler - 0x0800ab1c TAMP_STAMP_IRQHandler - 0x0800ab1c CAN2_RX1_IRQHandler - 0x0800ab1c EXTI3_IRQHandler - 0x0800ab1c TIM8_TRG_COM_TIM14_IRQHandler - 0x0800ab1c DFSDM1_FLT1_IRQHandler - 0x0800ab1c I2C3_ER_IRQHandler - 0x0800ab1c DFSDM1_FLT2_IRQHandler - 0x0800ab1c EXTI0_IRQHandler - 0x0800ab1c I2C2_EV_IRQHandler - 0x0800ab1c DMA1_Stream2_IRQHandler - 0x0800ab1c CAN1_RX0_IRQHandler - 0x0800ab1c FPU_IRQHandler - 0x0800ab1c OTG_HS_WKUP_IRQHandler - 0x0800ab1c CAN3_SCE_IRQHandler - 0x0800ab1c LTDC_ER_IRQHandler - 0x0800ab1c CAN2_SCE_IRQHandler - 0x0800ab1c DMA2_Stream2_IRQHandler - 0x0800ab1c SPI1_IRQHandler - 0x0800ab1c TIM1_BRK_TIM9_IRQHandler - 0x0800ab1c DCMI_IRQHandler - 0x0800ab1c CAN2_RX0_IRQHandler - 0x0800ab1c DMA2_Stream3_IRQHandler - 0x0800ab1c SAI2_IRQHandler - 0x0800ab1c DFSDM1_FLT3_IRQHandler - 0x0800ab1c USART6_IRQHandler - 0x0800ab1c CAN3_RX0_IRQHandler - 0x0800ab1c USART3_IRQHandler - 0x0800ab1c CAN1_RX1_IRQHandler - 0x0800ab1c UART5_IRQHandler - 0x0800ab1c DMA2_Stream0_IRQHandler - 0x0800ab1c TIM4_IRQHandler - 0x0800ab1c QUADSPI_IRQHandler - 0x0800ab1c I2C1_EV_IRQHandler - 0x0800ab1c DMA1_Stream6_IRQHandler - 0x0800ab1c DMA1_Stream1_IRQHandler - 0x0800ab1c UART4_IRQHandler - 0x0800ab1c TIM3_IRQHandler - 0x0800ab1c RCC_IRQHandler - 0x0800ab1c TIM8_BRK_TIM12_IRQHandler - 0x0800ab1c Default_Handler - 0x0800ab1c CEC_IRQHandler - 0x0800ab1c EXTI15_10_IRQHandler - 0x0800ab1c DMA1_Stream7_IRQHandler - 0x0800ab1c SPI5_IRQHandler - 0x0800ab1c SDMMC1_IRQHandler - 0x0800ab1c CAN2_TX_IRQHandler - 0x0800ab1c I2C3_EV_IRQHandler - 0x0800ab1c EXTI9_5_IRQHandler - 0x0800ab1c RTC_WKUP_IRQHandler - 0x0800ab1c LTDC_IRQHandler - 0x0800ab1c ETH_WKUP_IRQHandler - 0x0800ab1c SPDIF_RX_IRQHandler - 0x0800ab1c SPI2_IRQHandler - 0x0800ab1c OTG_HS_EP1_IN_IRQHandler - 0x0800ab1c DMA1_Stream0_IRQHandler - 0x0800ab1c CAN1_TX_IRQHandler - 0x0800ab1c EXTI4_IRQHandler - 0x0800ab1c RNG_IRQHandler - 0x0800ab1c ETH_IRQHandler - 0x0800ab1c OTG_HS_EP1_OUT_IRQHandler - 0x0800ab1c WWDG_IRQHandler - 0x0800ab1c SPI6_IRQHandler - 0x0800ab1c MDIOS_IRQHandler - 0x0800ab1c I2C4_EV_IRQHandler - 0x0800ab1c CAN3_TX_IRQHandler - 0x0800ab1c OTG_FS_WKUP_IRQHandler - 0x0800ab1c OTG_HS_IRQHandler - 0x0800ab1c DMA2D_IRQHandler - 0x0800ab1c EXTI1_IRQHandler - 0x0800ab1c SDMMC2_IRQHandler - 0x0800ab1c UART7_IRQHandler - 0x0800ab1c USART2_IRQHandler - 0x0800ab1c DFSDM1_FLT0_IRQHandler - 0x0800ab1c I2C2_ER_IRQHandler - 0x0800ab1c DMA2_Stream1_IRQHandler - 0x0800ab1c CAN1_SCE_IRQHandler - 0x0800ab1c FLASH_IRQHandler - 0x0800ab1c DMA2_Stream4_IRQHandler - 0x0800ab1c OTG_FS_IRQHandler - 0x0800ab1c SPI3_IRQHandler - 0x0800ab1c DMA1_Stream4_IRQHandler - 0x0800ab1c I2C1_ER_IRQHandler - 0x0800ab1c FMC_IRQHandler - 0x0800ab1c LPTIM1_IRQHandler - 0x0800ab1c I2C4_ER_IRQHandler - 0x0800ab1c DMA2_Stream6_IRQHandler - 0x0800ab1c SAI1_IRQHandler - 0x0800ab1c DMA1_Stream3_IRQHandler + 0x0800ab08 0x2 build/startup_stm32f767xx.o + 0x0800ab08 RTC_Alarm_IRQHandler + 0x0800ab08 EXTI2_IRQHandler + 0x0800ab08 TIM8_CC_IRQHandler + 0x0800ab08 UART8_IRQHandler + 0x0800ab08 SPI4_IRQHandler + 0x0800ab08 TIM1_CC_IRQHandler + 0x0800ab08 DMA2_Stream5_IRQHandler + 0x0800ab08 JPEG_IRQHandler + 0x0800ab08 DMA1_Stream5_IRQHandler + 0x0800ab08 CAN3_RX1_IRQHandler + 0x0800ab08 PVD_IRQHandler + 0x0800ab08 TAMP_STAMP_IRQHandler + 0x0800ab08 CAN2_RX1_IRQHandler + 0x0800ab08 EXTI3_IRQHandler + 0x0800ab08 TIM8_TRG_COM_TIM14_IRQHandler + 0x0800ab08 DFSDM1_FLT1_IRQHandler + 0x0800ab08 I2C3_ER_IRQHandler + 0x0800ab08 DFSDM1_FLT2_IRQHandler + 0x0800ab08 EXTI0_IRQHandler + 0x0800ab08 I2C2_EV_IRQHandler + 0x0800ab08 DMA1_Stream2_IRQHandler + 0x0800ab08 CAN1_RX0_IRQHandler + 0x0800ab08 FPU_IRQHandler + 0x0800ab08 OTG_HS_WKUP_IRQHandler + 0x0800ab08 CAN3_SCE_IRQHandler + 0x0800ab08 LTDC_ER_IRQHandler + 0x0800ab08 CAN2_SCE_IRQHandler + 0x0800ab08 DMA2_Stream2_IRQHandler + 0x0800ab08 SPI1_IRQHandler + 0x0800ab08 TIM1_BRK_TIM9_IRQHandler + 0x0800ab08 DCMI_IRQHandler + 0x0800ab08 CAN2_RX0_IRQHandler + 0x0800ab08 DMA2_Stream3_IRQHandler + 0x0800ab08 SAI2_IRQHandler + 0x0800ab08 DFSDM1_FLT3_IRQHandler + 0x0800ab08 USART6_IRQHandler + 0x0800ab08 CAN3_RX0_IRQHandler + 0x0800ab08 USART3_IRQHandler + 0x0800ab08 CAN1_RX1_IRQHandler + 0x0800ab08 UART5_IRQHandler + 0x0800ab08 DMA2_Stream0_IRQHandler + 0x0800ab08 TIM4_IRQHandler + 0x0800ab08 QUADSPI_IRQHandler + 0x0800ab08 I2C1_EV_IRQHandler + 0x0800ab08 DMA1_Stream6_IRQHandler + 0x0800ab08 DMA1_Stream1_IRQHandler + 0x0800ab08 UART4_IRQHandler + 0x0800ab08 TIM3_IRQHandler + 0x0800ab08 RCC_IRQHandler + 0x0800ab08 TIM8_BRK_TIM12_IRQHandler + 0x0800ab08 Default_Handler + 0x0800ab08 CEC_IRQHandler + 0x0800ab08 EXTI15_10_IRQHandler + 0x0800ab08 DMA1_Stream7_IRQHandler + 0x0800ab08 SPI5_IRQHandler + 0x0800ab08 SDMMC1_IRQHandler + 0x0800ab08 CAN2_TX_IRQHandler + 0x0800ab08 I2C3_EV_IRQHandler + 0x0800ab08 EXTI9_5_IRQHandler + 0x0800ab08 RTC_WKUP_IRQHandler + 0x0800ab08 LTDC_IRQHandler + 0x0800ab08 ETH_WKUP_IRQHandler + 0x0800ab08 SPDIF_RX_IRQHandler + 0x0800ab08 SPI2_IRQHandler + 0x0800ab08 OTG_HS_EP1_IN_IRQHandler + 0x0800ab08 DMA1_Stream0_IRQHandler + 0x0800ab08 CAN1_TX_IRQHandler + 0x0800ab08 EXTI4_IRQHandler + 0x0800ab08 RNG_IRQHandler + 0x0800ab08 ETH_IRQHandler + 0x0800ab08 OTG_HS_EP1_OUT_IRQHandler + 0x0800ab08 WWDG_IRQHandler + 0x0800ab08 SPI6_IRQHandler + 0x0800ab08 MDIOS_IRQHandler + 0x0800ab08 I2C4_EV_IRQHandler + 0x0800ab08 CAN3_TX_IRQHandler + 0x0800ab08 OTG_FS_WKUP_IRQHandler + 0x0800ab08 OTG_HS_IRQHandler + 0x0800ab08 DMA2D_IRQHandler + 0x0800ab08 EXTI1_IRQHandler + 0x0800ab08 SDMMC2_IRQHandler + 0x0800ab08 UART7_IRQHandler + 0x0800ab08 USART2_IRQHandler + 0x0800ab08 DFSDM1_FLT0_IRQHandler + 0x0800ab08 I2C2_ER_IRQHandler + 0x0800ab08 DMA2_Stream1_IRQHandler + 0x0800ab08 CAN1_SCE_IRQHandler + 0x0800ab08 FLASH_IRQHandler + 0x0800ab08 DMA2_Stream4_IRQHandler + 0x0800ab08 OTG_FS_IRQHandler + 0x0800ab08 SPI3_IRQHandler + 0x0800ab08 DMA1_Stream4_IRQHandler + 0x0800ab08 I2C1_ER_IRQHandler + 0x0800ab08 FMC_IRQHandler + 0x0800ab08 LPTIM1_IRQHandler + 0x0800ab08 I2C4_ER_IRQHandler + 0x0800ab08 DMA2_Stream6_IRQHandler + 0x0800ab08 SAI1_IRQHandler + 0x0800ab08 DMA1_Stream3_IRQHandler *(.glue_7) - .glue_7 0x0800ab1e 0x0 linker stubs + .glue_7 0x0800ab0a 0x0 linker stubs *(.glue_7t) - .glue_7t 0x0800ab1e 0x0 linker stubs + .glue_7t 0x0800ab0a 0x0 linker stubs *(.eh_frame) - *fill* 0x0800ab1e 0x2 - .eh_frame 0x0800ab20 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + *fill* 0x0800ab0a 0x2 + .eh_frame 0x0800ab0c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o *(.init) - .init 0x0800ab20 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800ab20 _init - .init 0x0800ab24 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + .init 0x0800ab0c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800ab0c _init + .init 0x0800ab10 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o *(.fini) - .fini 0x0800ab2c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o - 0x0800ab2c _fini - .fini 0x0800ab30 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o - 0x0800ab38 . = ALIGN (0x4) - 0x0800ab38 _etext = . + .fini 0x0800ab18 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crti.o + 0x0800ab18 _fini + .fini 0x0800ab1c 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o + 0x0800ab24 . = ALIGN (0x4) + 0x0800ab24 _etext = . -.vfp11_veneer 0x0800ab38 0x0 - .vfp11_veneer 0x0800ab38 0x0 linker stubs +.vfp11_veneer 0x0800ab24 0x0 + .vfp11_veneer 0x0800ab24 0x0 linker stubs -.v4_bx 0x0800ab38 0x0 - .v4_bx 0x0800ab38 0x0 linker stubs +.v4_bx 0x0800ab24 0x0 + .v4_bx 0x0800ab24 0x0 linker stubs -.iplt 0x0800ab38 0x0 - .iplt 0x0800ab38 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.iplt 0x0800ab24 0x0 + .iplt 0x0800ab24 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.rodata 0x0800ab38 0x25c - 0x0800ab38 . = ALIGN (0x4) +.rodata 0x0800ab24 0x25c + 0x0800ab24 . = ALIGN (0x4) *(.rodata) *(.rodata*) .rodata.Init_params.str1.4 - 0x0800ab38 0x1ad build/main.o + 0x0800ab24 0x1ad build/main.o 0x10 (size before relaxing) .rodata.SD_SAVE.str1.4 - 0x0800ace5 0xa build/main.o - *fill* 0x0800ace5 0x3 + 0x0800acd1 0xa build/main.o + *fill* 0x0800acd1 0x3 .rodata.SD_Driver - 0x0800ace8 0x14 build/sd_diskio.o - 0x0800ace8 SD_Driver + 0x0800acd4 0x14 build/sd_diskio.o + 0x0800acd4 SD_Driver .rodata.APBPrescTable - 0x0800acfc 0x8 build/system_stm32f7xx.o - 0x0800acfc APBPrescTable + 0x0800ace8 0x8 build/system_stm32f7xx.o + 0x0800ace8 APBPrescTable .rodata.AHBPrescTable - 0x0800ad04 0x10 build/system_stm32f7xx.o - 0x0800ad04 AHBPrescTable + 0x0800acf0 0x10 build/system_stm32f7xx.o + 0x0800acf0 AHBPrescTable .rodata.Read_File.str1.4 - 0x0800ad14 0xbb build/File_Handling.o + 0x0800ad00 0xbb build/File_Handling.o .rodata.Seek_Read_File.str1.4 - 0x0800ad14 0x27 build/File_Handling.o + 0x0800ad00 0x27 build/File_Handling.o .rodata.Remove_File.str1.4 - 0x0800ad14 0x64 build/File_Handling.o + 0x0800ad00 0x64 build/File_Handling.o .rodata.create_name.str1.4 - 0x0800ad14 0xf build/ff.o - .rodata.ExCvt 0x0800ad14 0x80 build/ff.o + 0x0800ad00 0xf build/ff.o + .rodata.ExCvt 0x0800ad00 0x80 build/ff.o .rodata.str1.4 - 0x0800ad94 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + 0x0800ad80 0x13 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) .rodata.str1.4 - 0x0800ad94 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - 0x0800add0 . = ALIGN (0x4) + 0x0800ad80 0x25 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + 0x0800adbc . = ALIGN (0x4) .ARM.extab *(.ARM.extab* .gnu.linkonce.armextab.*) -.ARM 0x0800ad94 0x8 - 0x0800ad94 __exidx_start = . +.ARM 0x0800ad80 0x8 + 0x0800ad80 __exidx_start = . *(.ARM.exidx*) - .ARM.exidx 0x0800ad94 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .ARM.exidx 0x0800ad9c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) + .ARM.exidx 0x0800ad80 0x8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) + .ARM.exidx 0x0800ad88 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) 0x8 (size before relaxing) - .ARM.exidx 0x0800ad9c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) + .ARM.exidx 0x0800ad88 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) 0x8 (size before relaxing) - 0x0800ad9c __exidx_end = . + 0x0800ad88 __exidx_end = . -.rel.dyn 0x0800ad9c 0x0 - .rel.iplt 0x0800ad9c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o +.rel.dyn 0x0800ad88 0x0 + .rel.iplt 0x0800ad88 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o -.preinit_array 0x0800ad9c 0x0 - 0x0800ad9c PROVIDE (__preinit_array_start = .) +.preinit_array 0x0800ad88 0x0 + 0x0800ad88 PROVIDE (__preinit_array_start = .) *(.preinit_array*) - 0x0800ad9c PROVIDE (__preinit_array_end = .) + 0x0800ad88 PROVIDE (__preinit_array_end = .) -.init_array 0x0800ad9c 0x4 - 0x0800ad9c PROVIDE (__init_array_start = .) +.init_array 0x0800ad88 0x4 + 0x0800ad88 PROVIDE (__init_array_start = .) *(SORT_BY_NAME(.init_array.*)) *(.init_array*) - .init_array 0x0800ad9c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800ada0 PROVIDE (__init_array_end = .) + .init_array 0x0800ad88 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800ad8c PROVIDE (__init_array_end = .) -.fini_array 0x0800ada0 0x4 - 0x0800ada0 PROVIDE (__fini_array_start = .) +.fini_array 0x0800ad8c 0x4 + 0x0800ad8c PROVIDE (__fini_array_start = .) *(SORT_BY_NAME(.fini_array.*)) *(.fini_array*) - .fini_array 0x0800ada0 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o - 0x0800ada4 PROVIDE (__fini_array_end = .) - 0x0800ada4 _sidata = LOADADDR (.data) + .fini_array 0x0800ad8c 0x4 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o + 0x0800ad90 PROVIDE (__fini_array_end = .) + 0x0800ad90 _sidata = LOADADDR (.data) -.data 0x20000000 0x5c load address 0x0800ada4 +.data 0x20000000 0x5c load address 0x0800ad90 0x20000000 . = ALIGN (0x4) 0x20000000 _sdata = . *(.data) @@ -3098,17 +3098,17 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x2000005c _edata = . .tm_clone_table - 0x2000005c 0x0 load address 0x0800ae00 + 0x2000005c 0x0 load address 0x0800adec .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o .tm_clone_table 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtend.o -.igot.plt 0x2000005c 0x0 load address 0x0800ae00 +.igot.plt 0x2000005c 0x0 load address 0x0800adec .igot.plt 0x2000005c 0x0 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtbegin.o 0x2000005c . = ALIGN (0x4) -.bss 0x2000005c 0x266c load address 0x0800ae00 +.bss 0x2000005c 0x266c load address 0x0800adec 0x2000005c _sbss = . 0x2000005c __bss_start__ = _sbss *(.bss) @@ -3284,7 +3284,7 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/crtn.o 0x200026c8 __bss_end__ = _ebss ._user_heap_stack - 0x200026c8 0x6000 load address 0x0800ae00 + 0x200026c8 0x6000 load address 0x0800adec 0x200026c8 . = ALIGN (0x8) [!provide] PROVIDE (end = .) 0x200026c8 PROVIDE (_end = .) @@ -3766,61 +3766,61 @@ LOAD /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a .debug_ranges 0x00001938 0x238 build/stm32f7xx_hal_uart.o .debug_ranges 0x00001b70 0x20 build/startup_stm32f767xx.o -.debug_line 0x00000000 0x23a09 - .debug_line 0x00000000 0x37c2 build/main.o - .debug_line 0x000037c2 0x39e build/bsp_driver_sd.o - .debug_line 0x00003b60 0x2f2 build/sd_diskio.o - .debug_line 0x00003e52 0x170 build/fatfs.o - .debug_line 0x00003fc2 0x111 build/fatfs_platform.o - .debug_line 0x000040d3 0x934 build/stm32f7xx_it.o - .debug_line 0x00004a07 0x66d build/stm32f7xx_hal_msp.o - .debug_line 0x00005074 0xfc7 build/stm32f7xx_hal_adc.o - .debug_line 0x0000603b 0xb34 build/stm32f7xx_hal_adc_ex.o - .debug_line 0x00006b6f 0xd15 build/stm32f7xx_hal_rcc.o - .debug_line 0x00007884 0xbd9 build/stm32f7xx_hal_rcc_ex.o - .debug_line 0x0000845d 0x6aa build/stm32f7xx_hal_gpio.o - .debug_line 0x00008b07 0x52c build/stm32f7xx_hal_pwr_ex.o - .debug_line 0x00009033 0x77a build/stm32f7xx_hal_cortex.o - .debug_line 0x000097ad 0x548 build/stm32f7xx_hal.o - .debug_line 0x00009cf5 0x1721 build/stm32f7xx_ll_rcc.o - .debug_line 0x0000b416 0x76d build/stm32f7xx_ll_gpio.o - .debug_line 0x0000bb83 0x104d build/stm32f7xx_ll_sdmmc.o - .debug_line 0x0000cbd0 0x263f build/stm32f7xx_hal_sd.o - .debug_line 0x0000f20f 0x56b build/stm32f7xx_ll_spi.o - .debug_line 0x0000f77a 0x4839 build/stm32f7xx_hal_tim.o - .debug_line 0x00013fb3 0x1bb4 build/stm32f7xx_hal_tim_ex.o - .debug_line 0x00015b67 0xe26 build/stm32f7xx_ll_tim.o - .debug_line 0x0001698d 0x62f build/stm32f7xx_ll_usart.o - .debug_line 0x00016fbc 0x1c2 build/system_stm32f7xx.o - .debug_line 0x0001717e 0xa76 build/File_Handling.o - .debug_line 0x00017bf4 0x217 build/diskio.o - .debug_line 0x00017e0b 0x42e1 build/ff.o - .debug_line 0x0001c0ec 0x25a build/ff_gen_drv.o - .debug_line 0x0001c346 0xf8 build/sysmem.o - .debug_line 0x0001c43e 0x3f43 build/stm32f7xx_hal_uart.o - .debug_line 0x00020381 0x73 build/startup_stm32f767xx.o - .debug_line 0x000203f4 0x224 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) - .debug_line 0x00020618 0xe7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o) - .debug_line 0x000206ff 0x854 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) - .debug_line 0x00020f53 0x11e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o) - .debug_line 0x00021071 0x1b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o) - .debug_line 0x00021227 0x10c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o) - .debug_line 0x00021333 0x446 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) - .debug_line 0x00021779 0x2c3 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o) - .debug_line 0x00021a3c 0x1f1 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o) - .debug_line 0x00021c2d 0x84 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) - .debug_line 0x00021cb1 0xb9 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) - .debug_line 0x00021d6a 0x16b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o) - .debug_line 0x00021ed5 0x1f8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) - .debug_line 0x000220cd 0x75d /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) - .debug_line 0x0002282a 0x153 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o) - .debug_line 0x0002297d 0x193 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) - .debug_line 0x00022b10 0x176 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o) - .debug_line 0x00022c86 0x4fc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) - .debug_line 0x00023182 0x27b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) - .debug_line 0x000233fd 0x4e /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) - .debug_line 0x0002344b 0x574 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) - .debug_line 0x000239bf 0x4a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o) +.debug_line 0x00000000 0x239e9 + .debug_line 0x00000000 0x37a2 build/main.o + .debug_line 0x000037a2 0x39e build/bsp_driver_sd.o + .debug_line 0x00003b40 0x2f2 build/sd_diskio.o + .debug_line 0x00003e32 0x170 build/fatfs.o + .debug_line 0x00003fa2 0x111 build/fatfs_platform.o + .debug_line 0x000040b3 0x934 build/stm32f7xx_it.o + .debug_line 0x000049e7 0x66d build/stm32f7xx_hal_msp.o + .debug_line 0x00005054 0xfc7 build/stm32f7xx_hal_adc.o + .debug_line 0x0000601b 0xb34 build/stm32f7xx_hal_adc_ex.o + .debug_line 0x00006b4f 0xd15 build/stm32f7xx_hal_rcc.o + .debug_line 0x00007864 0xbd9 build/stm32f7xx_hal_rcc_ex.o + .debug_line 0x0000843d 0x6aa build/stm32f7xx_hal_gpio.o + .debug_line 0x00008ae7 0x52c build/stm32f7xx_hal_pwr_ex.o + .debug_line 0x00009013 0x77a build/stm32f7xx_hal_cortex.o + .debug_line 0x0000978d 0x548 build/stm32f7xx_hal.o + .debug_line 0x00009cd5 0x1721 build/stm32f7xx_ll_rcc.o + .debug_line 0x0000b3f6 0x76d build/stm32f7xx_ll_gpio.o + .debug_line 0x0000bb63 0x104d build/stm32f7xx_ll_sdmmc.o + .debug_line 0x0000cbb0 0x263f build/stm32f7xx_hal_sd.o + .debug_line 0x0000f1ef 0x56b build/stm32f7xx_ll_spi.o + .debug_line 0x0000f75a 0x4839 build/stm32f7xx_hal_tim.o + .debug_line 0x00013f93 0x1bb4 build/stm32f7xx_hal_tim_ex.o + .debug_line 0x00015b47 0xe26 build/stm32f7xx_ll_tim.o + .debug_line 0x0001696d 0x62f build/stm32f7xx_ll_usart.o + .debug_line 0x00016f9c 0x1c2 build/system_stm32f7xx.o + .debug_line 0x0001715e 0xa76 build/File_Handling.o + .debug_line 0x00017bd4 0x217 build/diskio.o + .debug_line 0x00017deb 0x42e1 build/ff.o + .debug_line 0x0001c0cc 0x25a build/ff_gen_drv.o + .debug_line 0x0001c326 0xf8 build/sysmem.o + .debug_line 0x0001c41e 0x3f43 build/stm32f7xx_hal_uart.o + .debug_line 0x00020361 0x73 build/startup_stm32f767xx.o + .debug_line 0x000203d4 0x224 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sprintf.o) + .debug_line 0x000205f8 0xe7 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-impure.o) + .debug_line 0x000206df 0x854 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-svfprintf.o) + .debug_line 0x00020f33 0x11e /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-init.o) + .debug_line 0x00021051 0x1b6 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memset.o) + .debug_line 0x00021207 0x10c /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-errno.o) + .debug_line 0x00021313 0x446 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mallocr.o) + .debug_line 0x00021759 0x2c3 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-freer.o) + .debug_line 0x00021a1c 0x1f1 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memmove.o) + .debug_line 0x00021c0d 0x84 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memchr.o) + .debug_line 0x00021c91 0xb9 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-memcpy.o) + .debug_line 0x00021d4a 0x16b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-malloc.o) + .debug_line 0x00021eb5 0x1f8 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reallocr.o) + .debug_line 0x000220ad 0x75d /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-nano-vfprintf_i.o) + .debug_line 0x0002280a 0x153 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-mlock.o) + .debug_line 0x0002295d 0x193 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-sbrkr.o) + .debug_line 0x00022af0 0x176 /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-msizer.o) + .debug_line 0x00022c66 0x4fc /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-findfp.o) + .debug_line 0x00023162 0x27b /usr/lib/gcc/arm-none-eabi/13.2.1/../../../arm-none-eabi/lib/thumb/v7e-m+dp/hard/libc_nano.a(libc_a-reent.o) + .debug_line 0x000233dd 0x4e /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_aeabi_uldivmod.o) + .debug_line 0x0002342b 0x574 /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_udivmoddi4.o) + .debug_line 0x0002399f 0x4a /usr/lib/gcc/arm-none-eabi/13.2.1/thumb/v7e-m+dp/hard/libgcc.a(_dvmd_tls.o) .debug_str 0x00000000 0x96d0 .debug_str 0x00000000 0x96d0 build/main.o diff --git a/build/main.lst b/build/main.lst index 39a11ef..2286f27 100644 --- a/build/main.lst +++ b/build/main.lst @@ -1,4 +1,4 @@ -ARM GAS /tmp/ccfIOqv2.s page 1 +ARM GAS /tmp/ccyYWdjY.s page 1 1 .cpu cortex-m7 @@ -58,7 +58,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 28:Drivers/CMSIS/Include/core_cm7.h **** #pragma clang system_header /* treat file as system include file */ 29:Drivers/CMSIS/Include/core_cm7.h **** #endif 30:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 2 + ARM GAS /tmp/ccyYWdjY.s page 2 31:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __CORE_CM7_H_GENERIC @@ -118,7 +118,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 85:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 86:Drivers/CMSIS/Include/core_cm7.h **** #endif 87:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 3 + ARM GAS /tmp/ccyYWdjY.s page 3 88:Drivers/CMSIS/Include/core_cm7.h **** #elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) @@ -178,7 +178,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 142:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U 143:Drivers/CMSIS/Include/core_cm7.h **** #endif 144:Drivers/CMSIS/Include/core_cm7.h **** #else - ARM GAS /tmp/ccfIOqv2.s page 4 + ARM GAS /tmp/ccyYWdjY.s page 4 145:Drivers/CMSIS/Include/core_cm7.h **** #define __FPU_USED 0U @@ -238,7 +238,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 199:Drivers/CMSIS/Include/core_cm7.h **** #warning "__ICACHE_PRESENT not defined in device header file; using default!" 200:Drivers/CMSIS/Include/core_cm7.h **** #endif 201:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 5 + ARM GAS /tmp/ccyYWdjY.s page 5 202:Drivers/CMSIS/Include/core_cm7.h **** #ifndef __DCACHE_PRESENT @@ -298,7 +298,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 256:Drivers/CMSIS/Include/core_cm7.h **** - Core MPU Register 257:Drivers/CMSIS/Include/core_cm7.h **** - Core FPU Register 258:Drivers/CMSIS/Include/core_cm7.h **** ******************************************************************************/ - ARM GAS /tmp/ccfIOqv2.s page 6 + ARM GAS /tmp/ccyYWdjY.s page 6 259:Drivers/CMSIS/Include/core_cm7.h **** /** @@ -358,7 +358,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 313:Drivers/CMSIS/Include/core_cm7.h **** typedef union 314:Drivers/CMSIS/Include/core_cm7.h **** { 315:Drivers/CMSIS/Include/core_cm7.h **** struct - ARM GAS /tmp/ccfIOqv2.s page 7 + ARM GAS /tmp/ccyYWdjY.s page 7 316:Drivers/CMSIS/Include/core_cm7.h **** { @@ -418,7 +418,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 370:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Pos 24U /*!< xPSR 371:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_T_Msk (1UL << xPSR_T_Pos) /*!< xPSR 372:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 8 + ARM GAS /tmp/ccyYWdjY.s page 8 373:Drivers/CMSIS/Include/core_cm7.h **** #define xPSR_GE_Pos 16U /*!< xPSR @@ -478,7 +478,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 427:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ISPR[8U]; /*!< Offset: 0x100 (R/W) Interrupt Set Pending Register * 428:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED2[24U]; 429:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ICPR[8U]; /*!< Offset: 0x180 (R/W) Interrupt Clear Pending Register - ARM GAS /tmp/ccfIOqv2.s page 9 + ARM GAS /tmp/ccyYWdjY.s page 9 430:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED3[24U]; @@ -538,7 +538,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 484:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[15U]; 485:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR0; /*!< Offset: 0x240 (R/ ) Media and VFP Feature Register 0 486:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR1; /*!< Offset: 0x244 (R/ ) Media and VFP Feature Register 1 - ARM GAS /tmp/ccfIOqv2.s page 10 + ARM GAS /tmp/ccyYWdjY.s page 10 487:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t MVFR2; /*!< Offset: 0x248 (R/ ) Media and VFP Feature Register 2 @@ -598,7 +598,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 541:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Pos 23U /*!< SCB 542:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPREEMPT_Msk (1UL << SCB_ICSR_ISRPREEMPT_Pos) /*!< SCB 543:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 11 + ARM GAS /tmp/ccyYWdjY.s page 11 544:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_ICSR_ISRPENDING_Pos 22U /*!< SCB @@ -658,7 +658,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 598:Drivers/CMSIS/Include/core_cm7.h **** 599:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Pos 16U /*!< SCB 600:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CCR_DC_Msk (1UL << SCB_CCR_DC_Pos) /*!< SCB - ARM GAS /tmp/ccfIOqv2.s page 12 + ARM GAS /tmp/ccyYWdjY.s page 12 601:Drivers/CMSIS/Include/core_cm7.h **** @@ -718,7 +718,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 655:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_USGFAULTACT_Msk (1UL << SCB_SHCSR_USGFAULTACT_Pos) /*!< SCB 656:Drivers/CMSIS/Include/core_cm7.h **** 657:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Pos 1U /*!< SCB - ARM GAS /tmp/ccfIOqv2.s page 13 + ARM GAS /tmp/ccyYWdjY.s page 13 658:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_SHCSR_BUSFAULTACT_Msk (1UL << SCB_SHCSR_BUSFAULTACT_Pos) /*!< SCB @@ -778,7 +778,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 712:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_IBUSERR_Msk (1UL << SCB_CFSR_IBUSERR_Pos) /*!< SCB 713:Drivers/CMSIS/Include/core_cm7.h **** 714:Drivers/CMSIS/Include/core_cm7.h **** /* UsageFault Status Register (part of SCB Configurable Fault Status Register) */ - ARM GAS /tmp/ccfIOqv2.s page 14 + ARM GAS /tmp/ccyYWdjY.s page 14 715:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CFSR_DIVBYZERO_Pos (SCB_CFSR_USGFAULTSR_Pos + 9U) /*!< SCB @@ -838,7 +838,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 769:Drivers/CMSIS/Include/core_cm7.h **** 770:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Pos 24U /*!< SCB 771:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_CTR_CWG_Msk (0xFUL << SCB_CTR_CWG_Pos) /*!< SCB - ARM GAS /tmp/ccfIOqv2.s page 15 + ARM GAS /tmp/ccyYWdjY.s page 15 772:Drivers/CMSIS/Include/core_cm7.h **** @@ -898,7 +898,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 826:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Pos 5U /*!< SCB 827:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_DCCSW_SET_Msk (0x1FFUL << SCB_DCCSW_SET_Pos) /*!< SCB 828:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 16 + ARM GAS /tmp/ccyYWdjY.s page 16 829:Drivers/CMSIS/Include/core_cm7.h **** /* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */ @@ -958,7 +958,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 883:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Pos 2U /*!< SCB 884:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_TPRI_Msk (0x1FFUL << SCB_AHBPCR_TPRI_Pos) /*!< SCB 885:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 17 + ARM GAS /tmp/ccyYWdjY.s page 17 886:Drivers/CMSIS/Include/core_cm7.h **** #define SCB_AHBSCR_CTL_Pos 0U /*!< SCB @@ -1018,7 +1018,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 940:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_FPEXCODIS_Msk (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos) /*!< ACTLR: 941:Drivers/CMSIS/Include/core_cm7.h **** 942:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Pos 2U /*!< ACTLR: - ARM GAS /tmp/ccfIOqv2.s page 18 + ARM GAS /tmp/ccyYWdjY.s page 18 943:Drivers/CMSIS/Include/core_cm7.h **** #define SCnSCB_ACTLR_DISFOLD_Msk (1UL << SCnSCB_ACTLR_DISFOLD_Pos) /*!< ACTLR: @@ -1078,7 +1078,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 997:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Pos 0U /*!< SysT 998:Drivers/CMSIS/Include/core_cm7.h **** #define SysTick_CALIB_TENMS_Msk (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/) /*!< SysT 999:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 19 + ARM GAS /tmp/ccyYWdjY.s page 19 1000:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_SysTick */ @@ -1138,7 +1138,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1054:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Pos 23U /*!< ITM 1055:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_BUSY_Msk (1UL << ITM_TCR_BUSY_Pos) /*!< ITM 1056:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 20 + ARM GAS /tmp/ccyYWdjY.s page 20 1057:Drivers/CMSIS/Include/core_cm7.h **** #define ITM_TCR_TraceBusID_Pos 16U /*!< ITM @@ -1198,7 +1198,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1111:Drivers/CMSIS/Include/core_cm7.h **** */ 1112:Drivers/CMSIS/Include/core_cm7.h **** 1113:Drivers/CMSIS/Include/core_cm7.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 21 + ARM GAS /tmp/ccyYWdjY.s page 21 1114:Drivers/CMSIS/Include/core_cm7.h **** \brief Structure type to access the Data Watchpoint and Trace Register (DWT). @@ -1258,7 +1258,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1168:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Pos 20U /*!< DWT CTR 1169:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_LSUEVTENA_Msk (0x1UL << DWT_CTRL_LSUEVTENA_Pos) /*!< DWT CTR 1170:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 22 + ARM GAS /tmp/ccyYWdjY.s page 22 1171:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_CTRL_SLEEPEVTENA_Pos 19U /*!< DWT CTR @@ -1318,7 +1318,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1225:Drivers/CMSIS/Include/core_cm7.h **** /* DWT Comparator Function Register Definitions */ 1226:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Pos 24U /*!< DWT FUN 1227:Drivers/CMSIS/Include/core_cm7.h **** #define DWT_FUNCTION_MATCHED_Msk (0x1UL << DWT_FUNCTION_MATCHED_Pos) /*!< DWT FUN - ARM GAS /tmp/ccfIOqv2.s page 23 + ARM GAS /tmp/ccyYWdjY.s page 23 1228:Drivers/CMSIS/Include/core_cm7.h **** @@ -1378,7 +1378,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1282:Drivers/CMSIS/Include/core_cm7.h **** uint32_t RESERVED4[1U]; 1283:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t ITATBCTR0; /*!< Offset: 0xEF8 (R/ ) ITATBCTR0 */ 1284:Drivers/CMSIS/Include/core_cm7.h **** __IM uint32_t FIFO1; /*!< Offset: 0xEFC (R/ ) Integration ITM Data */ - ARM GAS /tmp/ccfIOqv2.s page 24 + ARM GAS /tmp/ccyYWdjY.s page 24 1285:Drivers/CMSIS/Include/core_cm7.h **** __IOM uint32_t ITCTRL; /*!< Offset: 0xF00 (R/W) Integration Mode Control */ @@ -1438,7 +1438,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1339:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Pos 16U /*!< TPI FIF 1340:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM2_Msk (0xFFUL << TPI_FIFO0_ETM2_Pos) /*!< TPI FIF 1341:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 25 + ARM GAS /tmp/ccyYWdjY.s page 25 1342:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_FIFO0_ETM1_Pos 8U /*!< TPI FIF @@ -1498,7 +1498,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1396:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_PTINVALID_Msk (0x1UL << TPI_DEVID_PTINVALID_Pos) /*!< TPI DEV 1397:Drivers/CMSIS/Include/core_cm7.h **** 1398:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Pos 6U /*!< TPI DEV - ARM GAS /tmp/ccfIOqv2.s page 26 + ARM GAS /tmp/ccyYWdjY.s page 26 1399:Drivers/CMSIS/Include/core_cm7.h **** #define TPI_DEVID_MinBufSz_Msk (0x7UL << TPI_DEVID_MinBufSz_Pos) /*!< TPI DEV @@ -1558,7 +1558,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1453:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_TYPE_SEPARATE_Msk (1UL /*<< MPU_TYPE_SEPARATE_Pos*/) /*!< MPU 1454:Drivers/CMSIS/Include/core_cm7.h **** 1455:Drivers/CMSIS/Include/core_cm7.h **** /* MPU Control Register Definitions */ - ARM GAS /tmp/ccfIOqv2.s page 27 + ARM GAS /tmp/ccyYWdjY.s page 27 1456:Drivers/CMSIS/Include/core_cm7.h **** #define MPU_CTRL_PRIVDEFENA_Pos 2U /*!< MPU @@ -1618,7 +1618,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1510:Drivers/CMSIS/Include/core_cm7.h **** /*@} end of group CMSIS_MPU */ 1511:Drivers/CMSIS/Include/core_cm7.h **** #endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */ 1512:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 28 + ARM GAS /tmp/ccyYWdjY.s page 28 1513:Drivers/CMSIS/Include/core_cm7.h **** @@ -1678,7 +1678,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1567:Drivers/CMSIS/Include/core_cm7.h **** /* Floating-Point Default Status Control Register Definitions */ 1568:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Pos 26U /*!< FPDS 1569:Drivers/CMSIS/Include/core_cm7.h **** #define FPU_FPDSCR_AHP_Msk (1UL << FPU_FPDSCR_AHP_Pos) /*!< FPDS - ARM GAS /tmp/ccfIOqv2.s page 29 + ARM GAS /tmp/ccyYWdjY.s page 29 1570:Drivers/CMSIS/Include/core_cm7.h **** @@ -1738,7 +1738,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1624:Drivers/CMSIS/Include/core_cm7.h **** \ingroup CMSIS_core_register 1625:Drivers/CMSIS/Include/core_cm7.h **** \defgroup CMSIS_CoreDebug Core Debug Registers (CoreDebug) 1626:Drivers/CMSIS/Include/core_cm7.h **** \brief Type definitions for the Core Debug Registers - ARM GAS /tmp/ccfIOqv2.s page 30 + ARM GAS /tmp/ccyYWdjY.s page 30 1627:Drivers/CMSIS/Include/core_cm7.h **** @{ @@ -1798,7 +1798,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1681:Drivers/CMSIS/Include/core_cm7.h **** 1682:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Pos 0U /*!< Core 1683:Drivers/CMSIS/Include/core_cm7.h **** #define CoreDebug_DCRSR_REGSEL_Msk (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/) /*!< Core - ARM GAS /tmp/ccfIOqv2.s page 31 + ARM GAS /tmp/ccyYWdjY.s page 31 1684:Drivers/CMSIS/Include/core_cm7.h **** @@ -1858,7 +1858,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1738:Drivers/CMSIS/Include/core_cm7.h **** \param[in] value Value of the bit field. This parameter is interpreted as an uint32_t type. 1739:Drivers/CMSIS/Include/core_cm7.h **** \return Masked and shifted value. 1740:Drivers/CMSIS/Include/core_cm7.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 32 + ARM GAS /tmp/ccyYWdjY.s page 32 1741:Drivers/CMSIS/Include/core_cm7.h **** #define _VAL2FLD(field, value) (((uint32_t)(value) << field ## _Pos) & field ## _Msk) @@ -1918,7 +1918,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1795:Drivers/CMSIS/Include/core_cm7.h **** - Core NVIC Functions 1796:Drivers/CMSIS/Include/core_cm7.h **** - Core SysTick Functions 1797:Drivers/CMSIS/Include/core_cm7.h **** - Core Debug Functions - ARM GAS /tmp/ccfIOqv2.s page 33 + ARM GAS /tmp/ccyYWdjY.s page 33 1798:Drivers/CMSIS/Include/core_cm7.h **** - Core Register Access Functions @@ -1978,7 +1978,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1852:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_MSP_FPU (0xFFFFFFE9UL) /* return to Thread mode, uses MSP after retu 1853:Drivers/CMSIS/Include/core_cm7.h **** #define EXC_RETURN_THREAD_PSP_FPU (0xFFFFFFEDUL) /* return to Thread mode, uses PSP after retu 1854:Drivers/CMSIS/Include/core_cm7.h **** - ARM GAS /tmp/ccfIOqv2.s page 34 + ARM GAS /tmp/ccyYWdjY.s page 34 1855:Drivers/CMSIS/Include/core_cm7.h **** @@ -2038,7 +2038,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1909:Drivers/CMSIS/Include/core_cm7.h **** \return 0 Interrupt is not enabled. 1910:Drivers/CMSIS/Include/core_cm7.h **** \return 1 Interrupt is enabled. 1911:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccfIOqv2.s page 35 + ARM GAS /tmp/ccyYWdjY.s page 35 1912:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2098,7 +2098,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1966:Drivers/CMSIS/Include/core_cm7.h **** \details Sets the pending bit of a device specific interrupt in the NVIC pending register. 1967:Drivers/CMSIS/Include/core_cm7.h **** \param [in] IRQn Device specific interrupt number. 1968:Drivers/CMSIS/Include/core_cm7.h **** \note IRQn must not be negative. - ARM GAS /tmp/ccfIOqv2.s page 36 + ARM GAS /tmp/ccyYWdjY.s page 36 1969:Drivers/CMSIS/Include/core_cm7.h **** */ @@ -2158,7 +2158,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2023:Drivers/CMSIS/Include/core_cm7.h **** */ 2024:Drivers/CMSIS/Include/core_cm7.h **** __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) 2025:Drivers/CMSIS/Include/core_cm7.h **** { - ARM GAS /tmp/ccfIOqv2.s page 37 + ARM GAS /tmp/ccyYWdjY.s page 37 2026:Drivers/CMSIS/Include/core_cm7.h **** if ((int32_t)(IRQn) >= 0) @@ -2218,7 +2218,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 36 .cfi_def_cfa_offset 4 37 .cfi_offset 14, -4 2073:Drivers/CMSIS/Include/core_cm7.h **** uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used - ARM GAS /tmp/ccfIOqv2.s page 38 + ARM GAS /tmp/ccyYWdjY.s page 38 38 .loc 2 2073 3 is_stmt 1 view .LVU2 @@ -2278,7 +2278,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2078:Drivers/CMSIS/Include/core_cm7.h **** 81 .loc 2 2078 109 discriminator 2 view .LVU19 82 003a 0023 movs r3, #0 - ARM GAS /tmp/ccfIOqv2.s page 39 + ARM GAS /tmp/ccyYWdjY.s page 39 83 003c EEE7 b .L2 @@ -2338,7 +2338,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 45:Src/main.c **** ADC_HandleTypeDef hadc1; 46:Src/main.c **** ADC_HandleTypeDef hadc3; 47:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 40 + ARM GAS /tmp/ccyYWdjY.s page 40 48:Src/main.c **** SD_HandleTypeDef hsd1; @@ -2398,7 +2398,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 102:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA); 103:Src/main.c **** static uint16_t MPhD_T(uint8_t num); 104:Src/main.c **** static uint16_t Get_ADC(uint8_t num); - ARM GAS /tmp/ccfIOqv2.s page 41 + ARM GAS /tmp/ccyYWdjY.s page 41 105:Src/main.c **** static uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_resul @@ -2458,7 +2458,7 @@ ARM GAS /tmp/ccfIOqv2.s page 1 159:Src/main.c **** MX_ADC3_Init(); 160:Src/main.c **** MX_SPI2_Init(); 161:Src/main.c **** MX_SPI5_Init(); - ARM GAS /tmp/ccfIOqv2.s page 42 + ARM GAS /tmp/ccyYWdjY.s page 42 162:Src/main.c **** MX_SPI6_Init(); @@ -2484,915 +2484,917 @@ ARM GAS /tmp/ccfIOqv2.s page 1 182:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz 183:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz 184:Src/main.c **** // TIM4 -> ARR = 53; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher f - 185:Src/main.c **** TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher fr + 185:Src/main.c **** //TIM4 -> ARR = 100; // for 1.735 MHz. It`s the highest frequency for correct ADC work. At higher 186:Src/main.c **** - 187:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 187:Src/main.c **** TIM4 -> ARR = 37; //for 2.42 MHz. Highest freq for stm_ADC based on stm32G431-- 2.8 MHz 188:Src/main.c **** - 189:Src/main.c **** - 190:Src/main.c **** //for E502_ADC + 189:Src/main.c **** TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 190:Src/main.c **** 191:Src/main.c **** - 192:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 193:Src/main.c **** TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 194:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 195:Src/main.c **** - 196:Src/main.c **** - 197:Src/main.c **** // for stm_ADC + 192:Src/main.c **** //for E502_ADC + 193:Src/main.c **** + 194:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 195:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 196:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 197:Src/main.c **** 198:Src/main.c **** - 199:Src/main.c **** //Mach-Zander clock equal to ADC clock (adc triggers on rising and falling edges) - 200:Src/main.c **** TIM11 -> ARR = TIM4 -> ARR; - 201:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 202:Src/main.c **** - 203:Src/main.c **** + 199:Src/main.c **** // for stm_ADC + 200:Src/main.c **** + 201:Src/main.c **** //Mach-Zander clock equal to ADC clock (adc triggers on rising and falling edges) + 202:Src/main.c **** TIM11 -> ARR = TIM4 -> ARR; + 203:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; //duty 50% 204:Src/main.c **** - 205:Src/main.c **** /* - 206:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ - 207:Src/main.c **** - 208:Src/main.c **** CPU_state = DECODE_ENABLE; - 209:Src/main.c **** } - 210:Src/main.c **** */ - 211:Src/main.c **** /* USER CODE END 2 */ - 212:Src/main.c **** - 213:Src/main.c **** /* Infinite loop */ - 214:Src/main.c **** /* USER CODE BEGIN WHILE */ - 215:Src/main.c **** while (1) - 216:Src/main.c **** { - 217:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) - 218:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 43 + 205:Src/main.c **** + 206:Src/main.c **** + 207:Src/main.c **** /* + 208:Src/main.c **** if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ + 209:Src/main.c **** + 210:Src/main.c **** CPU_state = DECODE_ENABLE; + 211:Src/main.c **** } + 212:Src/main.c **** */ + 213:Src/main.c **** /* USER CODE END 2 */ + 214:Src/main.c **** + 215:Src/main.c **** /* Infinite loop */ + 216:Src/main.c **** /* USER CODE BEGIN WHILE */ + 217:Src/main.c **** while (1) + 218:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 43 - 219:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); - 220:Src/main.c **** LL_USART_EnableIT_PE(USART1); - 221:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); - 222:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); - 223:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); - 224:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 225:Src/main.c **** u_rx_flg = 1; - 226:Src/main.c **** } - 227:Src/main.c **** // else - 228:Src/main.c **** // { - 229:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); - 230:Src/main.c **** // u_rx_flg = 0; - 231:Src/main.c **** // } - 232:Src/main.c **** switch (CPU_state) - 233:Src/main.c **** { - 234:Src/main.c **** case HALT://0 - Default state - 235:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 236:Src/main.c **** task.current_param = task.min_param; - 237:Src/main.c **** Stop_TIM10(); - 238:Src/main.c **** break; - 239:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 240:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); - 241:Src/main.c **** if (CheckChecksum(COMMAND)) - 242:Src/main.c **** { - 243:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 - 244:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 245:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 246:Src/main.c **** TO6_before = TO6; - 247:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 248:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; - 249:Src/main.c **** CPU_state = WORK_ENABLE; - 250:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 251:Src/main.c **** } - 252:Src/main.c **** else - 253:Src/main.c **** { - 254:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 255:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 256:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 257:Src/main.c **** } - 258:Src/main.c **** UART_transmission_request = MESS_01; - 259:Src/main.c **** break; - 260:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 261:Src/main.c **** //Set current setup to default - 262:Src/main.c **** task.current_param = task.min_param; - 263:Src/main.c **** Stop_TIM10(); - 264:Src/main.c **** Init_params(); - 265:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 266:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 267:Src/main.c **** CPU_state = HALT; - 268:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 269:Src/main.c **** UART_transmission_request = MESS_01; - 270:Src/main.c **** break; - 271:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 272:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); - 273:Src/main.c **** State_Data[0]|=temp16&0xff; - 274:Src/main.c **** if (temp16==0) - 275:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 44 + 219:Src/main.c **** if ((HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin)==GPIO_PIN_SET)&&(u_rx_flg == 0)) + 220:Src/main.c **** { + 221:Src/main.c **** //NVIC_DisableIRQ(USART1_IRQn); + 222:Src/main.c **** LL_USART_EnableIT_PE(USART1); + 223:Src/main.c **** LL_USART_EnableIT_RXNE(USART1); + 224:Src/main.c **** LL_USART_EnableIT_ERROR(USART1); + 225:Src/main.c **** NVIC_SetPriority(USART1_IRQn, 0); + 226:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 227:Src/main.c **** u_rx_flg = 1; + 228:Src/main.c **** } + 229:Src/main.c **** // else + 230:Src/main.c **** // { + 231:Src/main.c **** // //NVIC_DisableIRQ(USART1_IRQn); + 232:Src/main.c **** // u_rx_flg = 0; + 233:Src/main.c **** // } + 234:Src/main.c **** switch (CPU_state) + 235:Src/main.c **** { + 236:Src/main.c **** case HALT://0 - Default state + 237:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 238:Src/main.c **** task.current_param = task.min_param; + 239:Src/main.c **** Stop_TIM10(); + 240:Src/main.c **** break; + 241:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 242:Src/main.c **** CS_result = CalculateChecksum(COMMAND, CL_16-2); + 243:Src/main.c **** if (CheckChecksum(COMMAND)) + 244:Src/main.c **** { + 245:Src/main.c **** LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC & TEC1 + 246:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 247:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 248:Src/main.c **** TO6_before = TO6; + 249:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 250:Src/main.c **** //LD2_param.LD_TEMP_Before = LD2_param.LD_TEMP; + 251:Src/main.c **** CPU_state = WORK_ENABLE; + 252:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 253:Src/main.c **** } + 254:Src/main.c **** else + 255:Src/main.c **** { + 256:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 257:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 258:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 259:Src/main.c **** } + 260:Src/main.c **** UART_transmission_request = MESS_01; + 261:Src/main.c **** break; + 262:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 263:Src/main.c **** //Set current setup to default + 264:Src/main.c **** task.current_param = task.min_param; + 265:Src/main.c **** Stop_TIM10(); + 266:Src/main.c **** Init_params(); + 267:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 268:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 269:Src/main.c **** CPU_state = HALT; + 270:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 271:Src/main.c **** UART_transmission_request = MESS_01; + 272:Src/main.c **** break; + 273:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 274:Src/main.c **** temp16 = SD_READ(&Long_Data[0]); + 275:Src/main.c **** State_Data[0]|=temp16&0xff; + ARM GAS /tmp/ccyYWdjY.s page 44 - 276:Src/main.c **** UART_transmission_request = MESS_03; - 277:Src/main.c **** } - 278:Src/main.c **** else - 279:Src/main.c **** { - 280:Src/main.c **** UART_transmission_request = MESS_01; - 281:Src/main.c **** } - 282:Src/main.c **** CPU_state_old = HALT; - 283:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 284:Src/main.c **** break; - 285:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 286:Src/main.c **** UART_transmission_request = MESS_02; - 287:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 288:Src/main.c **** break; - 289:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 290:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; - 291:Src/main.c **** UART_transmission_request = MESS_01; - 292:Src/main.c **** CPU_state = CPU_state_old; - 293:Src/main.c **** break; - 294:Src/main.c **** case STATE://6 - Transmith state message - 295:Src/main.c **** UART_transmission_request = MESS_01; - 296:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 297:Src/main.c **** break; - 298:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 299:Src/main.c **** task.current_param = task.min_param; - 300:Src/main.c **** Stop_TIM10(); - 301:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 302:Src/main.c **** { - 303:Src/main.c **** TO7_before = TO7; - 304:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 305:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 306:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 307:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 308:Src/main.c **** - 309:Src/main.c **** //Correct temperature in all pulses - 310:Src/main.c **** (void) MPhD_T(3); - 311:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 312:Src/main.c **** (void) MPhD_T(4); - 313:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 314:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 315:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 316:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 317:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 318:Src/main.c **** - 319:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 320:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 321:Src/main.c **** - 322:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 - 323:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 324:Src/main.c **** - 325:Src/main.c **** //Prepare DATA of internals ADCs - 326:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 327:Src/main.c **** temp16 = Get_ADC(0); - 328:Src/main.c **** temp16 = Get_ADC(1); - 329:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 330:Src/main.c **** - 331:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 332:Src/main.c **** temp16 = Get_ADC(1); - ARM GAS /tmp/ccfIOqv2.s page 45 + 276:Src/main.c **** if (temp16==0) + 277:Src/main.c **** { + 278:Src/main.c **** UART_transmission_request = MESS_03; + 279:Src/main.c **** } + 280:Src/main.c **** else + 281:Src/main.c **** { + 282:Src/main.c **** UART_transmission_request = MESS_01; + 283:Src/main.c **** } + 284:Src/main.c **** CPU_state_old = HALT; + 285:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 286:Src/main.c **** break; + 287:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 288:Src/main.c **** UART_transmission_request = MESS_02; + 289:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 290:Src/main.c **** break; + 291:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 292:Src/main.c **** State_Data[0]|=SD_REMOVE()&0xff; + 293:Src/main.c **** UART_transmission_request = MESS_01; + 294:Src/main.c **** CPU_state = CPU_state_old; + 295:Src/main.c **** break; + 296:Src/main.c **** case STATE://6 - Transmith state message + 297:Src/main.c **** UART_transmission_request = MESS_01; + 298:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 299:Src/main.c **** break; + 300:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 301:Src/main.c **** task.current_param = task.min_param; + 302:Src/main.c **** Stop_TIM10(); + 303:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 304:Src/main.c **** { + 305:Src/main.c **** TO7_before = TO7; + 306:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 307:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 308:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 309:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 310:Src/main.c **** + 311:Src/main.c **** //Correct temperature in all pulses + 312:Src/main.c **** (void) MPhD_T(3); + 313:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 314:Src/main.c **** (void) MPhD_T(4); + 315:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 316:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 317:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 318:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 319:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 320:Src/main.c **** + 321:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 322:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 323:Src/main.c **** + 324:Src/main.c **** Set_LTEC(1,LD1_curr_setup.CURRENT);//Drive Laser diode 1 + 325:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 326:Src/main.c **** + 327:Src/main.c **** //Prepare DATA of internals ADCs + 328:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 329:Src/main.c **** temp16 = Get_ADC(0); + 330:Src/main.c **** temp16 = Get_ADC(1); + 331:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 332:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 45 - 333:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 334:Src/main.c **** - 335:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 336:Src/main.c **** temp16 = Get_ADC(1); - 337:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 338:Src/main.c **** - 339:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 340:Src/main.c **** temp16 = Get_ADC(1); - 341:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 342:Src/main.c **** - 343:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 344:Src/main.c **** temp16 = Get_ADC(1); - 345:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 346:Src/main.c **** temp16 = Get_ADC(2); - 347:Src/main.c **** - 348:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 349:Src/main.c **** temp16 = Get_ADC(3); - 350:Src/main.c **** temp16 = Get_ADC(4); - 351:Src/main.c **** Long_Data[12] = temp16; - 352:Src/main.c **** temp16 = Get_ADC(5); - 353:Src/main.c **** - 354:Src/main.c **** //Put the timer tick to Long_Data: - 355:Src/main.c **** TO6_stop = TO6; - 356:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 357:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 358:Src/main.c **** - 359:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 360:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 361:Src/main.c **** - 362:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 363:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 364:Src/main.c **** - 365:Src/main.c **** if (Curr_setup.SD_EN==1) - 366:Src/main.c **** { - 367:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 368:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 369:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 370:Src/main.c **** State_Data[0]|=temp16&0xff; - 371:Src/main.c **** } - 372:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 373:Src/main.c **** } - 374:Src/main.c **** break; - 375:Src/main.c **** case DECODE_TASK: - 376:Src/main.c **** if (CheckChecksum(COMMAND)) - 377:Src/main.c **** { - 378:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 379:Src/main.c **** TO6_before = TO6; - 380:Src/main.c **** CPU_state = RUN_TASK; - 381:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 382:Src/main.c **** } - 383:Src/main.c **** else - 384:Src/main.c **** { - 385:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; - 386:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 387:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 388:Src/main.c **** } - 389:Src/main.c **** UART_transmission_request = MESS_01; - ARM GAS /tmp/ccfIOqv2.s page 46 + 333:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 334:Src/main.c **** temp16 = Get_ADC(1); + 335:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 336:Src/main.c **** + 337:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 338:Src/main.c **** temp16 = Get_ADC(1); + 339:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 340:Src/main.c **** + 341:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 342:Src/main.c **** temp16 = Get_ADC(1); + 343:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 344:Src/main.c **** + 345:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 346:Src/main.c **** temp16 = Get_ADC(1); + 347:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 348:Src/main.c **** temp16 = Get_ADC(2); + 349:Src/main.c **** + 350:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 351:Src/main.c **** temp16 = Get_ADC(3); + 352:Src/main.c **** temp16 = Get_ADC(4); + 353:Src/main.c **** Long_Data[12] = temp16; + 354:Src/main.c **** temp16 = Get_ADC(5); + 355:Src/main.c **** + 356:Src/main.c **** //Put the timer tick to Long_Data: + 357:Src/main.c **** TO6_stop = TO6; + 358:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 359:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 360:Src/main.c **** + 361:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 362:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 363:Src/main.c **** + 364:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 365:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 366:Src/main.c **** + 367:Src/main.c **** if (Curr_setup.SD_EN==1) + 368:Src/main.c **** { + 369:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 370:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 371:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 372:Src/main.c **** State_Data[0]|=temp16&0xff; + 373:Src/main.c **** } + 374:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 375:Src/main.c **** } + 376:Src/main.c **** break; + 377:Src/main.c **** case DECODE_TASK: + 378:Src/main.c **** if (CheckChecksum(COMMAND)) + 379:Src/main.c **** { + 380:Src/main.c **** Decode_task(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 381:Src/main.c **** TO6_before = TO6; + 382:Src/main.c **** CPU_state = RUN_TASK; + 383:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 384:Src/main.c **** } + 385:Src/main.c **** else + 386:Src/main.c **** { + 387:Src/main.c **** State_Data[0] |= UART_DECODE_ERR; + 388:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 389:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + ARM GAS /tmp/ccyYWdjY.s page 46 - 390:Src/main.c **** break; - 391:Src/main.c **** case RUN_TASK: - 392:Src/main.c **** switch (task.task_type) - 393:Src/main.c **** { - 394:Src/main.c **** case TT_CHANGE_CURR_1: - 395:Src/main.c **** - 396:Src/main.c **** - 397:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator - 398:Src/main.c **** //ADC clock - 399:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz - 400:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz - 401:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz - 402:Src/main.c **** - 403:Src/main.c **** //online calculation for debug purposes: - 404:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running - 405:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; - 406:Src/main.c **** - 407:Src/main.c **** - 408:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) - 409:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; - 410:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 411:Src/main.c **** - 412:Src/main.c **** - 413:Src/main.c **** //for stm_ADC - 414:Src/main.c **** //TIM4 -- ADC clock. Rising edge -- for SYNC_DETector_ON - 415:Src/main.c **** //TIM4 -- ADC clock. Falling edge -- for SYNC_DETector_OFF - 416:Src/main.c **** - 417:Src/main.c **** //TIM4 freq is equal to TIM11 - 418:Src/main.c **** //TIM4 phase should be adjustable to get correct sampling moment - 419:Src/main.c **** - 420:Src/main.c **** + 390:Src/main.c **** } + 391:Src/main.c **** UART_transmission_request = MESS_01; + 392:Src/main.c **** break; + 393:Src/main.c **** case RUN_TASK: + 394:Src/main.c **** switch (task.task_type) + 395:Src/main.c **** { + 396:Src/main.c **** case TT_CHANGE_CURR_1: + 397:Src/main.c **** + 398:Src/main.c **** + 399:Src/main.c **** //calculating timer periods for ADC clock and Mach-Zander modulator + 400:Src/main.c **** //ADC clock + 401:Src/main.c **** //TIM4 -> ARR = 60; // for 1.5 MHz + 402:Src/main.c **** //TIM4 -> ARR = 91; // for 1 MHz + 403:Src/main.c **** //TIM4 -> ARR = 45; // for 2 MHz + 404:Src/main.c **** + 405:Src/main.c **** //online calculation for debug purposes: + 406:Src/main.c **** //manually varying TIM4 -> ARR by debugger while running + 407:Src/main.c **** //TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; + 408:Src/main.c **** + 409:Src/main.c **** + 410:Src/main.c **** //Mach-Zander clock (should be half of ADC clock freq) + 411:Src/main.c **** //TIM11 -> ARR = (TIM4 -> ARR +1)*2 - 1; + 412:Src/main.c **** //TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; + 413:Src/main.c **** + 414:Src/main.c **** + 415:Src/main.c **** //for stm_ADC + 416:Src/main.c **** //TIM4 -- ADC clock. Rising edge -- for SYNC_DETector_ON + 417:Src/main.c **** //TIM4 -- ADC clock. Falling edge -- for SYNC_DETector_OFF + 418:Src/main.c **** + 419:Src/main.c **** //TIM4 freq is equal to TIM11 + 420:Src/main.c **** //TIM4 phase should be adjustable to get correct sampling moment 421:Src/main.c **** - 422:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); - 423:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 424:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 425:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 426:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 427:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 428:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 429:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 430:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 431:Src/main.c **** - 432:Src/main.c **** // Toggle pin for oscilloscope - 433:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc - 434:Src/main.c **** //for (uint32_t i = 100000; i; --i){;} - 435:Src/main.c **** - 436:Src/main.c **** - 437:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 438:Src/main.c **** if (st != HAL_OK) - 439:Src/main.c **** while(1); - 440:Src/main.c **** - 441:Src/main.c **** uint16_t step_counter = 0; - 442:Src/main.c **** uint16_t trigger_counter = 0; - 443:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 444:Src/main.c **** uint16_t task_sheduler = 0; - 445:Src/main.c **** - 446:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 47 + 422:Src/main.c **** + 423:Src/main.c **** + 424:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.curr); + 425:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 426:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 427:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 428:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 429:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 430:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 431:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 432:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 433:Src/main.c **** + 434:Src/main.c **** // Toggle pin for oscilloscope + 435:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); //start of the whole frequency sweep proc + 436:Src/main.c **** //for (uint32_t i = 100000; i; --i){;} + 437:Src/main.c **** + 438:Src/main.c **** + 439:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 440:Src/main.c **** if (st != HAL_OK) + 441:Src/main.c **** while(1); + 442:Src/main.c **** + 443:Src/main.c **** uint16_t step_counter = 0; + 444:Src/main.c **** uint16_t trigger_counter = 0; + 445:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 446:Src/main.c **** uint16_t task_sheduler = 0; + ARM GAS /tmp/ccyYWdjY.s page 47 447:Src/main.c **** - 448:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 449:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 450:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 451:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 452:Src/main.c **** - 453:Src/main.c **** + 448:Src/main.c **** + 449:Src/main.c **** + 450:Src/main.c **** HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 451:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 452:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 453:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode 454:Src/main.c **** - 455:Src/main.c **** TIM11 -> CNT = 0; - 456:Src/main.c **** TIM4 -> CNT = 0; - 457:Src/main.c **** - 458:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 459:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 460:Src/main.c **** //TIM4 -> CNT = 0; - 461:Src/main.c **** - 462:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de - 463:Src/main.c **** TIM11 -> CNT = 0; - 464:Src/main.c **** - 465:Src/main.c **** uint32_t curr_step_N = 0; - 466:Src/main.c **** uint32_t postAmpl_1_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 1.0) / task - 467:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 468:Src/main.c **** - 469:Src/main.c **** - 470:Src/main.c **** while (task.current_param < task.max_param) - 471:Src/main.c **** { - 472:Src/main.c **** if (TIM10_coflag) - 473:Src/main.c **** { - 474:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 475:Src/main.c **** HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_9); //toggle PG9. Change indicates that current step sta - 476:Src/main.c **** - 477:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase - 478:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase - 479:Src/main.c **** task.current_param += task.delta_param; - 480:Src/main.c **** TO10 = 0; - 481:Src/main.c **** TIM10_coflag = 0; - 482:Src/main.c **** - 483:Src/main.c **** if (curr_step_N == postAmpl_1_en_curr_step_N){ - 484:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); - 485:Src/main.c **** } - 486:Src/main.c **** if (curr_step_N == postAmpl_2_en_curr_step_N){ - 487:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; - 488:Src/main.c **** } - 489:Src/main.c **** - 490:Src/main.c **** + 455:Src/main.c **** + 456:Src/main.c **** + 457:Src/main.c **** TIM11 -> CNT = 0; + 458:Src/main.c **** TIM4 -> CNT = 0; + 459:Src/main.c **** + 460:Src/main.c **** HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 461:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 462:Src/main.c **** //TIM4 -> CNT = 0; + 463:Src/main.c **** + 464:Src/main.c **** TIM4 -> CNT = TIM4 -> ARR - 20; // not zero to make phase shift that will be robust to big de + 465:Src/main.c **** TIM11 -> CNT = 0; + 466:Src/main.c **** + 467:Src/main.c **** uint32_t curr_step_N = 0; + 468:Src/main.c **** uint32_t postAmpl_1_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 1.0) / task + 469:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 470:Src/main.c **** + 471:Src/main.c **** + 472:Src/main.c **** while (task.current_param < task.max_param) + 473:Src/main.c **** { + 474:Src/main.c **** if (TIM10_coflag) + 475:Src/main.c **** { + 476:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 477:Src/main.c **** HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_9); //toggle PG9. Change indicates that current step sta + 478:Src/main.c **** + 479:Src/main.c **** //TIM11 -> CNT = 0; // to link modulator phase + 480:Src/main.c **** //TIM4 -> CNT = 0; // to link ADC clock phase + 481:Src/main.c **** task.current_param += task.delta_param; + 482:Src/main.c **** TO10 = 0; + 483:Src/main.c **** TIM10_coflag = 0; + 484:Src/main.c **** + 485:Src/main.c **** if (curr_step_N == postAmpl_1_en_curr_step_N){ + 486:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); + 487:Src/main.c **** } + 488:Src/main.c **** if (curr_step_N == postAmpl_2_en_curr_step_N){ + 489:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; + 490:Src/main.c **** } 491:Src/main.c **** - 492:Src/main.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current - 493:Src/main.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); - 494:Src/main.c **** //* - 495:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step - 496:Src/main.c **** OUT_trigger(trigger_counter); - 497:Src/main.c **** ++trigger_counter; - 498:Src/main.c **** } - 499:Src/main.c **** ++step_counter; - 500:Src/main.c **** - 501:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); //stop trigger pulse - 502:Src/main.c **** //*/ - 503:Src/main.c **** /* - ARM GAS /tmp/ccfIOqv2.s page 48 + 492:Src/main.c **** + 493:Src/main.c **** + 494:Src/main.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_SET); // set the current step laser current + 495:Src/main.c **** //HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9, GPIO_PIN_RESET); + 496:Src/main.c **** //* + 497:Src/main.c **** if (step_counter % trigger_step == 0){ //trigger at every 60 step + 498:Src/main.c **** OUT_trigger(trigger_counter); + 499:Src/main.c **** ++trigger_counter; + 500:Src/main.c **** } + 501:Src/main.c **** ++step_counter; + 502:Src/main.c **** + 503:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); //stop trigger pulse + ARM GAS /tmp/ccyYWdjY.s page 48 - 504:Src/main.c **** ++task_sheduler; - 505:Src/main.c **** if (task_sheduler >= 10){ - 506:Src/main.c **** task_sheduler = 0; - 507:Src/main.c **** } - 508:Src/main.c **** //maintain stable temperature of laser 2 - 509:Src/main.c **** if (task_sheduler == 0){ - 510:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 511:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 512:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 513:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 514:Src/main.c **** } - 515:Src/main.c **** //maintain stable temperature of laser 1 - 516:Src/main.c **** //* - 517:Src/main.c **** if (task_sheduler == 5){ - 518:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 519:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 520:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 521:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 522:Src/main.c **** } - 523:Src/main.c **** //*/ - 524:Src/main.c **** } - 525:Src/main.c **** } - 526:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o - 527:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 528:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda - 529:Src/main.c **** //but one-pulse mode should be disabled - 530:Src/main.c **** - 531:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator - 532:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 533:Src/main.c **** - 534:Src/main.c **** + 504:Src/main.c **** //*/ + 505:Src/main.c **** /* + 506:Src/main.c **** ++task_sheduler; + 507:Src/main.c **** if (task_sheduler >= 10){ + 508:Src/main.c **** task_sheduler = 0; + 509:Src/main.c **** } + 510:Src/main.c **** //maintain stable temperature of laser 2 + 511:Src/main.c **** if (task_sheduler == 0){ + 512:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 513:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 514:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 515:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 516:Src/main.c **** } + 517:Src/main.c **** //maintain stable temperature of laser 1 + 518:Src/main.c **** //* + 519:Src/main.c **** if (task_sheduler == 5){ + 520:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 521:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 522:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 523:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 524:Src/main.c **** } + 525:Src/main.c **** //*/ + 526:Src/main.c **** } + 527:Src/main.c **** } + 528:Src/main.c **** TIM11 -> DIER |= 1; //enable update interrupt. In this IRQ handler we will set both tims to o + 529:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 530:Src/main.c **** //TIM4 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upda + 531:Src/main.c **** //but one-pulse mode should be disabled + 532:Src/main.c **** + 533:Src/main.c **** //HAL_TIM_PWM_Stop(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator + 534:Src/main.c **** //HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock 535:Src/main.c **** - 536:Src/main.c **** Stop_TIM10(); - 537:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 538:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 539:Src/main.c **** - 540:Src/main.c **** task.current_param = task.min_param; - 541:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 542:Src/main.c **** if (task.tau > 3) - 543:Src/main.c **** { - 544:Src/main.c **** TIM10_period = htim10.Init.Period; - 545:Src/main.c **** htim10.Init.Period = 9999; - 546:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 547:Src/main.c **** } - 548:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 549:Src/main.c **** break; - 550:Src/main.c **** case TT_CHANGE_CURR_2: - 551:Src/main.c **** //Blink laser 2 - 552:Src/main.c **** //* - 553:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 554:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 555:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 556:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 557:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 558:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 559:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 560:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - ARM GAS /tmp/ccfIOqv2.s page 49 + 536:Src/main.c **** + 537:Src/main.c **** + 538:Src/main.c **** Stop_TIM10(); + 539:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 540:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 541:Src/main.c **** + 542:Src/main.c **** task.current_param = task.min_param; + 543:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 544:Src/main.c **** if (task.tau > 3) + 545:Src/main.c **** { + 546:Src/main.c **** TIM10_period = htim10.Init.Period; + 547:Src/main.c **** htim10.Init.Period = 9999; + 548:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 549:Src/main.c **** } + 550:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 551:Src/main.c **** break; + 552:Src/main.c **** case TT_CHANGE_CURR_2: + 553:Src/main.c **** //Blink laser 2 + 554:Src/main.c **** //* + 555:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 556:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 557:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 558:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 559:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 560:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + ARM GAS /tmp/ccyYWdjY.s page 49 - 561:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 562:Src/main.c **** - 563:Src/main.c **** LD_blinker.task_type = 2; - 564:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 565:Src/main.c **** //LD_blinker.param = task.current_param; - 566:Src/main.c **** LD_blinker.param = 0; - 567:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 568:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 569:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 570:Src/main.c **** - 571:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). - 572:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 573:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); - 574:Src/main.c **** if (st != HAL_OK) - 575:Src/main.c **** while(1); - 576:Src/main.c **** // */ - 577:Src/main.c **** - 578:Src/main.c **** // Toggle pin for oscilloscope - 579:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 580:Src/main.c **** uint32_t i = 10000; while (--i){} - 581:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 582:Src/main.c **** LD_blinker.state = 2; - 583:Src/main.c **** - 584:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 585:Src/main.c **** if (st != HAL_OK) - 586:Src/main.c **** while(1); - 587:Src/main.c **** while (task.current_param < task.max_param) - 588:Src/main.c **** { - 589:Src/main.c **** if (TIM10_coflag) - 590:Src/main.c **** { - 591:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 592:Src/main.c **** //LD_blinker.param = task.current_param; - 593:Src/main.c **** //++LD_blinker.param; - 594:Src/main.c **** task.current_param += task.delta_param; - 595:Src/main.c **** TO10 = 0; - 596:Src/main.c **** TIM10_coflag = 0; - 597:Src/main.c **** - 598:Src/main.c **** - 599:Src/main.c **** } - 600:Src/main.c **** } - 601:Src/main.c **** HAL_TIM_Base_Stop(&htim10); - 602:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 603:Src/main.c **** - 604:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 561:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 562:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 563:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 564:Src/main.c **** + 565:Src/main.c **** LD_blinker.task_type = 2; + 566:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 567:Src/main.c **** //LD_blinker.param = task.current_param; + 568:Src/main.c **** LD_blinker.param = 0; + 569:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 570:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 571:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 572:Src/main.c **** + 573:Src/main.c **** TIM8->ARR = 10000; //zero to LD_blinker.param change frequency (also in unspecified units). + 574:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 575:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim8); + 576:Src/main.c **** if (st != HAL_OK) + 577:Src/main.c **** while(1); + 578:Src/main.c **** // */ + 579:Src/main.c **** + 580:Src/main.c **** // Toggle pin for oscilloscope + 581:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 582:Src/main.c **** uint32_t i = 10000; while (--i){} + 583:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 584:Src/main.c **** LD_blinker.state = 2; + 585:Src/main.c **** + 586:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 587:Src/main.c **** if (st != HAL_OK) + 588:Src/main.c **** while(1); + 589:Src/main.c **** while (task.current_param < task.max_param) + 590:Src/main.c **** { + 591:Src/main.c **** if (TIM10_coflag) + 592:Src/main.c **** { + 593:Src/main.c **** //Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 594:Src/main.c **** //LD_blinker.param = task.current_param; + 595:Src/main.c **** //++LD_blinker.param; + 596:Src/main.c **** task.current_param += task.delta_param; + 597:Src/main.c **** TO10 = 0; + 598:Src/main.c **** TIM10_coflag = 0; + 599:Src/main.c **** + 600:Src/main.c **** + 601:Src/main.c **** } + 602:Src/main.c **** } + 603:Src/main.c **** HAL_TIM_Base_Stop(&htim10); + 604:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); 605:Src/main.c **** - 606:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); - 607:Src/main.c **** TIM8->CNT = 0; - 608:Src/main.c **** - 609:Src/main.c **** Stop_TIM10(); - 610:Src/main.c **** task.current_param = task.min_param; - 611:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 612:Src/main.c **** if (task.tau > 3) - 613:Src/main.c **** { - 614:Src/main.c **** TIM10_period = htim10.Init.Period; - 615:Src/main.c **** htim10.Init.Period = 9999; - 616:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 617:Src/main.c **** } - ARM GAS /tmp/ccfIOqv2.s page 50 + 606:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 607:Src/main.c **** + 608:Src/main.c **** HAL_TIM_Base_Stop_IT(&htim8); + 609:Src/main.c **** TIM8->CNT = 0; + 610:Src/main.c **** + 611:Src/main.c **** Stop_TIM10(); + 612:Src/main.c **** task.current_param = task.min_param; + 613:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 614:Src/main.c **** if (task.tau > 3) + 615:Src/main.c **** { + 616:Src/main.c **** TIM10_period = htim10.Init.Period; + 617:Src/main.c **** htim10.Init.Period = 9999; + ARM GAS /tmp/ccyYWdjY.s page 50 - 618:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 619:Src/main.c **** - 620:Src/main.c **** - 621:Src/main.c **** //*/ + 618:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 619:Src/main.c **** } + 620:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 621:Src/main.c **** 622:Src/main.c **** - 623:Src/main.c **** /* // Backup - 624:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); - 625:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 626:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 627:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 628:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 629:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 630:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 631:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 632:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 633:Src/main.c **** - 634:Src/main.c **** // Toggle pin for oscilloscope - 635:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 636:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 637:Src/main.c **** - 638:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); - 639:Src/main.c **** if (st != HAL_OK) - 640:Src/main.c **** while(1); - 641:Src/main.c **** while (task.current_param < task.max_param) - 642:Src/main.c **** { - 643:Src/main.c **** if (TIM10_coflag) - 644:Src/main.c **** { - 645:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 646:Src/main.c **** task.current_param += task.delta_param; - 647:Src/main.c **** TO10 = 0; - 648:Src/main.c **** TIM10_coflag = 0; - 649:Src/main.c **** - 650:Src/main.c **** - 651:Src/main.c **** } - 652:Src/main.c **** } - 653:Src/main.c **** Stop_TIM10(); - 654:Src/main.c **** task.current_param = task.min_param; - 655:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 656:Src/main.c **** if (task.tau > 3) - 657:Src/main.c **** { - 658:Src/main.c **** TIM10_period = htim10.Init.Period; - 659:Src/main.c **** htim10.Init.Period = 9999; - 660:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 661:Src/main.c **** } - 662:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); - 663:Src/main.c **** */ - 664:Src/main.c **** - 665:Src/main.c **** - 666:Src/main.c **** break; - 667:Src/main.c **** case TT_CHANGE_TEMP_1: - 668:Src/main.c **** // isn't implemented - 669:Src/main.c **** break; - 670:Src/main.c **** case TT_CHANGE_TEMP_2: - 671:Src/main.c **** // isn't implemented - 672:Src/main.c **** break; - 673:Src/main.c **** } - 674:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 51 + 623:Src/main.c **** //*/ + 624:Src/main.c **** + 625:Src/main.c **** /* // Backup + 626:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.curr); + 627:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 628:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 629:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 630:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 631:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 632:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 633:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 634:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 635:Src/main.c **** + 636:Src/main.c **** // Toggle pin for oscilloscope + 637:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 638:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 639:Src/main.c **** + 640:Src/main.c **** st = HAL_TIM_Base_Start_IT(&htim10); + 641:Src/main.c **** if (st != HAL_OK) + 642:Src/main.c **** while(1); + 643:Src/main.c **** while (task.current_param < task.max_param) + 644:Src/main.c **** { + 645:Src/main.c **** if (TIM10_coflag) + 646:Src/main.c **** { + 647:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 648:Src/main.c **** task.current_param += task.delta_param; + 649:Src/main.c **** TO10 = 0; + 650:Src/main.c **** TIM10_coflag = 0; + 651:Src/main.c **** + 652:Src/main.c **** + 653:Src/main.c **** } + 654:Src/main.c **** } + 655:Src/main.c **** Stop_TIM10(); + 656:Src/main.c **** task.current_param = task.min_param; + 657:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 658:Src/main.c **** if (task.tau > 3) + 659:Src/main.c **** { + 660:Src/main.c **** TIM10_period = htim10.Init.Period; + 661:Src/main.c **** htim10.Init.Period = 9999; + 662:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 663:Src/main.c **** } + 664:Src/main.c **** HAL_TIM_Base_Start_IT(&htim10); + 665:Src/main.c **** */ + 666:Src/main.c **** + 667:Src/main.c **** + 668:Src/main.c **** break; + 669:Src/main.c **** case TT_CHANGE_TEMP_1: + 670:Src/main.c **** // isn't implemented + 671:Src/main.c **** break; + 672:Src/main.c **** case TT_CHANGE_TEMP_2: + 673:Src/main.c **** // isn't implemented + 674:Src/main.c **** break; + ARM GAS /tmp/ccyYWdjY.s page 51 - 675:Src/main.c **** if (TO7>TO7_before) - 676:Src/main.c **** { - 677:Src/main.c **** TO7_before = TO7; - 678:Src/main.c **** - 679:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 680:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 681:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 682:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 683:Src/main.c **** - 684:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data - 685:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 686:Src/main.c **** - 687:Src/main.c **** //Prepare DATA of internals ADCs - 688:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 689:Src/main.c **** temp16 = Get_ADC(0); - 690:Src/main.c **** temp16 = Get_ADC(1); - 691:Src/main.c **** Long_Data[7] = temp16; - 692:Src/main.c **** - 693:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 694:Src/main.c **** temp16 = Get_ADC(1); - 695:Src/main.c **** Long_Data[8] = temp16; - 696:Src/main.c **** - 697:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 698:Src/main.c **** temp16 = Get_ADC(1); - 699:Src/main.c **** Long_Data[9] = temp16; - 700:Src/main.c **** - 701:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 702:Src/main.c **** temp16 = Get_ADC(1); - 703:Src/main.c **** Long_Data[10] = temp16; - 704:Src/main.c **** - 705:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 706:Src/main.c **** temp16 = Get_ADC(1); - 707:Src/main.c **** Long_Data[11] = temp16; - 708:Src/main.c **** temp16 = Get_ADC(2); - 709:Src/main.c **** - 710:Src/main.c **** //Put the temperature of LD2 to Long_Data: - 711:Src/main.c **** temp16 = Get_ADC(3); - 712:Src/main.c **** temp16 = Get_ADC(4); - 713:Src/main.c **** Long_Data[12] = temp16; - 714:Src/main.c **** temp16 = Get_ADC(5); - 715:Src/main.c **** - 716:Src/main.c **** //Put the timer tick to Long_Data: - 717:Src/main.c **** TO6_stop = TO6; - 718:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 719:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 720:Src/main.c **** - 721:Src/main.c **** //Put the average temperature of LD1 to Long_Data: - 722:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; - 723:Src/main.c **** - 724:Src/main.c **** //Put the average temperature of LD2 to Long_Data: - 725:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; - 726:Src/main.c **** } - 727:Src/main.c **** while (!TIM10_coflag); - 728:Src/main.c **** - 729:Src/main.c **** Stop_TIM10(); + 675:Src/main.c **** } + 676:Src/main.c **** + 677:Src/main.c **** if (TO7>TO7_before) + 678:Src/main.c **** { + 679:Src/main.c **** TO7_before = TO7; + 680:Src/main.c **** + 681:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 682:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 683:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 684:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 685:Src/main.c **** + 686:Src/main.c **** Long_Data[1] = LD1_param.POWER;//Translate Data from monitor photodiode of LD1 to Long_Data + 687:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 688:Src/main.c **** + 689:Src/main.c **** //Prepare DATA of internals ADCs + 690:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 691:Src/main.c **** temp16 = Get_ADC(0); + 692:Src/main.c **** temp16 = Get_ADC(1); + 693:Src/main.c **** Long_Data[7] = temp16; + 694:Src/main.c **** + 695:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 696:Src/main.c **** temp16 = Get_ADC(1); + 697:Src/main.c **** Long_Data[8] = temp16; + 698:Src/main.c **** + 699:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 700:Src/main.c **** temp16 = Get_ADC(1); + 701:Src/main.c **** Long_Data[9] = temp16; + 702:Src/main.c **** + 703:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 704:Src/main.c **** temp16 = Get_ADC(1); + 705:Src/main.c **** Long_Data[10] = temp16; + 706:Src/main.c **** + 707:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 708:Src/main.c **** temp16 = Get_ADC(1); + 709:Src/main.c **** Long_Data[11] = temp16; + 710:Src/main.c **** temp16 = Get_ADC(2); + 711:Src/main.c **** + 712:Src/main.c **** //Put the temperature of LD2 to Long_Data: + 713:Src/main.c **** temp16 = Get_ADC(3); + 714:Src/main.c **** temp16 = Get_ADC(4); + 715:Src/main.c **** Long_Data[12] = temp16; + 716:Src/main.c **** temp16 = Get_ADC(5); + 717:Src/main.c **** + 718:Src/main.c **** //Put the timer tick to Long_Data: + 719:Src/main.c **** TO6_stop = TO6; + 720:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 721:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 722:Src/main.c **** + 723:Src/main.c **** //Put the average temperature of LD1 to Long_Data: + 724:Src/main.c **** Long_Data[5] = LD1_param.LD_CURR_TEMP; + 725:Src/main.c **** + 726:Src/main.c **** //Put the average temperature of LD2 to Long_Data: + 727:Src/main.c **** Long_Data[6] = LD2_param.LD_CURR_TEMP; + 728:Src/main.c **** } + 729:Src/main.c **** while (!TIM10_coflag); 730:Src/main.c **** - 731:Src/main.c **** if (task.tau > 3) - ARM GAS /tmp/ccfIOqv2.s page 52 + 731:Src/main.c **** Stop_TIM10(); + ARM GAS /tmp/ccyYWdjY.s page 52 - 732:Src/main.c **** { - 733:Src/main.c **** htim10.Init.Period = TIM10_period; - 734:Src/main.c **** TO10_counter = task.dt / 10; - 735:Src/main.c **** } - 736:Src/main.c **** - 737:Src/main.c **** CPU_state_old = RUN_TASK; - 738:Src/main.c **** break; - 739:Src/main.c **** } - 740:Src/main.c **** - 741:Src/main.c **** switch (UART_transmission_request) - 742:Src/main.c **** { - 743:Src/main.c **** case MESS_01://Default state - 744:Src/main.c **** USART_TX(State_Data,2); - 745:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 746:Src/main.c **** State_Data[0]=0; - 747:Src/main.c **** State_Data[1]=0;//All OK! - 748:Src/main.c **** UART_transmission_request = NO_MESS; - 749:Src/main.c **** break; - 750:Src/main.c **** case MESS_02://Transmith packet - 751:Src/main.c **** - 752:Src/main.c **** //Find CS and put to Long_Data: - 753:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); - 754:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 755:Src/main.c **** - 756:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 757:Src/main.c **** { - 758:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 759:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 760:Src/main.c **** } - 761:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); - 762:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 763:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 764:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 765:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 766:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 767:Src/main.c **** UART_transmission_request = NO_MESS; - 768:Src/main.c **** break; - 769:Src/main.c **** case MESS_03://Transmith saved packet - 770:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) - 771:Src/main.c **** { - 772:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; - 773:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 774:Src/main.c **** } - 775:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 776:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); - 777:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; - 778:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; - 779:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA - 780:Src/main.c **** UART_transmission_request = NO_MESS; - 781:Src/main.c **** break; - 782:Src/main.c **** } - 783:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of - 784:Src/main.c **** { - 785:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter - 786:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 787:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 788:Src/main.c **** flg_tmt = 0;//Reset timeout flag - ARM GAS /tmp/ccfIOqv2.s page 53 + 732:Src/main.c **** + 733:Src/main.c **** if (task.tau > 3) + 734:Src/main.c **** { + 735:Src/main.c **** htim10.Init.Period = TIM10_period; + 736:Src/main.c **** TO10_counter = task.dt / 10; + 737:Src/main.c **** } + 738:Src/main.c **** + 739:Src/main.c **** CPU_state_old = RUN_TASK; + 740:Src/main.c **** break; + 741:Src/main.c **** } + 742:Src/main.c **** + 743:Src/main.c **** switch (UART_transmission_request) + 744:Src/main.c **** { + 745:Src/main.c **** case MESS_01://Default state + 746:Src/main.c **** USART_TX(State_Data,2); + 747:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 748:Src/main.c **** State_Data[0]=0; + 749:Src/main.c **** State_Data[1]=0;//All OK! + 750:Src/main.c **** UART_transmission_request = NO_MESS; + 751:Src/main.c **** break; + 752:Src/main.c **** case MESS_02://Transmith packet + 753:Src/main.c **** + 754:Src/main.c **** //Find CS and put to Long_Data: + 755:Src/main.c **** CS_result = CalculateChecksum(&Long_Data[1], DL_16-2); + 756:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 757:Src/main.c **** + 758:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 759:Src/main.c **** { + 760:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 761:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 762:Src/main.c **** } + 763:Src/main.c **** //HAL_NVIC_SetPriority(DMA2_Stream7_IRQn, 0, 0); + 764:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 765:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 766:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 767:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 768:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 769:Src/main.c **** UART_transmission_request = NO_MESS; + 770:Src/main.c **** break; + 771:Src/main.c **** case MESS_03://Transmith saved packet + 772:Src/main.c **** for (uint16_t i = 0; i < DL_16; i++) + 773:Src/main.c **** { + 774:Src/main.c **** UART_DATA[i*2] = (Long_Data[i])&0xff; + 775:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 776:Src/main.c **** } + 777:Src/main.c **** //HAL_NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 778:Src/main.c **** //HAL_UART_Transmit_DMA(&huart1, UART_DATA, DL_8); + 779:Src/main.c **** //huart1.gState = HAL_UART_STATE_READY; + 780:Src/main.c **** //hdma_usart1_tx.State=HAL_DMA_STATE_BUSY; + 781:Src/main.c **** USART_TX_DMA (DL_8);//Send data by USART using DMA + 782:Src/main.c **** UART_transmission_request = NO_MESS; + 783:Src/main.c **** break; + 784:Src/main.c **** } + 785:Src/main.c **** if ((flg_tmt==1)&&((TO6-TO6_uart)>100))//Uart timeout handle. if timeout beetween zero byte of + 786:Src/main.c **** { + 787:Src/main.c **** UART_rec_incr = 0;//Reset uart command counter + 788:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + ARM GAS /tmp/ccyYWdjY.s page 53 - 789:Src/main.c **** } - 790:Src/main.c **** /* USER CODE END WHILE */ - 791:Src/main.c **** - 792:Src/main.c **** /* USER CODE BEGIN 3 */ - 793:Src/main.c **** } - 794:Src/main.c **** /* USER CODE END 3 */ - 795:Src/main.c **** } - 796:Src/main.c **** - 797:Src/main.c **** /** - 798:Src/main.c **** * @brief System Clock Configuration - 799:Src/main.c **** * @retval None - 800:Src/main.c **** */ - 801:Src/main.c **** void SystemClock_Config(void) - 802:Src/main.c **** { - 803:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 804:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 805:Src/main.c **** - 806:Src/main.c **** /** Configure the main internal regulator output voltage - 807:Src/main.c **** */ - 808:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); - 809:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 810:Src/main.c **** - 811:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters - 812:Src/main.c **** * in the RCC_OscInitTypeDef structure. - 813:Src/main.c **** */ - 814:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; - 815:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 816:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 817:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 822:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 823:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 824:Src/main.c **** { - 825:Src/main.c **** Error_Handler(); - 826:Src/main.c **** } - 827:Src/main.c **** - 828:Src/main.c **** /** Activate the Over-Drive mode - 829:Src/main.c **** */ - 830:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) - 831:Src/main.c **** { - 832:Src/main.c **** Error_Handler(); - 833:Src/main.c **** } - 834:Src/main.c **** - 835:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks - 836:Src/main.c **** */ - 837:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - 838:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 839:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; - 840:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 841:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 842:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 843:Src/main.c **** - 844:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) - 845:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 54 + 789:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 790:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 791:Src/main.c **** } + 792:Src/main.c **** /* USER CODE END WHILE */ + 793:Src/main.c **** + 794:Src/main.c **** /* USER CODE BEGIN 3 */ + 795:Src/main.c **** } + 796:Src/main.c **** /* USER CODE END 3 */ + 797:Src/main.c **** } + 798:Src/main.c **** + 799:Src/main.c **** /** + 800:Src/main.c **** * @brief System Clock Configuration + 801:Src/main.c **** * @retval None + 802:Src/main.c **** */ + 803:Src/main.c **** void SystemClock_Config(void) + 804:Src/main.c **** { + 805:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 806:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 807:Src/main.c **** + 808:Src/main.c **** /** Configure the main internal regulator output voltage + 809:Src/main.c **** */ + 810:Src/main.c **** __HAL_RCC_PWR_CLK_ENABLE(); + 811:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 812:Src/main.c **** + 813:Src/main.c **** /** Initializes the RCC Oscillators according to the specified parameters + 814:Src/main.c **** * in the RCC_OscInitTypeDef structure. + 815:Src/main.c **** */ + 816:Src/main.c **** RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + 817:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 822:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 823:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 824:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 825:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 826:Src/main.c **** { + 827:Src/main.c **** Error_Handler(); + 828:Src/main.c **** } + 829:Src/main.c **** + 830:Src/main.c **** /** Activate the Over-Drive mode + 831:Src/main.c **** */ + 832:Src/main.c **** if (HAL_PWREx_EnableOverDrive() != HAL_OK) + 833:Src/main.c **** { + 834:Src/main.c **** Error_Handler(); + 835:Src/main.c **** } + 836:Src/main.c **** + 837:Src/main.c **** /** Initializes the CPU, AHB and APB buses clocks + 838:Src/main.c **** */ + 839:Src/main.c **** RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK + 840:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 841:Src/main.c **** RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + 842:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 843:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 844:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 845:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 54 - 846:Src/main.c **** Error_Handler(); - 847:Src/main.c **** } - 848:Src/main.c **** } - 849:Src/main.c **** - 850:Src/main.c **** /** - 851:Src/main.c **** * @brief ADC1 Initialization Function - 852:Src/main.c **** * @param None - 853:Src/main.c **** * @retval None - 854:Src/main.c **** */ - 855:Src/main.c **** static void MX_ADC1_Init(void) - 856:Src/main.c **** { - 857:Src/main.c **** - 858:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ + 846:Src/main.c **** if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_6) != HAL_OK) + 847:Src/main.c **** { + 848:Src/main.c **** Error_Handler(); + 849:Src/main.c **** } + 850:Src/main.c **** } + 851:Src/main.c **** + 852:Src/main.c **** /** + 853:Src/main.c **** * @brief ADC1 Initialization Function + 854:Src/main.c **** * @param None + 855:Src/main.c **** * @retval None + 856:Src/main.c **** */ + 857:Src/main.c **** static void MX_ADC1_Init(void) + 858:Src/main.c **** { 859:Src/main.c **** - 860:Src/main.c **** /* USER CODE END ADC1_Init 0 */ + 860:Src/main.c **** /* USER CODE BEGIN ADC1_Init 0 */ 861:Src/main.c **** - 862:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 862:Src/main.c **** /* USER CODE END ADC1_Init 0 */ 863:Src/main.c **** - 864:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ + 864:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 865:Src/main.c **** - 866:Src/main.c **** /* USER CODE END ADC1_Init 1 */ + 866:Src/main.c **** /* USER CODE BEGIN ADC1_Init 1 */ 867:Src/main.c **** - 868:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 869:Src/main.c **** */ - 870:Src/main.c **** hadc1.Instance = ADC1; - 871:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 872:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 873:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 874:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 875:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 876:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 877:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 878:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 879:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 880:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 881:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 882:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 883:Src/main.c **** { - 884:Src/main.c **** Error_Handler(); - 885:Src/main.c **** } - 886:Src/main.c **** - 887:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 888:Src/main.c **** */ - 889:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; - 890:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 891:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 892:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 893:Src/main.c **** { - 894:Src/main.c **** Error_Handler(); - 895:Src/main.c **** } - 896:Src/main.c **** - 897:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 898:Src/main.c **** */ - 899:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; - 900:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 901:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 902:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 55 + 868:Src/main.c **** /* USER CODE END ADC1_Init 1 */ + 869:Src/main.c **** + 870:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 871:Src/main.c **** */ + 872:Src/main.c **** hadc1.Instance = ADC1; + 873:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 874:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 875:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 876:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 877:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 878:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 879:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 880:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 881:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 882:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 883:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 884:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 885:Src/main.c **** { + 886:Src/main.c **** Error_Handler(); + 887:Src/main.c **** } + 888:Src/main.c **** + 889:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 890:Src/main.c **** */ + 891:Src/main.c **** sConfig.Channel = ADC_CHANNEL_9; + 892:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 893:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 894:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 895:Src/main.c **** { + 896:Src/main.c **** Error_Handler(); + 897:Src/main.c **** } + 898:Src/main.c **** + 899:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 900:Src/main.c **** */ + 901:Src/main.c **** sConfig.Channel = ADC_CHANNEL_8; + 902:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + ARM GAS /tmp/ccyYWdjY.s page 55 - 903:Src/main.c **** Error_Handler(); - 904:Src/main.c **** } - 905:Src/main.c **** - 906:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 907:Src/main.c **** */ - 908:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; - 909:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 910:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 911:Src/main.c **** { - 912:Src/main.c **** Error_Handler(); - 913:Src/main.c **** } - 914:Src/main.c **** - 915:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 916:Src/main.c **** */ - 917:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; - 918:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 919:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 920:Src/main.c **** { - 921:Src/main.c **** Error_Handler(); - 922:Src/main.c **** } - 923:Src/main.c **** - 924:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 925:Src/main.c **** */ - 926:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; - 927:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 928:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 929:Src/main.c **** { - 930:Src/main.c **** Error_Handler(); - 931:Src/main.c **** } - 932:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ - 933:Src/main.c **** - 934:Src/main.c **** /* USER CODE END ADC1_Init 2 */ + 903:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 904:Src/main.c **** { + 905:Src/main.c **** Error_Handler(); + 906:Src/main.c **** } + 907:Src/main.c **** + 908:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 909:Src/main.c **** */ + 910:Src/main.c **** sConfig.Channel = ADC_CHANNEL_2; + 911:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 912:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 913:Src/main.c **** { + 914:Src/main.c **** Error_Handler(); + 915:Src/main.c **** } + 916:Src/main.c **** + 917:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 918:Src/main.c **** */ + 919:Src/main.c **** sConfig.Channel = ADC_CHANNEL_10; + 920:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 921:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 922:Src/main.c **** { + 923:Src/main.c **** Error_Handler(); + 924:Src/main.c **** } + 925:Src/main.c **** + 926:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 927:Src/main.c **** */ + 928:Src/main.c **** sConfig.Channel = ADC_CHANNEL_11; + 929:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 930:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 931:Src/main.c **** { + 932:Src/main.c **** Error_Handler(); + 933:Src/main.c **** } + 934:Src/main.c **** /* USER CODE BEGIN ADC1_Init 2 */ 935:Src/main.c **** - 936:Src/main.c **** } + 936:Src/main.c **** /* USER CODE END ADC1_Init 2 */ 937:Src/main.c **** - 938:Src/main.c **** /** - 939:Src/main.c **** * @brief ADC3 Initialization Function - 940:Src/main.c **** * @param None - 941:Src/main.c **** * @retval None - 942:Src/main.c **** */ - 943:Src/main.c **** static void MX_ADC3_Init(void) - 944:Src/main.c **** { - 945:Src/main.c **** - 946:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ + 938:Src/main.c **** } + 939:Src/main.c **** + 940:Src/main.c **** /** + 941:Src/main.c **** * @brief ADC3 Initialization Function + 942:Src/main.c **** * @param None + 943:Src/main.c **** * @retval None + 944:Src/main.c **** */ + 945:Src/main.c **** static void MX_ADC3_Init(void) + 946:Src/main.c **** { 947:Src/main.c **** - 948:Src/main.c **** /* USER CODE END ADC3_Init 0 */ + 948:Src/main.c **** /* USER CODE BEGIN ADC3_Init 0 */ 949:Src/main.c **** - 950:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; + 950:Src/main.c **** /* USER CODE END ADC3_Init 0 */ 951:Src/main.c **** - 952:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ + 952:Src/main.c **** ADC_ChannelConfTypeDef sConfig = {0}; 953:Src/main.c **** - 954:Src/main.c **** /* USER CODE END ADC3_Init 1 */ + 954:Src/main.c **** /* USER CODE BEGIN ADC3_Init 1 */ 955:Src/main.c **** - 956:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con - 957:Src/main.c **** */ - 958:Src/main.c **** hadc3.Instance = ADC3; - 959:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - ARM GAS /tmp/ccfIOqv2.s page 56 + 956:Src/main.c **** /* USER CODE END ADC3_Init 1 */ + 957:Src/main.c **** + 958:Src/main.c **** /** Configure the global features of the ADC (Clock, Resolution, Data Alignment and number of con + 959:Src/main.c **** */ + ARM GAS /tmp/ccyYWdjY.s page 56 - 960:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 961:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 962:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 963:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 964:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 965:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 966:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 967:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 968:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 969:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 970:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 971:Src/main.c **** { - 972:Src/main.c **** Error_Handler(); - 973:Src/main.c **** } - 974:Src/main.c **** - 975:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it - 976:Src/main.c **** */ - 977:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; - 978:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 979:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 980:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 981:Src/main.c **** { - 982:Src/main.c **** Error_Handler(); - 983:Src/main.c **** } - 984:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ - 985:Src/main.c **** - 986:Src/main.c **** /* USER CODE END ADC3_Init 2 */ + 960:Src/main.c **** hadc3.Instance = ADC3; + 961:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 962:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 963:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 964:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 965:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 966:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 967:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 968:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 969:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 970:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 971:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 972:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 973:Src/main.c **** { + 974:Src/main.c **** Error_Handler(); + 975:Src/main.c **** } + 976:Src/main.c **** + 977:Src/main.c **** /** Configure for the selected ADC regular channel its corresponding rank in the sequencer and it + 978:Src/main.c **** */ + 979:Src/main.c **** sConfig.Channel = ADC_CHANNEL_15; + 980:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 981:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 982:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 983:Src/main.c **** { + 984:Src/main.c **** Error_Handler(); + 985:Src/main.c **** } + 986:Src/main.c **** /* USER CODE BEGIN ADC3_Init 2 */ 987:Src/main.c **** - 988:Src/main.c **** } + 988:Src/main.c **** /* USER CODE END ADC3_Init 2 */ 989:Src/main.c **** - 990:Src/main.c **** /** - 991:Src/main.c **** * @brief SDMMC1 Initialization Function - 992:Src/main.c **** * @param None - 993:Src/main.c **** * @retval None - 994:Src/main.c **** */ - 995:Src/main.c **** static void MX_SDMMC1_SD_Init(void) - 996:Src/main.c **** { - 95 .loc 1 996 1 is_stmt 1 view -0 + 990:Src/main.c **** } + 991:Src/main.c **** + 992:Src/main.c **** /** + 993:Src/main.c **** * @brief SDMMC1 Initialization Function + 994:Src/main.c **** * @param None + 995:Src/main.c **** * @retval None + 996:Src/main.c **** */ + 997:Src/main.c **** static void MX_SDMMC1_SD_Init(void) + 998:Src/main.c **** { + 95 .loc 1 998 1 is_stmt 1 view -0 96 .cfi_startproc 97 @ args = 0, pretend = 0, frame = 0 98 @ frame_needed = 0, uses_anonymous_args = 0 99 @ link register save eliminated. - 997:Src/main.c **** - 998:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ 999:Src/main.c **** -1000:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ +1000:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 0 */ 1001:Src/main.c **** -1002:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1002:Src/main.c **** /* USER CODE END SDMMC1_Init 0 */ 1003:Src/main.c **** -1004:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ -1005:Src/main.c **** hsd1.Instance = SDMMC1; - 100 .loc 1 1005 3 view .LVU21 - 101 .loc 1 1005 17 is_stmt 0 view .LVU22 +1004:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 1 */ +1005:Src/main.c **** +1006:Src/main.c **** /* USER CODE END SDMMC1_Init 1 */ +1007:Src/main.c **** hsd1.Instance = SDMMC1; + 100 .loc 1 1007 3 view .LVU21 + 101 .loc 1 1007 17 is_stmt 0 view .LVU22 102 0000 064B ldr r3, .L6 103 0002 074A ldr r2, .L6+4 + ARM GAS /tmp/ccyYWdjY.s page 57 + + 104 0004 1A60 str r2, [r3] -1006:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; - ARM GAS /tmp/ccfIOqv2.s page 57 - - - 105 .loc 1 1006 3 is_stmt 1 view .LVU23 - 106 .loc 1 1006 23 is_stmt 0 view .LVU24 +1008:Src/main.c **** hsd1.Init.ClockEdge = SDMMC_CLOCK_EDGE_RISING; + 105 .loc 1 1008 3 is_stmt 1 view .LVU23 + 106 .loc 1 1008 23 is_stmt 0 view .LVU24 107 0006 0022 movs r2, #0 108 0008 5A60 str r2, [r3, #4] -1007:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; - 109 .loc 1 1007 3 is_stmt 1 view .LVU25 - 110 .loc 1 1007 25 is_stmt 0 view .LVU26 +1009:Src/main.c **** hsd1.Init.ClockBypass = SDMMC_CLOCK_BYPASS_DISABLE; + 109 .loc 1 1009 3 is_stmt 1 view .LVU25 + 110 .loc 1 1009 25 is_stmt 0 view .LVU26 111 000a 9A60 str r2, [r3, #8] -1008:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; - 112 .loc 1 1008 3 is_stmt 1 view .LVU27 - 113 .loc 1 1008 28 is_stmt 0 view .LVU28 +1010:Src/main.c **** hsd1.Init.ClockPowerSave = SDMMC_CLOCK_POWER_SAVE_DISABLE; + 112 .loc 1 1010 3 is_stmt 1 view .LVU27 + 113 .loc 1 1010 28 is_stmt 0 view .LVU28 114 000c DA60 str r2, [r3, #12] -1009:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; - 115 .loc 1 1009 3 is_stmt 1 view .LVU29 - 116 .loc 1 1009 21 is_stmt 0 view .LVU30 +1011:Src/main.c **** hsd1.Init.BusWide = SDMMC_BUS_WIDE_4B; + 115 .loc 1 1011 3 is_stmt 1 view .LVU29 + 116 .loc 1 1011 21 is_stmt 0 view .LVU30 117 000e 4FF40061 mov r1, #2048 118 0012 1961 str r1, [r3, #16] -1010:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; - 119 .loc 1 1010 3 is_stmt 1 view .LVU31 - 120 .loc 1 1010 33 is_stmt 0 view .LVU32 +1012:Src/main.c **** hsd1.Init.HardwareFlowControl = SDMMC_HARDWARE_FLOW_CONTROL_DISABLE; + 119 .loc 1 1012 3 is_stmt 1 view .LVU31 + 120 .loc 1 1012 33 is_stmt 0 view .LVU32 121 0014 5A61 str r2, [r3, #20] -1011:Src/main.c **** hsd1.Init.ClockDiv = 20; - 122 .loc 1 1011 3 is_stmt 1 view .LVU33 - 123 .loc 1 1011 22 is_stmt 0 view .LVU34 +1013:Src/main.c **** hsd1.Init.ClockDiv = 20; + 122 .loc 1 1013 3 is_stmt 1 view .LVU33 + 123 .loc 1 1013 22 is_stmt 0 view .LVU34 124 0016 1422 movs r2, #20 125 0018 9A61 str r2, [r3, #24] -1012:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ -1013:Src/main.c **** -1014:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1014:Src/main.c **** /* USER CODE BEGIN SDMMC1_Init 2 */ 1015:Src/main.c **** -1016:Src/main.c **** } - 126 .loc 1 1016 1 view .LVU35 +1016:Src/main.c **** /* USER CODE END SDMMC1_Init 2 */ +1017:Src/main.c **** +1018:Src/main.c **** } + 126 .loc 1 1018 1 view .LVU35 127 001a 7047 bx lr 128 .L7: 129 .align 2 @@ -3408,768 +3410,768 @@ ARM GAS /tmp/ccfIOqv2.s page 1 140 .thumb_func 142 MX_DMA_Init: 143 .LFB1205: -1017:Src/main.c **** -1018:Src/main.c **** /** -1019:Src/main.c **** * @brief SPI2 Initialization Function -1020:Src/main.c **** * @param None -1021:Src/main.c **** * @retval None -1022:Src/main.c **** */ -1023:Src/main.c **** static void MX_SPI2_Init(void) -1024:Src/main.c **** { -1025:Src/main.c **** -1026:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ - ARM GAS /tmp/ccfIOqv2.s page 58 +1019:Src/main.c **** +1020:Src/main.c **** /** +1021:Src/main.c **** * @brief SPI2 Initialization Function +1022:Src/main.c **** * @param None +1023:Src/main.c **** * @retval None +1024:Src/main.c **** */ +1025:Src/main.c **** static void MX_SPI2_Init(void) +1026:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 58 1027:Src/main.c **** -1028:Src/main.c **** /* USER CODE END SPI2_Init 0 */ +1028:Src/main.c **** /* USER CODE BEGIN SPI2_Init 0 */ 1029:Src/main.c **** -1030:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1030:Src/main.c **** /* USER CODE END SPI2_Init 0 */ 1031:Src/main.c **** -1032:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1032:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1033:Src/main.c **** -1034:Src/main.c **** /* Peripheral clock enable */ -1035:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); -1036:Src/main.c **** -1037:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); -1038:Src/main.c **** /**SPI2 GPIO Configuration -1039:Src/main.c **** PB13 ------> SPI2_SCK -1040:Src/main.c **** PB15 ------> SPI2_MOSI -1041:Src/main.c **** */ -1042:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1043:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1044:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1045:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1046:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1047:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1048:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1049:Src/main.c **** -1050:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; -1051:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1052:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1053:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1054:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1055:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1056:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1057:Src/main.c **** -1058:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1034:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1035:Src/main.c **** +1036:Src/main.c **** /* Peripheral clock enable */ +1037:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_SPI2); +1038:Src/main.c **** +1039:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOB); +1040:Src/main.c **** /**SPI2 GPIO Configuration +1041:Src/main.c **** PB13 ------> SPI2_SCK +1042:Src/main.c **** PB15 ------> SPI2_MOSI +1043:Src/main.c **** */ +1044:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1045:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1046:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1047:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1048:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1049:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1050:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1051:Src/main.c **** +1052:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_15; +1053:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1054:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1055:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1056:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1057:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1058:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); 1059:Src/main.c **** -1060:Src/main.c **** /* USER CODE END SPI2_Init 1 */ -1061:Src/main.c **** /* SPI2 parameter configuration*/ -1062:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1063:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1064:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1065:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1066:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1067:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1068:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; -1069:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1070:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1071:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1072:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); -1073:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); -1074:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); -1075:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ -1076:Src/main.c **** -1077:Src/main.c **** /* USER CODE END SPI2_Init 2 */ +1060:Src/main.c **** /* USER CODE BEGIN SPI2_Init 1 */ +1061:Src/main.c **** +1062:Src/main.c **** /* USER CODE END SPI2_Init 1 */ +1063:Src/main.c **** /* SPI2 parameter configuration*/ +1064:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1065:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1066:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1067:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1068:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1069:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1070:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; +1071:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1072:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1073:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1074:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); +1075:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); +1076:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); +1077:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ 1078:Src/main.c **** -1079:Src/main.c **** } +1079:Src/main.c **** /* USER CODE END SPI2_Init 2 */ 1080:Src/main.c **** -1081:Src/main.c **** /** -1082:Src/main.c **** * @brief SPI4 Initialization Function -1083:Src/main.c **** * @param None - ARM GAS /tmp/ccfIOqv2.s page 59 +1081:Src/main.c **** } +1082:Src/main.c **** +1083:Src/main.c **** /** + ARM GAS /tmp/ccyYWdjY.s page 59 -1084:Src/main.c **** * @retval None -1085:Src/main.c **** */ -1086:Src/main.c **** static void MX_SPI4_Init(void) -1087:Src/main.c **** { -1088:Src/main.c **** -1089:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ +1084:Src/main.c **** * @brief SPI4 Initialization Function +1085:Src/main.c **** * @param None +1086:Src/main.c **** * @retval None +1087:Src/main.c **** */ +1088:Src/main.c **** static void MX_SPI4_Init(void) +1089:Src/main.c **** { 1090:Src/main.c **** -1091:Src/main.c **** /* USER CODE END SPI4_Init 0 */ +1091:Src/main.c **** /* USER CODE BEGIN SPI4_Init 0 */ 1092:Src/main.c **** -1093:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1093:Src/main.c **** /* USER CODE END SPI4_Init 0 */ 1094:Src/main.c **** -1095:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1095:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1096:Src/main.c **** -1097:Src/main.c **** /* Peripheral clock enable */ -1098:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); -1099:Src/main.c **** -1100:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); -1101:Src/main.c **** /**SPI4 GPIO Configuration -1102:Src/main.c **** PE12 ------> SPI4_SCK -1103:Src/main.c **** PE13 ------> SPI4_MISO -1104:Src/main.c **** */ -1105:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; -1106:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1107:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1108:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1109:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1110:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1111:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1112:Src/main.c **** -1113:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; -1114:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1115:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1116:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1117:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1118:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1119:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1120:Src/main.c **** -1121:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1097:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1098:Src/main.c **** +1099:Src/main.c **** /* Peripheral clock enable */ +1100:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI4); +1101:Src/main.c **** +1102:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOE); +1103:Src/main.c **** /**SPI4 GPIO Configuration +1104:Src/main.c **** PE12 ------> SPI4_SCK +1105:Src/main.c **** PE13 ------> SPI4_MISO +1106:Src/main.c **** */ +1107:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_12; +1108:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1109:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1110:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1111:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1112:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1113:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1114:Src/main.c **** +1115:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_13; +1116:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1117:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1118:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1119:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1120:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1121:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); 1122:Src/main.c **** -1123:Src/main.c **** /* USER CODE END SPI4_Init 1 */ -1124:Src/main.c **** /* SPI4 parameter configuration*/ -1125:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1126:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1127:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1128:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1129:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1130:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1131:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1132:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1133:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1134:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1135:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); -1136:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); -1137:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); -1138:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ -1139:Src/main.c **** -1140:Src/main.c **** /* USER CODE END SPI4_Init 2 */ - ARM GAS /tmp/ccfIOqv2.s page 60 +1123:Src/main.c **** /* USER CODE BEGIN SPI4_Init 1 */ +1124:Src/main.c **** +1125:Src/main.c **** /* USER CODE END SPI4_Init 1 */ +1126:Src/main.c **** /* SPI4 parameter configuration*/ +1127:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1128:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1129:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1130:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1131:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1132:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1133:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1134:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1135:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1136:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1137:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); +1138:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); +1139:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); +1140:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + ARM GAS /tmp/ccyYWdjY.s page 60 1141:Src/main.c **** -1142:Src/main.c **** } +1142:Src/main.c **** /* USER CODE END SPI4_Init 2 */ 1143:Src/main.c **** -1144:Src/main.c **** /** -1145:Src/main.c **** * @brief SPI5 Initialization Function -1146:Src/main.c **** * @param None -1147:Src/main.c **** * @retval None -1148:Src/main.c **** */ -1149:Src/main.c **** static void MX_SPI5_Init(void) -1150:Src/main.c **** { -1151:Src/main.c **** -1152:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ +1144:Src/main.c **** } +1145:Src/main.c **** +1146:Src/main.c **** /** +1147:Src/main.c **** * @brief SPI5 Initialization Function +1148:Src/main.c **** * @param None +1149:Src/main.c **** * @retval None +1150:Src/main.c **** */ +1151:Src/main.c **** static void MX_SPI5_Init(void) +1152:Src/main.c **** { 1153:Src/main.c **** -1154:Src/main.c **** /* USER CODE END SPI5_Init 0 */ +1154:Src/main.c **** /* USER CODE BEGIN SPI5_Init 0 */ 1155:Src/main.c **** -1156:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1156:Src/main.c **** /* USER CODE END SPI5_Init 0 */ 1157:Src/main.c **** -1158:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1158:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1159:Src/main.c **** -1160:Src/main.c **** /* Peripheral clock enable */ -1161:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); -1162:Src/main.c **** -1163:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); -1164:Src/main.c **** /**SPI5 GPIO Configuration -1165:Src/main.c **** PF7 ------> SPI5_SCK -1166:Src/main.c **** PF8 ------> SPI5_MISO -1167:Src/main.c **** */ -1168:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1169:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1170:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1171:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1172:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1173:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1174:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1175:Src/main.c **** -1176:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; -1177:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1178:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1179:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1180:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1181:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; -1182:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1183:Src/main.c **** -1184:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ +1160:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1161:Src/main.c **** +1162:Src/main.c **** /* Peripheral clock enable */ +1163:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI5); +1164:Src/main.c **** +1165:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF); +1166:Src/main.c **** /**SPI5 GPIO Configuration +1167:Src/main.c **** PF7 ------> SPI5_SCK +1168:Src/main.c **** PF8 ------> SPI5_MISO +1169:Src/main.c **** */ +1170:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1171:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1172:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1173:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1174:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1175:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1176:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1177:Src/main.c **** +1178:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_8; +1179:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1180:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1181:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1182:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1183:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; +1184:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); 1185:Src/main.c **** -1186:Src/main.c **** /* USER CODE END SPI5_Init 1 */ -1187:Src/main.c **** /* SPI5 parameter configuration*/ -1188:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; -1189:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1190:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1191:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; -1192:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; -1193:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1194:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1195:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1196:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1197:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - ARM GAS /tmp/ccfIOqv2.s page 61 +1186:Src/main.c **** /* USER CODE BEGIN SPI5_Init 1 */ +1187:Src/main.c **** +1188:Src/main.c **** /* USER CODE END SPI5_Init 1 */ +1189:Src/main.c **** /* SPI5 parameter configuration*/ +1190:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_SIMPLEX_RX; +1191:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; +1192:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1193:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1194:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; +1195:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1196:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1197:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + ARM GAS /tmp/ccyYWdjY.s page 61 -1198:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); -1199:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); -1200:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); -1201:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ -1202:Src/main.c **** -1203:Src/main.c **** /* USER CODE END SPI5_Init 2 */ +1198:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1199:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1200:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); +1201:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); +1202:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); +1203:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ 1204:Src/main.c **** -1205:Src/main.c **** } +1205:Src/main.c **** /* USER CODE END SPI5_Init 2 */ 1206:Src/main.c **** -1207:Src/main.c **** /** -1208:Src/main.c **** * @brief SPI6 Initialization Function -1209:Src/main.c **** * @param None -1210:Src/main.c **** * @retval None -1211:Src/main.c **** */ -1212:Src/main.c **** static void MX_SPI6_Init(void) -1213:Src/main.c **** { -1214:Src/main.c **** -1215:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ +1207:Src/main.c **** } +1208:Src/main.c **** +1209:Src/main.c **** /** +1210:Src/main.c **** * @brief SPI6 Initialization Function +1211:Src/main.c **** * @param None +1212:Src/main.c **** * @retval None +1213:Src/main.c **** */ +1214:Src/main.c **** static void MX_SPI6_Init(void) +1215:Src/main.c **** { 1216:Src/main.c **** -1217:Src/main.c **** /* USER CODE END SPI6_Init 0 */ +1217:Src/main.c **** /* USER CODE BEGIN SPI6_Init 0 */ 1218:Src/main.c **** -1219:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; +1219:Src/main.c **** /* USER CODE END SPI6_Init 0 */ 1220:Src/main.c **** -1221:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1221:Src/main.c **** LL_SPI_InitTypeDef SPI_InitStruct = {0}; 1222:Src/main.c **** -1223:Src/main.c **** /* Peripheral clock enable */ -1224:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); -1225:Src/main.c **** -1226:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1227:Src/main.c **** /**SPI6 GPIO Configuration -1228:Src/main.c **** PA5 ------> SPI6_SCK -1229:Src/main.c **** PA7 ------> SPI6_MOSI -1230:Src/main.c **** */ -1231:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; -1232:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1233:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1234:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1235:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1236:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1237:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1238:Src/main.c **** -1239:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; -1240:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1241:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1242:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1243:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1244:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; -1245:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1246:Src/main.c **** -1247:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1223:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1224:Src/main.c **** +1225:Src/main.c **** /* Peripheral clock enable */ +1226:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_SPI6); +1227:Src/main.c **** +1228:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1229:Src/main.c **** /**SPI6 GPIO Configuration +1230:Src/main.c **** PA5 ------> SPI6_SCK +1231:Src/main.c **** PA7 ------> SPI6_MOSI +1232:Src/main.c **** */ +1233:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_5; +1234:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1235:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1236:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1237:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1238:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1239:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1240:Src/main.c **** +1241:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_7; +1242:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1243:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1244:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1245:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1246:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; +1247:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1248:Src/main.c **** -1249:Src/main.c **** /* USER CODE END SPI6_Init 1 */ -1250:Src/main.c **** /* SPI6 parameter configuration*/ -1251:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; -1252:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; -1253:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; -1254:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - ARM GAS /tmp/ccfIOqv2.s page 62 +1249:Src/main.c **** /* USER CODE BEGIN SPI6_Init 1 */ +1250:Src/main.c **** +1251:Src/main.c **** /* USER CODE END SPI6_Init 1 */ +1252:Src/main.c **** /* SPI6 parameter configuration*/ +1253:Src/main.c **** SPI_InitStruct.TransferDirection = LL_SPI_FULL_DUPLEX; +1254:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + ARM GAS /tmp/ccyYWdjY.s page 62 -1255:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; -1256:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; -1257:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; -1258:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; -1259:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; -1260:Src/main.c **** SPI_InitStruct.CRCPoly = 7; -1261:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); -1262:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); -1263:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); -1264:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ -1265:Src/main.c **** -1266:Src/main.c **** /* USER CODE END SPI6_Init 2 */ +1255:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; +1256:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; +1257:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; +1258:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; +1259:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; +1260:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; +1261:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; +1262:Src/main.c **** SPI_InitStruct.CRCPoly = 7; +1263:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); +1264:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); +1265:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); +1266:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ 1267:Src/main.c **** -1268:Src/main.c **** } +1268:Src/main.c **** /* USER CODE END SPI6_Init 2 */ 1269:Src/main.c **** -1270:Src/main.c **** /** -1271:Src/main.c **** * @brief TIM2 Initialization Function -1272:Src/main.c **** * @param None -1273:Src/main.c **** * @retval None -1274:Src/main.c **** */ -1275:Src/main.c **** static void MX_TIM2_Init(void) -1276:Src/main.c **** { -1277:Src/main.c **** -1278:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ +1270:Src/main.c **** } +1271:Src/main.c **** +1272:Src/main.c **** /** +1273:Src/main.c **** * @brief TIM2 Initialization Function +1274:Src/main.c **** * @param None +1275:Src/main.c **** * @retval None +1276:Src/main.c **** */ +1277:Src/main.c **** static void MX_TIM2_Init(void) +1278:Src/main.c **** { 1279:Src/main.c **** -1280:Src/main.c **** /* USER CODE END TIM2_Init 0 */ +1280:Src/main.c **** /* USER CODE BEGIN TIM2_Init 0 */ 1281:Src/main.c **** -1282:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1282:Src/main.c **** /* USER CODE END TIM2_Init 0 */ 1283:Src/main.c **** -1284:Src/main.c **** /* Peripheral clock enable */ -1285:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); -1286:Src/main.c **** -1287:Src/main.c **** /* TIM2 interrupt Init */ -1288:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1289:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); -1290:Src/main.c **** -1291:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1284:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1285:Src/main.c **** +1286:Src/main.c **** /* Peripheral clock enable */ +1287:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM2); +1288:Src/main.c **** +1289:Src/main.c **** /* TIM2 interrupt Init */ +1290:Src/main.c **** NVIC_SetPriority(TIM2_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1291:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); 1292:Src/main.c **** -1293:Src/main.c **** /* USER CODE END TIM2_Init 1 */ -1294:Src/main.c **** TIM_InitStruct.Prescaler = 1000; -1295:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1296:Src/main.c **** TIM_InitStruct.Autoreload = 840000; -1297:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1298:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); -1299:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); -1300:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); -1301:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); -1302:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); -1303:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ -1304:Src/main.c **** -1305:Src/main.c **** /* USER CODE END TIM2_Init 2 */ +1293:Src/main.c **** /* USER CODE BEGIN TIM2_Init 1 */ +1294:Src/main.c **** +1295:Src/main.c **** /* USER CODE END TIM2_Init 1 */ +1296:Src/main.c **** TIM_InitStruct.Prescaler = 1000; +1297:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1298:Src/main.c **** TIM_InitStruct.Autoreload = 840000; +1299:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1300:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); +1301:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); +1302:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); +1303:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); +1304:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); +1305:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ 1306:Src/main.c **** -1307:Src/main.c **** } +1307:Src/main.c **** /* USER CODE END TIM2_Init 2 */ 1308:Src/main.c **** -1309:Src/main.c **** /** -1310:Src/main.c **** * @brief TIM4 Initialization Function -1311:Src/main.c **** * @param None - ARM GAS /tmp/ccfIOqv2.s page 63 +1309:Src/main.c **** } +1310:Src/main.c **** +1311:Src/main.c **** /** + ARM GAS /tmp/ccyYWdjY.s page 63 -1312:Src/main.c **** * @retval None -1313:Src/main.c **** */ -1314:Src/main.c **** static void MX_TIM4_Init(void) -1315:Src/main.c **** { -1316:Src/main.c **** -1317:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ +1312:Src/main.c **** * @brief TIM4 Initialization Function +1313:Src/main.c **** * @param None +1314:Src/main.c **** * @retval None +1315:Src/main.c **** */ +1316:Src/main.c **** static void MX_TIM4_Init(void) +1317:Src/main.c **** { 1318:Src/main.c **** -1319:Src/main.c **** /* USER CODE END TIM4_Init 0 */ +1319:Src/main.c **** /* USER CODE BEGIN TIM4_Init 0 */ 1320:Src/main.c **** -1321:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1322:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1323:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; -1324:Src/main.c **** -1325:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1321:Src/main.c **** /* USER CODE END TIM4_Init 0 */ +1322:Src/main.c **** +1323:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1324:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; +1325:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 1326:Src/main.c **** -1327:Src/main.c **** /* USER CODE END TIM4_Init 1 */ -1328:Src/main.c **** htim4.Instance = TIM4; -1329:Src/main.c **** htim4.Init.Prescaler = 0; -1330:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; -1331:Src/main.c **** htim4.Init.Period = 45; -1332:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1333:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1334:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) -1335:Src/main.c **** { -1336:Src/main.c **** Error_Handler(); -1337:Src/main.c **** } -1338:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1339:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) -1340:Src/main.c **** { -1341:Src/main.c **** Error_Handler(); -1342:Src/main.c **** } -1343:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) -1344:Src/main.c **** { -1345:Src/main.c **** Error_Handler(); -1346:Src/main.c **** } -1347:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1348:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1349:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) -1350:Src/main.c **** { -1351:Src/main.c **** Error_Handler(); -1352:Src/main.c **** } -1353:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1354:Src/main.c **** sConfigOC.Pulse = 22; -1355:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1356:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1357:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) -1358:Src/main.c **** { -1359:Src/main.c **** Error_Handler(); -1360:Src/main.c **** } -1361:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ -1362:Src/main.c **** -1363:Src/main.c **** /* USER CODE END TIM4_Init 2 */ -1364:Src/main.c **** HAL_TIM_MspPostInit(&htim4); -1365:Src/main.c **** -1366:Src/main.c **** } +1327:Src/main.c **** /* USER CODE BEGIN TIM4_Init 1 */ +1328:Src/main.c **** +1329:Src/main.c **** /* USER CODE END TIM4_Init 1 */ +1330:Src/main.c **** htim4.Instance = TIM4; +1331:Src/main.c **** htim4.Init.Prescaler = 0; +1332:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; +1333:Src/main.c **** htim4.Init.Period = 45; +1334:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1335:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1336:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) +1337:Src/main.c **** { +1338:Src/main.c **** Error_Handler(); +1339:Src/main.c **** } +1340:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1341:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) +1342:Src/main.c **** { +1343:Src/main.c **** Error_Handler(); +1344:Src/main.c **** } +1345:Src/main.c **** if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) +1346:Src/main.c **** { +1347:Src/main.c **** Error_Handler(); +1348:Src/main.c **** } +1349:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1350:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1351:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) +1352:Src/main.c **** { +1353:Src/main.c **** Error_Handler(); +1354:Src/main.c **** } +1355:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1356:Src/main.c **** sConfigOC.Pulse = 22; +1357:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1358:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1359:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) +1360:Src/main.c **** { +1361:Src/main.c **** Error_Handler(); +1362:Src/main.c **** } +1363:Src/main.c **** /* USER CODE BEGIN TIM4_Init 2 */ +1364:Src/main.c **** +1365:Src/main.c **** /* USER CODE END TIM4_Init 2 */ +1366:Src/main.c **** HAL_TIM_MspPostInit(&htim4); 1367:Src/main.c **** -1368:Src/main.c **** /** - ARM GAS /tmp/ccfIOqv2.s page 64 +1368:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 64 -1369:Src/main.c **** * @brief TIM5 Initialization Function -1370:Src/main.c **** * @param None -1371:Src/main.c **** * @retval None -1372:Src/main.c **** */ -1373:Src/main.c **** static void MX_TIM5_Init(void) -1374:Src/main.c **** { -1375:Src/main.c **** -1376:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ +1369:Src/main.c **** +1370:Src/main.c **** /** +1371:Src/main.c **** * @brief TIM5 Initialization Function +1372:Src/main.c **** * @param None +1373:Src/main.c **** * @retval None +1374:Src/main.c **** */ +1375:Src/main.c **** static void MX_TIM5_Init(void) +1376:Src/main.c **** { 1377:Src/main.c **** -1378:Src/main.c **** /* USER CODE END TIM5_Init 0 */ +1378:Src/main.c **** /* USER CODE BEGIN TIM5_Init 0 */ 1379:Src/main.c **** -1380:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1380:Src/main.c **** /* USER CODE END TIM5_Init 0 */ 1381:Src/main.c **** -1382:Src/main.c **** /* Peripheral clock enable */ -1383:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); -1384:Src/main.c **** -1385:Src/main.c **** /* TIM5 interrupt Init */ -1386:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1387:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); -1388:Src/main.c **** -1389:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1382:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1383:Src/main.c **** +1384:Src/main.c **** /* Peripheral clock enable */ +1385:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM5); +1386:Src/main.c **** +1387:Src/main.c **** /* TIM5 interrupt Init */ +1388:Src/main.c **** NVIC_SetPriority(TIM5_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1389:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); 1390:Src/main.c **** -1391:Src/main.c **** /* USER CODE END TIM5_Init 1 */ -1392:Src/main.c **** TIM_InitStruct.Prescaler = 10000; -1393:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1394:Src/main.c **** TIM_InitStruct.Autoreload = 560; -1395:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; -1396:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); -1397:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); -1398:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); -1399:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); -1400:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); -1401:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ -1402:Src/main.c **** -1403:Src/main.c **** /* USER CODE END TIM5_Init 2 */ +1391:Src/main.c **** /* USER CODE BEGIN TIM5_Init 1 */ +1392:Src/main.c **** +1393:Src/main.c **** /* USER CODE END TIM5_Init 1 */ +1394:Src/main.c **** TIM_InitStruct.Prescaler = 10000; +1395:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1396:Src/main.c **** TIM_InitStruct.Autoreload = 560; +1397:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; +1398:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); +1399:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); +1400:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); +1401:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); +1402:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); +1403:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ 1404:Src/main.c **** -1405:Src/main.c **** } +1405:Src/main.c **** /* USER CODE END TIM5_Init 2 */ 1406:Src/main.c **** -1407:Src/main.c **** /** -1408:Src/main.c **** * @brief TIM6 Initialization Function -1409:Src/main.c **** * @param None -1410:Src/main.c **** * @retval None -1411:Src/main.c **** */ -1412:Src/main.c **** static void MX_TIM6_Init(void) -1413:Src/main.c **** { -1414:Src/main.c **** -1415:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ +1407:Src/main.c **** } +1408:Src/main.c **** +1409:Src/main.c **** /** +1410:Src/main.c **** * @brief TIM6 Initialization Function +1411:Src/main.c **** * @param None +1412:Src/main.c **** * @retval None +1413:Src/main.c **** */ +1414:Src/main.c **** static void MX_TIM6_Init(void) +1415:Src/main.c **** { 1416:Src/main.c **** -1417:Src/main.c **** /* USER CODE END TIM6_Init 0 */ +1417:Src/main.c **** /* USER CODE BEGIN TIM6_Init 0 */ 1418:Src/main.c **** -1419:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1419:Src/main.c **** /* USER CODE END TIM6_Init 0 */ 1420:Src/main.c **** -1421:Src/main.c **** /* Peripheral clock enable */ -1422:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); -1423:Src/main.c **** -1424:Src/main.c **** /* TIM6 interrupt Init */ -1425:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - ARM GAS /tmp/ccfIOqv2.s page 65 +1421:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1422:Src/main.c **** +1423:Src/main.c **** /* Peripheral clock enable */ +1424:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM6); +1425:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 65 -1426:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); -1427:Src/main.c **** -1428:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1426:Src/main.c **** /* TIM6 interrupt Init */ +1427:Src/main.c **** NVIC_SetPriority(TIM6_DAC_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1428:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); 1429:Src/main.c **** -1430:Src/main.c **** /* USER CODE END TIM6_Init 1 */ -1431:Src/main.c **** TIM_InitStruct.Prescaler = 45999; -1432:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1433:Src/main.c **** TIM_InitStruct.Autoreload = 19; -1434:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); -1435:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); -1436:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); -1437:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); -1438:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ -1439:Src/main.c **** -1440:Src/main.c **** /* USER CODE END TIM6_Init 2 */ +1430:Src/main.c **** /* USER CODE BEGIN TIM6_Init 1 */ +1431:Src/main.c **** +1432:Src/main.c **** /* USER CODE END TIM6_Init 1 */ +1433:Src/main.c **** TIM_InitStruct.Prescaler = 45999; +1434:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1435:Src/main.c **** TIM_InitStruct.Autoreload = 19; +1436:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); +1437:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); +1438:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); +1439:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); +1440:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ 1441:Src/main.c **** -1442:Src/main.c **** } +1442:Src/main.c **** /* USER CODE END TIM6_Init 2 */ 1443:Src/main.c **** -1444:Src/main.c **** /** -1445:Src/main.c **** * @brief TIM7 Initialization Function -1446:Src/main.c **** * @param None -1447:Src/main.c **** * @retval None -1448:Src/main.c **** */ -1449:Src/main.c **** static void MX_TIM7_Init(void) -1450:Src/main.c **** { -1451:Src/main.c **** -1452:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ +1444:Src/main.c **** } +1445:Src/main.c **** +1446:Src/main.c **** /** +1447:Src/main.c **** * @brief TIM7 Initialization Function +1448:Src/main.c **** * @param None +1449:Src/main.c **** * @retval None +1450:Src/main.c **** */ +1451:Src/main.c **** static void MX_TIM7_Init(void) +1452:Src/main.c **** { 1453:Src/main.c **** -1454:Src/main.c **** /* USER CODE END TIM7_Init 0 */ +1454:Src/main.c **** /* USER CODE BEGIN TIM7_Init 0 */ 1455:Src/main.c **** -1456:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1456:Src/main.c **** /* USER CODE END TIM7_Init 0 */ 1457:Src/main.c **** -1458:Src/main.c **** /* Peripheral clock enable */ -1459:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); -1460:Src/main.c **** -1461:Src/main.c **** /* TIM7 interrupt Init */ -1462:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1463:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); -1464:Src/main.c **** -1465:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1458:Src/main.c **** LL_TIM_InitTypeDef TIM_InitStruct = {0}; +1459:Src/main.c **** +1460:Src/main.c **** /* Peripheral clock enable */ +1461:Src/main.c **** LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM7); +1462:Src/main.c **** +1463:Src/main.c **** /* TIM7 interrupt Init */ +1464:Src/main.c **** NVIC_SetPriority(TIM7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1465:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); 1466:Src/main.c **** -1467:Src/main.c **** /* USER CODE END TIM7_Init 1 */ -1468:Src/main.c **** TIM_InitStruct.Prescaler = 919; -1469:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; -1470:Src/main.c **** TIM_InitStruct.Autoreload = 99; -1471:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); -1472:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); -1473:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); -1474:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); -1475:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ -1476:Src/main.c **** -1477:Src/main.c **** /* USER CODE END TIM7_Init 2 */ +1467:Src/main.c **** /* USER CODE BEGIN TIM7_Init 1 */ +1468:Src/main.c **** +1469:Src/main.c **** /* USER CODE END TIM7_Init 1 */ +1470:Src/main.c **** TIM_InitStruct.Prescaler = 919; +1471:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; +1472:Src/main.c **** TIM_InitStruct.Autoreload = 99; +1473:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); +1474:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); +1475:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); +1476:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); +1477:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ 1478:Src/main.c **** -1479:Src/main.c **** } +1479:Src/main.c **** /* USER CODE END TIM7_Init 2 */ 1480:Src/main.c **** -1481:Src/main.c **** /** -1482:Src/main.c **** * @brief TIM8 Initialization Function - ARM GAS /tmp/ccfIOqv2.s page 66 +1481:Src/main.c **** } +1482:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 66 -1483:Src/main.c **** * @param None -1484:Src/main.c **** * @retval None -1485:Src/main.c **** */ -1486:Src/main.c **** static void MX_TIM8_Init(void) -1487:Src/main.c **** { -1488:Src/main.c **** -1489:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ +1483:Src/main.c **** /** +1484:Src/main.c **** * @brief TIM8 Initialization Function +1485:Src/main.c **** * @param None +1486:Src/main.c **** * @retval None +1487:Src/main.c **** */ +1488:Src/main.c **** static void MX_TIM8_Init(void) +1489:Src/main.c **** { 1490:Src/main.c **** -1491:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1491:Src/main.c **** /* USER CODE BEGIN TIM8_Init 0 */ 1492:Src/main.c **** -1493:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; -1494:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; -1495:Src/main.c **** -1496:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1493:Src/main.c **** /* USER CODE END TIM8_Init 0 */ +1494:Src/main.c **** +1495:Src/main.c **** TIM_ClockConfigTypeDef sClockSourceConfig = {0}; +1496:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; 1497:Src/main.c **** -1498:Src/main.c **** /* USER CODE END TIM8_Init 1 */ -1499:Src/main.c **** htim8.Instance = TIM8; -1500:Src/main.c **** htim8.Init.Prescaler = 0; -1501:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; -1502:Src/main.c **** htim8.Init.Period = 91; -1503:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1504:Src/main.c **** htim8.Init.RepetitionCounter = 0; -1505:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1506:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) -1507:Src/main.c **** { -1508:Src/main.c **** Error_Handler(); -1509:Src/main.c **** } -1510:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; -1511:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) -1512:Src/main.c **** { -1513:Src/main.c **** Error_Handler(); -1514:Src/main.c **** } -1515:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; -1516:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; -1517:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; -1518:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) -1519:Src/main.c **** { -1520:Src/main.c **** Error_Handler(); -1521:Src/main.c **** } -1522:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ -1523:Src/main.c **** -1524:Src/main.c **** /* USER CODE END TIM8_Init 2 */ +1498:Src/main.c **** /* USER CODE BEGIN TIM8_Init 1 */ +1499:Src/main.c **** +1500:Src/main.c **** /* USER CODE END TIM8_Init 1 */ +1501:Src/main.c **** htim8.Instance = TIM8; +1502:Src/main.c **** htim8.Init.Prescaler = 0; +1503:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; +1504:Src/main.c **** htim8.Init.Period = 91; +1505:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1506:Src/main.c **** htim8.Init.RepetitionCounter = 0; +1507:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1508:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) +1509:Src/main.c **** { +1510:Src/main.c **** Error_Handler(); +1511:Src/main.c **** } +1512:Src/main.c **** sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL; +1513:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) +1514:Src/main.c **** { +1515:Src/main.c **** Error_Handler(); +1516:Src/main.c **** } +1517:Src/main.c **** sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET; +1518:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; +1519:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; +1520:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) +1521:Src/main.c **** { +1522:Src/main.c **** Error_Handler(); +1523:Src/main.c **** } +1524:Src/main.c **** /* USER CODE BEGIN TIM8_Init 2 */ 1525:Src/main.c **** -1526:Src/main.c **** } +1526:Src/main.c **** /* USER CODE END TIM8_Init 2 */ 1527:Src/main.c **** -1528:Src/main.c **** /** -1529:Src/main.c **** * @brief TIM10 Initialization Function -1530:Src/main.c **** * @param None -1531:Src/main.c **** * @retval None -1532:Src/main.c **** */ -1533:Src/main.c **** static void MX_TIM10_Init(void) -1534:Src/main.c **** { -1535:Src/main.c **** -1536:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ +1528:Src/main.c **** } +1529:Src/main.c **** +1530:Src/main.c **** /** +1531:Src/main.c **** * @brief TIM10 Initialization Function +1532:Src/main.c **** * @param None +1533:Src/main.c **** * @retval None +1534:Src/main.c **** */ +1535:Src/main.c **** static void MX_TIM10_Init(void) +1536:Src/main.c **** { 1537:Src/main.c **** -1538:Src/main.c **** /* USER CODE END TIM10_Init 0 */ +1538:Src/main.c **** /* USER CODE BEGIN TIM10_Init 0 */ 1539:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 67 + ARM GAS /tmp/ccyYWdjY.s page 67 -1540:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1540:Src/main.c **** /* USER CODE END TIM10_Init 0 */ 1541:Src/main.c **** -1542:Src/main.c **** /* USER CODE END TIM10_Init 1 */ -1543:Src/main.c **** htim10.Instance = TIM10; -1544:Src/main.c **** htim10.Init.Prescaler = 183; -1545:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; -1546:Src/main.c **** htim10.Init.Period = 9; -1547:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1548:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; -1549:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) -1550:Src/main.c **** { -1551:Src/main.c **** Error_Handler(); -1552:Src/main.c **** } -1553:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ -1554:Src/main.c **** -1555:Src/main.c **** /* USER CODE END TIM10_Init 2 */ +1542:Src/main.c **** /* USER CODE BEGIN TIM10_Init 1 */ +1543:Src/main.c **** +1544:Src/main.c **** /* USER CODE END TIM10_Init 1 */ +1545:Src/main.c **** htim10.Instance = TIM10; +1546:Src/main.c **** htim10.Init.Prescaler = 183; +1547:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; +1548:Src/main.c **** htim10.Init.Period = 9; +1549:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1550:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; +1551:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) +1552:Src/main.c **** { +1553:Src/main.c **** Error_Handler(); +1554:Src/main.c **** } +1555:Src/main.c **** /* USER CODE BEGIN TIM10_Init 2 */ 1556:Src/main.c **** -1557:Src/main.c **** } +1557:Src/main.c **** /* USER CODE END TIM10_Init 2 */ 1558:Src/main.c **** -1559:Src/main.c **** /** -1560:Src/main.c **** * @brief TIM11 Initialization Function -1561:Src/main.c **** * @param None -1562:Src/main.c **** * @retval None -1563:Src/main.c **** */ -1564:Src/main.c **** static void MX_TIM11_Init(void) -1565:Src/main.c **** { -1566:Src/main.c **** -1567:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ +1559:Src/main.c **** } +1560:Src/main.c **** +1561:Src/main.c **** /** +1562:Src/main.c **** * @brief TIM11 Initialization Function +1563:Src/main.c **** * @param None +1564:Src/main.c **** * @retval None +1565:Src/main.c **** */ +1566:Src/main.c **** static void MX_TIM11_Init(void) +1567:Src/main.c **** { 1568:Src/main.c **** -1569:Src/main.c **** /* USER CODE END TIM11_Init 0 */ +1569:Src/main.c **** /* USER CODE BEGIN TIM11_Init 0 */ 1570:Src/main.c **** -1571:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; +1571:Src/main.c **** /* USER CODE END TIM11_Init 0 */ 1572:Src/main.c **** -1573:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1573:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; 1574:Src/main.c **** -1575:Src/main.c **** /* USER CODE END TIM11_Init 1 */ -1576:Src/main.c **** htim11.Instance = TIM11; -1577:Src/main.c **** htim11.Init.Prescaler = 1; -1578:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; -1579:Src/main.c **** htim11.Init.Period = 91; -1580:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; -1581:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; -1582:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) -1583:Src/main.c **** { -1584:Src/main.c **** Error_Handler(); -1585:Src/main.c **** } -1586:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) -1587:Src/main.c **** { -1588:Src/main.c **** Error_Handler(); -1589:Src/main.c **** } -1590:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; -1591:Src/main.c **** sConfigOC.Pulse = 91; -1592:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; -1593:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; -1594:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) -1595:Src/main.c **** { -1596:Src/main.c **** Error_Handler(); - ARM GAS /tmp/ccfIOqv2.s page 68 +1575:Src/main.c **** /* USER CODE BEGIN TIM11_Init 1 */ +1576:Src/main.c **** +1577:Src/main.c **** /* USER CODE END TIM11_Init 1 */ +1578:Src/main.c **** htim11.Instance = TIM11; +1579:Src/main.c **** htim11.Init.Prescaler = 1; +1580:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; +1581:Src/main.c **** htim11.Init.Period = 91; +1582:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; +1583:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; +1584:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) +1585:Src/main.c **** { +1586:Src/main.c **** Error_Handler(); +1587:Src/main.c **** } +1588:Src/main.c **** if (HAL_TIM_PWM_Init(&htim11) != HAL_OK) +1589:Src/main.c **** { +1590:Src/main.c **** Error_Handler(); +1591:Src/main.c **** } +1592:Src/main.c **** sConfigOC.OCMode = TIM_OCMODE_PWM1; +1593:Src/main.c **** sConfigOC.Pulse = 91; +1594:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; +1595:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; +1596:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + ARM GAS /tmp/ccyYWdjY.s page 68 -1597:Src/main.c **** } -1598:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ -1599:Src/main.c **** -1600:Src/main.c **** /* USER CODE END TIM11_Init 2 */ -1601:Src/main.c **** HAL_TIM_MspPostInit(&htim11); -1602:Src/main.c **** -1603:Src/main.c **** } +1597:Src/main.c **** { +1598:Src/main.c **** Error_Handler(); +1599:Src/main.c **** } +1600:Src/main.c **** /* USER CODE BEGIN TIM11_Init 2 */ +1601:Src/main.c **** +1602:Src/main.c **** /* USER CODE END TIM11_Init 2 */ +1603:Src/main.c **** HAL_TIM_MspPostInit(&htim11); 1604:Src/main.c **** -1605:Src/main.c **** /** -1606:Src/main.c **** * @brief UART8 Initialization Function -1607:Src/main.c **** * @param None -1608:Src/main.c **** * @retval None -1609:Src/main.c **** */ -1610:Src/main.c **** static void MX_UART8_Init(void) -1611:Src/main.c **** { -1612:Src/main.c **** -1613:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ +1605:Src/main.c **** } +1606:Src/main.c **** +1607:Src/main.c **** /** +1608:Src/main.c **** * @brief UART8 Initialization Function +1609:Src/main.c **** * @param None +1610:Src/main.c **** * @retval None +1611:Src/main.c **** */ +1612:Src/main.c **** static void MX_UART8_Init(void) +1613:Src/main.c **** { 1614:Src/main.c **** -1615:Src/main.c **** /* USER CODE END UART8_Init 0 */ +1615:Src/main.c **** /* USER CODE BEGIN UART8_Init 0 */ 1616:Src/main.c **** -1617:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1617:Src/main.c **** /* USER CODE END UART8_Init 0 */ 1618:Src/main.c **** -1619:Src/main.c **** /* USER CODE END UART8_Init 1 */ -1620:Src/main.c **** huart8.Instance = UART8; -1621:Src/main.c **** huart8.Init.BaudRate = 115200; -1622:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; -1623:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; -1624:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; -1625:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; -1626:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; -1627:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; -1628:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; -1629:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; -1630:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) -1631:Src/main.c **** { -1632:Src/main.c **** Error_Handler(); -1633:Src/main.c **** } -1634:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ -1635:Src/main.c **** -1636:Src/main.c **** /* USER CODE END UART8_Init 2 */ +1619:Src/main.c **** /* USER CODE BEGIN UART8_Init 1 */ +1620:Src/main.c **** +1621:Src/main.c **** /* USER CODE END UART8_Init 1 */ +1622:Src/main.c **** huart8.Instance = UART8; +1623:Src/main.c **** huart8.Init.BaudRate = 115200; +1624:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; +1625:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; +1626:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; +1627:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; +1628:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; +1629:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; +1630:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; +1631:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; +1632:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) +1633:Src/main.c **** { +1634:Src/main.c **** Error_Handler(); +1635:Src/main.c **** } +1636:Src/main.c **** /* USER CODE BEGIN UART8_Init 2 */ 1637:Src/main.c **** -1638:Src/main.c **** } +1638:Src/main.c **** /* USER CODE END UART8_Init 2 */ 1639:Src/main.c **** -1640:Src/main.c **** /** -1641:Src/main.c **** * @brief USART1 Initialization Function -1642:Src/main.c **** * @param None -1643:Src/main.c **** * @retval None -1644:Src/main.c **** */ -1645:Src/main.c **** static void MX_USART1_UART_Init(void) -1646:Src/main.c **** { -1647:Src/main.c **** -1648:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ +1640:Src/main.c **** } +1641:Src/main.c **** +1642:Src/main.c **** /** +1643:Src/main.c **** * @brief USART1 Initialization Function +1644:Src/main.c **** * @param None +1645:Src/main.c **** * @retval None +1646:Src/main.c **** */ +1647:Src/main.c **** static void MX_USART1_UART_Init(void) +1648:Src/main.c **** { 1649:Src/main.c **** -1650:Src/main.c **** /* USER CODE END USART1_Init 0 */ +1650:Src/main.c **** /* USER CODE BEGIN USART1_Init 0 */ 1651:Src/main.c **** -1652:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1652:Src/main.c **** /* USER CODE END USART1_Init 0 */ 1653:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 69 + ARM GAS /tmp/ccyYWdjY.s page 69 -1654:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; -1655:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; -1656:Src/main.c **** -1657:Src/main.c **** /** Initializes the peripherals clock -1658:Src/main.c **** */ -1659:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; -1660:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; -1661:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) -1662:Src/main.c **** { -1663:Src/main.c **** Error_Handler(); -1664:Src/main.c **** } -1665:Src/main.c **** -1666:Src/main.c **** /* Peripheral clock enable */ -1667:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); -1668:Src/main.c **** -1669:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); -1670:Src/main.c **** /**USART1 GPIO Configuration -1671:Src/main.c **** PA9 ------> USART1_TX -1672:Src/main.c **** PA10 ------> USART1_RX -1673:Src/main.c **** */ -1674:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; -1675:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1676:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1677:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1678:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1679:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1680:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1681:Src/main.c **** -1682:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; -1683:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; -1684:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; -1685:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; -1686:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; -1687:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; -1688:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1689:Src/main.c **** -1690:Src/main.c **** /* USART1 DMA Init */ +1654:Src/main.c **** LL_USART_InitTypeDef USART_InitStruct = {0}; +1655:Src/main.c **** +1656:Src/main.c **** LL_GPIO_InitTypeDef GPIO_InitStruct = {0}; +1657:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; +1658:Src/main.c **** +1659:Src/main.c **** /** Initializes the peripherals clock +1660:Src/main.c **** */ +1661:Src/main.c **** PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART1; +1662:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; +1663:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) +1664:Src/main.c **** { +1665:Src/main.c **** Error_Handler(); +1666:Src/main.c **** } +1667:Src/main.c **** +1668:Src/main.c **** /* Peripheral clock enable */ +1669:Src/main.c **** LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_USART1); +1670:Src/main.c **** +1671:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA); +1672:Src/main.c **** /**USART1 GPIO Configuration +1673:Src/main.c **** PA9 ------> USART1_TX +1674:Src/main.c **** PA10 ------> USART1_RX +1675:Src/main.c **** */ +1676:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_9; +1677:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1678:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1679:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1680:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1681:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1682:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1683:Src/main.c **** +1684:Src/main.c **** GPIO_InitStruct.Pin = LL_GPIO_PIN_10; +1685:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; +1686:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; +1687:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; +1688:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; +1689:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; +1690:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); 1691:Src/main.c **** -1692:Src/main.c **** /* USART1_TX Init */ -1693:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); -1694:Src/main.c **** -1695:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); +1692:Src/main.c **** /* USART1 DMA Init */ +1693:Src/main.c **** +1694:Src/main.c **** /* USART1_TX Init */ +1695:Src/main.c **** LL_DMA_SetChannelSelection(DMA2, LL_DMA_STREAM_7, LL_DMA_CHANNEL_4); 1696:Src/main.c **** -1697:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); +1697:Src/main.c **** LL_DMA_SetDataTransferDirection(DMA2, LL_DMA_STREAM_7, LL_DMA_DIRECTION_MEMORY_TO_PERIPH); 1698:Src/main.c **** -1699:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); +1699:Src/main.c **** LL_DMA_SetStreamPriorityLevel(DMA2, LL_DMA_STREAM_7, LL_DMA_PRIORITY_VERYHIGH); 1700:Src/main.c **** -1701:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); +1701:Src/main.c **** LL_DMA_SetMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MODE_NORMAL); 1702:Src/main.c **** -1703:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); +1703:Src/main.c **** LL_DMA_SetPeriphIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_PERIPH_NOINCREMENT); 1704:Src/main.c **** -1705:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); +1705:Src/main.c **** LL_DMA_SetMemoryIncMode(DMA2, LL_DMA_STREAM_7, LL_DMA_MEMORY_INCREMENT); 1706:Src/main.c **** -1707:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); +1707:Src/main.c **** LL_DMA_SetPeriphSize(DMA2, LL_DMA_STREAM_7, LL_DMA_PDATAALIGN_BYTE); 1708:Src/main.c **** -1709:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +1709:Src/main.c **** LL_DMA_SetMemorySize(DMA2, LL_DMA_STREAM_7, LL_DMA_MDATAALIGN_BYTE); 1710:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 70 + ARM GAS /tmp/ccyYWdjY.s page 70 -1711:Src/main.c **** /* USART1 interrupt Init */ -1712:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); -1713:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); -1714:Src/main.c **** -1715:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +1711:Src/main.c **** LL_DMA_DisableFifoMode(DMA2, LL_DMA_STREAM_7); +1712:Src/main.c **** +1713:Src/main.c **** /* USART1 interrupt Init */ +1714:Src/main.c **** NVIC_SetPriority(USART1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +1715:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); 1716:Src/main.c **** -1717:Src/main.c **** /* USER CODE END USART1_Init 1 */ -1718:Src/main.c **** USART_InitStruct.BaudRate = 115200; -1719:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; -1720:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; -1721:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; -1722:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; -1723:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; -1724:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; -1725:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); -1726:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); -1727:Src/main.c **** LL_USART_Enable(USART1); -1728:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ -1729:Src/main.c **** -1730:Src/main.c **** /* USER CODE END USART1_Init 2 */ +1717:Src/main.c **** /* USER CODE BEGIN USART1_Init 1 */ +1718:Src/main.c **** +1719:Src/main.c **** /* USER CODE END USART1_Init 1 */ +1720:Src/main.c **** USART_InitStruct.BaudRate = 115200; +1721:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; +1722:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; +1723:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; +1724:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; +1725:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; +1726:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; +1727:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); +1728:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); +1729:Src/main.c **** LL_USART_Enable(USART1); +1730:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ 1731:Src/main.c **** -1732:Src/main.c **** } +1732:Src/main.c **** /* USER CODE END USART1_Init 2 */ 1733:Src/main.c **** -1734:Src/main.c **** /** -1735:Src/main.c **** * Enable DMA controller clock -1736:Src/main.c **** */ -1737:Src/main.c **** static void MX_DMA_Init(void) -1738:Src/main.c **** { - 144 .loc 1 1738 1 is_stmt 1 view -0 +1734:Src/main.c **** } +1735:Src/main.c **** +1736:Src/main.c **** /** +1737:Src/main.c **** * Enable DMA controller clock +1738:Src/main.c **** */ +1739:Src/main.c **** static void MX_DMA_Init(void) +1740:Src/main.c **** { + 144 .loc 1 1740 1 is_stmt 1 view -0 145 .cfi_startproc 146 @ args = 0, pretend = 0, frame = 8 147 @ frame_needed = 0, uses_anonymous_args = 0 @@ -4180,11 +4182,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 152 0002 83B0 sub sp, sp, #12 153 .LCFI2: 154 .cfi_def_cfa_offset 16 -1739:Src/main.c **** -1740:Src/main.c **** /* Init with LL driver */ -1741:Src/main.c **** /* DMA controller clock enable */ -1742:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); - 155 .loc 1 1742 3 view .LVU37 +1741:Src/main.c **** +1742:Src/main.c **** /* Init with LL driver */ +1743:Src/main.c **** /* DMA controller clock enable */ +1744:Src/main.c **** LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2); + 155 .loc 1 1744 3 view .LVU37 156 .LVL8: 157 .LBB294: 158 .LBI294: @@ -4196,11 +4198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Header file of BUS LL module. 6:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 7:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @verbatim + ARM GAS /tmp/ccyYWdjY.s page 71 + + 8:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ##### RCC Limitations ##### 9:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** ============================================================================== - ARM GAS /tmp/ccfIOqv2.s page 71 - - 10:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** [..] 11:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** A delay between an RCC peripheral clock enable and the effective peripheral 12:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** enabling should be taken into account in order to manage the peripheral read/write @@ -4256,11 +4258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 62:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_Exported_Constants BUS Exported Constants 63:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 64:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 72 + + 65:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 66:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EC_AHB1_GRP1_PERIPH AHB1 GRP1 PERIPH - ARM GAS /tmp/ccfIOqv2.s page 72 - - 67:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 68:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 69:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB1_GRP1_PERIPH_ALL 0xFFFFFFFFU @@ -4316,11 +4318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CRYP) 120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB2_GRP1_PERIPH_CRYP RCC_AHB2ENR_CRYPEN 121:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CRYP */ + ARM GAS /tmp/ccyYWdjY.s page 73 + + 122:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(AES) 123:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB2_GRP1_PERIPH_AES RCC_AHB2ENR_AESEN - ARM GAS /tmp/ccfIOqv2.s page 73 - - 124:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* AES */ 125:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(HASH) 126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_AHB2_GRP1_PERIPH_HASH RCC_AHB2ENR_HASHEN @@ -4376,11 +4378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN2 RCC_APB1ENR_CAN2EN 177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CAN2 */ 178:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CAN3) + ARM GAS /tmp/ccyYWdjY.s page 74 + + 179:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CAN3 RCC_APB1ENR_CAN3EN 180:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CAN3 */ - ARM GAS /tmp/ccfIOqv2.s page 74 - - 181:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(CEC) 182:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB1_GRP1_PERIPH_CEC RCC_APB1ENR_CECEN 183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* CEC */ @@ -4436,11 +4438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* MDIOS */ 234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #if defined(USB_HS_PHYC) 235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_OTGPHYC RCC_APB2ENR_OTGPHYCEN + ARM GAS /tmp/ccyYWdjY.s page 75 + + 236:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #endif /* USB_HS_PHYC */ 237:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** #define LL_APB2_GRP1_PERIPH_ADC RCC_APB2RSTR_ADCRST - ARM GAS /tmp/ccfIOqv2.s page 75 - - 238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} 240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ @@ -4496,11 +4498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) + ARM GAS /tmp/ccyYWdjY.s page 76 + + 293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_BKPSRAM - ARM GAS /tmp/ccfIOqv2.s page 76 - - 295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DTCMRAM 296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA1 297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_DMA2 @@ -4542,11 +4544,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 177 .loc 3 315 3 is_stmt 0 view .LVU45 178 .LBE295: 179 .LBE294: -1743:Src/main.c **** -1744:Src/main.c **** /* DMA interrupt init */ -1745:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ -1746:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); - 180 .loc 1 1746 3 is_stmt 1 view .LVU46 +1745:Src/main.c **** +1746:Src/main.c **** /* DMA interrupt init */ +1747:Src/main.c **** /* DMA2_Stream7_IRQn interrupt configuration */ +1748:Src/main.c **** NVIC_SetPriority(DMA2_Stream7_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + 180 .loc 1 1748 3 is_stmt 1 view .LVU46 181 .LBB296: 182 .LBI296: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -4556,14 +4558,14 @@ ARM GAS /tmp/ccfIOqv2.s page 1 185 .loc 2 1886 3 view .LVU48 1886:Drivers/CMSIS/Include/core_cm7.h **** } 186 .loc 2 1886 26 is_stmt 0 view .LVU49 + ARM GAS /tmp/ccyYWdjY.s page 77 + + 187 0018 094B ldr r3, .L10+4 188 001a D868 ldr r0, [r3, #12] - ARM GAS /tmp/ccfIOqv2.s page 77 - - 189 .LBE297: 190 .LBE296: - 191 .loc 1 1746 3 discriminator 1 view .LVU50 + 191 .loc 1 1748 3 discriminator 1 view .LVU50 192 001c 0022 movs r2, #0 193 001e 1146 mov r1, r2 194 0020 C0F30220 ubfx r0, r0, #8, #3 @@ -4594,8 +4596,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 212 .loc 2 2028 47 view .LVU57 213 .LBE299: 214 .LBE298: -1747:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); - 215 .loc 1 1747 3 is_stmt 1 view .LVU58 +1749:Src/main.c **** NVIC_EnableIRQ(DMA2_Stream7_IRQn); + 215 .loc 1 1749 3 is_stmt 1 view .LVU58 216 .LBB300: 217 .LBI300: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -4614,13 +4616,13 @@ ARM GAS /tmp/ccfIOqv2.s page 1 226 .loc 2 1900 43 view .LVU63 227 .LBE301: 228 .LBE300: -1748:Src/main.c **** -1749:Src/main.c **** } - 229 .loc 1 1749 1 view .LVU64 +1750:Src/main.c **** +1751:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 78 + + + 229 .loc 1 1751 1 view .LVU64 230 0036 03B0 add sp, sp, #12 - ARM GAS /tmp/ccfIOqv2.s page 78 - - 231 .LCFI3: 232 .cfi_def_cfa_offset 4 233 @ sp needed @@ -4641,809 +4643,809 @@ ARM GAS /tmp/ccfIOqv2.s page 1 250 Decode_task: 251 .LVL14: 252 .LFB1209: -1750:Src/main.c **** -1751:Src/main.c **** /** -1752:Src/main.c **** * @brief GPIO Initialization Function -1753:Src/main.c **** * @param None -1754:Src/main.c **** * @retval None -1755:Src/main.c **** */ -1756:Src/main.c **** static void MX_GPIO_Init(void) -1757:Src/main.c **** { -1758:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; -1759:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ -1760:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ -1761:Src/main.c **** -1762:Src/main.c **** /* GPIO Ports Clock Enable */ -1763:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); -1764:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); -1765:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); -1766:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); -1767:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); -1768:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); -1769:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); -1770:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); -1771:Src/main.c **** -1772:Src/main.c **** /*Configure GPIO pin Output Level */ -1773:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -1774:Src/main.c **** -1775:Src/main.c **** /*Configure GPIO pin Output Level */ -1776:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); -1777:Src/main.c **** -1778:Src/main.c **** /*Configure GPIO pin Output Level */ -1779:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); -1780:Src/main.c **** -1781:Src/main.c **** /*Configure GPIO pin Output Level */ -1782:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); -1783:Src/main.c **** -1784:Src/main.c **** /*Configure GPIO pin Output Level */ -1785:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -1786:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 79 +1752:Src/main.c **** +1753:Src/main.c **** /** +1754:Src/main.c **** * @brief GPIO Initialization Function +1755:Src/main.c **** * @param None +1756:Src/main.c **** * @retval None +1757:Src/main.c **** */ +1758:Src/main.c **** static void MX_GPIO_Init(void) +1759:Src/main.c **** { +1760:Src/main.c **** GPIO_InitTypeDef GPIO_InitStruct = {0}; +1761:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_1 */ +1762:Src/main.c **** /* USER CODE END MX_GPIO_Init_1 */ +1763:Src/main.c **** +1764:Src/main.c **** /* GPIO Ports Clock Enable */ +1765:Src/main.c **** __HAL_RCC_GPIOF_CLK_ENABLE(); +1766:Src/main.c **** __HAL_RCC_GPIOH_CLK_ENABLE(); +1767:Src/main.c **** __HAL_RCC_GPIOC_CLK_ENABLE(); +1768:Src/main.c **** __HAL_RCC_GPIOA_CLK_ENABLE(); +1769:Src/main.c **** __HAL_RCC_GPIOB_CLK_ENABLE(); +1770:Src/main.c **** __HAL_RCC_GPIOE_CLK_ENABLE(); +1771:Src/main.c **** __HAL_RCC_GPIOD_CLK_ENABLE(); +1772:Src/main.c **** __HAL_RCC_GPIOG_CLK_ENABLE(); +1773:Src/main.c **** +1774:Src/main.c **** /*Configure GPIO pin Output Level */ +1775:Src/main.c **** HAL_GPIO_WritePin(GPIOF, ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +1776:Src/main.c **** +1777:Src/main.c **** /*Configure GPIO pin Output Level */ +1778:Src/main.c **** HAL_GPIO_WritePin(GPIOC, EN_5V2_Pin|EN_5V1_Pin|LD2_EN_Pin|TEC2_PD_Pin, GPIO_PIN_RESET); +1779:Src/main.c **** +1780:Src/main.c **** /*Configure GPIO pin Output Level */ +1781:Src/main.c **** HAL_GPIO_WritePin(GPIOA, TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_LD2_CS_Pin, GPIO_PIN_RESET); +1782:Src/main.c **** +1783:Src/main.c **** /*Configure GPIO pin Output Level */ +1784:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); +1785:Src/main.c **** +1786:Src/main.c **** /*Configure GPIO pin Output Level */ + ARM GAS /tmp/ccyYWdjY.s page 79 -1787:Src/main.c **** /*Configure GPIO pin Output Level */ -1788:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); -1789:Src/main.c **** -1790:Src/main.c **** /*Configure GPIO pin Output Level */ -1791:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin -1792:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); -1793:Src/main.c **** -1794:Src/main.c **** /*Configure GPIO pin Output Level */ -1795:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); -1796:Src/main.c **** -1797:Src/main.c **** /*Configure GPIO pin Output Level */ -1798:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); -1799:Src/main.c **** -1800:Src/main.c **** /*Configure GPIO pin Output Level */ -1801:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1802:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); -1803:Src/main.c **** -1804:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ -1805:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; -1806:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1807:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; -1808:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1809:Src/main.c **** -1810:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ -1811:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; -1812:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1813:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1814:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1815:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1816:Src/main.c **** -1817:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ -1818:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; -1819:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1820:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1821:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1822:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); -1823:Src/main.c **** -1824:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ -1825:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; -1826:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1827:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1828:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1829:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); -1830:Src/main.c **** -1831:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin -1832:Src/main.c **** DAC_LD2_CS_Pin */ -1833:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin -1834:Src/main.c **** |DAC_LD2_CS_Pin; -1835:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1836:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1837:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1838:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); -1839:Src/main.c **** -1840:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ -1841:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; -1842:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1843:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; - ARM GAS /tmp/ccfIOqv2.s page 80 +1787:Src/main.c **** HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +1788:Src/main.c **** +1789:Src/main.c **** /*Configure GPIO pin Output Level */ +1790:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); +1791:Src/main.c **** +1792:Src/main.c **** /*Configure GPIO pin Output Level */ +1793:Src/main.c **** HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|DAC_LD1_CS_Pin|OUT_6_Pin +1794:Src/main.c **** |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); +1795:Src/main.c **** +1796:Src/main.c **** /*Configure GPIO pin Output Level */ +1797:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); +1798:Src/main.c **** +1799:Src/main.c **** /*Configure GPIO pin Output Level */ +1800:Src/main.c **** HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET); +1801:Src/main.c **** +1802:Src/main.c **** /*Configure GPIO pin Output Level */ +1803:Src/main.c **** HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +1804:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin, GPIO_PIN_RESET); +1805:Src/main.c **** +1806:Src/main.c **** /*Configure GPIO pins : INP_0_Pin INP_1_Pin */ +1807:Src/main.c **** GPIO_InitStruct.Pin = INP_0_Pin|INP_1_Pin; +1808:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1809:Src/main.c **** GPIO_InitStruct.Pull = GPIO_PULLUP; +1810:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1811:Src/main.c **** +1812:Src/main.c **** /*Configure GPIO pins : ADC_MPD2_CS_Pin SPI5_CNV_Pin ADC_ThrLD2_CS_Pin */ +1813:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD2_CS_Pin|SPI5_CNV_Pin|ADC_ThrLD2_CS_Pin; +1814:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1815:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1816:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1817:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1818:Src/main.c **** +1819:Src/main.c **** /*Configure GPIO pins : EN_5V2_Pin LD2_EN_Pin TEC2_PD_Pin */ +1820:Src/main.c **** GPIO_InitStruct.Pin = EN_5V2_Pin|LD2_EN_Pin|TEC2_PD_Pin; +1821:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1822:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1823:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1824:Src/main.c **** HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); +1825:Src/main.c **** +1826:Src/main.c **** /*Configure GPIO pin : EN_5V1_Pin */ +1827:Src/main.c **** GPIO_InitStruct.Pin = EN_5V1_Pin; +1828:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1829:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1830:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +1831:Src/main.c **** HAL_GPIO_Init(EN_5V1_GPIO_Port, &GPIO_InitStruct); +1832:Src/main.c **** +1833:Src/main.c **** /*Configure GPIO pins : TECEN1_Pin TECEN2_Pin REF2_ON_Pin DAC_TEC2_CS_Pin +1834:Src/main.c **** DAC_LD2_CS_Pin */ +1835:Src/main.c **** GPIO_InitStruct.Pin = TECEN1_Pin|TECEN2_Pin|REF2_ON_Pin|DAC_TEC2_CS_Pin +1836:Src/main.c **** |DAC_LD2_CS_Pin; +1837:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1838:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1839:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1840:Src/main.c **** HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); +1841:Src/main.c **** +1842:Src/main.c **** /*Configure GPIO pins : TEC2_FLAG1_Pin TEC2_FLAG2_Pin TEC1_FLAG1_Pin TEC1_FLAG2_Pin */ +1843:Src/main.c **** GPIO_InitStruct.Pin = TEC2_FLAG1_Pin|TEC2_FLAG2_Pin|TEC1_FLAG1_Pin|TEC1_FLAG2_Pin; + ARM GAS /tmp/ccyYWdjY.s page 80 -1844:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); -1845:Src/main.c **** -1846:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ -1847:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; -1848:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1849:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1850:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1851:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); -1852:Src/main.c **** -1853:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ -1854:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; -1855:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1856:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1857:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; -1858:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); -1859:Src/main.c **** -1860:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin -1861:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ -1862:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin -1863:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; -1864:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1865:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1866:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1867:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); -1868:Src/main.c **** -1869:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ -1870:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; -1871:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1872:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1873:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1874:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); -1875:Src/main.c **** -1876:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ -1877:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; -1878:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1879:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1880:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); -1881:Src/main.c **** -1882:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ -1883:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; -1884:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; -1885:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1886:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); -1887:Src/main.c **** -1888:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin -1889:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ -1890:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin -1891:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; -1892:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; -1893:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; -1894:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; -1895:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); -1896:Src/main.c **** -1897:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ -1898:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ -1899:Src/main.c **** } -1900:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 81 +1844:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1845:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1846:Src/main.c **** HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); +1847:Src/main.c **** +1848:Src/main.c **** /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ +1849:Src/main.c **** GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; +1850:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1851:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1852:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1853:Src/main.c **** HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); +1854:Src/main.c **** +1855:Src/main.c **** /*Configure GPIO pin : SPI4_CNV_Pin */ +1856:Src/main.c **** GPIO_InitStruct.Pin = SPI4_CNV_Pin; +1857:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1858:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1859:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +1860:Src/main.c **** HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); +1861:Src/main.c **** +1862:Src/main.c **** /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin DAC_LD1_CS_Pin +1863:Src/main.c **** OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ +1864:Src/main.c **** GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin|DAC_LD1_CS_Pin +1865:Src/main.c **** |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; +1866:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1867:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1868:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1869:Src/main.c **** HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); +1870:Src/main.c **** +1871:Src/main.c **** /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 */ +1872:Src/main.c **** GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7; +1873:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1874:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1875:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1876:Src/main.c **** HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); +1877:Src/main.c **** +1878:Src/main.c **** /*Configure GPIO pin : USB_FLAG_Pin */ +1879:Src/main.c **** GPIO_InitStruct.Pin = USB_FLAG_Pin; +1880:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1881:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1882:Src/main.c **** HAL_GPIO_Init(USB_FLAG_GPIO_Port, &GPIO_InitStruct); +1883:Src/main.c **** +1884:Src/main.c **** /*Configure GPIO pin : SDMMC1_EN_Pin */ +1885:Src/main.c **** GPIO_InitStruct.Pin = SDMMC1_EN_Pin; +1886:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_INPUT; +1887:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1888:Src/main.c **** HAL_GPIO_Init(SDMMC1_EN_GPIO_Port, &GPIO_InitStruct); +1889:Src/main.c **** +1890:Src/main.c **** /*Configure GPIO pins : PG9 OUT_0_Pin OUT_1_Pin OUT_2_Pin +1891:Src/main.c **** OUT_3_Pin OUT_4_Pin OUT_5_Pin */ +1892:Src/main.c **** GPIO_InitStruct.Pin = GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin +1893:Src/main.c **** |OUT_3_Pin|OUT_4_Pin|OUT_5_Pin; +1894:Src/main.c **** GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +1895:Src/main.c **** GPIO_InitStruct.Pull = GPIO_NOPULL; +1896:Src/main.c **** GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; +1897:Src/main.c **** HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); +1898:Src/main.c **** +1899:Src/main.c **** /* USER CODE BEGIN MX_GPIO_Init_2 */ +1900:Src/main.c **** /* USER CODE END MX_GPIO_Init_2 */ + ARM GAS /tmp/ccyYWdjY.s page 81 -1901:Src/main.c **** /* USER CODE BEGIN 4 */ +1901:Src/main.c **** } 1902:Src/main.c **** -1903:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { +1903:Src/main.c **** /* USER CODE BEGIN 4 */ 1904:Src/main.c **** -1905:Src/main.c **** // UART_transmission_request = NO_MESS; +1905:Src/main.c **** //void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) { 1906:Src/main.c **** -1907:Src/main.c **** //} +1907:Src/main.c **** // UART_transmission_request = NO_MESS; 1908:Src/main.c **** -1909:Src/main.c **** static void Init_params(void) -1910:Src/main.c **** { -1911:Src/main.c **** TO6 = 0; -1912:Src/main.c **** TO7 = 0; -1913:Src/main.c **** TO7_before = 0; -1914:Src/main.c **** TO6_before = 0; -1915:Src/main.c **** TO6_uart = 0; -1916:Src/main.c **** flg_tmt = 0; -1917:Src/main.c **** UART_rec_incr = 0; -1918:Src/main.c **** fgoto = 0; -1919:Src/main.c **** sizeoffile = 0; -1920:Src/main.c **** u_tx_flg = 0; -1921:Src/main.c **** u_rx_flg = 0; -1922:Src/main.c **** //State_Data[0]=0; -1923:Src/main.c **** //State_Data[1]=0;//All OK! -1924:Src/main.c **** for (uint16_t i=0; iWORK_EN = ((uint8_t)((*temp2)>>0))&0x01; -2076:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; -2077:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; -2078:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; -2079:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; -2080:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; -2081:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; -2082:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; -2083:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; -2084:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; -2085:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; -2086:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; -2087:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; -2088:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; -2089:Src/main.c **** -2090:Src/main.c **** temp2++; -2091:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2072:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2073:Src/main.c **** } +2074:Src/main.c **** } +2075:Src/main.c **** +2076:Src/main.c **** temp2 = (uint16_t *)Command; +2077:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; +2078:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; +2079:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; +2080:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; +2081:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; +2082:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; +2083:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; +2084:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; +2085:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; +2086:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; +2087:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; +2088:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; +2089:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; +2090:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; +2091:Src/main.c **** 2092:Src/main.c **** temp2++; -2093:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); +2093:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); 2094:Src/main.c **** temp2++; -2095:Src/main.c **** temp2++; +2095:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); 2096:Src/main.c **** temp2++; -2097:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); +2097:Src/main.c **** temp2++; 2098:Src/main.c **** temp2++; -2099:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2099:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); 2100:Src/main.c **** temp2++; -2101:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2101:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint 2102:Src/main.c **** temp2++; -2103:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2103:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint 2104:Src/main.c **** temp2++; -2105:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint +2105:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint 2106:Src/main.c **** temp2++; -2107:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID +2107:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint 2108:Src/main.c **** temp2++; -2109:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); +2109:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID 2110:Src/main.c **** temp2++; -2111:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2111:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); 2112:Src/main.c **** temp2++; -2113:Src/main.c **** -2114:Src/main.c **** if (Curr_setup->U5V1_EN) -2115:Src/main.c **** { -2116:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); -2117:Src/main.c **** } -2118:Src/main.c **** else -2119:Src/main.c **** { -2120:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); -2121:Src/main.c **** } -2122:Src/main.c **** -2123:Src/main.c **** if (Curr_setup->U5V2_EN) -2124:Src/main.c **** { -2125:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); -2126:Src/main.c **** } -2127:Src/main.c **** else -2128:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 85 +2113:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); +2114:Src/main.c **** temp2++; +2115:Src/main.c **** +2116:Src/main.c **** if (Curr_setup->U5V1_EN) +2117:Src/main.c **** { +2118:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_SET); +2119:Src/main.c **** } +2120:Src/main.c **** else +2121:Src/main.c **** { +2122:Src/main.c **** HAL_GPIO_WritePin(EN_5V1_GPIO_Port, EN_5V1_Pin, GPIO_PIN_RESET); +2123:Src/main.c **** } +2124:Src/main.c **** +2125:Src/main.c **** if (Curr_setup->U5V2_EN) +2126:Src/main.c **** { +2127:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_SET); +2128:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 85 -2129:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); -2130:Src/main.c **** } -2131:Src/main.c **** -2132:Src/main.c **** if (Curr_setup->LD1_EN) -2133:Src/main.c **** { -2134:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); -2135:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC -2136:Src/main.c **** } -2137:Src/main.c **** else -2138:Src/main.c **** { -2139:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); -2140:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC -2141:Src/main.c **** } -2142:Src/main.c **** -2143:Src/main.c **** if (Curr_setup->LD2_EN) -2144:Src/main.c **** { -2145:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); -2146:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC -2147:Src/main.c **** } -2148:Src/main.c **** else -2149:Src/main.c **** { -2150:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); -2151:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC -2152:Src/main.c **** } -2153:Src/main.c **** -2154:Src/main.c **** if (Curr_setup->REF1_EN) -2155:Src/main.c **** { -2156:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); -2157:Src/main.c **** } -2158:Src/main.c **** else -2159:Src/main.c **** { -2160:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); -2161:Src/main.c **** } -2162:Src/main.c **** -2163:Src/main.c **** if (Curr_setup->REF2_EN) -2164:Src/main.c **** { -2165:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); -2166:Src/main.c **** } -2167:Src/main.c **** else -2168:Src/main.c **** { -2169:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); -2170:Src/main.c **** } -2171:Src/main.c **** -2172:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) -2173:Src/main.c **** { -2174:Src/main.c **** Set_LTEC(3,32767); -2175:Src/main.c **** Set_LTEC(3,32767); -2176:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); -2177:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); -2178:Src/main.c **** } -2179:Src/main.c **** else -2180:Src/main.c **** { -2181:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); -2182:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); -2183:Src/main.c **** } -2184:Src/main.c **** -2185:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) - ARM GAS /tmp/ccfIOqv2.s page 86 +2129:Src/main.c **** else +2130:Src/main.c **** { +2131:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); +2132:Src/main.c **** } +2133:Src/main.c **** +2134:Src/main.c **** if (Curr_setup->LD1_EN) +2135:Src/main.c **** { +2136:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_SET); +2137:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC +2138:Src/main.c **** } +2139:Src/main.c **** else +2140:Src/main.c **** { +2141:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); +2142:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC +2143:Src/main.c **** } +2144:Src/main.c **** +2145:Src/main.c **** if (Curr_setup->LD2_EN) +2146:Src/main.c **** { +2147:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_SET); +2148:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC +2149:Src/main.c **** } +2150:Src/main.c **** else +2151:Src/main.c **** { +2152:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); +2153:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC +2154:Src/main.c **** } +2155:Src/main.c **** +2156:Src/main.c **** if (Curr_setup->REF1_EN) +2157:Src/main.c **** { +2158:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_SET); +2159:Src/main.c **** } +2160:Src/main.c **** else +2161:Src/main.c **** { +2162:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); +2163:Src/main.c **** } +2164:Src/main.c **** +2165:Src/main.c **** if (Curr_setup->REF2_EN) +2166:Src/main.c **** { +2167:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_SET); +2168:Src/main.c **** } +2169:Src/main.c **** else +2170:Src/main.c **** { +2171:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); +2172:Src/main.c **** } +2173:Src/main.c **** +2174:Src/main.c **** if ((Curr_setup->TS1_EN)&&(Curr_setup->TEC1_EN)) +2175:Src/main.c **** { +2176:Src/main.c **** Set_LTEC(3,32767); +2177:Src/main.c **** Set_LTEC(3,32767); +2178:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); +2179:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); +2180:Src/main.c **** } +2181:Src/main.c **** else +2182:Src/main.c **** { +2183:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); +2184:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); +2185:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 86 -2186:Src/main.c **** { -2187:Src/main.c **** Set_LTEC(4,32767); -2188:Src/main.c **** Set_LTEC(4,32767); -2189:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); -2190:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); -2191:Src/main.c **** } -2192:Src/main.c **** else -2193:Src/main.c **** { -2194:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); -2195:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); -2196:Src/main.c **** } -2197:Src/main.c **** -2198:Src/main.c **** if (Curr_setup->PI1_RD==0) -2199:Src/main.c **** { -2200:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; -2201:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; -2202:Src/main.c **** } -2203:Src/main.c **** -2204:Src/main.c **** if (Curr_setup->PI2_RD==0) -2205:Src/main.c **** { -2206:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; -2207:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; -2208:Src/main.c **** } -2209:Src/main.c **** } -2210:Src/main.c **** -2211:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ -2212:Src/main.c **** { - 253 .loc 1 2212 1 is_stmt 1 view -0 +2186:Src/main.c **** +2187:Src/main.c **** if ((Curr_setup->TS2_EN)&&(Curr_setup->TEC2_EN)) +2188:Src/main.c **** { +2189:Src/main.c **** Set_LTEC(4,32767); +2190:Src/main.c **** Set_LTEC(4,32767); +2191:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); +2192:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); +2193:Src/main.c **** } +2194:Src/main.c **** else +2195:Src/main.c **** { +2196:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); +2197:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); +2198:Src/main.c **** } +2199:Src/main.c **** +2200:Src/main.c **** if (Curr_setup->PI1_RD==0) +2201:Src/main.c **** { +2202:Src/main.c **** LD1_curr_setup->P_coef_temp = 10; +2203:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; +2204:Src/main.c **** } +2205:Src/main.c **** +2206:Src/main.c **** if (Curr_setup->PI2_RD==0) +2207:Src/main.c **** { +2208:Src/main.c **** LD2_curr_setup->P_coef_temp = 10; +2209:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; +2210:Src/main.c **** } +2211:Src/main.c **** } +2212:Src/main.c **** +2213:Src/main.c **** static void Decode_task(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ +2214:Src/main.c **** { + 253 .loc 1 2214 1 is_stmt 1 view -0 254 .cfi_startproc 255 @ args = 0, pretend = 0, frame = 8 256 @ frame_needed = 0, uses_anonymous_args = 0 257 @ link register save eliminated. - 258 .loc 1 2212 1 is_stmt 0 view .LVU66 + 258 .loc 1 2214 1 is_stmt 0 view .LVU66 259 0000 82B0 sub sp, sp, #8 260 .LCFI4: 261 .cfi_def_cfa_offset 8 -2213:Src/main.c **** uint16_t *temp2; - 262 .loc 1 2213 2 is_stmt 1 view .LVU67 -2214:Src/main.c **** -2215:Src/main.c **** temp2 = (uint16_t *)Command; - 263 .loc 1 2215 2 view .LVU68 +2215:Src/main.c **** uint16_t *temp2; + 262 .loc 1 2215 2 is_stmt 1 view .LVU67 +2216:Src/main.c **** +2217:Src/main.c **** temp2 = (uint16_t *)Command; + 263 .loc 1 2217 2 view .LVU68 264 .LVL15: -2216:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 265 .loc 1 2216 2 view .LVU69 - 266 .loc 1 2216 36 is_stmt 0 view .LVU70 +2218:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 265 .loc 1 2218 2 view .LVU69 + 266 .loc 1 2218 36 is_stmt 0 view .LVU70 267 0002 0288 ldrh r2, [r0] 268 .LVL16: - 269 .loc 1 2216 48 view .LVU71 + 269 .loc 1 2218 48 view .LVU71 270 0004 02F00102 and r2, r2, #1 - 271 .loc 1 2216 22 view .LVU72 + 271 .loc 1 2218 22 view .LVU72 272 0008 1A70 strb r2, [r3] -2217:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 273 .loc 1 2217 2 is_stmt 1 view .LVU73 - 274 .loc 1 2217 36 is_stmt 0 view .LVU74 +2219:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 273 .loc 1 2219 2 is_stmt 1 view .LVU73 + 274 .loc 1 2219 36 is_stmt 0 view .LVU74 275 000a 0288 ldrh r2, [r0] - 276 .loc 1 2217 48 view .LVU75 + ARM GAS /tmp/ccyYWdjY.s page 87 + + + 276 .loc 1 2219 48 view .LVU75 277 000c C2F34002 ubfx r2, r2, #1, #1 - ARM GAS /tmp/ccfIOqv2.s page 87 - - - 278 .loc 1 2217 22 view .LVU76 + 278 .loc 1 2219 22 view .LVU76 279 0010 5A70 strb r2, [r3, #1] -2218:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 280 .loc 1 2218 2 is_stmt 1 view .LVU77 - 281 .loc 1 2218 36 is_stmt 0 view .LVU78 +2220:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 280 .loc 1 2220 2 is_stmt 1 view .LVU77 + 281 .loc 1 2220 36 is_stmt 0 view .LVU78 282 0012 0288 ldrh r2, [r0] - 283 .loc 1 2218 48 view .LVU79 + 283 .loc 1 2220 48 view .LVU79 284 0014 C2F38002 ubfx r2, r2, #2, #1 - 285 .loc 1 2218 22 view .LVU80 + 285 .loc 1 2220 22 view .LVU80 286 0018 9A70 strb r2, [r3, #2] -2219:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 287 .loc 1 2219 2 is_stmt 1 view .LVU81 - 288 .loc 1 2219 35 is_stmt 0 view .LVU82 +2221:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 287 .loc 1 2221 2 is_stmt 1 view .LVU81 + 288 .loc 1 2221 35 is_stmt 0 view .LVU82 289 001a 0288 ldrh r2, [r0] - 290 .loc 1 2219 47 view .LVU83 + 290 .loc 1 2221 47 view .LVU83 291 001c C2F3C002 ubfx r2, r2, #3, #1 - 292 .loc 1 2219 21 view .LVU84 + 292 .loc 1 2221 21 view .LVU84 293 0020 DA70 strb r2, [r3, #3] -2220:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 294 .loc 1 2220 2 is_stmt 1 view .LVU85 - 295 .loc 1 2220 35 is_stmt 0 view .LVU86 +2222:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 294 .loc 1 2222 2 is_stmt 1 view .LVU85 + 295 .loc 1 2222 35 is_stmt 0 view .LVU86 296 0022 0288 ldrh r2, [r0] - 297 .loc 1 2220 47 view .LVU87 + 297 .loc 1 2222 47 view .LVU87 298 0024 C2F30012 ubfx r2, r2, #4, #1 - 299 .loc 1 2220 21 view .LVU88 + 299 .loc 1 2222 21 view .LVU88 300 0028 1A71 strb r2, [r3, #4] -2221:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 301 .loc 1 2221 2 is_stmt 1 view .LVU89 - 302 .loc 1 2221 36 is_stmt 0 view .LVU90 +2223:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 301 .loc 1 2223 2 is_stmt 1 view .LVU89 + 302 .loc 1 2223 36 is_stmt 0 view .LVU90 303 002a 0288 ldrh r2, [r0] - 304 .loc 1 2221 48 view .LVU91 + 304 .loc 1 2223 48 view .LVU91 305 002c C2F34012 ubfx r2, r2, #5, #1 - 306 .loc 1 2221 22 view .LVU92 + 306 .loc 1 2223 22 view .LVU92 307 0030 5A71 strb r2, [r3, #5] -2222:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 308 .loc 1 2222 2 is_stmt 1 view .LVU93 - 309 .loc 1 2222 36 is_stmt 0 view .LVU94 +2224:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 308 .loc 1 2224 2 is_stmt 1 view .LVU93 + 309 .loc 1 2224 36 is_stmt 0 view .LVU94 310 0032 0288 ldrh r2, [r0] - 311 .loc 1 2222 48 view .LVU95 + 311 .loc 1 2224 48 view .LVU95 312 0034 C2F38012 ubfx r2, r2, #6, #1 - 313 .loc 1 2222 22 view .LVU96 + 313 .loc 1 2224 22 view .LVU96 314 0038 9A71 strb r2, [r3, #6] -2223:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 315 .loc 1 2223 2 is_stmt 1 view .LVU97 - 316 .loc 1 2223 36 is_stmt 0 view .LVU98 +2225:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 315 .loc 1 2225 2 is_stmt 1 view .LVU97 + 316 .loc 1 2225 36 is_stmt 0 view .LVU98 317 003a 0288 ldrh r2, [r0] - 318 .loc 1 2223 48 view .LVU99 + 318 .loc 1 2225 48 view .LVU99 319 003c C2F3C012 ubfx r2, r2, #7, #1 - 320 .loc 1 2223 22 view .LVU100 + 320 .loc 1 2225 22 view .LVU100 321 0040 DA71 strb r2, [r3, #7] -2224:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 322 .loc 1 2224 2 is_stmt 1 view .LVU101 - 323 .loc 1 2224 36 is_stmt 0 view .LVU102 +2226:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 322 .loc 1 2226 2 is_stmt 1 view .LVU101 + 323 .loc 1 2226 36 is_stmt 0 view .LVU102 324 0042 0288 ldrh r2, [r0] - 325 .loc 1 2224 48 view .LVU103 + 325 .loc 1 2226 48 view .LVU103 + ARM GAS /tmp/ccyYWdjY.s page 88 + + 326 0044 C2F30022 ubfx r2, r2, #8, #1 - 327 .loc 1 2224 22 view .LVU104 - ARM GAS /tmp/ccfIOqv2.s page 88 - - + 327 .loc 1 2226 22 view .LVU104 328 0048 1A72 strb r2, [r3, #8] -2225:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 329 .loc 1 2225 2 is_stmt 1 view .LVU105 - 330 .loc 1 2225 35 is_stmt 0 view .LVU106 +2227:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 329 .loc 1 2227 2 is_stmt 1 view .LVU105 + 330 .loc 1 2227 35 is_stmt 0 view .LVU106 331 004a 0288 ldrh r2, [r0] - 332 .loc 1 2225 47 view .LVU107 + 332 .loc 1 2227 47 view .LVU107 333 004c C2F34022 ubfx r2, r2, #9, #1 - 334 .loc 1 2225 21 view .LVU108 + 334 .loc 1 2227 21 view .LVU108 335 0050 5A72 strb r2, [r3, #9] -2226:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 336 .loc 1 2226 2 is_stmt 1 view .LVU109 - 337 .loc 1 2226 35 is_stmt 0 view .LVU110 +2228:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 336 .loc 1 2228 2 is_stmt 1 view .LVU109 + 337 .loc 1 2228 35 is_stmt 0 view .LVU110 338 0052 0288 ldrh r2, [r0] - 339 .loc 1 2226 48 view .LVU111 + 339 .loc 1 2228 48 view .LVU111 340 0054 C2F38022 ubfx r2, r2, #10, #1 - 341 .loc 1 2226 21 view .LVU112 + 341 .loc 1 2228 21 view .LVU112 342 0058 9A72 strb r2, [r3, #10] -2227:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 343 .loc 1 2227 2 is_stmt 1 view .LVU113 - 344 .loc 1 2227 34 is_stmt 0 view .LVU114 +2229:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 343 .loc 1 2229 2 is_stmt 1 view .LVU113 + 344 .loc 1 2229 34 is_stmt 0 view .LVU114 345 005a 0288 ldrh r2, [r0] - 346 .loc 1 2227 47 view .LVU115 + 346 .loc 1 2229 47 view .LVU115 347 005c C2F3C022 ubfx r2, r2, #11, #1 - 348 .loc 1 2227 20 view .LVU116 + 348 .loc 1 2229 20 view .LVU116 349 0060 DA72 strb r2, [r3, #11] -2228:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 350 .loc 1 2228 2 is_stmt 1 view .LVU117 - 351 .loc 1 2228 35 is_stmt 0 view .LVU118 +2230:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 350 .loc 1 2230 2 is_stmt 1 view .LVU117 + 351 .loc 1 2230 35 is_stmt 0 view .LVU118 352 0062 0288 ldrh r2, [r0] - 353 .loc 1 2228 48 view .LVU119 + 353 .loc 1 2230 48 view .LVU119 354 0064 C2F30032 ubfx r2, r2, #12, #1 - 355 .loc 1 2228 21 view .LVU120 + 355 .loc 1 2230 21 view .LVU120 356 0068 1A73 strb r2, [r3, #12] -2229:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 357 .loc 1 2229 2 is_stmt 1 view .LVU121 - 358 .loc 1 2229 35 is_stmt 0 view .LVU122 +2231:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 357 .loc 1 2231 2 is_stmt 1 view .LVU121 + 358 .loc 1 2231 35 is_stmt 0 view .LVU122 359 006a 0288 ldrh r2, [r0] - 360 .loc 1 2229 48 view .LVU123 + 360 .loc 1 2231 48 view .LVU123 361 006c C2F34032 ubfx r2, r2, #13, #1 - 362 .loc 1 2229 21 view .LVU124 + 362 .loc 1 2231 21 view .LVU124 363 0070 5A73 strb r2, [r3, #13] -2230:Src/main.c **** -2231:Src/main.c **** temp2++; - 364 .loc 1 2231 2 is_stmt 1 view .LVU125 +2232:Src/main.c **** +2233:Src/main.c **** temp2++; + 364 .loc 1 2233 2 is_stmt 1 view .LVU125 365 .LVL17: -2232:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; - 366 .loc 1 2232 2 view .LVU126 - 367 .loc 1 2232 21 is_stmt 0 view .LVU127 +2234:Src/main.c **** task.task_type = (uint8_t)(*temp2); temp2++; + 366 .loc 1 2234 2 view .LVU126 + 367 .loc 1 2234 21 is_stmt 0 view .LVU127 368 0072 8278 ldrb r2, [r0, #2] @ zero_extendqisi2 - 369 .loc 1 2232 19 view .LVU128 + 369 .loc 1 2234 19 view .LVU128 370 0074 384B ldr r3, .L14+8 371 .LVL18: - 372 .loc 1 2232 19 view .LVU129 + 372 .loc 1 2234 19 view .LVU129 373 0076 1A70 strb r2, [r3] - 374 .loc 1 2232 40 is_stmt 1 view .LVU130 + 374 .loc 1 2234 40 is_stmt 1 view .LVU130 + ARM GAS /tmp/ccyYWdjY.s page 89 + + 375 .LVL19: -2233:Src/main.c **** task.min_param = (float)(*temp2); temp2++; - ARM GAS /tmp/ccfIOqv2.s page 89 - - - 376 .loc 1 2233 2 view .LVU131 - 377 .loc 1 2233 29 is_stmt 0 view .LVU132 +2235:Src/main.c **** task.min_param = (float)(*temp2); temp2++; + 376 .loc 1 2235 2 view .LVU131 + 377 .loc 1 2235 29 is_stmt 0 view .LVU132 378 0078 8288 ldrh r2, [r0, #4] 379 007a 07EE902A vmov s15, r2 @ int - 380 .loc 1 2233 21 view .LVU133 + 380 .loc 1 2235 21 view .LVU133 381 007e F8EE677A vcvt.f32.u32 s15, s15 - 382 .loc 1 2233 19 view .LVU134 + 382 .loc 1 2235 19 view .LVU134 383 0082 C3ED017A vstr.32 s15, [r3, #4] - 384 .loc 1 2233 38 is_stmt 1 view .LVU135 + 384 .loc 1 2235 38 is_stmt 1 view .LVU135 385 .LVL20: -2234:Src/main.c **** task.max_param = (float)(*temp2); temp2++; - 386 .loc 1 2234 2 view .LVU136 - 387 .loc 1 2234 29 is_stmt 0 view .LVU137 +2236:Src/main.c **** task.max_param = (float)(*temp2); temp2++; + 386 .loc 1 2236 2 view .LVU136 + 387 .loc 1 2236 29 is_stmt 0 view .LVU137 388 0086 C288 ldrh r2, [r0, #6] 389 0088 07EE902A vmov s15, r2 @ int - 390 .loc 1 2234 21 view .LVU138 + 390 .loc 1 2236 21 view .LVU138 391 008c F8EE677A vcvt.f32.u32 s15, s15 - 392 .loc 1 2234 19 view .LVU139 + 392 .loc 1 2236 19 view .LVU139 393 0090 C3ED027A vstr.32 s15, [r3, #8] - 394 .loc 1 2234 38 is_stmt 1 view .LVU140 + 394 .loc 1 2236 38 is_stmt 1 view .LVU140 395 .LVL21: -2235:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; - 396 .loc 1 2235 2 view .LVU141 - 397 .loc 1 2235 29 is_stmt 0 view .LVU142 +2237:Src/main.c **** task.delta_param = (float)(*temp2); temp2++; + 396 .loc 1 2237 2 view .LVU141 + 397 .loc 1 2237 29 is_stmt 0 view .LVU142 398 0094 0289 ldrh r2, [r0, #8] 399 0096 07EE902A vmov s15, r2 @ int - 400 .loc 1 2235 21 view .LVU143 + 400 .loc 1 2237 21 view .LVU143 401 009a F8EE677A vcvt.f32.u32 s15, s15 - 402 .loc 1 2235 19 view .LVU144 + 402 .loc 1 2237 19 view .LVU144 403 009e C3ED037A vstr.32 s15, [r3, #12] - 404 .loc 1 2235 38 is_stmt 1 view .LVU145 + 404 .loc 1 2237 38 is_stmt 1 view .LVU145 405 .LVL22: -2236:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; - 406 .loc 1 2236 2 view .LVU146 - 407 .loc 1 2236 29 is_stmt 0 view .LVU147 +2238:Src/main.c **** task.dt = (float)(*temp2) / 100.0; temp2++; + 406 .loc 1 2238 2 view .LVU146 + 407 .loc 1 2238 29 is_stmt 0 view .LVU147 408 00a2 4289 ldrh r2, [r0, #10] 409 00a4 07EE102A vmov s14, r2 @ int - 410 .loc 1 2236 21 view .LVU148 + 410 .loc 1 2238 21 view .LVU148 411 00a8 B8EE477B vcvt.f64.u32 d7, s14 - 412 .loc 1 2236 37 view .LVU149 + 412 .loc 1 2238 37 view .LVU149 413 00ac 9FED285B vldr.64 d5, .L14 414 00b0 87EE056B vdiv.f64 d6, d7, d5 - 415 .loc 1 2236 19 view .LVU150 + 415 .loc 1 2238 19 view .LVU150 416 00b4 FCEEC67B vcvt.u32.f64 s15, d6 417 00b8 CDED017A vstr.32 s15, [sp, #4] @ int 418 00bc 9DF80420 ldrb r2, [sp, #4] @ zero_extendqisi2 419 00c0 1A75 strb r2, [r3, #20] - 420 .loc 1 2236 46 is_stmt 1 view .LVU151 + 420 .loc 1 2238 46 is_stmt 1 view .LVU151 421 .LVL23: -2237:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; - 422 .loc 1 2237 2 view .LVU152 - 423 .loc 1 2237 29 is_stmt 0 view .LVU153 +2239:Src/main.c **** task.sec_param = (float)(*temp2); temp2++; + 422 .loc 1 2239 2 view .LVU152 + 423 .loc 1 2239 29 is_stmt 0 view .LVU153 424 00c2 8189 ldrh r1, [r0, #12] 425 .LVL24: - 426 .loc 1 2237 29 view .LVU154 + 426 .loc 1 2239 29 view .LVU154 + ARM GAS /tmp/ccyYWdjY.s page 90 + + 427 00c4 07EE901A vmov s15, r1 @ int - 428 .loc 1 2237 21 view .LVU155 - ARM GAS /tmp/ccfIOqv2.s page 90 - - + 428 .loc 1 2239 21 view .LVU155 429 00c8 F8EE677A vcvt.f32.u32 s15, s15 - 430 .loc 1 2237 19 view .LVU156 + 430 .loc 1 2239 19 view .LVU156 431 00cc C3ED067A vstr.32 s15, [r3, #24] - 432 .loc 1 2237 38 is_stmt 1 view .LVU157 + 432 .loc 1 2239 38 is_stmt 1 view .LVU157 433 .LVL25: -2238:Src/main.c **** task.curr = (float)(*temp2); temp2++; - 434 .loc 1 2238 2 view .LVU158 - 435 .loc 1 2238 29 is_stmt 0 view .LVU159 +2240:Src/main.c **** task.curr = (float)(*temp2); temp2++; + 434 .loc 1 2240 2 view .LVU158 + 435 .loc 1 2240 29 is_stmt 0 view .LVU159 436 00d0 C189 ldrh r1, [r0, #14] 437 00d2 07EE901A vmov s15, r1 @ int - 438 .loc 1 2238 21 view .LVU160 + 438 .loc 1 2240 21 view .LVU160 439 00d6 F8EE677A vcvt.f32.u32 s15, s15 - 440 .loc 1 2238 19 view .LVU161 + 440 .loc 1 2240 19 view .LVU161 441 00da C3ED077A vstr.32 s15, [r3, #28] - 442 .loc 1 2238 38 is_stmt 1 view .LVU162 + 442 .loc 1 2240 38 is_stmt 1 view .LVU162 443 .LVL26: -2239:Src/main.c **** task.temp = (float)(*temp2); temp2++; - 444 .loc 1 2239 2 view .LVU163 - 445 .loc 1 2239 29 is_stmt 0 view .LVU164 +2241:Src/main.c **** task.temp = (float)(*temp2); temp2++; + 444 .loc 1 2241 2 view .LVU163 + 445 .loc 1 2241 29 is_stmt 0 view .LVU164 446 00de 018A ldrh r1, [r0, #16] 447 00e0 07EE901A vmov s15, r1 @ int - 448 .loc 1 2239 21 view .LVU165 + 448 .loc 1 2241 21 view .LVU165 449 00e4 F8EE677A vcvt.f32.u32 s15, s15 - 450 .loc 1 2239 19 view .LVU166 + 450 .loc 1 2241 19 view .LVU166 451 00e8 C3ED087A vstr.32 s15, [r3, #32] - 452 .loc 1 2239 38 is_stmt 1 view .LVU167 + 452 .loc 1 2241 38 is_stmt 1 view .LVU167 453 .LVL27: -2240:Src/main.c **** task.tau = (float)(*temp2); temp2++; - 454 .loc 1 2240 2 view .LVU168 - 455 .loc 1 2240 29 is_stmt 0 view .LVU169 +2242:Src/main.c **** task.tau = (float)(*temp2); temp2++; + 454 .loc 1 2242 2 view .LVU168 + 455 .loc 1 2242 29 is_stmt 0 view .LVU169 456 00ec 418A ldrh r1, [r0, #18] - 457 .loc 1 2240 19 view .LVU170 + 457 .loc 1 2242 19 view .LVU170 458 00ee D982 strh r1, [r3, #22] @ movhi - 459 .loc 1 2240 38 is_stmt 1 view .LVU171 + 459 .loc 1 2242 38 is_stmt 1 view .LVU171 460 .LVL28: -2241:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; - 461 .loc 1 2241 2 view .LVU172 - 462 .loc 1 2241 29 is_stmt 0 view .LVU173 +2243:Src/main.c **** task.p_coef_1 = (float)(*temp2) * 256.0; temp2++; + 461 .loc 1 2243 2 view .LVU172 + 462 .loc 1 2243 29 is_stmt 0 view .LVU173 463 00f0 818A ldrh r1, [r0, #20] 464 00f2 07EE901A vmov s15, r1 @ int - 465 .loc 1 2241 21 view .LVU174 + 465 .loc 1 2243 21 view .LVU174 466 00f6 F8EE677A vcvt.f32.u32 s15, s15 - 467 .loc 1 2241 37 view .LVU175 + 467 .loc 1 2243 37 view .LVU175 468 00fa 9FED187A vldr.32 s14, .L14+12 469 00fe 67EE877A vmul.f32 s15, s15, s14 - 470 .loc 1 2241 19 view .LVU176 + 470 .loc 1 2243 19 view .LVU176 471 0102 C3ED0A7A vstr.32 s15, [r3, #40] - 472 .loc 1 2241 46 is_stmt 1 view .LVU177 + 472 .loc 1 2243 46 is_stmt 1 view .LVU177 473 .LVL29: -2242:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; - 474 .loc 1 2242 2 view .LVU178 - 475 .loc 1 2242 29 is_stmt 0 view .LVU179 +2244:Src/main.c **** task.i_coef_1 = (float)(*temp2) * 256.0; temp2++; + 474 .loc 1 2244 2 view .LVU178 + 475 .loc 1 2244 29 is_stmt 0 view .LVU179 476 0106 C18A ldrh r1, [r0, #22] 477 0108 07EE901A vmov s15, r1 @ int - 478 .loc 1 2242 21 view .LVU180 + 478 .loc 1 2244 21 view .LVU180 + ARM GAS /tmp/ccyYWdjY.s page 91 + + 479 010c F8EE677A vcvt.f32.u32 s15, s15 - 480 .loc 1 2242 37 view .LVU181 - ARM GAS /tmp/ccfIOqv2.s page 91 - - + 480 .loc 1 2244 37 view .LVU181 481 0110 67EE877A vmul.f32 s15, s15, s14 - 482 .loc 1 2242 19 view .LVU182 + 482 .loc 1 2244 19 view .LVU182 483 0114 C3ED097A vstr.32 s15, [r3, #36] - 484 .loc 1 2242 46 is_stmt 1 view .LVU183 + 484 .loc 1 2244 46 is_stmt 1 view .LVU183 485 .LVL30: -2243:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; - 486 .loc 1 2243 2 view .LVU184 - 487 .loc 1 2243 29 is_stmt 0 view .LVU185 +2245:Src/main.c **** task.p_coef_2 = (float)(*temp2) * 256.0; temp2++; + 486 .loc 1 2245 2 view .LVU184 + 487 .loc 1 2245 29 is_stmt 0 view .LVU185 488 0118 018B ldrh r1, [r0, #24] 489 011a 07EE901A vmov s15, r1 @ int - 490 .loc 1 2243 21 view .LVU186 + 490 .loc 1 2245 21 view .LVU186 491 011e F8EE677A vcvt.f32.u32 s15, s15 - 492 .loc 1 2243 37 view .LVU187 + 492 .loc 1 2245 37 view .LVU187 493 0122 67EE877A vmul.f32 s15, s15, s14 - 494 .loc 1 2243 19 view .LVU188 + 494 .loc 1 2245 19 view .LVU188 495 0126 C3ED0C7A vstr.32 s15, [r3, #48] - 496 .loc 1 2243 46 is_stmt 1 view .LVU189 + 496 .loc 1 2245 46 is_stmt 1 view .LVU189 497 .LVL31: -2244:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; - 498 .loc 1 2244 2 view .LVU190 - 499 .loc 1 2244 29 is_stmt 0 view .LVU191 +2246:Src/main.c **** task.i_coef_2 = (float)(*temp2) * 256.0; temp2++; + 498 .loc 1 2246 2 view .LVU190 + 499 .loc 1 2246 29 is_stmt 0 view .LVU191 500 012a 418B ldrh r1, [r0, #26] 501 012c 07EE901A vmov s15, r1 @ int - 502 .loc 1 2244 21 view .LVU192 + 502 .loc 1 2246 21 view .LVU192 503 0130 F8EE677A vcvt.f32.u32 s15, s15 - 504 .loc 1 2244 37 view .LVU193 + 504 .loc 1 2246 37 view .LVU193 505 0134 67EE877A vmul.f32 s15, s15, s14 - 506 .loc 1 2244 19 view .LVU194 + 506 .loc 1 2246 19 view .LVU194 507 0138 C3ED0B7A vstr.32 s15, [r3, #44] - 508 .loc 1 2244 46 is_stmt 1 view .LVU195 + 508 .loc 1 2246 46 is_stmt 1 view .LVU195 509 .LVL32: -2245:Src/main.c **** -2246:Src/main.c **** TO10_counter = task.dt / 10; - 510 .loc 1 2246 2 view .LVU196 - 511 .loc 1 2246 25 is_stmt 0 view .LVU197 +2247:Src/main.c **** +2248:Src/main.c **** TO10_counter = task.dt / 10; + 510 .loc 1 2248 2 view .LVU196 + 511 .loc 1 2248 25 is_stmt 0 view .LVU197 512 013c 084B ldr r3, .L14+16 513 013e A3FB0232 umull r3, r2, r3, r2 514 0142 D208 lsrs r2, r2, #3 - 515 .loc 1 2246 15 view .LVU198 + 515 .loc 1 2248 15 view .LVU198 516 0144 074B ldr r3, .L14+20 517 0146 1A60 str r2, [r3] -2247:Src/main.c **** } - 518 .loc 1 2247 1 view .LVU199 +2249:Src/main.c **** } + 518 .loc 1 2249 1 view .LVU199 519 0148 02B0 add sp, sp, #8 520 .LCFI5: 521 .cfi_def_cfa_offset 0 @@ -5456,11 +5458,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 528 0154 00005940 .word 1079574528 529 0158 00000000 .word task 530 015c 00008043 .word 1132462080 + ARM GAS /tmp/ccyYWdjY.s page 92 + + 531 0160 CDCCCCCC .word -858993459 532 0164 00000000 .word TO10_counter - ARM GAS /tmp/ccfIOqv2.s page 92 - - 533 .cfi_endproc 534 .LFE1209: 536 .section .text.PID_Controller_Temp,"ax",%progbits @@ -5471,551 +5473,551 @@ ARM GAS /tmp/ccfIOqv2.s page 1 542 PID_Controller_Temp: 543 .LVL33: 544 .LFB1215: -2248:Src/main.c **** -2249:Src/main.c **** void OUT_trigger(uint8_t out_n) -2250:Src/main.c **** { -2251:Src/main.c **** switch (out_n) -2252:Src/main.c **** { -2253:Src/main.c **** case 0: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); -2255:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); -2256:Src/main.c **** break; -2257:Src/main.c **** -2258:Src/main.c **** case 1: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); -2260:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); -2261:Src/main.c **** break; -2262:Src/main.c **** -2263:Src/main.c **** case 2: -2264:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); -2265:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); -2266:Src/main.c **** break; -2267:Src/main.c **** -2268:Src/main.c **** case 3: -2269:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); -2270:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); -2271:Src/main.c **** break; -2272:Src/main.c **** -2273:Src/main.c **** case 4: -2274:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); -2275:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); -2276:Src/main.c **** break; -2277:Src/main.c **** -2278:Src/main.c **** case 5: -2279:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); -2280:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); -2281:Src/main.c **** break; -2282:Src/main.c **** -2283:Src/main.c **** case 6: -2284:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); -2285:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); -2286:Src/main.c **** break; -2287:Src/main.c **** -2288:Src/main.c **** case 7: -2289:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); -2290:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); -2291:Src/main.c **** break; -2292:Src/main.c **** -2293:Src/main.c **** case 8: -2294:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); - ARM GAS /tmp/ccfIOqv2.s page 93 +2250:Src/main.c **** +2251:Src/main.c **** void OUT_trigger(uint8_t out_n) +2252:Src/main.c **** { +2253:Src/main.c **** switch (out_n) +2254:Src/main.c **** { +2255:Src/main.c **** case 0: +2256:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_SET); +2257:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); +2258:Src/main.c **** break; +2259:Src/main.c **** +2260:Src/main.c **** case 1: +2261:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_SET); +2262:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); +2263:Src/main.c **** break; +2264:Src/main.c **** +2265:Src/main.c **** case 2: +2266:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_SET); +2267:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); +2268:Src/main.c **** break; +2269:Src/main.c **** +2270:Src/main.c **** case 3: +2271:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_SET); +2272:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); +2273:Src/main.c **** break; +2274:Src/main.c **** +2275:Src/main.c **** case 4: +2276:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_SET); +2277:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); +2278:Src/main.c **** break; +2279:Src/main.c **** +2280:Src/main.c **** case 5: +2281:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_SET); +2282:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); +2283:Src/main.c **** break; +2284:Src/main.c **** +2285:Src/main.c **** case 6: +2286:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); +2287:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); +2288:Src/main.c **** break; +2289:Src/main.c **** +2290:Src/main.c **** case 7: +2291:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET); +2292:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); +2293:Src/main.c **** break; +2294:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 93 -2295:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); -2296:Src/main.c **** break; -2297:Src/main.c **** -2298:Src/main.c **** case 9: -2299:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); -2300:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); -2301:Src/main.c **** break; -2302:Src/main.c **** } -2303:Src/main.c **** } -2304:Src/main.c **** -2305:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) -2306:Src/main.c **** { -2307:Src/main.c **** uint32_t tmp32; -2308:Src/main.c **** -2309:Src/main.c **** switch (num) -2310:Src/main.c **** { -2311:Src/main.c **** case 1: -2312:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2313:Src/main.c **** //tmp32=0; -2314:Src/main.c **** //while(tmp32<500){tmp32++;} -2315:Src/main.c **** tmp32 = 0; -2316:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2317:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2318:Src/main.c **** tmp32 = 0; -2319:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2320:Src/main.c **** (void) SPI2->DR; -2321:Src/main.c **** break; -2322:Src/main.c **** case 2: -2323:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes -2324:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L -2325:Src/main.c **** //tmp32=0; -2326:Src/main.c **** //while(tmp32<500){tmp32++;} -2327:Src/main.c **** tmp32 = 0; -2328:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2329:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC -2330:Src/main.c **** tmp32 = 0; -2331:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2332:Src/main.c **** (void) SPI6->DR; -2333:Src/main.c **** break; -2334:Src/main.c **** case 3: -2335:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with -2336:Src/main.c **** //tmp32=0; -2337:Src/main.c **** //while(tmp32<500){tmp32++;} -2338:Src/main.c **** tmp32 = 0; -2339:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2340:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC -2341:Src/main.c **** tmp32 = 0; -2342:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2343:Src/main.c **** (void) SPI2->DR; -2344:Src/main.c **** break; -2345:Src/main.c **** case 4: -2346:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with -2347:Src/main.c **** //tmp32=0; -2348:Src/main.c **** //while(tmp32<500){tmp32++;} -2349:Src/main.c **** tmp32 = 0; -2350:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi -2351:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - ARM GAS /tmp/ccfIOqv2.s page 94 +2295:Src/main.c **** case 8: +2296:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_SET); +2297:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); +2298:Src/main.c **** break; +2299:Src/main.c **** +2300:Src/main.c **** case 9: +2301:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_SET); +2302:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); +2303:Src/main.c **** break; +2304:Src/main.c **** } +2305:Src/main.c **** } +2306:Src/main.c **** +2307:Src/main.c **** void Set_LTEC(uint8_t num, uint16_t DATA) +2308:Src/main.c **** { +2309:Src/main.c **** uint32_t tmp32; +2310:Src/main.c **** +2311:Src/main.c **** switch (num) +2312:Src/main.c **** { +2313:Src/main.c **** case 1: +2314:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2315:Src/main.c **** //tmp32=0; +2316:Src/main.c **** //while(tmp32<500){tmp32++;} +2317:Src/main.c **** tmp32 = 0; +2318:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2319:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2320:Src/main.c **** tmp32 = 0; +2321:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2322:Src/main.c **** (void) SPI2->DR; +2323:Src/main.c **** break; +2324:Src/main.c **** case 2: +2325:Src/main.c **** //HAL_GPIO_TogglePin(OUT_11_GPIO_Port, OUT_11_Pin); //for debug purposes +2326:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_RESET);//Start operation with L +2327:Src/main.c **** //tmp32=0; +2328:Src/main.c **** //while(tmp32<500){tmp32++;} +2329:Src/main.c **** tmp32 = 0; +2330:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2331:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2332:Src/main.c **** tmp32 = 0; +2333:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2334:Src/main.c **** (void) SPI6->DR; +2335:Src/main.c **** break; +2336:Src/main.c **** case 3: +2337:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_RESET);//Start operation with +2338:Src/main.c **** //tmp32=0; +2339:Src/main.c **** //while(tmp32<500){tmp32++;} +2340:Src/main.c **** tmp32 = 0; +2341:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2342:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC +2343:Src/main.c **** tmp32 = 0; +2344:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2345:Src/main.c **** (void) SPI2->DR; +2346:Src/main.c **** break; +2347:Src/main.c **** case 4: +2348:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_RESET);//Start operation with +2349:Src/main.c **** //tmp32=0; +2350:Src/main.c **** //while(tmp32<500){tmp32++;} +2351:Src/main.c **** tmp32 = 0; + ARM GAS /tmp/ccyYWdjY.s page 94 -2352:Src/main.c **** tmp32 = 0; -2353:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w -2354:Src/main.c **** (void) SPI6->DR; -2355:Src/main.c **** break; -2356:Src/main.c **** } -2357:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 -2358:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 -2359:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 -2360:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 -2361:Src/main.c **** } -2362:Src/main.c **** static uint16_t MPhD_T(uint8_t num) -2363:Src/main.c **** { -2364:Src/main.c **** uint16_t P; -2365:Src/main.c **** uint32_t tmp32; -2366:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2367:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion -2368:Src/main.c **** tmp32=0; -2369:Src/main.c **** while(tmp32<500){tmp32++;} -2370:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2371:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver -2372:Src/main.c **** tmp32=0; -2373:Src/main.c **** while(tmp32<500){tmp32++;} -2374:Src/main.c **** if (num==1)//MPD1 -2375:Src/main.c **** { -2376:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2377:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); -2378:Src/main.c **** tmp32=0; -2379:Src/main.c **** while(tmp32<500){tmp32++;} -2380:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2381:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC -2382:Src/main.c **** tmp32 = 0; -2383:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2384:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC -2385:Src/main.c **** while(tmp32<500){tmp32++;} -2386:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2387:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); -2388:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2389:Src/main.c **** } -2390:Src/main.c **** else if (num==2)//MPD2 -2391:Src/main.c **** { -2392:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2393:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); -2394:Src/main.c **** tmp32=0; -2395:Src/main.c **** while(tmp32<500){tmp32++;} -2396:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2397:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC -2398:Src/main.c **** tmp32 = 0; -2399:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2400:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC -2401:Src/main.c **** while(tmp32<500){tmp32++;} -2402:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2403:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2404:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2405:Src/main.c **** } -2406:Src/main.c **** else if (num==3)//ThrLD1 -2407:Src/main.c **** { -2408:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); - ARM GAS /tmp/ccfIOqv2.s page 95 +2352:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi +2353:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC +2354:Src/main.c **** tmp32 = 0; +2355:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w +2356:Src/main.c **** (void) SPI6->DR; +2357:Src/main.c **** break; +2358:Src/main.c **** } +2359:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 +2360:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 +2361:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 +2362:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 +2363:Src/main.c **** } +2364:Src/main.c **** static uint16_t MPhD_T(uint8_t num) +2365:Src/main.c **** { +2366:Src/main.c **** uint16_t P; +2367:Src/main.c **** uint32_t tmp32; +2368:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2369:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion +2370:Src/main.c **** tmp32=0; +2371:Src/main.c **** while(tmp32<500){tmp32++;} +2372:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2373:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver +2374:Src/main.c **** tmp32=0; +2375:Src/main.c **** while(tmp32<500){tmp32++;} +2376:Src/main.c **** if (num==1)//MPD1 +2377:Src/main.c **** { +2378:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2379:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); +2380:Src/main.c **** tmp32=0; +2381:Src/main.c **** while(tmp32<500){tmp32++;} +2382:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2383:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for MPhD1 ADC +2384:Src/main.c **** tmp32 = 0; +2385:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2386:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC +2387:Src/main.c **** while(tmp32<500){tmp32++;} +2388:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2389:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2390:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2391:Src/main.c **** } +2392:Src/main.c **** else if (num==2)//MPD2 +2393:Src/main.c **** { +2394:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2395:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); +2396:Src/main.c **** tmp32=0; +2397:Src/main.c **** while(tmp32<500){tmp32++;} +2398:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2399:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for MPhD2 ADC +2400:Src/main.c **** tmp32 = 0; +2401:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2402:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC +2403:Src/main.c **** while(tmp32<500){tmp32++;} +2404:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2405:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2406:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2407:Src/main.c **** } +2408:Src/main.c **** else if (num==3)//ThrLD1 + ARM GAS /tmp/ccyYWdjY.s page 95 -2409:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); -2410:Src/main.c **** tmp32=0; -2411:Src/main.c **** while(tmp32<500){tmp32++;} -2412:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2413:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC -2414:Src/main.c **** tmp32 = 0; -2415:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2416:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC -2417:Src/main.c **** while(tmp32<500){tmp32++;} -2418:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2419:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); -2420:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); -2421:Src/main.c **** } -2422:Src/main.c **** else if (num==4)//ThrLD2 -2423:Src/main.c **** { -2424:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); -2425:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); -2426:Src/main.c **** tmp32=0; -2427:Src/main.c **** while(tmp32<500){tmp32++;} -2428:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c -2429:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC -2430:Src/main.c **** tmp32 = 0; -2431:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w -2432:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC -2433:Src/main.c **** while(tmp32<500){tmp32++;} -2434:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); -2435:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); -2436:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); -2437:Src/main.c **** } -2438:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; -2439:Src/main.c **** -2440:Src/main.c **** Inorm = (float) (65535) / (float) (100); -2441:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); -2442:Src/main.c **** Tnorm2 = 4; -2443:Src/main.c **** Pnorm = (float)(65535) / (float)(20); -2444:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system -2445:Src/main.c **** T0m = 48.6282; -2446:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; -2447:Src/main.c **** -2448:Src/main.c **** Ith = I0m * expf(T_C/T0m); -2449:Src/main.c **** I_LD = (float) (C_LD) / Inorm; -2450:Src/main.c **** -2451:Src/main.c **** if (I_LD > Ith) -2452:Src/main.c **** { -2453:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ -2454:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; -2455:Src/main.c **** } -2456:Src/main.c **** else -2457:Src/main.c **** { -2458:Src/main.c **** P = 0; -2459:Src/main.c **** } */ -2460:Src/main.c **** return P; -2461:Src/main.c **** } -2462:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time -2463:Src/main.c **** { -2464:Src/main.c **** uint16_t Result; -2465:Src/main.c **** // uint8_t randf; - ARM GAS /tmp/ccfIOqv2.s page 96 +2409:Src/main.c **** { +2410:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_SET); +2411:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); +2412:Src/main.c **** tmp32=0; +2413:Src/main.c **** while(tmp32<500){tmp32++;} +2414:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2415:Src/main.c **** LL_SPI_Enable(SPI4);//Enable SPI for ThrLD1 ADC +2416:Src/main.c **** tmp32 = 0; +2417:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2418:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC +2419:Src/main.c **** while(tmp32<500){tmp32++;} +2420:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2421:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_SET); +2422:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); +2423:Src/main.c **** } +2424:Src/main.c **** else if (num==4)//ThrLD2 +2425:Src/main.c **** { +2426:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET); +2427:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); +2428:Src/main.c **** tmp32=0; +2429:Src/main.c **** while(tmp32<500){tmp32++;} +2430:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c +2431:Src/main.c **** LL_SPI_Enable(SPI5);//Enable SPI for ThrLD2 ADC +2432:Src/main.c **** tmp32 = 0; +2433:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w +2434:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC +2435:Src/main.c **** while(tmp32<500){tmp32++;} +2436:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); +2437:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_SET); +2438:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); +2439:Src/main.c **** } +2440:Src/main.c **** /*float I_LD, Ith, I0m, T0m, Inorm, Tnorm1, Tnorm2, P, T_C, A, Pnorm; +2441:Src/main.c **** +2442:Src/main.c **** Inorm = (float) (65535) / (float) (100); +2443:Src/main.c **** Tnorm1 = (float) (65535) / (float) (50); +2444:Src/main.c **** Tnorm2 = 4; +2445:Src/main.c **** Pnorm = (float)(65535) / (float)(20); +2446:Src/main.c **** I0m = 8.1568;//@4 C - lowest temperature of system +2447:Src/main.c **** T0m = 48.6282; +2448:Src/main.c **** T_C = (float) (T_LD) / Tnorm1 + Tnorm2; +2449:Src/main.c **** +2450:Src/main.c **** Ith = I0m * expf(T_C/T0m); +2451:Src/main.c **** I_LD = (float) (C_LD) / Inorm; +2452:Src/main.c **** +2453:Src/main.c **** if (I_LD > Ith) +2454:Src/main.c **** { +2455:Src/main.c **** A = (float) (2.24276128270098e-07) * T_C * T_C * T_C - (float) (4.73392579025590e-05) * T_C * T_ +2456:Src/main.c **** P = A * (I_LD - Ith) * Pnorm; +2457:Src/main.c **** } +2458:Src/main.c **** else +2459:Src/main.c **** { +2460:Src/main.c **** P = 0; +2461:Src/main.c **** } */ +2462:Src/main.c **** return P; +2463:Src/main.c **** } +2464:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time +2465:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 96 -2466:Src/main.c **** -2467:Src/main.c **** randf = 0; -2468:Src/main.c **** for (uint8_t i = 0; i < 32; i++) -2469:Src/main.c **** { -2470:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; -2471:Src/main.c **** } -2472:Src/main.c **** -2473:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +2466:Src/main.c **** uint16_t Result; +2467:Src/main.c **** // uint8_t randf; +2468:Src/main.c **** +2469:Src/main.c **** randf = 0; +2470:Src/main.c **** for (uint8_t i = 0; i < 32; i++) +2471:Src/main.c **** { +2472:Src/main.c **** randf = ((Timer>>i)&0x0001)^randf; +2473:Src/main.c **** } 2474:Src/main.c **** -2475:Src/main.c **** return (uint16_t)(Result); -2476:Src/main.c **** }*/ -2477:Src/main.c **** static uint16_t Get_ADC(uint8_t num) -2478:Src/main.c **** { -2479:Src/main.c **** uint16_t OUT; -2480:Src/main.c **** switch (num) -2481:Src/main.c **** { -2482:Src/main.c **** case 0: -2483:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on -2484:Src/main.c **** break; -2485:Src/main.c **** case 1: -2486:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion -2487:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc -2488:Src/main.c **** break; -2489:Src/main.c **** case 2: -2490:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off -2491:Src/main.c **** break; -2492:Src/main.c **** case 3: -2493:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on -2494:Src/main.c **** break; -2495:Src/main.c **** case 4: -2496:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion -2497:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc -2498:Src/main.c **** break; -2499:Src/main.c **** case 5: -2500:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off -2501:Src/main.c **** break; -2502:Src/main.c **** } -2503:Src/main.c **** return OUT; -2504:Src/main.c **** } -2505:Src/main.c **** -2506:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results -2507:Src/main.c **** { -2508:Src/main.c **** // Main idea: -2509:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat -2510:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept -2511:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t -2512:Src/main.c **** // So, equation should be look like this: -2513:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) -2514:Src/main.c **** // t -- cycle phase -2515:Src/main.c **** // a,b,c -- constants -2516:Src/main.c **** // -2517:Src/main.c **** // How can we control laser diode temperature? -2518:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. -2519:Src/main.c **** // Then we should measure wavelength. -2520:Src/main.c **** // Calibration sequence: -2521:Src/main.c **** // 1) n -2522:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 97 +2475:Src/main.c **** Result = ((float)(T_LD - T_LD_before))*((float)(1-expf(((float)(Timer_before)-(float)(Timer))/((fl +2476:Src/main.c **** +2477:Src/main.c **** return (uint16_t)(Result); +2478:Src/main.c **** }*/ +2479:Src/main.c **** static uint16_t Get_ADC(uint8_t num) +2480:Src/main.c **** { +2481:Src/main.c **** uint16_t OUT; +2482:Src/main.c **** switch (num) +2483:Src/main.c **** { +2484:Src/main.c **** case 0: +2485:Src/main.c **** HAL_ADC_Start(&hadc1); // Power on +2486:Src/main.c **** break; +2487:Src/main.c **** case 1: +2488:Src/main.c **** HAL_ADC_PollForConversion(&hadc1, 100); // Waiting for conversion +2489:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc +2490:Src/main.c **** break; +2491:Src/main.c **** case 2: +2492:Src/main.c **** HAL_ADC_Stop(&hadc1); // Power off +2493:Src/main.c **** break; +2494:Src/main.c **** case 3: +2495:Src/main.c **** HAL_ADC_Start(&hadc3); // Power on +2496:Src/main.c **** break; +2497:Src/main.c **** case 4: +2498:Src/main.c **** HAL_ADC_PollForConversion(&hadc3, 100); // Waiting for conversion +2499:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc +2500:Src/main.c **** break; +2501:Src/main.c **** case 5: +2502:Src/main.c **** HAL_ADC_Stop(&hadc3); // Power off +2503:Src/main.c **** break; +2504:Src/main.c **** } +2505:Src/main.c **** return OUT; +2506:Src/main.c **** } +2507:Src/main.c **** +2508:Src/main.c **** uint16_t Advanced_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results +2509:Src/main.c **** { +2510:Src/main.c **** // Main idea: +2511:Src/main.c **** // I is responsible to maintaining constant temperature difference between laser and room temperat +2512:Src/main.c **** // As room temperature can be approximated as constant at current-varying time -- I should be kept +2513:Src/main.c **** // As current through laser diode heats it -- we can estimate excessive power on laser diode and t +2514:Src/main.c **** // So, equation should be look like this: +2515:Src/main.c **** // x_output = x_output_original + I(laser)*(a + (t - b)c) +2516:Src/main.c **** // t -- cycle phase +2517:Src/main.c **** // a,b,c -- constants +2518:Src/main.c **** // +2519:Src/main.c **** // How can we control laser diode temperature? +2520:Src/main.c **** // -- We can set laser to fixed current at the time we need to measure. +2521:Src/main.c **** // Then we should measure wavelength. +2522:Src/main.c **** // Calibration sequence: + ARM GAS /tmp/ccyYWdjY.s page 97 -2523:Src/main.c **** +2523:Src/main.c **** // 1) n 2524:Src/main.c **** -2525:Src/main.c **** int e_pid; -2526:Src/main.c **** float P_coef_current;//, I_coef_current; -2527:Src/main.c **** float e_integral; -2528:Src/main.c **** int x_output; -2529:Src/main.c **** -2530:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; +2525:Src/main.c **** +2526:Src/main.c **** +2527:Src/main.c **** int e_pid; +2528:Src/main.c **** float P_coef_current;//, I_coef_current; +2529:Src/main.c **** float e_integral; +2530:Src/main.c **** int x_output; 2531:Src/main.c **** -2532:Src/main.c **** e_integral = LDx_results->e_integral; +2532:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; 2533:Src/main.c **** -2534:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ -2535:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 -2536:Src/main.c **** } -2537:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; -2538:Src/main.c **** -2539:Src/main.c **** if (e_integral > 32000){ -2540:Src/main.c **** e_integral = 32000; -2541:Src/main.c **** } -2542:Src/main.c **** else if (e_integral < - 32000){ -2543:Src/main.c **** e_integral = -32000; -2544:Src/main.c **** } -2545:Src/main.c **** LDx_results->e_integral = e_integral; -2546:Src/main.c **** -2547:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +2534:Src/main.c **** e_integral = LDx_results->e_integral; +2535:Src/main.c **** +2536:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ +2537:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 +2538:Src/main.c **** } +2539:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; +2540:Src/main.c **** +2541:Src/main.c **** if (e_integral > 32000){ +2542:Src/main.c **** e_integral = 32000; +2543:Src/main.c **** } +2544:Src/main.c **** else if (e_integral < - 32000){ +2545:Src/main.c **** e_integral = -32000; +2546:Src/main.c **** } +2547:Src/main.c **** LDx_results->e_integral = e_integral; 2548:Src/main.c **** -2549:Src/main.c **** if(x_output < 1000){ -2550:Src/main.c **** x_output = 8800; -2551:Src/main.c **** } -2552:Src/main.c **** else if(x_output > 56800){ -2553:Src/main.c **** x_output = 56800; -2554:Src/main.c **** } -2555:Src/main.c **** -2556:Src/main.c **** if (num==2) -2557:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2558:Src/main.c **** -2559:Src/main.c **** return (uint16_t)x_output; -2560:Src/main.c **** } -2561:Src/main.c **** -2562:Src/main.c **** -2563:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin -2564:Src/main.c **** { - 545 .loc 1 2564 1 is_stmt 1 view -0 +2549:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in +2550:Src/main.c **** +2551:Src/main.c **** if(x_output < 1000){ +2552:Src/main.c **** x_output = 8800; +2553:Src/main.c **** } +2554:Src/main.c **** else if(x_output > 56800){ +2555:Src/main.c **** x_output = 56800; +2556:Src/main.c **** } +2557:Src/main.c **** +2558:Src/main.c **** if (num==2) +2559:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +2560:Src/main.c **** +2561:Src/main.c **** return (uint16_t)x_output; +2562:Src/main.c **** } +2563:Src/main.c **** +2564:Src/main.c **** +2565:Src/main.c **** uint16_t PID_Controller_Temp(LDx_SetupTypeDef * LDx_curr_setup, LDx_ParamTypeDef * LDx_results, uin +2566:Src/main.c **** { + 545 .loc 1 2566 1 is_stmt 1 view -0 546 .cfi_startproc 547 @ args = 0, pretend = 0, frame = 0 548 @ frame_needed = 0, uses_anonymous_args = 0 549 @ link register save eliminated. - 550 .loc 1 2564 1 is_stmt 0 view .LVU201 + 550 .loc 1 2566 1 is_stmt 0 view .LVU201 551 0000 30B4 push {r4, r5} 552 .LCFI6: 553 .cfi_def_cfa_offset 8 554 .cfi_offset 4, -8 555 .cfi_offset 5, -4 -2565:Src/main.c **** int e_pid; - 556 .loc 1 2565 2 is_stmt 1 view .LVU202 -2566:Src/main.c **** float P_coef_current;//, I_coef_current; - 557 .loc 1 2566 2 view .LVU203 - ARM GAS /tmp/ccfIOqv2.s page 98 +2567:Src/main.c **** int e_pid; + 556 .loc 1 2567 2 is_stmt 1 view .LVU202 + ARM GAS /tmp/ccyYWdjY.s page 98 -2567:Src/main.c **** float e_integral; - 558 .loc 1 2567 2 view .LVU204 -2568:Src/main.c **** int x_output; - 559 .loc 1 2568 2 view .LVU205 -2569:Src/main.c **** -2570:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; - 560 .loc 1 2570 2 view .LVU206 - 561 .loc 1 2570 28 is_stmt 0 view .LVU207 +2568:Src/main.c **** float P_coef_current;//, I_coef_current; + 557 .loc 1 2568 2 view .LVU203 +2569:Src/main.c **** float e_integral; + 558 .loc 1 2569 2 view .LVU204 +2570:Src/main.c **** int x_output; + 559 .loc 1 2570 2 view .LVU205 +2571:Src/main.c **** +2572:Src/main.c **** e_pid = (int) LDx_results->LD_CURR_TEMP - (int) LDx_curr_setup->LD_TEMP; + 560 .loc 1 2572 2 view .LVU206 + 561 .loc 1 2572 28 is_stmt 0 view .LVU207 562 0002 0B88 ldrh r3, [r1] - 563 .loc 1 2570 65 view .LVU208 + 563 .loc 1 2572 65 view .LVU208 564 0004 0488 ldrh r4, [r0] - 565 .loc 1 2570 8 view .LVU209 + 565 .loc 1 2572 8 view .LVU209 566 0006 1B1B subs r3, r3, r4 567 .LVL34: -2571:Src/main.c **** -2572:Src/main.c **** e_integral = LDx_results->e_integral; - 568 .loc 1 2572 2 is_stmt 1 view .LVU210 - 569 .loc 1 2572 13 is_stmt 0 view .LVU211 +2573:Src/main.c **** +2574:Src/main.c **** e_integral = LDx_results->e_integral; + 568 .loc 1 2574 2 is_stmt 1 view .LVU210 + 569 .loc 1 2574 13 is_stmt 0 view .LVU211 570 0008 D1ED017A vldr.32 s15, [r1, #4] 571 .LVL35: -2573:Src/main.c **** -2574:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ - 572 .loc 1 2574 2 is_stmt 1 view .LVU212 - 573 .loc 1 2574 20 is_stmt 0 view .LVU213 +2575:Src/main.c **** +2576:Src/main.c **** if((e_pid < 3000) && (e_pid > - 3000)){ + 572 .loc 1 2576 2 is_stmt 1 view .LVU212 + 573 .loc 1 2576 20 is_stmt 0 view .LVU213 574 000c 03F6B73C addw ip, r3, #2999 - 575 .loc 1 2574 4 view .LVU214 + 575 .loc 1 2576 4 view .LVU214 576 0010 41F26E74 movw r4, #5998 577 0014 A445 cmp ip, r4 578 0016 18D8 bhi .L17 -2575:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 579 .loc 1 2575 3 is_stmt 1 view .LVU215 - 580 .loc 1 2575 31 is_stmt 0 view .LVU216 +2577:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 579 .loc 1 2577 3 is_stmt 1 view .LVU215 + 580 .loc 1 2577 31 is_stmt 0 view .LVU216 581 0018 90ED027A vldr.32 s14, [r0, #8] - 582 .loc 1 2575 47 view .LVU217 + 582 .loc 1 2577 47 view .LVU217 583 001c 06EE903A vmov s13, r3 @ int 584 0020 F8EEE66A vcvt.f32.s32 s13, s13 - 585 .loc 1 2575 45 view .LVU218 + 585 .loc 1 2577 45 view .LVU218 586 0024 27EE267A vmul.f32 s14, s14, s13 - 587 .loc 1 2575 76 view .LVU219 + 587 .loc 1 2577 76 view .LVU219 588 0028 284C ldr r4, .L27 589 002a 2468 ldr r4, [r4] 590 002c 284D ldr r5, .L27+4 591 002e 2D68 ldr r5, [r5] 592 0030 641B subs r4, r4, r5 - 593 .loc 1 2575 64 view .LVU220 + 593 .loc 1 2577 64 view .LVU220 594 0032 06EE904A vmov s13, r4 @ int 595 0036 F8EE666A vcvt.f32.u32 s13, s13 - 596 .loc 1 2575 62 view .LVU221 + 596 .loc 1 2577 62 view .LVU221 597 003a 27EE267A vmul.f32 s14, s14, s13 - 598 .loc 1 2575 87 view .LVU222 + 598 .loc 1 2577 87 view .LVU222 599 003e 9FED256A vldr.32 s12, .L27+8 600 0042 C7EE066A vdiv.f32 s13, s14, s12 - 601 .loc 1 2575 14 view .LVU223 + 601 .loc 1 2577 14 view .LVU223 602 0046 77EEA67A vadd.f32 s15, s15, s13 603 .LVL36: + ARM GAS /tmp/ccyYWdjY.s page 99 + + 604 .L17: -2576:Src/main.c **** } - ARM GAS /tmp/ccfIOqv2.s page 99 - - -2577:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; - 605 .loc 1 2577 2 is_stmt 1 view .LVU224 - 606 .loc 1 2577 17 is_stmt 0 view .LVU225 +2578:Src/main.c **** } +2579:Src/main.c **** P_coef_current = LDx_curr_setup->P_coef_temp; + 605 .loc 1 2579 2 is_stmt 1 view .LVU224 + 606 .loc 1 2579 17 is_stmt 0 view .LVU225 607 004a D0ED016A vldr.32 s13, [r0, #4] 608 .LVL37: -2578:Src/main.c **** -2579:Src/main.c **** if (e_integral > 32000){ - 609 .loc 1 2579 2 is_stmt 1 view .LVU226 - 610 .loc 1 2579 5 is_stmt 0 view .LVU227 +2580:Src/main.c **** +2581:Src/main.c **** if (e_integral > 32000){ + 609 .loc 1 2581 2 is_stmt 1 view .LVU226 + 610 .loc 1 2581 5 is_stmt 0 view .LVU227 611 004e 9FED227A vldr.32 s14, .L27+12 612 0052 F4EEC77A vcmpe.f32 s15, s14 613 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 614 005a 09DC bgt .L21 -2580:Src/main.c **** e_integral = 32000; -2581:Src/main.c **** } -2582:Src/main.c **** else if (e_integral < - 32000){ - 615 .loc 1 2582 7 is_stmt 1 view .LVU228 - 616 .loc 1 2582 10 is_stmt 0 view .LVU229 +2582:Src/main.c **** e_integral = 32000; +2583:Src/main.c **** } +2584:Src/main.c **** else if (e_integral < - 32000){ + 615 .loc 1 2584 7 is_stmt 1 view .LVU228 + 616 .loc 1 2584 10 is_stmt 0 view .LVU229 617 005c 9FED1F7A vldr.32 s14, .L27+16 618 0060 F4EEC77A vcmpe.f32 s15, s14 619 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 620 0068 04D5 bpl .L18 -2583:Src/main.c **** e_integral = -32000; - 621 .loc 1 2583 15 view .LVU230 +2585:Src/main.c **** e_integral = -32000; + 621 .loc 1 2585 15 view .LVU230 622 006a DFED1C7A vldr.32 s15, .L27+16 623 .LVL38: - 624 .loc 1 2583 15 view .LVU231 + 624 .loc 1 2585 15 view .LVU231 625 006e 01E0 b .L18 626 .LVL39: 627 .L21: -2580:Src/main.c **** e_integral = 32000; - 628 .loc 1 2580 15 view .LVU232 +2582:Src/main.c **** e_integral = 32000; + 628 .loc 1 2582 15 view .LVU232 629 0070 DFED197A vldr.32 s15, .L27+12 630 .LVL40: 631 .L18: -2584:Src/main.c **** } -2585:Src/main.c **** LDx_results->e_integral = e_integral; - 632 .loc 1 2585 2 is_stmt 1 view .LVU233 - 633 .loc 1 2585 26 is_stmt 0 view .LVU234 +2586:Src/main.c **** } +2587:Src/main.c **** LDx_results->e_integral = e_integral; + 632 .loc 1 2587 2 is_stmt 1 view .LVU233 + 633 .loc 1 2587 26 is_stmt 0 view .LVU234 634 0074 C1ED017A vstr.32 s15, [r1, #4] -2586:Src/main.c **** -2587:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in - 635 .loc 1 2587 2 is_stmt 1 view .LVU235 - 636 .loc 1 2587 36 is_stmt 0 view .LVU236 +2588:Src/main.c **** +2589:Src/main.c **** x_output = 32768 + P_coef_current * e_pid + (int)e_integral;//32768 - P_coef_current * e_pid - (in + 635 .loc 1 2589 2 is_stmt 1 view .LVU235 + 636 .loc 1 2589 36 is_stmt 0 view .LVU236 637 0078 07EE103A vmov s14, r3 @ int 638 007c B8EEC77A vcvt.f32.s32 s14, s14 639 0080 27EE267A vmul.f32 s14, s14, s13 - 640 .loc 1 2587 19 view .LVU237 + 640 .loc 1 2589 19 view .LVU237 641 0084 DFED166A vldr.32 s13, .L27+20 642 .LVL41: - 643 .loc 1 2587 19 view .LVU238 + 643 .loc 1 2589 19 view .LVU238 644 0088 37EE267A vadd.f32 s14, s14, s13 - 645 .loc 1 2587 46 view .LVU239 + 645 .loc 1 2589 46 view .LVU239 646 008c FDEEE77A vcvt.s32.f32 s15, s15 647 .LVL42: - 648 .loc 1 2587 44 view .LVU240 + ARM GAS /tmp/ccyYWdjY.s page 100 + + + 648 .loc 1 2589 44 view .LVU240 649 0090 F8EEE77A vcvt.f32.s32 s15, s15 - ARM GAS /tmp/ccfIOqv2.s page 100 - - 650 0094 77EE877A vadd.f32 s15, s15, s14 - 651 .loc 1 2587 11 view .LVU241 + 651 .loc 1 2589 11 view .LVU241 652 0098 FDEEE77A vcvt.s32.f32 s15, s15 653 009c 17EE900A vmov r0, s15 @ int 654 .LVL43: -2588:Src/main.c **** -2589:Src/main.c **** if(x_output < 1000){ - 655 .loc 1 2589 2 is_stmt 1 view .LVU242 - 656 .loc 1 2589 4 is_stmt 0 view .LVU243 +2590:Src/main.c **** +2591:Src/main.c **** if(x_output < 1000){ + 655 .loc 1 2591 2 is_stmt 1 view .LVU242 + 656 .loc 1 2591 4 is_stmt 0 view .LVU243 657 00a0 B0F57A7F cmp r0, #1000 658 00a4 06DB blt .L23 -2590:Src/main.c **** x_output = 8800; -2591:Src/main.c **** } -2592:Src/main.c **** else if(x_output > 56800){ - 659 .loc 1 2592 7 is_stmt 1 view .LVU244 - 660 .loc 1 2592 9 is_stmt 0 view .LVU245 +2592:Src/main.c **** x_output = 8800; +2593:Src/main.c **** } +2594:Src/main.c **** else if(x_output > 56800){ + 659 .loc 1 2594 7 is_stmt 1 view .LVU244 + 660 .loc 1 2594 9 is_stmt 0 view .LVU245 661 00a6 4DF6E053 movw r3, #56800 662 .LVL44: - 663 .loc 1 2592 9 view .LVU246 + 663 .loc 1 2594 9 view .LVU246 664 00aa 9842 cmp r0, r3 665 00ac 04DD ble .L19 -2593:Src/main.c **** x_output = 56800; - 666 .loc 1 2593 12 view .LVU247 +2595:Src/main.c **** x_output = 56800; + 666 .loc 1 2595 12 view .LVU247 667 00ae 4DF6E050 movw r0, #56800 668 .LVL45: - 669 .loc 1 2593 12 view .LVU248 + 669 .loc 1 2595 12 view .LVU248 670 00b2 01E0 b .L19 671 .LVL46: 672 .L23: -2590:Src/main.c **** x_output = 8800; - 673 .loc 1 2590 12 view .LVU249 +2592:Src/main.c **** x_output = 8800; + 673 .loc 1 2592 12 view .LVU249 674 00b4 42F26020 movw r0, #8800 675 .LVL47: 676 .L19: -2594:Src/main.c **** } -2595:Src/main.c **** -2596:Src/main.c **** if (num==2) - 677 .loc 1 2596 2 is_stmt 1 view .LVU250 - 678 .loc 1 2596 5 is_stmt 0 view .LVU251 +2596:Src/main.c **** } +2597:Src/main.c **** +2598:Src/main.c **** if (num==2) + 677 .loc 1 2598 2 is_stmt 1 view .LVU250 + 678 .loc 1 2598 5 is_stmt 0 view .LVU251 679 00b8 022A cmp r2, #2 680 00ba 02D0 beq .L26 681 .LVL48: 682 .L20: -2597:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser -2598:Src/main.c **** -2599:Src/main.c **** return (uint16_t)x_output; - 683 .loc 1 2599 2 is_stmt 1 view .LVU252 -2600:Src/main.c **** } - 684 .loc 1 2600 1 is_stmt 0 view .LVU253 +2599:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser +2600:Src/main.c **** +2601:Src/main.c **** return (uint16_t)x_output; + 683 .loc 1 2601 2 is_stmt 1 view .LVU252 +2602:Src/main.c **** } + 684 .loc 1 2602 1 is_stmt 0 view .LVU253 685 00bc 80B2 uxth r0, r0 686 .LVL49: - 687 .loc 1 2600 1 view .LVU254 + 687 .loc 1 2602 1 view .LVU254 688 00be 30BC pop {r4, r5} 689 .LCFI7: 690 .cfi_remember_state + ARM GAS /tmp/ccyYWdjY.s page 101 + + 691 .cfi_restore 5 692 .cfi_restore 4 - ARM GAS /tmp/ccfIOqv2.s page 101 - - 693 .cfi_def_cfa_offset 0 694 00c0 7047 bx lr 695 .LVL50: 696 .L26: 697 .LCFI8: 698 .cfi_restore_state -2597:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 699 .loc 1 2597 3 is_stmt 1 view .LVU255 -2597:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 700 .loc 1 2597 11 is_stmt 0 view .LVU256 +2599:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 699 .loc 1 2599 3 is_stmt 1 view .LVU255 +2599:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 700 .loc 1 2599 11 is_stmt 0 view .LVU256 701 00c2 024B ldr r3, .L27 702 00c4 1A68 ldr r2, [r3] 703 .LVL51: -2597:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 704 .loc 1 2597 11 view .LVU257 +2599:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 704 .loc 1 2599 11 view .LVU257 705 00c6 024B ldr r3, .L27+4 706 00c8 1A60 str r2, [r3] 707 00ca F7E7 b .L20 @@ -6038,29 +6040,29 @@ ARM GAS /tmp/ccfIOqv2.s page 1 726 OUT_trigger: 727 .LVL52: 728 .LFB1210: -2250:Src/main.c **** switch (out_n) - 729 .loc 1 2250 1 is_stmt 1 view -0 +2252:Src/main.c **** switch (out_n) + 729 .loc 1 2252 1 is_stmt 1 view -0 730 .cfi_startproc 731 @ args = 0, pretend = 0, frame = 0 732 @ frame_needed = 0, uses_anonymous_args = 0 -2250:Src/main.c **** switch (out_n) - 733 .loc 1 2250 1 is_stmt 0 view .LVU259 +2252:Src/main.c **** switch (out_n) + 733 .loc 1 2252 1 is_stmt 0 view .LVU259 734 0000 10B5 push {r4, lr} 735 .LCFI9: 736 .cfi_def_cfa_offset 8 737 .cfi_offset 4, -8 738 .cfi_offset 14, -4 -2251:Src/main.c **** { - 739 .loc 1 2251 2 is_stmt 1 view .LVU260 +2253:Src/main.c **** { + 739 .loc 1 2253 2 is_stmt 1 view .LVU260 740 0002 0928 cmp r0, #9 741 0004 13D8 bhi .L29 742 0006 DFE800F0 tbb [pc, r0] 743 .L32: + ARM GAS /tmp/ccyYWdjY.s page 102 + + 744 000a 05 .byte (.L41-.L32)/2 745 000b 13 .byte (.L40-.L32)/2 - ARM GAS /tmp/ccfIOqv2.s page 102 - - 746 000c 21 .byte (.L39-.L32)/2 747 000d 2F .byte (.L38-.L32)/2 748 000e 3D .byte (.L37-.L32)/2 @@ -6071,250 +6073,250 @@ ARM GAS /tmp/ccfIOqv2.s page 1 753 0013 7D .byte (.L31-.L32)/2 754 .p2align 1 755 .L41: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 756 .loc 1 2254 3 view .LVU261 +2256:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 756 .loc 1 2256 3 view .LVU261 757 0014 414C ldr r4, .L44 758 0016 0122 movs r2, #1 759 0018 4FF48061 mov r1, #1024 760 001c 2046 mov r0, r4 761 .LVL53: -2254:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); - 762 .loc 1 2254 3 is_stmt 0 view .LVU262 +2256:Src/main.c **** HAL_GPIO_WritePin(OUT_0_GPIO_Port, OUT_0_Pin, GPIO_PIN_RESET); + 762 .loc 1 2256 3 is_stmt 0 view .LVU262 763 001e FFF7FEFF bl HAL_GPIO_WritePin 764 .LVL54: -2255:Src/main.c **** break; - 765 .loc 1 2255 3 is_stmt 1 view .LVU263 +2257:Src/main.c **** break; + 765 .loc 1 2257 3 is_stmt 1 view .LVU263 766 0022 0022 movs r2, #0 767 0024 4FF48061 mov r1, #1024 768 0028 2046 mov r0, r4 769 002a FFF7FEFF bl HAL_GPIO_WritePin 770 .LVL55: -2256:Src/main.c **** - 771 .loc 1 2256 2 view .LVU264 +2258:Src/main.c **** + 771 .loc 1 2258 2 view .LVU264 772 .L29: -2303:Src/main.c **** - 773 .loc 1 2303 1 is_stmt 0 view .LVU265 +2305:Src/main.c **** + 773 .loc 1 2305 1 is_stmt 0 view .LVU265 774 002e 10BD pop {r4, pc} 775 .LVL56: 776 .L40: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 777 .loc 1 2259 3 is_stmt 1 view .LVU266 +2261:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 777 .loc 1 2261 3 is_stmt 1 view .LVU266 778 0030 3A4C ldr r4, .L44 779 0032 0122 movs r2, #1 780 0034 4FF40061 mov r1, #2048 781 0038 2046 mov r0, r4 782 .LVL57: -2259:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); - 783 .loc 1 2259 3 is_stmt 0 view .LVU267 +2261:Src/main.c **** HAL_GPIO_WritePin(OUT_1_GPIO_Port, OUT_1_Pin, GPIO_PIN_RESET); + 783 .loc 1 2261 3 is_stmt 0 view .LVU267 784 003a FFF7FEFF bl HAL_GPIO_WritePin 785 .LVL58: -2260:Src/main.c **** break; - 786 .loc 1 2260 3 is_stmt 1 view .LVU268 +2262:Src/main.c **** break; + 786 .loc 1 2262 3 is_stmt 1 view .LVU268 787 003e 0022 movs r2, #0 788 0040 4FF40061 mov r1, #2048 789 0044 2046 mov r0, r4 790 0046 FFF7FEFF bl HAL_GPIO_WritePin 791 .LVL59: -2261:Src/main.c **** - 792 .loc 1 2261 2 view .LVU269 +2263:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 103 + + + 792 .loc 1 2263 2 view .LVU269 793 004a F0E7 b .L29 - ARM GAS /tmp/ccfIOqv2.s page 103 - - 794 .LVL60: 795 .L39: -2264:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 796 .loc 1 2264 3 view .LVU270 +2266:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 796 .loc 1 2266 3 view .LVU270 797 004c 334C ldr r4, .L44 798 004e 0122 movs r2, #1 799 0050 4FF48051 mov r1, #4096 800 0054 2046 mov r0, r4 801 .LVL61: -2264:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); - 802 .loc 1 2264 3 is_stmt 0 view .LVU271 +2266:Src/main.c **** HAL_GPIO_WritePin(OUT_2_GPIO_Port, OUT_2_Pin, GPIO_PIN_RESET); + 802 .loc 1 2266 3 is_stmt 0 view .LVU271 803 0056 FFF7FEFF bl HAL_GPIO_WritePin 804 .LVL62: -2265:Src/main.c **** break; - 805 .loc 1 2265 3 is_stmt 1 view .LVU272 +2267:Src/main.c **** break; + 805 .loc 1 2267 3 is_stmt 1 view .LVU272 806 005a 0022 movs r2, #0 807 005c 4FF48051 mov r1, #4096 808 0060 2046 mov r0, r4 809 0062 FFF7FEFF bl HAL_GPIO_WritePin 810 .LVL63: -2266:Src/main.c **** - 811 .loc 1 2266 2 view .LVU273 +2268:Src/main.c **** + 811 .loc 1 2268 2 view .LVU273 812 0066 E2E7 b .L29 813 .LVL64: 814 .L38: -2269:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 815 .loc 1 2269 3 view .LVU274 +2271:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 815 .loc 1 2271 3 view .LVU274 816 0068 2C4C ldr r4, .L44 817 006a 0122 movs r2, #1 818 006c 4FF40051 mov r1, #8192 819 0070 2046 mov r0, r4 820 .LVL65: -2269:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); - 821 .loc 1 2269 3 is_stmt 0 view .LVU275 +2271:Src/main.c **** HAL_GPIO_WritePin(OUT_3_GPIO_Port, OUT_3_Pin, GPIO_PIN_RESET); + 821 .loc 1 2271 3 is_stmt 0 view .LVU275 822 0072 FFF7FEFF bl HAL_GPIO_WritePin 823 .LVL66: -2270:Src/main.c **** break; - 824 .loc 1 2270 3 is_stmt 1 view .LVU276 +2272:Src/main.c **** break; + 824 .loc 1 2272 3 is_stmt 1 view .LVU276 825 0076 0022 movs r2, #0 826 0078 4FF40051 mov r1, #8192 827 007c 2046 mov r0, r4 828 007e FFF7FEFF bl HAL_GPIO_WritePin 829 .LVL67: -2271:Src/main.c **** - 830 .loc 1 2271 2 view .LVU277 +2273:Src/main.c **** + 830 .loc 1 2273 2 view .LVU277 831 0082 D4E7 b .L29 832 .LVL68: 833 .L37: -2274:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 834 .loc 1 2274 3 view .LVU278 +2276:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 834 .loc 1 2276 3 view .LVU278 835 0084 254C ldr r4, .L44 836 0086 0122 movs r2, #1 837 0088 4FF48041 mov r1, #16384 838 008c 2046 mov r0, r4 839 .LVL69: -2274:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); - 840 .loc 1 2274 3 is_stmt 0 view .LVU279 - ARM GAS /tmp/ccfIOqv2.s page 104 + ARM GAS /tmp/ccyYWdjY.s page 104 +2276:Src/main.c **** HAL_GPIO_WritePin(OUT_4_GPIO_Port, OUT_4_Pin, GPIO_PIN_RESET); + 840 .loc 1 2276 3 is_stmt 0 view .LVU279 841 008e FFF7FEFF bl HAL_GPIO_WritePin 842 .LVL70: -2275:Src/main.c **** break; - 843 .loc 1 2275 3 is_stmt 1 view .LVU280 +2277:Src/main.c **** break; + 843 .loc 1 2277 3 is_stmt 1 view .LVU280 844 0092 0022 movs r2, #0 845 0094 4FF48041 mov r1, #16384 846 0098 2046 mov r0, r4 847 009a FFF7FEFF bl HAL_GPIO_WritePin 848 .LVL71: -2276:Src/main.c **** - 849 .loc 1 2276 2 view .LVU281 +2278:Src/main.c **** + 849 .loc 1 2278 2 view .LVU281 850 009e C6E7 b .L29 851 .LVL72: 852 .L36: -2279:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 853 .loc 1 2279 3 view .LVU282 +2281:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 853 .loc 1 2281 3 view .LVU282 854 00a0 1E4C ldr r4, .L44 855 00a2 0122 movs r2, #1 856 00a4 4FF40041 mov r1, #32768 857 00a8 2046 mov r0, r4 858 .LVL73: -2279:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); - 859 .loc 1 2279 3 is_stmt 0 view .LVU283 +2281:Src/main.c **** HAL_GPIO_WritePin(OUT_5_GPIO_Port, OUT_5_Pin, GPIO_PIN_RESET); + 859 .loc 1 2281 3 is_stmt 0 view .LVU283 860 00aa FFF7FEFF bl HAL_GPIO_WritePin 861 .LVL74: -2280:Src/main.c **** break; - 862 .loc 1 2280 3 is_stmt 1 view .LVU284 +2282:Src/main.c **** break; + 862 .loc 1 2282 3 is_stmt 1 view .LVU284 863 00ae 0022 movs r2, #0 864 00b0 4FF40041 mov r1, #32768 865 00b4 2046 mov r0, r4 866 00b6 FFF7FEFF bl HAL_GPIO_WritePin 867 .LVL75: -2281:Src/main.c **** - 868 .loc 1 2281 2 view .LVU285 +2283:Src/main.c **** + 868 .loc 1 2283 2 view .LVU285 869 00ba B8E7 b .L29 870 .LVL76: 871 .L35: -2284:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 872 .loc 1 2284 3 view .LVU286 +2286:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 872 .loc 1 2286 3 view .LVU286 873 00bc 184C ldr r4, .L44+4 874 00be 0122 movs r2, #1 875 00c0 1021 movs r1, #16 876 00c2 2046 mov r0, r4 877 .LVL77: -2284:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 878 .loc 1 2284 3 is_stmt 0 view .LVU287 +2286:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 878 .loc 1 2286 3 is_stmt 0 view .LVU287 879 00c4 FFF7FEFF bl HAL_GPIO_WritePin 880 .LVL78: -2285:Src/main.c **** break; - 881 .loc 1 2285 3 is_stmt 1 view .LVU288 +2287:Src/main.c **** break; + 881 .loc 1 2287 3 is_stmt 1 view .LVU288 882 00c8 0022 movs r2, #0 883 00ca 1021 movs r1, #16 884 00cc 2046 mov r0, r4 885 00ce FFF7FEFF bl HAL_GPIO_WritePin 886 .LVL79: -2286:Src/main.c **** - 887 .loc 1 2286 2 view .LVU289 - ARM GAS /tmp/ccfIOqv2.s page 105 + ARM GAS /tmp/ccyYWdjY.s page 105 +2288:Src/main.c **** + 887 .loc 1 2288 2 view .LVU289 888 00d2 ACE7 b .L29 889 .LVL80: 890 .L34: -2289:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 891 .loc 1 2289 3 view .LVU290 +2291:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 891 .loc 1 2291 3 view .LVU290 892 00d4 124C ldr r4, .L44+4 893 00d6 0122 movs r2, #1 894 00d8 2021 movs r1, #32 895 00da 2046 mov r0, r4 896 .LVL81: -2289:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 897 .loc 1 2289 3 is_stmt 0 view .LVU291 +2291:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 897 .loc 1 2291 3 is_stmt 0 view .LVU291 898 00dc FFF7FEFF bl HAL_GPIO_WritePin 899 .LVL82: -2290:Src/main.c **** break; - 900 .loc 1 2290 3 is_stmt 1 view .LVU292 +2292:Src/main.c **** break; + 900 .loc 1 2292 3 is_stmt 1 view .LVU292 901 00e0 0022 movs r2, #0 902 00e2 2021 movs r1, #32 903 00e4 2046 mov r0, r4 904 00e6 FFF7FEFF bl HAL_GPIO_WritePin 905 .LVL83: -2291:Src/main.c **** - 906 .loc 1 2291 2 view .LVU293 +2293:Src/main.c **** + 906 .loc 1 2293 2 view .LVU293 907 00ea A0E7 b .L29 908 .LVL84: 909 .L33: -2294:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 910 .loc 1 2294 3 view .LVU294 +2296:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 910 .loc 1 2296 3 view .LVU294 911 00ec 0C4C ldr r4, .L44+4 912 00ee 0122 movs r2, #1 913 00f0 4021 movs r1, #64 914 00f2 2046 mov r0, r4 915 .LVL85: -2294:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); - 916 .loc 1 2294 3 is_stmt 0 view .LVU295 +2296:Src/main.c **** HAL_GPIO_WritePin(OUT_8_GPIO_Port, OUT_8_Pin, GPIO_PIN_RESET); + 916 .loc 1 2296 3 is_stmt 0 view .LVU295 917 00f4 FFF7FEFF bl HAL_GPIO_WritePin 918 .LVL86: -2295:Src/main.c **** break; - 919 .loc 1 2295 3 is_stmt 1 view .LVU296 +2297:Src/main.c **** break; + 919 .loc 1 2297 3 is_stmt 1 view .LVU296 920 00f8 0022 movs r2, #0 921 00fa 4021 movs r1, #64 922 00fc 2046 mov r0, r4 923 00fe FFF7FEFF bl HAL_GPIO_WritePin 924 .LVL87: -2296:Src/main.c **** - 925 .loc 1 2296 2 view .LVU297 +2298:Src/main.c **** + 925 .loc 1 2298 2 view .LVU297 926 0102 94E7 b .L29 927 .LVL88: 928 .L31: -2299:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - 929 .loc 1 2299 3 view .LVU298 +2301:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 929 .loc 1 2301 3 view .LVU298 930 0104 064C ldr r4, .L44+4 931 0106 0122 movs r2, #1 932 0108 8021 movs r1, #128 933 010a 2046 mov r0, r4 + ARM GAS /tmp/ccyYWdjY.s page 106 + + 934 .LVL89: -2299:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); - ARM GAS /tmp/ccfIOqv2.s page 106 - - - 935 .loc 1 2299 3 is_stmt 0 view .LVU299 +2301:Src/main.c **** HAL_GPIO_WritePin(OUT_9_GPIO_Port, OUT_9_Pin, GPIO_PIN_RESET); + 935 .loc 1 2301 3 is_stmt 0 view .LVU299 936 010c FFF7FEFF bl HAL_GPIO_WritePin 937 .LVL90: -2300:Src/main.c **** break; - 938 .loc 1 2300 3 is_stmt 1 view .LVU300 +2302:Src/main.c **** break; + 938 .loc 1 2302 3 is_stmt 1 view .LVU300 939 0110 0022 movs r2, #0 940 0112 8021 movs r1, #128 941 0114 2046 mov r0, r4 942 0116 FFF7FEFF bl HAL_GPIO_WritePin 943 .LVL91: -2301:Src/main.c **** } - 944 .loc 1 2301 2 view .LVU301 -2303:Src/main.c **** - 945 .loc 1 2303 1 is_stmt 0 view .LVU302 +2303:Src/main.c **** } + 944 .loc 1 2303 2 view .LVU301 +2305:Src/main.c **** + 945 .loc 1 2305 1 is_stmt 0 view .LVU302 946 011a 88E7 b .L29 947 .L45: 948 .align 2 @@ -6331,13 +6333,13 @@ ARM GAS /tmp/ccfIOqv2.s page 1 961 MPhD_T: 962 .LVL92: 963 .LFB1212: -2363:Src/main.c **** uint16_t P; - 964 .loc 1 2363 1 is_stmt 1 view -0 +2365:Src/main.c **** uint16_t P; + 964 .loc 1 2365 1 is_stmt 1 view -0 965 .cfi_startproc 966 @ args = 0, pretend = 0, frame = 0 967 @ frame_needed = 0, uses_anonymous_args = 0 -2363:Src/main.c **** uint16_t P; - 968 .loc 1 2363 1 is_stmt 0 view .LVU304 +2365:Src/main.c **** uint16_t P; + 968 .loc 1 2365 1 is_stmt 0 view .LVU304 969 0000 38B5 push {r3, r4, r5, lr} 970 .LCFI10: 971 .cfi_def_cfa_offset 16 @@ -6346,99 +6348,99 @@ ARM GAS /tmp/ccfIOqv2.s page 1 974 .cfi_offset 5, -8 975 .cfi_offset 14, -4 976 0002 0446 mov r4, r0 -2364:Src/main.c **** uint32_t tmp32; - 977 .loc 1 2364 2 is_stmt 1 view .LVU305 -2365:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 978 .loc 1 2365 2 view .LVU306 -2366:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 979 .loc 1 2366 2 view .LVU307 +2366:Src/main.c **** uint32_t tmp32; + 977 .loc 1 2366 2 is_stmt 1 view .LVU305 +2367:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 978 .loc 1 2367 2 view .LVU306 +2368:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 979 .loc 1 2368 2 view .LVU307 980 0004 0022 movs r2, #0 981 0006 4FF48041 mov r1, #16384 982 000a 8148 ldr r0, .L87 983 .LVL93: -2366:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion - 984 .loc 1 2366 2 is_stmt 0 view .LVU308 - ARM GAS /tmp/ccfIOqv2.s page 107 + ARM GAS /tmp/ccyYWdjY.s page 107 +2368:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_RESET);//Prepare conversion + 984 .loc 1 2368 2 is_stmt 0 view .LVU308 985 000c FFF7FEFF bl HAL_GPIO_WritePin 986 .LVL94: -2367:Src/main.c **** tmp32=0; - 987 .loc 1 2367 2 is_stmt 1 view .LVU309 +2369:Src/main.c **** tmp32=0; + 987 .loc 1 2369 2 is_stmt 1 view .LVU309 988 0010 0022 movs r2, #0 989 0012 4FF40071 mov r1, #512 990 0016 7F48 ldr r0, .L87+4 991 0018 FFF7FEFF bl HAL_GPIO_WritePin 992 .LVL95: -2368:Src/main.c **** while(tmp32<500){tmp32++;} - 993 .loc 1 2368 2 view .LVU310 -2369:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 994 .loc 1 2369 2 view .LVU311 -2368:Src/main.c **** while(tmp32<500){tmp32++;} - 995 .loc 1 2368 7 is_stmt 0 view .LVU312 +2370:Src/main.c **** while(tmp32<500){tmp32++;} + 993 .loc 1 2370 2 view .LVU310 +2371:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 994 .loc 1 2371 2 view .LVU311 +2370:Src/main.c **** while(tmp32<500){tmp32++;} + 995 .loc 1 2370 7 is_stmt 0 view .LVU312 996 001c 0023 movs r3, #0 -2369:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 997 .loc 1 2369 7 view .LVU313 +2371:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 997 .loc 1 2371 7 view .LVU313 998 001e 00E0 b .L47 999 .LVL96: 1000 .L48: -2369:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1001 .loc 1 2369 19 is_stmt 1 discriminator 2 view .LVU314 -2369:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1002 .loc 1 2369 24 is_stmt 0 discriminator 2 view .LVU315 +2371:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1001 .loc 1 2371 19 is_stmt 1 discriminator 2 view .LVU314 +2371:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1002 .loc 1 2371 24 is_stmt 0 discriminator 2 view .LVU315 1003 0020 0133 adds r3, r3, #1 1004 .LVL97: 1005 .L47: -2369:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1006 .loc 1 2369 13 is_stmt 1 discriminator 1 view .LVU316 +2371:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1006 .loc 1 2371 13 is_stmt 1 discriminator 1 view .LVU316 1007 0022 B3F5FA7F cmp r3, #500 1008 0026 FBD3 bcc .L48 -2370:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver - 1009 .loc 1 2370 2 view .LVU317 +2372:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI5_CNV_Pin, GPIO_PIN_SET);//Stop acqusition & start conver + 1009 .loc 1 2372 2 view .LVU317 1010 0028 0122 movs r2, #1 1011 002a 4FF48041 mov r1, #16384 1012 002e 7848 ldr r0, .L87 1013 0030 FFF7FEFF bl HAL_GPIO_WritePin 1014 .LVL98: -2371:Src/main.c **** tmp32=0; - 1015 .loc 1 2371 2 view .LVU318 +2373:Src/main.c **** tmp32=0; + 1015 .loc 1 2373 2 view .LVU318 1016 0034 0122 movs r2, #1 1017 0036 4FF40071 mov r1, #512 1018 003a 7648 ldr r0, .L87+4 1019 003c FFF7FEFF bl HAL_GPIO_WritePin 1020 .LVL99: -2372:Src/main.c **** while(tmp32<500){tmp32++;} - 1021 .loc 1 2372 2 view .LVU319 -2373:Src/main.c **** if (num==1)//MPD1 - 1022 .loc 1 2373 2 view .LVU320 -2372:Src/main.c **** while(tmp32<500){tmp32++;} - 1023 .loc 1 2372 7 is_stmt 0 view .LVU321 +2374:Src/main.c **** while(tmp32<500){tmp32++;} + 1021 .loc 1 2374 2 view .LVU319 +2375:Src/main.c **** if (num==1)//MPD1 + 1022 .loc 1 2375 2 view .LVU320 +2374:Src/main.c **** while(tmp32<500){tmp32++;} + 1023 .loc 1 2374 7 is_stmt 0 view .LVU321 1024 0040 0023 movs r3, #0 -2373:Src/main.c **** if (num==1)//MPD1 - 1025 .loc 1 2373 7 view .LVU322 +2375:Src/main.c **** if (num==1)//MPD1 + 1025 .loc 1 2375 7 view .LVU322 + ARM GAS /tmp/ccyYWdjY.s page 108 + + 1026 0042 00E0 b .L49 1027 .LVL100: - ARM GAS /tmp/ccfIOqv2.s page 108 - - 1028 .L50: -2373:Src/main.c **** if (num==1)//MPD1 - 1029 .loc 1 2373 19 is_stmt 1 discriminator 2 view .LVU323 -2373:Src/main.c **** if (num==1)//MPD1 - 1030 .loc 1 2373 24 is_stmt 0 discriminator 2 view .LVU324 +2375:Src/main.c **** if (num==1)//MPD1 + 1029 .loc 1 2375 19 is_stmt 1 discriminator 2 view .LVU323 +2375:Src/main.c **** if (num==1)//MPD1 + 1030 .loc 1 2375 24 is_stmt 0 discriminator 2 view .LVU324 1031 0044 0133 adds r3, r3, #1 1032 .LVL101: 1033 .L49: -2373:Src/main.c **** if (num==1)//MPD1 - 1034 .loc 1 2373 13 is_stmt 1 discriminator 1 view .LVU325 +2375:Src/main.c **** if (num==1)//MPD1 + 1034 .loc 1 2375 13 is_stmt 1 discriminator 1 view .LVU325 1035 0046 B3F5FA7F cmp r3, #500 1036 004a FBD3 bcc .L50 -2374:Src/main.c **** { - 1037 .loc 1 2374 2 view .LVU326 +2376:Src/main.c **** { + 1037 .loc 1 2376 2 view .LVU326 1038 004c 631E subs r3, r4, #1 1039 .LVL102: -2374:Src/main.c **** { - 1040 .loc 1 2374 2 is_stmt 0 view .LVU327 +2376:Src/main.c **** { + 1040 .loc 1 2376 2 is_stmt 0 view .LVU327 1041 004e 032B cmp r3, #3 1042 0050 39D8 bhi .L51 1043 0052 DFE803F0 tbb [pc, r3] @@ -6449,52 +6451,52 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1048 0059 A6 .byte (.L52-.L53)/2 1049 .p2align 1 1050 .L56: -2376:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1051 .loc 1 2376 3 is_stmt 1 view .LVU328 +2378:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 1051 .loc 1 2378 3 is_stmt 1 view .LVU328 1052 005a 6D4C ldr r4, .L87 1053 .LVL103: -2376:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); - 1054 .loc 1 2376 3 is_stmt 0 view .LVU329 +2378:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD1_CS_GPIO_Port, ADC_MPD1_CS_Pin, GPIO_PIN_RESET); + 1054 .loc 1 2378 3 is_stmt 0 view .LVU329 1055 005c 0122 movs r2, #1 1056 005e 4FF40061 mov r1, #2048 1057 0062 2046 mov r0, r4 1058 0064 FFF7FEFF bl HAL_GPIO_WritePin 1059 .LVL104: -2377:Src/main.c **** tmp32=0; - 1060 .loc 1 2377 3 is_stmt 1 view .LVU330 +2379:Src/main.c **** tmp32=0; + 1060 .loc 1 2379 3 is_stmt 1 view .LVU330 1061 0068 0022 movs r2, #0 1062 006a 4FF48061 mov r1, #1024 1063 006e 2046 mov r0, r4 1064 0070 FFF7FEFF bl HAL_GPIO_WritePin 1065 .LVL105: -2378:Src/main.c **** while(tmp32<500){tmp32++;} - 1066 .loc 1 2378 3 view .LVU331 -2379:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1067 .loc 1 2379 3 view .LVU332 -2378:Src/main.c **** while(tmp32<500){tmp32++;} - 1068 .loc 1 2378 8 is_stmt 0 view .LVU333 +2380:Src/main.c **** while(tmp32<500){tmp32++;} + 1066 .loc 1 2380 3 view .LVU331 +2381:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1067 .loc 1 2381 3 view .LVU332 +2380:Src/main.c **** while(tmp32<500){tmp32++;} + 1068 .loc 1 2380 8 is_stmt 0 view .LVU333 1069 0074 0023 movs r3, #0 -2379:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1070 .loc 1 2379 8 view .LVU334 +2381:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1070 .loc 1 2381 8 view .LVU334 + ARM GAS /tmp/ccyYWdjY.s page 109 + + 1071 0076 00E0 b .L57 1072 .LVL106: - ARM GAS /tmp/ccfIOqv2.s page 109 - - 1073 .L58: -2379:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1074 .loc 1 2379 20 is_stmt 1 discriminator 2 view .LVU335 -2379:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1075 .loc 1 2379 25 is_stmt 0 discriminator 2 view .LVU336 +2381:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1074 .loc 1 2381 20 is_stmt 1 discriminator 2 view .LVU335 +2381:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1075 .loc 1 2381 25 is_stmt 0 discriminator 2 view .LVU336 1076 0078 0133 adds r3, r3, #1 1077 .LVL107: 1078 .L57: -2379:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1079 .loc 1 2379 14 is_stmt 1 discriminator 1 view .LVU337 +2381:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1079 .loc 1 2381 14 is_stmt 1 discriminator 1 view .LVU337 1080 007a B3F5FA7F cmp r3, #500 1081 007e FBD3 bcc .L58 -2381:Src/main.c **** tmp32 = 0; - 1082 .loc 1 2381 3 view .LVU338 +2383:Src/main.c **** tmp32 = 0; + 1082 .loc 1 2383 3 view .LVU338 1083 .LVL108: 1084 .LBB302: 1085 .LBI302: @@ -6536,11 +6538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL SPI 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ + ARM GAS /tmp/ccyYWdjY.s page 110 + + 38:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 39:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccfIOqv2.s page 110 - - 40:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private types -------------------------------------------------------------*/ 41:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private variables ---------------------------------------------------------*/ 42:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /* Private macros ------------------------------------------------------------*/ @@ -6596,11 +6598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_BIT_ORDER. 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func + ARM GAS /tmp/ccyYWdjY.s page 111 + + 95:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 96:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not. - ARM GAS /tmp/ccfIOqv2.s page 111 - - 97:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This parameter can be a value of @ref SPI_LL_EC_CRC_CALCUL 98:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 99:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** This feature can be modified afterwards using unitary func @@ -6656,11 +6658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 112 + + 152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_PROTOCOL Serial Protocol - ARM GAS /tmp/ccfIOqv2.s page 112 - - 154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_PROTOCOL_MOTOROLA 0x00000000U /*!< Motorola mode. Used as de @@ -6716,11 +6718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_FULL_DUPLEX 0x00000000U /*!< Full-Duplex mo 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_SIMPLEX_RX (SPI_CR1_RXONLY) /*!< Simplex Rx mod + ARM GAS /tmp/ccyYWdjY.s page 113 + + 209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_HALF_DUPLEX_RX (SPI_CR1_BIDIMODE) /*!< Half-Duplex Rx 210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_HALF_DUPLEX_TX (SPI_CR1_BIDIMODE | SPI_CR1_BIDIOE) /*!< Half-Duplex Tx - ARM GAS /tmp/ccfIOqv2.s page 113 - - 211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -6776,11 +6778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EC_RX_FIFO_TH RX FIFO Threshold + ARM GAS /tmp/ccyYWdjY.s page 114 + + 266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ 267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 114 - - 268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_RX_FIFO_TH_HALF 0x00000000U /*!< RXNE event is generated i 269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_RX_FIFO_TH_QUARTER (SPI_CR2_FRXTH) /*!< RXNE event is generated i 270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @@ -6836,11 +6838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Write a value in SPI register 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __INSTANCE__ SPI Instance 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __REG__ Register to be written + ARM GAS /tmp/ccyYWdjY.s page 115 + + 323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param __VALUE__ Value to be written in the register 324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 115 - - 325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #define LL_SPI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE 327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -6890,20 +6892,20 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1097 .loc 4 360 3 view .LVU342 1098 .LBE303: 1099 .LBE302: -2382:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1100 .loc 1 2382 3 is_stmt 1 view .LVU343 -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1101 .loc 1 2383 3 view .LVU344 -2382:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1102 .loc 1 2382 9 is_stmt 0 view .LVU345 +2384:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1100 .loc 1 2384 3 is_stmt 1 view .LVU343 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1101 .loc 1 2385 3 view .LVU344 +2384:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1102 .loc 1 2384 9 is_stmt 0 view .LVU345 + ARM GAS /tmp/ccyYWdjY.s page 116 + + 1103 008a 0023 movs r3, #0 1104 .LVL111: - ARM GAS /tmp/ccfIOqv2.s page 116 - - 1105 .L59: -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1106 .loc 1 2383 43 is_stmt 1 discriminator 1 view .LVU346 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1106 .loc 1 2385 43 is_stmt 1 discriminator 1 view .LVU346 1107 .LBB304: 1108 .LBI304: 361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -6956,11 +6958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_MASTER 409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_MODE_SLAVE 410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 117 + + 411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetMode(SPI_TypeDef *SPIx) 412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccfIOqv2.s page 117 - - 413:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_MSTR | SPI_CR1_SSI)); 414:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 415:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7016,11 +7018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_1EDGE 466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_PHASE_2EDGE 467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 118 + + 468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetClockPhase(SPI_TypeDef *SPIx) 469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccfIOqv2.s page 118 - - 470:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CPHA)); 471:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 472:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7076,11 +7078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get baud rate prescaler + ARM GAS /tmp/ccyYWdjY.s page 119 + + 525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 BR LL_SPI_GetBaudRatePrescaler 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccfIOqv2.s page 119 - - 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV2 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_BAUDRATEPRESCALER_DIV4 @@ -7136,11 +7138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_FULL_DUPLEX 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_SIMPLEX_RX 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_RX + ARM GAS /tmp/ccyYWdjY.s page 120 + + 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_HALF_DUPLEX_TX 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 120 - - 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_SetTransferDirection(SPI_TypeDef *SPIx, uint32_t TransferDirection) 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -7196,11 +7198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_4BIT 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_5BIT + ARM GAS /tmp/ccyYWdjY.s page 121 + + 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_6BIT 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_7BIT - ARM GAS /tmp/ccfIOqv2.s page 121 - - 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_8BIT 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_9BIT 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DATAWIDTH_10BIT @@ -7256,11 +7258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should be written only when SPI is disabled (SPE = 0) for correct operation. 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR1 CRCEN LL_SPI_EnableCRC 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccyYWdjY.s page 122 + + 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 122 - - 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_EnableCRC(SPI_TypeDef *SPIx) 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR1, SPI_CR1_CRCEN); @@ -7316,11 +7318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetCRCWidth(SPI_TypeDef *SPIx) 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_BIT(SPIx->CR1, SPI_CR1_CRCL)); + ARM GAS /tmp/ccyYWdjY.s page 123 + + 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccfIOqv2.s page 123 - - 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Set CRCNext to transfer CRC on the line 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit has to be written as soon as the last data is written in the SPIx_DR register. @@ -7376,11 +7378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetTxCRC(SPI_TypeDef *SPIx) 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** return (uint32_t)(READ_REG(SPIx->TXCRCR)); + ARM GAS /tmp/ccyYWdjY.s page 124 + + 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccfIOqv2.s page 124 - - 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ @@ -7436,11 +7438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** SET_BIT(SPIx->CR2, SPI_CR2_NSSP); 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccyYWdjY.s page 125 + + 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable NSS pulse management - ARM GAS /tmp/ccfIOqv2.s page 125 - - 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note This bit should not be changed when communication is ongoing. This bit is not used in S 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 NSSP LL_SPI_DisableNSSPulseMgt 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance @@ -7493,25 +7495,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1119 .loc 4 907 68 view .LVU351 1120 .LBE305: 1121 .LBE304: -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1122 .loc 1 2383 43 discriminator 2 view .LVU352 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1122 .loc 1 2385 43 discriminator 2 view .LVU352 1123 0096 B3F57A7F cmp r3, #1000 + ARM GAS /tmp/ccyYWdjY.s page 126 + + 1124 009a 01D8 bhi .L60 -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - ARM GAS /tmp/ccfIOqv2.s page 126 - - - 1125 .loc 1 2383 62 is_stmt 1 discriminator 3 view .LVU353 -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1126 .loc 1 2383 67 is_stmt 0 discriminator 3 view .LVU354 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1125 .loc 1 2385 62 is_stmt 1 discriminator 3 view .LVU353 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1126 .loc 1 2385 67 is_stmt 0 discriminator 3 view .LVU354 1127 009c 0133 adds r3, r3, #1 1128 .LVL113: -2383:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC - 1129 .loc 1 2383 67 discriminator 3 view .LVU355 +2385:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for MPhD1 ADC + 1129 .loc 1 2385 67 discriminator 3 view .LVU355 1130 009e F5E7 b .L59 1131 .L60: -2384:Src/main.c **** while(tmp32<500){tmp32++;} - 1132 .loc 1 2384 3 is_stmt 1 view .LVU356 +2386:Src/main.c **** while(tmp32<500){tmp32++;} + 1132 .loc 1 2386 3 is_stmt 1 view .LVU356 1133 .LVL114: 1134 .LBB306: 1135 .LBI306: @@ -7529,8 +7531,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1144 .loc 4 372 3 is_stmt 0 view .LVU359 1145 .LBE307: 1146 .LBE306: -2385:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1147 .loc 1 2385 3 is_stmt 1 view .LVU360 +2387:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1147 .loc 1 2387 3 is_stmt 1 view .LVU360 1148 .LBB309: 1149 .LBB308: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -7541,29 +7543,29 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1153 .loc 4 373 1 view .LVU362 1154 .LBE308: 1155 .LBE309: -2385:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1156 .loc 1 2385 20 is_stmt 1 discriminator 2 view .LVU363 -2385:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1157 .loc 1 2385 25 is_stmt 0 discriminator 2 view .LVU364 +2387:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1156 .loc 1 2387 20 is_stmt 1 discriminator 2 view .LVU363 +2387:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1157 .loc 1 2387 25 is_stmt 0 discriminator 2 view .LVU364 1158 00ac 0133 adds r3, r3, #1 1159 .LVL116: 1160 .L62: -2385:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1161 .loc 1 2385 14 is_stmt 1 discriminator 1 view .LVU365 +2387:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1161 .loc 1 2387 14 is_stmt 1 discriminator 1 view .LVU365 1162 00ae B3F5FA7F cmp r3, #500 1163 00b2 FBD3 bcc .L63 -2387:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1164 .loc 1 2387 3 view .LVU366 +2389:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 1164 .loc 1 2389 3 view .LVU366 1165 00b4 0122 movs r2, #1 1166 00b6 4FF48061 mov r1, #1024 + ARM GAS /tmp/ccyYWdjY.s page 127 + + 1167 00ba 5548 ldr r0, .L87 1168 00bc FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccfIOqv2.s page 127 - - 1169 .LVL117: -2388:Src/main.c **** } - 1170 .loc 1 2388 3 view .LVU367 +2390:Src/main.c **** } + 1170 .loc 1 2390 3 view .LVU367 1171 .LBB310: 1172 .LBI310: 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -7616,11 +7618,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 955:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Get busy flag 956:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @note The BSY flag is cleared under any one of the following conditions: 957:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -When the SPI is correctly disabled + ARM GAS /tmp/ccyYWdjY.s page 128 + + 958:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -When a fault is detected in Master mode (MODF bit set to 1) 959:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Master mode, when it finishes a data transmission and no new data is ready to be - ARM GAS /tmp/ccfIOqv2.s page 128 - - 960:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * sent 961:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * -In Slave mode, when the BSY flag is set to '0' for at least one SPI clock cycle between 962:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * each data transfer. @@ -7676,11 +7678,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1012:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1013:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1014:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Clear CRC error flag + ARM GAS /tmp/ccyYWdjY.s page 129 + + 1015:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll SR CRCERR LL_SPI_ClearFlag_CRCERR 1016:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance - ARM GAS /tmp/ccfIOqv2.s page 129 - - 1017:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1018:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1019:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_ClearFlag_CRCERR(SPI_TypeDef *SPIx) @@ -7736,11 +7738,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1069:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1070:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 130 + + 1072:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @} 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 130 - - 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1075:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_IT_Management Interrupt Management 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ @@ -7796,11 +7798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1126:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Disable Rx buffer not empty interrupt 1127:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXNEIE LL_SPI_DisableIT_RXNE 1128:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance + ARM GAS /tmp/ccyYWdjY.s page 131 + + 1129:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1130:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 131 - - 1131:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_DisableIT_RXNE(SPI_TypeDef *SPIx) 1132:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1133:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_RXNEIE); @@ -7856,11 +7858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1183:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** 1184:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** @defgroup SPI_LL_EF_DMA_Management DMA Management 1185:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @{ + ARM GAS /tmp/ccyYWdjY.s page 132 + + 1186:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1187:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** - ARM GAS /tmp/ccfIOqv2.s page 132 - - 1188:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1189:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Enable DMA Rx 1190:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 RXDMAEN LL_SPI_EnableDMAReq_RX @@ -7916,11 +7918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** CLEAR_BIT(SPIx->CR2, SPI_CR2_TXDMAEN); 1241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1242:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** + ARM GAS /tmp/ccyYWdjY.s page 133 + + 1243:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** /** 1244:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @brief Check if DMA Tx is enabled - ARM GAS /tmp/ccfIOqv2.s page 133 - - 1245:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 TXDMAEN LL_SPI_IsEnabledDMAReq_TX 1246:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1247:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval State of bit (1 or 0). @@ -7976,11 +7978,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @rmtoll CR2 LDMATX LL_SPI_GetDMAParity_TX 1298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @param SPIx SPI Instance 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccyYWdjY.s page 134 + + 1300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_ODD 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @arg @ref LL_SPI_DMA_PARITY_EVEN - ARM GAS /tmp/ccfIOqv2.s page 134 - - 1302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE uint32_t LL_SPI_GetDMAParity_TX(SPI_TypeDef *SPIx) 1304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8036,71 +8038,71 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1180 00c4 ADB2 uxth r5, r5 1181 .LVL118: 1182 .L51: + ARM GAS /tmp/ccyYWdjY.s page 135 + + 1183 .loc 4 1346 10 view .LVU372 1184 .LBE311: - ARM GAS /tmp/ccfIOqv2.s page 135 - - 1185 .LBE310: -2460:Src/main.c **** } - 1186 .loc 1 2460 2 is_stmt 1 view .LVU373 -2461:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time - 1187 .loc 1 2461 1 is_stmt 0 view .LVU374 +2462:Src/main.c **** } + 1186 .loc 1 2462 2 is_stmt 1 view .LVU373 +2463:Src/main.c **** /*static uint16_t Temp_LD(uint16_t T_LD_before, uint16_t T_LD, uint32_t Timer_before, uint32_t Time + 1187 .loc 1 2463 1 is_stmt 0 view .LVU374 1188 00c6 2846 mov r0, r5 1189 00c8 38BD pop {r3, r4, r5, pc} 1190 .LVL119: 1191 .L55: -2392:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); - 1192 .loc 1 2392 3 is_stmt 1 view .LVU375 +2394:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_RESET); + 1192 .loc 1 2394 3 is_stmt 1 view .LVU375 1193 00ca 524C ldr r4, .L87+4 1194 00cc 0122 movs r2, #1 1195 00ce 4FF48061 mov r1, #1024 1196 00d2 2046 mov r0, r4 1197 00d4 FFF7FEFF bl HAL_GPIO_WritePin 1198 .LVL120: -2393:Src/main.c **** tmp32=0; - 1199 .loc 1 2393 3 view .LVU376 +2395:Src/main.c **** tmp32=0; + 1199 .loc 1 2395 3 view .LVU376 1200 00d8 0022 movs r2, #0 1201 00da 4021 movs r1, #64 1202 00dc 2046 mov r0, r4 1203 00de FFF7FEFF bl HAL_GPIO_WritePin 1204 .LVL121: -2394:Src/main.c **** while(tmp32<500){tmp32++;} - 1205 .loc 1 2394 3 view .LVU377 -2395:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1206 .loc 1 2395 3 view .LVU378 -2394:Src/main.c **** while(tmp32<500){tmp32++;} - 1207 .loc 1 2394 8 is_stmt 0 view .LVU379 +2396:Src/main.c **** while(tmp32<500){tmp32++;} + 1205 .loc 1 2396 3 view .LVU377 +2397:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1206 .loc 1 2397 3 view .LVU378 +2396:Src/main.c **** while(tmp32<500){tmp32++;} + 1207 .loc 1 2396 8 is_stmt 0 view .LVU379 1208 00e2 0023 movs r3, #0 -2395:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1209 .loc 1 2395 8 view .LVU380 +2397:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1209 .loc 1 2397 8 view .LVU380 1210 00e4 00E0 b .L64 1211 .LVL122: 1212 .L65: -2395:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1213 .loc 1 2395 20 is_stmt 1 discriminator 2 view .LVU381 -2395:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1214 .loc 1 2395 25 is_stmt 0 discriminator 2 view .LVU382 +2397:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1213 .loc 1 2397 20 is_stmt 1 discriminator 2 view .LVU381 +2397:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1214 .loc 1 2397 25 is_stmt 0 discriminator 2 view .LVU382 1215 00e6 0133 adds r3, r3, #1 1216 .LVL123: 1217 .L64: -2395:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1218 .loc 1 2395 14 is_stmt 1 discriminator 1 view .LVU383 +2397:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1218 .loc 1 2397 14 is_stmt 1 discriminator 1 view .LVU383 1219 00e8 B3F5FA7F cmp r3, #500 1220 00ec FBD3 bcc .L65 -2397:Src/main.c **** tmp32 = 0; - 1221 .loc 1 2397 3 view .LVU384 +2399:Src/main.c **** tmp32 = 0; + 1221 .loc 1 2399 3 view .LVU384 1222 .LVL124: 1223 .LBB312: 1224 .LBI312: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1225 .loc 4 358 22 view .LVU385 1226 .LBB313: + ARM GAS /tmp/ccyYWdjY.s page 136 + + 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1227 .loc 4 360 3 view .LVU386 - ARM GAS /tmp/ccfIOqv2.s page 136 - - 1228 00ee 4B4A ldr r2, .L87+12 1229 00f0 1368 ldr r3, [r2] 1230 .LVL125: @@ -8113,17 +8115,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1235 .loc 4 360 3 view .LVU388 1236 .LBE313: 1237 .LBE312: -2398:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1238 .loc 1 2398 3 is_stmt 1 view .LVU389 -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1239 .loc 1 2399 3 view .LVU390 -2398:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1240 .loc 1 2398 9 is_stmt 0 view .LVU391 +2400:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1238 .loc 1 2400 3 is_stmt 1 view .LVU389 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1239 .loc 1 2401 3 view .LVU390 +2400:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1240 .loc 1 2400 9 is_stmt 0 view .LVU391 1241 00f8 0023 movs r3, #0 1242 .LVL127: 1243 .L66: -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1244 .loc 1 2399 43 is_stmt 1 discriminator 1 view .LVU392 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1244 .loc 1 2401 43 is_stmt 1 discriminator 1 view .LVU392 1245 .LBB314: 1246 .LBI314: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8144,25 +8146,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1257 .loc 4 907 68 view .LVU397 1258 .LBE315: 1259 .LBE314: -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1260 .loc 1 2399 43 discriminator 2 view .LVU398 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1260 .loc 1 2401 43 discriminator 2 view .LVU398 1261 0104 B3F57A7F cmp r3, #1000 1262 0108 01D8 bhi .L67 -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1263 .loc 1 2399 62 is_stmt 1 discriminator 3 view .LVU399 -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1264 .loc 1 2399 67 is_stmt 0 discriminator 3 view .LVU400 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1263 .loc 1 2401 62 is_stmt 1 discriminator 3 view .LVU399 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1264 .loc 1 2401 67 is_stmt 0 discriminator 3 view .LVU400 1265 010a 0133 adds r3, r3, #1 1266 .LVL129: -2399:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC - 1267 .loc 1 2399 67 discriminator 3 view .LVU401 +2401:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for MPhD2 ADC + 1267 .loc 1 2401 67 discriminator 3 view .LVU401 + ARM GAS /tmp/ccyYWdjY.s page 137 + + 1268 010c F5E7 b .L66 1269 .L67: - ARM GAS /tmp/ccfIOqv2.s page 137 - - -2400:Src/main.c **** while(tmp32<500){tmp32++;} - 1270 .loc 1 2400 3 is_stmt 1 view .LVU402 +2402:Src/main.c **** while(tmp32<500){tmp32++;} + 1270 .loc 1 2402 3 is_stmt 1 view .LVU402 1271 .LVL130: 1272 .LBB316: 1273 .LBI316: @@ -8180,8 +8182,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1282 .loc 4 372 3 is_stmt 0 view .LVU405 1283 .LBE317: 1284 .LBE316: -2401:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1285 .loc 1 2401 3 is_stmt 1 view .LVU406 +2403:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1285 .loc 1 2403 3 is_stmt 1 view .LVU406 1286 .LBB319: 1287 .LBB318: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8192,35 +8194,35 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1291 .loc 4 373 1 view .LVU408 1292 .LBE318: 1293 .LBE319: -2401:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1294 .loc 1 2401 20 is_stmt 1 discriminator 2 view .LVU409 -2401:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1295 .loc 1 2401 25 is_stmt 0 discriminator 2 view .LVU410 +2403:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1294 .loc 1 2403 20 is_stmt 1 discriminator 2 view .LVU409 +2403:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1295 .loc 1 2403 25 is_stmt 0 discriminator 2 view .LVU410 1296 011a 0133 adds r3, r3, #1 1297 .LVL132: 1298 .L69: -2401:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1299 .loc 1 2401 14 is_stmt 1 discriminator 1 view .LVU411 +2403:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1299 .loc 1 2403 14 is_stmt 1 discriminator 1 view .LVU411 1300 011c B3F5FA7F cmp r3, #500 1301 0120 FBD3 bcc .L70 -2403:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1302 .loc 1 2403 3 view .LVU412 +2405:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 1302 .loc 1 2405 3 view .LVU412 1303 0122 0122 movs r2, #1 1304 0124 4021 movs r1, #64 1305 0126 3B48 ldr r0, .L87+4 1306 0128 FFF7FEFF bl HAL_GPIO_WritePin 1307 .LVL133: -2404:Src/main.c **** } - 1308 .loc 1 2404 3 view .LVU413 +2406:Src/main.c **** } + 1308 .loc 1 2406 3 view .LVU413 1309 .LBB320: 1310 .LBI320: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1311 .loc 4 1344 26 view .LVU414 + ARM GAS /tmp/ccyYWdjY.s page 138 + + 1312 .LBB321: 1313 .loc 4 1346 3 view .LVU415 - ARM GAS /tmp/ccfIOqv2.s page 138 - - 1314 .loc 4 1346 21 is_stmt 0 view .LVU416 1315 012c 3B4B ldr r3, .L87+12 1316 012e DD68 ldr r5, [r3, #12] @@ -8233,54 +8235,54 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1323 0132 C8E7 b .L51 1324 .LVL135: 1325 .L54: -2408:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); - 1326 .loc 1 2408 3 is_stmt 1 view .LVU419 +2410:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD1_CS_GPIO_Port, ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); + 1326 .loc 1 2410 3 is_stmt 1 view .LVU419 1327 0134 364C ldr r4, .L87 1328 0136 0122 movs r2, #1 1329 0138 4FF48061 mov r1, #1024 1330 013c 2046 mov r0, r4 1331 013e FFF7FEFF bl HAL_GPIO_WritePin 1332 .LVL136: -2409:Src/main.c **** tmp32=0; - 1333 .loc 1 2409 3 view .LVU420 +2411:Src/main.c **** tmp32=0; + 1333 .loc 1 2411 3 view .LVU420 1334 0142 0022 movs r2, #0 1335 0144 4FF40061 mov r1, #2048 1336 0148 2046 mov r0, r4 1337 014a FFF7FEFF bl HAL_GPIO_WritePin 1338 .LVL137: -2410:Src/main.c **** while(tmp32<500){tmp32++;} - 1339 .loc 1 2410 3 view .LVU421 -2411:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1340 .loc 1 2411 3 view .LVU422 -2410:Src/main.c **** while(tmp32<500){tmp32++;} - 1341 .loc 1 2410 8 is_stmt 0 view .LVU423 +2412:Src/main.c **** while(tmp32<500){tmp32++;} + 1339 .loc 1 2412 3 view .LVU421 +2413:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1340 .loc 1 2413 3 view .LVU422 +2412:Src/main.c **** while(tmp32<500){tmp32++;} + 1341 .loc 1 2412 8 is_stmt 0 view .LVU423 1342 014e 0023 movs r3, #0 -2411:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1343 .loc 1 2411 8 view .LVU424 +2413:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1343 .loc 1 2413 8 view .LVU424 1344 0150 00E0 b .L71 1345 .LVL138: 1346 .L72: -2411:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1347 .loc 1 2411 20 is_stmt 1 discriminator 2 view .LVU425 -2411:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1348 .loc 1 2411 25 is_stmt 0 discriminator 2 view .LVU426 +2413:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1347 .loc 1 2413 20 is_stmt 1 discriminator 2 view .LVU425 +2413:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1348 .loc 1 2413 25 is_stmt 0 discriminator 2 view .LVU426 1349 0152 0133 adds r3, r3, #1 1350 .LVL139: 1351 .L71: -2411:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1352 .loc 1 2411 14 is_stmt 1 discriminator 1 view .LVU427 +2413:Src/main.c **** //LL_SPI_TransmitData16(SPI4, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1352 .loc 1 2413 14 is_stmt 1 discriminator 1 view .LVU427 1353 0154 B3F5FA7F cmp r3, #500 1354 0158 FBD3 bcc .L72 -2413:Src/main.c **** tmp32 = 0; - 1355 .loc 1 2413 3 view .LVU428 +2415:Src/main.c **** tmp32 = 0; + 1355 .loc 1 2415 3 view .LVU428 1356 .LVL140: 1357 .LBB322: 1358 .LBI322: + ARM GAS /tmp/ccyYWdjY.s page 139 + + 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1359 .loc 4 358 22 view .LVU429 - ARM GAS /tmp/ccfIOqv2.s page 139 - - 1360 .LBB323: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 1361 .loc 4 360 3 view .LVU430 @@ -8296,17 +8298,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1369 .loc 4 360 3 view .LVU432 1370 .LBE323: 1371 .LBE322: -2414:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1372 .loc 1 2414 3 is_stmt 1 view .LVU433 -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1373 .loc 1 2415 3 view .LVU434 -2414:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1374 .loc 1 2414 9 is_stmt 0 view .LVU435 +2416:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1372 .loc 1 2416 3 is_stmt 1 view .LVU433 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1373 .loc 1 2417 3 view .LVU434 +2416:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI4))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1374 .loc 1 2416 9 is_stmt 0 view .LVU435 1375 0164 0023 movs r3, #0 1376 .LVL143: 1377 .L73: -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1378 .loc 1 2415 43 is_stmt 1 discriminator 1 view .LVU436 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1378 .loc 1 2417 43 is_stmt 1 discriminator 1 view .LVU436 1379 .LBB324: 1380 .LBI324: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8327,25 +8329,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1391 .loc 4 907 68 view .LVU441 1392 .LBE325: 1393 .LBE324: -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1394 .loc 1 2415 43 discriminator 2 view .LVU442 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1394 .loc 1 2417 43 discriminator 2 view .LVU442 1395 0170 B3F57A7F cmp r3, #1000 1396 0174 01D8 bhi .L74 -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1397 .loc 1 2415 62 is_stmt 1 discriminator 3 view .LVU443 -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - 1398 .loc 1 2415 67 is_stmt 0 discriminator 3 view .LVU444 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1397 .loc 1 2417 62 is_stmt 1 discriminator 3 view .LVU443 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1398 .loc 1 2417 67 is_stmt 0 discriminator 3 view .LVU444 1399 0176 0133 adds r3, r3, #1 + ARM GAS /tmp/ccyYWdjY.s page 140 + + 1400 .LVL145: -2415:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC - ARM GAS /tmp/ccfIOqv2.s page 140 - - - 1401 .loc 1 2415 67 discriminator 3 view .LVU445 +2417:Src/main.c **** LL_SPI_Disable(SPI4);//Enable SPI for ThrLD1 ADC + 1401 .loc 1 2417 67 discriminator 3 view .LVU445 1402 0178 F5E7 b .L73 1403 .L74: -2416:Src/main.c **** while(tmp32<500){tmp32++;} - 1404 .loc 1 2416 3 is_stmt 1 view .LVU446 +2418:Src/main.c **** while(tmp32<500){tmp32++;} + 1404 .loc 1 2418 3 is_stmt 1 view .LVU446 1405 .LVL146: 1406 .LBB326: 1407 .LBI326: @@ -8363,8 +8365,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1416 .loc 4 372 3 is_stmt 0 view .LVU449 1417 .LBE327: 1418 .LBE326: -2417:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1419 .loc 1 2417 3 is_stmt 1 view .LVU450 +2419:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1419 .loc 1 2419 3 is_stmt 1 view .LVU450 1420 .LBB329: 1421 .LBB328: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8375,32 +8377,32 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1425 .loc 4 373 1 view .LVU452 1426 .LBE328: 1427 .LBE329: -2417:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1428 .loc 1 2417 20 is_stmt 1 discriminator 2 view .LVU453 -2417:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1429 .loc 1 2417 25 is_stmt 0 discriminator 2 view .LVU454 +2419:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1428 .loc 1 2419 20 is_stmt 1 discriminator 2 view .LVU453 +2419:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1429 .loc 1 2419 25 is_stmt 0 discriminator 2 view .LVU454 1430 0186 0133 adds r3, r3, #1 1431 .LVL148: 1432 .L76: -2417:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1433 .loc 1 2417 14 is_stmt 1 discriminator 1 view .LVU455 +2419:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1433 .loc 1 2419 14 is_stmt 1 discriminator 1 view .LVU455 1434 0188 B3F5FA7F cmp r3, #500 1435 018c FBD3 bcc .L77 -2419:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); - 1436 .loc 1 2419 3 view .LVU456 +2421:Src/main.c **** P = LL_SPI_ReceiveData16(SPI4); + 1436 .loc 1 2421 3 view .LVU456 1437 018e 0122 movs r2, #1 1438 0190 4FF40061 mov r1, #2048 1439 0194 1E48 ldr r0, .L87 1440 0196 FFF7FEFF bl HAL_GPIO_WritePin 1441 .LVL149: -2420:Src/main.c **** } - 1442 .loc 1 2420 3 view .LVU457 +2422:Src/main.c **** } + 1442 .loc 1 2422 3 view .LVU457 1443 .LBB330: + ARM GAS /tmp/ccyYWdjY.s page 141 + + 1444 .LBI330: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccfIOqv2.s page 141 - - 1445 .loc 4 1344 26 view .LVU458 1446 .LBB331: 1447 .loc 4 1346 3 view .LVU459 @@ -8416,51 +8418,51 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1457 01a0 91E7 b .L51 1458 .LVL151: 1459 .L52: -2424:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); - 1460 .loc 1 2424 3 is_stmt 1 view .LVU463 +2426:Src/main.c **** HAL_GPIO_WritePin(ADC_ThrLD2_CS_GPIO_Port, ADC_ThrLD2_CS_Pin, GPIO_PIN_RESET); + 1460 .loc 1 2426 3 is_stmt 1 view .LVU463 1461 01a2 1C4C ldr r4, .L87+4 1462 01a4 0122 movs r2, #1 1463 01a6 4021 movs r1, #64 1464 01a8 2046 mov r0, r4 1465 01aa FFF7FEFF bl HAL_GPIO_WritePin 1466 .LVL152: -2425:Src/main.c **** tmp32=0; - 1467 .loc 1 2425 3 view .LVU464 +2427:Src/main.c **** tmp32=0; + 1467 .loc 1 2427 3 view .LVU464 1468 01ae 0022 movs r2, #0 1469 01b0 4FF48061 mov r1, #1024 1470 01b4 2046 mov r0, r4 1471 01b6 FFF7FEFF bl HAL_GPIO_WritePin 1472 .LVL153: -2426:Src/main.c **** while(tmp32<500){tmp32++;} - 1473 .loc 1 2426 3 view .LVU465 -2427:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1474 .loc 1 2427 3 view .LVU466 -2426:Src/main.c **** while(tmp32<500){tmp32++;} - 1475 .loc 1 2426 8 is_stmt 0 view .LVU467 +2428:Src/main.c **** while(tmp32<500){tmp32++;} + 1473 .loc 1 2428 3 view .LVU465 +2429:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1474 .loc 1 2429 3 view .LVU466 +2428:Src/main.c **** while(tmp32<500){tmp32++;} + 1475 .loc 1 2428 8 is_stmt 0 view .LVU467 1476 01ba 0023 movs r3, #0 -2427:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1477 .loc 1 2427 8 view .LVU468 +2429:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1477 .loc 1 2429 8 view .LVU468 1478 01bc 00E0 b .L78 1479 .LVL154: 1480 .L79: -2427:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1481 .loc 1 2427 20 is_stmt 1 discriminator 2 view .LVU469 -2427:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1482 .loc 1 2427 25 is_stmt 0 discriminator 2 view .LVU470 +2429:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1481 .loc 1 2429 20 is_stmt 1 discriminator 2 view .LVU469 +2429:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1482 .loc 1 2429 25 is_stmt 0 discriminator 2 view .LVU470 1483 01be 0133 adds r3, r3, #1 1484 .LVL155: 1485 .L78: -2427:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c - 1486 .loc 1 2427 14 is_stmt 1 discriminator 1 view .LVU471 +2429:Src/main.c **** //LL_SPI_TransmitData16(SPI5, 0xFFFF);//We must to clock the CLK output for collect RX data. We c + 1486 .loc 1 2429 14 is_stmt 1 discriminator 1 view .LVU471 1487 01c0 B3F5FA7F cmp r3, #500 1488 01c4 FBD3 bcc .L79 -2429:Src/main.c **** tmp32 = 0; - 1489 .loc 1 2429 3 view .LVU472 +2431:Src/main.c **** tmp32 = 0; + 1489 .loc 1 2431 3 view .LVU472 + ARM GAS /tmp/ccyYWdjY.s page 142 + + 1490 .LVL156: 1491 .LBB332: - ARM GAS /tmp/ccfIOqv2.s page 142 - - 1492 .LBI332: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1493 .loc 4 358 22 view .LVU473 @@ -8479,17 +8481,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1503 .loc 4 360 3 view .LVU476 1504 .LBE333: 1505 .LBE332: -2430:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1506 .loc 1 2430 3 is_stmt 1 view .LVU477 -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1507 .loc 1 2431 3 view .LVU478 -2430:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w - 1508 .loc 1 2430 9 is_stmt 0 view .LVU479 +2432:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1506 .loc 1 2432 3 is_stmt 1 view .LVU477 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1507 .loc 1 2433 3 view .LVU478 +2432:Src/main.c **** while(((!LL_SPI_IsActiveFlag_RXNE(SPI5))&&(tmp32<=1000))) {tmp32++;}//When rec. last data cycle w + 1508 .loc 1 2432 9 is_stmt 0 view .LVU479 1509 01d0 0023 movs r3, #0 1510 .LVL159: 1511 .L80: -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1512 .loc 1 2431 43 is_stmt 1 discriminator 1 view .LVU480 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1512 .loc 1 2433 43 is_stmt 1 discriminator 1 view .LVU480 1513 .LBB334: 1514 .LBI334: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8510,25 +8512,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1525 .loc 4 907 68 view .LVU485 1526 .LBE335: 1527 .LBE334: -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1528 .loc 1 2431 43 discriminator 2 view .LVU486 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1528 .loc 1 2433 43 discriminator 2 view .LVU486 1529 01dc B3F57A7F cmp r3, #1000 1530 01e0 01D8 bhi .L81 -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1531 .loc 1 2431 62 is_stmt 1 discriminator 3 view .LVU487 -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1532 .loc 1 2431 67 is_stmt 0 discriminator 3 view .LVU488 - ARM GAS /tmp/ccfIOqv2.s page 143 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1531 .loc 1 2433 62 is_stmt 1 discriminator 3 view .LVU487 + ARM GAS /tmp/ccyYWdjY.s page 143 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1532 .loc 1 2433 67 is_stmt 0 discriminator 3 view .LVU488 1533 01e2 0133 adds r3, r3, #1 1534 .LVL161: -2431:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC - 1535 .loc 1 2431 67 discriminator 3 view .LVU489 +2433:Src/main.c **** LL_SPI_Disable(SPI5);//Enable SPI for ThrLD2 ADC + 1535 .loc 1 2433 67 discriminator 3 view .LVU489 1536 01e4 F5E7 b .L80 1537 .L81: -2432:Src/main.c **** while(tmp32<500){tmp32++;} - 1538 .loc 1 2432 3 is_stmt 1 view .LVU490 +2434:Src/main.c **** while(tmp32<500){tmp32++;} + 1538 .loc 1 2434 3 is_stmt 1 view .LVU490 1539 .LVL162: 1540 .LBB336: 1541 .LBI336: @@ -8546,8 +8548,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1550 .loc 4 372 3 is_stmt 0 view .LVU493 1551 .LBE337: 1552 .LBE336: -2433:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1553 .loc 1 2433 3 is_stmt 1 view .LVU494 +2435:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1553 .loc 1 2435 3 is_stmt 1 view .LVU494 1554 .LBB339: 1555 .LBB338: 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** @@ -8558,29 +8560,29 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1559 .loc 4 373 1 view .LVU496 1560 .LBE338: 1561 .LBE339: -2433:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1562 .loc 1 2433 20 is_stmt 1 discriminator 2 view .LVU497 -2433:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1563 .loc 1 2433 25 is_stmt 0 discriminator 2 view .LVU498 +2435:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1562 .loc 1 2435 20 is_stmt 1 discriminator 2 view .LVU497 +2435:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1563 .loc 1 2435 25 is_stmt 0 discriminator 2 view .LVU498 1564 01f2 0133 adds r3, r3, #1 1565 .LVL164: 1566 .L83: -2433:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); - 1567 .loc 1 2433 14 is_stmt 1 discriminator 1 view .LVU499 +2435:Src/main.c **** //HAL_SPI_Receive(&hspi4, &P[0], 1, 100); + 1567 .loc 1 2435 14 is_stmt 1 discriminator 1 view .LVU499 1568 01f4 B3F5FA7F cmp r3, #500 1569 01f8 FBD3 bcc .L84 -2435:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); - 1570 .loc 1 2435 3 view .LVU500 +2437:Src/main.c **** P = LL_SPI_ReceiveData16(SPI5); + 1570 .loc 1 2437 3 view .LVU500 1571 01fa 0122 movs r2, #1 1572 01fc 4FF48061 mov r1, #1024 1573 0200 0448 ldr r0, .L87+4 1574 0202 FFF7FEFF bl HAL_GPIO_WritePin 1575 .LVL165: -2436:Src/main.c **** } - 1576 .loc 1 2436 3 view .LVU501 - ARM GAS /tmp/ccfIOqv2.s page 144 + ARM GAS /tmp/ccyYWdjY.s page 144 +2438:Src/main.c **** } + 1576 .loc 1 2438 3 view .LVU501 1577 .LBB340: 1578 .LBI340: 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -8613,193 +8615,193 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1606 .thumb_func 1608 Stop_TIM10: 1609 .LFB1223: -2601:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) -2602:Src/main.c **** { -2603:Src/main.c **** uint16_t cl_ind; -2604:Src/main.c **** -2605:Src/main.c **** switch (UART_header) -2606:Src/main.c **** { -2607:Src/main.c **** case 0x7777: -2608:Src/main.c **** cl_ind = TSK_16 - 2; -2609:Src/main.c **** break; -2610:Src/main.c **** case 0x1111: -2611:Src/main.c **** cl_ind = CL_16 - 2; -2612:Src/main.c **** break; -2613:Src/main.c **** default: -2614:Src/main.c **** return 0; -2615:Src/main.c **** break; -2616:Src/main.c **** } -2617:Src/main.c **** -2618:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); +2603:Src/main.c **** uint8_t CheckChecksum(uint16_t *pbuff) +2604:Src/main.c **** { +2605:Src/main.c **** uint16_t cl_ind; +2606:Src/main.c **** +2607:Src/main.c **** switch (UART_header) +2608:Src/main.c **** { +2609:Src/main.c **** case 0x7777: +2610:Src/main.c **** cl_ind = TSK_16 - 2; +2611:Src/main.c **** break; +2612:Src/main.c **** case 0x1111: +2613:Src/main.c **** cl_ind = CL_16 - 2; +2614:Src/main.c **** break; +2615:Src/main.c **** default: +2616:Src/main.c **** return 0; +2617:Src/main.c **** break; +2618:Src/main.c **** } 2619:Src/main.c **** -2620:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); -2621:Src/main.c **** } -2622:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) -2623:Src/main.c **** { -2624:Src/main.c **** short i; -2625:Src/main.c **** uint16_t cs = *pbuff; - ARM GAS /tmp/ccfIOqv2.s page 145 +2620:Src/main.c **** CS_result = CalculateChecksum(pbuff, cl_ind); +2621:Src/main.c **** +2622:Src/main.c **** return ((CS_result == COMMAND[cl_ind]) ? 1 : 0); +2623:Src/main.c **** } +2624:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) +2625:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 145 -2626:Src/main.c **** -2627:Src/main.c **** for(i = 1; i < len; i++) -2628:Src/main.c **** { -2629:Src/main.c **** cs ^= *(pbuff+i); -2630:Src/main.c **** } -2631:Src/main.c **** return cs; -2632:Src/main.c **** } -2633:Src/main.c **** -2634:Src/main.c **** /*int SD_Init(void) -2635:Src/main.c **** { -2636:Src/main.c **** int test=0; -2637:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2638:Src/main.c **** { -2639:Src/main.c **** test = Mount_SD("/"); -2640:Src/main.c **** if (test == 0) //0 - suc -2641:Src/main.c **** { -2642:Src/main.c **** //Format_SD(); -2643:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc -2644:Src/main.c **** //Create_File("FILE2.TXT"); -2645:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part -2646:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2647:Src/main.c **** return test; -2648:Src/main.c **** } -2649:Src/main.c **** else -2650:Src/main.c **** { -2651:Src/main.c **** return 1; -2652:Src/main.c **** } -2653:Src/main.c **** } -2654:Src/main.c **** else -2655:Src/main.c **** { -2656:Src/main.c **** return 1; -2657:Src/main.c **** } -2658:Src/main.c **** }*/ -2659:Src/main.c **** -2660:Src/main.c **** int SD_SAVE(uint16_t *pbuff) -2661:Src/main.c **** { -2662:Src/main.c **** int test=0; -2663:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2664:Src/main.c **** { -2665:Src/main.c **** test = Mount_SD("/"); -2666:Src/main.c **** if (test == 0) //0 - suc -2667:Src/main.c **** { -2668:Src/main.c **** //Format_SD(); -2669:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); -2670:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2671:Src/main.c **** return test; -2672:Src/main.c **** } -2673:Src/main.c **** else -2674:Src/main.c **** { -2675:Src/main.c **** return 1; -2676:Src/main.c **** } -2677:Src/main.c **** } -2678:Src/main.c **** else -2679:Src/main.c **** { -2680:Src/main.c **** return 1; -2681:Src/main.c **** } -2682:Src/main.c **** } - ARM GAS /tmp/ccfIOqv2.s page 146 +2626:Src/main.c **** short i; +2627:Src/main.c **** uint16_t cs = *pbuff; +2628:Src/main.c **** +2629:Src/main.c **** for(i = 1; i < len; i++) +2630:Src/main.c **** { +2631:Src/main.c **** cs ^= *(pbuff+i); +2632:Src/main.c **** } +2633:Src/main.c **** return cs; +2634:Src/main.c **** } +2635:Src/main.c **** +2636:Src/main.c **** /*int SD_Init(void) +2637:Src/main.c **** { +2638:Src/main.c **** int test=0; +2639:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +2640:Src/main.c **** { +2641:Src/main.c **** test = Mount_SD("/"); +2642:Src/main.c **** if (test == 0) //0 - suc +2643:Src/main.c **** { +2644:Src/main.c **** //Format_SD(); +2645:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc +2646:Src/main.c **** //Create_File("FILE2.TXT"); +2647:Src/main.c **** Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Viktor. Part +2648:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2649:Src/main.c **** return test; +2650:Src/main.c **** } +2651:Src/main.c **** else +2652:Src/main.c **** { +2653:Src/main.c **** return 1; +2654:Src/main.c **** } +2655:Src/main.c **** } +2656:Src/main.c **** else +2657:Src/main.c **** { +2658:Src/main.c **** return 1; +2659:Src/main.c **** } +2660:Src/main.c **** }*/ +2661:Src/main.c **** +2662:Src/main.c **** int SD_SAVE(uint16_t *pbuff) +2663:Src/main.c **** { +2664:Src/main.c **** int test=0; +2665:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) +2666:Src/main.c **** { +2667:Src/main.c **** test = Mount_SD("/"); +2668:Src/main.c **** if (test == 0) //0 - suc +2669:Src/main.c **** { +2670:Src/main.c **** //Format_SD(); +2671:Src/main.c **** test = Update_File_byte("FILE1.TXT", (uint8_t *)pbuff, DL_8); +2672:Src/main.c **** test = Unmount_SD("/"); // 0 - succ +2673:Src/main.c **** return test; +2674:Src/main.c **** } +2675:Src/main.c **** else +2676:Src/main.c **** { +2677:Src/main.c **** return 1; +2678:Src/main.c **** } +2679:Src/main.c **** } +2680:Src/main.c **** else +2681:Src/main.c **** { +2682:Src/main.c **** return 1; + ARM GAS /tmp/ccyYWdjY.s page 146 -2683:Src/main.c **** -2684:Src/main.c **** +2683:Src/main.c **** } +2684:Src/main.c **** } 2685:Src/main.c **** -2686:Src/main.c **** //uint32_t Get_Length(void) -2687:Src/main.c **** //{ -2688:Src/main.c **** // return SD_matr[0][0] + ((uint32_t) (SD_matr[0][1])<<16); -2689:Src/main.c **** //} -2690:Src/main.c **** -2691:Src/main.c **** int SD_READ(uint16_t *pbuff) -2692:Src/main.c **** { -2693:Src/main.c **** int test=0; -2694:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) -2695:Src/main.c **** { -2696:Src/main.c **** test = Mount_SD("/"); -2697:Src/main.c **** if (test == 0) //0 - suc -2698:Src/main.c **** { -2699:Src/main.c **** //Format_SD(); -2700:Src/main.c **** test = Seek_Read_File ("FILE1.TXT", (uint8_t *)pbuff, DL_8, fgoto);//Read next 246 bytes -2701:Src/main.c **** fgoto+=DL_8; -2702:Src/main.c **** test = Unmount_SD("/"); // 0 - succ -2703:Src/main.c **** return test; -2704:Src/main.c **** } -2705:Src/main.c **** else -2706:Src/main.c **** { -2707:Src/main.c **** return 1; -2708:Src/main.c **** } -2709:Src/main.c **** } -2710:Src/main.c **** else -2711:Src/main.c **** { -2712:Src/main.c **** return 1; -2713:Src/main.c **** } -2714:Src/main.c **** -2715:Src/main.c **** /* for (uint16_t j = 0; j < DL_16; j++) -2716:Src/main.c **** { -2717:Src/main.c **** *(pbuff+j) = SD_matr[SD_SLIDE][j]; -2718:Src/main.c **** } -2719:Src/main.c **** if (SD_SLIDEAHB1RSTR, Periphs); 526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } - ARM GAS /tmp/ccfIOqv2.s page 164 - - 527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 528:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 529:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB1 peripheral clocks in low-power mode @@ -9836,11 +9838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMAC (*) 580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACTX (*) 581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACRX (*) + ARM GAS /tmp/ccyYWdjY.s page 165 + + 582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_ETHMACPTP (*) 583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHS - ARM GAS /tmp/ccfIOqv2.s page 165 - - 584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_OTGHSULPI 585:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 586:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. @@ -9896,11 +9898,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOI 637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOJ (*) 638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_GPIOK (*) + ARM GAS /tmp/ccyYWdjY.s page 166 + + 639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_CRC 640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_AXI - ARM GAS /tmp/ccfIOqv2.s page 166 - - 641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_FLITF 642:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM1 643:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB1_GRP1_PERIPH_SRAM2 @@ -9956,11 +9958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_AHB2_GRP1_EnableClock(uint32_t Periphs) 694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __IO uint32_t tmpreg; + ARM GAS /tmp/ccyYWdjY.s page 167 + + 696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->AHB2ENR, Periphs); 697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ - ARM GAS /tmp/ccfIOqv2.s page 167 - - 698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** tmpreg = READ_BIT(RCC->AHB2ENR, Periphs); 699:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 700:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } @@ -10016,11 +10018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB2ENR, Periphs); 752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } + ARM GAS /tmp/ccyYWdjY.s page 168 + + 753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 168 - - 755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB2 peripherals reset. 756:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2RSTR DCMIRST LL_AHB2_GRP1_ForceReset\n 757:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2RSTR JPEGRST LL_AHB2_GRP1_ForceReset\n @@ -10076,11 +10078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Enable AHB2 peripheral clocks in low-power mode + ARM GAS /tmp/ccyYWdjY.s page 169 + + 810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB2LPENR DCMILPEN LL_AHB2_GRP1_EnableClockLowPower\n 811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR JPEGLPEN LL_AHB2_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccfIOqv2.s page 169 - - 812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR CRYPLPEN LL_AHB2_GRP1_EnableClockLowPower\n 813:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR AESLPEN LL_AHB2_GRP1_EnableClockLowPower\n 814:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB2LPENR HASHLPEN LL_AHB2_GRP1_EnableClockLowPower\n @@ -10136,11 +10138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @} 866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 170 + + 867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** 868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** @defgroup BUS_LL_EF_AHB3 AHB3 - ARM GAS /tmp/ccfIOqv2.s page 170 - - 869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @{ 870:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 871:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** @@ -10196,11 +10198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** CLEAR_BIT(RCC->AHB3ENR, Periphs); 922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** + ARM GAS /tmp/ccyYWdjY.s page 171 + + 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Force AHB3 peripherals reset. - ARM GAS /tmp/ccfIOqv2.s page 171 - - 926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3RSTR FMCRST LL_AHB3_GRP1_ForceReset\n 927:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3RSTR QSPIRST LL_AHB3_GRP1_ForceReset 928:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: @@ -10256,11 +10258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable AHB3 peripheral clocks in low-power mode 980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll AHB3LPENR FMCLPEN LL_AHB3_GRP1_DisableClockLowPower\n + ARM GAS /tmp/ccyYWdjY.s page 172 + + 981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * AHB3LPENR QSPILPEN LL_AHB3_GRP1_DisableClockLowPower 982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: - ARM GAS /tmp/ccfIOqv2.s page 172 - - 983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_FMC (*) 984:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_AHB3_GRP1_PERIPH_QSPI 985:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @@ -10316,11 +10318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @param Periphs This parameter can be a combination of the following values: 1036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM2 1037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM3 + ARM GAS /tmp/ccyYWdjY.s page 173 + + 1038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 1039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 - ARM GAS /tmp/ccfIOqv2.s page 173 - - 1040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 1041:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1042:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 @@ -10376,11 +10378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR WWDGEN LL_APB1_GRP1_IsEnabledClock\n 1093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI2EN LL_APB1_GRP1_IsEnabledClock\n 1094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPI3EN LL_APB1_GRP1_IsEnabledClock\n + ARM GAS /tmp/ccyYWdjY.s page 174 + + 1095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR SPDIFRXEN LL_APB1_GRP1_IsEnabledClock\n 1096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART2EN LL_APB1_GRP1_IsEnabledClock\n - ARM GAS /tmp/ccfIOqv2.s page 174 - - 1097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR USART3EN LL_APB1_GRP1_IsEnabledClock\n 1098:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART4EN LL_APB1_GRP1_IsEnabledClock\n 1099:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1ENR UART5EN LL_APB1_GRP1_IsEnabledClock\n @@ -10436,11 +10438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE uint32_t LL_APB1_GRP1_IsEnabledClock(uint32_t Periphs) 1150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 1151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** return (READ_BIT(RCC->APB1ENR, Periphs) == Periphs); + ARM GAS /tmp/ccyYWdjY.s page 175 + + 1152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 1153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** - ARM GAS /tmp/ccfIOqv2.s page 175 - - 1154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /** 1155:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @brief Disable APB1 peripherals clock. 1156:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @rmtoll APB1ENR TIM2EN LL_APB1_GRP1_DisableClock\n @@ -10496,11 +10498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C1 1207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C2 1208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C3 + ARM GAS /tmp/ccyYWdjY.s page 176 + + 1209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_I2C4 (*) 1210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN1 - ARM GAS /tmp/ccfIOqv2.s page 176 - - 1211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN2 (*) 1212:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CAN3 (*) 1213:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_CEC (*) @@ -10556,11 +10558,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM4 1264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM5 1265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM6 + ARM GAS /tmp/ccyYWdjY.s page 177 + + 1266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM7 1267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM12 - ARM GAS /tmp/ccfIOqv2.s page 177 - - 1268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1269:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1270:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 @@ -10616,11 +10618,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C1RST LL_APB1_GRP1_ReleaseReset\n 1321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C2RST LL_APB1_GRP1_ReleaseReset\n 1322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C3RST LL_APB1_GRP1_ReleaseReset\n + ARM GAS /tmp/ccyYWdjY.s page 178 + + 1323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR I2C4RST LL_APB1_GRP1_ReleaseReset\n 1324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN1RST LL_APB1_GRP1_ReleaseReset\n - ARM GAS /tmp/ccfIOqv2.s page 178 - - 1325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN2RST LL_APB1_GRP1_ReleaseReset\n 1326:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CAN3RST LL_APB1_GRP1_ReleaseReset\n 1327:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1RSTR CECRST LL_APB1_GRP1_ReleaseReset\n @@ -10676,11 +10678,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM5LPEN LL_APB1_GRP1_EnableClockLowPower\n 1378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM6LPEN LL_APB1_GRP1_EnableClockLowPower\n 1379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM7LPEN LL_APB1_GRP1_EnableClockLowPower\n + ARM GAS /tmp/ccyYWdjY.s page 179 + + 1380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM12LPEN LL_APB1_GRP1_EnableClockLowPower\n 1381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM13LPEN LL_APB1_GRP1_EnableClockLowPower\n - ARM GAS /tmp/ccfIOqv2.s page 179 - - 1382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR TIM14LPEN LL_APB1_GRP1_EnableClockLowPower\n 1383:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR LPTIM1LPEN LL_APB1_GRP1_EnableClockLowPower\n 1384:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB1LPENR WWDGLPEN LL_APB1_GRP1_EnableClockLowPower\n @@ -10736,11 +10738,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART7 1435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_UART8 1436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_RTCAPB (*) + ARM GAS /tmp/ccyYWdjY.s page 180 + + 1437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * 1438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * (*) value not defined in all devices. - ARM GAS /tmp/ccfIOqv2.s page 180 - - 1439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @retval None 1440:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** */ 1441:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** __STATIC_INLINE void LL_APB1_GRP1_EnableClockLowPower(uint32_t Periphs) @@ -10796,11 +10798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM13 1492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_TIM14 1493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_LPTIM1 + ARM GAS /tmp/ccyYWdjY.s page 181 + + 1494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_WWDG 1495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI2 - ARM GAS /tmp/ccfIOqv2.s page 181 - - 1496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPI3 1497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_SPDIFRX (*) 1498:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * @arg @ref LL_APB1_GRP1_PERIPH_USART2 @@ -10856,11 +10858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR TIM11EN LL_APB2_GRP1_EnableClock\n 1549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI5EN LL_APB2_GRP1_EnableClock\n 1550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SPI6EN LL_APB2_GRP1_EnableClock\n + ARM GAS /tmp/ccyYWdjY.s page 182 + + 1551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI1EN LL_APB2_GRP1_EnableClock\n 1552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR SAI2EN LL_APB2_GRP1_EnableClock\n - ARM GAS /tmp/ccfIOqv2.s page 182 - - 1553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR LTDCEN LL_APB2_GRP1_EnableClock\n 1554:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DSIEN LL_APB2_GRP1_EnableClock\n 1555:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** * APB2ENR DFSDM1EN LL_APB2_GRP1_EnableClock\n @@ -10916,17 +10918,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2165 .loc 3 1592 10 view .LVU696 2166 002e 0192 str r2, [sp, #4] 1593:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccyYWdjY.s page 183 + + 2167 .loc 3 1593 3 is_stmt 1 view .LVU697 2168 0030 019A ldr r2, [sp, #4] - ARM GAS /tmp/ccfIOqv2.s page 183 - - 2169 .LVL193: 2170 .loc 3 1593 3 is_stmt 0 view .LVU698 2171 .LBE351: 2172 .LBE350: -1100:Src/main.c **** /**SPI4 GPIO Configuration - 2173 .loc 1 1100 3 is_stmt 1 view .LVU699 +1102:Src/main.c **** /**SPI4 GPIO Configuration + 2173 .loc 1 1102 3 is_stmt 1 view .LVU699 2174 .LBB352: 2175 .LBI352: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -10956,152 +10958,152 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2192 .loc 3 315 3 is_stmt 0 view .LVU707 2193 .LBE353: 2194 .LBE352: -1105:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2195 .loc 1 1105 3 is_stmt 1 view .LVU708 -1105:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2196 .loc 1 1105 23 is_stmt 0 view .LVU709 +1107:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2195 .loc 1 1107 3 is_stmt 1 view .LVU708 +1107:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2196 .loc 1 1107 23 is_stmt 0 view .LVU709 2197 0044 4FF48053 mov r3, #4096 2198 0048 0293 str r3, [sp, #8] -1106:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2199 .loc 1 1106 3 is_stmt 1 view .LVU710 -1106:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2200 .loc 1 1106 24 is_stmt 0 view .LVU711 +1108:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2199 .loc 1 1108 3 is_stmt 1 view .LVU710 +1108:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2200 .loc 1 1108 24 is_stmt 0 view .LVU711 2201 004a 0225 movs r5, #2 2202 004c 0395 str r5, [sp, #12] -1107:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2203 .loc 1 1107 3 is_stmt 1 view .LVU712 -1107:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2204 .loc 1 1107 25 is_stmt 0 view .LVU713 +1109:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2203 .loc 1 1109 3 is_stmt 1 view .LVU712 +1109:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2204 .loc 1 1109 25 is_stmt 0 view .LVU713 2205 004e 4FF00308 mov r8, #3 2206 0052 CDF81080 str r8, [sp, #16] -1108:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2207 .loc 1 1108 3 is_stmt 1 view .LVU714 -1109:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2208 .loc 1 1109 3 view .LVU715 - ARM GAS /tmp/ccfIOqv2.s page 184 +1110:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2207 .loc 1 1110 3 is_stmt 1 view .LVU714 + ARM GAS /tmp/ccyYWdjY.s page 184 -1110:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2209 .loc 1 1110 3 view .LVU716 -1110:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2210 .loc 1 1110 29 is_stmt 0 view .LVU717 +1111:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2208 .loc 1 1111 3 view .LVU715 +1112:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2209 .loc 1 1112 3 view .LVU716 +1112:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2210 .loc 1 1112 29 is_stmt 0 view .LVU717 2211 0056 0527 movs r7, #5 2212 0058 0797 str r7, [sp, #28] -1111:Src/main.c **** - 2213 .loc 1 1111 3 is_stmt 1 view .LVU718 +1113:Src/main.c **** + 2213 .loc 1 1113 3 is_stmt 1 view .LVU718 2214 005a 1C4E ldr r6, .L99+4 2215 005c 02A9 add r1, sp, #8 2216 005e 3046 mov r0, r6 2217 0060 FFF7FEFF bl LL_GPIO_Init 2218 .LVL195: -1113:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2219 .loc 1 1113 3 view .LVU719 -1113:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2220 .loc 1 1113 23 is_stmt 0 view .LVU720 +1115:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2219 .loc 1 1115 3 view .LVU719 +1115:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2220 .loc 1 1115 23 is_stmt 0 view .LVU720 2221 0064 4FF40053 mov r3, #8192 2222 0068 0293 str r3, [sp, #8] -1114:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2223 .loc 1 1114 3 is_stmt 1 view .LVU721 -1114:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2224 .loc 1 1114 24 is_stmt 0 view .LVU722 +1116:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2223 .loc 1 1116 3 is_stmt 1 view .LVU721 +1116:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2224 .loc 1 1116 24 is_stmt 0 view .LVU722 2225 006a 0395 str r5, [sp, #12] -1115:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2226 .loc 1 1115 3 is_stmt 1 view .LVU723 -1115:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2227 .loc 1 1115 25 is_stmt 0 view .LVU724 +1117:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2226 .loc 1 1117 3 is_stmt 1 view .LVU723 +1117:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2227 .loc 1 1117 25 is_stmt 0 view .LVU724 2228 006c CDF81080 str r8, [sp, #16] -1116:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2229 .loc 1 1116 3 is_stmt 1 view .LVU725 -1116:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2230 .loc 1 1116 30 is_stmt 0 view .LVU726 +1118:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2229 .loc 1 1118 3 is_stmt 1 view .LVU725 +1118:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2230 .loc 1 1118 30 is_stmt 0 view .LVU726 2231 0070 0594 str r4, [sp, #20] -1117:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2232 .loc 1 1117 3 is_stmt 1 view .LVU727 -1117:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2233 .loc 1 1117 24 is_stmt 0 view .LVU728 +1119:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2232 .loc 1 1119 3 is_stmt 1 view .LVU727 +1119:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2233 .loc 1 1119 24 is_stmt 0 view .LVU728 2234 0072 0694 str r4, [sp, #24] -1118:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2235 .loc 1 1118 3 is_stmt 1 view .LVU729 -1118:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); - 2236 .loc 1 1118 29 is_stmt 0 view .LVU730 +1120:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2235 .loc 1 1120 3 is_stmt 1 view .LVU729 +1120:Src/main.c **** LL_GPIO_Init(GPIOE, &GPIO_InitStruct); + 2236 .loc 1 1120 29 is_stmt 0 view .LVU730 2237 0074 0797 str r7, [sp, #28] -1119:Src/main.c **** - 2238 .loc 1 1119 3 is_stmt 1 view .LVU731 +1121:Src/main.c **** + 2238 .loc 1 1121 3 is_stmt 1 view .LVU731 2239 0076 02A9 add r1, sp, #8 2240 0078 3046 mov r0, r6 2241 007a FFF7FEFF bl LL_GPIO_Init 2242 .LVL196: -1125:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2243 .loc 1 1125 3 view .LVU732 -1125:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2244 .loc 1 1125 36 is_stmt 0 view .LVU733 +1127:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2243 .loc 1 1127 3 view .LVU732 +1127:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2244 .loc 1 1127 36 is_stmt 0 view .LVU733 2245 007e 4FF48063 mov r3, #1024 + ARM GAS /tmp/ccyYWdjY.s page 185 + + 2246 0082 0893 str r3, [sp, #32] -1126:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - ARM GAS /tmp/ccfIOqv2.s page 185 - - - 2247 .loc 1 1126 3 is_stmt 1 view .LVU734 -1126:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2248 .loc 1 1126 23 is_stmt 0 view .LVU735 +1128:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2247 .loc 1 1128 3 is_stmt 1 view .LVU734 +1128:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2248 .loc 1 1128 23 is_stmt 0 view .LVU735 2249 0084 4FF48273 mov r3, #260 2250 0088 0993 str r3, [sp, #36] -1127:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2251 .loc 1 1127 3 is_stmt 1 view .LVU736 -1127:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2252 .loc 1 1127 28 is_stmt 0 view .LVU737 +1129:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2251 .loc 1 1129 3 is_stmt 1 view .LVU736 +1129:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2252 .loc 1 1129 28 is_stmt 0 view .LVU737 2253 008a 4FF47063 mov r3, #3840 2254 008e 0A93 str r3, [sp, #40] -1128:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2255 .loc 1 1128 3 is_stmt 1 view .LVU738 -1128:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2256 .loc 1 1128 32 is_stmt 0 view .LVU739 +1130:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2255 .loc 1 1130 3 is_stmt 1 view .LVU738 +1130:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2256 .loc 1 1130 32 is_stmt 0 view .LVU739 2257 0090 0B95 str r5, [sp, #44] -1129:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2258 .loc 1 1129 3 is_stmt 1 view .LVU740 -1129:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2259 .loc 1 1129 29 is_stmt 0 view .LVU741 +1131:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2258 .loc 1 1131 3 is_stmt 1 view .LVU740 +1131:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2259 .loc 1 1131 29 is_stmt 0 view .LVU741 2260 0092 0C94 str r4, [sp, #48] -1130:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2261 .loc 1 1130 3 is_stmt 1 view .LVU742 -1130:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2262 .loc 1 1130 22 is_stmt 0 view .LVU743 +1132:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2261 .loc 1 1132 3 is_stmt 1 view .LVU742 +1132:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2262 .loc 1 1132 22 is_stmt 0 view .LVU743 2263 0094 4FF40073 mov r3, #512 2264 0098 0D93 str r3, [sp, #52] -1131:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2265 .loc 1 1131 3 is_stmt 1 view .LVU744 -1131:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2266 .loc 1 1131 27 is_stmt 0 view .LVU745 +1133:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2265 .loc 1 1133 3 is_stmt 1 view .LVU744 +1133:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2266 .loc 1 1133 27 is_stmt 0 view .LVU745 2267 009a 1823 movs r3, #24 2268 009c 0E93 str r3, [sp, #56] -1132:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2269 .loc 1 1132 3 is_stmt 1 view .LVU746 -1132:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2270 .loc 1 1132 27 is_stmt 0 view .LVU747 +1134:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2269 .loc 1 1134 3 is_stmt 1 view .LVU746 +1134:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2270 .loc 1 1134 27 is_stmt 0 view .LVU747 2271 009e 0F94 str r4, [sp, #60] -1133:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2272 .loc 1 1133 3 is_stmt 1 view .LVU748 -1133:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2273 .loc 1 1133 33 is_stmt 0 view .LVU749 +1135:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2272 .loc 1 1135 3 is_stmt 1 view .LVU748 +1135:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2273 .loc 1 1135 33 is_stmt 0 view .LVU749 2274 00a0 1094 str r4, [sp, #64] -1134:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2275 .loc 1 1134 3 is_stmt 1 view .LVU750 -1134:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); - 2276 .loc 1 1134 26 is_stmt 0 view .LVU751 +1136:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 2275 .loc 1 1136 3 is_stmt 1 view .LVU750 +1136:Src/main.c **** LL_SPI_Init(SPI4, &SPI_InitStruct); + 2276 .loc 1 1136 26 is_stmt 0 view .LVU751 2277 00a2 0723 movs r3, #7 2278 00a4 1193 str r3, [sp, #68] -1135:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); - 2279 .loc 1 1135 3 is_stmt 1 view .LVU752 +1137:Src/main.c **** LL_SPI_SetStandard(SPI4, LL_SPI_PROTOCOL_MOTOROLA); + 2279 .loc 1 1137 3 is_stmt 1 view .LVU752 2280 00a6 0A4C ldr r4, .L99+8 2281 00a8 08A9 add r1, sp, #32 2282 00aa 2046 mov r0, r4 2283 00ac FFF7FEFF bl LL_SPI_Init + ARM GAS /tmp/ccyYWdjY.s page 186 + + 2284 .LVL197: -1136:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); - ARM GAS /tmp/ccfIOqv2.s page 186 - - - 2285 .loc 1 1136 3 view .LVU753 +1138:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI4); + 2285 .loc 1 1138 3 view .LVU753 2286 .LBB354: 2287 .LBI354: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11117,8 +11119,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2295 .loc 4 428 3 is_stmt 0 view .LVU756 2296 .LBE355: 2297 .LBE354: -1137:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ - 2298 .loc 1 1137 3 is_stmt 1 view .LVU757 +1139:Src/main.c **** /* USER CODE BEGIN SPI4_Init 2 */ + 2298 .loc 1 1139 3 is_stmt 1 view .LVU757 2299 .LBB356: 2300 .LBI356: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11134,8 +11136,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2308 .loc 4 876 3 is_stmt 0 view .LVU760 2309 .LBE357: 2310 .LBE356: -1142:Src/main.c **** - 2311 .loc 1 1142 1 view .LVU761 +1144:Src/main.c **** + 2311 .loc 1 1144 1 view .LVU761 2312 00c0 12B0 add sp, sp, #72 2313 .LCFI17: 2314 .cfi_def_cfa_offset 24 @@ -11156,11 +11158,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2330 .thumb_func 2332 MX_SPI2_Init: 2333 .LFB1191: -1024:Src/main.c **** - 2334 .loc 1 1024 1 is_stmt 1 view -0 - ARM GAS /tmp/ccfIOqv2.s page 187 + ARM GAS /tmp/ccyYWdjY.s page 187 +1026:Src/main.c **** + 2334 .loc 1 1026 1 is_stmt 1 view -0 2335 .cfi_startproc 2336 @ args = 0, pretend = 0, frame = 72 2337 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11176,19 +11178,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2347 0004 92B0 sub sp, sp, #72 2348 .LCFI19: 2349 .cfi_def_cfa_offset 96 -1030:Src/main.c **** - 2350 .loc 1 1030 3 view .LVU763 -1030:Src/main.c **** - 2351 .loc 1 1030 22 is_stmt 0 view .LVU764 +1032:Src/main.c **** + 2350 .loc 1 1032 3 view .LVU763 +1032:Src/main.c **** + 2351 .loc 1 1032 22 is_stmt 0 view .LVU764 2352 0006 2822 movs r2, #40 2353 0008 0021 movs r1, #0 2354 000a 08A8 add r0, sp, #32 2355 000c FFF7FEFF bl memset 2356 .LVL200: -1032:Src/main.c **** - 2357 .loc 1 1032 3 is_stmt 1 view .LVU765 -1032:Src/main.c **** - 2358 .loc 1 1032 23 is_stmt 0 view .LVU766 +1034:Src/main.c **** + 2357 .loc 1 1034 3 is_stmt 1 view .LVU765 +1034:Src/main.c **** + 2358 .loc 1 1034 23 is_stmt 0 view .LVU766 2359 0010 0024 movs r4, #0 2360 0012 0294 str r4, [sp, #8] 2361 0014 0394 str r4, [sp, #12] @@ -11196,8 +11198,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2363 0018 0594 str r4, [sp, #20] 2364 001a 0694 str r4, [sp, #24] 2365 001c 0794 str r4, [sp, #28] -1035:Src/main.c **** - 2366 .loc 1 1035 3 is_stmt 1 view .LVU767 +1037:Src/main.c **** + 2366 .loc 1 1037 3 is_stmt 1 view .LVU767 2367 .LVL201: 2368 .LBB358: 2369 .LBI358: @@ -11216,11 +11218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2378 .loc 3 1076 3 view .LVU771 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2379 .loc 3 1076 12 is_stmt 0 view .LVU772 + ARM GAS /tmp/ccyYWdjY.s page 188 + + 2380 0028 1A6C ldr r2, [r3, #64] 2381 002a 02F48042 and r2, r2, #16384 - ARM GAS /tmp/ccfIOqv2.s page 188 - - 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2382 .loc 3 1076 10 view .LVU773 2383 002e 0192 str r2, [sp, #4] @@ -11232,8 +11234,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2387 .loc 3 1077 3 is_stmt 0 view .LVU775 2388 .LBE359: 2389 .LBE358: -1037:Src/main.c **** /**SPI2 GPIO Configuration - 2390 .loc 1 1037 3 is_stmt 1 view .LVU776 +1039:Src/main.c **** /**SPI2 GPIO Configuration + 2390 .loc 1 1039 3 is_stmt 1 view .LVU776 2391 .LBB360: 2392 .LBI360: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11263,152 +11265,152 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2409 .loc 3 315 3 is_stmt 0 view .LVU784 2410 .LBE361: 2411 .LBE360: -1042:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2412 .loc 1 1042 3 is_stmt 1 view .LVU785 -1042:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2413 .loc 1 1042 23 is_stmt 0 view .LVU786 +1044:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2412 .loc 1 1044 3 is_stmt 1 view .LVU785 +1044:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2413 .loc 1 1044 23 is_stmt 0 view .LVU786 2414 0044 4FF40053 mov r3, #8192 2415 0048 0293 str r3, [sp, #8] -1043:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2416 .loc 1 1043 3 is_stmt 1 view .LVU787 -1043:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2417 .loc 1 1043 24 is_stmt 0 view .LVU788 +1045:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2416 .loc 1 1045 3 is_stmt 1 view .LVU787 +1045:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2417 .loc 1 1045 24 is_stmt 0 view .LVU788 2418 004a 0225 movs r5, #2 2419 004c 0395 str r5, [sp, #12] -1044:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2420 .loc 1 1044 3 is_stmt 1 view .LVU789 -1044:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - ARM GAS /tmp/ccfIOqv2.s page 189 +1046:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + ARM GAS /tmp/ccyYWdjY.s page 189 - 2421 .loc 1 1044 25 is_stmt 0 view .LVU790 + 2420 .loc 1 1046 3 is_stmt 1 view .LVU789 +1046:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2421 .loc 1 1046 25 is_stmt 0 view .LVU790 2422 004e 4FF00308 mov r8, #3 2423 0052 CDF81080 str r8, [sp, #16] -1045:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2424 .loc 1 1045 3 is_stmt 1 view .LVU791 -1046:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2425 .loc 1 1046 3 view .LVU792 -1047:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2426 .loc 1 1047 3 view .LVU793 -1047:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2427 .loc 1 1047 29 is_stmt 0 view .LVU794 +1047:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2424 .loc 1 1047 3 is_stmt 1 view .LVU791 +1048:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2425 .loc 1 1048 3 view .LVU792 +1049:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2426 .loc 1 1049 3 view .LVU793 +1049:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2427 .loc 1 1049 29 is_stmt 0 view .LVU794 2428 0056 0527 movs r7, #5 2429 0058 0797 str r7, [sp, #28] -1048:Src/main.c **** - 2430 .loc 1 1048 3 is_stmt 1 view .LVU795 +1050:Src/main.c **** + 2430 .loc 1 1050 3 is_stmt 1 view .LVU795 2431 005a 1B4E ldr r6, .L103+4 2432 005c 02A9 add r1, sp, #8 2433 005e 3046 mov r0, r6 2434 0060 FFF7FEFF bl LL_GPIO_Init 2435 .LVL204: -1050:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2436 .loc 1 1050 3 view .LVU796 -1050:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2437 .loc 1 1050 23 is_stmt 0 view .LVU797 +1052:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2436 .loc 1 1052 3 view .LVU796 +1052:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2437 .loc 1 1052 23 is_stmt 0 view .LVU797 2438 0064 4FF40043 mov r3, #32768 2439 0068 0293 str r3, [sp, #8] -1051:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2440 .loc 1 1051 3 is_stmt 1 view .LVU798 -1051:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2441 .loc 1 1051 24 is_stmt 0 view .LVU799 +1053:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2440 .loc 1 1053 3 is_stmt 1 view .LVU798 +1053:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2441 .loc 1 1053 24 is_stmt 0 view .LVU799 2442 006a 0395 str r5, [sp, #12] -1052:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2443 .loc 1 1052 3 is_stmt 1 view .LVU800 -1052:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2444 .loc 1 1052 25 is_stmt 0 view .LVU801 +1054:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2443 .loc 1 1054 3 is_stmt 1 view .LVU800 +1054:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2444 .loc 1 1054 25 is_stmt 0 view .LVU801 2445 006c CDF81080 str r8, [sp, #16] -1053:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2446 .loc 1 1053 3 is_stmt 1 view .LVU802 -1053:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2447 .loc 1 1053 30 is_stmt 0 view .LVU803 +1055:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2446 .loc 1 1055 3 is_stmt 1 view .LVU802 +1055:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2447 .loc 1 1055 30 is_stmt 0 view .LVU803 2448 0070 0594 str r4, [sp, #20] -1054:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2449 .loc 1 1054 3 is_stmt 1 view .LVU804 -1054:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2450 .loc 1 1054 24 is_stmt 0 view .LVU805 +1056:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2449 .loc 1 1056 3 is_stmt 1 view .LVU804 +1056:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2450 .loc 1 1056 24 is_stmt 0 view .LVU805 2451 0072 0694 str r4, [sp, #24] -1055:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2452 .loc 1 1055 3 is_stmt 1 view .LVU806 -1055:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); - 2453 .loc 1 1055 29 is_stmt 0 view .LVU807 +1057:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2452 .loc 1 1057 3 is_stmt 1 view .LVU806 +1057:Src/main.c **** LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + 2453 .loc 1 1057 29 is_stmt 0 view .LVU807 2454 0074 0797 str r7, [sp, #28] -1056:Src/main.c **** - 2455 .loc 1 1056 3 is_stmt 1 view .LVU808 +1058:Src/main.c **** + 2455 .loc 1 1058 3 is_stmt 1 view .LVU808 2456 0076 02A9 add r1, sp, #8 2457 0078 3046 mov r0, r6 + ARM GAS /tmp/ccyYWdjY.s page 190 + + 2458 007a FFF7FEFF bl LL_GPIO_Init 2459 .LVL205: - ARM GAS /tmp/ccfIOqv2.s page 190 - - -1062:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2460 .loc 1 1062 3 view .LVU809 -1062:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2461 .loc 1 1062 36 is_stmt 0 view .LVU810 +1064:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2460 .loc 1 1064 3 view .LVU809 +1064:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2461 .loc 1 1064 36 is_stmt 0 view .LVU810 2462 007e 0894 str r4, [sp, #32] -1063:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2463 .loc 1 1063 3 is_stmt 1 view .LVU811 -1063:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2464 .loc 1 1063 23 is_stmt 0 view .LVU812 +1065:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2463 .loc 1 1065 3 is_stmt 1 view .LVU811 +1065:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2464 .loc 1 1065 23 is_stmt 0 view .LVU812 2465 0080 4FF48273 mov r3, #260 2466 0084 0993 str r3, [sp, #36] -1064:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2467 .loc 1 1064 3 is_stmt 1 view .LVU813 -1064:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2468 .loc 1 1064 28 is_stmt 0 view .LVU814 +1066:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2467 .loc 1 1066 3 is_stmt 1 view .LVU813 +1066:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2468 .loc 1 1066 28 is_stmt 0 view .LVU814 2469 0086 4FF47063 mov r3, #3840 2470 008a 0A93 str r3, [sp, #40] -1065:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2471 .loc 1 1065 3 is_stmt 1 view .LVU815 -1065:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2472 .loc 1 1065 32 is_stmt 0 view .LVU816 +1067:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2471 .loc 1 1067 3 is_stmt 1 view .LVU815 +1067:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2472 .loc 1 1067 32 is_stmt 0 view .LVU816 2473 008c 0B95 str r5, [sp, #44] -1066:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2474 .loc 1 1066 3 is_stmt 1 view .LVU817 -1066:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2475 .loc 1 1066 29 is_stmt 0 view .LVU818 +1068:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2474 .loc 1 1068 3 is_stmt 1 view .LVU817 +1068:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2475 .loc 1 1068 29 is_stmt 0 view .LVU818 2476 008e 0123 movs r3, #1 2477 0090 0C93 str r3, [sp, #48] -1067:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2478 .loc 1 1067 3 is_stmt 1 view .LVU819 -1067:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; - 2479 .loc 1 1067 22 is_stmt 0 view .LVU820 +1069:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 2478 .loc 1 1069 3 is_stmt 1 view .LVU819 +1069:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV8; + 2479 .loc 1 1069 22 is_stmt 0 view .LVU820 2480 0092 4FF40073 mov r3, #512 2481 0096 0D93 str r3, [sp, #52] -1068:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2482 .loc 1 1068 3 is_stmt 1 view .LVU821 -1068:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2483 .loc 1 1068 27 is_stmt 0 view .LVU822 +1070:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2482 .loc 1 1070 3 is_stmt 1 view .LVU821 +1070:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2483 .loc 1 1070 27 is_stmt 0 view .LVU822 2484 0098 1023 movs r3, #16 2485 009a 0E93 str r3, [sp, #56] -1069:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2486 .loc 1 1069 3 is_stmt 1 view .LVU823 -1069:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2487 .loc 1 1069 27 is_stmt 0 view .LVU824 +1071:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2486 .loc 1 1071 3 is_stmt 1 view .LVU823 +1071:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2487 .loc 1 1071 27 is_stmt 0 view .LVU824 2488 009c 0F94 str r4, [sp, #60] -1070:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2489 .loc 1 1070 3 is_stmt 1 view .LVU825 -1070:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2490 .loc 1 1070 33 is_stmt 0 view .LVU826 +1072:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2489 .loc 1 1072 3 is_stmt 1 view .LVU825 +1072:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2490 .loc 1 1072 33 is_stmt 0 view .LVU826 2491 009e 1094 str r4, [sp, #64] -1071:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2492 .loc 1 1071 3 is_stmt 1 view .LVU827 -1071:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); - 2493 .loc 1 1071 26 is_stmt 0 view .LVU828 +1073:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 2492 .loc 1 1073 3 is_stmt 1 view .LVU827 +1073:Src/main.c **** LL_SPI_Init(SPI2, &SPI_InitStruct); + 2493 .loc 1 1073 26 is_stmt 0 view .LVU828 2494 00a0 0723 movs r3, #7 + ARM GAS /tmp/ccyYWdjY.s page 191 + + 2495 00a2 1193 str r3, [sp, #68] -1072:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); - ARM GAS /tmp/ccfIOqv2.s page 191 - - - 2496 .loc 1 1072 3 is_stmt 1 view .LVU829 +1074:Src/main.c **** LL_SPI_SetStandard(SPI2, LL_SPI_PROTOCOL_MOTOROLA); + 2496 .loc 1 1074 3 is_stmt 1 view .LVU829 2497 00a4 094C ldr r4, .L103+8 2498 00a6 08A9 add r1, sp, #32 2499 00a8 2046 mov r0, r4 2500 00aa FFF7FEFF bl LL_SPI_Init 2501 .LVL206: -1073:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); - 2502 .loc 1 1073 3 view .LVU830 +1075:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI2); + 2502 .loc 1 1075 3 view .LVU830 2503 .LBB362: 2504 .LBI362: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11424,8 +11426,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2512 .loc 4 428 3 is_stmt 0 view .LVU833 2513 .LBE363: 2514 .LBE362: -1074:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ - 2515 .loc 1 1074 3 is_stmt 1 view .LVU834 +1076:Src/main.c **** /* USER CODE BEGIN SPI2_Init 2 */ + 2515 .loc 1 1076 3 is_stmt 1 view .LVU834 2516 .LBB364: 2517 .LBI364: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11441,8 +11443,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2525 .loc 4 876 3 is_stmt 0 view .LVU837 2526 .LBE365: 2527 .LBE364: -1079:Src/main.c **** - 2528 .loc 1 1079 1 view .LVU838 +1081:Src/main.c **** + 2528 .loc 1 1081 1 view .LVU838 2529 00be 12B0 add sp, sp, #72 2530 .LCFI20: 2531 .cfi_def_cfa_offset 24 @@ -11456,18 +11458,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2539 00cc 00380040 .word 1073756160 2540 .cfi_endproc 2541 .LFE1191: + ARM GAS /tmp/ccyYWdjY.s page 192 + + 2543 .section .text.MX_SPI5_Init,"ax",%progbits 2544 .align 1 - ARM GAS /tmp/ccfIOqv2.s page 192 - - 2545 .syntax unified 2546 .thumb 2547 .thumb_func 2549 MX_SPI5_Init: 2550 .LFB1193: -1150:Src/main.c **** - 2551 .loc 1 1150 1 is_stmt 1 view -0 +1152:Src/main.c **** + 2551 .loc 1 1152 1 is_stmt 1 view -0 2552 .cfi_startproc 2553 @ args = 0, pretend = 0, frame = 72 2554 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11483,19 +11485,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2564 0004 92B0 sub sp, sp, #72 2565 .LCFI22: 2566 .cfi_def_cfa_offset 96 -1156:Src/main.c **** - 2567 .loc 1 1156 3 view .LVU840 -1156:Src/main.c **** - 2568 .loc 1 1156 22 is_stmt 0 view .LVU841 +1158:Src/main.c **** + 2567 .loc 1 1158 3 view .LVU840 +1158:Src/main.c **** + 2568 .loc 1 1158 22 is_stmt 0 view .LVU841 2569 0006 2822 movs r2, #40 2570 0008 0021 movs r1, #0 2571 000a 08A8 add r0, sp, #32 2572 000c FFF7FEFF bl memset 2573 .LVL209: -1158:Src/main.c **** - 2574 .loc 1 1158 3 is_stmt 1 view .LVU842 -1158:Src/main.c **** - 2575 .loc 1 1158 23 is_stmt 0 view .LVU843 +1160:Src/main.c **** + 2574 .loc 1 1160 3 is_stmt 1 view .LVU842 +1160:Src/main.c **** + 2575 .loc 1 1160 23 is_stmt 0 view .LVU843 2576 0010 0024 movs r4, #0 2577 0012 0294 str r4, [sp, #8] 2578 0014 0394 str r4, [sp, #12] @@ -11503,8 +11505,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2580 0018 0594 str r4, [sp, #20] 2581 001a 0694 str r4, [sp, #24] 2582 001c 0794 str r4, [sp, #28] -1161:Src/main.c **** - 2583 .loc 1 1161 3 is_stmt 1 view .LVU844 +1163:Src/main.c **** + 2583 .loc 1 1163 3 is_stmt 1 view .LVU844 2584 .LVL210: 2585 .LBB366: 2586 .LBI366: @@ -11516,11 +11518,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 2590 .loc 3 1590 3 view .LVU847 2591 001e 294B ldr r3, .L107 + ARM GAS /tmp/ccyYWdjY.s page 193 + + 2592 0020 5A6C ldr r2, [r3, #68] 2593 0022 42F48012 orr r2, r2, #1048576 - ARM GAS /tmp/ccfIOqv2.s page 193 - - 2594 0026 5A64 str r2, [r3, #68] 1592:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 2595 .loc 3 1592 3 view .LVU848 @@ -11537,8 +11539,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2604 .loc 3 1593 3 is_stmt 0 view .LVU852 2605 .LBE367: 2606 .LBE366: -1163:Src/main.c **** /**SPI5 GPIO Configuration - 2607 .loc 1 1163 3 is_stmt 1 view .LVU853 +1165:Src/main.c **** /**SPI5 GPIO Configuration + 2607 .loc 1 1165 3 is_stmt 1 view .LVU853 2608 .LBB368: 2609 .LBI368: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11568,152 +11570,152 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2626 .loc 3 315 3 is_stmt 0 view .LVU861 2627 .LBE369: 2628 .LBE368: -1168:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2629 .loc 1 1168 3 is_stmt 1 view .LVU862 -1168:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2630 .loc 1 1168 23 is_stmt 0 view .LVU863 +1170:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2629 .loc 1 1170 3 is_stmt 1 view .LVU862 +1170:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2630 .loc 1 1170 23 is_stmt 0 view .LVU863 2631 0044 8023 movs r3, #128 2632 0046 0293 str r3, [sp, #8] -1169:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2633 .loc 1 1169 3 is_stmt 1 view .LVU864 -1169:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2634 .loc 1 1169 24 is_stmt 0 view .LVU865 - ARM GAS /tmp/ccfIOqv2.s page 194 +1171:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2633 .loc 1 1171 3 is_stmt 1 view .LVU864 + ARM GAS /tmp/ccyYWdjY.s page 194 +1171:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2634 .loc 1 1171 24 is_stmt 0 view .LVU865 2635 0048 0225 movs r5, #2 2636 004a 0395 str r5, [sp, #12] -1170:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2637 .loc 1 1170 3 is_stmt 1 view .LVU866 -1170:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2638 .loc 1 1170 25 is_stmt 0 view .LVU867 +1172:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2637 .loc 1 1172 3 is_stmt 1 view .LVU866 +1172:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2638 .loc 1 1172 25 is_stmt 0 view .LVU867 2639 004c 4FF00308 mov r8, #3 2640 0050 CDF81080 str r8, [sp, #16] -1171:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2641 .loc 1 1171 3 is_stmt 1 view .LVU868 -1172:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2642 .loc 1 1172 3 view .LVU869 -1173:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2643 .loc 1 1173 3 view .LVU870 -1173:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2644 .loc 1 1173 29 is_stmt 0 view .LVU871 +1173:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2641 .loc 1 1173 3 is_stmt 1 view .LVU868 +1174:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2642 .loc 1 1174 3 view .LVU869 +1175:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2643 .loc 1 1175 3 view .LVU870 +1175:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2644 .loc 1 1175 29 is_stmt 0 view .LVU871 2645 0054 0527 movs r7, #5 2646 0056 0797 str r7, [sp, #28] -1174:Src/main.c **** - 2647 .loc 1 1174 3 is_stmt 1 view .LVU872 +1176:Src/main.c **** + 2647 .loc 1 1176 3 is_stmt 1 view .LVU872 2648 0058 1B4E ldr r6, .L107+4 2649 005a 02A9 add r1, sp, #8 2650 005c 3046 mov r0, r6 2651 005e FFF7FEFF bl LL_GPIO_Init 2652 .LVL213: -1176:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2653 .loc 1 1176 3 view .LVU873 -1176:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2654 .loc 1 1176 23 is_stmt 0 view .LVU874 +1178:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2653 .loc 1 1178 3 view .LVU873 +1178:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2654 .loc 1 1178 23 is_stmt 0 view .LVU874 2655 0062 4FF48073 mov r3, #256 2656 0066 0293 str r3, [sp, #8] -1177:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2657 .loc 1 1177 3 is_stmt 1 view .LVU875 -1177:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2658 .loc 1 1177 24 is_stmt 0 view .LVU876 +1179:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2657 .loc 1 1179 3 is_stmt 1 view .LVU875 +1179:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2658 .loc 1 1179 24 is_stmt 0 view .LVU876 2659 0068 0395 str r5, [sp, #12] -1178:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2660 .loc 1 1178 3 is_stmt 1 view .LVU877 -1178:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2661 .loc 1 1178 25 is_stmt 0 view .LVU878 +1180:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2660 .loc 1 1180 3 is_stmt 1 view .LVU877 +1180:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2661 .loc 1 1180 25 is_stmt 0 view .LVU878 2662 006a CDF81080 str r8, [sp, #16] -1179:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2663 .loc 1 1179 3 is_stmt 1 view .LVU879 -1179:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2664 .loc 1 1179 30 is_stmt 0 view .LVU880 +1181:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2663 .loc 1 1181 3 is_stmt 1 view .LVU879 +1181:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2664 .loc 1 1181 30 is_stmt 0 view .LVU880 2665 006e 0594 str r4, [sp, #20] -1180:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2666 .loc 1 1180 3 is_stmt 1 view .LVU881 -1180:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; - 2667 .loc 1 1180 24 is_stmt 0 view .LVU882 +1182:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2666 .loc 1 1182 3 is_stmt 1 view .LVU881 +1182:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_5; + 2667 .loc 1 1182 24 is_stmt 0 view .LVU882 2668 0070 0694 str r4, [sp, #24] -1181:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2669 .loc 1 1181 3 is_stmt 1 view .LVU883 -1181:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); - 2670 .loc 1 1181 29 is_stmt 0 view .LVU884 +1183:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2669 .loc 1 1183 3 is_stmt 1 view .LVU883 +1183:Src/main.c **** LL_GPIO_Init(GPIOF, &GPIO_InitStruct); + 2670 .loc 1 1183 29 is_stmt 0 view .LVU884 + ARM GAS /tmp/ccyYWdjY.s page 195 + + 2671 0072 0797 str r7, [sp, #28] -1182:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 195 - - - 2672 .loc 1 1182 3 is_stmt 1 view .LVU885 +1184:Src/main.c **** + 2672 .loc 1 1184 3 is_stmt 1 view .LVU885 2673 0074 02A9 add r1, sp, #8 2674 0076 3046 mov r0, r6 2675 0078 FFF7FEFF bl LL_GPIO_Init 2676 .LVL214: -1188:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2677 .loc 1 1188 3 view .LVU886 -1188:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2678 .loc 1 1188 36 is_stmt 0 view .LVU887 +1190:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2677 .loc 1 1190 3 view .LVU886 +1190:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2678 .loc 1 1190 36 is_stmt 0 view .LVU887 2679 007c 4FF48063 mov r3, #1024 2680 0080 0893 str r3, [sp, #32] -1189:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2681 .loc 1 1189 3 is_stmt 1 view .LVU888 -1189:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2682 .loc 1 1189 23 is_stmt 0 view .LVU889 +1191:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2681 .loc 1 1191 3 is_stmt 1 view .LVU888 +1191:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2682 .loc 1 1191 23 is_stmt 0 view .LVU889 2683 0082 4FF48273 mov r3, #260 2684 0086 0993 str r3, [sp, #36] -1190:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2685 .loc 1 1190 3 is_stmt 1 view .LVU890 -1190:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2686 .loc 1 1190 28 is_stmt 0 view .LVU891 +1192:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2685 .loc 1 1192 3 is_stmt 1 view .LVU890 +1192:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2686 .loc 1 1192 28 is_stmt 0 view .LVU891 2687 0088 4FF47063 mov r3, #3840 2688 008c 0A93 str r3, [sp, #40] -1191:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2689 .loc 1 1191 3 is_stmt 1 view .LVU892 -1191:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; - 2690 .loc 1 1191 32 is_stmt 0 view .LVU893 +1193:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2689 .loc 1 1193 3 is_stmt 1 view .LVU892 +1193:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_1EDGE; + 2690 .loc 1 1193 32 is_stmt 0 view .LVU893 2691 008e 0B95 str r5, [sp, #44] -1192:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2692 .loc 1 1192 3 is_stmt 1 view .LVU894 -1192:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2693 .loc 1 1192 29 is_stmt 0 view .LVU895 +1194:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2692 .loc 1 1194 3 is_stmt 1 view .LVU894 +1194:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2693 .loc 1 1194 29 is_stmt 0 view .LVU895 2694 0090 0C94 str r4, [sp, #48] -1193:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2695 .loc 1 1193 3 is_stmt 1 view .LVU896 -1193:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2696 .loc 1 1193 22 is_stmt 0 view .LVU897 +1195:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2695 .loc 1 1195 3 is_stmt 1 view .LVU896 +1195:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2696 .loc 1 1195 22 is_stmt 0 view .LVU897 2697 0092 4FF40073 mov r3, #512 2698 0096 0D93 str r3, [sp, #52] -1194:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2699 .loc 1 1194 3 is_stmt 1 view .LVU898 -1194:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2700 .loc 1 1194 27 is_stmt 0 view .LVU899 +1196:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2699 .loc 1 1196 3 is_stmt 1 view .LVU898 +1196:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2700 .loc 1 1196 27 is_stmt 0 view .LVU899 2701 0098 1823 movs r3, #24 2702 009a 0E93 str r3, [sp, #56] -1195:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2703 .loc 1 1195 3 is_stmt 1 view .LVU900 -1195:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2704 .loc 1 1195 27 is_stmt 0 view .LVU901 +1197:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2703 .loc 1 1197 3 is_stmt 1 view .LVU900 +1197:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2704 .loc 1 1197 27 is_stmt 0 view .LVU901 2705 009c 0F94 str r4, [sp, #60] -1196:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2706 .loc 1 1196 3 is_stmt 1 view .LVU902 -1196:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2707 .loc 1 1196 33 is_stmt 0 view .LVU903 +1198:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2706 .loc 1 1198 3 is_stmt 1 view .LVU902 +1198:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2707 .loc 1 1198 33 is_stmt 0 view .LVU903 2708 009e 1094 str r4, [sp, #64] -1197:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2709 .loc 1 1197 3 is_stmt 1 view .LVU904 - ARM GAS /tmp/ccfIOqv2.s page 196 + ARM GAS /tmp/ccyYWdjY.s page 196 -1197:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); - 2710 .loc 1 1197 26 is_stmt 0 view .LVU905 +1199:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 2709 .loc 1 1199 3 is_stmt 1 view .LVU904 +1199:Src/main.c **** LL_SPI_Init(SPI5, &SPI_InitStruct); + 2710 .loc 1 1199 26 is_stmt 0 view .LVU905 2711 00a0 0723 movs r3, #7 2712 00a2 1193 str r3, [sp, #68] -1198:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); - 2713 .loc 1 1198 3 is_stmt 1 view .LVU906 +1200:Src/main.c **** LL_SPI_SetStandard(SPI5, LL_SPI_PROTOCOL_MOTOROLA); + 2713 .loc 1 1200 3 is_stmt 1 view .LVU906 2714 00a4 094C ldr r4, .L107+8 2715 00a6 08A9 add r1, sp, #32 2716 00a8 2046 mov r0, r4 2717 00aa FFF7FEFF bl LL_SPI_Init 2718 .LVL215: -1199:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); - 2719 .loc 1 1199 3 view .LVU907 +1201:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI5); + 2719 .loc 1 1201 3 view .LVU907 2720 .LBB370: 2721 .LBI370: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11729,8 +11731,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2729 .loc 4 428 3 is_stmt 0 view .LVU910 2730 .LBE371: 2731 .LBE370: -1200:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ - 2732 .loc 1 1200 3 is_stmt 1 view .LVU911 +1202:Src/main.c **** /* USER CODE BEGIN SPI5_Init 2 */ + 2732 .loc 1 1202 3 is_stmt 1 view .LVU911 2733 .LBB372: 2734 .LBI372: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -11746,8 +11748,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2742 .loc 4 876 3 is_stmt 0 view .LVU914 2743 .LBE373: 2744 .LBE372: -1205:Src/main.c **** - 2745 .loc 1 1205 1 view .LVU915 +1207:Src/main.c **** + 2745 .loc 1 1207 1 view .LVU915 2746 00be 12B0 add sp, sp, #72 2747 .LCFI23: 2748 .cfi_def_cfa_offset 24 @@ -11756,11 +11758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2751 .L108: 2752 .align 2 2753 .L107: + ARM GAS /tmp/ccyYWdjY.s page 197 + + 2754 00c4 00380240 .word 1073887232 2755 00c8 00140240 .word 1073878016 - ARM GAS /tmp/ccfIOqv2.s page 197 - - 2756 00cc 00500140 .word 1073827840 2757 .cfi_endproc 2758 .LFE1193: @@ -11771,8 +11773,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2764 .thumb_func 2766 MX_SPI6_Init: 2767 .LFB1194: -1213:Src/main.c **** - 2768 .loc 1 1213 1 is_stmt 1 view -0 +1215:Src/main.c **** + 2768 .loc 1 1215 1 is_stmt 1 view -0 2769 .cfi_startproc 2770 @ args = 0, pretend = 0, frame = 72 2771 @ frame_needed = 0, uses_anonymous_args = 0 @@ -11788,19 +11790,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2781 0004 92B0 sub sp, sp, #72 2782 .LCFI25: 2783 .cfi_def_cfa_offset 96 -1219:Src/main.c **** - 2784 .loc 1 1219 3 view .LVU917 -1219:Src/main.c **** - 2785 .loc 1 1219 22 is_stmt 0 view .LVU918 +1221:Src/main.c **** + 2784 .loc 1 1221 3 view .LVU917 +1221:Src/main.c **** + 2785 .loc 1 1221 22 is_stmt 0 view .LVU918 2786 0006 2822 movs r2, #40 2787 0008 0021 movs r1, #0 2788 000a 08A8 add r0, sp, #32 2789 000c FFF7FEFF bl memset 2790 .LVL218: -1221:Src/main.c **** - 2791 .loc 1 1221 3 is_stmt 1 view .LVU919 -1221:Src/main.c **** - 2792 .loc 1 1221 23 is_stmt 0 view .LVU920 +1223:Src/main.c **** + 2791 .loc 1 1223 3 is_stmt 1 view .LVU919 +1223:Src/main.c **** + 2792 .loc 1 1223 23 is_stmt 0 view .LVU920 2793 0010 0024 movs r4, #0 2794 0012 0294 str r4, [sp, #8] 2795 0014 0394 str r4, [sp, #12] @@ -11808,19 +11810,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2797 0018 0594 str r4, [sp, #20] 2798 001a 0694 str r4, [sp, #24] 2799 001c 0794 str r4, [sp, #28] -1224:Src/main.c **** - 2800 .loc 1 1224 3 is_stmt 1 view .LVU921 +1226:Src/main.c **** + 2800 .loc 1 1226 3 is_stmt 1 view .LVU921 2801 .LVL219: 2802 .LBB374: 2803 .LBI374: 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 2804 .loc 3 1587 22 view .LVU922 2805 .LBB375: + ARM GAS /tmp/ccyYWdjY.s page 198 + + 1589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB2ENR, Periphs); 2806 .loc 3 1589 3 view .LVU923 - ARM GAS /tmp/ccfIOqv2.s page 198 - - 1590:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 2807 .loc 3 1590 3 view .LVU924 2808 001e 294B ldr r3, .L111 @@ -11842,8 +11844,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2821 .loc 3 1593 3 is_stmt 0 view .LVU929 2822 .LBE375: 2823 .LBE374: -1226:Src/main.c **** /**SPI6 GPIO Configuration - 2824 .loc 1 1226 3 is_stmt 1 view .LVU930 +1228:Src/main.c **** /**SPI6 GPIO Configuration + 2824 .loc 1 1228 3 is_stmt 1 view .LVU930 2825 .LBB376: 2826 .LBI376: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -11873,152 +11875,152 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2843 .loc 3 315 3 is_stmt 0 view .LVU938 2844 .LBE377: 2845 .LBE376: -1231:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2846 .loc 1 1231 3 is_stmt 1 view .LVU939 -1231:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2847 .loc 1 1231 23 is_stmt 0 view .LVU940 +1233:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2846 .loc 1 1233 3 is_stmt 1 view .LVU939 +1233:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + ARM GAS /tmp/ccyYWdjY.s page 199 + + + 2847 .loc 1 1233 23 is_stmt 0 view .LVU940 2848 0044 2023 movs r3, #32 - ARM GAS /tmp/ccfIOqv2.s page 199 - - 2849 0046 0293 str r3, [sp, #8] -1232:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2850 .loc 1 1232 3 is_stmt 1 view .LVU941 -1232:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2851 .loc 1 1232 24 is_stmt 0 view .LVU942 +1234:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2850 .loc 1 1234 3 is_stmt 1 view .LVU941 +1234:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2851 .loc 1 1234 24 is_stmt 0 view .LVU942 2852 0048 0225 movs r5, #2 2853 004a 0395 str r5, [sp, #12] -1233:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2854 .loc 1 1233 3 is_stmt 1 view .LVU943 -1233:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2855 .loc 1 1233 25 is_stmt 0 view .LVU944 +1235:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2854 .loc 1 1235 3 is_stmt 1 view .LVU943 +1235:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2855 .loc 1 1235 25 is_stmt 0 view .LVU944 2856 004c 4FF00308 mov r8, #3 2857 0050 CDF81080 str r8, [sp, #16] -1234:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2858 .loc 1 1234 3 is_stmt 1 view .LVU945 -1235:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2859 .loc 1 1235 3 view .LVU946 -1236:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2860 .loc 1 1236 3 view .LVU947 -1236:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2861 .loc 1 1236 29 is_stmt 0 view .LVU948 +1236:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2858 .loc 1 1236 3 is_stmt 1 view .LVU945 +1237:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2859 .loc 1 1237 3 view .LVU946 +1238:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2860 .loc 1 1238 3 view .LVU947 +1238:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2861 .loc 1 1238 29 is_stmt 0 view .LVU948 2862 0054 0827 movs r7, #8 2863 0056 0797 str r7, [sp, #28] -1237:Src/main.c **** - 2864 .loc 1 1237 3 is_stmt 1 view .LVU949 +1239:Src/main.c **** + 2864 .loc 1 1239 3 is_stmt 1 view .LVU949 2865 0058 1B4E ldr r6, .L111+4 2866 005a 0DEB0701 add r1, sp, r7 2867 005e 3046 mov r0, r6 2868 0060 FFF7FEFF bl LL_GPIO_Init 2869 .LVL222: -1239:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2870 .loc 1 1239 3 view .LVU950 -1239:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 2871 .loc 1 1239 23 is_stmt 0 view .LVU951 +1241:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2870 .loc 1 1241 3 view .LVU950 +1241:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 2871 .loc 1 1241 23 is_stmt 0 view .LVU951 2872 0064 8023 movs r3, #128 2873 0066 0293 str r3, [sp, #8] -1240:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2874 .loc 1 1240 3 is_stmt 1 view .LVU952 -1240:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 2875 .loc 1 1240 24 is_stmt 0 view .LVU953 +1242:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2874 .loc 1 1242 3 is_stmt 1 view .LVU952 +1242:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 2875 .loc 1 1242 24 is_stmt 0 view .LVU953 2876 0068 0395 str r5, [sp, #12] -1241:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2877 .loc 1 1241 3 is_stmt 1 view .LVU954 -1241:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 2878 .loc 1 1241 25 is_stmt 0 view .LVU955 +1243:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2877 .loc 1 1243 3 is_stmt 1 view .LVU954 +1243:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 2878 .loc 1 1243 25 is_stmt 0 view .LVU955 2879 006a CDF81080 str r8, [sp, #16] -1242:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2880 .loc 1 1242 3 is_stmt 1 view .LVU956 -1242:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 2881 .loc 1 1242 30 is_stmt 0 view .LVU957 +1244:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2880 .loc 1 1244 3 is_stmt 1 view .LVU956 +1244:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 2881 .loc 1 1244 30 is_stmt 0 view .LVU957 2882 006e 0594 str r4, [sp, #20] -1243:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2883 .loc 1 1243 3 is_stmt 1 view .LVU958 -1243:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; - 2884 .loc 1 1243 24 is_stmt 0 view .LVU959 +1245:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2883 .loc 1 1245 3 is_stmt 1 view .LVU958 +1245:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_8; + 2884 .loc 1 1245 24 is_stmt 0 view .LVU959 + ARM GAS /tmp/ccyYWdjY.s page 200 + + 2885 0070 0694 str r4, [sp, #24] -1244:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - ARM GAS /tmp/ccfIOqv2.s page 200 - - - 2886 .loc 1 1244 3 is_stmt 1 view .LVU960 -1244:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 2887 .loc 1 1244 29 is_stmt 0 view .LVU961 +1246:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2886 .loc 1 1246 3 is_stmt 1 view .LVU960 +1246:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 2887 .loc 1 1246 29 is_stmt 0 view .LVU961 2888 0072 0797 str r7, [sp, #28] -1245:Src/main.c **** - 2889 .loc 1 1245 3 is_stmt 1 view .LVU962 +1247:Src/main.c **** + 2889 .loc 1 1247 3 is_stmt 1 view .LVU962 2890 0074 0DEB0701 add r1, sp, r7 2891 0078 3046 mov r0, r6 2892 007a FFF7FEFF bl LL_GPIO_Init 2893 .LVL223: -1251:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2894 .loc 1 1251 3 view .LVU963 -1251:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; - 2895 .loc 1 1251 36 is_stmt 0 view .LVU964 +1253:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2894 .loc 1 1253 3 view .LVU963 +1253:Src/main.c **** SPI_InitStruct.Mode = LL_SPI_MODE_MASTER; + 2895 .loc 1 1253 36 is_stmt 0 view .LVU964 2896 007e 0894 str r4, [sp, #32] -1252:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2897 .loc 1 1252 3 is_stmt 1 view .LVU965 -1252:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; - 2898 .loc 1 1252 23 is_stmt 0 view .LVU966 +1254:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2897 .loc 1 1254 3 is_stmt 1 view .LVU965 +1254:Src/main.c **** SPI_InitStruct.DataWidth = LL_SPI_DATAWIDTH_16BIT; + 2898 .loc 1 1254 23 is_stmt 0 view .LVU966 2899 0080 4FF48273 mov r3, #260 2900 0084 0993 str r3, [sp, #36] -1253:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2901 .loc 1 1253 3 is_stmt 1 view .LVU967 -1253:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; - 2902 .loc 1 1253 28 is_stmt 0 view .LVU968 +1255:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2901 .loc 1 1255 3 is_stmt 1 view .LVU967 +1255:Src/main.c **** SPI_InitStruct.ClockPolarity = LL_SPI_POLARITY_HIGH; + 2902 .loc 1 1255 28 is_stmt 0 view .LVU968 2903 0086 4FF47063 mov r3, #3840 2904 008a 0A93 str r3, [sp, #40] -1254:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2905 .loc 1 1254 3 is_stmt 1 view .LVU969 -1254:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; - 2906 .loc 1 1254 32 is_stmt 0 view .LVU970 +1256:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2905 .loc 1 1256 3 is_stmt 1 view .LVU969 +1256:Src/main.c **** SPI_InitStruct.ClockPhase = LL_SPI_PHASE_2EDGE; + 2906 .loc 1 1256 32 is_stmt 0 view .LVU970 2907 008c 0B95 str r5, [sp, #44] -1255:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2908 .loc 1 1255 3 is_stmt 1 view .LVU971 -1255:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; - 2909 .loc 1 1255 29 is_stmt 0 view .LVU972 +1257:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2908 .loc 1 1257 3 is_stmt 1 view .LVU971 +1257:Src/main.c **** SPI_InitStruct.NSS = LL_SPI_NSS_SOFT; + 2909 .loc 1 1257 29 is_stmt 0 view .LVU972 2910 008e 0123 movs r3, #1 2911 0090 0C93 str r3, [sp, #48] -1256:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2912 .loc 1 1256 3 is_stmt 1 view .LVU973 -1256:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; - 2913 .loc 1 1256 22 is_stmt 0 view .LVU974 +1258:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2912 .loc 1 1258 3 is_stmt 1 view .LVU973 +1258:Src/main.c **** SPI_InitStruct.BaudRate = LL_SPI_BAUDRATEPRESCALER_DIV16; + 2913 .loc 1 1258 22 is_stmt 0 view .LVU974 2914 0092 4FF40073 mov r3, #512 2915 0096 0D93 str r3, [sp, #52] -1257:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2916 .loc 1 1257 3 is_stmt 1 view .LVU975 -1257:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; - 2917 .loc 1 1257 27 is_stmt 0 view .LVU976 +1259:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2916 .loc 1 1259 3 is_stmt 1 view .LVU975 +1259:Src/main.c **** SPI_InitStruct.BitOrder = LL_SPI_MSB_FIRST; + 2917 .loc 1 1259 27 is_stmt 0 view .LVU976 2918 0098 1823 movs r3, #24 2919 009a 0E93 str r3, [sp, #56] -1258:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2920 .loc 1 1258 3 is_stmt 1 view .LVU977 -1258:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; - 2921 .loc 1 1258 27 is_stmt 0 view .LVU978 +1260:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2920 .loc 1 1260 3 is_stmt 1 view .LVU977 +1260:Src/main.c **** SPI_InitStruct.CRCCalculation = LL_SPI_CRCCALCULATION_DISABLE; + 2921 .loc 1 1260 27 is_stmt 0 view .LVU978 2922 009c 0F94 str r4, [sp, #60] -1259:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2923 .loc 1 1259 3 is_stmt 1 view .LVU979 - ARM GAS /tmp/ccfIOqv2.s page 201 + ARM GAS /tmp/ccyYWdjY.s page 201 -1259:Src/main.c **** SPI_InitStruct.CRCPoly = 7; - 2924 .loc 1 1259 33 is_stmt 0 view .LVU980 +1261:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2923 .loc 1 1261 3 is_stmt 1 view .LVU979 +1261:Src/main.c **** SPI_InitStruct.CRCPoly = 7; + 2924 .loc 1 1261 33 is_stmt 0 view .LVU980 2925 009e 1094 str r4, [sp, #64] -1260:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2926 .loc 1 1260 3 is_stmt 1 view .LVU981 -1260:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); - 2927 .loc 1 1260 26 is_stmt 0 view .LVU982 +1262:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 2926 .loc 1 1262 3 is_stmt 1 view .LVU981 +1262:Src/main.c **** LL_SPI_Init(SPI6, &SPI_InitStruct); + 2927 .loc 1 1262 26 is_stmt 0 view .LVU982 2928 00a0 0723 movs r3, #7 2929 00a2 1193 str r3, [sp, #68] -1261:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); - 2930 .loc 1 1261 3 is_stmt 1 view .LVU983 +1263:Src/main.c **** LL_SPI_SetStandard(SPI6, LL_SPI_PROTOCOL_MOTOROLA); + 2930 .loc 1 1263 3 is_stmt 1 view .LVU983 2931 00a4 094C ldr r4, .L111+8 2932 00a6 08A9 add r1, sp, #32 2933 00a8 2046 mov r0, r4 2934 00aa FFF7FEFF bl LL_SPI_Init 2935 .LVL224: -1262:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); - 2936 .loc 1 1262 3 view .LVU984 +1264:Src/main.c **** LL_SPI_DisableNSSPulseMgt(SPI6); + 2936 .loc 1 1264 3 view .LVU984 2937 .LBB378: 2938 .LBI378: 426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -12034,8 +12036,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2946 .loc 4 428 3 is_stmt 0 view .LVU987 2947 .LBE379: 2948 .LBE378: -1263:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ - 2949 .loc 1 1263 3 is_stmt 1 view .LVU988 +1265:Src/main.c **** /* USER CODE BEGIN SPI6_Init 2 */ + 2949 .loc 1 1265 3 is_stmt 1 view .LVU988 2950 .LBB380: 2951 .LBI380: 874:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -12051,16 +12053,16 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2959 .loc 4 876 3 is_stmt 0 view .LVU991 2960 .LBE381: 2961 .LBE380: -1268:Src/main.c **** - 2962 .loc 1 1268 1 view .LVU992 +1270:Src/main.c **** + 2962 .loc 1 1270 1 view .LVU992 2963 00be 12B0 add sp, sp, #72 2964 .LCFI26: 2965 .cfi_def_cfa_offset 24 + ARM GAS /tmp/ccyYWdjY.s page 202 + + 2966 @ sp needed 2967 00c0 BDE8F081 pop {r4, r5, r6, r7, r8, pc} - ARM GAS /tmp/ccfIOqv2.s page 202 - - 2968 .L112: 2969 .align 2 2970 .L111: @@ -12076,8 +12078,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2981 .thumb_func 2983 MX_TIM2_Init: 2984 .LFB1195: -1276:Src/main.c **** - 2985 .loc 1 1276 1 is_stmt 1 view -0 +1278:Src/main.c **** + 2985 .loc 1 1278 1 is_stmt 1 view -0 2986 .cfi_startproc 2987 @ args = 0, pretend = 0, frame = 24 2988 @ frame_needed = 0, uses_anonymous_args = 0 @@ -12089,18 +12091,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2994 0002 86B0 sub sp, sp, #24 2995 .LCFI28: 2996 .cfi_def_cfa_offset 32 -1282:Src/main.c **** - 2997 .loc 1 1282 3 view .LVU994 -1282:Src/main.c **** - 2998 .loc 1 1282 22 is_stmt 0 view .LVU995 +1284:Src/main.c **** + 2997 .loc 1 1284 3 view .LVU994 +1284:Src/main.c **** + 2998 .loc 1 1284 22 is_stmt 0 view .LVU995 2999 0004 0024 movs r4, #0 3000 0006 0194 str r4, [sp, #4] 3001 0008 0294 str r4, [sp, #8] 3002 000a 0394 str r4, [sp, #12] 3003 000c 0494 str r4, [sp, #16] 3004 000e 0594 str r4, [sp, #20] -1285:Src/main.c **** - 3005 .loc 1 1285 3 is_stmt 1 view .LVU996 +1287:Src/main.c **** + 3005 .loc 1 1287 3 is_stmt 1 view .LVU996 3006 .LVL227: 3007 .LBB382: 3008 .LBI382: @@ -12116,11 +12118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3015 0014 42F00102 orr r2, r2, #1 3016 0018 1A64 str r2, [r3, #64] 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccyYWdjY.s page 203 + + 3017 .loc 3 1076 3 view .LVU1000 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; - ARM GAS /tmp/ccfIOqv2.s page 203 - - 3018 .loc 3 1076 12 is_stmt 0 view .LVU1001 3019 001a 1B6C ldr r3, [r3, #64] 3020 001c 03F00103 and r3, r3, #1 @@ -12135,8 +12137,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3026 .loc 3 1077 3 is_stmt 0 view .LVU1004 3027 .LBE383: 3028 .LBE382: -1288:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3029 .loc 1 1288 3 is_stmt 1 view .LVU1005 +1290:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 3029 .loc 1 1290 3 is_stmt 1 view .LVU1005 3030 .LBB384: 3031 .LBI384: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -12150,8 +12152,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3037 0026 D868 ldr r0, [r3, #12] 3038 .LBE385: 3039 .LBE384: -1288:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); - 3040 .loc 1 1288 3 discriminator 1 view .LVU1009 +1290:Src/main.c **** NVIC_EnableIRQ(TIM2_IRQn); + 3040 .loc 1 1290 3 discriminator 1 view .LVU1009 3041 0028 2246 mov r2, r4 3042 002a 2146 mov r1, r4 3043 002c C0F30220 ubfx r0, r0, #8, #3 @@ -12176,17 +12178,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3057 .loc 2 2028 47 view .LVU1015 3058 0038 154B ldr r3, .L115+8 + ARM GAS /tmp/ccyYWdjY.s page 204 + + 3059 003a 83F81C03 strb r0, [r3, #796] 3060 .LVL231: - ARM GAS /tmp/ccfIOqv2.s page 204 - - 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3061 .loc 2 2028 47 view .LVU1016 3062 .LBE387: 3063 .LBE386: -1289:Src/main.c **** - 3064 .loc 1 1289 3 is_stmt 1 view .LVU1017 +1291:Src/main.c **** + 3064 .loc 1 1291 3 is_stmt 1 view .LVU1017 3065 .LBB388: 3066 .LBI388: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -12205,42 +12207,42 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3075 .loc 2 1900 43 view .LVU1022 3076 .LBE389: 3077 .LBE388: -1294:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3078 .loc 1 1294 3 is_stmt 1 view .LVU1023 -1294:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3079 .loc 1 1294 28 is_stmt 0 view .LVU1024 +1296:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3078 .loc 1 1296 3 is_stmt 1 view .LVU1023 +1296:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3079 .loc 1 1296 28 is_stmt 0 view .LVU1024 3080 0044 4FF47A73 mov r3, #1000 3081 0048 ADF80430 strh r3, [sp, #4] @ movhi -1295:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3082 .loc 1 1295 3 is_stmt 1 view .LVU1025 -1295:Src/main.c **** TIM_InitStruct.Autoreload = 840000; - 3083 .loc 1 1295 30 is_stmt 0 view .LVU1026 +1297:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 3082 .loc 1 1297 3 is_stmt 1 view .LVU1025 +1297:Src/main.c **** TIM_InitStruct.Autoreload = 840000; + 3083 .loc 1 1297 30 is_stmt 0 view .LVU1026 3084 004c 0294 str r4, [sp, #8] -1296:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3085 .loc 1 1296 3 is_stmt 1 view .LVU1027 -1296:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3086 .loc 1 1296 29 is_stmt 0 view .LVU1028 +1298:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3085 .loc 1 1298 3 is_stmt 1 view .LVU1027 +1298:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3086 .loc 1 1298 29 is_stmt 0 view .LVU1028 3087 004e 114B ldr r3, .L115+12 3088 0050 0393 str r3, [sp, #12] -1297:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3089 .loc 1 1297 3 is_stmt 1 view .LVU1029 -1297:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); - 3090 .loc 1 1297 32 is_stmt 0 view .LVU1030 +1299:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 3089 .loc 1 1299 3 is_stmt 1 view .LVU1029 +1299:Src/main.c **** LL_TIM_Init(TIM2, &TIM_InitStruct); + 3090 .loc 1 1299 32 is_stmt 0 view .LVU1030 3091 0052 0494 str r4, [sp, #16] -1298:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); - 3092 .loc 1 1298 3 is_stmt 1 view .LVU1031 +1300:Src/main.c **** LL_TIM_DisableARRPreload(TIM2); + 3092 .loc 1 1300 3 is_stmt 1 view .LVU1031 3093 0054 01A9 add r1, sp, #4 3094 0056 4FF08040 mov r0, #1073741824 3095 005a FFF7FEFF bl LL_TIM_Init 3096 .LVL233: -1299:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); - 3097 .loc 1 1299 3 view .LVU1032 +1301:Src/main.c **** LL_TIM_SetClockSource(TIM2, LL_TIM_CLOCKSOURCE_INTERNAL); + 3097 .loc 1 1301 3 view .LVU1032 3098 .LBB390: + ARM GAS /tmp/ccyYWdjY.s page 205 + + 3099 .LBI390: 3100 .file 5 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" - ARM GAS /tmp/ccfIOqv2.s page 205 - - 1:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ****************************************************************************** 3:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @file stm32f7xx_ll_tim.h @@ -12296,11 +12298,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 53:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x04U, /* 6: TIMx_CH4 */ 54:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU, /* 7: TIMx_CH5 */ 55:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0x3CU /* 8: TIMx_CH6 */ + ARM GAS /tmp/ccyYWdjY.s page 206 + + 56:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** }; 57:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 206 - - 58:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** static const uint8_t SHIFT_TAB_OCxx[] = 59:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 60:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 0U, /* 0: OC1M, OC1FE, OC1PE */ @@ -12356,11 +12358,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 207 + + 113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /* Private constants ---------------------------------------------------------*/ 114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_Private_Constants TIM Private Constants - ARM GAS /tmp/ccfIOqv2.s page 207 - - 115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12416,11 +12418,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define TIM_GET_CHANNEL_INDEX( __CHANNEL__) \ 168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** (((__CHANNEL__) == LL_TIM_CHANNEL_CH1) ? 0U :\ 169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH1N) ? 1U :\ + ARM GAS /tmp/ccyYWdjY.s page 208 + + 170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2) ? 2U :\ 171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH2N) ? 3U :\ - ARM GAS /tmp/ccfIOqv2.s page 208 - - 172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3) ? 4U :\ 173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH3N) ? 5U :\ 174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((__CHANNEL__) == LL_TIM_CHANNEL_CH4) ? 6U :\ @@ -12476,11 +12478,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetAutoReload().*/ 225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t ClockDivision; /*!< Specifies the clock division. + ARM GAS /tmp/ccyYWdjY.s page 209 + + 227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_CLOCKDIVISION. 228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 209 - - 229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetClockDivision().*/ 231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12536,11 +12538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t OCNPolarity; /*!< Specifies the complementary output polarity. 283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_OCPOLARITY. + ARM GAS /tmp/ccyYWdjY.s page 210 + + 284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function - ARM GAS /tmp/ccfIOqv2.s page 210 - - 286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_OC_SetPolarity().*/ 287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12596,11 +12598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct 339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t EncoderMode; /*!< Specifies the encoder resolution (x2 or x4). + ARM GAS /tmp/ccyYWdjY.s page 211 + + 341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_ENCODERMODE. 342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 211 - - 343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary function 344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_SetEncoderMode().*/ 345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -12656,11 +12658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief TIM Hall sensor interface configuration structure definition. + ARM GAS /tmp/ccyYWdjY.s page 212 + + 398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** typedef struct - ARM GAS /tmp/ccfIOqv2.s page 212 - - 400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t IC1Polarity; /*!< Specifies the active edge of TI1 input. @@ -12716,11 +12718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field cannot be modified as long as LOCK level 453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 213 + + 455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t LockLevel; /*!< Specifies the LOCK level parameters. 456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This parameter can be a value of @ref TIM_LL_EC_LOCKLEVEL - ARM GAS /tmp/ccfIOqv2.s page 213 - - 457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note The LOCK bits can be written only once after the reset. 459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** register has been written, their content is frozen until the @@ -12776,11 +12778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** This feature can be modified afterwards using unitary functio 511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @ref LL_TIM_ConfigBRK2() + ARM GAS /tmp/ccyYWdjY.s page 214 + + 512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @note This bit-field can not be modified as long as LOCK leve - ARM GAS /tmp/ccfIOqv2.s page 214 - - 514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** programmed. */ 515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint32_t Break2Filter; /*!< Specifies the TIM Break2 Filter. @@ -12836,11 +12838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 566:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 567:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 568:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 215 + + 569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(USE_FULL_LL_DRIVER) 570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_ENABLE Break Enable - ARM GAS /tmp/ccfIOqv2.s page 215 - - 571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_DISABLE 0x00000000U /*!< Break function disabled */ @@ -12896,11 +12898,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 623:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_ONEPULSEMODE One Pulse Mode 624:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 625:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 216 + + 626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_SINGLE TIM_CR1_OPM /*!< Counter stops counting at 627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ONEPULSEMODE_REPETITIVE 0x00000000U /*!< Counter is not stopped at - ARM GAS /tmp/ccfIOqv2.s page 216 - - 628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -12956,11 +12958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 680:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 681:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_LOCKLEVEL Lock Level 682:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ + ARM GAS /tmp/ccyYWdjY.s page 217 + + 683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_OFF 0x00000000U /*!< LOCK OFF - No bit is write - ARM GAS /tmp/ccfIOqv2.s page 217 - - 685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_1 TIM_BDTR_LOCK_0 /*!< LOCK Level 1 */ 686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_2 TIM_BDTR_LOCK_1 /*!< LOCK Level 2 */ 687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_LOCKLEVEL_3 TIM_BDTR_LOCK /*!< LOCK Level 3 */ @@ -13016,11 +13018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 737:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM1 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1) 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_PWM2 (TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1 739:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM1 TIM_CCMR1_OC1M_3 + ARM GAS /tmp/ccyYWdjY.s page 218 + + 740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_RETRIG_OPM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0) 741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2) - ARM GAS /tmp/ccfIOqv2.s page 218 - - 742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_COMBINED_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1 743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM1 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1 744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OCMODE_ASYMMETRIC_PWM2 (TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M) @@ -13076,11 +13078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 794:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC << 16U) /*!< Capture is done 795:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 796:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccyYWdjY.s page 219 + + 797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 219 - - 799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_IC_FILTER Input Configuration Filter 800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13136,11 +13138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 851:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 852:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TRGO Trigger Output 853:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ + ARM GAS /tmp/ccyYWdjY.s page 220 + + 854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_RESET 0x00000000U /*!< - ARM GAS /tmp/ccfIOqv2.s page 220 - - 856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_ENABLE TIM_CR2_MMS_0 /*!< 857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_UPDATE TIM_CR2_MMS_1 /*!< 858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TRGO_CC1IF (TIM_CR2_MMS_1 | TIM_CR2_MMS_0) /*!< @@ -13196,11 +13198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 908:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1) 909:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1F_ED TIM_SMCR_TS_2 910:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI1FP1 (TIM_SMCR_TS_2 | TIM_SMCR_TS_0) + ARM GAS /tmp/ccyYWdjY.s page 221 + + 911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_TI2FP2 (TIM_SMCR_TS_2 | TIM_SMCR_TS_1) 912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TS_ETRF (TIM_SMCR_TS_2 | TIM_SMCR_TS_1 | TIM_SMCR_TS_0) - ARM GAS /tmp/ccfIOqv2.s page 221 - - 913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13256,11 +13258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 965:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_BREAK_POLARITY_HIGH TIM_BDTR_BKP /*!< Break input BRK is ac 966:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 967:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} + ARM GAS /tmp/ccyYWdjY.s page 222 + + 968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 222 - - 970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_BREAK_FILTER break filter 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ 972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13316,11 +13318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1022:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1023:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1024:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 223 + + 1025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_OSSI OSSI 1026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ - ARM GAS /tmp/ccfIOqv2.s page 223 - - 1027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_DISABLE 0x00000000U /*!< When inactive, OCx/OCxN 1029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_OSSI_ENABLE TIM_BDTR_OSSI /*!< When inactive, OxC/OCxN @@ -13376,11 +13378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1079:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_SR TIM_DCR_DBA_2 1080:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_EGR (TIM_DCR_DBA_2 | TIM_DCR_DBA_0) 1081:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR1 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1) + ARM GAS /tmp/ccyYWdjY.s page 224 + + 1082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCMR2 (TIM_DCR_DBA_2 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) 1083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CCER TIM_DCR_DBA_3 - ARM GAS /tmp/ccfIOqv2.s page 224 - - 1084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_CNT (TIM_DCR_DBA_3 | TIM_DCR_DBA_0) 1085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_PSC (TIM_DCR_DBA_3 | TIM_DCR_DBA_1) 1086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_DMABURST_BASEADDR_ARR (TIM_DCR_DBA_3 | TIM_DCR_DBA_1 | TIM_DCR_DBA_0) @@ -13436,11 +13438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF (TIM2_OR_ITR1_RMP_1 | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1137:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF (TIM2_OR_ITR1_RMP | TIM2_OR_RMP_MASK) /*!< TIM2_ITR1 1138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 225 + + 1139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 225 - - 1141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EC_TIM5_TI4_RMP TIM5 External Input Ch4 Remap 1143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @{ @@ -13496,11 +13498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1193:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1194:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} 1195:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 226 + + 1196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 226 - - 1198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro retrieving the UIFCPY flag from the counter value. 1199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_GETFLAG_UIFCPY (@ref LL_TIM_GetCounter ()); 1200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Relevant only if UIF flag remapping has been enabled (UIF status bit is copied @@ -13556,11 +13558,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1250:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1251:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #define __LL_TIM_CALC_ARR(__TIMCLK__, __PSC__, __FREQ__) \ 1252:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ((((__TIMCLK__)/((__PSC__) + 1U)) >= (__FREQ__)) ? (((__TIMCLK__)/((__FREQ__) * ((__PSC__) + 1U)) + ARM GAS /tmp/ccyYWdjY.s page 227 + + 1253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 227 - - 1255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief HELPER macro calculating the compare value required to achieve the required timer outpu 1256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * active/inactive delay. 1257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note ex: @ref __LL_TIM_CALC_DELAY (1000000, @ref LL_TIM_GetPrescaler (), 10); @@ -13616,11 +13618,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1307:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1308:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable timer counter. 1309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CEN LL_TIM_EnableCounter + ARM GAS /tmp/ccyYWdjY.s page 228 + + 1310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 228 - - 1312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableCounter(TIM_TypeDef *TIMx) 1314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -13676,11 +13678,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1364:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UDIS LL_TIM_IsEnabledUpdateEvent 1365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1366:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Inverted state of bit (0 or 1). + ARM GAS /tmp/ccyYWdjY.s page 229 + + 1367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledUpdateEvent(const TIM_TypeDef *TIMx) - ARM GAS /tmp/ccfIOqv2.s page 229 - - 1369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->CR1, TIM_CR1_UDIS) == (uint32_t)RESET) ? 1UL : 0UL); 1371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -13736,11 +13738,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1421:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1422:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get actual one pulse mode. 1423:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 OPM LL_TIM_GetOnePulseMode + ARM GAS /tmp/ccyYWdjY.s page 230 + + 1424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccfIOqv2.s page 230 - - 1426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_SINGLE 1427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ONEPULSEMODE_REPETITIVE 1428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -13796,11 +13798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1478:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1479:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** if (counter_mode == 0U) 1480:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccyYWdjY.s page 231 + + 1481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** counter_mode = (uint32_t)(READ_BIT(TIMx->CR1, TIM_CR1_DIR)); 1482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 231 - - 1483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return counter_mode; 1485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -13836,8 +13838,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3109 .loc 5 1506 3 is_stmt 0 view .LVU1035 3110 .LBE391: 3111 .LBE390: -1300:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); - 3112 .loc 1 1300 3 is_stmt 1 view .LVU1036 +1302:Src/main.c **** LL_TIM_SetTriggerOutput(TIM2, LL_TIM_TRGO_RESET); + 3112 .loc 1 1302 3 is_stmt 1 view .LVU1036 3113 .LBB392: 3114 .LBI392: 1507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -13856,11 +13858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the division ratio between the timer clock and the sampling clock used by the dead 1522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (when supported) and the digital filters. + ARM GAS /tmp/ccyYWdjY.s page 232 + + 1523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx) can be used to check 1524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not the clock division feature is supported by the timer - ARM GAS /tmp/ccfIOqv2.s page 232 - - 1525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * instance. 1526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 CKD LL_TIM_SetClockDivision 1527:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -13916,11 +13918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Counter value (between Min_Data=0 and Max_Data=0xFFFF or 0xFFFFFFFF) 1578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_GetCounter(const TIM_TypeDef *TIMx) + ARM GAS /tmp/ccyYWdjY.s page 233 + + 1580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 1581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CNT)); - ARM GAS /tmp/ccfIOqv2.s page 233 - - 1582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1584:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -13976,11 +13978,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 1635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_SetAutoReload(TIM_TypeDef *TIMx, uint32_t AutoReload) 1636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccyYWdjY.s page 234 + + 1637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->ARR, AutoReload); 1638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 234 - - 1639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 1640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1641:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the auto-reload value. @@ -14036,11 +14038,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->CR1, TIM_CR1_UIFREMAP); 1692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 235 + + 1694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable update interrupt flag (UIF) remapping. - ARM GAS /tmp/ccfIOqv2.s page 235 - - 1696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR1 UIFREMAP LL_TIM_DisableUIFRemap 1697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1698:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None @@ -14096,11 +14098,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_CCPC); 1749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 1750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 236 + + 1751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the capture/compare control bits (CCxE, CCxNE and OCxM) preload is en - ARM GAS /tmp/ccfIOqv2.s page 236 - - 1753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 CCPC LL_TIM_CC_IsEnabledPreload 1754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1755:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -14156,11 +14158,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 1806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the lock level to freeze the 1807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * configuration of several capture/compare parameters. + ARM GAS /tmp/ccyYWdjY.s page 237 + + 1808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_BREAK_INSTANCE(TIMx) can be used to check whether or not 1809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * the lock mechanism is supported by a timer instance. - ARM GAS /tmp/ccfIOqv2.s page 237 - - 1810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll BDTR LOCK LL_TIM_CC_SetLockLevel 1811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 1812:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param LockLevel This parameter can be one of the following values: @@ -14216,11 +14218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC5E LL_TIM_CC_DisableChannel\n 1863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC6E LL_TIM_CC_DisableChannel 1864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccyYWdjY.s page 238 + + 1865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channels This parameter can be a combination of the following values: 1866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 - ARM GAS /tmp/ccfIOqv2.s page 238 - - 1867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1N 1868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 1869:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N @@ -14276,11 +14278,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Configure an output channel. 1920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_OC_ConfigOutput\n 1921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_OC_ConfigOutput\n + ARM GAS /tmp/ccyYWdjY.s page 239 + + 1922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_OC_ConfigOutput\n 1923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_OC_ConfigOutput\n - ARM GAS /tmp/ccfIOqv2.s page 239 - - 1924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC5S LL_TIM_OC_ConfigOutput\n 1925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 CC6S LL_TIM_OC_ConfigOutput\n 1926:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1P LL_TIM_OC_ConfigOutput\n @@ -14336,11 +14338,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 1977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 1978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 + ARM GAS /tmp/ccyYWdjY.s page 240 + + 1979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Mode This parameter can be one of the following values: 1980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_FROZEN - ARM GAS /tmp/ccfIOqv2.s page 240 - - 1981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ACTIVE 1982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_INACTIVE 1983:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_TOGGLE @@ -14396,11 +14398,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_OCMODE_ASYMMETRIC_PWM2 2034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_GetMode(const TIM_TypeDef *TIMx, uint32_t Channel) + ARM GAS /tmp/ccyYWdjY.s page 241 + + 2036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); - ARM GAS /tmp/ccfIOqv2.s page 241 - - 2038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** const __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CC 2039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (READ_BIT(*pReg, ((TIM_CCMR1_OC1M | TIM_CCMR1_CC1S) << SHIFT_TAB_OCxx[iChannel])) >> SHIFT 2040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -14456,11 +14458,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2N 2092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccyYWdjY.s page 242 + + 2093:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3N 2094:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 - ARM GAS /tmp/ccfIOqv2.s page 242 - - 2095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2096:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2097:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: @@ -14516,11 +14518,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n 2148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2 LL_TIM_OC_GetIdleState\n 2149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS2N LL_TIM_OC_GetIdleState\n + ARM GAS /tmp/ccyYWdjY.s page 243 + + 2150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3 LL_TIM_OC_GetIdleState\n 2151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS3N LL_TIM_OC_GetIdleState\n - ARM GAS /tmp/ccfIOqv2.s page 243 - - 2152:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS4 LL_TIM_OC_GetIdleState\n 2153:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS5 LL_TIM_OC_GetIdleState\n 2154:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CR2 OIS6 LL_TIM_OC_GetIdleState @@ -14576,11 +14578,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Disable fast mode for the output channel. 2205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 OC1FE LL_TIM_OC_DisableFast\n 2206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 OC2FE LL_TIM_OC_DisableFast\n + ARM GAS /tmp/ccyYWdjY.s page 244 + + 2207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC3FE LL_TIM_OC_DisableFast\n 2208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 OC4FE LL_TIM_OC_DisableFast\n - ARM GAS /tmp/ccfIOqv2.s page 244 - - 2209:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5FE LL_TIM_OC_DisableFast\n 2210:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6FE LL_TIM_OC_DisableFast 2211:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -14636,11 +14638,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC5PE LL_TIM_OC_EnablePreload\n 2262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR3 OC6PE LL_TIM_OC_EnablePreload 2263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccyYWdjY.s page 245 + + 2264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 - ARM GAS /tmp/ccfIOqv2.s page 245 - - 2266:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2267:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 2268:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 @@ -14696,11 +14698,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 + ARM GAS /tmp/ccyYWdjY.s page 246 + + 2321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). 2322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 246 - - 2323:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_OC_IsEnabledPreload(const TIM_TypeDef *TIMx, uint32_t Channel) 2324:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2325:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); @@ -14756,11 +14758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH5 2376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH6 2377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None + ARM GAS /tmp/ccyYWdjY.s page 247 + + 2378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_DisableClear(TIM_TypeDef *TIMx, uint32_t Channel) - ARM GAS /tmp/ccfIOqv2.s page 247 - - 2380:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2381:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); 2382:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __IO uint32_t *pReg = (__IO uint32_t *)((uint32_t)((uint32_t)(&TIMx->CCMR1) + OFFSET_TAB_CCMRx[iC @@ -14816,11 +14818,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 2433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set compare value for output channel 1 (TIMx_CCR1). 2434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations compare value can be between 0x00000000 and 0xFFFFFFFF. + ARM GAS /tmp/ccyYWdjY.s page 248 + + 2435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. - ARM GAS /tmp/ccfIOqv2.s page 248 - - 2437:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC1_INSTANCE(TIMx) can be used to check whether or not 2438:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 1 is supported by a timer instance. 2439:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR1 CCR1 LL_TIM_OC_SetCompareCH1 @@ -14876,11 +14878,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 4 is supported by a timer instance. 2490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR4 CCR4 LL_TIM_OC_SetCompareCH4 2491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance + ARM GAS /tmp/ccyYWdjY.s page 249 + + 2492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param CompareValue between Min_Data=0 and Max_Data=65535 2493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 249 - - 2494:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 2495:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_OC_SetCompareCH4(TIM_TypeDef *TIMx, uint32_t CompareValue) 2496:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -14936,11 +14938,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note In 32-bit timer implementations returned compare value can be between 0x00000000 and 0xFF 2547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_32B_COUNTER_INSTANCE(TIMx) can be used to check 2548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports a 32 bits counter. + ARM GAS /tmp/ccyYWdjY.s page 250 + + 2549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC2_INSTANCE(TIMx) can be used to check whether or not 2550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 2 is supported by a timer instance. - ARM GAS /tmp/ccfIOqv2.s page 250 - - 2551:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR2 CCR2 LL_TIM_OC_GetCompareCH2 2552:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2553:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CompareValue (between Min_Data=0 and Max_Data=65535) @@ -14996,11 +14998,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 251 + + 2606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get compare value (TIMx_CCR6) set for output channel 6. 2607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CC6_INSTANCE(TIMx) can be used to check whether or not - ARM GAS /tmp/ccfIOqv2.s page 251 - - 2608:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * output channel 6 is supported by a timer instance. 2609:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCR6 CCR6 LL_TIM_OC_GetCompareCH6 2610:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -15056,11 +15058,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC1NP LL_TIM_IC_Config\n 2661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2P LL_TIM_IC_Config\n 2662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC2NP LL_TIM_IC_Config\n + ARM GAS /tmp/ccyYWdjY.s page 252 + + 2663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3P LL_TIM_IC_Config\n 2664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC3NP LL_TIM_IC_Config\n - ARM GAS /tmp/ccfIOqv2.s page 252 - - 2665:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4P LL_TIM_IC_Config\n 2666:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCER CC4NP LL_TIM_IC_Config 2667:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance @@ -15116,11 +15118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Get the current active input. 2718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 CC1S LL_TIM_IC_GetActiveInput\n 2719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 CC2S LL_TIM_IC_GetActiveInput\n + ARM GAS /tmp/ccyYWdjY.s page 253 + + 2720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC3S LL_TIM_IC_GetActiveInput\n 2721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 CC4S LL_TIM_IC_GetActiveInput - ARM GAS /tmp/ccfIOqv2.s page 253 - - 2722:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 2723:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2724:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 @@ -15176,11 +15178,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 2776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH3 + ARM GAS /tmp/ccyYWdjY.s page 254 + + 2777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH4 2778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval Returned value can be one of the following values: - ARM GAS /tmp/ccfIOqv2.s page 254 - - 2779:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV1 2780:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV2 2781:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ICPSC_DIV4 @@ -15236,11 +15238,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CCMR1 IC1F LL_TIM_IC_GetFilter\n 2832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR1 IC2F LL_TIM_IC_GetFilter\n 2833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC3F LL_TIM_IC_GetFilter\n + ARM GAS /tmp/ccyYWdjY.s page 255 + + 2834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * CCMR2 IC4F LL_TIM_IC_GetFilter 2835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccfIOqv2.s page 255 - - 2836:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Channel This parameter can be one of the following values: 2837:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH1 2838:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_CHANNEL_CH2 @@ -15296,11 +15298,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_IC_SetPolarity(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ICPolarity 2889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** uint8_t iChannel = TIM_GET_CHANNEL_INDEX(Channel); + ARM GAS /tmp/ccyYWdjY.s page 256 + + 2891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->CCER, ((TIM_CCER_CC1NP | TIM_CCER_CC1P) << SHIFT_TAB_CCxP[iChannel]), 2892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** ICPolarity << SHIFT_TAB_CCxP[iChannel]); - ARM GAS /tmp/ccfIOqv2.s page 256 - - 2893:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 2894:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2895:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -15356,11 +15358,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 2946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->CR2, TIM_CR2_TI1S); 2947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccyYWdjY.s page 257 + + 2948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 2949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 257 - - 2950:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the TIMx_CH1, CH2 and CH3 pins are connectected to the TI1 input. 2951:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_XOR_INSTANCE(TIMx) can be used to check whether or not 2952:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * a timer instance provides an XOR input. @@ -15416,11 +15418,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval CapturedValue (between Min_Data=0 and Max_Data=65535) 3004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 258 + + 3005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IC_GetCaptureCH3(const TIM_TypeDef *TIMx) 3006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccfIOqv2.s page 258 - - 3007:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return (uint32_t)(READ_REG(TIMx->CCR3)); 3008:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3009:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** @@ -15476,11 +15478,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether external clock mode 2 is enabled. + ARM GAS /tmp/ccyYWdjY.s page 259 + + 3062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(TIMx) can be used to check 3063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance supports external clock mode2. - ARM GAS /tmp/ccfIOqv2.s page 259 - - 3064:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR ECE LL_TIM_IsEnabledExternalClock 3065:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3066:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -15523,8 +15525,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3123 .loc 5 3094 3 is_stmt 0 view .LVU1039 3124 .LBE393: 3125 .LBE392: -1301:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); - 3126 .loc 1 1301 3 is_stmt 1 view .LVU1040 +1303:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM2); + 3126 .loc 1 1303 3 is_stmt 1 view .LVU1040 3127 .LBB394: 3128 .LBI394: 3095:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15536,11 +15538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3101:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SMCR SMS LL_TIM_SetEncoderMode 3102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param EncoderMode This parameter can be one of the following values: + ARM GAS /tmp/ccyYWdjY.s page 260 + + 3104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI1 3105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X2_TI2 - ARM GAS /tmp/ccfIOqv2.s page 260 - - 3106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_ENCODERMODE_X4_TI12 3107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15586,8 +15588,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3136 .loc 5 3140 3 is_stmt 0 view .LVU1043 3137 .LBE395: 3138 .LBE394: -1302:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ - 3139 .loc 1 1302 3 is_stmt 1 view .LVU1044 +1304:Src/main.c **** /* USER CODE BEGIN TIM2_Init 2 */ + 3139 .loc 1 1304 3 is_stmt 1 view .LVU1044 3140 .LBB396: 3141 .LBI396: 3141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } @@ -15596,11 +15598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Set the trigger output 2 (TRGO2) used for ADC synchronization . 3145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @note Macro IS_TIM_TRGO2_INSTANCE(TIMx) can be used to check 3146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * whether or not a timer instance can be used for ADC synchronization. + ARM GAS /tmp/ccyYWdjY.s page 261 + + 3147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll CR2 MMS2 LL_TIM_SetTriggerOutput2 3148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer Instance - ARM GAS /tmp/ccfIOqv2.s page 261 - - 3149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param ADCSynchronization This parameter can be one of the following values: 3150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_RESET 3151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TRGO2_ENABLE @@ -15656,11 +15658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR2 3202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ITR3 3203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1F_ED + ARM GAS /tmp/ccyYWdjY.s page 262 + + 3204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI1FP1 3205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_TI2FP2 - ARM GAS /tmp/ccfIOqv2.s page 262 - - 3206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TS_ETRF 3207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -15703,8 +15705,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3149 .loc 5 3237 3 is_stmt 0 view .LVU1047 3150 .LBE397: 3151 .LBE396: -1307:Src/main.c **** - 3152 .loc 1 1307 1 view .LVU1048 +1309:Src/main.c **** + 3152 .loc 1 1309 1 view .LVU1048 3153 0082 06B0 add sp, sp, #24 3154 .LCFI29: 3155 .cfi_def_cfa_offset 8 @@ -15716,11 +15718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3161 0088 00380240 .word 1073887232 3162 008c 00ED00E0 .word -536810240 3163 0090 00E100E0 .word -536813312 + ARM GAS /tmp/ccyYWdjY.s page 263 + + 3164 0094 40D10C00 .word 840000 3165 0098 F8BFFEFF .word -81928 - ARM GAS /tmp/ccfIOqv2.s page 263 - - 3166 .cfi_endproc 3167 .LFE1195: 3169 .section .text.MX_TIM5_Init,"ax",%progbits @@ -15730,8 +15732,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3173 .thumb_func 3175 MX_TIM5_Init: 3176 .LFB1197: -1374:Src/main.c **** - 3177 .loc 1 1374 1 is_stmt 1 view -0 +1376:Src/main.c **** + 3177 .loc 1 1376 1 is_stmt 1 view -0 3178 .cfi_startproc 3179 @ args = 0, pretend = 0, frame = 24 3180 @ frame_needed = 0, uses_anonymous_args = 0 @@ -15743,18 +15745,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3186 0002 86B0 sub sp, sp, #24 3187 .LCFI31: 3188 .cfi_def_cfa_offset 32 -1380:Src/main.c **** - 3189 .loc 1 1380 3 view .LVU1050 -1380:Src/main.c **** - 3190 .loc 1 1380 22 is_stmt 0 view .LVU1051 +1382:Src/main.c **** + 3189 .loc 1 1382 3 view .LVU1050 +1382:Src/main.c **** + 3190 .loc 1 1382 22 is_stmt 0 view .LVU1051 3191 0004 0024 movs r4, #0 3192 0006 0194 str r4, [sp, #4] 3193 0008 0294 str r4, [sp, #8] 3194 000a 0394 str r4, [sp, #12] 3195 000c 0494 str r4, [sp, #16] 3196 000e 0594 str r4, [sp, #20] -1383:Src/main.c **** - 3197 .loc 1 1383 3 is_stmt 1 view .LVU1052 +1385:Src/main.c **** + 3197 .loc 1 1385 3 is_stmt 1 view .LVU1052 3198 .LVL238: 3199 .LBB398: 3200 .LBI398: @@ -15776,11 +15778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3211 001a 1B6C ldr r3, [r3, #64] 3212 001c 03F00803 and r3, r3, #8 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; + ARM GAS /tmp/ccyYWdjY.s page 264 + + 3213 .loc 3 1076 10 view .LVU1058 3214 0020 0093 str r3, [sp] - ARM GAS /tmp/ccfIOqv2.s page 264 - - 1077:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 3215 .loc 3 1077 3 is_stmt 1 view .LVU1059 3216 0022 009B ldr r3, [sp] @@ -15789,8 +15791,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3218 .loc 3 1077 3 is_stmt 0 view .LVU1060 3219 .LBE399: 3220 .LBE398: -1386:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3221 .loc 1 1386 3 is_stmt 1 view .LVU1061 +1388:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 3221 .loc 1 1388 3 is_stmt 1 view .LVU1061 3222 .LBB400: 3223 .LBI400: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -15804,8 +15806,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3229 0026 D868 ldr r0, [r3, #12] 3230 .LBE401: 3231 .LBE400: -1386:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); - 3232 .loc 1 1386 3 discriminator 1 view .LVU1065 +1388:Src/main.c **** NVIC_EnableIRQ(TIM5_IRQn); + 3232 .loc 1 1388 3 discriminator 1 view .LVU1065 3233 0028 2246 mov r2, r4 3234 002a 2146 mov r1, r4 3235 002c C0F30220 ubfx r0, r0, #8, #3 @@ -15836,11 +15838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3253 .loc 2 2028 47 view .LVU1072 3254 .LBE403: 3255 .LBE402: -1387:Src/main.c **** - 3256 .loc 1 1387 3 is_stmt 1 view .LVU1073 - ARM GAS /tmp/ccfIOqv2.s page 265 + ARM GAS /tmp/ccyYWdjY.s page 265 +1389:Src/main.c **** + 3256 .loc 1 1389 3 is_stmt 1 view .LVU1073 3257 .LBB404: 3258 .LBI404: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -15859,48 +15861,48 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3267 .loc 2 1900 43 view .LVU1078 3268 .LBE405: 3269 .LBE404: -1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3270 .loc 1 1392 3 is_stmt 1 view .LVU1079 -1392:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3271 .loc 1 1392 28 is_stmt 0 view .LVU1080 +1394:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3270 .loc 1 1394 3 is_stmt 1 view .LVU1079 +1394:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3271 .loc 1 1394 28 is_stmt 0 view .LVU1080 3272 0044 42F21073 movw r3, #10000 3273 0048 ADF80430 strh r3, [sp, #4] @ movhi -1393:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3274 .loc 1 1393 3 is_stmt 1 view .LVU1081 -1393:Src/main.c **** TIM_InitStruct.Autoreload = 560; - 3275 .loc 1 1393 30 is_stmt 0 view .LVU1082 +1395:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 3274 .loc 1 1395 3 is_stmt 1 view .LVU1081 +1395:Src/main.c **** TIM_InitStruct.Autoreload = 560; + 3275 .loc 1 1395 30 is_stmt 0 view .LVU1082 3276 004c 0294 str r4, [sp, #8] -1394:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3277 .loc 1 1394 3 is_stmt 1 view .LVU1083 -1394:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; - 3278 .loc 1 1394 29 is_stmt 0 view .LVU1084 +1396:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3277 .loc 1 1396 3 is_stmt 1 view .LVU1083 +1396:Src/main.c **** TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + 3278 .loc 1 1396 29 is_stmt 0 view .LVU1084 3279 004e 4FF40C73 mov r3, #560 3280 0052 0393 str r3, [sp, #12] -1395:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3281 .loc 1 1395 3 is_stmt 1 view .LVU1085 -1395:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); - 3282 .loc 1 1395 32 is_stmt 0 view .LVU1086 +1397:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 3281 .loc 1 1397 3 is_stmt 1 view .LVU1085 +1397:Src/main.c **** LL_TIM_Init(TIM5, &TIM_InitStruct); + 3282 .loc 1 1397 32 is_stmt 0 view .LVU1086 3283 0054 0494 str r4, [sp, #16] -1396:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); - 3284 .loc 1 1396 3 is_stmt 1 view .LVU1087 +1398:Src/main.c **** LL_TIM_DisableARRPreload(TIM5); + 3284 .loc 1 1398 3 is_stmt 1 view .LVU1087 3285 0056 0E4C ldr r4, .L119+12 3286 0058 01A9 add r1, sp, #4 3287 005a 2046 mov r0, r4 3288 005c FFF7FEFF bl LL_TIM_Init 3289 .LVL244: -1397:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); - 3290 .loc 1 1397 3 view .LVU1088 +1399:Src/main.c **** LL_TIM_SetClockSource(TIM5, LL_TIM_CLOCKSOURCE_INTERNAL); + 3290 .loc 1 1399 3 view .LVU1088 3291 .LBB406: 3292 .LBI406: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3293 .loc 5 1504 22 view .LVU1089 3294 .LBB407: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } + ARM GAS /tmp/ccyYWdjY.s page 266 + + 3295 .loc 5 1506 3 view .LVU1090 3296 0060 2368 ldr r3, [r4] - ARM GAS /tmp/ccfIOqv2.s page 266 - - 3297 0062 23F08003 bic r3, r3, #128 3298 0066 2360 str r3, [r4] 3299 .LVL245: @@ -15908,8 +15910,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3300 .loc 5 1506 3 is_stmt 0 view .LVU1091 3301 .LBE407: 3302 .LBE406: -1398:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); - 3303 .loc 1 1398 3 is_stmt 1 view .LVU1092 +1400:Src/main.c **** LL_TIM_SetTriggerOutput(TIM5, LL_TIM_TRGO_RESET); + 3303 .loc 1 1400 3 is_stmt 1 view .LVU1092 3304 .LBB408: 3305 .LBI408: 3092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15926,8 +15928,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3314 .loc 5 3094 3 is_stmt 0 view .LVU1095 3315 .LBE409: 3316 .LBE408: -1399:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); - 3317 .loc 1 1399 3 is_stmt 1 view .LVU1096 +1401:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM5); + 3317 .loc 1 1401 3 is_stmt 1 view .LVU1096 3318 .LBB410: 3319 .LBI410: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15943,8 +15945,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3327 .loc 5 3140 3 is_stmt 0 view .LVU1099 3328 .LBE411: 3329 .LBE410: -1400:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ - 3330 .loc 1 1400 3 is_stmt 1 view .LVU1100 +1402:Src/main.c **** /* USER CODE BEGIN TIM5_Init 2 */ + 3330 .loc 1 1402 3 is_stmt 1 view .LVU1100 3331 .LBB412: 3332 .LBI412: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -15956,13 +15958,13 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3338 007e A360 str r3, [r4, #8] 3339 .LVL248: 3340 .loc 5 3237 3 is_stmt 0 view .LVU1103 + ARM GAS /tmp/ccyYWdjY.s page 267 + + 3341 .LBE413: 3342 .LBE412: - ARM GAS /tmp/ccfIOqv2.s page 267 - - -1405:Src/main.c **** - 3343 .loc 1 1405 1 view .LVU1104 +1407:Src/main.c **** + 3343 .loc 1 1407 1 view .LVU1104 3344 0080 06B0 add sp, sp, #24 3345 .LCFI32: 3346 .cfi_def_cfa_offset 8 @@ -15985,8 +15987,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3364 .thumb_func 3366 MX_TIM7_Init: 3367 .LFB1199: -1450:Src/main.c **** - 3368 .loc 1 1450 1 is_stmt 1 view -0 +1452:Src/main.c **** + 3368 .loc 1 1452 1 is_stmt 1 view -0 3369 .cfi_startproc 3370 @ args = 0, pretend = 0, frame = 24 3371 @ frame_needed = 0, uses_anonymous_args = 0 @@ -15998,29 +16000,29 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3377 0002 86B0 sub sp, sp, #24 3378 .LCFI34: 3379 .cfi_def_cfa_offset 32 -1456:Src/main.c **** - 3380 .loc 1 1456 3 view .LVU1106 -1456:Src/main.c **** - 3381 .loc 1 1456 22 is_stmt 0 view .LVU1107 +1458:Src/main.c **** + 3380 .loc 1 1458 3 view .LVU1106 +1458:Src/main.c **** + 3381 .loc 1 1458 22 is_stmt 0 view .LVU1107 3382 0004 0024 movs r4, #0 3383 0006 0194 str r4, [sp, #4] 3384 0008 0294 str r4, [sp, #8] 3385 000a 0394 str r4, [sp, #12] 3386 000c 0494 str r4, [sp, #16] 3387 000e 0594 str r4, [sp, #20] -1459:Src/main.c **** - 3388 .loc 1 1459 3 is_stmt 1 view .LVU1108 +1461:Src/main.c **** + 3388 .loc 1 1461 3 is_stmt 1 view .LVU1108 3389 .LVL249: 3390 .LBB414: 3391 .LBI414: 1071:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 3392 .loc 3 1071 22 view .LVU1109 3393 .LBB415: + ARM GAS /tmp/ccyYWdjY.s page 268 + + 1073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** SET_BIT(RCC->APB1ENR, Periphs); 3394 .loc 3 1073 3 view .LVU1110 - ARM GAS /tmp/ccfIOqv2.s page 268 - - 1074:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** /* Delay after an RCC peripheral clock enabling */ 3395 .loc 3 1074 3 view .LVU1111 3396 0010 1A4B ldr r3, .L123 @@ -16044,8 +16046,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3409 .loc 3 1077 3 is_stmt 0 view .LVU1116 3410 .LBE415: 3411 .LBE414: -1462:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 3412 .loc 1 1462 3 is_stmt 1 view .LVU1117 +1464:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 3412 .loc 1 1464 3 is_stmt 1 view .LVU1117 3413 .LBB416: 3414 .LBI416: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16059,8 +16061,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3420 0026 D868 ldr r0, [r3, #12] 3421 .LBE417: 3422 .LBE416: -1462:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); - 3423 .loc 1 1462 3 discriminator 1 view .LVU1121 +1464:Src/main.c **** NVIC_EnableIRQ(TIM7_IRQn); + 3423 .loc 1 1464 3 discriminator 1 view .LVU1121 3424 0028 2246 mov r2, r4 3425 002a 2146 mov r1, r4 3426 002c C0F30220 ubfx r0, r0, #8, #3 @@ -16076,11 +16078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3434 .loc 2 2028 5 view .LVU1124 2028:Drivers/CMSIS/Include/core_cm7.h **** } + ARM GAS /tmp/ccyYWdjY.s page 269 + + 3435 .loc 2 2028 49 is_stmt 0 view .LVU1125 3436 0034 0001 lsls r0, r0, #4 - ARM GAS /tmp/ccfIOqv2.s page 269 - - 3437 .LVL252: 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3438 .loc 2 2028 49 view .LVU1126 @@ -16094,8 +16096,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3444 .loc 2 2028 47 view .LVU1128 3445 .LBE419: 3446 .LBE418: -1463:Src/main.c **** - 3447 .loc 1 1463 3 is_stmt 1 view .LVU1129 +1465:Src/main.c **** + 3447 .loc 1 1465 3 is_stmt 1 view .LVU1129 3448 .LBB420: 3449 .LBI420: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16114,35 +16116,35 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3458 .loc 2 1900 43 view .LVU1134 3459 .LBE421: 3460 .LBE420: -1468:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3461 .loc 1 1468 3 is_stmt 1 view .LVU1135 -1468:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3462 .loc 1 1468 28 is_stmt 0 view .LVU1136 +1470:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3461 .loc 1 1470 3 is_stmt 1 view .LVU1135 +1470:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3462 .loc 1 1470 28 is_stmt 0 view .LVU1136 3463 0044 40F29733 movw r3, #919 3464 0048 ADF80430 strh r3, [sp, #4] @ movhi -1469:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 3465 .loc 1 1469 3 is_stmt 1 view .LVU1137 -1469:Src/main.c **** TIM_InitStruct.Autoreload = 99; - 3466 .loc 1 1469 30 is_stmt 0 view .LVU1138 +1471:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 3465 .loc 1 1471 3 is_stmt 1 view .LVU1137 +1471:Src/main.c **** TIM_InitStruct.Autoreload = 99; + 3466 .loc 1 1471 30 is_stmt 0 view .LVU1138 3467 004c 0294 str r4, [sp, #8] -1470:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3468 .loc 1 1470 3 is_stmt 1 view .LVU1139 -1470:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); - 3469 .loc 1 1470 29 is_stmt 0 view .LVU1140 +1472:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 3468 .loc 1 1472 3 is_stmt 1 view .LVU1139 +1472:Src/main.c **** LL_TIM_Init(TIM7, &TIM_InitStruct); + 3469 .loc 1 1472 29 is_stmt 0 view .LVU1140 3470 004e 6323 movs r3, #99 3471 0050 0393 str r3, [sp, #12] -1471:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); - 3472 .loc 1 1471 3 is_stmt 1 view .LVU1141 +1473:Src/main.c **** LL_TIM_DisableARRPreload(TIM7); + 3472 .loc 1 1473 3 is_stmt 1 view .LVU1141 3473 0052 0D4C ldr r4, .L123+12 3474 0054 01A9 add r1, sp, #4 3475 0056 2046 mov r0, r4 + ARM GAS /tmp/ccyYWdjY.s page 270 + + 3476 0058 FFF7FEFF bl LL_TIM_Init 3477 .LVL255: - ARM GAS /tmp/ccfIOqv2.s page 270 - - -1472:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); - 3478 .loc 1 1472 3 view .LVU1142 +1474:Src/main.c **** LL_TIM_SetTriggerOutput(TIM7, LL_TIM_TRGO_ENABLE); + 3478 .loc 1 1474 3 view .LVU1142 3479 .LBB422: 3480 .LBI422: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16158,8 +16160,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3488 .loc 5 1506 3 is_stmt 0 view .LVU1145 3489 .LBE423: 3490 .LBE422: -1473:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); - 3491 .loc 1 1473 3 is_stmt 1 view .LVU1146 +1475:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM7); + 3491 .loc 1 1475 3 is_stmt 1 view .LVU1146 3492 .LBB424: 3493 .LBI424: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16176,8 +16178,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3502 .loc 5 3140 3 is_stmt 0 view .LVU1149 3503 .LBE425: 3504 .LBE424: -1474:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ - 3505 .loc 1 1474 3 is_stmt 1 view .LVU1150 +1476:Src/main.c **** /* USER CODE BEGIN TIM7_Init 2 */ + 3505 .loc 1 1476 3 is_stmt 1 view .LVU1150 3506 .LBB426: 3507 .LBI426: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16191,16 +16193,16 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3515 .loc 5 3237 3 is_stmt 0 view .LVU1153 3516 .LBE427: 3517 .LBE426: -1479:Src/main.c **** - 3518 .loc 1 1479 1 view .LVU1154 +1481:Src/main.c **** + 3518 .loc 1 1481 1 view .LVU1154 3519 0078 06B0 add sp, sp, #24 3520 .LCFI35: 3521 .cfi_def_cfa_offset 8 + ARM GAS /tmp/ccyYWdjY.s page 271 + + 3522 @ sp needed 3523 007a 10BD pop {r4, pc} - ARM GAS /tmp/ccfIOqv2.s page 271 - - 3524 .L124: 3525 .align 2 3526 .L123: @@ -16217,8 +16219,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3538 .thumb_func 3540 MX_TIM6_Init: 3541 .LFB1198: -1413:Src/main.c **** - 3542 .loc 1 1413 1 is_stmt 1 view -0 +1415:Src/main.c **** + 3542 .loc 1 1415 1 is_stmt 1 view -0 3543 .cfi_startproc 3544 @ args = 0, pretend = 0, frame = 24 3545 @ frame_needed = 0, uses_anonymous_args = 0 @@ -16230,18 +16232,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3551 0002 86B0 sub sp, sp, #24 3552 .LCFI37: 3553 .cfi_def_cfa_offset 32 -1419:Src/main.c **** - 3554 .loc 1 1419 3 view .LVU1156 -1419:Src/main.c **** - 3555 .loc 1 1419 22 is_stmt 0 view .LVU1157 +1421:Src/main.c **** + 3554 .loc 1 1421 3 view .LVU1156 +1421:Src/main.c **** + 3555 .loc 1 1421 22 is_stmt 0 view .LVU1157 3556 0004 0024 movs r4, #0 3557 0006 0194 str r4, [sp, #4] 3558 0008 0294 str r4, [sp, #8] 3559 000a 0394 str r4, [sp, #12] 3560 000c 0494 str r4, [sp, #16] 3561 000e 0594 str r4, [sp, #20] -1422:Src/main.c **** - 3562 .loc 1 1422 3 is_stmt 1 view .LVU1158 +1424:Src/main.c **** + 3562 .loc 1 1424 3 is_stmt 1 view .LVU1158 3563 .LVL259: 3564 .LBB428: 3565 .LBI428: @@ -16256,11 +16258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3571 0012 1A6C ldr r2, [r3, #64] 3572 0014 42F01002 orr r2, r2, #16 3573 0018 1A64 str r2, [r3, #64] + ARM GAS /tmp/ccyYWdjY.s page 272 + + 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 3574 .loc 3 1076 3 view .LVU1162 - ARM GAS /tmp/ccfIOqv2.s page 272 - - 1076:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** (void)tmpreg; 3575 .loc 3 1076 12 is_stmt 0 view .LVU1163 3576 001a 1B6C ldr r3, [r3, #64] @@ -16276,8 +16278,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3583 .loc 3 1077 3 is_stmt 0 view .LVU1166 3584 .LBE429: 3585 .LBE428: -1425:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3586 .loc 1 1425 3 is_stmt 1 view .LVU1167 +1427:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 3586 .loc 1 1427 3 is_stmt 1 view .LVU1167 3587 .LBB430: 3588 .LBI430: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16291,8 +16293,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3594 0026 D868 ldr r0, [r3, #12] 3595 .LBE431: 3596 .LBE430: -1425:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); - 3597 .loc 1 1425 3 discriminator 1 view .LVU1171 +1427:Src/main.c **** NVIC_EnableIRQ(TIM6_DAC_IRQn); + 3597 .loc 1 1427 3 discriminator 1 view .LVU1171 3598 0028 2246 mov r2, r4 3599 002a 2146 mov r1, r4 3600 002c C0F30220 ubfx r0, r0, #8, #3 @@ -16316,18 +16318,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3613 0036 C0B2 uxtb r0, r0 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3614 .loc 2 2028 47 view .LVU1177 + ARM GAS /tmp/ccyYWdjY.s page 273 + + 3615 0038 124B ldr r3, .L127+8 3616 003a 83F83603 strb r0, [r3, #822] - ARM GAS /tmp/ccfIOqv2.s page 273 - - 3617 .LVL263: 2028:Drivers/CMSIS/Include/core_cm7.h **** } 3618 .loc 2 2028 47 view .LVU1178 3619 .LBE433: 3620 .LBE432: -1426:Src/main.c **** - 3621 .loc 1 1426 3 is_stmt 1 view .LVU1179 +1428:Src/main.c **** + 3621 .loc 1 1428 3 is_stmt 1 view .LVU1179 3622 .LBB434: 3623 .LBI434: 1896:Drivers/CMSIS/Include/core_cm7.h **** { @@ -16346,41 +16348,41 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3632 .loc 2 1900 43 view .LVU1184 3633 .LBE435: 3634 .LBE434: -1431:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3635 .loc 1 1431 3 is_stmt 1 view .LVU1185 -1431:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; - 3636 .loc 1 1431 28 is_stmt 0 view .LVU1186 +1433:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3635 .loc 1 1433 3 is_stmt 1 view .LVU1185 +1433:Src/main.c **** TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + 3636 .loc 1 1433 28 is_stmt 0 view .LVU1186 3637 0044 4BF2AF33 movw r3, #45999 3638 0048 ADF80430 strh r3, [sp, #4] @ movhi -1432:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3639 .loc 1 1432 3 is_stmt 1 view .LVU1187 -1432:Src/main.c **** TIM_InitStruct.Autoreload = 19; - 3640 .loc 1 1432 30 is_stmt 0 view .LVU1188 +1434:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 3639 .loc 1 1434 3 is_stmt 1 view .LVU1187 +1434:Src/main.c **** TIM_InitStruct.Autoreload = 19; + 3640 .loc 1 1434 30 is_stmt 0 view .LVU1188 3641 004c 0294 str r4, [sp, #8] -1433:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 3642 .loc 1 1433 3 is_stmt 1 view .LVU1189 -1433:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); - 3643 .loc 1 1433 29 is_stmt 0 view .LVU1190 +1435:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 3642 .loc 1 1435 3 is_stmt 1 view .LVU1189 +1435:Src/main.c **** LL_TIM_Init(TIM6, &TIM_InitStruct); + 3643 .loc 1 1435 29 is_stmt 0 view .LVU1190 3644 004e 1323 movs r3, #19 3645 0050 0393 str r3, [sp, #12] -1434:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); - 3646 .loc 1 1434 3 is_stmt 1 view .LVU1191 +1436:Src/main.c **** LL_TIM_DisableARRPreload(TIM6); + 3646 .loc 1 1436 3 is_stmt 1 view .LVU1191 3647 0052 0D4C ldr r4, .L127+12 3648 0054 01A9 add r1, sp, #4 3649 0056 2046 mov r0, r4 3650 0058 FFF7FEFF bl LL_TIM_Init 3651 .LVL265: -1435:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); - 3652 .loc 1 1435 3 view .LVU1192 +1437:Src/main.c **** LL_TIM_SetTriggerOutput(TIM6, LL_TIM_TRGO_ENABLE); + 3652 .loc 1 1437 3 view .LVU1192 3653 .LBB436: 3654 .LBI436: 1504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3655 .loc 5 1504 22 view .LVU1193 + ARM GAS /tmp/ccyYWdjY.s page 274 + + 3656 .LBB437: 1506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 274 - - 3657 .loc 5 1506 3 view .LVU1194 3658 005c 2368 ldr r3, [r4] 3659 005e 23F08003 bic r3, r3, #128 @@ -16390,8 +16392,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3662 .loc 5 1506 3 is_stmt 0 view .LVU1195 3663 .LBE437: 3664 .LBE436: -1436:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); - 3665 .loc 1 1436 3 is_stmt 1 view .LVU1196 +1438:Src/main.c **** LL_TIM_DisableMasterSlaveMode(TIM6); + 3665 .loc 1 1438 3 is_stmt 1 view .LVU1196 3666 .LBB438: 3667 .LBI438: 3138:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16408,8 +16410,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3676 .loc 5 3140 3 is_stmt 0 view .LVU1199 3677 .LBE439: 3678 .LBE438: -1437:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ - 3679 .loc 1 1437 3 is_stmt 1 view .LVU1200 +1439:Src/main.c **** /* USER CODE BEGIN TIM6_Init 2 */ + 3679 .loc 1 1439 3 is_stmt 1 view .LVU1200 3680 .LBB440: 3681 .LBI440: 3235:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -16423,8 +16425,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3689 .loc 5 3237 3 is_stmt 0 view .LVU1203 3690 .LBE441: 3691 .LBE440: -1442:Src/main.c **** - 3692 .loc 1 1442 1 view .LVU1204 +1444:Src/main.c **** + 3692 .loc 1 1444 1 view .LVU1204 3693 0078 06B0 add sp, sp, #24 3694 .LCFI38: 3695 .cfi_def_cfa_offset 8 @@ -16436,11 +16438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3701 007c 00380240 .word 1073887232 3702 0080 00ED00E0 .word -536810240 3703 0084 00E100E0 .word -536813312 + ARM GAS /tmp/ccyYWdjY.s page 275 + + 3704 0088 00100040 .word 1073745920 3705 .cfi_endproc - ARM GAS /tmp/ccfIOqv2.s page 275 - - 3706 .LFE1198: 3708 .section .rodata.Init_params.str1.4,"aMS",%progbits,1 3709 .align 2 @@ -16458,8 +16460,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3719 .thumb_func 3721 Init_params: 3722 .LFB1207: -1910:Src/main.c **** TO6 = 0; - 3723 .loc 1 1910 1 is_stmt 1 view -0 +1912:Src/main.c **** TO6 = 0; + 3723 .loc 1 1912 1 is_stmt 1 view -0 3724 .cfi_startproc 3725 @ args = 0, pretend = 0, frame = 0 3726 @ frame_needed = 0, uses_anonymous_args = 0 @@ -16472,275 +16474,275 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3733 .cfi_offset 7, -12 3734 .cfi_offset 8, -8 3735 .cfi_offset 14, -4 -1911:Src/main.c **** TO7 = 0; - 3736 .loc 1 1911 2 view .LVU1206 -1911:Src/main.c **** TO7 = 0; - 3737 .loc 1 1911 6 is_stmt 0 view .LVU1207 +1913:Src/main.c **** TO7 = 0; + 3736 .loc 1 1913 2 view .LVU1206 +1913:Src/main.c **** TO7 = 0; + 3737 .loc 1 1913 6 is_stmt 0 view .LVU1207 3738 0004 0023 movs r3, #0 3739 0006 9E4A ldr r2, .L141 3740 0008 1360 str r3, [r2] -1912:Src/main.c **** TO7_before = 0; - 3741 .loc 1 1912 2 is_stmt 1 view .LVU1208 -1912:Src/main.c **** TO7_before = 0; - 3742 .loc 1 1912 6 is_stmt 0 view .LVU1209 +1914:Src/main.c **** TO7_before = 0; + 3741 .loc 1 1914 2 is_stmt 1 view .LVU1208 +1914:Src/main.c **** TO7_before = 0; + 3742 .loc 1 1914 6 is_stmt 0 view .LVU1209 3743 000a 9E4A ldr r2, .L141+4 3744 000c 1360 str r3, [r2] -1913:Src/main.c **** TO6_before = 0; - 3745 .loc 1 1913 2 is_stmt 1 view .LVU1210 -1913:Src/main.c **** TO6_before = 0; - 3746 .loc 1 1913 13 is_stmt 0 view .LVU1211 +1915:Src/main.c **** TO6_before = 0; + 3745 .loc 1 1915 2 is_stmt 1 view .LVU1210 +1915:Src/main.c **** TO6_before = 0; + 3746 .loc 1 1915 13 is_stmt 0 view .LVU1211 3747 000e 9E4A ldr r2, .L141+8 3748 0010 1360 str r3, [r2] -1914:Src/main.c **** TO6_uart = 0; - 3749 .loc 1 1914 2 is_stmt 1 view .LVU1212 -1914:Src/main.c **** TO6_uart = 0; - 3750 .loc 1 1914 13 is_stmt 0 view .LVU1213 +1916:Src/main.c **** TO6_uart = 0; + 3749 .loc 1 1916 2 is_stmt 1 view .LVU1212 +1916:Src/main.c **** TO6_uart = 0; + 3750 .loc 1 1916 13 is_stmt 0 view .LVU1213 3751 0012 9E4A ldr r2, .L141+12 + ARM GAS /tmp/ccyYWdjY.s page 276 + + 3752 0014 1360 str r3, [r2] -1915:Src/main.c **** flg_tmt = 0; - ARM GAS /tmp/ccfIOqv2.s page 276 - - - 3753 .loc 1 1915 2 is_stmt 1 view .LVU1214 -1915:Src/main.c **** flg_tmt = 0; - 3754 .loc 1 1915 11 is_stmt 0 view .LVU1215 +1917:Src/main.c **** flg_tmt = 0; + 3753 .loc 1 1917 2 is_stmt 1 view .LVU1214 +1917:Src/main.c **** flg_tmt = 0; + 3754 .loc 1 1917 11 is_stmt 0 view .LVU1215 3755 0016 9E4A ldr r2, .L141+16 3756 0018 1360 str r3, [r2] -1916:Src/main.c **** UART_rec_incr = 0; - 3757 .loc 1 1916 2 is_stmt 1 view .LVU1216 -1916:Src/main.c **** UART_rec_incr = 0; - 3758 .loc 1 1916 10 is_stmt 0 view .LVU1217 +1918:Src/main.c **** UART_rec_incr = 0; + 3757 .loc 1 1918 2 is_stmt 1 view .LVU1216 +1918:Src/main.c **** UART_rec_incr = 0; + 3758 .loc 1 1918 10 is_stmt 0 view .LVU1217 3759 001a 9E4A ldr r2, .L141+20 3760 001c 1370 strb r3, [r2] -1917:Src/main.c **** fgoto = 0; - 3761 .loc 1 1917 2 is_stmt 1 view .LVU1218 -1917:Src/main.c **** fgoto = 0; - 3762 .loc 1 1917 16 is_stmt 0 view .LVU1219 +1919:Src/main.c **** fgoto = 0; + 3761 .loc 1 1919 2 is_stmt 1 view .LVU1218 +1919:Src/main.c **** fgoto = 0; + 3762 .loc 1 1919 16 is_stmt 0 view .LVU1219 3763 001e 9E4A ldr r2, .L141+24 3764 0020 1380 strh r3, [r2] @ movhi -1918:Src/main.c **** sizeoffile = 0; - 3765 .loc 1 1918 2 is_stmt 1 view .LVU1220 -1918:Src/main.c **** sizeoffile = 0; - 3766 .loc 1 1918 8 is_stmt 0 view .LVU1221 +1920:Src/main.c **** sizeoffile = 0; + 3765 .loc 1 1920 2 is_stmt 1 view .LVU1220 +1920:Src/main.c **** sizeoffile = 0; + 3766 .loc 1 1920 8 is_stmt 0 view .LVU1221 3767 0022 9E4A ldr r2, .L141+28 3768 0024 1360 str r3, [r2] -1919:Src/main.c **** u_tx_flg = 0; - 3769 .loc 1 1919 2 is_stmt 1 view .LVU1222 -1919:Src/main.c **** u_tx_flg = 0; - 3770 .loc 1 1919 13 is_stmt 0 view .LVU1223 +1921:Src/main.c **** u_tx_flg = 0; + 3769 .loc 1 1921 2 is_stmt 1 view .LVU1222 +1921:Src/main.c **** u_tx_flg = 0; + 3770 .loc 1 1921 13 is_stmt 0 view .LVU1223 3771 0026 9E4A ldr r2, .L141+32 3772 0028 1360 str r3, [r2] -1920:Src/main.c **** u_rx_flg = 0; - 3773 .loc 1 1920 2 is_stmt 1 view .LVU1224 -1920:Src/main.c **** u_rx_flg = 0; - 3774 .loc 1 1920 11 is_stmt 0 view .LVU1225 +1922:Src/main.c **** u_rx_flg = 0; + 3773 .loc 1 1922 2 is_stmt 1 view .LVU1224 +1922:Src/main.c **** u_rx_flg = 0; + 3774 .loc 1 1922 11 is_stmt 0 view .LVU1225 3775 002a 9E4A ldr r2, .L141+36 3776 002c 1370 strb r3, [r2] -1921:Src/main.c **** //State_Data[0]=0; - 3777 .loc 1 1921 2 is_stmt 1 view .LVU1226 -1921:Src/main.c **** //State_Data[0]=0; - 3778 .loc 1 1921 11 is_stmt 0 view .LVU1227 +1923:Src/main.c **** //State_Data[0]=0; + 3777 .loc 1 1923 2 is_stmt 1 view .LVU1226 +1923:Src/main.c **** //State_Data[0]=0; + 3778 .loc 1 1923 11 is_stmt 0 view .LVU1227 3779 002e 9E4A ldr r2, .L141+40 3780 0030 1370 strb r3, [r2] -1924:Src/main.c **** { - 3781 .loc 1 1924 2 is_stmt 1 view .LVU1228 +1926:Src/main.c **** { + 3781 .loc 1 1926 2 is_stmt 1 view .LVU1228 3782 .LBB442: -1924:Src/main.c **** { - 3783 .loc 1 1924 7 view .LVU1229 +1926:Src/main.c **** { + 3783 .loc 1 1926 7 view .LVU1229 3784 .LVL269: -1924:Src/main.c **** { - 3785 .loc 1 1924 2 is_stmt 0 view .LVU1230 +1926:Src/main.c **** { + 3785 .loc 1 1926 2 is_stmt 0 view .LVU1230 3786 0032 05E0 b .L130 3787 .LVL270: 3788 .L131: -1926:Src/main.c **** } - 3789 .loc 1 1926 3 is_stmt 1 view .LVU1231 -1926:Src/main.c **** } - 3790 .loc 1 1926 16 is_stmt 0 view .LVU1232 +1928:Src/main.c **** } + 3789 .loc 1 1928 3 is_stmt 1 view .LVU1231 +1928:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 277 + + + 3790 .loc 1 1928 16 is_stmt 0 view .LVU1232 3791 0034 9D4A ldr r2, .L141+44 - ARM GAS /tmp/ccfIOqv2.s page 277 - - 3792 0036 0021 movs r1, #0 3793 0038 22F81310 strh r1, [r2, r3, lsl #1] @ movhi -1924:Src/main.c **** { - 3794 .loc 1 1924 31 is_stmt 1 discriminator 3 view .LVU1233 +1926:Src/main.c **** { + 3794 .loc 1 1926 31 is_stmt 1 discriminator 3 view .LVU1233 3795 003c 0133 adds r3, r3, #1 3796 .LVL271: -1924:Src/main.c **** { - 3797 .loc 1 1924 31 is_stmt 0 discriminator 3 view .LVU1234 +1926:Src/main.c **** { + 3797 .loc 1 1926 31 is_stmt 0 discriminator 3 view .LVU1234 3798 003e 9BB2 uxth r3, r3 3799 .LVL272: 3800 .L130: -1924:Src/main.c **** { - 3801 .loc 1 1924 22 is_stmt 1 discriminator 1 view .LVU1235 +1926:Src/main.c **** { + 3801 .loc 1 1926 22 is_stmt 1 discriminator 1 view .LVU1235 3802 0040 0E2B cmp r3, #14 3803 0042 F7D9 bls .L131 3804 .LBE442: -1928:Src/main.c **** - 3805 .loc 1 1928 2 view .LVU1236 -1928:Src/main.c **** - 3806 .loc 1 1928 14 is_stmt 0 view .LVU1237 +1930:Src/main.c **** + 3805 .loc 1 1930 2 view .LVU1236 +1930:Src/main.c **** + 3806 .loc 1 1930 14 is_stmt 0 view .LVU1237 3807 0044 994B ldr r3, .L141+44 3808 .LVL273: -1928:Src/main.c **** - 3809 .loc 1 1928 14 view .LVU1238 +1930:Src/main.c **** + 3809 .loc 1 1930 14 view .LVU1238 3810 0046 41F21112 movw r2, #4369 3811 004a 1A80 strh r2, [r3] @ movhi -1931:Src/main.c **** Def_setup.LD1_EN = 0; - 3812 .loc 1 1931 2 is_stmt 1 view .LVU1239 -1931:Src/main.c **** Def_setup.LD1_EN = 0; - 3813 .loc 1 1931 21 is_stmt 0 view .LVU1240 +1933:Src/main.c **** Def_setup.LD1_EN = 0; + 3812 .loc 1 1933 2 is_stmt 1 view .LVU1239 +1933:Src/main.c **** Def_setup.LD1_EN = 0; + 3813 .loc 1 1933 21 is_stmt 0 view .LVU1240 3814 004c 984B ldr r3, .L141+48 3815 004e 0022 movs r2, #0 3816 0050 DA81 strh r2, [r3, #14] @ movhi -1932:Src/main.c **** Def_setup.LD2_EN = 0; - 3817 .loc 1 1932 2 is_stmt 1 view .LVU1241 -1932:Src/main.c **** Def_setup.LD2_EN = 0; - 3818 .loc 1 1932 19 is_stmt 0 view .LVU1242 +1934:Src/main.c **** Def_setup.LD2_EN = 0; + 3817 .loc 1 1934 2 is_stmt 1 view .LVU1241 +1934:Src/main.c **** Def_setup.LD2_EN = 0; + 3818 .loc 1 1934 19 is_stmt 0 view .LVU1242 3819 0052 DA70 strb r2, [r3, #3] -1933:Src/main.c **** Def_setup.MES_ID = 0; - 3820 .loc 1 1933 2 is_stmt 1 view .LVU1243 -1933:Src/main.c **** Def_setup.MES_ID = 0; - 3821 .loc 1 1933 19 is_stmt 0 view .LVU1244 +1935:Src/main.c **** Def_setup.MES_ID = 0; + 3820 .loc 1 1935 2 is_stmt 1 view .LVU1243 +1935:Src/main.c **** Def_setup.MES_ID = 0; + 3821 .loc 1 1935 19 is_stmt 0 view .LVU1244 3822 0054 1A71 strb r2, [r3, #4] -1934:Src/main.c **** Def_setup.PI1_RD = 0; - 3823 .loc 1 1934 2 is_stmt 1 view .LVU1245 -1934:Src/main.c **** Def_setup.PI1_RD = 0; - 3824 .loc 1 1934 19 is_stmt 0 view .LVU1246 +1936:Src/main.c **** Def_setup.PI1_RD = 0; + 3823 .loc 1 1936 2 is_stmt 1 view .LVU1245 +1936:Src/main.c **** Def_setup.PI1_RD = 0; + 3824 .loc 1 1936 19 is_stmt 0 view .LVU1246 3825 0056 1A82 strh r2, [r3, #16] @ movhi -1935:Src/main.c **** Def_setup.PI2_RD = 0; - 3826 .loc 1 1935 2 is_stmt 1 view .LVU1247 -1935:Src/main.c **** Def_setup.PI2_RD = 0; - 3827 .loc 1 1935 19 is_stmt 0 view .LVU1248 +1937:Src/main.c **** Def_setup.PI2_RD = 0; + 3826 .loc 1 1937 2 is_stmt 1 view .LVU1247 +1937:Src/main.c **** Def_setup.PI2_RD = 0; + 3827 .loc 1 1937 19 is_stmt 0 view .LVU1248 3828 0058 1A73 strb r2, [r3, #12] -1936:Src/main.c **** Def_setup.REF1_EN = 0; - 3829 .loc 1 1936 2 is_stmt 1 view .LVU1249 -1936:Src/main.c **** Def_setup.REF1_EN = 0; - 3830 .loc 1 1936 19 is_stmt 0 view .LVU1250 - ARM GAS /tmp/ccfIOqv2.s page 278 +1938:Src/main.c **** Def_setup.REF1_EN = 0; + 3829 .loc 1 1938 2 is_stmt 1 view .LVU1249 + ARM GAS /tmp/ccyYWdjY.s page 278 +1938:Src/main.c **** Def_setup.REF1_EN = 0; + 3830 .loc 1 1938 19 is_stmt 0 view .LVU1250 3831 005a 5A73 strb r2, [r3, #13] -1937:Src/main.c **** Def_setup.REF2_EN = 0; - 3832 .loc 1 1937 2 is_stmt 1 view .LVU1251 -1937:Src/main.c **** Def_setup.REF2_EN = 0; - 3833 .loc 1 1937 20 is_stmt 0 view .LVU1252 +1939:Src/main.c **** Def_setup.REF2_EN = 0; + 3832 .loc 1 1939 2 is_stmt 1 view .LVU1251 +1939:Src/main.c **** Def_setup.REF2_EN = 0; + 3833 .loc 1 1939 20 is_stmt 0 view .LVU1252 3834 005c 5A71 strb r2, [r3, #5] -1938:Src/main.c **** Def_setup.SD_EN = 0; - 3835 .loc 1 1938 2 is_stmt 1 view .LVU1253 -1938:Src/main.c **** Def_setup.SD_EN = 0; - 3836 .loc 1 1938 20 is_stmt 0 view .LVU1254 +1940:Src/main.c **** Def_setup.SD_EN = 0; + 3835 .loc 1 1940 2 is_stmt 1 view .LVU1253 +1940:Src/main.c **** Def_setup.SD_EN = 0; + 3836 .loc 1 1940 20 is_stmt 0 view .LVU1254 3837 005e 9A71 strb r2, [r3, #6] -1939:Src/main.c **** Def_setup.TEC1_EN = 0; - 3838 .loc 1 1939 2 is_stmt 1 view .LVU1255 -1939:Src/main.c **** Def_setup.TEC1_EN = 0; - 3839 .loc 1 1939 18 is_stmt 0 view .LVU1256 +1941:Src/main.c **** Def_setup.TEC1_EN = 0; + 3838 .loc 1 1941 2 is_stmt 1 view .LVU1255 +1941:Src/main.c **** Def_setup.TEC1_EN = 0; + 3839 .loc 1 1941 18 is_stmt 0 view .LVU1256 3840 0060 DA72 strb r2, [r3, #11] -1940:Src/main.c **** Def_setup.TEC2_EN = 0; - 3841 .loc 1 1940 2 is_stmt 1 view .LVU1257 -1940:Src/main.c **** Def_setup.TEC2_EN = 0; - 3842 .loc 1 1940 20 is_stmt 0 view .LVU1258 +1942:Src/main.c **** Def_setup.TEC2_EN = 0; + 3841 .loc 1 1942 2 is_stmt 1 view .LVU1257 +1942:Src/main.c **** Def_setup.TEC2_EN = 0; + 3842 .loc 1 1942 20 is_stmt 0 view .LVU1258 3843 0062 DA71 strb r2, [r3, #7] -1941:Src/main.c **** Def_setup.TS1_EN = 0; - 3844 .loc 1 1941 2 is_stmt 1 view .LVU1259 -1941:Src/main.c **** Def_setup.TS1_EN = 0; - 3845 .loc 1 1941 20 is_stmt 0 view .LVU1260 +1943:Src/main.c **** Def_setup.TS1_EN = 0; + 3844 .loc 1 1943 2 is_stmt 1 view .LVU1259 +1943:Src/main.c **** Def_setup.TS1_EN = 0; + 3845 .loc 1 1943 20 is_stmt 0 view .LVU1260 3846 0064 1A72 strb r2, [r3, #8] -1942:Src/main.c **** Def_setup.TS2_EN = 0; - 3847 .loc 1 1942 2 is_stmt 1 view .LVU1261 -1942:Src/main.c **** Def_setup.TS2_EN = 0; - 3848 .loc 1 1942 19 is_stmt 0 view .LVU1262 +1944:Src/main.c **** Def_setup.TS2_EN = 0; + 3847 .loc 1 1944 2 is_stmt 1 view .LVU1261 +1944:Src/main.c **** Def_setup.TS2_EN = 0; + 3848 .loc 1 1944 19 is_stmt 0 view .LVU1262 3849 0066 5A72 strb r2, [r3, #9] -1943:Src/main.c **** Def_setup.U5V1_EN = 0; - 3850 .loc 1 1943 2 is_stmt 1 view .LVU1263 -1943:Src/main.c **** Def_setup.U5V1_EN = 0; - 3851 .loc 1 1943 19 is_stmt 0 view .LVU1264 +1945:Src/main.c **** Def_setup.U5V1_EN = 0; + 3850 .loc 1 1945 2 is_stmt 1 view .LVU1263 +1945:Src/main.c **** Def_setup.U5V1_EN = 0; + 3851 .loc 1 1945 19 is_stmt 0 view .LVU1264 3852 0068 9A72 strb r2, [r3, #10] -1944:Src/main.c **** Def_setup.U5V2_EN = 0; - 3853 .loc 1 1944 2 is_stmt 1 view .LVU1265 -1944:Src/main.c **** Def_setup.U5V2_EN = 0; - 3854 .loc 1 1944 20 is_stmt 0 view .LVU1266 +1946:Src/main.c **** Def_setup.U5V2_EN = 0; + 3853 .loc 1 1946 2 is_stmt 1 view .LVU1265 +1946:Src/main.c **** Def_setup.U5V2_EN = 0; + 3854 .loc 1 1946 20 is_stmt 0 view .LVU1266 3855 006a 5A70 strb r2, [r3, #1] -1945:Src/main.c **** Def_setup.WORK_EN = 0; - 3856 .loc 1 1945 2 is_stmt 1 view .LVU1267 -1945:Src/main.c **** Def_setup.WORK_EN = 0; - 3857 .loc 1 1945 20 is_stmt 0 view .LVU1268 +1947:Src/main.c **** Def_setup.WORK_EN = 0; + 3856 .loc 1 1947 2 is_stmt 1 view .LVU1267 +1947:Src/main.c **** Def_setup.WORK_EN = 0; + 3857 .loc 1 1947 20 is_stmt 0 view .LVU1268 3858 006c 9A70 strb r2, [r3, #2] -1946:Src/main.c **** - 3859 .loc 1 1946 2 is_stmt 1 view .LVU1269 -1946:Src/main.c **** - 3860 .loc 1 1946 20 is_stmt 0 view .LVU1270 +1948:Src/main.c **** + 3859 .loc 1 1948 2 is_stmt 1 view .LVU1269 +1948:Src/main.c **** + 3860 .loc 1 1948 20 is_stmt 0 view .LVU1270 3861 006e 1A70 strb r2, [r3] -1948:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3862 .loc 1 1948 2 is_stmt 1 view .LVU1271 -1948:Src/main.c **** LD2_def_setup.LD_TEMP = 0; - 3863 .loc 1 1948 24 is_stmt 0 view .LVU1272 +1950:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 3862 .loc 1 1950 2 is_stmt 1 view .LVU1271 +1950:Src/main.c **** LD2_def_setup.LD_TEMP = 0; + 3863 .loc 1 1950 24 is_stmt 0 view .LVU1272 + ARM GAS /tmp/ccyYWdjY.s page 279 + + 3864 0070 904D ldr r5, .L141+52 3865 0072 2A80 strh r2, [r5] @ movhi - ARM GAS /tmp/ccfIOqv2.s page 279 - - -1949:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3866 .loc 1 1949 2 is_stmt 1 view .LVU1273 -1949:Src/main.c **** LD1_def_setup.P_coef_temp = 0; - 3867 .loc 1 1949 24 is_stmt 0 view .LVU1274 +1951:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 3866 .loc 1 1951 2 is_stmt 1 view .LVU1273 +1951:Src/main.c **** LD1_def_setup.P_coef_temp = 0; + 3867 .loc 1 1951 24 is_stmt 0 view .LVU1274 3868 0074 904C ldr r4, .L141+56 3869 0076 2280 strh r2, [r4] @ movhi -1950:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3870 .loc 1 1950 2 is_stmt 1 view .LVU1275 -1950:Src/main.c **** LD2_def_setup.P_coef_temp = 0; - 3871 .loc 1 1950 28 is_stmt 0 view .LVU1276 +1952:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 3870 .loc 1 1952 2 is_stmt 1 view .LVU1275 +1952:Src/main.c **** LD2_def_setup.P_coef_temp = 0; + 3871 .loc 1 1952 28 is_stmt 0 view .LVU1276 3872 0078 0022 movs r2, #0 3873 007a 6A60 str r2, [r5, #4] @ float -1951:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3874 .loc 1 1951 2 is_stmt 1 view .LVU1277 -1951:Src/main.c **** LD1_def_setup.I_coef_temp = 0; - 3875 .loc 1 1951 28 is_stmt 0 view .LVU1278 +1953:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 3874 .loc 1 1953 2 is_stmt 1 view .LVU1277 +1953:Src/main.c **** LD1_def_setup.I_coef_temp = 0; + 3875 .loc 1 1953 28 is_stmt 0 view .LVU1278 3876 007c 6260 str r2, [r4, #4] @ float -1952:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3877 .loc 1 1952 2 is_stmt 1 view .LVU1279 -1952:Src/main.c **** LD2_def_setup.I_coef_temp = 0; - 3878 .loc 1 1952 28 is_stmt 0 view .LVU1280 +1954:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 3877 .loc 1 1954 2 is_stmt 1 view .LVU1279 +1954:Src/main.c **** LD2_def_setup.I_coef_temp = 0; + 3878 .loc 1 1954 28 is_stmt 0 view .LVU1280 3879 007e AA60 str r2, [r5, #8] @ float -1953:Src/main.c **** - 3880 .loc 1 1953 2 is_stmt 1 view .LVU1281 -1953:Src/main.c **** - 3881 .loc 1 1953 28 is_stmt 0 view .LVU1282 +1955:Src/main.c **** + 3880 .loc 1 1955 2 is_stmt 1 view .LVU1281 +1955:Src/main.c **** + 3881 .loc 1 1955 28 is_stmt 0 view .LVU1282 3882 0080 A260 str r2, [r4, #8] @ float -1956:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3883 .loc 1 1956 2 is_stmt 1 view .LVU1283 -1956:Src/main.c **** LD1_curr_setup = LD1_def_setup; - 3884 .loc 1 1956 13 is_stmt 0 view .LVU1284 +1958:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 3883 .loc 1 1958 2 is_stmt 1 view .LVU1283 +1958:Src/main.c **** LD1_curr_setup = LD1_def_setup; + 3884 .loc 1 1958 13 is_stmt 0 view .LVU1284 3885 0082 8E4E ldr r6, .L141+60 3886 0084 9C46 mov ip, r3 3887 0086 BCE80F00 ldmia ip!, {r0, r1, r2, r3} 3888 008a 0FC6 stmia r6!, {r0, r1, r2, r3} 3889 008c DCF80030 ldr r3, [ip] 3890 0090 3380 strh r3, [r6] @ movhi -1957:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 3891 .loc 1 1957 2 is_stmt 1 view .LVU1285 -1957:Src/main.c **** LD2_curr_setup = LD2_def_setup; - 3892 .loc 1 1957 17 is_stmt 0 view .LVU1286 +1959:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 3891 .loc 1 1959 2 is_stmt 1 view .LVU1285 +1959:Src/main.c **** LD2_curr_setup = LD2_def_setup; + 3892 .loc 1 1959 17 is_stmt 0 view .LVU1286 3893 0092 8B4E ldr r6, .L141+64 3894 0094 95E80F00 ldm r5, {r0, r1, r2, r3} 3895 0098 86E80F00 stm r6, {r0, r1, r2, r3} -1958:Src/main.c **** - 3896 .loc 1 1958 2 is_stmt 1 view .LVU1287 -1958:Src/main.c **** - 3897 .loc 1 1958 17 is_stmt 0 view .LVU1288 +1960:Src/main.c **** + 3896 .loc 1 1960 2 is_stmt 1 view .LVU1287 +1960:Src/main.c **** + 3897 .loc 1 1960 17 is_stmt 0 view .LVU1288 3898 009c 894D ldr r5, .L141+68 3899 009e 94E80F00 ldm r4, {r0, r1, r2, r3} 3900 00a2 85E80F00 stm r5, {r0, r1, r2, r3} -1963:Src/main.c **** LL_TIM_EnableCounter(TIM6); - 3901 .loc 1 1963 2 is_stmt 1 view .LVU1289 +1965:Src/main.c **** LL_TIM_EnableCounter(TIM6); + 3901 .loc 1 1965 2 is_stmt 1 view .LVU1289 3902 .LVL274: 3903 .LBB443: + ARM GAS /tmp/ccyYWdjY.s page 280 + + 3904 .LBI443: 3238:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 280 - - 3239:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3240:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3241:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicates whether the Master/Slave mode is enabled. @@ -16796,11 +16798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** MODIFY_REG(TIMx->SMCR, TIM_SMCR_ETP | TIM_SMCR_ETPS | TIM_SMCR_ETF, ETRPolarity | ETRPrescaler | 3292:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3293:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 281 + + 3294:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3295:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @} - ARM GAS /tmp/ccfIOqv2.s page 281 - - 3296:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @defgroup TIM_LL_EF_Break_Function Break function configuration @@ -16856,11 +16858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N5 3349:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N6 3350:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV16_N8 + ARM GAS /tmp/ccyYWdjY.s page 282 + + 3351:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N5 3352:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N6 - ARM GAS /tmp/ccfIOqv2.s page 282 - - 3353:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_FILTER_FDIV32_N8 3354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ @@ -16916,11 +16918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N6 3406:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV4_N8 3407:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N6 + ARM GAS /tmp/ccyYWdjY.s page 283 + + 3408:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV8_N8 3409:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N5 - ARM GAS /tmp/ccfIOqv2.s page 283 - - 3410:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N6 3411:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV16_N8 3412:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK2_FILTER_FDIV32_N5 @@ -16976,11 +16978,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3463:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_DisableAutomaticOutput(TIM_TypeDef *TIMx) 3464:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { + ARM GAS /tmp/ccyYWdjY.s page 284 + + 3465:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** CLEAR_BIT(TIMx->BDTR, TIM_BDTR_AOE); 3466:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 284 - - 3467:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3468:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3469:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether automatic output is enabled. @@ -17036,11 +17038,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsEnabledAllOutputs(const TIM_TypeDef *TIMx) 3520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3521:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->BDTR, TIM_BDTR_MOE) == (TIM_BDTR_MOE)) ? 1UL : 0UL); + ARM GAS /tmp/ccyYWdjY.s page 285 + + 3522:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3523:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 285 - - 3524:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** #if defined(TIM_BREAK_INPUT_SUPPORT) 3525:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3526:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Enable the signals connected to the designated timer break input. @@ -17096,11 +17098,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF1 BKDFBKP LL_TIM_SetBreakInputSourcePolarity\n 3577:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2INP LL_TIM_SetBreakInputSourcePolarity\n 3578:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * AF2 BK2DFBKP LL_TIM_SetBreakInputSourcePolarity + ARM GAS /tmp/ccyYWdjY.s page 286 + + 3579:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3580:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param BreakInput This parameter can be one of the following values: - ARM GAS /tmp/ccfIOqv2.s page 286 - - 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_BREAK_INPUT_BKIN2 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param Source This parameter can be one of the following values: @@ -17156,11 +17158,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR5 3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_CCR6 3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF1 (*) + ARM GAS /tmp/ccyYWdjY.s page 287 + + 3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_BASEADDR_AF2 (*) 3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (*) value not defined in all devices - ARM GAS /tmp/ccfIOqv2.s page 287 - - 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param DMABurstLength This parameter can be one of the following values: 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_1TRANSFER 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_DMABURST_LENGTH_2TRANSFERS @@ -17216,11 +17218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_FS_SOF 3691:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM2_ITR1_RMP_OTG_HS_SOF 3692:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * + ARM GAS /tmp/ccyYWdjY.s page 288 + + 3693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * TIM5: one of the following values 3694:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * - ARM GAS /tmp/ccfIOqv2.s page 288 - - 3695:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_GPIO 3696:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSI 3697:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @arg @ref LL_TIM_TIM5_TI4_RMP_LSE @@ -17276,11 +17278,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3748:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3749:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC1(TIM_TypeDef *TIMx) + ARM GAS /tmp/ccyYWdjY.s page 289 + + 3750:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3751:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC1IF)); - ARM GAS /tmp/ccfIOqv2.s page 289 - - 3752:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3753:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3754:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** @@ -17336,11 +17338,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC3(const TIM_TypeDef *TIMx) 3805:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { 3806:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** return ((READ_BIT(TIMx->SR, TIM_SR_CC3IF) == (TIM_SR_CC3IF)) ? 1UL : 0UL); + ARM GAS /tmp/ccyYWdjY.s page 290 + + 3807:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3808:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** - ARM GAS /tmp/ccfIOqv2.s page 290 - - 3809:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3810:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 interrupt flag (CC4F). 3811:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4IF LL_TIM_ClearFlag_CC4 @@ -17396,11 +17398,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** WRITE_REG(TIMx->SR, ~(TIM_SR_CC6IF)); 3862:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } 3863:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** + ARM GAS /tmp/ccyYWdjY.s page 291 + + 3864:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3865:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 6 interrupt flag (CC6F) is set (Capture/Compare 6 inte - ARM GAS /tmp/ccfIOqv2.s page 291 - - 3866:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC6IF LL_TIM_IsActiveFlag_CC6 3867:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3868:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). @@ -17456,11 +17458,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** 3919:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 3920:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the break interrupt flag (BIF). + ARM GAS /tmp/ccyYWdjY.s page 292 + + 3921:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR BIF LL_TIM_ClearFlag_BRK 3922:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance - ARM GAS /tmp/ccfIOqv2.s page 292 - - 3923:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None 3924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3925:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_BRK(TIM_TypeDef *TIMx) @@ -17516,11 +17518,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Indicate whether Capture/Compare 1 over-capture interrupt flag (CC1OF) is set 3976:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * (Capture/Compare 1 interrupt is pending). 3977:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC1OF LL_TIM_IsActiveFlag_CC1OVR + ARM GAS /tmp/ccyYWdjY.s page 293 + + 3978:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 3979:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccfIOqv2.s page 293 - - 3980:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 3981:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE uint32_t LL_TIM_IsActiveFlag_CC1OVR(const TIM_TypeDef *TIMx) 3982:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17576,11 +17578,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** /** 4033:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @brief Clear the Capture/Compare 4 over-capture interrupt flag (CC4OF). 4034:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @rmtoll SR CC4OF LL_TIM_ClearFlag_CC4OVR + ARM GAS /tmp/ccyYWdjY.s page 294 + + 4035:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @param TIMx Timer instance 4036:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 294 - - 4037:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4038:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_ClearFlag_CC4OVR(TIM_TypeDef *TIMx) 4039:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17636,11 +17638,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** */ 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** __STATIC_INLINE void LL_TIM_EnableIT_UPDATE(TIM_TypeDef *TIMx) 3905 .loc 5 4090 22 view .LVU1290 + ARM GAS /tmp/ccyYWdjY.s page 295 + + 3906 .LBB444: 4091:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { - ARM GAS /tmp/ccfIOqv2.s page 295 - - 4092:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** SET_BIT(TIMx->DIER, TIM_DIER_UIE); 3907 .loc 5 4092 3 view .LVU1291 3908 00a6 884B ldr r3, .L141+72 @@ -17651,8 +17653,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3913 .loc 5 4092 3 is_stmt 0 view .LVU1292 3914 .LBE444: 3915 .LBE443: -1964:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); - 3916 .loc 1 1964 2 is_stmt 1 view .LVU1293 +1966:Src/main.c **** LL_TIM_EnableIT_UPDATE(TIM7); + 3916 .loc 1 1966 2 is_stmt 1 view .LVU1293 3917 .LBB445: 3918 .LBI445: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17668,8 +17670,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3926 .loc 5 1315 3 is_stmt 0 view .LVU1296 3927 .LBE446: 3928 .LBE445: -1965:Src/main.c **** LL_TIM_EnableCounter(TIM7); - 3929 .loc 1 1965 2 is_stmt 1 view .LVU1297 +1967:Src/main.c **** LL_TIM_EnableCounter(TIM7); + 3929 .loc 1 1967 2 is_stmt 1 view .LVU1297 3930 .LBB447: 3931 .LBI447: 4090:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17684,8 +17686,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3940 .loc 5 4092 3 is_stmt 0 view .LVU1300 3941 .LBE448: 3942 .LBE447: -1966:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); - 3943 .loc 1 1966 2 is_stmt 1 view .LVU1301 +1968:Src/main.c **** //HAL_TIM_Base_Start_IT(&htim6); + 3943 .loc 1 1968 2 is_stmt 1 view .LVU1301 3944 .LBB449: 3945 .LBI449: 1313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** { @@ -17696,16 +17698,16 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3949 00c4 1A68 ldr r2, [r3] 3950 00c6 42F00102 orr r2, r2, #1 3951 00ca 1A60 str r2, [r3] + ARM GAS /tmp/ccyYWdjY.s page 296 + + 3952 .LVL278: 1315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h **** } - ARM GAS /tmp/ccfIOqv2.s page 296 - - 3953 .loc 5 1315 3 is_stmt 0 view .LVU1304 3954 .LBE450: 3955 .LBE449: -1973:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 3956 .loc 1 1973 3 is_stmt 1 view .LVU1305 +1975:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 3956 .loc 1 1975 3 is_stmt 1 view .LVU1305 3957 .LBB451: 3958 .LBI451: 3959 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h" @@ -17756,11 +17758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 45:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /* Array used to get the DMA stream register offset versus stream index LL_DMA_STREAM_x */ 46:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** static const uint8_t STREAM_OFFSET_TAB[] = 47:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccyYWdjY.s page 297 + + 48:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream0_BASE - DMA1_BASE), 49:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream1_BASE - DMA1_BASE), - ARM GAS /tmp/ccfIOqv2.s page 297 - - 50:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream2_BASE - DMA1_BASE), 51:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream3_BASE - DMA1_BASE), 52:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (uint8_t)(DMA1_Stream4_BASE - DMA1_BASE), @@ -17816,11 +17818,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 102:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 103:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 104:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 298 + + 105:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address 106:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** is incremented or not. - ARM GAS /tmp/ccfIOqv2.s page 298 - - 107:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_PERIPH 108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct @@ -17876,11 +17878,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 159:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** It specifies the amount of data to be transferred in a sing 160:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** transaction. 161:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This parameter can be a value of @ref DMA_LL_EC_MBURST + ARM GAS /tmp/ccyYWdjY.s page 299 + + 162:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @note The burst mode is possible only if the address Increm 163:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccfIOqv2.s page 299 - - 164:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** This feature can be modified afterwards using unitary funct 165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** uint32_t PeriphBurst; /*!< Specifies the Burst transfer configuration for the peripher @@ -17936,11 +17938,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 216:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 217:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 218:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 300 + + 219:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 220:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_DOUBLEBUFFER_MODE DOUBLE BUFFER MODE - ARM GAS /tmp/ccfIOqv2.s page 300 - - 221:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_DOUBLEBUFFER_MODE_DISABLE 0x00000000U /*!< Disable double buffering m @@ -17996,11 +17998,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 273:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 274:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 275:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 301 + + 276:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_EC_PRIORITY PRIORITY 277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ - ARM GAS /tmp/ccfIOqv2.s page 301 - - 278:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_LOW 0x00000000U /*!< Priority level : Low 280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_PRIORITY_MEDIUM DMA_SxCR_PL_0 /*!< Priority level : Medium @@ -18056,11 +18058,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 330:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 331:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @} 332:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 302 + + 333:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 334:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @defgroup DMA_LL_FIFOMODE DMA_LL_FIFOMODE - ARM GAS /tmp/ccfIOqv2.s page 302 - - 335:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @{ 336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define LL_DMA_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode di @@ -18116,11 +18118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Write a value in DMA register + ARM GAS /tmp/ccyYWdjY.s page 303 + + 390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __INSTANCE__ DMA Instance 391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __REG__ Register to be written - ARM GAS /tmp/ccfIOqv2.s page 303 - - 392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __VALUE__ Value to be written in the register 393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -18176,11 +18178,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param __STREAM__ LL_DMA_STREAM_y 445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval DMAx_Streamy 446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 304 + + 447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** #define __LL_DMA_GET_STREAM_INSTANCE(__DMA_INSTANCE__, __STREAM__) \ 448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** ((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM - ARM GAS /tmp/ccfIOqv2.s page 304 - - 449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM 451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** (((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA2)) && ((uint32_t)(__STREAM__) == ((uint32_t)LL_DM @@ -18236,11 +18238,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable DMA stream. + ARM GAS /tmp/ccyYWdjY.s page 305 + + 504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR EN LL_DMA_DisableStream 505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccfIOqv2.s page 305 - - 506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 @@ -18266,8 +18268,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3968 .loc 6 519 3 is_stmt 0 view .LVU1308 3969 .LBE452: 3970 .LBE451: -1974:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 3971 .loc 1 1974 3 is_stmt 1 view .LVU1309 +1976:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 3971 .loc 1 1976 3 is_stmt 1 view .LVU1309 3972 .LBB453: 3973 .LBI453: 520:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -18296,11 +18298,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure all parameters linked to DMA transfer. 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_ConfigTransfer\n 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR CIRC LL_DMA_ConfigTransfer\n + ARM GAS /tmp/ccyYWdjY.s page 306 + + 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PINC LL_DMA_ConfigTransfer\n 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MINC LL_DMA_ConfigTransfer\n - ARM GAS /tmp/ccfIOqv2.s page 306 - - 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PSIZE LL_DMA_ConfigTransfer\n 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR MSIZE LL_DMA_ConfigTransfer\n 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * CR PL LL_DMA_ConfigTransfer\n @@ -18356,11 +18358,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 307 + + 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Data transfer direction (read from peripheral or from memory). - ARM GAS /tmp/ccfIOqv2.s page 307 - - 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR DIR LL_DMA_GetDataTransferDirection 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -18416,11 +18418,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 + ARM GAS /tmp/ccyYWdjY.s page 308 + + 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 - ARM GAS /tmp/ccfIOqv2.s page 308 - - 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 @@ -18476,11 +18478,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Stream) 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccyYWdjY.s page 309 + + 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccfIOqv2.s page 309 - - 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Memory increment mode. @@ -18536,11 +18538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 + ARM GAS /tmp/ccyYWdjY.s page 310 + + 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 - ARM GAS /tmp/ccfIOqv2.s page 310 - - 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Size This parameter can be one of the following values: @@ -18596,11 +18598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MDATAALIGN_WORD 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 311 + + 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Size) 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccfIOqv2.s page 311 - - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, D 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -18656,11 +18658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccyYWdjY.s page 312 + + 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccfIOqv2.s page 312 - - 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -18716,11 +18718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_LOW 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_MEDIUM + ARM GAS /tmp/ccyYWdjY.s page 313 + + 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_HIGH 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_PRIORITY_VERYHIGH - ARM GAS /tmp/ccfIOqv2.s page 313 - - 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetStreamPriorityLevel(DMA_TypeDef *DMAx, uint32_t Stream) 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -18776,11 +18778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Select Channel number associated to the Stream. 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CHSEL LL_DMA_SetChannelSelection 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccyYWdjY.s page 314 + + 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 - ARM GAS /tmp/ccfIOqv2.s page 314 - - 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 @@ -18836,11 +18838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_5 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_6 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_7 + ARM GAS /tmp/ccyYWdjY.s page 315 + + 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_8 (*) 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_9 (*) - ARM GAS /tmp/ccfIOqv2.s page 315 - - 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_10 (*) 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_11 (*) 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_CHANNEL_12 (*) @@ -18896,11 +18898,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval Returned value can be one of the following values: 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_SINGLE 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC4 + ARM GAS /tmp/ccyYWdjY.s page 316 + + 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC8 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_MBURST_INC16 - ARM GAS /tmp/ccfIOqv2.s page 316 - - 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_GetMemoryBurstxfer(DMA_TypeDef *DMAx, uint32_t Stream) 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -18956,11 +18958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))- 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 317 + + 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Set Current target (only in double buffer mode) to Memory 1 or Memory 0. - ARM GAS /tmp/ccfIOqv2.s page 317 - - 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR CT LL_DMA_SetCurrentTargetMem 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: @@ -19016,11 +19018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 + ARM GAS /tmp/ccyYWdjY.s page 318 + + 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 318 - - 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_EnableDoubleBufferMode(DMA_TypeDef *DMAx, uint32_t Stream) 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -19076,11 +19078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Disable Fifo mode. 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll FCR DMDIS LL_DMA_DisableFifoMode + ARM GAS /tmp/ccyYWdjY.s page 319 + + 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: - ARM GAS /tmp/ccfIOqv2.s page 319 - - 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 @@ -19136,11 +19138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_FIFOTHRESHOLD_FULL 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 320 + + 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetFIFOThreshold(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Threshold 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccfIOqv2.s page 320 - - 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19196,11 +19198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** MODIFY_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->FCR, 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccyYWdjY.s page 321 + + 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 321 - - 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Configure the Source and Destination addresses. 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @note This API must not be called when the DMA stream is enabled. 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll M0AR M0A LL_DMA_ConfigAddresses\n @@ -19256,11 +19258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param MemoryAddress Between 0 to 0xFFFFFFFF 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccyYWdjY.s page 322 + + 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd - ARM GAS /tmp/ccfIOqv2.s page 322 - - 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR, 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -19316,11 +19318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 + ARM GAS /tmp/ccyYWdjY.s page 323 + + 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 - ARM GAS /tmp/ccfIOqv2.s page 323 - - 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 @@ -19376,11 +19378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Stream, uint32_t MemoryAdd 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccyYWdjY.s page 324 + + 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(((DMA_Stream_TypeDef*)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->M0AR 1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccfIOqv2.s page 324 - - 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get the Memory to Memory Source address. @@ -19436,11 +19438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_5 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_6 + ARM GAS /tmp/ccyYWdjY.s page 325 + + 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_7 1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Address Between 0 to 0xFFFFFFFF - ARM GAS /tmp/ccfIOqv2.s page 325 - - 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_SetMemory1Address(DMA_TypeDef *DMAx, uint32_t Stream, uint32_t Address) @@ -19496,11 +19498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx) 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_HTIF1)==(DMA_LISR_HTIF1)); + ARM GAS /tmp/ccyYWdjY.s page 326 + + 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccfIOqv2.s page 326 - - 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 2 half transfer flag. 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR HTIF2 LL_DMA_IsActiveFlag_HT2 @@ -19556,11 +19558,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_HTIF6)==(DMA_HISR_HTIF6)); 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 327 + + 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 7 half transfer flag. - ARM GAS /tmp/ccfIOqv2.s page 327 - - 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR HTIF7 LL_DMA_IsActiveFlag_HT7 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). @@ -19616,11 +19618,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 transfer complete flag. + ARM GAS /tmp/ccyYWdjY.s page 328 + + 1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR TCIF4 LL_DMA_IsActiveFlag_TC4 1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance - ARM GAS /tmp/ccfIOqv2.s page 328 - - 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx) @@ -19676,11 +19678,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 transfer error flag. 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR TEIF1 LL_DMA_IsActiveFlag_TE1 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance + ARM GAS /tmp/ccyYWdjY.s page 329 + + 1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 329 - - 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx) 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_TEIF1)==(DMA_LISR_TEIF1)); @@ -19736,11 +19738,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 330 + + 1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx) 1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { - ARM GAS /tmp/ccfIOqv2.s page 330 - - 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->HISR ,DMA_HISR_TEIF6)==(DMA_HISR_TEIF6)); 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** @@ -19796,11 +19798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_DME3(DMA_TypeDef *DMAx) 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { + ARM GAS /tmp/ccyYWdjY.s page 331 + + 1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_DMEIF3)==(DMA_LISR_DMEIF3)); 1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } - ARM GAS /tmp/ccfIOqv2.s page 331 - - 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 4 direct mode error flag. @@ -19856,11 +19858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** return (READ_BIT(DMAx->LISR ,DMA_LISR_FEIF0)==(DMA_LISR_FEIF0)); 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccyYWdjY.s page 332 + + 2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 332 - - 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 1 FIFO error flag. 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LISR FEIF1 LL_DMA_IsActiveFlag_FE1 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance @@ -19916,11 +19918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 333 + + 2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Get Stream 6 FIFO error flag. 2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HISR FEIF6 LL_DMA_IsActiveFlag_FE6 - ARM GAS /tmp/ccfIOqv2.s page 333 - - 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval State of bit (1 or 0). 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ @@ -19976,11 +19978,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 3 half transfer flag. 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CHTIF3 LL_DMA_ClearFlag_HT3 + ARM GAS /tmp/ccyYWdjY.s page 334 + + 2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 334 - - 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx) 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -20036,11 +20038,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll LIFCR CTCIF0 LL_DMA_ClearFlag_TC0 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None + ARM GAS /tmp/ccyYWdjY.s page 335 + + 2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC0(DMA_TypeDef *DMAx) - ARM GAS /tmp/ccfIOqv2.s page 335 - - 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTCIF0); 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -20096,11 +20098,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccyYWdjY.s page 336 + + 2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTCIF5); - ARM GAS /tmp/ccfIOqv2.s page 336 - - 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -20132,8 +20134,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3980 .loc 6 2279 3 is_stmt 0 view .LVU1312 3981 .LBE454: 3982 .LBE453: -1975:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); - 3983 .loc 1 1975 3 is_stmt 1 view .LVU1313 +1977:Src/main.c **** LL_USART_EnableDMAReq_TX(USART1); + 3983 .loc 1 1977 3 is_stmt 1 view .LVU1313 3984 .LBB455: 3985 .LBI455: 2280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -20156,11 +20158,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2297:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2298:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccyYWdjY.s page 337 + + 2300:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CTEIF1); - ARM GAS /tmp/ccfIOqv2.s page 337 - - 2302:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2303:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2304:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -20216,11 +20218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx) 2355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CTEIF6); + ARM GAS /tmp/ccyYWdjY.s page 338 + + 2357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccfIOqv2.s page 338 - - 2359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 transfer error flag. 2361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CTEIF7 LL_DMA_ClearFlag_TE7 @@ -20239,8 +20241,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3992 .loc 6 2367 3 is_stmt 0 view .LVU1316 3993 .LBE456: 3994 .LBE455: -1976:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); - 3995 .loc 1 1976 3 is_stmt 1 view .LVU1317 +1978:Src/main.c **** LL_DMA_EnableIT_TC(DMA2, LL_DMA_STREAM_7); + 3995 .loc 1 1978 3 is_stmt 1 view .LVU1317 3996 .LBB457: 3997 .LBI457: 3998 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h" @@ -20276,11 +20278,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 30:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @addtogroup STM32F7xx_LL_Driver 31:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 32:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 339 + + 33:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 34:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART1) || defined(USART2) || defined(USART3) || defined(USART6) \ - ARM GAS /tmp/ccfIOqv2.s page 339 - - 35:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** || defined(UART4) || defined(UART5) || defined(UART7) || defined(UART8) 36:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 37:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL USART @@ -20336,11 +20338,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 87:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 88:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetStopBitsLength().*/ 89:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 340 + + 90:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** uint32_t Parity; /*!< Specifies the parity mode. 91:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_PARITY - ARM GAS /tmp/ccfIOqv2.s page 340 - - 92:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 93:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This feature can be modified afterwards using unitary 94:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** function @ref LL_USART_SetParity().*/ @@ -20396,11 +20398,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** This parameter can be a value of @ref USART_LL_EC_LASTCL 145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** USART HW configuration can be modified afterwards using + ARM GAS /tmp/ccyYWdjY.s page 341 + + 147:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** functions @ref LL_USART_SetLastClkPulseOutput(). 148:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** For more details, refer to description of this function. - ARM GAS /tmp/ccfIOqv2.s page 341 - - 149:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 150:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } LL_USART_ClockInitTypeDef; 151:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20456,11 +20458,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_LBDF USART_ISR_LBDF /*!< LIN break detect 202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt fl 203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ + ARM GAS /tmp/ccyYWdjY.s page 342 + + 204:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_RTOF USART_ISR_RTOF /*!< Receiver timeout 205:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_EOBF USART_ISR_EOBF /*!< End of block fla - ARM GAS /tmp/ccfIOqv2.s page 342 - - 206:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRE USART_ISR_ABRE /*!< Auto baud rate e 207:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_ABRF USART_ISR_ABRF /*!< Auto baud rate f 208:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ @@ -20516,11 +20518,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_NONE 0x00000000U /*!< Transmitter 259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_RX USART_CR1_RE /*!< Transmitter 260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX USART_CR1_TE /*!< Transmitter + ARM GAS /tmp/ccyYWdjY.s page 343 + + 261:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter 262:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 343 - - 263:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 264:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 265:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -20576,11 +20578,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_LASTCLKPULSE Last Clock Pulse 317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ + ARM GAS /tmp/ccyYWdjY.s page 344 + + 318:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 319:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_NO_OUTPUT 0x00000000U /*!< The clock pulse of the l - ARM GAS /tmp/ccfIOqv2.s page 344 - - 320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_LASTCLKPULSE_OUTPUT USART_CR2_LBCL /*!< The clock pulse of the l 321:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 322:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} @@ -20636,11 +20638,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion 373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 345 + + 375:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works usin 376:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are - ARM GAS /tmp/ccfIOqv2.s page 345 - - 377:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 378:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 379:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -20696,11 +20698,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) 431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUS) + ARM GAS /tmp/ccyYWdjY.s page 346 + + 432:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EC_WAKEUP_ON Wakeup Activation 433:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ - ARM GAS /tmp/ccfIOqv2.s page 346 - - 434:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 435:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake u 436:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #define LL_USART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake u @@ -20756,11 +20758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 347 + + 489:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EM_WRITE_READ Common Write and read registers Macros 490:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ - ARM GAS /tmp/ccfIOqv2.s page 347 - - 491:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 492:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 493:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -20816,11 +20818,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Exported functions --------------------------------------------------------*/ 545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 348 + + 546:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_Exported_Functions USART Exported Functions 547:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ - ARM GAS /tmp/ccfIOqv2.s page 348 - - 548:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 549:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 550:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration Configuration functions @@ -20876,11 +20878,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableInStopMode(USART_TypeDef *USARTx) 602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccyYWdjY.s page 349 + + 603:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_UESM); 604:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccfIOqv2.s page 349 - - 605:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 606:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 607:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief USART disabled in STOP Mode. @@ -20936,11 +20938,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if USART clock is enabled in STOP Mode + ARM GAS /tmp/ccyYWdjY.s page 350 + + 660:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 UCESM LL_USART_IsClockEnabledInStopMode 661:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccfIOqv2.s page 350 - - 662:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 663:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 664:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsClockEnabledInStopMode(const USART_TypeDef *USARTx) @@ -20996,11 +20998,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Configure simultaneously enabled/disabled states + ARM GAS /tmp/ccyYWdjY.s page 351 + + 717:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * of Transmitter and Receiver 718:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 RE LL_USART_SetTransferDirection\n - ARM GAS /tmp/ccfIOqv2.s page 351 - - 719:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 TE LL_USART_SetTransferDirection 720:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 721:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param TransferDirection This parameter can be one of the following values: @@ -21056,11 +21058,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 PCE LL_USART_GetParity 772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccyYWdjY.s page 352 + + 774:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_NONE 775:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_EVEN - ARM GAS /tmp/ccfIOqv2.s page 352 - - 776:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_PARITY_ODD 777:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 778:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetParity(const USART_TypeDef *USARTx) @@ -21116,11 +21118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 M0 LL_USART_GetDataWidth\n 829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR1 M1 LL_USART_GetDataWidth 830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccyYWdjY.s page 353 + + 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 832:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_7B - ARM GAS /tmp/ccfIOqv2.s page 353 - - 833:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_8B 834:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_DATAWIDTH_9B 835:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -21176,11 +21178,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_OVER8, OverSampling); 886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 354 + + 888:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 889:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return Oversampling mode - ARM GAS /tmp/ccfIOqv2.s page 354 - - 890:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 OVER8 LL_USART_GetOverSampling 891:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 892:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: @@ -21236,11 +21238,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetClockPhase(USART_TypeDef *USARTx, uint32_t ClockPhase) + ARM GAS /tmp/ccyYWdjY.s page 355 + + 945:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 946:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_CPHA, ClockPhase); - ARM GAS /tmp/ccfIOqv2.s page 355 - - 947:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 948:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 949:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -21296,11 +21298,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 1000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Phase configuration using @ref LL_USART_SetClockPhase() function 1001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clock Polarity configuration using @ref LL_USART_SetClockPolarity() function + ARM GAS /tmp/ccyYWdjY.s page 356 + + 1002:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Output of Last bit Clock pulse configuration using @ref LL_USART_SetLastClkPulseOutpu 1003:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 CPHA LL_USART_ConfigClock\n - ARM GAS /tmp/ccfIOqv2.s page 356 - - 1004:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CPOL LL_USART_ConfigClock\n 1005:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 LBCL LL_USART_ConfigClock 1006:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -21356,11 +21358,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledSCLKOutput(const USART_TypeDef *USARTx) 1058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccyYWdjY.s page 357 + + 1059:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR2, USART_CR2_CLKEN) == (USART_CR2_CLKEN)) ? 1UL : 0UL); 1060:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccfIOqv2.s page 357 - - 1061:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1062:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1063:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set the length of the stop bits @@ -21416,11 +21418,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param StopBits This parameter can be one of the following values: 1114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_0_5 1115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1 + ARM GAS /tmp/ccyYWdjY.s page 358 + + 1116:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_1_5 1117:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_STOPBITS_2 - ARM GAS /tmp/ccfIOqv2.s page 358 - - 1118:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1119:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1120:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigCharacter(USART_TypeDef *USARTx, uint32_t DataWidth, uint32_t P @@ -21476,11 +21478,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RXINV LL_USART_GetRXPinLevel 1171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: + ARM GAS /tmp/ccyYWdjY.s page 359 + + 1173:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_STANDARD 1174:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_RXPIN_LEVEL_INVERTED - ARM GAS /tmp/ccfIOqv2.s page 359 - - 1175:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1176:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetRXPinLevel(const USART_TypeDef *USARTx) 1177:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -21536,11 +21538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Returned value can be one of the following values: 1229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_POSITIVE + ARM GAS /tmp/ccyYWdjY.s page 360 + + 1230:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_BINARY_LOGIC_NEGATIVE 1231:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 360 - - 1232:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBinaryDataLogic(const USART_TypeDef *USARTx) 1233:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1234:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR2, USART_CR2_DATAINV)); @@ -21596,11 +21598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Auto Baud Rate detection feature is supported by the USARTx instance. 1285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 ABREN LL_USART_DisableAutoBaudRate 1286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccyYWdjY.s page 361 + + 1287:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1288:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 361 - - 1289:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableAutoBaudRate(USART_TypeDef *USARTx) 1290:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1291:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_ABREN); @@ -21656,11 +21658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Receiver Timeout + ARM GAS /tmp/ccyYWdjY.s page 362 + + 1344:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 RTOEN LL_USART_EnableRxTimeout 1345:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccfIOqv2.s page 362 - - 1346:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1347:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1348:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_EnableRxTimeout(USART_TypeDef *USARTx) @@ -21716,11 +21718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ConfigNodeAddress(USART_TypeDef *USARTx, uint32_t AddressLen, uint32_ 1399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, + ARM GAS /tmp/ccyYWdjY.s page 363 + + 1401:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); 1402:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccfIOqv2.s page 363 - - 1403:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1404:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1405:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Return 8 bit Address of the USART node as set in ADD field of CR2. @@ -21776,11 +21778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, USART_CR3_RTSE); 1456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 364 + + 1458:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1459:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable CTS HW Flow Control - ARM GAS /tmp/ccfIOqv2.s page 364 - - 1460:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_HWFLOW_INSTANCE(USARTx) can be used to check whether or not 1461:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Hardware Flow control feature is supported by the USARTx instance. 1462:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 CTSE LL_USART_EnableCTSHWFlowCtrl @@ -21836,11 +21838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS 1513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_CTS 1514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_HWCONTROL_RTS_CTS + ARM GAS /tmp/ccyYWdjY.s page 365 + + 1515:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1516:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetHWFlowCtrl(const USART_TypeDef *USARTx) - ARM GAS /tmp/ccfIOqv2.s page 365 - - 1517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1518:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); 1519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -21896,11 +21898,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1569:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1570:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1571:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableOverrunDetect(USART_TypeDef *USARTx) + ARM GAS /tmp/ccyYWdjY.s page 366 + + 1572:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1573:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_OVRDIS); - ARM GAS /tmp/ccfIOqv2.s page 366 - - 1574:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1575:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1576:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -21956,11 +21958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1626:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Compute and set USARTDIV value in BRR Register (full BRR content) 1627:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * according to used Peripheral Clock, Oversampling mode, and expected Baud Rate values 1628:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Peripheral clock and Baud rate values provided as function parameters should be valid + ARM GAS /tmp/ccyYWdjY.s page 367 + + 1629:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (Baud rate value != 0) 1630:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. - ARM GAS /tmp/ccfIOqv2.s page 367 - - 1631:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll BRR BRR LL_USART_SetBaudRate 1632:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 1633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PeriphClk Peripheral Clock @@ -22016,11 +22018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1683:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else if (OverSampling == LL_USART_OVERSAMPLING_8) 1684:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1685:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** usartdiv = (uint16_t)((usartdiv & 0xFFF0U) | ((usartdiv & 0x0007U) << 1U)) ; + ARM GAS /tmp/ccyYWdjY.s page 368 + + 1686:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** if (usartdiv != 0U) 1687:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccfIOqv2.s page 368 - - 1688:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** brrresult = (PeriphClk * 2U) / usartdiv; 1689:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1690:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -22076,11 +22078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1740:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval Value between Min_Data=0x00 and Max_Data=0xFF 1741:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1742:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetBlockLength(const USART_TypeDef *USARTx) + ARM GAS /tmp/ccyYWdjY.s page 369 + + 1743:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1744:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->RTOR, USART_RTOR_BLEN) >> USART_RTOR_BLEN_Pos); - ARM GAS /tmp/ccfIOqv2.s page 369 - - 1745:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1746:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1747:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -22136,11 +22138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1797:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * IrDA feature is supported by the USARTx instance. 1798:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 IRLP LL_USART_SetIrdaPowerMode 1799:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance + ARM GAS /tmp/ccyYWdjY.s page 370 + + 1800:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param PowerMode This parameter can be one of the following values: 1801:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_NORMAL - ARM GAS /tmp/ccfIOqv2.s page 370 - - 1802:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @arg @ref LL_USART_IRDA_POWER_LOW 1803:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 1804:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22196,11 +22198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1854:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1855:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 1856:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 371 + + 1857:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1858:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_Configuration_Smartcard Configuration functions related to Smartcard feat - ARM GAS /tmp/ccfIOqv2.s page 371 - - 1859:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 1860:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 1861:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22256,11 +22258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1911:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR3, USART_CR3_SCEN); 1912:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 1913:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 372 + + 1914:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 1915:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard mode - ARM GAS /tmp/ccfIOqv2.s page 372 - - 1916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 1917:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. 1918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 SCEN LL_USART_DisableSmartcard @@ -22316,11 +22318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1968:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 1969:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->CR3, USART_CR3_SCARCNT) >> USART_CR3_SCARCNT_Pos); 1970:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccyYWdjY.s page 373 + + 1971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 1972:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 373 - - 1973:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set Smartcard prescaler value, used for dividing the USART clock 1974:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * source to provide the SMARTCARD Clock (5 bits value) 1975:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not @@ -22376,11 +22378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2025:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_GetSmartcardGuardTime(const USART_TypeDef *USARTx) 2026:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2027:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return (uint32_t)(READ_BIT(USARTx->GTPR, USART_GTPR_GT) >> USART_GTPR_GT_Pos); + ARM GAS /tmp/ccyYWdjY.s page 374 + + 2028:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2029:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccfIOqv2.s page 374 - - 2030:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2031:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 2032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -22436,11 +22438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2082:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ 2083:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2084:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 375 + + 2085:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2086:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Set LIN Break Detection Length - ARM GAS /tmp/ccfIOqv2.s page 375 - - 2087:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2088:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2089:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDL LL_USART_SetLINBrkDetectionLen @@ -22496,11 +22498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2139:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LINEN); 2140:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2141:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 376 + + 2142:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2143:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Indicate if LIN mode is enabled - ARM GAS /tmp/ccfIOqv2.s page 376 - - 2144:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2145:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2146:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_IsEnabledLIN @@ -22556,11 +22558,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2196:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param Time Value between Min_Data=0 and Max_Data=31 2197:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2198:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 377 + + 2199:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_SetDEAssertionTime(USART_TypeDef *USARTx, uint32_t Time) 2200:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccfIOqv2.s page 377 - - 2201:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** MODIFY_REG(USARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); 2202:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2203:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -22616,11 +22618,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2253:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)) ? 1UL : 0UL); 2254:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2255:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 378 + + 2256:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2257:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Select Driver Enable Polarity - ARM GAS /tmp/ccfIOqv2.s page 378 - - 2258:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_DRIVER_ENABLE_INSTANCE(USARTx) can be used to check whether or not 2259:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Driver Enable feature is supported by the USARTx instance. 2260:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 DEP LL_USART_SetDESignalPolarity @@ -22676,11 +22678,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2310:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using 2311:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions 2312:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigAsyncMode\n + ARM GAS /tmp/ccyYWdjY.s page 379 + + 2313:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigAsyncMode\n 2314:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 SCEN LL_USART_ConfigAsyncMode\n - ARM GAS /tmp/ccfIOqv2.s page 379 - - 2315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 IREN LL_USART_ConfigAsyncMode\n 2316:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigAsyncMode 2317:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -22736,11 +22738,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2367:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2369:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 380 + + 2370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Perform basic configuration of USART for enabling use in LIN Mode 2371:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In LIN mode, the following bits must be kept cleared: - ARM GAS /tmp/ccfIOqv2.s page 380 - - 2372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - STOP and CLKEN bits in the USART_CR2 register, 2373:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, 2374:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register, @@ -22796,11 +22798,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2424:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear IREN in CR3 using @ref LL_USART_DisableIrda() function 2425:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Set HDSEL in CR3 using @ref LL_USART_EnableHalfDuplex() function 2426:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Other remaining configurations items related to Half Duplex Mode + ARM GAS /tmp/ccyYWdjY.s page 381 + + 2427:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * (as Baud Rate, Word length, Parity, ...) should be set using 2428:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * dedicated functions - ARM GAS /tmp/ccfIOqv2.s page 381 - - 2429:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LINEN LL_USART_ConfigHalfDuplexMode\n 2430:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR2 CLKEN LL_USART_ConfigHalfDuplexMode\n 2431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * CR3 HDSEL LL_USART_ConfigHalfDuplexMode\n @@ -22856,11 +22858,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2481:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - LINEN bit in the USART_CR2 register, 2482:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - IREN and HDSEL bits in the USART_CR3 register. 2483:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 382 + + 2484:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, (USART_CR2_LINEN)); 2485:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR3, (USART_CR3_IREN | USART_CR3_HDSEL)); - ARM GAS /tmp/ccfIOqv2.s page 382 - - 2486:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Configure Stop bits to 1.5 bits */ 2487:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Synchronous mode is activated by default */ 2488:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** SET_BIT(USARTx->CR2, (USART_CR2_STOP_0 | USART_CR2_STOP_1 | USART_CR2_CLKEN)); @@ -22916,11 +22918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2538:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note In MultiProcessor mode, the following bits must be kept cleared: 2539:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - LINEN bit in the USART_CR2 register, 2540:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - CLKEN bit in the USART_CR2 register, + ARM GAS /tmp/ccyYWdjY.s page 383 + + 2541:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - SCEN bit in the USART_CR3 register, 2542:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - IREN bit in the USART_CR3 register, - ARM GAS /tmp/ccfIOqv2.s page 383 - - 2543:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - HDSEL bit in the USART_CR3 register. 2544:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Call of this function is equivalent to following function call sequence : 2545:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * - Clear LINEN in CR2 using @ref LL_USART_DisableLIN() function @@ -22976,11 +22978,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2595:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2596:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_FE(const USART_TypeDef *USARTx) 2597:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { + ARM GAS /tmp/ccyYWdjY.s page 384 + + 2598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)) ? 1UL : 0UL); 2599:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - ARM GAS /tmp/ccfIOqv2.s page 384 - - 2600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2601:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2602:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Noise error detected Flag is set or not @@ -23036,11 +23038,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2652:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2653:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)) ? 1UL : 0UL); 2654:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccyYWdjY.s page 385 + + 2655:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2656:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 385 - - 2657:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Transmit Data Register Empty Flag is set or not 2658:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR TXE LL_USART_IsActiveFlag_TXE 2659:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance @@ -23096,11 +23098,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2709:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2710:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2711:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 386 + + 2712:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_RTO(const USART_TypeDef *USARTx) 2713:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccfIOqv2.s page 386 - - 2714:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_RTOF) == (USART_ISR_RTOF)) ? 1UL : 0UL); 2715:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2716:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23156,11 +23158,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2766:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2767:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2768:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Character Match Flag is set or not + ARM GAS /tmp/ccyYWdjY.s page 387 + + 2769:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ISR CMF LL_USART_IsActiveFlag_CM 2770:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccfIOqv2.s page 387 - - 2771:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 2772:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2773:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_CM(const USART_TypeDef *USARTx) @@ -23216,11 +23218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2823:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsActiveFlag_TEACK(const USART_TypeDef *USARTx) 2824:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 2825:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** return ((READ_BIT(USARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)) ? 1UL : 0UL); + ARM GAS /tmp/ccyYWdjY.s page 388 + + 2826:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2827:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** - ARM GAS /tmp/ccfIOqv2.s page 388 - - 2828:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_ISR_REACK) 2829:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 2830:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Receive Enable Acknowledge Flag is set or not @@ -23276,11 +23278,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2880:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2881:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 2882:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 389 + + 2883:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_NE(USART_TypeDef *USARTx) 2884:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { - ARM GAS /tmp/ccfIOqv2.s page 389 - - 2885:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** WRITE_REG(USARTx->ICR, USART_ICR_NCF); 2886:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2887:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -23336,11 +23338,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2937:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 2938:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 2939:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll ICR LBDCF LL_USART_ClearFlag_LBD + ARM GAS /tmp/ccyYWdjY.s page 390 + + 2940:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 2941:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None - ARM GAS /tmp/ccfIOqv2.s page 390 - - 2942:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 2943:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_ClearFlag_LBD(USART_TypeDef *USARTx) 2944:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -23396,11 +23398,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2994:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 2995:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 2996:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR1_UESM) + ARM GAS /tmp/ccyYWdjY.s page 391 + + 2997:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_CR3_WUFIE) 2998:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 391 - - 2999:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Clear Wake Up from stop mode Flag 3000:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_WAKEUP_FROMSTOP_INSTANCE(USARTx) can be used to check whether or not 3001:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Wake-up from Stop mode feature is supported by the USARTx instance. @@ -23456,11 +23458,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3051:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_TCIE); 3052:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3053:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 392 + + 3054:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3055:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable TX Empty Interrupt - ARM GAS /tmp/ccfIOqv2.s page 392 - - 3056:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 TXEIE LL_USART_EnableIT_TXE 3057:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3058:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None @@ -23516,11 +23518,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3108:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_SET_BIT(USARTx->CR1, USART_CR1_EOBIE); 3109:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3110:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** + ARM GAS /tmp/ccyYWdjY.s page 393 + + 3111:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3112:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable LIN Break Detection Interrupt - ARM GAS /tmp/ccfIOqv2.s page 393 - - 3113:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_UART_LIN_INSTANCE(USARTx) can be used to check whether or not 3114:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * LIN feature is supported by the USARTx instance. 3115:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_EnableIT_LBD @@ -23576,11 +23578,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3165:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3166:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3167:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR3_WUFIE */ + ARM GAS /tmp/ccyYWdjY.s page 394 + + 3168:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_CR1_UESM */ 3169:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #if defined(USART_TCBGT_SUPPORT) - ARM GAS /tmp/ccfIOqv2.s page 394 - - 3170:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* Function available only on devices supporting Transmit Complete before Guard Time feature */ 3171:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3172:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Enable Smartcard Transmission Complete Before Guard Time Interrupt @@ -23636,11 +23638,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3222:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3223:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3224:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TXE(USART_TypeDef *USARTx) + ARM GAS /tmp/ccyYWdjY.s page 395 + + 3225:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3226:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** ATOMIC_CLEAR_BIT(USARTx->CR1, USART_CR1_TXEIE); - ARM GAS /tmp/ccfIOqv2.s page 395 - - 3227:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3228:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3229:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -23696,11 +23698,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3279:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR2 LBDIE LL_USART_DisableIT_LBD 3280:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3281:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None + ARM GAS /tmp/ccyYWdjY.s page 396 + + 3282:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3283:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_LBD(USART_TypeDef *USARTx) - ARM GAS /tmp/ccfIOqv2.s page 396 - - 3284:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3285:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** CLEAR_BIT(USARTx->CR2, USART_CR2_LBDIE); 3286:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } @@ -23756,11 +23758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3336:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Disable Smartcard Transmission Complete Before Guard Time Interrupt 3337:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @note Macro IS_SMARTCARD_INSTANCE(USARTx) can be used to check whether or not 3338:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * Smartcard feature is supported by the USARTx instance. + ARM GAS /tmp/ccyYWdjY.s page 397 + + 3339:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 TCBGTIE LL_USART_DisableIT_TCBGT 3340:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance - ARM GAS /tmp/ccfIOqv2.s page 397 - - 3341:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval None 3342:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3343:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE void LL_USART_DisableIT_TCBGT(USART_TypeDef *USARTx) @@ -23816,11 +23818,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3393:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** 3394:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Parity Error Interrupt is enabled or disabled. 3395:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR1 PEIE LL_USART_IsEnabledIT_PE + ARM GAS /tmp/ccyYWdjY.s page 398 + + 3396:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3397:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). - ARM GAS /tmp/ccfIOqv2.s page 398 - - 3398:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ 3399:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** __STATIC_INLINE uint32_t LL_USART_IsEnabledIT_PE(const USART_TypeDef *USARTx) 3400:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -23876,11 +23878,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3450:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3451:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3452:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 399 + + 3453:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @brief Check if the USART Error Interrupt is enabled or disabled. 3454:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @rmtoll CR3 EIE LL_USART_IsEnabledIT_ERROR - ARM GAS /tmp/ccfIOqv2.s page 399 - - 3455:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @param USARTx USART Instance 3456:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @retval State of bit (1 or 0). 3457:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ @@ -23936,11 +23938,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3507:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** #endif /* USART_TCBGT_SUPPORT */ 3508:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3509:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 400 + + 3510:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @} 3511:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 400 - - 3512:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3513:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @defgroup USART_LL_EF_DMA_Management DMA_Management 3514:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** * @{ @@ -23996,11 +23998,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4004 .loc 7 3558 3 discriminator 1 view .LVU1321 4005 .loc 7 3558 3 discriminator 1 view .LVU1322 4006 .LBB459: + ARM GAS /tmp/ccyYWdjY.s page 401 + + 4007 .LBI459: 4008 .file 8 "Drivers/CMSIS/Include/cmsis_gcc.h" - ARM GAS /tmp/ccfIOqv2.s page 401 - - 1:Drivers/CMSIS/Include/cmsis_gcc.h **** /**************************************************************************//** 2:Drivers/CMSIS/Include/cmsis_gcc.h **** * @file cmsis_gcc.h 3:Drivers/CMSIS/Include/cmsis_gcc.h **** * @brief CMSIS compiler GCC header file @@ -24056,11 +24058,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 53:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __NO_RETURN __attribute__((__noreturn__)) 54:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 55:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __USED + ARM GAS /tmp/ccyYWdjY.s page 402 + + 56:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __USED __attribute__((used)) 57:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif - ARM GAS /tmp/ccfIOqv2.s page 402 - - 58:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __WEAK 59:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __WEAK __attribute__((weak)) 60:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24116,11 +24118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 110:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __ALIGNED 111:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __ALIGNED(x) __attribute__((aligned(x))) 112:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccyYWdjY.s page 403 + + 113:Drivers/CMSIS/Include/cmsis_gcc.h **** #ifndef __RESTRICT 114:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __RESTRICT __restrict - ARM GAS /tmp/ccfIOqv2.s page 403 - - 115:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 116:Drivers/CMSIS/Include/cmsis_gcc.h **** 117:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24176,11 +24178,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 167:Drivers/CMSIS/Include/cmsis_gcc.h **** { 168:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 169:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccyYWdjY.s page 404 + + 170:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, control_ns" : "=r" (result) ); 171:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - ARM GAS /tmp/ccfIOqv2.s page 404 - - 172:Drivers/CMSIS/Include/cmsis_gcc.h **** } 173:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 174:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24236,11 +24238,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 224:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 225:Drivers/CMSIS/Include/cmsis_gcc.h **** } 226:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccyYWdjY.s page 405 + + 227:Drivers/CMSIS/Include/cmsis_gcc.h **** 228:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 405 - - 229:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get xPSR Register 230:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the content of the xPSR Register. 231:Drivers/CMSIS/Include/cmsis_gcc.h **** \return xPSR Register value @@ -24296,11 +24298,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 281:Drivers/CMSIS/Include/cmsis_gcc.h **** 282:Drivers/CMSIS/Include/cmsis_gcc.h **** 283:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) + ARM GAS /tmp/ccyYWdjY.s page 406 + + 284:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 285:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer (non-secure) - ARM GAS /tmp/ccfIOqv2.s page 406 - - 286:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure sta 287:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfProcStack Process Stack Pointer value to set 288:Drivers/CMSIS/Include/cmsis_gcc.h **** */ @@ -24356,11 +24358,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 338:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 339:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer (non-secure) 340:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state. + ARM GAS /tmp/ccyYWdjY.s page 407 + + 341:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] topOfMainStack Main Stack Pointer value to set 342:Drivers/CMSIS/Include/cmsis_gcc.h **** */ - ARM GAS /tmp/ccfIOqv2.s page 407 - - 343:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack) 344:Drivers/CMSIS/Include/cmsis_gcc.h **** { 345:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : ); @@ -24416,11 +24418,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 395:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Priority Mask value 396:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 397:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void) + ARM GAS /tmp/ccyYWdjY.s page 408 + + 398:Drivers/CMSIS/Include/cmsis_gcc.h **** { 399:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccfIOqv2.s page 408 - - 400:Drivers/CMSIS/Include/cmsis_gcc.h **** 401:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory"); 402:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); @@ -24476,11 +24478,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 452:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("cpsid f" : : : "memory"); 453:Drivers/CMSIS/Include/cmsis_gcc.h **** } 454:Drivers/CMSIS/Include/cmsis_gcc.h **** + ARM GAS /tmp/ccyYWdjY.s page 409 + + 455:Drivers/CMSIS/Include/cmsis_gcc.h **** 456:Drivers/CMSIS/Include/cmsis_gcc.h **** /** - ARM GAS /tmp/ccfIOqv2.s page 409 - - 457:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Get Base Priority 458:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Returns the current value of the Base Priority register. 459:Drivers/CMSIS/Include/cmsis_gcc.h **** \return Base Priority register value @@ -24536,11 +24538,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 509:Drivers/CMSIS/Include/cmsis_gcc.h **** 510:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 511:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Base Priority with condition + ARM GAS /tmp/ccyYWdjY.s page 410 + + 512:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the Base Priority register only if BASEPRI masking is disable 513:Drivers/CMSIS/Include/cmsis_gcc.h **** or the new value increases the BASEPRI priority level. - ARM GAS /tmp/ccfIOqv2.s page 410 - - 514:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] basePri Base Priority value to set 515:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 516:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri) @@ -24596,11 +24598,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 566:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Fault Mask register when in secure state. 567:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] faultMask Fault Mask value to set 568:Drivers/CMSIS/Include/cmsis_gcc.h **** */ + ARM GAS /tmp/ccyYWdjY.s page 411 + + 569:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask) 570:Drivers/CMSIS/Include/cmsis_gcc.h **** { - ARM GAS /tmp/ccfIOqv2.s page 411 - - 571:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory"); 572:Drivers/CMSIS/Include/cmsis_gcc.h **** } 573:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif @@ -24656,11 +24658,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 623:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 624:Drivers/CMSIS/Include/cmsis_gcc.h **** } 625:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif + ARM GAS /tmp/ccyYWdjY.s page 412 + + 626:Drivers/CMSIS/Include/cmsis_gcc.h **** 627:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccfIOqv2.s page 412 - - 628:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 629:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Process Stack Pointer Limit 630:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure @@ -24716,11 +24718,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 680:Drivers/CMSIS/Include/cmsis_gcc.h **** { 681:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \ 682:Drivers/CMSIS/Include/cmsis_gcc.h **** (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3))) + ARM GAS /tmp/ccyYWdjY.s page 413 + + 683:Drivers/CMSIS/Include/cmsis_gcc.h **** // without main extensions, the non-secure MSPLIM is RAZ/WI 684:Drivers/CMSIS/Include/cmsis_gcc.h **** return 0U; - ARM GAS /tmp/ccfIOqv2.s page 413 - - 685:Drivers/CMSIS/Include/cmsis_gcc.h **** #else 686:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; 687:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("MRS %0, msplim" : "=r" (result) ); @@ -24776,11 +24778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 737:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) 738:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 739:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Set Main Stack Pointer Limit (non-secure) + ARM GAS /tmp/ccyYWdjY.s page 414 + + 740:Drivers/CMSIS/Include/cmsis_gcc.h **** Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure 741:Drivers/CMSIS/Include/cmsis_gcc.h **** Stack Pointer Limit register hence the write is silently ignored. - ARM GAS /tmp/ccfIOqv2.s page 414 - - 742:Drivers/CMSIS/Include/cmsis_gcc.h **** 743:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secu 744:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] MainStackPtrLimit Main Stack Pointer value to set @@ -24836,11 +24838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 794:Drivers/CMSIS/Include/cmsis_gcc.h **** #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \ 795:Drivers/CMSIS/Include/cmsis_gcc.h **** (defined (__FPU_USED ) && (__FPU_USED == 1U)) ) 796:Drivers/CMSIS/Include/cmsis_gcc.h **** #if __has_builtin(__builtin_arm_set_fpscr) + ARM GAS /tmp/ccyYWdjY.s page 415 + + 797:Drivers/CMSIS/Include/cmsis_gcc.h **** // Re-enable using built-in when GCC has been fixed 798:Drivers/CMSIS/Include/cmsis_gcc.h **** // || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2) - ARM GAS /tmp/ccfIOqv2.s page 415 - - 799:Drivers/CMSIS/Include/cmsis_gcc.h **** /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */ 800:Drivers/CMSIS/Include/cmsis_gcc.h **** __builtin_arm_set_fpscr(fpscr); 801:Drivers/CMSIS/Include/cmsis_gcc.h **** #else @@ -24896,11 +24898,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 851:Drivers/CMSIS/Include/cmsis_gcc.h **** 852:Drivers/CMSIS/Include/cmsis_gcc.h **** 853:Drivers/CMSIS/Include/cmsis_gcc.h **** /** + ARM GAS /tmp/ccyYWdjY.s page 416 + + 854:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Send Event 855:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Send Event is a hint instruction. It causes an event to be signaled to the CPU. - ARM GAS /tmp/ccfIOqv2.s page 416 - - 856:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 857:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __SEV() __ASM volatile ("sev") 858:Drivers/CMSIS/Include/cmsis_gcc.h **** @@ -24956,11 +24958,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 908:Drivers/CMSIS/Include/cmsis_gcc.h **** return result; 909:Drivers/CMSIS/Include/cmsis_gcc.h **** #endif 910:Drivers/CMSIS/Include/cmsis_gcc.h **** } + ARM GAS /tmp/ccyYWdjY.s page 417 + + 911:Drivers/CMSIS/Include/cmsis_gcc.h **** 912:Drivers/CMSIS/Include/cmsis_gcc.h **** - ARM GAS /tmp/ccfIOqv2.s page 417 - - 913:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 914:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Reverse byte order (16 bit) 915:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes @@ -25016,11 +25018,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 965:Drivers/CMSIS/Include/cmsis_gcc.h **** /** 966:Drivers/CMSIS/Include/cmsis_gcc.h **** \brief Breakpoint 967:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Causes the processor to enter Debug state. + ARM GAS /tmp/ccyYWdjY.s page 418 + + 968:Drivers/CMSIS/Include/cmsis_gcc.h **** Debug tools can use this to investigate system state when the instruction at a particula 969:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value is ignored by the processor. - ARM GAS /tmp/ccfIOqv2.s page 418 - - 970:Drivers/CMSIS/Include/cmsis_gcc.h **** If required, a debugger can use it to store additional information about the break 971:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 972:Drivers/CMSIS/Include/cmsis_gcc.h **** #define __BKPT(value) __ASM volatile ("bkpt "#value) @@ -25076,11 +25078,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1022:Drivers/CMSIS/Include/cmsis_gcc.h **** \return value of type uint8_t at (*ptr) 1023:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1024:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr) + ARM GAS /tmp/ccyYWdjY.s page 419 + + 1025:Drivers/CMSIS/Include/cmsis_gcc.h **** { 1026:Drivers/CMSIS/Include/cmsis_gcc.h **** uint32_t result; - ARM GAS /tmp/ccfIOqv2.s page 419 - - 1027:Drivers/CMSIS/Include/cmsis_gcc.h **** 1028:Drivers/CMSIS/Include/cmsis_gcc.h **** #if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8) 1029:Drivers/CMSIS/Include/cmsis_gcc.h **** __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) ); @@ -25136,11 +25138,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4015 .syntax unified 4016 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 4017 00ee 53E8003F ldrex r3, [r3] + ARM GAS /tmp/ccyYWdjY.s page 420 + + 4018 @ 0 "" 2 4019 .LVL282: - ARM GAS /tmp/ccfIOqv2.s page 420 - - 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); 4020 .loc 8 1073 4 view .LVU1326 4021 .loc 8 1073 4 is_stmt 0 view .LVU1327 @@ -25196,11 +25198,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1113:Drivers/CMSIS/Include/cmsis_gcc.h **** \details Executes a exclusive STR instruction for 32 bit values. 1114:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] value Value to store 1115:Drivers/CMSIS/Include/cmsis_gcc.h **** \param [in] ptr Pointer to location + ARM GAS /tmp/ccyYWdjY.s page 421 + + 1116:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 0 Function succeeded 1117:Drivers/CMSIS/Include/cmsis_gcc.h **** \return 1 Function failed - ARM GAS /tmp/ccfIOqv2.s page 421 - - 1118:Drivers/CMSIS/Include/cmsis_gcc.h **** */ 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) 4032 .loc 8 1119 31 view .LVU1330 @@ -25232,8 +25234,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4053 .LVL285: 4054 .loc 7 3558 3 is_stmt 0 discriminator 2 view .LVU1337 4055 .LBE457: -1977:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); - 4056 .loc 1 1977 3 is_stmt 1 view .LVU1338 +1979:Src/main.c **** LL_DMA_EnableIT_TE(DMA2, LL_DMA_STREAM_7); + 4056 .loc 1 1979 3 is_stmt 1 view .LVU1338 4057 .LBB463: 4058 .LBI463: 2368:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } @@ -25256,11 +25258,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2385:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None 2386:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** */ 2387:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME1(DMA_TypeDef *DMAx) + ARM GAS /tmp/ccyYWdjY.s page 422 + + 2388:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2389:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CDMEIF1); - ARM GAS /tmp/ccfIOqv2.s page 422 - - 2390:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2391:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** 2392:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** @@ -25316,11 +25318,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2442:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** __STATIC_INLINE void LL_DMA_ClearFlag_DME6(DMA_TypeDef *DMAx) 2443:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 2444:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->HIFCR , DMA_HIFCR_CDMEIF6); + ARM GAS /tmp/ccyYWdjY.s page 423 + + 2445:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2446:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** - ARM GAS /tmp/ccfIOqv2.s page 423 - - 2447:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2448:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 7 direct mode error flag. 2449:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CDMEIF7 LL_DMA_ClearFlag_DME7 @@ -25376,11 +25378,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2499:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** WRITE_REG(DMAx->LIFCR , DMA_LIFCR_CFEIF3); 2500:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 2501:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** + ARM GAS /tmp/ccyYWdjY.s page 424 + + 2502:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** /** 2503:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @brief Clear Stream 4 FIFO error flag. - ARM GAS /tmp/ccfIOqv2.s page 424 - - 2504:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll HIFCR CFEIF4 LL_DMA_ClearFlag_FE4 2505:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2506:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @retval None @@ -25436,11 +25438,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2556:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @rmtoll CR HTIE LL_DMA_EnableIT_HT 2557:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param DMAx DMAx Instance 2558:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @param Stream This parameter can be one of the following values: + ARM GAS /tmp/ccyYWdjY.s page 425 + + 2559:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_0 2560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_1 - ARM GAS /tmp/ccfIOqv2.s page 425 - - 2561:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_2 2562:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_3 2563:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** * @arg @ref LL_DMA_STREAM_4 @@ -25496,18 +25498,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 2611:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** SET_BIT(((DMA_Stream_TypeDef *)((uint32_t)((uint32_t)DMAx + STREAM_OFFSET_TAB[Stream])))->CR, DMA 4061 .loc 6 2611 3 view .LVU1340 4062 0100 734B ldr r3, .L141+80 + ARM GAS /tmp/ccyYWdjY.s page 426 + + 4063 0102 D3F8B820 ldr r2, [r3, #184] 4064 0106 42F01002 orr r2, r2, #16 - ARM GAS /tmp/ccfIOqv2.s page 426 - - 4065 010a C3F8B820 str r2, [r3, #184] 4066 .LVL286: 4067 .loc 6 2611 3 is_stmt 0 view .LVU1341 4068 .LBE464: 4069 .LBE463: -1978:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); - 4070 .loc 1 1978 3 is_stmt 1 view .LVU1342 +1980:Src/main.c **** LL_DMA_ClearFlag_TC7(DMA2); + 4070 .loc 1 1980 3 is_stmt 1 view .LVU1342 4071 .LBB465: 4072 .LBI465: 2589:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25523,8 +25525,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4080 .loc 6 2591 3 is_stmt 0 view .LVU1345 4081 .LBE466: 4082 .LBE465: -1979:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); - 4083 .loc 1 1979 3 is_stmt 1 view .LVU1346 +1981:Src/main.c **** LL_DMA_ClearFlag_TE7(DMA2); + 4083 .loc 1 1981 3 is_stmt 1 view .LVU1346 4084 .LBB467: 4085 .LBI467: 2277:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25539,8 +25541,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4092 .loc 6 2279 3 is_stmt 0 view .LVU1349 4093 .LBE468: 4094 .LBE467: -1980:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART - 4095 .loc 1 1980 3 is_stmt 1 view .LVU1350 +1982:Src/main.c **** LL_DMA_ConfigAddresses(DMA2, LL_DMA_STREAM_7, (uint32_t)&UART_DATA, LL_USART_DMA_GetRegAddr(USART + 4095 .loc 1 1982 3 is_stmt 1 view .LVU1350 4096 .LBB469: 4097 .LBI469: 2365:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -25555,12 +25557,12 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4104 .loc 6 2367 3 is_stmt 0 view .LVU1353 4105 .LBE470: 4106 .LBE469: -1981:Src/main.c **** - 4107 .loc 1 1981 3 is_stmt 1 view .LVU1354 +1983:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 427 + + + 4107 .loc 1 1983 3 is_stmt 1 view .LVU1354 4108 0126 6B4A ldr r2, .L141+84 - ARM GAS /tmp/ccfIOqv2.s page 427 - - 4109 .LVL290: 4110 .LBB471: 4111 .LBI471: @@ -25606,174 +25608,174 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4140 .loc 6 1437 5 is_stmt 0 view .LVU1365 4141 .LBE474: 4142 .LBE473: -1986:Src/main.c **** SD_SLIDE = 0; - 4143 .loc 1 1986 2 is_stmt 1 view .LVU1366 -1986:Src/main.c **** SD_SLIDE = 0; - 4144 .loc 1 1986 10 is_stmt 0 view .LVU1367 +1988:Src/main.c **** SD_SLIDE = 0; + 4143 .loc 1 1988 2 is_stmt 1 view .LVU1366 +1988:Src/main.c **** SD_SLIDE = 0; + 4144 .loc 1 1988 10 is_stmt 0 view .LVU1367 4145 0140 0024 movs r4, #0 4146 0142 664B ldr r3, .L141+92 4147 0144 1C60 str r4, [r3] -1987:Src/main.c **** //Reset all periphery - 4148 .loc 1 1987 2 is_stmt 1 view .LVU1368 -1987:Src/main.c **** //Reset all periphery - 4149 .loc 1 1987 11 is_stmt 0 view .LVU1369 +1989:Src/main.c **** //Reset all periphery + 4148 .loc 1 1989 2 is_stmt 1 view .LVU1368 +1989:Src/main.c **** //Reset all periphery + ARM GAS /tmp/ccyYWdjY.s page 428 + + + 4149 .loc 1 1989 11 is_stmt 0 view .LVU1369 4150 0146 664B ldr r3, .L141+96 - ARM GAS /tmp/ccfIOqv2.s page 428 - - 4151 0148 1C60 str r4, [r3] -1989:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); - 4152 .loc 1 1989 2 is_stmt 1 view .LVU1370 +1991:Src/main.c **** HAL_GPIO_WritePin(EN_5V2_GPIO_Port, EN_5V2_Pin, GPIO_PIN_RESET); + 4152 .loc 1 1991 2 is_stmt 1 view .LVU1370 4153 014a 664F ldr r7, .L141+100 4154 014c 2246 mov r2, r4 4155 014e 0821 movs r1, #8 4156 0150 3846 mov r0, r7 4157 0152 FFF7FEFF bl HAL_GPIO_WritePin 4158 .LVL294: -1990:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); - 4159 .loc 1 1990 2 view .LVU1371 +1992:Src/main.c **** HAL_GPIO_WritePin(LD1_EN_GPIO_Port, LD1_EN_Pin, GPIO_PIN_RESET); + 4159 .loc 1 1992 2 view .LVU1371 4160 0156 2246 mov r2, r4 4161 0158 0421 movs r1, #4 4162 015a 3846 mov r0, r7 4163 015c FFF7FEFF bl HAL_GPIO_WritePin 4164 .LVL295: -1991:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); - 4165 .loc 1 1991 2 view .LVU1372 +1993:Src/main.c **** HAL_GPIO_WritePin(LD2_EN_GPIO_Port, LD2_EN_Pin, GPIO_PIN_RESET); + 4165 .loc 1 1993 2 view .LVU1372 4166 0160 DFF8A481 ldr r8, .L141+136 4167 0164 2246 mov r2, r4 4168 0166 4FF48071 mov r1, #256 4169 016a 4046 mov r0, r8 4170 016c FFF7FEFF bl HAL_GPIO_WritePin 4171 .LVL296: -1992:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); - 4172 .loc 1 1992 2 view .LVU1373 +1994:Src/main.c **** HAL_GPIO_WritePin(REF0_EN_GPIO_Port, REF0_EN_Pin, GPIO_PIN_RESET); + 4172 .loc 1 1994 2 view .LVU1373 4173 0170 2246 mov r2, r4 4174 0172 1021 movs r1, #16 4175 0174 3846 mov r0, r7 4176 0176 FFF7FEFF bl HAL_GPIO_WritePin 4177 .LVL297: -1993:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); - 4178 .loc 1 1993 2 view .LVU1374 +1995:Src/main.c **** HAL_GPIO_WritePin(REF2_ON_GPIO_Port, REF2_ON_Pin, GPIO_PIN_RESET); + 4178 .loc 1 1995 2 view .LVU1374 4179 017a 5B4E ldr r6, .L141+104 4180 017c 2246 mov r2, r4 4181 017e 4FF48061 mov r1, #1024 4182 0182 3046 mov r0, r6 4183 0184 FFF7FEFF bl HAL_GPIO_WritePin 4184 .LVL298: -1994:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); - 4185 .loc 1 1994 2 view .LVU1375 +1996:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_RESET); + 4185 .loc 1 1996 2 view .LVU1375 4186 0188 584D ldr r5, .L141+108 4187 018a 2246 mov r2, r4 4188 018c 0821 movs r1, #8 4189 018e 2846 mov r0, r5 4190 0190 FFF7FEFF bl HAL_GPIO_WritePin 4191 .LVL299: -1995:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); - 4192 .loc 1 1995 2 view .LVU1376 +1997:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_RESET); + 4192 .loc 1 1997 2 view .LVU1376 4193 0194 2246 mov r2, r4 4194 0196 0121 movs r1, #1 4195 0198 2846 mov r0, r5 4196 019a FFF7FEFF bl HAL_GPIO_WritePin 4197 .LVL300: -1996:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 4198 .loc 1 1996 2 view .LVU1377 +1998:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + ARM GAS /tmp/ccyYWdjY.s page 429 + + + 4198 .loc 1 1998 2 view .LVU1377 4199 019e 2246 mov r2, r4 - ARM GAS /tmp/ccfIOqv2.s page 429 - - 4200 01a0 0221 movs r1, #2 4201 01a2 2846 mov r0, r5 4202 01a4 FFF7FEFF bl HAL_GPIO_WritePin 4203 .LVL301: -1997:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 4204 .loc 1 1997 2 view .LVU1378 +1999:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 4204 .loc 1 1999 2 view .LVU1378 4205 01a8 2246 mov r2, r4 4206 01aa 4FF40061 mov r1, #2048 4207 01ae 3046 mov r0, r6 4208 01b0 FFF7FEFF bl HAL_GPIO_WritePin 4209 .LVL302: -1998:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) - 4210 .loc 1 1998 2 view .LVU1379 +2000:Src/main.c **** // for (uint16_t i = 0; i < SD_Length; i++) + 4210 .loc 1 2000 2 view .LVU1379 4211 01b4 2246 mov r2, r4 4212 01b6 2021 movs r1, #32 4213 01b8 3846 mov r0, r7 4214 01ba FFF7FEFF bl HAL_GPIO_WritePin 4215 .LVL303: -2008:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC - 4216 .loc 1 2008 2 view .LVU1380 +2010:Src/main.c **** HAL_GPIO_WritePin(ADC_MPD2_CS_GPIO_Port, ADC_MPD2_CS_Pin, GPIO_PIN_SET);//Enable SPI for MPhD2 ADC + 4216 .loc 1 2010 2 view .LVU1380 4217 01be 07F50067 add r7, r7, #2048 4218 01c2 0122 movs r2, #1 4219 01c4 4FF48061 mov r1, #1024 4220 01c8 3846 mov r0, r7 4221 01ca FFF7FEFF bl HAL_GPIO_WritePin 4222 .LVL304: -2009:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4223 .loc 1 2009 2 view .LVU1381 +2011:Src/main.c **** HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 4223 .loc 1 2011 2 view .LVU1381 4224 01ce 484C ldr r4, .L141+112 4225 01d0 0122 movs r2, #1 4226 01d2 4021 movs r1, #64 4227 01d4 2046 mov r0, r4 4228 01d6 FFF7FEFF bl HAL_GPIO_WritePin 4229 .LVL305: -2010:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); - 4230 .loc 1 2010 2 view .LVU1382 +2012:Src/main.c **** HAL_GPIO_WritePin(SPI5_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); + 4230 .loc 1 2012 2 view .LVU1382 4231 01da 0122 movs r2, #1 4232 01dc 4FF48041 mov r1, #16384 4233 01e0 3846 mov r0, r7 4234 01e2 FFF7FEFF bl HAL_GPIO_WritePin 4235 .LVL306: -2011:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 - 4236 .loc 1 2011 2 view .LVU1383 +2013:Src/main.c **** HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);//End operation with LDAC1 + 4236 .loc 1 2013 2 view .LVU1383 4237 01e6 0122 movs r2, #1 4238 01e8 4FF48041 mov r1, #16384 4239 01ec 2046 mov r0, r4 4240 01ee FFF7FEFF bl HAL_GPIO_WritePin 4241 .LVL307: -2012:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4242 .loc 1 2012 2 view .LVU1384 +2014:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 4242 .loc 1 2014 2 view .LVU1384 4243 01f2 0122 movs r2, #1 4244 01f4 4FF48041 mov r1, #16384 4245 01f8 3046 mov r0, r6 4246 01fa FFF7FEFF bl HAL_GPIO_WritePin 4247 .LVL308: -2013:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4248 .loc 1 2013 2 view .LVU1385 - ARM GAS /tmp/ccfIOqv2.s page 430 + ARM GAS /tmp/ccyYWdjY.s page 430 +2015:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 4248 .loc 1 2015 2 view .LVU1385 4249 01fe 0122 movs r2, #1 4250 0200 4021 movs r1, #64 4251 0202 2846 mov r0, r5 4252 0204 FFF7FEFF bl HAL_GPIO_WritePin 4253 .LVL309: -2014:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4254 .loc 1 2014 2 view .LVU1386 +2016:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 4254 .loc 1 2016 2 view .LVU1386 4255 0208 0122 movs r2, #1 4256 020a 4FF48051 mov r1, #4096 4257 020e 3046 mov r0, r6 4258 0210 FFF7FEFF bl HAL_GPIO_WritePin 4259 .LVL310: -2015:Src/main.c **** - 4260 .loc 1 2015 2 view .LVU1387 +2017:Src/main.c **** + 4260 .loc 1 2017 2 view .LVU1387 4261 0214 0122 movs r2, #1 4262 0216 1021 movs r1, #16 4263 0218 2846 mov r0, r5 4264 021a FFF7FEFF bl HAL_GPIO_WritePin 4265 .LVL311: -2019:Src/main.c **** { - 4266 .loc 1 2019 2 view .LVU1388 -2019:Src/main.c **** { - 4267 .loc 1 2019 6 is_stmt 0 view .LVU1389 +2021:Src/main.c **** { + 4266 .loc 1 2021 2 view .LVU1388 +2021:Src/main.c **** { + 4267 .loc 1 2021 6 is_stmt 0 view .LVU1389 4268 021e 0121 movs r1, #1 4269 0220 4046 mov r0, r8 4270 0222 FFF7FEFF bl HAL_GPIO_ReadPin 4271 .LVL312: -2019:Src/main.c **** { - 4272 .loc 1 2019 5 discriminator 1 view .LVU1390 +2021:Src/main.c **** { + 4272 .loc 1 2021 5 discriminator 1 view .LVU1390 4273 0226 40B1 cbz r0, .L139 4274 .L129: -2049:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4275 .loc 1 2049 1 view .LVU1391 +2051:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 4275 .loc 1 2051 1 view .LVU1391 4276 0228 BDE8F081 pop {r4, r5, r6, r7, r8, pc} 4277 .LVL313: 4278 .L138: @@ -25796,88 +25798,88 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1431:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 4292 .loc 6 1431 5 is_stmt 0 view .LVU1395 4293 .LBE475: + ARM GAS /tmp/ccyYWdjY.s page 431 + + 4294 .LBE476: -2022:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 431 - - - 4295 .loc 1 2022 3 is_stmt 1 view .LVU1396 -2022:Src/main.c **** { - 4296 .loc 1 2022 7 is_stmt 0 view .LVU1397 +2024:Src/main.c **** { + 4295 .loc 1 2024 3 is_stmt 1 view .LVU1396 +2024:Src/main.c **** { + 4296 .loc 1 2024 7 is_stmt 0 view .LVU1397 4297 023a 4FF48071 mov r1, #256 4298 023e 2846 mov r0, r5 4299 0240 FFF7FEFF bl HAL_GPIO_ReadPin 4300 .LVL316: -2022:Src/main.c **** { - 4301 .loc 1 2022 6 discriminator 1 view .LVU1398 +2024:Src/main.c **** { + 4301 .loc 1 2024 6 discriminator 1 view .LVU1398 4302 0244 0028 cmp r0, #0 4303 0246 EFD1 bne .L129 -2025:Src/main.c **** if (test == 0) //0 - suc - 4304 .loc 1 2025 4 is_stmt 1 view .LVU1399 -2025:Src/main.c **** if (test == 0) //0 - suc - 4305 .loc 1 2025 11 is_stmt 0 view .LVU1400 +2027:Src/main.c **** if (test == 0) //0 - suc + 4304 .loc 1 2027 4 is_stmt 1 view .LVU1399 +2027:Src/main.c **** if (test == 0) //0 - suc + 4305 .loc 1 2027 11 is_stmt 0 view .LVU1400 4306 0248 2A48 ldr r0, .L141+116 4307 024a FFF7FEFF bl Mount_SD 4308 .LVL317: -2025:Src/main.c **** if (test == 0) //0 - suc - 4309 .loc 1 2025 9 discriminator 1 view .LVU1401 +2027:Src/main.c **** if (test == 0) //0 - suc + 4309 .loc 1 2027 9 discriminator 1 view .LVU1401 4310 024e 2A4B ldr r3, .L141+120 4311 0250 1860 str r0, [r3] -2026:Src/main.c **** { - 4312 .loc 1 2026 4 is_stmt 1 view .LVU1402 -2026:Src/main.c **** { - 4313 .loc 1 2026 7 is_stmt 0 view .LVU1403 +2028:Src/main.c **** { + 4312 .loc 1 2028 4 is_stmt 1 view .LVU1402 +2028:Src/main.c **** { + 4313 .loc 1 2028 7 is_stmt 0 view .LVU1403 4314 0252 18B1 cbz r0, .L140 4315 .L136: -2038:Src/main.c **** } - 4316 .loc 1 2038 4 is_stmt 1 view .LVU1404 -2038:Src/main.c **** } - 4317 .loc 1 2038 14 is_stmt 0 view .LVU1405 +2040:Src/main.c **** } + 4316 .loc 1 2040 4 is_stmt 1 view .LVU1404 +2040:Src/main.c **** } + 4317 .loc 1 2040 14 is_stmt 0 view .LVU1405 4318 0254 294B ldr r3, .L141+124 4319 0256 0122 movs r2, #1 4320 0258 1A70 strb r2, [r3] -2049:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ - 4321 .loc 1 2049 1 view .LVU1406 +2051:Src/main.c **** static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_ + 4321 .loc 1 2051 1 view .LVU1406 4322 025a E5E7 b .L129 4323 .L140: -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4324 .loc 1 2029 5 is_stmt 1 view .LVU1407 -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4325 .loc 1 2029 12 is_stmt 0 view .LVU1408 +2031:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4324 .loc 1 2031 5 is_stmt 1 view .LVU1407 +2031:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4325 .loc 1 2031 12 is_stmt 0 view .LVU1408 4326 025c 1E23 movs r3, #30 4327 025e 1A46 mov r2, r3 4328 0260 2749 ldr r1, .L141+128 4329 0262 2848 ldr r0, .L141+132 4330 0264 FFF7FEFF bl Seek_Read_File 4331 .LVL318: -2029:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 4332 .loc 1 2029 10 discriminator 1 view .LVU1409 +2031:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 4332 .loc 1 2031 10 discriminator 1 view .LVU1409 4333 0268 234C ldr r4, .L141+120 4334 026a 2060 str r0, [r4] -2030:Src/main.c **** UART_rec_incr = 0; - 4335 .loc 1 2030 5 is_stmt 1 view .LVU1410 -2030:Src/main.c **** UART_rec_incr = 0; - 4336 .loc 1 2030 12 is_stmt 0 view .LVU1411 - ARM GAS /tmp/ccfIOqv2.s page 432 +2032:Src/main.c **** UART_rec_incr = 0; + 4335 .loc 1 2032 5 is_stmt 1 view .LVU1410 + ARM GAS /tmp/ccyYWdjY.s page 432 +2032:Src/main.c **** UART_rec_incr = 0; + 4336 .loc 1 2032 12 is_stmt 0 view .LVU1411 4337 026c 2148 ldr r0, .L141+116 4338 026e FFF7FEFF bl Unmount_SD 4339 .LVL319: -2030:Src/main.c **** UART_rec_incr = 0; - 4340 .loc 1 2030 10 discriminator 1 view .LVU1412 +2032:Src/main.c **** UART_rec_incr = 0; + 4340 .loc 1 2032 10 discriminator 1 view .LVU1412 4341 0272 2060 str r0, [r4] -2031:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4342 .loc 1 2031 5 is_stmt 1 view .LVU1413 -2031:Src/main.c **** flg_tmt = 0;//Reset the timeout flag - 4343 .loc 1 2031 19 is_stmt 0 view .LVU1414 +2033:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 4342 .loc 1 2033 5 is_stmt 1 view .LVU1413 +2033:Src/main.c **** flg_tmt = 0;//Reset the timeout flag + 4343 .loc 1 2033 19 is_stmt 0 view .LVU1414 4344 0274 0023 movs r3, #0 4345 0276 084A ldr r2, .L141+24 4346 0278 1380 strh r3, [r2] @ movhi -2032:Src/main.c **** } - 4347 .loc 1 2032 5 is_stmt 1 view .LVU1415 -2032:Src/main.c **** } - 4348 .loc 1 2032 13 is_stmt 0 view .LVU1416 +2034:Src/main.c **** } + 4347 .loc 1 2034 5 is_stmt 1 view .LVU1415 +2034:Src/main.c **** } + 4348 .loc 1 2034 13 is_stmt 0 view .LVU1416 4349 027a 064A ldr r2, .L141+20 4350 027c 1370 strb r3, [r2] 4351 027e E9E7 b .L136 @@ -25916,11 +25918,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4384 02f4 00000000 .word .LC0 4385 02f8 00000000 .word test 4386 02fc 00000000 .word CPU_state + ARM GAS /tmp/ccyYWdjY.s page 433 + + 4387 0300 00000000 .word COMMAND 4388 0304 04000000 .word .LC1 - ARM GAS /tmp/ccfIOqv2.s page 433 - - 4389 0308 000C0240 .word 1073875968 4390 .cfi_endproc 4391 .LFE1207: @@ -25932,23 +25934,23 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4399 Get_ADC: 4400 .LVL320: 4401 .LFB1213: -2478:Src/main.c **** uint16_t OUT; - 4402 .loc 1 2478 1 is_stmt 1 view -0 +2480:Src/main.c **** uint16_t OUT; + 4402 .loc 1 2480 1 is_stmt 1 view -0 4403 .cfi_startproc 4404 @ args = 0, pretend = 0, frame = 0 4405 @ frame_needed = 0, uses_anonymous_args = 0 -2478:Src/main.c **** uint16_t OUT; - 4406 .loc 1 2478 1 is_stmt 0 view .LVU1418 +2480:Src/main.c **** uint16_t OUT; + 4406 .loc 1 2480 1 is_stmt 0 view .LVU1418 4407 0000 10B5 push {r4, lr} 4408 .LCFI40: 4409 .cfi_def_cfa_offset 8 4410 .cfi_offset 4, -8 4411 .cfi_offset 14, -4 4412 0002 0024 movs r4, #0 -2479:Src/main.c **** switch (num) - 4413 .loc 1 2479 2 is_stmt 1 view .LVU1419 -2480:Src/main.c **** { - 4414 .loc 1 2480 2 view .LVU1420 +2481:Src/main.c **** switch (num) + 4413 .loc 1 2481 2 is_stmt 1 view .LVU1419 +2482:Src/main.c **** { + 4414 .loc 1 2482 2 view .LVU1420 4415 0004 0528 cmp r0, #5 4416 0006 2CD8 bhi .L152 4417 0008 DFE800F0 tbb [pc, r0] @@ -25961,132 +25963,132 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4424 0011 26 .byte (.L145-.L146)/2 4425 .p2align 1 4426 .L151: -2483:Src/main.c **** break; - 4427 .loc 1 2483 5 view .LVU1421 +2485:Src/main.c **** break; + 4427 .loc 1 2485 5 view .LVU1421 4428 0012 1548 ldr r0, .L154 4429 .LVL321: -2483:Src/main.c **** break; - 4430 .loc 1 2483 5 is_stmt 0 view .LVU1422 +2485:Src/main.c **** break; + 4430 .loc 1 2485 5 is_stmt 0 view .LVU1422 4431 0014 FFF7FEFF bl HAL_ADC_Start 4432 .LVL322: -2484:Src/main.c **** case 1: - 4433 .loc 1 2484 4 is_stmt 1 view .LVU1423 +2486:Src/main.c **** case 1: + 4433 .loc 1 2486 4 is_stmt 1 view .LVU1423 4434 0018 2046 mov r0, r4 4435 .L144: 4436 .LVL323: -2503:Src/main.c **** } - 4437 .loc 1 2503 2 view .LVU1424 -2504:Src/main.c **** - 4438 .loc 1 2504 1 is_stmt 0 view .LVU1425 - ARM GAS /tmp/ccfIOqv2.s page 434 +2505:Src/main.c **** } + 4437 .loc 1 2505 2 view .LVU1424 + ARM GAS /tmp/ccyYWdjY.s page 434 +2506:Src/main.c **** + 4438 .loc 1 2506 1 is_stmt 0 view .LVU1425 4439 001a 10BD pop {r4, pc} 4440 .LVL324: 4441 .L150: -2486:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4442 .loc 1 2486 5 is_stmt 1 view .LVU1426 +2488:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 4442 .loc 1 2488 5 is_stmt 1 view .LVU1426 4443 001c 124C ldr r4, .L154 4444 001e 6421 movs r1, #100 4445 0020 2046 mov r0, r4 4446 .LVL325: -2486:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc - 4447 .loc 1 2486 5 is_stmt 0 view .LVU1427 +2488:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc1); // Get value adc + 4447 .loc 1 2488 5 is_stmt 0 view .LVU1427 4448 0022 FFF7FEFF bl HAL_ADC_PollForConversion 4449 .LVL326: -2487:Src/main.c **** break; - 4450 .loc 1 2487 9 is_stmt 1 view .LVU1428 -2487:Src/main.c **** break; - 4451 .loc 1 2487 15 is_stmt 0 view .LVU1429 +2489:Src/main.c **** break; + 4450 .loc 1 2489 9 is_stmt 1 view .LVU1428 +2489:Src/main.c **** break; + 4451 .loc 1 2489 15 is_stmt 0 view .LVU1429 4452 0026 2046 mov r0, r4 4453 0028 FFF7FEFF bl HAL_ADC_GetValue 4454 .LVL327: -2487:Src/main.c **** break; - 4455 .loc 1 2487 13 discriminator 1 view .LVU1430 +2489:Src/main.c **** break; + 4455 .loc 1 2489 13 discriminator 1 view .LVU1430 4456 002c 80B2 uxth r0, r0 4457 .LVL328: -2488:Src/main.c **** case 2: - 4458 .loc 1 2488 4 is_stmt 1 view .LVU1431 +2490:Src/main.c **** case 2: + 4458 .loc 1 2490 4 is_stmt 1 view .LVU1431 4459 002e F4E7 b .L144 4460 .LVL329: 4461 .L149: -2490:Src/main.c **** break; - 4462 .loc 1 2490 5 view .LVU1432 +2492:Src/main.c **** break; + 4462 .loc 1 2492 5 view .LVU1432 4463 0030 0D48 ldr r0, .L154 4464 .LVL330: -2490:Src/main.c **** break; - 4465 .loc 1 2490 5 is_stmt 0 view .LVU1433 +2492:Src/main.c **** break; + 4465 .loc 1 2492 5 is_stmt 0 view .LVU1433 4466 0032 FFF7FEFF bl HAL_ADC_Stop 4467 .LVL331: -2491:Src/main.c **** case 3: - 4468 .loc 1 2491 4 is_stmt 1 view .LVU1434 +2493:Src/main.c **** case 3: + 4468 .loc 1 2493 4 is_stmt 1 view .LVU1434 4469 0036 2046 mov r0, r4 4470 0038 EFE7 b .L144 4471 .LVL332: 4472 .L148: -2493:Src/main.c **** break; - 4473 .loc 1 2493 5 view .LVU1435 +2495:Src/main.c **** break; + 4473 .loc 1 2495 5 view .LVU1435 4474 003a 0C48 ldr r0, .L154+4 4475 .LVL333: -2493:Src/main.c **** break; - 4476 .loc 1 2493 5 is_stmt 0 view .LVU1436 +2495:Src/main.c **** break; + 4476 .loc 1 2495 5 is_stmt 0 view .LVU1436 4477 003c FFF7FEFF bl HAL_ADC_Start 4478 .LVL334: -2494:Src/main.c **** case 4: - 4479 .loc 1 2494 4 is_stmt 1 view .LVU1437 +2496:Src/main.c **** case 4: + 4479 .loc 1 2496 4 is_stmt 1 view .LVU1437 4480 0040 2046 mov r0, r4 4481 0042 EAE7 b .L144 + ARM GAS /tmp/ccyYWdjY.s page 435 + + 4482 .LVL335: 4483 .L147: - ARM GAS /tmp/ccfIOqv2.s page 435 - - -2496:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4484 .loc 1 2496 5 view .LVU1438 +2498:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 4484 .loc 1 2498 5 view .LVU1438 4485 0044 094C ldr r4, .L154+4 4486 0046 6421 movs r1, #100 4487 0048 2046 mov r0, r4 4488 .LVL336: -2496:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc - 4489 .loc 1 2496 5 is_stmt 0 view .LVU1439 +2498:Src/main.c **** OUT = HAL_ADC_GetValue(&hadc3); // Get value adc + 4489 .loc 1 2498 5 is_stmt 0 view .LVU1439 4490 004a FFF7FEFF bl HAL_ADC_PollForConversion 4491 .LVL337: -2497:Src/main.c **** break; - 4492 .loc 1 2497 9 is_stmt 1 view .LVU1440 -2497:Src/main.c **** break; - 4493 .loc 1 2497 15 is_stmt 0 view .LVU1441 +2499:Src/main.c **** break; + 4492 .loc 1 2499 9 is_stmt 1 view .LVU1440 +2499:Src/main.c **** break; + 4493 .loc 1 2499 15 is_stmt 0 view .LVU1441 4494 004e 2046 mov r0, r4 4495 0050 FFF7FEFF bl HAL_ADC_GetValue 4496 .LVL338: -2497:Src/main.c **** break; - 4497 .loc 1 2497 13 discriminator 1 view .LVU1442 +2499:Src/main.c **** break; + 4497 .loc 1 2499 13 discriminator 1 view .LVU1442 4498 0054 80B2 uxth r0, r0 4499 .LVL339: -2498:Src/main.c **** case 5: - 4500 .loc 1 2498 4 is_stmt 1 view .LVU1443 +2500:Src/main.c **** case 5: + 4500 .loc 1 2500 4 is_stmt 1 view .LVU1443 4501 0056 E0E7 b .L144 4502 .LVL340: 4503 .L145: -2500:Src/main.c **** break; - 4504 .loc 1 2500 9 view .LVU1444 +2502:Src/main.c **** break; + 4504 .loc 1 2502 9 view .LVU1444 4505 0058 0448 ldr r0, .L154+4 4506 .LVL341: -2500:Src/main.c **** break; - 4507 .loc 1 2500 9 is_stmt 0 view .LVU1445 +2502:Src/main.c **** break; + 4507 .loc 1 2502 9 is_stmt 0 view .LVU1445 4508 005a FFF7FEFF bl HAL_ADC_Stop 4509 .LVL342: -2501:Src/main.c **** } - 4510 .loc 1 2501 4 is_stmt 1 view .LVU1446 +2503:Src/main.c **** } + 4510 .loc 1 2503 4 is_stmt 1 view .LVU1446 4511 005e 2046 mov r0, r4 4512 0060 DBE7 b .L144 4513 .LVL343: 4514 .L152: -2480:Src/main.c **** { - 4515 .loc 1 2480 2 is_stmt 0 view .LVU1447 +2482:Src/main.c **** { + 4515 .loc 1 2482 2 is_stmt 0 view .LVU1447 4516 0062 2046 mov r0, r4 4517 .LVL344: -2480:Src/main.c **** { - 4518 .loc 1 2480 2 view .LVU1448 +2482:Src/main.c **** { + 4518 .loc 1 2482 2 view .LVU1448 4519 0064 D9E7 b .L144 4520 .L155: 4521 0066 00BF .align 2 @@ -26096,24 +26098,24 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4525 .cfi_endproc 4526 .LFE1213: 4528 .section .text.Set_LTEC,"ax",%progbits + ARM GAS /tmp/ccyYWdjY.s page 436 + + 4529 .align 1 4530 .global Set_LTEC - ARM GAS /tmp/ccfIOqv2.s page 436 - - 4531 .syntax unified 4532 .thumb 4533 .thumb_func 4535 Set_LTEC: 4536 .LVL345: 4537 .LFB1211: -2306:Src/main.c **** uint32_t tmp32; - 4538 .loc 1 2306 1 is_stmt 1 view -0 +2308:Src/main.c **** uint32_t tmp32; + 4538 .loc 1 2308 1 is_stmt 1 view -0 4539 .cfi_startproc 4540 @ args = 0, pretend = 0, frame = 0 4541 @ frame_needed = 0, uses_anonymous_args = 0 -2306:Src/main.c **** uint32_t tmp32; - 4542 .loc 1 2306 1 is_stmt 0 view .LVU1450 +2308:Src/main.c **** uint32_t tmp32; + 4542 .loc 1 2308 1 is_stmt 0 view .LVU1450 4543 0000 38B5 push {r3, r4, r5, lr} 4544 .LCFI41: 4545 .cfi_def_cfa_offset 16 @@ -26122,14 +26124,14 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4548 .cfi_offset 5, -8 4549 .cfi_offset 14, -4 4550 0002 0C46 mov r4, r1 -2307:Src/main.c **** - 4551 .loc 1 2307 2 is_stmt 1 view .LVU1451 -2309:Src/main.c **** { - 4552 .loc 1 2309 2 view .LVU1452 +2309:Src/main.c **** + 4551 .loc 1 2309 2 is_stmt 1 view .LVU1451 +2311:Src/main.c **** { + 4552 .loc 1 2311 2 view .LVU1452 4553 0004 0138 subs r0, r0, #1 4554 .LVL346: -2309:Src/main.c **** { - 4555 .loc 1 2309 2 is_stmt 0 view .LVU1453 +2311:Src/main.c **** { + 4555 .loc 1 2311 2 is_stmt 0 view .LVU1453 4556 0006 0328 cmp r0, #3 4557 0008 23D8 bhi .L157 4558 000a DFE800F0 tbb [pc, r0] @@ -26140,33 +26142,33 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4563 0011 7C .byte (.L158-.L159)/2 4564 .p2align 1 4565 .L162: -2312:Src/main.c **** //tmp32=0; - 4566 .loc 1 2312 4 is_stmt 1 view .LVU1454 +2314:Src/main.c **** //tmp32=0; + 4566 .loc 1 2314 4 is_stmt 1 view .LVU1454 4567 0012 0022 movs r2, #0 4568 0014 4FF48041 mov r1, #16384 4569 .LVL347: -2312:Src/main.c **** //tmp32=0; - 4570 .loc 1 2312 4 is_stmt 0 view .LVU1455 +2314:Src/main.c **** //tmp32=0; + 4570 .loc 1 2314 4 is_stmt 0 view .LVU1455 4571 0018 4B48 ldr r0, .L189 4572 .LVL348: -2312:Src/main.c **** //tmp32=0; - 4573 .loc 1 2312 4 view .LVU1456 +2314:Src/main.c **** //tmp32=0; + 4573 .loc 1 2314 4 view .LVU1456 4574 001a FFF7FEFF bl HAL_GPIO_WritePin 4575 .LVL349: -2315:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4576 .loc 1 2315 4 is_stmt 1 view .LVU1457 -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4577 .loc 1 2316 4 view .LVU1458 -2315:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - ARM GAS /tmp/ccfIOqv2.s page 437 +2317:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4576 .loc 1 2317 4 is_stmt 1 view .LVU1457 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + ARM GAS /tmp/ccyYWdjY.s page 437 - 4578 .loc 1 2315 10 is_stmt 0 view .LVU1459 + 4577 .loc 1 2318 4 view .LVU1458 +2317:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4578 .loc 1 2317 10 is_stmt 0 view .LVU1459 4579 001e 0022 movs r2, #0 4580 .LVL350: 4581 .L163: -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4582 .loc 1 2316 42 is_stmt 1 discriminator 1 view .LVU1460 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4582 .loc 1 2318 42 is_stmt 1 discriminator 1 view .LVU1460 4583 .LBB477: 4584 .LBI477: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26187,22 +26189,22 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4595 .loc 4 918 66 view .LVU1465 4596 .LBE478: 4597 .LBE477: -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4598 .loc 1 2316 42 discriminator 2 view .LVU1466 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4598 .loc 1 2318 42 discriminator 2 view .LVU1466 4599 002a B2F5FA7F cmp r2, #500 4600 002e 01D8 bhi .L164 -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4601 .loc 1 2316 59 is_stmt 1 discriminator 3 view .LVU1467 -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4602 .loc 1 2316 64 is_stmt 0 discriminator 3 view .LVU1468 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4601 .loc 1 2318 59 is_stmt 1 discriminator 3 view .LVU1467 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4602 .loc 1 2318 64 is_stmt 0 discriminator 3 view .LVU1468 4603 0030 0132 adds r2, r2, #1 4604 .LVL352: -2316:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4605 .loc 1 2316 64 discriminator 3 view .LVU1469 +2318:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4605 .loc 1 2318 64 discriminator 3 view .LVU1469 4606 0032 F5E7 b .L163 4607 .L164: -2317:Src/main.c **** tmp32 = 0; - 4608 .loc 1 2317 4 is_stmt 1 view .LVU1470 +2319:Src/main.c **** tmp32 = 0; + 4608 .loc 1 2319 4 is_stmt 1 view .LVU1470 4609 .LVL353: 4610 .LBB479: 4611 .LBI479: @@ -26216,11 +26218,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 1354:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** * @retval None 1355:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** */ 1356:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __STATIC_INLINE void LL_SPI_TransmitData8(SPI_TypeDef *SPIx, uint8_t TxData) + ARM GAS /tmp/ccyYWdjY.s page 438 + + 1357:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { 1358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #if defined (__GNUC__) - ARM GAS /tmp/ccfIOqv2.s page 438 - - 1359:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** __IO uint8_t *spidr = ((__IO uint8_t *)&SPIx->DR); 1360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** *spidr = TxData; 1361:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** #else @@ -26251,17 +26253,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4620 .loc 4 1377 10 view .LVU1475 4621 .LBE480: 4622 .LBE479: -2318:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4623 .loc 1 2318 4 is_stmt 1 view .LVU1476 -2319:Src/main.c **** (void) SPI2->DR; - 4624 .loc 1 2319 4 view .LVU1477 -2318:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4625 .loc 1 2318 10 is_stmt 0 view .LVU1478 +2320:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4623 .loc 1 2320 4 is_stmt 1 view .LVU1476 +2321:Src/main.c **** (void) SPI2->DR; + 4624 .loc 1 2321 4 view .LVU1477 +2320:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4625 .loc 1 2320 10 is_stmt 0 view .LVU1478 4626 0038 0022 movs r2, #0 4627 .LVL355: 4628 .L166: -2319:Src/main.c **** (void) SPI2->DR; - 4629 .loc 1 2319 43 is_stmt 1 discriminator 1 view .LVU1479 +2321:Src/main.c **** (void) SPI2->DR; + 4629 .loc 1 2321 43 is_stmt 1 discriminator 1 view .LVU1479 4630 .LBB481: 4631 .LBI481: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26276,99 +26278,99 @@ ARM GAS /tmp/ccfIOqv2.s page 1 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4638 .loc 4 907 68 view .LVU1483 4639 003e 13F0010F tst r3, #1 + ARM GAS /tmp/ccyYWdjY.s page 439 + + 4640 0042 04D1 bne .L167 4641 .LVL356: - ARM GAS /tmp/ccfIOqv2.s page 439 - - 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4642 .loc 4 907 68 view .LVU1484 4643 .LBE482: 4644 .LBE481: -2319:Src/main.c **** (void) SPI2->DR; - 4645 .loc 1 2319 43 discriminator 2 view .LVU1485 +2321:Src/main.c **** (void) SPI2->DR; + 4645 .loc 1 2321 43 discriminator 2 view .LVU1485 4646 0044 B2F5FA7F cmp r2, #500 4647 0048 01D8 bhi .L167 -2319:Src/main.c **** (void) SPI2->DR; - 4648 .loc 1 2319 60 is_stmt 1 discriminator 3 view .LVU1486 -2319:Src/main.c **** (void) SPI2->DR; - 4649 .loc 1 2319 65 is_stmt 0 discriminator 3 view .LVU1487 +2321:Src/main.c **** (void) SPI2->DR; + 4648 .loc 1 2321 60 is_stmt 1 discriminator 3 view .LVU1486 +2321:Src/main.c **** (void) SPI2->DR; + 4649 .loc 1 2321 65 is_stmt 0 discriminator 3 view .LVU1487 4650 004a 0132 adds r2, r2, #1 4651 .LVL357: -2319:Src/main.c **** (void) SPI2->DR; - 4652 .loc 1 2319 65 discriminator 3 view .LVU1488 +2321:Src/main.c **** (void) SPI2->DR; + 4652 .loc 1 2321 65 discriminator 3 view .LVU1488 4653 004c F5E7 b .L166 4654 .L167: -2320:Src/main.c **** break; - 4655 .loc 1 2320 4 is_stmt 1 view .LVU1489 +2322:Src/main.c **** break; + 4655 .loc 1 2322 4 is_stmt 1 view .LVU1489 4656 004e 3F4B ldr r3, .L189+4 4657 0050 DB68 ldr r3, [r3, #12] -2321:Src/main.c **** case 2: - 4658 .loc 1 2321 3 view .LVU1490 +2323:Src/main.c **** case 2: + 4658 .loc 1 2323 3 view .LVU1490 4659 .LVL358: 4660 .L157: -2357:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 - 4661 .loc 1 2357 2 view .LVU1491 +2359:Src/main.c **** HAL_GPIO_WritePin(DAC_LD2_CS_GPIO_Port, DAC_LD2_CS_Pin, GPIO_PIN_SET);//End operation with LDAC2 + 4661 .loc 1 2359 2 view .LVU1491 4662 0052 3D4D ldr r5, .L189 4663 0054 0122 movs r2, #1 4664 0056 4FF48041 mov r1, #16384 4665 005a 2846 mov r0, r5 4666 005c FFF7FEFF bl HAL_GPIO_WritePin 4667 .LVL359: -2358:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4668 .loc 1 2358 2 view .LVU1492 +2360:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 4668 .loc 1 2360 2 view .LVU1492 4669 0060 3B4C ldr r4, .L189+8 4670 .LVL360: -2358:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 - 4671 .loc 1 2358 2 is_stmt 0 view .LVU1493 +2360:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);//End operation with TEC1 + 4671 .loc 1 2360 2 is_stmt 0 view .LVU1493 4672 0062 0122 movs r2, #1 4673 0064 4021 movs r1, #64 4674 0066 2046 mov r0, r4 4675 0068 FFF7FEFF bl HAL_GPIO_WritePin 4676 .LVL361: -2359:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 - 4677 .loc 1 2359 2 is_stmt 1 view .LVU1494 +2361:Src/main.c **** HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);//End operation with TEC2 + 4677 .loc 1 2361 2 is_stmt 1 view .LVU1494 4678 006c 0122 movs r2, #1 4679 006e 4FF48051 mov r1, #4096 4680 0072 2846 mov r0, r5 4681 0074 FFF7FEFF bl HAL_GPIO_WritePin 4682 .LVL362: -2360:Src/main.c **** } - 4683 .loc 1 2360 2 view .LVU1495 +2362:Src/main.c **** } + 4683 .loc 1 2362 2 view .LVU1495 4684 0078 0122 movs r2, #1 + ARM GAS /tmp/ccyYWdjY.s page 440 + + 4685 007a 1021 movs r1, #16 4686 007c 2046 mov r0, r4 - ARM GAS /tmp/ccfIOqv2.s page 440 - - 4687 007e FFF7FEFF bl HAL_GPIO_WritePin 4688 .LVL363: -2361:Src/main.c **** static uint16_t MPhD_T(uint8_t num) - 4689 .loc 1 2361 1 is_stmt 0 view .LVU1496 +2363:Src/main.c **** static uint16_t MPhD_T(uint8_t num) + 4689 .loc 1 2363 1 is_stmt 0 view .LVU1496 4690 0082 38BD pop {r3, r4, r5, pc} 4691 .LVL364: 4692 .L161: -2324:Src/main.c **** //tmp32=0; - 4693 .loc 1 2324 4 is_stmt 1 view .LVU1497 +2326:Src/main.c **** //tmp32=0; + 4693 .loc 1 2326 4 is_stmt 1 view .LVU1497 4694 0084 0022 movs r2, #0 4695 0086 4021 movs r1, #64 4696 .LVL365: -2324:Src/main.c **** //tmp32=0; - 4697 .loc 1 2324 4 is_stmt 0 view .LVU1498 +2326:Src/main.c **** //tmp32=0; + 4697 .loc 1 2326 4 is_stmt 0 view .LVU1498 4698 0088 3148 ldr r0, .L189+8 4699 008a FFF7FEFF bl HAL_GPIO_WritePin 4700 .LVL366: -2327:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4701 .loc 1 2327 4 is_stmt 1 view .LVU1499 -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4702 .loc 1 2328 4 view .LVU1500 -2327:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4703 .loc 1 2327 10 is_stmt 0 view .LVU1501 +2329:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4701 .loc 1 2329 4 is_stmt 1 view .LVU1499 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4702 .loc 1 2330 4 view .LVU1500 +2329:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4703 .loc 1 2329 10 is_stmt 0 view .LVU1501 4704 008e 0022 movs r2, #0 4705 .LVL367: 4706 .L169: -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4707 .loc 1 2328 42 is_stmt 1 discriminator 1 view .LVU1502 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4707 .loc 1 2330 42 is_stmt 1 discriminator 1 view .LVU1502 4708 .LBB483: 4709 .LBI483: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26389,25 +26391,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4720 .loc 4 918 66 view .LVU1507 4721 .LBE484: 4722 .LBE483: -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4723 .loc 1 2328 42 discriminator 2 view .LVU1508 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4723 .loc 1 2330 42 discriminator 2 view .LVU1508 4724 009a B2F5FA7F cmp r2, #500 4725 009e 01D8 bhi .L170 -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4726 .loc 1 2328 59 is_stmt 1 discriminator 3 view .LVU1509 -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4727 .loc 1 2328 64 is_stmt 0 discriminator 3 view .LVU1510 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4726 .loc 1 2330 59 is_stmt 1 discriminator 3 view .LVU1509 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + ARM GAS /tmp/ccyYWdjY.s page 441 + + + 4727 .loc 1 2330 64 is_stmt 0 discriminator 3 view .LVU1510 4728 00a0 0132 adds r2, r2, #1 - ARM GAS /tmp/ccfIOqv2.s page 441 - - 4729 .LVL369: -2328:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4730 .loc 1 2328 64 discriminator 3 view .LVU1511 +2330:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4730 .loc 1 2330 64 discriminator 3 view .LVU1511 4731 00a2 F5E7 b .L169 4732 .L170: -2329:Src/main.c **** tmp32 = 0; - 4733 .loc 1 2329 4 is_stmt 1 view .LVU1512 +2331:Src/main.c **** tmp32 = 0; + 4733 .loc 1 2331 4 is_stmt 1 view .LVU1512 4734 .LVL370: 4735 .LBB485: 4736 .LBI485: @@ -26424,17 +26426,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4745 .loc 4 1377 10 view .LVU1517 4746 .LBE486: 4747 .LBE485: -2330:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4748 .loc 1 2330 4 is_stmt 1 view .LVU1518 -2331:Src/main.c **** (void) SPI6->DR; - 4749 .loc 1 2331 4 view .LVU1519 -2330:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4750 .loc 1 2330 10 is_stmt 0 view .LVU1520 +2332:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4748 .loc 1 2332 4 is_stmt 1 view .LVU1518 +2333:Src/main.c **** (void) SPI6->DR; + 4749 .loc 1 2333 4 view .LVU1519 +2332:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4750 .loc 1 2332 10 is_stmt 0 view .LVU1520 4751 00a8 0022 movs r2, #0 4752 .LVL372: 4753 .L172: -2331:Src/main.c **** (void) SPI6->DR; - 4754 .loc 1 2331 43 is_stmt 1 discriminator 1 view .LVU1521 +2333:Src/main.c **** (void) SPI6->DR; + 4754 .loc 1 2333 43 is_stmt 1 discriminator 1 view .LVU1521 4755 .LBB487: 4756 .LBI487: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26455,53 +26457,53 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4767 .loc 4 907 68 view .LVU1526 4768 .LBE488: 4769 .LBE487: -2331:Src/main.c **** (void) SPI6->DR; - 4770 .loc 1 2331 43 discriminator 2 view .LVU1527 +2333:Src/main.c **** (void) SPI6->DR; + ARM GAS /tmp/ccyYWdjY.s page 442 + + + 4770 .loc 1 2333 43 discriminator 2 view .LVU1527 4771 00b4 B2F5FA7F cmp r2, #500 - ARM GAS /tmp/ccfIOqv2.s page 442 - - 4772 00b8 01D8 bhi .L173 -2331:Src/main.c **** (void) SPI6->DR; - 4773 .loc 1 2331 60 is_stmt 1 discriminator 3 view .LVU1528 -2331:Src/main.c **** (void) SPI6->DR; - 4774 .loc 1 2331 65 is_stmt 0 discriminator 3 view .LVU1529 +2333:Src/main.c **** (void) SPI6->DR; + 4773 .loc 1 2333 60 is_stmt 1 discriminator 3 view .LVU1528 +2333:Src/main.c **** (void) SPI6->DR; + 4774 .loc 1 2333 65 is_stmt 0 discriminator 3 view .LVU1529 4775 00ba 0132 adds r2, r2, #1 4776 .LVL374: -2331:Src/main.c **** (void) SPI6->DR; - 4777 .loc 1 2331 65 discriminator 3 view .LVU1530 +2333:Src/main.c **** (void) SPI6->DR; + 4777 .loc 1 2333 65 discriminator 3 view .LVU1530 4778 00bc F5E7 b .L172 4779 .L173: -2332:Src/main.c **** break; - 4780 .loc 1 2332 4 is_stmt 1 view .LVU1531 +2334:Src/main.c **** break; + 4780 .loc 1 2334 4 is_stmt 1 view .LVU1531 4781 00be 254B ldr r3, .L189+12 4782 00c0 DB68 ldr r3, [r3, #12] -2333:Src/main.c **** case 3: - 4783 .loc 1 2333 3 view .LVU1532 +2335:Src/main.c **** case 3: + 4783 .loc 1 2335 3 view .LVU1532 4784 00c2 C6E7 b .L157 4785 .LVL375: 4786 .L160: -2335:Src/main.c **** //tmp32=0; - 4787 .loc 1 2335 4 view .LVU1533 +2337:Src/main.c **** //tmp32=0; + 4787 .loc 1 2337 4 view .LVU1533 4788 00c4 0022 movs r2, #0 4789 00c6 4FF48051 mov r1, #4096 4790 .LVL376: -2335:Src/main.c **** //tmp32=0; - 4791 .loc 1 2335 4 is_stmt 0 view .LVU1534 +2337:Src/main.c **** //tmp32=0; + 4791 .loc 1 2337 4 is_stmt 0 view .LVU1534 4792 00ca 1F48 ldr r0, .L189 4793 00cc FFF7FEFF bl HAL_GPIO_WritePin 4794 .LVL377: -2338:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4795 .loc 1 2338 4 is_stmt 1 view .LVU1535 -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4796 .loc 1 2339 4 view .LVU1536 -2338:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4797 .loc 1 2338 10 is_stmt 0 view .LVU1537 +2340:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4795 .loc 1 2340 4 is_stmt 1 view .LVU1535 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4796 .loc 1 2341 4 view .LVU1536 +2340:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4797 .loc 1 2340 10 is_stmt 0 view .LVU1537 4798 00d0 0022 movs r2, #0 4799 .LVL378: 4800 .L175: -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4801 .loc 1 2339 42 is_stmt 1 discriminator 1 view .LVU1538 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4801 .loc 1 2341 42 is_stmt 1 discriminator 1 view .LVU1538 4802 .LBB489: 4803 .LBI489: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26516,31 +26518,31 @@ ARM GAS /tmp/ccfIOqv2.s page 1 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4810 .loc 4 918 66 view .LVU1542 4811 00d6 13F0020F tst r3, #2 + ARM GAS /tmp/ccyYWdjY.s page 443 + + 4812 00da 04D1 bne .L176 4813 .LVL379: - ARM GAS /tmp/ccfIOqv2.s page 443 - - 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4814 .loc 4 918 66 view .LVU1543 4815 .LBE490: 4816 .LBE489: -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4817 .loc 1 2339 42 discriminator 2 view .LVU1544 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4817 .loc 1 2341 42 discriminator 2 view .LVU1544 4818 00dc B2F5FA7F cmp r2, #500 4819 00e0 01D8 bhi .L176 -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4820 .loc 1 2339 59 is_stmt 1 discriminator 3 view .LVU1545 -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4821 .loc 1 2339 64 is_stmt 0 discriminator 3 view .LVU1546 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4820 .loc 1 2341 59 is_stmt 1 discriminator 3 view .LVU1545 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4821 .loc 1 2341 64 is_stmt 0 discriminator 3 view .LVU1546 4822 00e2 0132 adds r2, r2, #1 4823 .LVL380: -2339:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC - 4824 .loc 1 2339 64 discriminator 3 view .LVU1547 +2341:Src/main.c **** LL_SPI_TransmitData16(SPI2, DATA);//Transmit word to Laser1 DAC + 4824 .loc 1 2341 64 discriminator 3 view .LVU1547 4825 00e4 F5E7 b .L175 4826 .L176: -2340:Src/main.c **** tmp32 = 0; - 4827 .loc 1 2340 4 is_stmt 1 view .LVU1548 +2342:Src/main.c **** tmp32 = 0; + 4827 .loc 1 2342 4 is_stmt 1 view .LVU1548 4828 .LVL381: 4829 .LBB491: 4830 .LBI491: @@ -26557,17 +26559,17 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4839 .loc 4 1377 10 view .LVU1553 4840 .LBE492: 4841 .LBE491: -2341:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4842 .loc 1 2341 4 is_stmt 1 view .LVU1554 -2342:Src/main.c **** (void) SPI2->DR; - 4843 .loc 1 2342 4 view .LVU1555 -2341:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4844 .loc 1 2341 10 is_stmt 0 view .LVU1556 +2343:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4842 .loc 1 2343 4 is_stmt 1 view .LVU1554 +2344:Src/main.c **** (void) SPI2->DR; + 4843 .loc 1 2344 4 view .LVU1555 +2343:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI2))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4844 .loc 1 2343 10 is_stmt 0 view .LVU1556 4845 00ea 0022 movs r2, #0 4846 .LVL383: 4847 .L178: -2342:Src/main.c **** (void) SPI2->DR; - 4848 .loc 1 2342 43 is_stmt 1 discriminator 1 view .LVU1557 +2344:Src/main.c **** (void) SPI2->DR; + 4848 .loc 1 2344 43 is_stmt 1 discriminator 1 view .LVU1557 4849 .LBB493: 4850 .LBI493: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26576,11 +26578,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4853 .loc 4 907 3 view .LVU1559 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } + ARM GAS /tmp/ccyYWdjY.s page 444 + + 4854 .loc 4 907 12 is_stmt 0 view .LVU1560 4855 00ec 174B ldr r3, .L189+4 - ARM GAS /tmp/ccfIOqv2.s page 444 - - 4856 00ee 9B68 ldr r3, [r3, #8] 907:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } 4857 .loc 4 907 68 view .LVU1561 @@ -26591,56 +26593,56 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4861 .loc 4 907 68 view .LVU1562 4862 .LBE494: 4863 .LBE493: -2342:Src/main.c **** (void) SPI2->DR; - 4864 .loc 1 2342 43 discriminator 2 view .LVU1563 +2344:Src/main.c **** (void) SPI2->DR; + 4864 .loc 1 2344 43 discriminator 2 view .LVU1563 4865 00f6 B2F5FA7F cmp r2, #500 4866 00fa 01D8 bhi .L179 -2342:Src/main.c **** (void) SPI2->DR; - 4867 .loc 1 2342 60 is_stmt 1 discriminator 3 view .LVU1564 -2342:Src/main.c **** (void) SPI2->DR; - 4868 .loc 1 2342 65 is_stmt 0 discriminator 3 view .LVU1565 +2344:Src/main.c **** (void) SPI2->DR; + 4867 .loc 1 2344 60 is_stmt 1 discriminator 3 view .LVU1564 +2344:Src/main.c **** (void) SPI2->DR; + 4868 .loc 1 2344 65 is_stmt 0 discriminator 3 view .LVU1565 4869 00fc 0132 adds r2, r2, #1 4870 .LVL385: -2342:Src/main.c **** (void) SPI2->DR; - 4871 .loc 1 2342 65 discriminator 3 view .LVU1566 +2344:Src/main.c **** (void) SPI2->DR; + 4871 .loc 1 2344 65 discriminator 3 view .LVU1566 4872 00fe F5E7 b .L178 4873 .L179: -2343:Src/main.c **** break; - 4874 .loc 1 2343 4 is_stmt 1 view .LVU1567 +2345:Src/main.c **** break; + 4874 .loc 1 2345 4 is_stmt 1 view .LVU1567 4875 0100 124B ldr r3, .L189+4 4876 0102 DB68 ldr r3, [r3, #12] -2344:Src/main.c **** case 4: - 4877 .loc 1 2344 3 view .LVU1568 +2346:Src/main.c **** case 4: + 4877 .loc 1 2346 3 view .LVU1568 4878 0104 A5E7 b .L157 4879 .LVL386: 4880 .L158: -2346:Src/main.c **** //tmp32=0; - 4881 .loc 1 2346 4 view .LVU1569 +2348:Src/main.c **** //tmp32=0; + 4881 .loc 1 2348 4 view .LVU1569 4882 0106 0022 movs r2, #0 4883 0108 1021 movs r1, #16 4884 .LVL387: -2346:Src/main.c **** //tmp32=0; - 4885 .loc 1 2346 4 is_stmt 0 view .LVU1570 +2348:Src/main.c **** //tmp32=0; + 4885 .loc 1 2348 4 is_stmt 0 view .LVU1570 4886 010a 1148 ldr r0, .L189+8 4887 010c FFF7FEFF bl HAL_GPIO_WritePin 4888 .LVL388: -2349:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4889 .loc 1 2349 4 is_stmt 1 view .LVU1571 -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4890 .loc 1 2350 4 view .LVU1572 -2349:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi - 4891 .loc 1 2349 10 is_stmt 0 view .LVU1573 +2351:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4889 .loc 1 2351 4 is_stmt 1 view .LVU1571 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4890 .loc 1 2352 4 view .LVU1572 +2351:Src/main.c **** while((!LL_SPI_IsActiveFlag_TXE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle wi + 4891 .loc 1 2351 10 is_stmt 0 view .LVU1573 4892 0110 0022 movs r2, #0 4893 .LVL389: 4894 .L181: -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4895 .loc 1 2350 42 is_stmt 1 discriminator 1 view .LVU1574 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4895 .loc 1 2352 42 is_stmt 1 discriminator 1 view .LVU1574 4896 .LBB495: + ARM GAS /tmp/ccyYWdjY.s page 445 + + 4897 .LBI495: 916:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - ARM GAS /tmp/ccfIOqv2.s page 445 - - 4898 .loc 4 916 26 view .LVU1575 4899 .LBB496: 918:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } @@ -26658,22 +26660,22 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4908 .loc 4 918 66 view .LVU1579 4909 .LBE496: 4910 .LBE495: -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4911 .loc 1 2350 42 discriminator 2 view .LVU1580 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4911 .loc 1 2352 42 discriminator 2 view .LVU1580 4912 011c B2F5FA7F cmp r2, #500 4913 0120 01D8 bhi .L182 -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4914 .loc 1 2350 59 is_stmt 1 discriminator 3 view .LVU1581 -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4915 .loc 1 2350 64 is_stmt 0 discriminator 3 view .LVU1582 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4914 .loc 1 2352 59 is_stmt 1 discriminator 3 view .LVU1581 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4915 .loc 1 2352 64 is_stmt 0 discriminator 3 view .LVU1582 4916 0122 0132 adds r2, r2, #1 4917 .LVL391: -2350:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC - 4918 .loc 1 2350 64 discriminator 3 view .LVU1583 +2352:Src/main.c **** LL_SPI_TransmitData16(SPI6, DATA);//Transmit word to Laser1 DAC + 4918 .loc 1 2352 64 discriminator 3 view .LVU1583 4919 0124 F5E7 b .L181 4920 .L182: -2351:Src/main.c **** tmp32 = 0; - 4921 .loc 1 2351 4 is_stmt 1 view .LVU1584 +2353:Src/main.c **** tmp32 = 0; + 4921 .loc 1 2353 4 is_stmt 1 view .LVU1584 4922 .LVL392: 4923 .LBB497: 4924 .LBI497: @@ -26690,20 +26692,20 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4933 .loc 4 1377 10 view .LVU1589 4934 .LBE498: 4935 .LBE497: -2352:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4936 .loc 1 2352 4 is_stmt 1 view .LVU1590 -2353:Src/main.c **** (void) SPI6->DR; - 4937 .loc 1 2353 4 view .LVU1591 -2352:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w - 4938 .loc 1 2352 10 is_stmt 0 view .LVU1592 +2354:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4936 .loc 1 2354 4 is_stmt 1 view .LVU1590 +2355:Src/main.c **** (void) SPI6->DR; + 4937 .loc 1 2355 4 view .LVU1591 +2354:Src/main.c **** while((!LL_SPI_IsActiveFlag_RXNE(SPI6))&&(tmp32<=500)) {tmp32++;}//When trans. last data cycle w + 4938 .loc 1 2354 10 is_stmt 0 view .LVU1592 + ARM GAS /tmp/ccyYWdjY.s page 446 + + 4939 012a 0022 movs r2, #0 4940 .LVL394: - ARM GAS /tmp/ccfIOqv2.s page 446 - - 4941 .L184: -2353:Src/main.c **** (void) SPI6->DR; - 4942 .loc 1 2353 43 is_stmt 1 discriminator 1 view .LVU1593 +2355:Src/main.c **** (void) SPI6->DR; + 4942 .loc 1 2355 43 is_stmt 1 discriminator 1 view .LVU1593 4943 .LBB499: 4944 .LBI499: 905:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { @@ -26724,26 +26726,26 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4955 .loc 4 907 68 view .LVU1598 4956 .LBE500: 4957 .LBE499: -2353:Src/main.c **** (void) SPI6->DR; - 4958 .loc 1 2353 43 discriminator 2 view .LVU1599 +2355:Src/main.c **** (void) SPI6->DR; + 4958 .loc 1 2355 43 discriminator 2 view .LVU1599 4959 0136 B2F5FA7F cmp r2, #500 4960 013a 01D8 bhi .L185 -2353:Src/main.c **** (void) SPI6->DR; - 4961 .loc 1 2353 60 is_stmt 1 discriminator 3 view .LVU1600 -2353:Src/main.c **** (void) SPI6->DR; - 4962 .loc 1 2353 65 is_stmt 0 discriminator 3 view .LVU1601 +2355:Src/main.c **** (void) SPI6->DR; + 4961 .loc 1 2355 60 is_stmt 1 discriminator 3 view .LVU1600 +2355:Src/main.c **** (void) SPI6->DR; + 4962 .loc 1 2355 65 is_stmt 0 discriminator 3 view .LVU1601 4963 013c 0132 adds r2, r2, #1 4964 .LVL396: -2353:Src/main.c **** (void) SPI6->DR; - 4965 .loc 1 2353 65 discriminator 3 view .LVU1602 +2355:Src/main.c **** (void) SPI6->DR; + 4965 .loc 1 2355 65 discriminator 3 view .LVU1602 4966 013e F5E7 b .L184 4967 .L185: -2354:Src/main.c **** break; - 4968 .loc 1 2354 4 is_stmt 1 view .LVU1603 +2356:Src/main.c **** break; + 4968 .loc 1 2356 4 is_stmt 1 view .LVU1603 4969 0140 044B ldr r3, .L189+12 4970 0142 DB68 ldr r3, [r3, #12] -2355:Src/main.c **** } - 4971 .loc 1 2355 3 view .LVU1604 +2357:Src/main.c **** } + 4971 .loc 1 2357 3 view .LVU1604 4972 0144 85E7 b .L157 4973 .L190: 4974 0146 00BF .align 2 @@ -26756,22 +26758,22 @@ ARM GAS /tmp/ccfIOqv2.s page 1 4981 .LFE1211: 4983 .section .text.Decode_uart,"ax",%progbits 4984 .align 1 + ARM GAS /tmp/ccyYWdjY.s page 447 + + 4985 .syntax unified 4986 .thumb - ARM GAS /tmp/ccfIOqv2.s page 447 - - 4987 .thumb_func 4989 Decode_uart: 4990 .LVL397: 4991 .LFB1208: -2051:Src/main.c **** // uint8_t *temp1; - 4992 .loc 1 2051 1 view -0 +2053:Src/main.c **** // uint8_t *temp1; + 4992 .loc 1 2053 1 view -0 4993 .cfi_startproc 4994 @ args = 0, pretend = 0, frame = 0 4995 @ frame_needed = 0, uses_anonymous_args = 0 -2051:Src/main.c **** // uint8_t *temp1; - 4996 .loc 1 2051 1 is_stmt 0 view .LVU1606 +2053:Src/main.c **** // uint8_t *temp1; + 4996 .loc 1 2053 1 is_stmt 0 view .LVU1606 4997 0000 2DE9F843 push {r3, r4, r5, r6, r7, r8, r9, lr} 4998 .LCFI42: 4999 .cfi_def_cfa_offset 32 @@ -26787,676 +26789,676 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5009 0006 0F46 mov r7, r1 5010 0008 1646 mov r6, r2 5011 000a 1C46 mov r4, r3 -2053:Src/main.c **** - 5012 .loc 1 2053 2 is_stmt 1 view .LVU1607 -2058:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5013 .loc 1 2058 2 view .LVU1608 -2058:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5014 .loc 1 2058 6 is_stmt 0 view .LVU1609 +2055:Src/main.c **** + 5012 .loc 1 2055 2 is_stmt 1 view .LVU1607 +2060:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5013 .loc 1 2060 2 view .LVU1608 +2060:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5014 .loc 1 2060 6 is_stmt 0 view .LVU1609 5015 000c AF4B ldr r3, .L215 5016 .LVL398: -2058:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5017 .loc 1 2058 6 view .LVU1610 +2060:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5017 .loc 1 2060 6 view .LVU1610 5018 000e 0022 movs r2, #0 5019 .LVL399: -2058:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& - 5020 .loc 1 2058 6 view .LVU1611 +2060:Src/main.c **** if ((HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin) == GPIO_PIN_RESET)&& + 5020 .loc 1 2060 6 view .LVU1611 5021 0010 1A60 str r2, [r3] -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5022 .loc 1 2059 2 is_stmt 1 view .LVU1612 -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5023 .loc 1 2059 7 is_stmt 0 view .LVU1613 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5022 .loc 1 2061 2 is_stmt 1 view .LVU1612 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5023 .loc 1 2061 7 is_stmt 0 view .LVU1613 5024 0012 0121 movs r1, #1 5025 .LVL400: -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5026 .loc 1 2059 7 view .LVU1614 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5026 .loc 1 2061 7 view .LVU1614 5027 0014 AE48 ldr r0, .L215+4 5028 .LVL401: -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5029 .loc 1 2059 7 view .LVU1615 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5029 .loc 1 2061 7 view .LVU1615 5030 0016 FFF7FEFF bl HAL_GPIO_ReadPin 5031 .LVL402: -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5032 .loc 1 2059 5 discriminator 1 view .LVU1616 - ARM GAS /tmp/ccfIOqv2.s page 448 + ARM GAS /tmp/ccyYWdjY.s page 448 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5032 .loc 1 2061 5 discriminator 1 view .LVU1616 5033 001a 0028 cmp r0, #0 5034 001c 00F0D280 beq .L212 5035 .L192: -2074:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; - 5036 .loc 1 2074 2 is_stmt 1 view .LVU1617 +2076:Src/main.c **** Curr_setup->WORK_EN = ((uint8_t)((*temp2)>>0))&0x01; + 5036 .loc 1 2076 2 is_stmt 1 view .LVU1617 5037 .LVL403: -2075:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5038 .loc 1 2075 2 view .LVU1618 -2075:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5039 .loc 1 2075 36 is_stmt 0 view .LVU1619 +2077:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5038 .loc 1 2077 2 view .LVU1618 +2077:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5039 .loc 1 2077 36 is_stmt 0 view .LVU1619 5040 0020 2B88 ldrh r3, [r5] -2075:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5041 .loc 1 2075 48 view .LVU1620 +2077:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5041 .loc 1 2077 48 view .LVU1620 5042 0022 03F00103 and r3, r3, #1 -2075:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; - 5043 .loc 1 2075 22 view .LVU1621 +2077:Src/main.c **** Curr_setup->U5V1_EN = ((uint8_t)((*temp2)>>1))&0x01; + 5043 .loc 1 2077 22 view .LVU1621 5044 0026 2370 strb r3, [r4] -2076:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5045 .loc 1 2076 2 is_stmt 1 view .LVU1622 -2076:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5046 .loc 1 2076 36 is_stmt 0 view .LVU1623 +2078:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5045 .loc 1 2078 2 is_stmt 1 view .LVU1622 +2078:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5046 .loc 1 2078 36 is_stmt 0 view .LVU1623 5047 0028 2B88 ldrh r3, [r5] -2076:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5048 .loc 1 2076 48 view .LVU1624 +2078:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5048 .loc 1 2078 48 view .LVU1624 5049 002a C3F34003 ubfx r3, r3, #1, #1 -2076:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; - 5050 .loc 1 2076 22 view .LVU1625 +2078:Src/main.c **** Curr_setup->U5V2_EN = ((uint8_t)((*temp2)>>2))&0x01; + 5050 .loc 1 2078 22 view .LVU1625 5051 002e 6370 strb r3, [r4, #1] -2077:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5052 .loc 1 2077 2 is_stmt 1 view .LVU1626 -2077:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5053 .loc 1 2077 36 is_stmt 0 view .LVU1627 +2079:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5052 .loc 1 2079 2 is_stmt 1 view .LVU1626 +2079:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5053 .loc 1 2079 36 is_stmt 0 view .LVU1627 5054 0030 2B88 ldrh r3, [r5] -2077:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5055 .loc 1 2077 48 view .LVU1628 +2079:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5055 .loc 1 2079 48 view .LVU1628 5056 0032 C3F38003 ubfx r3, r3, #2, #1 -2077:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; - 5057 .loc 1 2077 22 view .LVU1629 +2079:Src/main.c **** Curr_setup->LD1_EN = ((uint8_t)((*temp2)>>3))&0x01; + 5057 .loc 1 2079 22 view .LVU1629 5058 0036 A370 strb r3, [r4, #2] -2078:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5059 .loc 1 2078 2 is_stmt 1 view .LVU1630 -2078:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5060 .loc 1 2078 35 is_stmt 0 view .LVU1631 +2080:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5059 .loc 1 2080 2 is_stmt 1 view .LVU1630 +2080:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5060 .loc 1 2080 35 is_stmt 0 view .LVU1631 5061 0038 2B88 ldrh r3, [r5] -2078:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5062 .loc 1 2078 47 view .LVU1632 +2080:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5062 .loc 1 2080 47 view .LVU1632 5063 003a C3F3C003 ubfx r3, r3, #3, #1 -2078:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; - 5064 .loc 1 2078 21 view .LVU1633 +2080:Src/main.c **** Curr_setup->LD2_EN = ((uint8_t)((*temp2)>>4))&0x01; + 5064 .loc 1 2080 21 view .LVU1633 5065 003e E370 strb r3, [r4, #3] -2079:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5066 .loc 1 2079 2 is_stmt 1 view .LVU1634 -2079:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5067 .loc 1 2079 35 is_stmt 0 view .LVU1635 +2081:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5066 .loc 1 2081 2 is_stmt 1 view .LVU1634 +2081:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5067 .loc 1 2081 35 is_stmt 0 view .LVU1635 5068 0040 2B88 ldrh r3, [r5] -2079:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5069 .loc 1 2079 47 view .LVU1636 - ARM GAS /tmp/ccfIOqv2.s page 449 + ARM GAS /tmp/ccyYWdjY.s page 449 +2081:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5069 .loc 1 2081 47 view .LVU1636 5070 0042 C3F30013 ubfx r3, r3, #4, #1 -2079:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; - 5071 .loc 1 2079 21 view .LVU1637 +2081:Src/main.c **** Curr_setup->REF1_EN = ((uint8_t)((*temp2)>>5))&0x01; + 5071 .loc 1 2081 21 view .LVU1637 5072 0046 2371 strb r3, [r4, #4] -2080:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5073 .loc 1 2080 2 is_stmt 1 view .LVU1638 -2080:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5074 .loc 1 2080 36 is_stmt 0 view .LVU1639 +2082:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5073 .loc 1 2082 2 is_stmt 1 view .LVU1638 +2082:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5074 .loc 1 2082 36 is_stmt 0 view .LVU1639 5075 0048 2B88 ldrh r3, [r5] -2080:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5076 .loc 1 2080 48 view .LVU1640 +2082:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5076 .loc 1 2082 48 view .LVU1640 5077 004a C3F34013 ubfx r3, r3, #5, #1 -2080:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; - 5078 .loc 1 2080 22 view .LVU1641 +2082:Src/main.c **** Curr_setup->REF2_EN = ((uint8_t)((*temp2)>>6))&0x01; + 5078 .loc 1 2082 22 view .LVU1641 5079 004e 6371 strb r3, [r4, #5] -2081:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5080 .loc 1 2081 2 is_stmt 1 view .LVU1642 -2081:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5081 .loc 1 2081 36 is_stmt 0 view .LVU1643 +2083:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5080 .loc 1 2083 2 is_stmt 1 view .LVU1642 +2083:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5081 .loc 1 2083 36 is_stmt 0 view .LVU1643 5082 0050 2B88 ldrh r3, [r5] -2081:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5083 .loc 1 2081 48 view .LVU1644 +2083:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5083 .loc 1 2083 48 view .LVU1644 5084 0052 C3F38013 ubfx r3, r3, #6, #1 -2081:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; - 5085 .loc 1 2081 22 view .LVU1645 +2083:Src/main.c **** Curr_setup->TEC1_EN = ((uint8_t)((*temp2)>>7))&0x01; + 5085 .loc 1 2083 22 view .LVU1645 5086 0056 A371 strb r3, [r4, #6] -2082:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5087 .loc 1 2082 2 is_stmt 1 view .LVU1646 -2082:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5088 .loc 1 2082 36 is_stmt 0 view .LVU1647 +2084:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5087 .loc 1 2084 2 is_stmt 1 view .LVU1646 +2084:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5088 .loc 1 2084 36 is_stmt 0 view .LVU1647 5089 0058 2B88 ldrh r3, [r5] -2082:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5090 .loc 1 2082 48 view .LVU1648 +2084:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5090 .loc 1 2084 48 view .LVU1648 5091 005a C3F3C013 ubfx r3, r3, #7, #1 -2082:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; - 5092 .loc 1 2082 22 view .LVU1649 +2084:Src/main.c **** Curr_setup->TEC2_EN = ((uint8_t)((*temp2)>>8))&0x01; + 5092 .loc 1 2084 22 view .LVU1649 5093 005e E371 strb r3, [r4, #7] -2083:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5094 .loc 1 2083 2 is_stmt 1 view .LVU1650 -2083:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5095 .loc 1 2083 36 is_stmt 0 view .LVU1651 +2085:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5094 .loc 1 2085 2 is_stmt 1 view .LVU1650 +2085:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5095 .loc 1 2085 36 is_stmt 0 view .LVU1651 5096 0060 2B88 ldrh r3, [r5] -2083:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5097 .loc 1 2083 48 view .LVU1652 +2085:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5097 .loc 1 2085 48 view .LVU1652 5098 0062 C3F30023 ubfx r3, r3, #8, #1 -2083:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; - 5099 .loc 1 2083 22 view .LVU1653 +2085:Src/main.c **** Curr_setup->TS1_EN = ((uint8_t)((*temp2)>>9))&0x01; + 5099 .loc 1 2085 22 view .LVU1653 5100 0066 2372 strb r3, [r4, #8] -2084:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5101 .loc 1 2084 2 is_stmt 1 view .LVU1654 -2084:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5102 .loc 1 2084 35 is_stmt 0 view .LVU1655 +2086:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5101 .loc 1 2086 2 is_stmt 1 view .LVU1654 +2086:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5102 .loc 1 2086 35 is_stmt 0 view .LVU1655 5103 0068 2B88 ldrh r3, [r5] -2084:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - 5104 .loc 1 2084 47 view .LVU1656 +2086:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5104 .loc 1 2086 47 view .LVU1656 + ARM GAS /tmp/ccyYWdjY.s page 450 + + 5105 006a C3F34023 ubfx r3, r3, #9, #1 -2084:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; - ARM GAS /tmp/ccfIOqv2.s page 450 - - - 5106 .loc 1 2084 21 view .LVU1657 +2086:Src/main.c **** Curr_setup->TS2_EN = ((uint8_t)((*temp2)>>10))&0x01; + 5106 .loc 1 2086 21 view .LVU1657 5107 006e 6372 strb r3, [r4, #9] -2085:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5108 .loc 1 2085 2 is_stmt 1 view .LVU1658 -2085:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5109 .loc 1 2085 35 is_stmt 0 view .LVU1659 +2087:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5108 .loc 1 2087 2 is_stmt 1 view .LVU1658 +2087:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5109 .loc 1 2087 35 is_stmt 0 view .LVU1659 5110 0070 2B88 ldrh r3, [r5] -2085:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5111 .loc 1 2085 48 view .LVU1660 +2087:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5111 .loc 1 2087 48 view .LVU1660 5112 0072 C3F38023 ubfx r3, r3, #10, #1 -2085:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; - 5113 .loc 1 2085 21 view .LVU1661 +2087:Src/main.c **** Curr_setup->SD_EN = ((uint8_t)((*temp2)>>11))&0x01; + 5113 .loc 1 2087 21 view .LVU1661 5114 0076 A372 strb r3, [r4, #10] -2086:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5115 .loc 1 2086 2 is_stmt 1 view .LVU1662 -2086:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5116 .loc 1 2086 34 is_stmt 0 view .LVU1663 +2088:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5115 .loc 1 2088 2 is_stmt 1 view .LVU1662 +2088:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5116 .loc 1 2088 34 is_stmt 0 view .LVU1663 5117 0078 2B88 ldrh r3, [r5] -2086:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5118 .loc 1 2086 47 view .LVU1664 +2088:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5118 .loc 1 2088 47 view .LVU1664 5119 007a C3F3C023 ubfx r3, r3, #11, #1 -2086:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; - 5120 .loc 1 2086 20 view .LVU1665 +2088:Src/main.c **** Curr_setup->PI1_RD = ((uint8_t)((*temp2)>>12))&0x01; + 5120 .loc 1 2088 20 view .LVU1665 5121 007e E372 strb r3, [r4, #11] -2087:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5122 .loc 1 2087 2 is_stmt 1 view .LVU1666 -2087:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5123 .loc 1 2087 35 is_stmt 0 view .LVU1667 +2089:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5122 .loc 1 2089 2 is_stmt 1 view .LVU1666 +2089:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5123 .loc 1 2089 35 is_stmt 0 view .LVU1667 5124 0080 2B88 ldrh r3, [r5] -2087:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5125 .loc 1 2087 48 view .LVU1668 +2089:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5125 .loc 1 2089 48 view .LVU1668 5126 0082 C3F30033 ubfx r3, r3, #12, #1 -2087:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; - 5127 .loc 1 2087 21 view .LVU1669 +2089:Src/main.c **** Curr_setup->PI2_RD = ((uint8_t)((*temp2)>>13))&0x01; + 5127 .loc 1 2089 21 view .LVU1669 5128 0086 2373 strb r3, [r4, #12] -2088:Src/main.c **** - 5129 .loc 1 2088 2 is_stmt 1 view .LVU1670 -2088:Src/main.c **** - 5130 .loc 1 2088 35 is_stmt 0 view .LVU1671 +2090:Src/main.c **** + 5129 .loc 1 2090 2 is_stmt 1 view .LVU1670 +2090:Src/main.c **** + 5130 .loc 1 2090 35 is_stmt 0 view .LVU1671 5131 0088 2B88 ldrh r3, [r5] -2088:Src/main.c **** - 5132 .loc 1 2088 48 view .LVU1672 +2090:Src/main.c **** + 5132 .loc 1 2090 48 view .LVU1672 5133 008a C3F34033 ubfx r3, r3, #13, #1 -2088:Src/main.c **** - 5134 .loc 1 2088 21 view .LVU1673 +2090:Src/main.c **** + 5134 .loc 1 2090 21 view .LVU1673 5135 008e 6373 strb r3, [r4, #13] -2090:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5136 .loc 1 2090 2 is_stmt 1 view .LVU1674 +2092:Src/main.c **** LD1_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 5136 .loc 1 2092 2 is_stmt 1 view .LVU1674 5137 .LVL404: -2091:Src/main.c **** temp2++; - 5138 .loc 1 2091 2 view .LVU1675 -2091:Src/main.c **** temp2++; - 5139 .loc 1 2091 28 is_stmt 0 view .LVU1676 +2093:Src/main.c **** temp2++; + 5138 .loc 1 2093 2 view .LVU1675 +2093:Src/main.c **** temp2++; + 5139 .loc 1 2093 28 is_stmt 0 view .LVU1676 5140 0090 6B88 ldrh r3, [r5, #2] -2091:Src/main.c **** temp2++; - 5141 .loc 1 2091 26 view .LVU1677 +2093:Src/main.c **** temp2++; + ARM GAS /tmp/ccyYWdjY.s page 451 + + + 5141 .loc 1 2093 26 view .LVU1677 5142 0092 3B80 strh r3, [r7] @ movhi - ARM GAS /tmp/ccfIOqv2.s page 451 - - -2092:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); - 5143 .loc 1 2092 2 is_stmt 1 view .LVU1678 +2094:Src/main.c **** LD2_curr_setup->LD_TEMP = (uint16_t)(*temp2); + 5143 .loc 1 2094 2 is_stmt 1 view .LVU1678 5144 .LVL405: -2093:Src/main.c **** temp2++; - 5145 .loc 1 2093 2 view .LVU1679 -2093:Src/main.c **** temp2++; - 5146 .loc 1 2093 28 is_stmt 0 view .LVU1680 - 5147 0094 AB88 ldrh r3, [r5, #4] -2093:Src/main.c **** temp2++; - 5148 .loc 1 2093 26 view .LVU1681 - 5149 0096 3380 strh r3, [r6] @ movhi -2094:Src/main.c **** temp2++; - 5150 .loc 1 2094 2 is_stmt 1 view .LVU1682 - 5151 .LVL406: 2095:Src/main.c **** temp2++; - 5152 .loc 1 2095 2 view .LVU1683 -2096:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); - 5153 .loc 1 2096 2 view .LVU1684 + 5145 .loc 1 2095 2 view .LVU1679 +2095:Src/main.c **** temp2++; + 5146 .loc 1 2095 28 is_stmt 0 view .LVU1680 + 5147 0094 AB88 ldrh r3, [r5, #4] +2095:Src/main.c **** temp2++; + 5148 .loc 1 2095 26 view .LVU1681 + 5149 0096 3380 strh r3, [r6] @ movhi +2096:Src/main.c **** temp2++; + 5150 .loc 1 2096 2 is_stmt 1 view .LVU1682 + 5151 .LVL406: 2097:Src/main.c **** temp2++; - 5154 .loc 1 2097 2 view .LVU1685 -2097:Src/main.c **** temp2++; - 5155 .loc 1 2097 25 is_stmt 0 view .LVU1686 + 5152 .loc 1 2097 2 view .LVU1683 +2098:Src/main.c **** Curr_setup->AVERAGES = (uint16_t)(*temp2); + 5153 .loc 1 2098 2 view .LVU1684 +2099:Src/main.c **** temp2++; + 5154 .loc 1 2099 2 view .LVU1685 +2099:Src/main.c **** temp2++; + 5155 .loc 1 2099 25 is_stmt 0 view .LVU1686 5156 0098 6B89 ldrh r3, [r5, #10] -2097:Src/main.c **** temp2++; - 5157 .loc 1 2097 23 view .LVU1687 +2099:Src/main.c **** temp2++; + 5157 .loc 1 2099 23 view .LVU1687 5158 009a E381 strh r3, [r4, #14] @ movhi -2098:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5159 .loc 1 2098 2 is_stmt 1 view .LVU1688 +2100:Src/main.c **** LD1_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5159 .loc 1 2100 2 is_stmt 1 view .LVU1688 5160 .LVL407: -2099:Src/main.c **** temp2++; - 5161 .loc 1 2099 2 view .LVU1689 -2099:Src/main.c **** temp2++; - 5162 .loc 1 2099 51 is_stmt 0 view .LVU1690 +2101:Src/main.c **** temp2++; + 5161 .loc 1 2101 2 view .LVU1689 +2101:Src/main.c **** temp2++; + 5162 .loc 1 2101 51 is_stmt 0 view .LVU1690 5163 009c AB89 ldrh r3, [r5, #12] 5164 009e 07EE903A vmov s15, r3 @ int -2099:Src/main.c **** temp2++; - 5165 .loc 1 2099 32 view .LVU1691 +2101:Src/main.c **** temp2++; + 5165 .loc 1 2101 32 view .LVU1691 5166 00a2 F8EE677A vcvt.f32.u32 s15, s15 -2099:Src/main.c **** temp2++; - 5167 .loc 1 2099 59 view .LVU1692 +2101:Src/main.c **** temp2++; + 5167 .loc 1 2101 59 view .LVU1692 5168 00a6 9FED8B7A vldr.32 s14, .L215+8 5169 00aa 67EE877A vmul.f32 s15, s15, s14 -2099:Src/main.c **** temp2++; - 5170 .loc 1 2099 30 view .LVU1693 +2101:Src/main.c **** temp2++; + 5170 .loc 1 2101 30 view .LVU1693 5171 00ae C7ED017A vstr.32 s15, [r7, #4] -2100:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5172 .loc 1 2100 2 is_stmt 1 view .LVU1694 +2102:Src/main.c **** LD1_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5172 .loc 1 2102 2 is_stmt 1 view .LVU1694 5173 .LVL408: -2101:Src/main.c **** temp2++; - 5174 .loc 1 2101 2 view .LVU1695 -2101:Src/main.c **** temp2++; - 5175 .loc 1 2101 51 is_stmt 0 view .LVU1696 +2103:Src/main.c **** temp2++; + 5174 .loc 1 2103 2 view .LVU1695 +2103:Src/main.c **** temp2++; + 5175 .loc 1 2103 51 is_stmt 0 view .LVU1696 5176 00b2 EB89 ldrh r3, [r5, #14] 5177 00b4 07EE903A vmov s15, r3 @ int -2101:Src/main.c **** temp2++; - 5178 .loc 1 2101 32 view .LVU1697 +2103:Src/main.c **** temp2++; + ARM GAS /tmp/ccyYWdjY.s page 452 + + + 5178 .loc 1 2103 32 view .LVU1697 5179 00b8 F8EE677A vcvt.f32.u32 s15, s15 - ARM GAS /tmp/ccfIOqv2.s page 452 - - -2101:Src/main.c **** temp2++; - 5180 .loc 1 2101 59 view .LVU1698 +2103:Src/main.c **** temp2++; + 5180 .loc 1 2103 59 view .LVU1698 5181 00bc 67EE877A vmul.f32 s15, s15, s14 -2101:Src/main.c **** temp2++; - 5182 .loc 1 2101 30 view .LVU1699 +2103:Src/main.c **** temp2++; + 5182 .loc 1 2103 30 view .LVU1699 5183 00c0 C7ED027A vstr.32 s15, [r7, #8] -2102:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5184 .loc 1 2102 2 is_stmt 1 view .LVU1700 +2104:Src/main.c **** LD2_curr_setup->P_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5184 .loc 1 2104 2 is_stmt 1 view .LVU1700 5185 .LVL409: -2103:Src/main.c **** temp2++; - 5186 .loc 1 2103 2 view .LVU1701 -2103:Src/main.c **** temp2++; - 5187 .loc 1 2103 51 is_stmt 0 view .LVU1702 +2105:Src/main.c **** temp2++; + 5186 .loc 1 2105 2 view .LVU1701 +2105:Src/main.c **** temp2++; + 5187 .loc 1 2105 51 is_stmt 0 view .LVU1702 5188 00c4 2B8A ldrh r3, [r5, #16] 5189 00c6 07EE903A vmov s15, r3 @ int -2103:Src/main.c **** temp2++; - 5190 .loc 1 2103 32 view .LVU1703 +2105:Src/main.c **** temp2++; + 5190 .loc 1 2105 32 view .LVU1703 5191 00ca F8EE677A vcvt.f32.u32 s15, s15 -2103:Src/main.c **** temp2++; - 5192 .loc 1 2103 59 view .LVU1704 +2105:Src/main.c **** temp2++; + 5192 .loc 1 2105 59 view .LVU1704 5193 00ce 67EE877A vmul.f32 s15, s15, s14 -2103:Src/main.c **** temp2++; - 5194 .loc 1 2103 30 view .LVU1705 +2105:Src/main.c **** temp2++; + 5194 .loc 1 2105 30 view .LVU1705 5195 00d2 C6ED017A vstr.32 s15, [r6, #4] -2104:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint - 5196 .loc 1 2104 2 is_stmt 1 view .LVU1706 +2106:Src/main.c **** LD2_curr_setup->I_coef_temp = (float)((uint16_t)(*temp2))/((float)(256));//(float)(1/(float)((uint + 5196 .loc 1 2106 2 is_stmt 1 view .LVU1706 5197 .LVL410: -2105:Src/main.c **** temp2++; - 5198 .loc 1 2105 2 view .LVU1707 -2105:Src/main.c **** temp2++; - 5199 .loc 1 2105 51 is_stmt 0 view .LVU1708 +2107:Src/main.c **** temp2++; + 5198 .loc 1 2107 2 view .LVU1707 +2107:Src/main.c **** temp2++; + 5199 .loc 1 2107 51 is_stmt 0 view .LVU1708 5200 00d6 6B8A ldrh r3, [r5, #18] 5201 00d8 07EE903A vmov s15, r3 @ int -2105:Src/main.c **** temp2++; - 5202 .loc 1 2105 32 view .LVU1709 +2107:Src/main.c **** temp2++; + 5202 .loc 1 2107 32 view .LVU1709 5203 00dc F8EE677A vcvt.f32.u32 s15, s15 -2105:Src/main.c **** temp2++; - 5204 .loc 1 2105 59 view .LVU1710 +2107:Src/main.c **** temp2++; + 5204 .loc 1 2107 59 view .LVU1710 5205 00e0 67EE877A vmul.f32 s15, s15, s14 -2105:Src/main.c **** temp2++; - 5206 .loc 1 2105 30 view .LVU1711 +2107:Src/main.c **** temp2++; + 5206 .loc 1 2107 30 view .LVU1711 5207 00e4 C6ED027A vstr.32 s15, [r6, #8] -2106:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID - 5208 .loc 1 2106 2 is_stmt 1 view .LVU1712 +2108:Src/main.c **** Long_Data[13] = (uint16_t)(*temp2);//Message ID + 5208 .loc 1 2108 2 is_stmt 1 view .LVU1712 5209 .LVL411: -2107:Src/main.c **** temp2++; - 5210 .loc 1 2107 2 view .LVU1713 -2107:Src/main.c **** temp2++; - 5211 .loc 1 2107 18 is_stmt 0 view .LVU1714 +2109:Src/main.c **** temp2++; + 5210 .loc 1 2109 2 view .LVU1713 +2109:Src/main.c **** temp2++; + 5211 .loc 1 2109 18 is_stmt 0 view .LVU1714 5212 00e8 AA8A ldrh r2, [r5, #20] -2107:Src/main.c **** temp2++; - 5213 .loc 1 2107 16 view .LVU1715 +2109:Src/main.c **** temp2++; + 5213 .loc 1 2109 16 view .LVU1715 5214 00ea 7B4B ldr r3, .L215+12 5215 00ec 5A83 strh r2, [r3, #26] @ movhi -2108:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); - 5216 .loc 1 2108 2 is_stmt 1 view .LVU1716 +2110:Src/main.c **** LD1_curr_setup->CURRENT = (uint16_t)(*temp2); + ARM GAS /tmp/ccyYWdjY.s page 453 + + + 5216 .loc 1 2110 2 is_stmt 1 view .LVU1716 5217 .LVL412: - ARM GAS /tmp/ccfIOqv2.s page 453 - - -2109:Src/main.c **** temp2++; - 5218 .loc 1 2109 2 view .LVU1717 -2109:Src/main.c **** temp2++; - 5219 .loc 1 2109 28 is_stmt 0 view .LVU1718 +2111:Src/main.c **** temp2++; + 5218 .loc 1 2111 2 view .LVU1717 +2111:Src/main.c **** temp2++; + 5219 .loc 1 2111 28 is_stmt 0 view .LVU1718 5220 00ee EB8A ldrh r3, [r5, #22] -2109:Src/main.c **** temp2++; - 5221 .loc 1 2109 26 view .LVU1719 +2111:Src/main.c **** temp2++; + 5221 .loc 1 2111 26 view .LVU1719 5222 00f0 BB81 strh r3, [r7, #12] @ movhi -2110:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); - 5223 .loc 1 2110 2 is_stmt 1 view .LVU1720 +2112:Src/main.c **** LD2_curr_setup->CURRENT = (uint16_t)(*temp2); + 5223 .loc 1 2112 2 is_stmt 1 view .LVU1720 5224 .LVL413: -2111:Src/main.c **** temp2++; - 5225 .loc 1 2111 2 view .LVU1721 -2111:Src/main.c **** temp2++; - 5226 .loc 1 2111 28 is_stmt 0 view .LVU1722 +2113:Src/main.c **** temp2++; + 5225 .loc 1 2113 2 view .LVU1721 +2113:Src/main.c **** temp2++; + 5226 .loc 1 2113 28 is_stmt 0 view .LVU1722 5227 00f2 2B8B ldrh r3, [r5, #24] -2111:Src/main.c **** temp2++; - 5228 .loc 1 2111 26 view .LVU1723 +2113:Src/main.c **** temp2++; + 5228 .loc 1 2113 26 view .LVU1723 5229 00f4 B381 strh r3, [r6, #12] @ movhi -2112:Src/main.c **** - 5230 .loc 1 2112 2 is_stmt 1 view .LVU1724 +2114:Src/main.c **** + 5230 .loc 1 2114 2 is_stmt 1 view .LVU1724 5231 .LVL414: -2114:Src/main.c **** { - 5232 .loc 1 2114 2 view .LVU1725 -2114:Src/main.c **** { - 5233 .loc 1 2114 16 is_stmt 0 view .LVU1726 +2116:Src/main.c **** { + 5232 .loc 1 2116 2 view .LVU1725 +2116:Src/main.c **** { + 5233 .loc 1 2116 16 is_stmt 0 view .LVU1726 5234 00f6 6378 ldrb r3, [r4, #1] @ zero_extendqisi2 -2114:Src/main.c **** { - 5235 .loc 1 2114 5 view .LVU1727 +2116:Src/main.c **** { + 5235 .loc 1 2116 5 view .LVU1727 5236 00f8 002B cmp r3, #0 5237 00fa 00F09580 beq .L193 -2116:Src/main.c **** } - 5238 .loc 1 2116 3 is_stmt 1 view .LVU1728 +2118:Src/main.c **** } + 5238 .loc 1 2118 3 is_stmt 1 view .LVU1728 5239 00fe 0122 movs r2, #1 5240 0100 0821 movs r1, #8 5241 0102 7648 ldr r0, .L215+16 5242 0104 FFF7FEFF bl HAL_GPIO_WritePin 5243 .LVL415: 5244 .L194: -2123:Src/main.c **** { - 5245 .loc 1 2123 2 view .LVU1729 -2123:Src/main.c **** { - 5246 .loc 1 2123 16 is_stmt 0 view .LVU1730 +2125:Src/main.c **** { + 5245 .loc 1 2125 2 view .LVU1729 +2125:Src/main.c **** { + 5246 .loc 1 2125 16 is_stmt 0 view .LVU1730 5247 0108 A378 ldrb r3, [r4, #2] @ zero_extendqisi2 -2123:Src/main.c **** { - 5248 .loc 1 2123 5 view .LVU1731 +2125:Src/main.c **** { + 5248 .loc 1 2125 5 view .LVU1731 5249 010a 002B cmp r3, #0 5250 010c 00F09280 beq .L195 -2125:Src/main.c **** } - 5251 .loc 1 2125 3 is_stmt 1 view .LVU1732 +2127:Src/main.c **** } + 5251 .loc 1 2127 3 is_stmt 1 view .LVU1732 5252 0110 0122 movs r2, #1 5253 0112 0421 movs r1, #4 5254 0114 7148 ldr r0, .L215+16 5255 0116 FFF7FEFF bl HAL_GPIO_WritePin 5256 .LVL416: + ARM GAS /tmp/ccyYWdjY.s page 454 + + 5257 .L196: -2132:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 454 - - - 5258 .loc 1 2132 2 view .LVU1733 -2132:Src/main.c **** { - 5259 .loc 1 2132 16 is_stmt 0 view .LVU1734 +2134:Src/main.c **** { + 5258 .loc 1 2134 2 view .LVU1733 +2134:Src/main.c **** { + 5259 .loc 1 2134 16 is_stmt 0 view .LVU1734 5260 011a E378 ldrb r3, [r4, #3] @ zero_extendqisi2 -2132:Src/main.c **** { - 5261 .loc 1 2132 5 view .LVU1735 +2134:Src/main.c **** { + 5261 .loc 1 2134 5 view .LVU1735 5262 011c 002B cmp r3, #0 5263 011e 00F08F80 beq .L197 -2134:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC - 5264 .loc 1 2134 3 is_stmt 1 view .LVU1736 +2136:Src/main.c **** //LL_SPI_Enable(SPI2);//Enable SPI for Laser1 DAC + 5264 .loc 1 2136 3 is_stmt 1 view .LVU1736 5265 0122 0122 movs r2, #1 5266 0124 4FF48071 mov r1, #256 5267 0128 6948 ldr r0, .L215+4 5268 012a FFF7FEFF bl HAL_GPIO_WritePin 5269 .LVL417: 5270 .L198: -2143:Src/main.c **** { - 5271 .loc 1 2143 2 view .LVU1737 -2143:Src/main.c **** { - 5272 .loc 1 2143 16 is_stmt 0 view .LVU1738 +2145:Src/main.c **** { + 5271 .loc 1 2145 2 view .LVU1737 +2145:Src/main.c **** { + 5272 .loc 1 2145 16 is_stmt 0 view .LVU1738 5273 012e 2379 ldrb r3, [r4, #4] @ zero_extendqisi2 -2143:Src/main.c **** { - 5274 .loc 1 2143 5 view .LVU1739 +2145:Src/main.c **** { + 5274 .loc 1 2145 5 view .LVU1739 5275 0130 002B cmp r3, #0 5276 0132 00F08C80 beq .L199 -2145:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC - 5277 .loc 1 2145 3 is_stmt 1 view .LVU1740 +2147:Src/main.c **** //LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC + 5277 .loc 1 2147 3 is_stmt 1 view .LVU1740 5278 0136 0122 movs r2, #1 5279 0138 1021 movs r1, #16 5280 013a 6848 ldr r0, .L215+16 5281 013c FFF7FEFF bl HAL_GPIO_WritePin 5282 .LVL418: 5283 .L200: -2154:Src/main.c **** { - 5284 .loc 1 2154 2 view .LVU1741 -2154:Src/main.c **** { - 5285 .loc 1 2154 16 is_stmt 0 view .LVU1742 +2156:Src/main.c **** { + 5284 .loc 1 2156 2 view .LVU1741 +2156:Src/main.c **** { + 5285 .loc 1 2156 16 is_stmt 0 view .LVU1742 5286 0140 6379 ldrb r3, [r4, #5] @ zero_extendqisi2 -2154:Src/main.c **** { - 5287 .loc 1 2154 5 view .LVU1743 +2156:Src/main.c **** { + 5287 .loc 1 2156 5 view .LVU1743 5288 0142 002B cmp r3, #0 5289 0144 00F08980 beq .L201 -2156:Src/main.c **** } - 5290 .loc 1 2156 3 is_stmt 1 view .LVU1744 +2158:Src/main.c **** } + 5290 .loc 1 2158 3 is_stmt 1 view .LVU1744 5291 0148 0122 movs r2, #1 5292 014a 4FF48061 mov r1, #1024 5293 014e 6448 ldr r0, .L215+20 5294 0150 FFF7FEFF bl HAL_GPIO_WritePin 5295 .LVL419: 5296 .L202: -2163:Src/main.c **** { - 5297 .loc 1 2163 2 view .LVU1745 -2163:Src/main.c **** { - 5298 .loc 1 2163 16 is_stmt 0 view .LVU1746 +2165:Src/main.c **** { + 5297 .loc 1 2165 2 view .LVU1745 +2165:Src/main.c **** { + 5298 .loc 1 2165 16 is_stmt 0 view .LVU1746 5299 0154 A379 ldrb r3, [r4, #6] @ zero_extendqisi2 -2163:Src/main.c **** { - 5300 .loc 1 2163 5 view .LVU1747 - ARM GAS /tmp/ccfIOqv2.s page 455 + ARM GAS /tmp/ccyYWdjY.s page 455 +2165:Src/main.c **** { + 5300 .loc 1 2165 5 view .LVU1747 5301 0156 002B cmp r3, #0 5302 0158 00F08680 beq .L203 -2165:Src/main.c **** } - 5303 .loc 1 2165 3 is_stmt 1 view .LVU1748 +2167:Src/main.c **** } + 5303 .loc 1 2167 3 is_stmt 1 view .LVU1748 5304 015c 0122 movs r2, #1 5305 015e 0821 movs r1, #8 5306 0160 6048 ldr r0, .L215+24 5307 0162 FFF7FEFF bl HAL_GPIO_WritePin 5308 .LVL420: 5309 .L204: -2172:Src/main.c **** { - 5310 .loc 1 2172 2 view .LVU1749 -2172:Src/main.c **** { - 5311 .loc 1 2172 17 is_stmt 0 view .LVU1750 +2174:Src/main.c **** { + 5310 .loc 1 2174 2 view .LVU1749 +2174:Src/main.c **** { + 5311 .loc 1 2174 17 is_stmt 0 view .LVU1750 5312 0166 637A ldrb r3, [r4, #9] @ zero_extendqisi2 -2172:Src/main.c **** { - 5313 .loc 1 2172 5 view .LVU1751 +2174:Src/main.c **** { + 5313 .loc 1 2174 5 view .LVU1751 5314 0168 1BB1 cbz r3, .L205 -2172:Src/main.c **** { - 5315 .loc 1 2172 39 discriminator 1 view .LVU1752 +2174:Src/main.c **** { + 5315 .loc 1 2174 39 discriminator 1 view .LVU1752 5316 016a E379 ldrb r3, [r4, #7] @ zero_extendqisi2 -2172:Src/main.c **** { - 5317 .loc 1 2172 26 discriminator 1 view .LVU1753 +2174:Src/main.c **** { + 5317 .loc 1 2174 26 discriminator 1 view .LVU1753 5318 016c 002B cmp r3, #0 5319 016e 40F08180 bne .L213 5320 .L205: -2181:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); - 5321 .loc 1 2181 3 is_stmt 1 view .LVU1754 +2183:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_RESET); + 5321 .loc 1 2183 3 is_stmt 1 view .LVU1754 5322 0172 0022 movs r2, #0 5323 0174 0121 movs r1, #1 5324 0176 5B48 ldr r0, .L215+24 5325 0178 FFF7FEFF bl HAL_GPIO_WritePin 5326 .LVL421: -2182:Src/main.c **** } - 5327 .loc 1 2182 3 view .LVU1755 +2184:Src/main.c **** } + 5327 .loc 1 2184 3 view .LVU1755 5328 017c 0022 movs r2, #0 5329 017e 4FF40061 mov r1, #2048 5330 0182 5748 ldr r0, .L215+20 5331 0184 FFF7FEFF bl HAL_GPIO_WritePin 5332 .LVL422: 5333 .L206: -2185:Src/main.c **** { - 5334 .loc 1 2185 2 view .LVU1756 -2185:Src/main.c **** { - 5335 .loc 1 2185 17 is_stmt 0 view .LVU1757 +2187:Src/main.c **** { + 5334 .loc 1 2187 2 view .LVU1756 +2187:Src/main.c **** { + 5335 .loc 1 2187 17 is_stmt 0 view .LVU1757 5336 0188 A37A ldrb r3, [r4, #10] @ zero_extendqisi2 -2185:Src/main.c **** { - 5337 .loc 1 2185 5 view .LVU1758 +2187:Src/main.c **** { + 5337 .loc 1 2187 5 view .LVU1758 5338 018a 1BB1 cbz r3, .L207 -2185:Src/main.c **** { - 5339 .loc 1 2185 39 discriminator 1 view .LVU1759 +2187:Src/main.c **** { + 5339 .loc 1 2187 39 discriminator 1 view .LVU1759 5340 018c 237A ldrb r3, [r4, #8] @ zero_extendqisi2 -2185:Src/main.c **** { - 5341 .loc 1 2185 26 discriminator 1 view .LVU1760 +2187:Src/main.c **** { + 5341 .loc 1 2187 26 discriminator 1 view .LVU1760 5342 018e 002B cmp r3, #0 + ARM GAS /tmp/ccyYWdjY.s page 456 + + 5343 0190 40F08680 bne .L214 5344 .L207: - ARM GAS /tmp/ccfIOqv2.s page 456 - - -2194:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); - 5345 .loc 1 2194 3 is_stmt 1 view .LVU1761 +2196:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_RESET); + 5345 .loc 1 2196 3 is_stmt 1 view .LVU1761 5346 0194 0022 movs r2, #0 5347 0196 0221 movs r1, #2 5348 0198 5248 ldr r0, .L215+24 5349 019a FFF7FEFF bl HAL_GPIO_WritePin 5350 .LVL423: -2195:Src/main.c **** } - 5351 .loc 1 2195 3 view .LVU1762 +2197:Src/main.c **** } + 5351 .loc 1 2197 3 view .LVU1762 5352 019e 0022 movs r2, #0 5353 01a0 2021 movs r1, #32 5354 01a2 4E48 ldr r0, .L215+16 5355 01a4 FFF7FEFF bl HAL_GPIO_WritePin 5356 .LVL424: 5357 .L208: -2198:Src/main.c **** { - 5358 .loc 1 2198 2 view .LVU1763 -2198:Src/main.c **** { - 5359 .loc 1 2198 16 is_stmt 0 view .LVU1764 +2200:Src/main.c **** { + 5358 .loc 1 2200 2 view .LVU1763 +2200:Src/main.c **** { + 5359 .loc 1 2200 16 is_stmt 0 view .LVU1764 5360 01a8 237B ldrb r3, [r4, #12] @ zero_extendqisi2 -2198:Src/main.c **** { - 5361 .loc 1 2198 5 view .LVU1765 +2200:Src/main.c **** { + 5361 .loc 1 2200 5 view .LVU1765 5362 01aa 1BB9 cbnz r3, .L209 -2200:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5363 .loc 1 2200 3 is_stmt 1 view .LVU1766 -2200:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; - 5364 .loc 1 2200 31 is_stmt 0 view .LVU1767 +2202:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 5363 .loc 1 2202 3 is_stmt 1 view .LVU1766 +2202:Src/main.c **** LD1_curr_setup->I_coef_temp = 0.01; + 5364 .loc 1 2202 31 is_stmt 0 view .LVU1767 5365 01ac 4E4B ldr r3, .L215+28 5366 01ae 7B60 str r3, [r7, #4] @ float -2201:Src/main.c **** } - 5367 .loc 1 2201 3 is_stmt 1 view .LVU1768 -2201:Src/main.c **** } - 5368 .loc 1 2201 31 is_stmt 0 view .LVU1769 +2203:Src/main.c **** } + 5367 .loc 1 2203 3 is_stmt 1 view .LVU1768 +2203:Src/main.c **** } + 5368 .loc 1 2203 31 is_stmt 0 view .LVU1769 5369 01b0 4E4B ldr r3, .L215+32 5370 01b2 BB60 str r3, [r7, #8] @ float 5371 .L209: -2204:Src/main.c **** { - 5372 .loc 1 2204 2 is_stmt 1 view .LVU1770 -2204:Src/main.c **** { - 5373 .loc 1 2204 16 is_stmt 0 view .LVU1771 +2206:Src/main.c **** { + 5372 .loc 1 2206 2 is_stmt 1 view .LVU1770 +2206:Src/main.c **** { + 5373 .loc 1 2206 16 is_stmt 0 view .LVU1771 5374 01b4 637B ldrb r3, [r4, #13] @ zero_extendqisi2 -2204:Src/main.c **** { - 5375 .loc 1 2204 5 view .LVU1772 +2206:Src/main.c **** { + 5375 .loc 1 2206 5 view .LVU1772 5376 01b6 1BB9 cbnz r3, .L191 -2206:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5377 .loc 1 2206 3 is_stmt 1 view .LVU1773 -2206:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; - 5378 .loc 1 2206 31 is_stmt 0 view .LVU1774 +2208:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 5377 .loc 1 2208 3 is_stmt 1 view .LVU1773 +2208:Src/main.c **** LD2_curr_setup->I_coef_temp = 0.01; + 5378 .loc 1 2208 31 is_stmt 0 view .LVU1774 5379 01b8 4B4B ldr r3, .L215+28 5380 01ba 7360 str r3, [r6, #4] @ float -2207:Src/main.c **** } - 5381 .loc 1 2207 3 is_stmt 1 view .LVU1775 -2207:Src/main.c **** } - 5382 .loc 1 2207 31 is_stmt 0 view .LVU1776 +2209:Src/main.c **** } + 5381 .loc 1 2209 3 is_stmt 1 view .LVU1775 +2209:Src/main.c **** } + 5382 .loc 1 2209 31 is_stmt 0 view .LVU1776 5383 01bc 4B4B ldr r3, .L215+32 + ARM GAS /tmp/ccyYWdjY.s page 457 + + 5384 01be B360 str r3, [r6, #8] @ float 5385 .L191: - ARM GAS /tmp/ccfIOqv2.s page 457 - - -2209:Src/main.c **** - 5386 .loc 1 2209 1 view .LVU1777 +2211:Src/main.c **** + 5386 .loc 1 2211 1 view .LVU1777 5387 01c0 BDE8F883 pop {r3, r4, r5, r6, r7, r8, r9, pc} 5388 .LVL425: 5389 .L212: -2060:Src/main.c **** { - 5390 .loc 1 2060 6 view .LVU1778 +2062:Src/main.c **** { + 5390 .loc 1 2062 6 view .LVU1778 5391 01c4 4FF48071 mov r1, #256 5392 01c8 4648 ldr r0, .L215+24 5393 01ca FFF7FEFF bl HAL_GPIO_ReadPin 5394 .LVL426: -2059:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u - 5395 .loc 1 2059 78 discriminator 1 view .LVU1779 +2061:Src/main.c **** (HAL_GPIO_ReadPin(USB_FLAG_GPIO_Port, USB_FLAG_Pin) == GPIO_PIN_SET))//if exist sd && connect u + 5395 .loc 1 2061 78 discriminator 1 view .LVU1779 5396 01ce 0128 cmp r0, #1 5397 01d0 7FF426AF bne .L192 -2062:Src/main.c **** if (test == 0) //0 - suc - 5398 .loc 1 2062 3 is_stmt 1 view .LVU1780 -2062:Src/main.c **** if (test == 0) //0 - suc - 5399 .loc 1 2062 10 is_stmt 0 view .LVU1781 +2064:Src/main.c **** if (test == 0) //0 - suc + 5398 .loc 1 2064 3 is_stmt 1 view .LVU1780 +2064:Src/main.c **** if (test == 0) //0 - suc + 5399 .loc 1 2064 10 is_stmt 0 view .LVU1781 5400 01d4 4648 ldr r0, .L215+36 5401 01d6 FFF7FEFF bl Mount_SD 5402 .LVL427: -2062:Src/main.c **** if (test == 0) //0 - suc - 5403 .loc 1 2062 8 discriminator 1 view .LVU1782 +2064:Src/main.c **** if (test == 0) //0 - suc + 5403 .loc 1 2064 8 discriminator 1 view .LVU1782 5404 01da 3C4B ldr r3, .L215 5405 01dc 1860 str r0, [r3] -2063:Src/main.c **** { - 5406 .loc 1 2063 3 is_stmt 1 view .LVU1783 -2063:Src/main.c **** { - 5407 .loc 1 2063 6 is_stmt 0 view .LVU1784 +2065:Src/main.c **** { + 5406 .loc 1 2065 3 is_stmt 1 view .LVU1783 +2065:Src/main.c **** { + 5407 .loc 1 2065 6 is_stmt 0 view .LVU1784 5408 01de 0028 cmp r0, #0 5409 01e0 7FF41EAF bne .L192 -2066:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5410 .loc 1 2066 4 is_stmt 1 view .LVU1785 -2066:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5411 .loc 1 2066 11 is_stmt 0 view .LVU1786 +2068:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5410 .loc 1 2068 4 is_stmt 1 view .LVU1785 +2068:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5411 .loc 1 2068 11 is_stmt 0 view .LVU1786 5412 01e4 DFF80C91 ldr r9, .L215+40 5413 01e8 4846 mov r0, r9 5414 01ea FFF7FEFF bl Remove_File 5415 .LVL428: -2066:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ - 5416 .loc 1 2066 9 discriminator 1 view .LVU1787 +2068:Src/main.c **** test = Create_File("COMMAND.TXT"); // 0 -succ + 5416 .loc 1 2068 9 discriminator 1 view .LVU1787 5417 01ee DFF8DC80 ldr r8, .L215 5418 01f2 C8F80000 str r0, [r8] -2067:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5419 .loc 1 2067 4 is_stmt 1 view .LVU1788 -2067:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5420 .loc 1 2067 11 is_stmt 0 view .LVU1789 +2069:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5419 .loc 1 2069 4 is_stmt 1 view .LVU1788 +2069:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5420 .loc 1 2069 11 is_stmt 0 view .LVU1789 5421 01f6 4846 mov r0, r9 5422 01f8 FFF7FEFF bl Create_File 5423 .LVL429: -2067:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5424 .loc 1 2067 9 discriminator 1 view .LVU1790 +2069:Src/main.c **** test = Write_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5424 .loc 1 2069 9 discriminator 1 view .LVU1790 5425 01fc C8F80000 str r0, [r8] -2068:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5426 .loc 1 2068 4 is_stmt 1 view .LVU1791 -2068:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - ARM GAS /tmp/ccfIOqv2.s page 458 +2070:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + ARM GAS /tmp/ccyYWdjY.s page 458 - 5427 .loc 1 2068 11 is_stmt 0 view .LVU1792 + 5426 .loc 1 2070 4 is_stmt 1 view .LVU1791 +2070:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5427 .loc 1 2070 11 is_stmt 0 view .LVU1792 5428 0200 1E22 movs r2, #30 5429 0202 2946 mov r1, r5 5430 0204 4846 mov r0, r9 5431 0206 FFF7FEFF bl Write_File_byte 5432 .LVL430: -2068:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); - 5433 .loc 1 2068 9 discriminator 1 view .LVU1793 +2070:Src/main.c **** test = Update_File_byte("COMMAND.TXT", (uint8_t *)Command, CL_8); + 5433 .loc 1 2070 9 discriminator 1 view .LVU1793 5434 020a C8F80000 str r0, [r8] -2069:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5435 .loc 1 2069 4 is_stmt 1 view .LVU1794 -2069:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5436 .loc 1 2069 11 is_stmt 0 view .LVU1795 +2071:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5435 .loc 1 2071 4 is_stmt 1 view .LVU1794 +2071:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5436 .loc 1 2071 11 is_stmt 0 view .LVU1795 5437 020e 1E22 movs r2, #30 5438 0210 2946 mov r1, r5 5439 0212 4846 mov r0, r9 5440 0214 FFF7FEFF bl Update_File_byte 5441 .LVL431: -2069:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5442 .loc 1 2069 9 discriminator 1 view .LVU1796 +2071:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5442 .loc 1 2071 9 discriminator 1 view .LVU1796 5443 0218 C8F80000 str r0, [r8] -2070:Src/main.c **** } - 5444 .loc 1 2070 4 is_stmt 1 view .LVU1797 -2070:Src/main.c **** } - 5445 .loc 1 2070 11 is_stmt 0 view .LVU1798 +2072:Src/main.c **** } + 5444 .loc 1 2072 4 is_stmt 1 view .LVU1797 +2072:Src/main.c **** } + 5445 .loc 1 2072 11 is_stmt 0 view .LVU1798 5446 021c 3448 ldr r0, .L215+36 5447 021e FFF7FEFF bl Unmount_SD 5448 .LVL432: -2070:Src/main.c **** } - 5449 .loc 1 2070 9 discriminator 1 view .LVU1799 +2072:Src/main.c **** } + 5449 .loc 1 2072 9 discriminator 1 view .LVU1799 5450 0222 C8F80000 str r0, [r8] 5451 0226 FBE6 b .L192 5452 .LVL433: 5453 .L193: -2120:Src/main.c **** } - 5454 .loc 1 2120 3 is_stmt 1 view .LVU1800 +2122:Src/main.c **** } + 5454 .loc 1 2122 3 is_stmt 1 view .LVU1800 5455 0228 0022 movs r2, #0 5456 022a 0821 movs r1, #8 5457 022c 2B48 ldr r0, .L215+16 @@ -27464,8 +27466,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5459 .LVL434: 5460 0232 69E7 b .L194 5461 .L195: -2129:Src/main.c **** } - 5462 .loc 1 2129 3 view .LVU1801 +2131:Src/main.c **** } + 5462 .loc 1 2131 3 view .LVU1801 5463 0234 0022 movs r2, #0 5464 0236 0421 movs r1, #4 5465 0238 2848 ldr r0, .L215+16 @@ -27473,20 +27475,20 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5467 .LVL435: 5468 023e 6CE7 b .L196 5469 .L197: -2139:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC - 5470 .loc 1 2139 3 view .LVU1802 +2141:Src/main.c **** //LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC + 5470 .loc 1 2141 3 view .LVU1802 5471 0240 0022 movs r2, #0 + ARM GAS /tmp/ccyYWdjY.s page 459 + + 5472 0242 4FF48071 mov r1, #256 5473 0246 2248 ldr r0, .L215+4 - ARM GAS /tmp/ccfIOqv2.s page 459 - - 5474 0248 FFF7FEFF bl HAL_GPIO_WritePin 5475 .LVL436: 5476 024c 6FE7 b .L198 5477 .L199: -2150:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC - 5478 .loc 1 2150 3 view .LVU1803 +2152:Src/main.c **** //LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC + 5478 .loc 1 2152 3 view .LVU1803 5479 024e 0022 movs r2, #0 5480 0250 1021 movs r1, #16 5481 0252 2248 ldr r0, .L215+16 @@ -27494,8 +27496,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5483 .LVL437: 5484 0258 72E7 b .L200 5485 .L201: -2160:Src/main.c **** } - 5486 .loc 1 2160 3 view .LVU1804 +2162:Src/main.c **** } + 5486 .loc 1 2162 3 view .LVU1804 5487 025a 0022 movs r2, #0 5488 025c 4FF48061 mov r1, #1024 5489 0260 1F48 ldr r0, .L215+20 @@ -27503,8 +27505,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5491 .LVL438: 5492 0266 75E7 b .L202 5493 .L203: -2169:Src/main.c **** } - 5494 .loc 1 2169 3 view .LVU1805 +2171:Src/main.c **** } + 5494 .loc 1 2171 3 view .LVU1805 5495 0268 0022 movs r2, #0 5496 026a 0821 movs r1, #8 5497 026c 1D48 ldr r0, .L215+24 @@ -27512,58 +27514,58 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5499 .LVL439: 5500 0272 78E7 b .L204 5501 .L213: -2174:Src/main.c **** Set_LTEC(3,32767); - 5502 .loc 1 2174 3 view .LVU1806 +2176:Src/main.c **** Set_LTEC(3,32767); + 5502 .loc 1 2176 3 view .LVU1806 5503 0274 47F6FF71 movw r1, #32767 5504 0278 0320 movs r0, #3 5505 027a FFF7FEFF bl Set_LTEC 5506 .LVL440: -2175:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); - 5507 .loc 1 2175 3 view .LVU1807 +2177:Src/main.c **** HAL_GPIO_WritePin(TEC1_PD_GPIO_Port, TEC1_PD_Pin, GPIO_PIN_SET); + 5507 .loc 1 2177 3 view .LVU1807 5508 027e 47F6FF71 movw r1, #32767 5509 0282 0320 movs r0, #3 5510 0284 FFF7FEFF bl Set_LTEC 5511 .LVL441: -2176:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); - 5512 .loc 1 2176 3 view .LVU1808 +2178:Src/main.c **** HAL_GPIO_WritePin(TECEN1_GPIO_Port, TECEN1_Pin, GPIO_PIN_SET); + 5512 .loc 1 2178 3 view .LVU1808 5513 0288 0122 movs r2, #1 5514 028a 4FF40061 mov r1, #2048 5515 028e 1448 ldr r0, .L215+20 5516 0290 FFF7FEFF bl HAL_GPIO_WritePin 5517 .LVL442: -2177:Src/main.c **** } - 5518 .loc 1 2177 3 view .LVU1809 +2179:Src/main.c **** } + 5518 .loc 1 2179 3 view .LVU1809 5519 0294 0122 movs r2, #1 5520 0296 1146 mov r1, r2 5521 0298 1248 ldr r0, .L215+24 + ARM GAS /tmp/ccyYWdjY.s page 460 + + 5522 029a FFF7FEFF bl HAL_GPIO_WritePin 5523 .LVL443: - ARM GAS /tmp/ccfIOqv2.s page 460 - - 5524 029e 73E7 b .L206 5525 .L214: -2187:Src/main.c **** Set_LTEC(4,32767); - 5526 .loc 1 2187 3 view .LVU1810 +2189:Src/main.c **** Set_LTEC(4,32767); + 5526 .loc 1 2189 3 view .LVU1810 5527 02a0 47F6FF71 movw r1, #32767 5528 02a4 0420 movs r0, #4 5529 02a6 FFF7FEFF bl Set_LTEC 5530 .LVL444: -2188:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); - 5531 .loc 1 2188 3 view .LVU1811 +2190:Src/main.c **** HAL_GPIO_WritePin(TEC2_PD_GPIO_Port, TEC2_PD_Pin, GPIO_PIN_SET); + 5531 .loc 1 2190 3 view .LVU1811 5532 02aa 47F6FF71 movw r1, #32767 5533 02ae 0420 movs r0, #4 5534 02b0 FFF7FEFF bl Set_LTEC 5535 .LVL445: -2189:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); - 5536 .loc 1 2189 3 view .LVU1812 +2191:Src/main.c **** HAL_GPIO_WritePin(TECEN2_GPIO_Port, TECEN2_Pin, GPIO_PIN_SET); + 5536 .loc 1 2191 3 view .LVU1812 5537 02b4 0122 movs r2, #1 5538 02b6 2021 movs r1, #32 5539 02b8 0848 ldr r0, .L215+16 5540 02ba FFF7FEFF bl HAL_GPIO_WritePin 5541 .LVL446: -2190:Src/main.c **** } - 5542 .loc 1 2190 3 view .LVU1813 +2192:Src/main.c **** } + 5542 .loc 1 2192 3 view .LVU1813 5543 02be 0122 movs r2, #1 5544 02c0 0221 movs r1, #2 5545 02c2 0848 ldr r0, .L215+24 @@ -27595,216 +27597,216 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5573 Advanced_Controller_Temp: 5574 .LVL448: 5575 .LFB1214: -2507:Src/main.c **** // Main idea: - 5576 .loc 1 2507 1 view -0 +2509:Src/main.c **** // Main idea: + ARM GAS /tmp/ccyYWdjY.s page 461 + + + 5576 .loc 1 2509 1 view -0 5577 .cfi_startproc - ARM GAS /tmp/ccfIOqv2.s page 461 - - 5578 @ args = 0, pretend = 0, frame = 0 5579 @ frame_needed = 0, uses_anonymous_args = 0 5580 @ link register save eliminated. -2507:Src/main.c **** // Main idea: - 5581 .loc 1 2507 1 is_stmt 0 view .LVU1815 +2509:Src/main.c **** // Main idea: + 5581 .loc 1 2509 1 is_stmt 0 view .LVU1815 5582 0000 30B4 push {r4, r5} 5583 .LCFI43: 5584 .cfi_def_cfa_offset 8 5585 .cfi_offset 4, -8 5586 .cfi_offset 5, -4 -2525:Src/main.c **** float P_coef_current;//, I_coef_current; - 5587 .loc 1 2525 2 is_stmt 1 view .LVU1816 -2526:Src/main.c **** float e_integral; - 5588 .loc 1 2526 2 view .LVU1817 -2527:Src/main.c **** int x_output; - 5589 .loc 1 2527 2 view .LVU1818 -2528:Src/main.c **** - 5590 .loc 1 2528 2 view .LVU1819 +2527:Src/main.c **** float P_coef_current;//, I_coef_current; + 5587 .loc 1 2527 2 is_stmt 1 view .LVU1816 +2528:Src/main.c **** float e_integral; + 5588 .loc 1 2528 2 view .LVU1817 +2529:Src/main.c **** int x_output; + 5589 .loc 1 2529 2 view .LVU1818 2530:Src/main.c **** - 5591 .loc 1 2530 2 view .LVU1820 -2530:Src/main.c **** - 5592 .loc 1 2530 28 is_stmt 0 view .LVU1821 + 5590 .loc 1 2530 2 view .LVU1819 +2532:Src/main.c **** + 5591 .loc 1 2532 2 view .LVU1820 +2532:Src/main.c **** + 5592 .loc 1 2532 28 is_stmt 0 view .LVU1821 5593 0002 0B88 ldrh r3, [r1] -2530:Src/main.c **** - 5594 .loc 1 2530 65 view .LVU1822 +2532:Src/main.c **** + 5594 .loc 1 2532 65 view .LVU1822 5595 0004 0488 ldrh r4, [r0] -2530:Src/main.c **** - 5596 .loc 1 2530 8 view .LVU1823 +2532:Src/main.c **** + 5596 .loc 1 2532 8 view .LVU1823 5597 0006 1B1B subs r3, r3, r4 5598 .LVL449: -2532:Src/main.c **** - 5599 .loc 1 2532 2 is_stmt 1 view .LVU1824 -2532:Src/main.c **** - 5600 .loc 1 2532 13 is_stmt 0 view .LVU1825 +2534:Src/main.c **** + 5599 .loc 1 2534 2 is_stmt 1 view .LVU1824 +2534:Src/main.c **** + 5600 .loc 1 2534 13 is_stmt 0 view .LVU1825 5601 0008 D1ED017A vldr.32 s15, [r1, #4] 5602 .LVL450: -2534:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5603 .loc 1 2534 2 is_stmt 1 view .LVU1826 -2534:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5604 .loc 1 2534 20 is_stmt 0 view .LVU1827 +2536:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 5603 .loc 1 2536 2 is_stmt 1 view .LVU1826 +2536:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 5604 .loc 1 2536 20 is_stmt 0 view .LVU1827 5605 000c 03F6B73C addw ip, r3, #2999 -2534:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 - 5606 .loc 1 2534 4 view .LVU1828 +2536:Src/main.c **** e_integral += LDx_curr_setup->I_coef_temp * (float)(e_pid) * (float)(TO7 - TO7_PID) / (float) 100 + 5606 .loc 1 2536 4 view .LVU1828 5607 0010 41F26E74 movw r4, #5998 5608 0014 A445 cmp ip, r4 5609 0016 18D8 bhi .L218 -2535:Src/main.c **** } - 5610 .loc 1 2535 3 is_stmt 1 view .LVU1829 -2535:Src/main.c **** } - 5611 .loc 1 2535 31 is_stmt 0 view .LVU1830 +2537:Src/main.c **** } + 5610 .loc 1 2537 3 is_stmt 1 view .LVU1829 +2537:Src/main.c **** } + 5611 .loc 1 2537 31 is_stmt 0 view .LVU1830 5612 0018 90ED027A vldr.32 s14, [r0, #8] -2535:Src/main.c **** } - 5613 .loc 1 2535 47 view .LVU1831 +2537:Src/main.c **** } + 5613 .loc 1 2537 47 view .LVU1831 5614 001c 06EE903A vmov s13, r3 @ int 5615 0020 F8EEE66A vcvt.f32.s32 s13, s13 -2535:Src/main.c **** } - 5616 .loc 1 2535 45 view .LVU1832 - ARM GAS /tmp/ccfIOqv2.s page 462 + ARM GAS /tmp/ccyYWdjY.s page 462 +2537:Src/main.c **** } + 5616 .loc 1 2537 45 view .LVU1832 5617 0024 27EE267A vmul.f32 s14, s14, s13 -2535:Src/main.c **** } - 5618 .loc 1 2535 76 view .LVU1833 +2537:Src/main.c **** } + 5618 .loc 1 2537 76 view .LVU1833 5619 0028 284C ldr r4, .L228 5620 002a 2468 ldr r4, [r4] 5621 002c 284D ldr r5, .L228+4 5622 002e 2D68 ldr r5, [r5] 5623 0030 641B subs r4, r4, r5 -2535:Src/main.c **** } - 5624 .loc 1 2535 64 view .LVU1834 +2537:Src/main.c **** } + 5624 .loc 1 2537 64 view .LVU1834 5625 0032 06EE904A vmov s13, r4 @ int 5626 0036 F8EE666A vcvt.f32.u32 s13, s13 -2535:Src/main.c **** } - 5627 .loc 1 2535 62 view .LVU1835 +2537:Src/main.c **** } + 5627 .loc 1 2537 62 view .LVU1835 5628 003a 27EE267A vmul.f32 s14, s14, s13 -2535:Src/main.c **** } - 5629 .loc 1 2535 87 view .LVU1836 +2537:Src/main.c **** } + 5629 .loc 1 2537 87 view .LVU1836 5630 003e 9FED256A vldr.32 s12, .L228+8 5631 0042 C7EE066A vdiv.f32 s13, s14, s12 -2535:Src/main.c **** } - 5632 .loc 1 2535 14 view .LVU1837 +2537:Src/main.c **** } + 5632 .loc 1 2537 14 view .LVU1837 5633 0046 77EEA67A vadd.f32 s15, s15, s13 5634 .LVL451: 5635 .L218: -2537:Src/main.c **** - 5636 .loc 1 2537 2 is_stmt 1 view .LVU1838 -2537:Src/main.c **** - 5637 .loc 1 2537 17 is_stmt 0 view .LVU1839 +2539:Src/main.c **** + 5636 .loc 1 2539 2 is_stmt 1 view .LVU1838 +2539:Src/main.c **** + 5637 .loc 1 2539 17 is_stmt 0 view .LVU1839 5638 004a D0ED016A vldr.32 s13, [r0, #4] 5639 .LVL452: -2539:Src/main.c **** e_integral = 32000; - 5640 .loc 1 2539 2 is_stmt 1 view .LVU1840 -2539:Src/main.c **** e_integral = 32000; - 5641 .loc 1 2539 5 is_stmt 0 view .LVU1841 +2541:Src/main.c **** e_integral = 32000; + 5640 .loc 1 2541 2 is_stmt 1 view .LVU1840 +2541:Src/main.c **** e_integral = 32000; + 5641 .loc 1 2541 5 is_stmt 0 view .LVU1841 5642 004e 9FED227A vldr.32 s14, .L228+12 5643 0052 F4EEC77A vcmpe.f32 s15, s14 5644 0056 F1EE10FA vmrs APSR_nzcv, FPSCR 5645 005a 09DC bgt .L222 -2542:Src/main.c **** e_integral = -32000; - 5646 .loc 1 2542 7 is_stmt 1 view .LVU1842 -2542:Src/main.c **** e_integral = -32000; - 5647 .loc 1 2542 10 is_stmt 0 view .LVU1843 +2544:Src/main.c **** e_integral = -32000; + 5646 .loc 1 2544 7 is_stmt 1 view .LVU1842 +2544:Src/main.c **** e_integral = -32000; + 5647 .loc 1 2544 10 is_stmt 0 view .LVU1843 5648 005c 9FED1F7A vldr.32 s14, .L228+16 5649 0060 F4EEC77A vcmpe.f32 s15, s14 5650 0064 F1EE10FA vmrs APSR_nzcv, FPSCR 5651 0068 04D5 bpl .L219 -2543:Src/main.c **** } - 5652 .loc 1 2543 15 view .LVU1844 +2545:Src/main.c **** } + 5652 .loc 1 2545 15 view .LVU1844 5653 006a DFED1C7A vldr.32 s15, .L228+16 5654 .LVL453: -2543:Src/main.c **** } - 5655 .loc 1 2543 15 view .LVU1845 +2545:Src/main.c **** } + 5655 .loc 1 2545 15 view .LVU1845 5656 006e 01E0 b .L219 5657 .LVL454: 5658 .L222: -2540:Src/main.c **** } - 5659 .loc 1 2540 15 view .LVU1846 - ARM GAS /tmp/ccfIOqv2.s page 463 + ARM GAS /tmp/ccyYWdjY.s page 463 +2542:Src/main.c **** } + 5659 .loc 1 2542 15 view .LVU1846 5660 0070 DFED197A vldr.32 s15, .L228+12 5661 .LVL455: 5662 .L219: -2545:Src/main.c **** - 5663 .loc 1 2545 2 is_stmt 1 view .LVU1847 -2545:Src/main.c **** - 5664 .loc 1 2545 26 is_stmt 0 view .LVU1848 +2547:Src/main.c **** + 5663 .loc 1 2547 2 is_stmt 1 view .LVU1847 +2547:Src/main.c **** + 5664 .loc 1 2547 26 is_stmt 0 view .LVU1848 5665 0074 C1ED017A vstr.32 s15, [r1, #4] -2547:Src/main.c **** - 5666 .loc 1 2547 2 is_stmt 1 view .LVU1849 -2547:Src/main.c **** - 5667 .loc 1 2547 36 is_stmt 0 view .LVU1850 +2549:Src/main.c **** + 5666 .loc 1 2549 2 is_stmt 1 view .LVU1849 +2549:Src/main.c **** + 5667 .loc 1 2549 36 is_stmt 0 view .LVU1850 5668 0078 07EE103A vmov s14, r3 @ int 5669 007c B8EEC77A vcvt.f32.s32 s14, s14 5670 0080 27EE267A vmul.f32 s14, s14, s13 -2547:Src/main.c **** - 5671 .loc 1 2547 19 view .LVU1851 +2549:Src/main.c **** + 5671 .loc 1 2549 19 view .LVU1851 5672 0084 DFED166A vldr.32 s13, .L228+20 5673 .LVL456: -2547:Src/main.c **** - 5674 .loc 1 2547 19 view .LVU1852 +2549:Src/main.c **** + 5674 .loc 1 2549 19 view .LVU1852 5675 0088 37EE267A vadd.f32 s14, s14, s13 -2547:Src/main.c **** - 5676 .loc 1 2547 46 view .LVU1853 +2549:Src/main.c **** + 5676 .loc 1 2549 46 view .LVU1853 5677 008c FDEEE77A vcvt.s32.f32 s15, s15 5678 .LVL457: -2547:Src/main.c **** - 5679 .loc 1 2547 44 view .LVU1854 +2549:Src/main.c **** + 5679 .loc 1 2549 44 view .LVU1854 5680 0090 F8EEE77A vcvt.f32.s32 s15, s15 5681 0094 77EE877A vadd.f32 s15, s15, s14 -2547:Src/main.c **** - 5682 .loc 1 2547 11 view .LVU1855 +2549:Src/main.c **** + 5682 .loc 1 2549 11 view .LVU1855 5683 0098 FDEEE77A vcvt.s32.f32 s15, s15 5684 009c 17EE900A vmov r0, s15 @ int 5685 .LVL458: -2549:Src/main.c **** x_output = 8800; - 5686 .loc 1 2549 2 is_stmt 1 view .LVU1856 -2549:Src/main.c **** x_output = 8800; - 5687 .loc 1 2549 4 is_stmt 0 view .LVU1857 +2551:Src/main.c **** x_output = 8800; + 5686 .loc 1 2551 2 is_stmt 1 view .LVU1856 +2551:Src/main.c **** x_output = 8800; + 5687 .loc 1 2551 4 is_stmt 0 view .LVU1857 5688 00a0 B0F57A7F cmp r0, #1000 5689 00a4 06DB blt .L224 -2552:Src/main.c **** x_output = 56800; - 5690 .loc 1 2552 7 is_stmt 1 view .LVU1858 -2552:Src/main.c **** x_output = 56800; - 5691 .loc 1 2552 9 is_stmt 0 view .LVU1859 +2554:Src/main.c **** x_output = 56800; + 5690 .loc 1 2554 7 is_stmt 1 view .LVU1858 +2554:Src/main.c **** x_output = 56800; + 5691 .loc 1 2554 9 is_stmt 0 view .LVU1859 5692 00a6 4DF6E053 movw r3, #56800 5693 .LVL459: -2552:Src/main.c **** x_output = 56800; - 5694 .loc 1 2552 9 view .LVU1860 +2554:Src/main.c **** x_output = 56800; + 5694 .loc 1 2554 9 view .LVU1860 5695 00aa 9842 cmp r0, r3 5696 00ac 04DD ble .L220 -2553:Src/main.c **** } - 5697 .loc 1 2553 12 view .LVU1861 +2555:Src/main.c **** } + 5697 .loc 1 2555 12 view .LVU1861 5698 00ae 4DF6E050 movw r0, #56800 5699 .LVL460: -2553:Src/main.c **** } - 5700 .loc 1 2553 12 view .LVU1862 - ARM GAS /tmp/ccfIOqv2.s page 464 + ARM GAS /tmp/ccyYWdjY.s page 464 +2555:Src/main.c **** } + 5700 .loc 1 2555 12 view .LVU1862 5701 00b2 01E0 b .L220 5702 .LVL461: 5703 .L224: -2550:Src/main.c **** } - 5704 .loc 1 2550 12 view .LVU1863 +2552:Src/main.c **** } + 5704 .loc 1 2552 12 view .LVU1863 5705 00b4 42F26020 movw r0, #8800 5706 .LVL462: 5707 .L220: -2556:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5708 .loc 1 2556 2 is_stmt 1 view .LVU1864 -2556:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser - 5709 .loc 1 2556 5 is_stmt 0 view .LVU1865 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 5708 .loc 1 2558 2 is_stmt 1 view .LVU1864 +2558:Src/main.c **** TO7_PID = TO7;//Save current time only on 2nd laser + 5709 .loc 1 2558 5 is_stmt 0 view .LVU1865 5710 00b8 022A cmp r2, #2 5711 00ba 02D0 beq .L227 5712 .LVL463: 5713 .L221: -2559:Src/main.c **** } - 5714 .loc 1 2559 2 is_stmt 1 view .LVU1866 -2560:Src/main.c **** - 5715 .loc 1 2560 1 is_stmt 0 view .LVU1867 +2561:Src/main.c **** } + 5714 .loc 1 2561 2 is_stmt 1 view .LVU1866 +2562:Src/main.c **** + 5715 .loc 1 2562 1 is_stmt 0 view .LVU1867 5716 00bc 80B2 uxth r0, r0 5717 .LVL464: -2560:Src/main.c **** - 5718 .loc 1 2560 1 view .LVU1868 +2562:Src/main.c **** + 5718 .loc 1 2562 1 view .LVU1868 5719 00be 30BC pop {r4, r5} 5720 .LCFI44: 5721 .cfi_remember_state @@ -27816,15 +27818,15 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5727 .L227: 5728 .LCFI45: 5729 .cfi_restore_state -2557:Src/main.c **** - 5730 .loc 1 2557 3 is_stmt 1 view .LVU1869 -2557:Src/main.c **** - 5731 .loc 1 2557 11 is_stmt 0 view .LVU1870 +2559:Src/main.c **** + 5730 .loc 1 2559 3 is_stmt 1 view .LVU1869 +2559:Src/main.c **** + 5731 .loc 1 2559 11 is_stmt 0 view .LVU1870 5732 00c2 024B ldr r3, .L228 5733 00c4 1A68 ldr r2, [r3] 5734 .LVL466: -2557:Src/main.c **** - 5735 .loc 1 2557 11 view .LVU1871 +2559:Src/main.c **** + 5735 .loc 1 2559 11 view .LVU1871 5736 00c6 024B ldr r3, .L228+4 5737 00c8 1A60 str r2, [r3] 5738 00ca F7E7 b .L221 @@ -27836,11 +27838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5744 00d4 0000C842 .word 1120403456 5745 00d8 0000FA46 .word 1190789120 5746 00dc 0000FAC6 .word -956694528 + ARM GAS /tmp/ccyYWdjY.s page 465 + + 5747 00e0 00000047 .word 1191182336 5748 .cfi_endproc - ARM GAS /tmp/ccfIOqv2.s page 465 - - 5749 .LFE1214: 5751 .section .text.CalculateChecksum,"ax",%progbits 5752 .align 1 @@ -27851,62 +27853,62 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5758 CalculateChecksum: 5759 .LVL467: 5760 .LFB1217: -2623:Src/main.c **** short i; - 5761 .loc 1 2623 1 is_stmt 1 view -0 +2625:Src/main.c **** short i; + 5761 .loc 1 2625 1 is_stmt 1 view -0 5762 .cfi_startproc 5763 @ args = 0, pretend = 0, frame = 0 5764 @ frame_needed = 0, uses_anonymous_args = 0 5765 @ link register save eliminated. -2623:Src/main.c **** short i; - 5766 .loc 1 2623 1 is_stmt 0 view .LVU1873 +2625:Src/main.c **** short i; + 5766 .loc 1 2625 1 is_stmt 0 view .LVU1873 5767 0000 8446 mov ip, r0 -2624:Src/main.c **** uint16_t cs = *pbuff; - 5768 .loc 1 2624 2 is_stmt 1 view .LVU1874 -2625:Src/main.c **** - 5769 .loc 1 2625 2 view .LVU1875 -2625:Src/main.c **** - 5770 .loc 1 2625 11 is_stmt 0 view .LVU1876 +2626:Src/main.c **** uint16_t cs = *pbuff; + 5768 .loc 1 2626 2 is_stmt 1 view .LVU1874 +2627:Src/main.c **** + 5769 .loc 1 2627 2 view .LVU1875 +2627:Src/main.c **** + 5770 .loc 1 2627 11 is_stmt 0 view .LVU1876 5771 0002 0088 ldrh r0, [r0] 5772 .LVL468: -2627:Src/main.c **** { - 5773 .loc 1 2627 3 is_stmt 1 view .LVU1877 -2627:Src/main.c **** { - 5774 .loc 1 2627 9 is_stmt 0 view .LVU1878 +2629:Src/main.c **** { + 5773 .loc 1 2629 3 is_stmt 1 view .LVU1877 +2629:Src/main.c **** { + 5774 .loc 1 2629 9 is_stmt 0 view .LVU1878 5775 0004 0123 movs r3, #1 -2627:Src/main.c **** { - 5776 .loc 1 2627 3 view .LVU1879 +2629:Src/main.c **** { + 5776 .loc 1 2629 3 view .LVU1879 5777 0006 04E0 b .L231 5778 .LVL469: 5779 .L232: -2629:Src/main.c **** } - 5780 .loc 1 2629 3 is_stmt 1 view .LVU1880 -2629:Src/main.c **** } - 5781 .loc 1 2629 9 is_stmt 0 view .LVU1881 +2631:Src/main.c **** } + 5780 .loc 1 2631 3 is_stmt 1 view .LVU1880 +2631:Src/main.c **** } + 5781 .loc 1 2631 9 is_stmt 0 view .LVU1881 5782 0008 3CF81320 ldrh r2, [ip, r3, lsl #1] -2629:Src/main.c **** } - 5783 .loc 1 2629 6 view .LVU1882 +2631:Src/main.c **** } + 5783 .loc 1 2631 6 view .LVU1882 5784 000c 5040 eors r0, r0, r2 5785 .LVL470: -2627:Src/main.c **** { - 5786 .loc 1 2627 24 is_stmt 1 discriminator 3 view .LVU1883 +2629:Src/main.c **** { + 5786 .loc 1 2629 24 is_stmt 1 discriminator 3 view .LVU1883 5787 000e 0133 adds r3, r3, #1 5788 .LVL471: -2627:Src/main.c **** { - 5789 .loc 1 2627 24 is_stmt 0 discriminator 3 view .LVU1884 +2629:Src/main.c **** { + 5789 .loc 1 2629 24 is_stmt 0 discriminator 3 view .LVU1884 5790 0010 1BB2 sxth r3, r3 5791 .LVL472: 5792 .L231: -2627:Src/main.c **** { - 5793 .loc 1 2627 16 is_stmt 1 discriminator 1 view .LVU1885 - ARM GAS /tmp/ccfIOqv2.s page 466 + ARM GAS /tmp/ccyYWdjY.s page 466 +2629:Src/main.c **** { + 5793 .loc 1 2629 16 is_stmt 1 discriminator 1 view .LVU1885 5794 0012 8B42 cmp r3, r1 5795 0014 F8DB blt .L232 -2631:Src/main.c **** } - 5796 .loc 1 2631 2 view .LVU1886 -2632:Src/main.c **** - 5797 .loc 1 2632 1 is_stmt 0 view .LVU1887 +2633:Src/main.c **** } + 5796 .loc 1 2633 2 view .LVU1886 +2634:Src/main.c **** + 5797 .loc 1 2634 1 is_stmt 0 view .LVU1887 5798 0016 7047 bx lr 5799 .cfi_endproc 5800 .LFE1217: @@ -27919,22 +27921,22 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5809 CheckChecksum: 5810 .LVL473: 5811 .LFB1216: -2602:Src/main.c **** uint16_t cl_ind; - 5812 .loc 1 2602 1 is_stmt 1 view -0 +2604:Src/main.c **** uint16_t cl_ind; + 5812 .loc 1 2604 1 is_stmt 1 view -0 5813 .cfi_startproc 5814 @ args = 0, pretend = 0, frame = 0 5815 @ frame_needed = 0, uses_anonymous_args = 0 -2602:Src/main.c **** uint16_t cl_ind; - 5816 .loc 1 2602 1 is_stmt 0 view .LVU1889 +2604:Src/main.c **** uint16_t cl_ind; + 5816 .loc 1 2604 1 is_stmt 0 view .LVU1889 5817 0000 10B5 push {r4, lr} 5818 .LCFI46: 5819 .cfi_def_cfa_offset 8 5820 .cfi_offset 4, -8 5821 .cfi_offset 14, -4 -2603:Src/main.c **** - 5822 .loc 1 2603 3 is_stmt 1 view .LVU1890 -2605:Src/main.c **** { - 5823 .loc 1 2605 3 view .LVU1891 +2605:Src/main.c **** + 5822 .loc 1 2605 3 is_stmt 1 view .LVU1890 +2607:Src/main.c **** { + 5823 .loc 1 2607 3 view .LVU1891 5824 0002 0E4B ldr r3, .L239 5825 0004 1B88 ldrh r3, [r3] 5826 0006 41F21112 movw r2, #4369 @@ -27946,52 +27948,52 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5832 0016 0E24 movs r4, #14 5833 0018 00E0 b .L234 5834 .L236: -2611:Src/main.c **** break; - 5835 .loc 1 2611 14 is_stmt 0 view .LVU1892 +2613:Src/main.c **** break; + 5835 .loc 1 2613 14 is_stmt 0 view .LVU1892 5836 001a 0D24 movs r4, #13 5837 .L234: 5838 .LVL474: -2615:Src/main.c **** } - 5839 .loc 1 2615 5 is_stmt 1 view .LVU1893 -2618:Src/main.c **** - 5840 .loc 1 2618 3 view .LVU1894 -2618:Src/main.c **** - 5841 .loc 1 2618 15 is_stmt 0 view .LVU1895 +2617:Src/main.c **** } + 5839 .loc 1 2617 5 is_stmt 1 view .LVU1893 +2620:Src/main.c **** + 5840 .loc 1 2620 3 view .LVU1894 +2620:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 467 + + + 5841 .loc 1 2620 15 is_stmt 0 view .LVU1895 5842 001c 2146 mov r1, r4 - ARM GAS /tmp/ccfIOqv2.s page 467 - - 5843 001e FFF7FEFF bl CalculateChecksum 5844 .LVL475: -2618:Src/main.c **** - 5845 .loc 1 2618 13 discriminator 1 view .LVU1896 +2620:Src/main.c **** + 5845 .loc 1 2620 13 discriminator 1 view .LVU1896 5846 0022 074B ldr r3, .L239+4 5847 0024 1880 strh r0, [r3] @ movhi -2620:Src/main.c **** } - 5848 .loc 1 2620 3 is_stmt 1 view .LVU1897 -2620:Src/main.c **** } - 5849 .loc 1 2620 32 is_stmt 0 view .LVU1898 +2622:Src/main.c **** } + 5848 .loc 1 2622 3 is_stmt 1 view .LVU1897 +2622:Src/main.c **** } + 5849 .loc 1 2622 32 is_stmt 0 view .LVU1898 5850 0026 074B ldr r3, .L239+8 5851 0028 33F81430 ldrh r3, [r3, r4, lsl #1] -2620:Src/main.c **** } - 5852 .loc 1 2620 46 view .LVU1899 +2622:Src/main.c **** } + 5852 .loc 1 2622 46 view .LVU1899 5853 002c 9842 cmp r0, r3 5854 002e 14BF ite ne 5855 0030 0020 movne r0, #0 5856 0032 0120 moveq r0, #1 5857 .LVL476: 5858 .L235: -2621:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) - 5859 .loc 1 2621 1 view .LVU1900 +2623:Src/main.c **** uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len) + 5859 .loc 1 2623 1 view .LVU1900 5860 0034 10BD pop {r4, pc} 5861 .LVL477: 5862 .L237: -2605:Src/main.c **** { - 5863 .loc 1 2605 3 view .LVU1901 +2607:Src/main.c **** { + 5863 .loc 1 2607 3 view .LVU1901 5864 0036 0020 movs r0, #0 5865 .LVL478: -2605:Src/main.c **** { - 5866 .loc 1 2605 3 view .LVU1902 +2607:Src/main.c **** { + 5866 .loc 1 2607 3 view .LVU1902 5867 0038 FCE7 b .L235 5868 .L240: 5869 003a 00BF .align 2 @@ -28016,96 +28018,96 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5888 SD_SAVE: 5889 .LVL479: 5890 .LFB1218: -2661:Src/main.c **** int test=0; - 5891 .loc 1 2661 1 is_stmt 1 view -0 - ARM GAS /tmp/ccfIOqv2.s page 468 + ARM GAS /tmp/ccyYWdjY.s page 468 +2663:Src/main.c **** int test=0; + 5891 .loc 1 2663 1 is_stmt 1 view -0 5892 .cfi_startproc 5893 @ args = 0, pretend = 0, frame = 0 5894 @ frame_needed = 0, uses_anonymous_args = 0 -2661:Src/main.c **** int test=0; - 5895 .loc 1 2661 1 is_stmt 0 view .LVU1904 +2663:Src/main.c **** int test=0; + 5895 .loc 1 2663 1 is_stmt 0 view .LVU1904 5896 0000 10B5 push {r4, lr} 5897 .LCFI47: 5898 .cfi_def_cfa_offset 8 5899 .cfi_offset 4, -8 5900 .cfi_offset 14, -4 5901 0002 0446 mov r4, r0 -2662:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5902 .loc 1 2662 2 is_stmt 1 view .LVU1905 +2664:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 5902 .loc 1 2664 2 is_stmt 1 view .LVU1905 5903 .LVL480: -2663:Src/main.c **** { - 5904 .loc 1 2663 2 view .LVU1906 -2663:Src/main.c **** { - 5905 .loc 1 2663 6 is_stmt 0 view .LVU1907 +2665:Src/main.c **** { + 5904 .loc 1 2665 2 view .LVU1906 +2665:Src/main.c **** { + 5905 .loc 1 2665 6 is_stmt 0 view .LVU1907 5906 0004 0121 movs r1, #1 5907 0006 0A48 ldr r0, .L248 5908 .LVL481: -2663:Src/main.c **** { - 5909 .loc 1 2663 6 view .LVU1908 +2665:Src/main.c **** { + 5909 .loc 1 2665 6 view .LVU1908 5910 0008 FFF7FEFF bl HAL_GPIO_ReadPin 5911 .LVL482: -2663:Src/main.c **** { - 5912 .loc 1 2663 5 discriminator 1 view .LVU1909 +2665:Src/main.c **** { + 5912 .loc 1 2665 5 discriminator 1 view .LVU1909 5913 000c 08B1 cbz r0, .L246 -2680:Src/main.c **** } - 5914 .loc 1 2680 10 view .LVU1910 +2682:Src/main.c **** } + 5914 .loc 1 2682 10 view .LVU1910 5915 000e 0120 movs r0, #1 5916 .LVL483: 5917 .L241: -2682:Src/main.c **** - 5918 .loc 1 2682 1 view .LVU1911 +2684:Src/main.c **** + 5918 .loc 1 2684 1 view .LVU1911 5919 0010 10BD pop {r4, pc} 5920 .LVL484: 5921 .L246: -2665:Src/main.c **** if (test == 0) //0 - suc - 5922 .loc 1 2665 3 is_stmt 1 view .LVU1912 -2665:Src/main.c **** if (test == 0) //0 - suc - 5923 .loc 1 2665 10 is_stmt 0 view .LVU1913 +2667:Src/main.c **** if (test == 0) //0 - suc + 5922 .loc 1 2667 3 is_stmt 1 view .LVU1912 +2667:Src/main.c **** if (test == 0) //0 - suc + 5923 .loc 1 2667 10 is_stmt 0 view .LVU1913 5924 0012 0848 ldr r0, .L248+4 5925 0014 FFF7FEFF bl Mount_SD 5926 .LVL485: -2666:Src/main.c **** { - 5927 .loc 1 2666 3 is_stmt 1 view .LVU1914 -2666:Src/main.c **** { - 5928 .loc 1 2666 6 is_stmt 0 view .LVU1915 +2668:Src/main.c **** { + 5927 .loc 1 2668 3 is_stmt 1 view .LVU1914 +2668:Src/main.c **** { + 5928 .loc 1 2668 6 is_stmt 0 view .LVU1915 5929 0018 08B1 cbz r0, .L247 -2675:Src/main.c **** } - 5930 .loc 1 2675 11 view .LVU1916 +2677:Src/main.c **** } + 5930 .loc 1 2677 11 view .LVU1916 5931 001a 0120 movs r0, #1 5932 .LVL486: -2675:Src/main.c **** } - 5933 .loc 1 2675 11 view .LVU1917 +2677:Src/main.c **** } + ARM GAS /tmp/ccyYWdjY.s page 469 + + + 5933 .loc 1 2677 11 view .LVU1917 5934 001c F8E7 b .L241 - ARM GAS /tmp/ccfIOqv2.s page 469 - - 5935 .LVL487: 5936 .L247: -2669:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5937 .loc 1 2669 4 is_stmt 1 view .LVU1918 -2669:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5938 .loc 1 2669 11 is_stmt 0 view .LVU1919 +2671:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5937 .loc 1 2671 4 is_stmt 1 view .LVU1918 +2671:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5938 .loc 1 2671 11 is_stmt 0 view .LVU1919 5939 001e 1E22 movs r2, #30 5940 0020 2146 mov r1, r4 5941 0022 0548 ldr r0, .L248+8 5942 .LVL488: -2669:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 5943 .loc 1 2669 11 view .LVU1920 +2671:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 5943 .loc 1 2671 11 view .LVU1920 5944 0024 FFF7FEFF bl Update_File_byte 5945 .LVL489: -2670:Src/main.c **** return test; - 5946 .loc 1 2670 4 is_stmt 1 view .LVU1921 -2670:Src/main.c **** return test; - 5947 .loc 1 2670 11 is_stmt 0 view .LVU1922 +2672:Src/main.c **** return test; + 5946 .loc 1 2672 4 is_stmt 1 view .LVU1921 +2672:Src/main.c **** return test; + 5947 .loc 1 2672 11 is_stmt 0 view .LVU1922 5948 0028 0248 ldr r0, .L248+4 5949 002a FFF7FEFF bl Unmount_SD 5950 .LVL490: -2671:Src/main.c **** } - 5951 .loc 1 2671 4 is_stmt 1 view .LVU1923 -2671:Src/main.c **** } - 5952 .loc 1 2671 11 is_stmt 0 view .LVU1924 +2673:Src/main.c **** } + 5951 .loc 1 2673 4 is_stmt 1 view .LVU1923 +2673:Src/main.c **** } + 5952 .loc 1 2673 11 is_stmt 0 view .LVU1924 5953 002e EFE7 b .L241 5954 .L249: 5955 .align 2 @@ -28124,107 +28126,107 @@ ARM GAS /tmp/ccfIOqv2.s page 1 5970 SD_READ: 5971 .LVL491: 5972 .LFB1219: -2692:Src/main.c **** int test=0; - 5973 .loc 1 2692 1 is_stmt 1 view -0 +2694:Src/main.c **** int test=0; + 5973 .loc 1 2694 1 is_stmt 1 view -0 5974 .cfi_startproc 5975 @ args = 0, pretend = 0, frame = 0 5976 @ frame_needed = 0, uses_anonymous_args = 0 -2692:Src/main.c **** int test=0; - 5977 .loc 1 2692 1 is_stmt 0 view .LVU1926 +2694:Src/main.c **** int test=0; + 5977 .loc 1 2694 1 is_stmt 0 view .LVU1926 5978 0000 38B5 push {r3, r4, r5, lr} 5979 .LCFI48: 5980 .cfi_def_cfa_offset 16 5981 .cfi_offset 3, -16 5982 .cfi_offset 4, -12 + ARM GAS /tmp/ccyYWdjY.s page 470 + + 5983 .cfi_offset 5, -8 5984 .cfi_offset 14, -4 - ARM GAS /tmp/ccfIOqv2.s page 470 - - 5985 0002 0446 mov r4, r0 -2693:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 5986 .loc 1 2693 2 is_stmt 1 view .LVU1927 +2695:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 5986 .loc 1 2695 2 is_stmt 1 view .LVU1927 5987 .LVL492: -2694:Src/main.c **** { - 5988 .loc 1 2694 2 view .LVU1928 -2694:Src/main.c **** { - 5989 .loc 1 2694 6 is_stmt 0 view .LVU1929 +2696:Src/main.c **** { + 5988 .loc 1 2696 2 view .LVU1928 +2696:Src/main.c **** { + 5989 .loc 1 2696 6 is_stmt 0 view .LVU1929 5990 0004 0121 movs r1, #1 5991 0006 0D48 ldr r0, .L257 5992 .LVL493: -2694:Src/main.c **** { - 5993 .loc 1 2694 6 view .LVU1930 +2696:Src/main.c **** { + 5993 .loc 1 2696 6 view .LVU1930 5994 0008 FFF7FEFF bl HAL_GPIO_ReadPin 5995 .LVL494: -2694:Src/main.c **** { - 5996 .loc 1 2694 5 discriminator 1 view .LVU1931 +2696:Src/main.c **** { + 5996 .loc 1 2696 5 discriminator 1 view .LVU1931 5997 000c 08B1 cbz r0, .L255 -2712:Src/main.c **** } - 5998 .loc 1 2712 10 view .LVU1932 +2714:Src/main.c **** } + 5998 .loc 1 2714 10 view .LVU1932 5999 000e 0120 movs r0, #1 6000 .LVL495: 6001 .L250: -2728:Src/main.c **** - 6002 .loc 1 2728 1 view .LVU1933 +2730:Src/main.c **** + 6002 .loc 1 2730 1 view .LVU1933 6003 0010 38BD pop {r3, r4, r5, pc} 6004 .LVL496: 6005 .L255: -2696:Src/main.c **** if (test == 0) //0 - suc - 6006 .loc 1 2696 3 is_stmt 1 view .LVU1934 -2696:Src/main.c **** if (test == 0) //0 - suc - 6007 .loc 1 2696 10 is_stmt 0 view .LVU1935 +2698:Src/main.c **** if (test == 0) //0 - suc + 6006 .loc 1 2698 3 is_stmt 1 view .LVU1934 +2698:Src/main.c **** if (test == 0) //0 - suc + 6007 .loc 1 2698 10 is_stmt 0 view .LVU1935 6008 0012 0B48 ldr r0, .L257+4 6009 0014 FFF7FEFF bl Mount_SD 6010 .LVL497: -2697:Src/main.c **** { - 6011 .loc 1 2697 3 is_stmt 1 view .LVU1936 -2697:Src/main.c **** { - 6012 .loc 1 2697 6 is_stmt 0 view .LVU1937 +2699:Src/main.c **** { + 6011 .loc 1 2699 3 is_stmt 1 view .LVU1936 +2699:Src/main.c **** { + 6012 .loc 1 2699 6 is_stmt 0 view .LVU1937 6013 0018 08B1 cbz r0, .L256 -2707:Src/main.c **** } - 6014 .loc 1 2707 11 view .LVU1938 +2709:Src/main.c **** } + 6014 .loc 1 2709 11 view .LVU1938 6015 001a 0120 movs r0, #1 6016 .LVL498: -2707:Src/main.c **** } - 6017 .loc 1 2707 11 view .LVU1939 +2709:Src/main.c **** } + 6017 .loc 1 2709 11 view .LVU1939 6018 001c F8E7 b .L250 6019 .LVL499: 6020 .L256: -2700:Src/main.c **** fgoto+=DL_8; - 6021 .loc 1 2700 4 is_stmt 1 view .LVU1940 -2700:Src/main.c **** fgoto+=DL_8; - 6022 .loc 1 2700 11 is_stmt 0 view .LVU1941 +2702:Src/main.c **** fgoto+=DL_8; + 6021 .loc 1 2702 4 is_stmt 1 view .LVU1940 +2702:Src/main.c **** fgoto+=DL_8; + 6022 .loc 1 2702 11 is_stmt 0 view .LVU1941 6023 001e 094D ldr r5, .L257+8 6024 0020 2B68 ldr r3, [r5] + ARM GAS /tmp/ccyYWdjY.s page 471 + + 6025 0022 1E22 movs r2, #30 6026 0024 2146 mov r1, r4 - ARM GAS /tmp/ccfIOqv2.s page 471 - - 6027 0026 0848 ldr r0, .L257+12 6028 .LVL500: -2700:Src/main.c **** fgoto+=DL_8; - 6029 .loc 1 2700 11 view .LVU1942 +2702:Src/main.c **** fgoto+=DL_8; + 6029 .loc 1 2702 11 view .LVU1942 6030 0028 FFF7FEFF bl Seek_Read_File 6031 .LVL501: -2701:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6032 .loc 1 2701 4 is_stmt 1 view .LVU1943 -2701:Src/main.c **** test = Unmount_SD("/"); // 0 - succ - 6033 .loc 1 2701 9 is_stmt 0 view .LVU1944 +2703:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6032 .loc 1 2703 4 is_stmt 1 view .LVU1943 +2703:Src/main.c **** test = Unmount_SD("/"); // 0 - succ + 6033 .loc 1 2703 9 is_stmt 0 view .LVU1944 6034 002c 2B68 ldr r3, [r5] 6035 002e 1E33 adds r3, r3, #30 6036 0030 2B60 str r3, [r5] -2702:Src/main.c **** return test; - 6037 .loc 1 2702 4 is_stmt 1 view .LVU1945 -2702:Src/main.c **** return test; - 6038 .loc 1 2702 11 is_stmt 0 view .LVU1946 +2704:Src/main.c **** return test; + 6037 .loc 1 2704 4 is_stmt 1 view .LVU1945 +2704:Src/main.c **** return test; + 6038 .loc 1 2704 11 is_stmt 0 view .LVU1946 6039 0032 0348 ldr r0, .L257+4 6040 0034 FFF7FEFF bl Unmount_SD 6041 .LVL502: -2703:Src/main.c **** } - 6042 .loc 1 2703 4 is_stmt 1 view .LVU1947 -2703:Src/main.c **** } - 6043 .loc 1 2703 11 is_stmt 0 view .LVU1948 +2705:Src/main.c **** } + 6042 .loc 1 2705 4 is_stmt 1 view .LVU1947 +2705:Src/main.c **** } + 6043 .loc 1 2705 11 is_stmt 0 view .LVU1948 6044 0038 EAE7 b .L250 6045 .L258: 6046 003a 00BF .align 2 @@ -28243,8 +28245,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6060 .thumb_func 6062 SD_REMOVE: 6063 .LFB1220: -2731:Src/main.c **** int test=0; - 6064 .loc 1 2731 1 is_stmt 1 view -0 +2733:Src/main.c **** int test=0; + 6064 .loc 1 2733 1 is_stmt 1 view -0 6065 .cfi_startproc 6066 @ args = 0, pretend = 0, frame = 0 6067 @ frame_needed = 0, uses_anonymous_args = 0 @@ -28253,86 +28255,86 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6070 .cfi_def_cfa_offset 8 6071 .cfi_offset 4, -8 6072 .cfi_offset 14, -4 -2732:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) - 6073 .loc 1 2732 2 view .LVU1950 +2734:Src/main.c **** if (HAL_GPIO_ReadPin(SDMMC1_EN_GPIO_Port, SDMMC1_EN_Pin)==GPIO_PIN_RESET) + 6073 .loc 1 2734 2 view .LVU1950 6074 .LVL503: -2733:Src/main.c **** { - 6075 .loc 1 2733 2 view .LVU1951 - ARM GAS /tmp/ccfIOqv2.s page 472 + ARM GAS /tmp/ccyYWdjY.s page 472 -2733:Src/main.c **** { - 6076 .loc 1 2733 6 is_stmt 0 view .LVU1952 +2735:Src/main.c **** { + 6075 .loc 1 2735 2 view .LVU1951 +2735:Src/main.c **** { + 6076 .loc 1 2735 6 is_stmt 0 view .LVU1952 6077 0002 0121 movs r1, #1 6078 0004 0B48 ldr r0, .L266 6079 0006 FFF7FEFF bl HAL_GPIO_ReadPin 6080 .LVL504: -2733:Src/main.c **** { - 6081 .loc 1 2733 5 discriminator 1 view .LVU1953 +2735:Src/main.c **** { + 6081 .loc 1 2735 5 discriminator 1 view .LVU1953 6082 000a 08B1 cbz r0, .L264 -2751:Src/main.c **** } - 6083 .loc 1 2751 10 view .LVU1954 +2753:Src/main.c **** } + 6083 .loc 1 2753 10 view .LVU1954 6084 000c 0120 movs r0, #1 6085 .LVL505: 6086 .L259: -2753:Src/main.c **** - 6087 .loc 1 2753 1 view .LVU1955 +2755:Src/main.c **** + 6087 .loc 1 2755 1 view .LVU1955 6088 000e 10BD pop {r4, pc} 6089 .LVL506: 6090 .L264: -2735:Src/main.c **** if (test==FR_OK) - 6091 .loc 1 2735 3 is_stmt 1 view .LVU1956 -2735:Src/main.c **** if (test==FR_OK) - 6092 .loc 1 2735 10 is_stmt 0 view .LVU1957 +2737:Src/main.c **** if (test==FR_OK) + 6091 .loc 1 2737 3 is_stmt 1 view .LVU1956 +2737:Src/main.c **** if (test==FR_OK) + 6092 .loc 1 2737 10 is_stmt 0 view .LVU1957 6093 0010 0948 ldr r0, .L266+4 6094 0012 FFF7FEFF bl Mount_SD 6095 .LVL507: -2736:Src/main.c **** { - 6096 .loc 1 2736 3 is_stmt 1 view .LVU1958 -2736:Src/main.c **** { - 6097 .loc 1 2736 6 is_stmt 0 view .LVU1959 +2738:Src/main.c **** { + 6096 .loc 1 2738 3 is_stmt 1 view .LVU1958 +2738:Src/main.c **** { + 6097 .loc 1 2738 6 is_stmt 0 view .LVU1959 6098 0016 08B1 cbz r0, .L265 -2746:Src/main.c **** } - 6099 .loc 1 2746 11 view .LVU1960 +2748:Src/main.c **** } + 6099 .loc 1 2748 11 view .LVU1960 6100 0018 0120 movs r0, #1 6101 .LVL508: -2746:Src/main.c **** } - 6102 .loc 1 2746 11 view .LVU1961 +2748:Src/main.c **** } + 6102 .loc 1 2748 11 view .LVU1961 6103 001a F8E7 b .L259 6104 .LVL509: 6105 .L265: -2738:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6106 .loc 1 2738 4 is_stmt 1 view .LVU1962 -2738:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6107 .loc 1 2738 11 is_stmt 0 view .LVU1963 +2740:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6106 .loc 1 2740 4 is_stmt 1 view .LVU1962 +2740:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6107 .loc 1 2740 11 is_stmt 0 view .LVU1963 6108 001c 074C ldr r4, .L266+8 6109 001e 2046 mov r0, r4 6110 .LVL510: -2738:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc - 6111 .loc 1 2738 11 view .LVU1964 +2740:Src/main.c **** test = Create_File("FILE1.TXT"); // 0 -suc + 6111 .loc 1 2740 11 view .LVU1964 6112 0020 FFF7FEFF bl Remove_File 6113 .LVL511: -2739:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6114 .loc 1 2739 4 is_stmt 1 view .LVU1965 -2739:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt - 6115 .loc 1 2739 11 is_stmt 0 view .LVU1966 +2741:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 6114 .loc 1 2741 4 is_stmt 1 view .LVU1965 +2741:Src/main.c **** //test = Write_File ("FILE1.TXT", "____OSGG main borad information. Program made by Kazakov Vikt + 6115 .loc 1 2741 11 is_stmt 0 view .LVU1966 + ARM GAS /tmp/ccyYWdjY.s page 473 + + 6116 0024 2046 mov r0, r4 6117 0026 FFF7FEFF bl Create_File - ARM GAS /tmp/ccfIOqv2.s page 473 - - 6118 .LVL512: -2741:Src/main.c **** return test; - 6119 .loc 1 2741 4 is_stmt 1 view .LVU1967 -2741:Src/main.c **** return test; - 6120 .loc 1 2741 11 is_stmt 0 view .LVU1968 +2743:Src/main.c **** return test; + 6119 .loc 1 2743 4 is_stmt 1 view .LVU1967 +2743:Src/main.c **** return test; + 6120 .loc 1 2743 11 is_stmt 0 view .LVU1968 6121 002a 0348 ldr r0, .L266+4 6122 002c FFF7FEFF bl Unmount_SD 6123 .LVL513: -2742:Src/main.c **** } - 6124 .loc 1 2742 4 is_stmt 1 view .LVU1969 -2742:Src/main.c **** } - 6125 .loc 1 2742 11 is_stmt 0 view .LVU1970 +2744:Src/main.c **** } + 6124 .loc 1 2744 4 is_stmt 1 view .LVU1969 +2744:Src/main.c **** } + 6125 .loc 1 2744 11 is_stmt 0 view .LVU1970 6126 0030 EDE7 b .L259 6127 .L267: 6128 0032 00BF .align 2 @@ -28351,39 +28353,39 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6143 USART_TX: 6144 .LVL514: 6145 .LFB1221: -2757:Src/main.c **** uint16_t ind = 0; - 6146 .loc 1 2757 1 is_stmt 1 view -0 +2759:Src/main.c **** uint16_t ind = 0; + 6146 .loc 1 2759 1 is_stmt 1 view -0 6147 .cfi_startproc 6148 @ args = 0, pretend = 0, frame = 0 6149 @ frame_needed = 0, uses_anonymous_args = 0 6150 @ link register save eliminated. -2757:Src/main.c **** uint16_t ind = 0; - 6151 .loc 1 2757 1 is_stmt 0 view .LVU1972 +2759:Src/main.c **** uint16_t ind = 0; + 6151 .loc 1 2759 1 is_stmt 0 view .LVU1972 6152 0000 8C46 mov ip, r1 -2758:Src/main.c **** while (indCR3, USART_CR3_DMAT) == (USART_CR3_DMAT)) ? 1UL : 0UL); - ARM GAS /tmp/ccfIOqv2.s page 475 - - 3581:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3582:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** 3583:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /** @@ -28496,11 +28498,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 3633:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data_reg_addr = (uint32_t) &(USARTx->TDR); 3634:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3635:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** else + ARM GAS /tmp/ccyYWdjY.s page 476 + + 3636:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { 3637:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** /* return address of RDR register */ - ARM GAS /tmp/ccfIOqv2.s page 476 - - 3638:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** data_reg_addr = (uint32_t) &(USARTx->RDR); 3639:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } 3640:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** @@ -28556,27 +28558,27 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6198 .LVL520: 6199 .loc 7 3683 15 view .LVU1990 6200 .LBE504: + ARM GAS /tmp/ccyYWdjY.s page 477 + + 6201 .LBE503: -2763:Src/main.c **** } - ARM GAS /tmp/ccfIOqv2.s page 477 - - - 6202 .loc 1 2763 5 is_stmt 1 view .LVU1991 -2763:Src/main.c **** } - 6203 .loc 1 2763 8 is_stmt 0 view .LVU1992 +2765:Src/main.c **** } + 6202 .loc 1 2765 5 is_stmt 1 view .LVU1991 +2765:Src/main.c **** } + 6203 .loc 1 2765 8 is_stmt 0 view .LVU1992 6204 001c 0132 adds r2, r2, #1 6205 .LVL521: -2763:Src/main.c **** } - 6206 .loc 1 2763 8 view .LVU1993 +2765:Src/main.c **** } + 6206 .loc 1 2765 8 view .LVU1993 6207 001e 92B2 uxth r2, r2 6208 .LVL522: 6209 .L269: -2759:Src/main.c **** { - 6210 .loc 1 2759 13 is_stmt 1 view .LVU1994 +2761:Src/main.c **** { + 6210 .loc 1 2761 13 is_stmt 1 view .LVU1994 6211 0020 6245 cmp r2, ip 6212 0022 F1D3 bcc .L271 -2765:Src/main.c **** - 6213 .loc 1 2765 1 is_stmt 0 view .LVU1995 +2767:Src/main.c **** + 6213 .loc 1 2767 1 is_stmt 0 view .LVU1995 6214 0024 7047 bx lr 6215 .L274: 6216 0026 00BF .align 2 @@ -28592,35 +28594,35 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6227 .thumb_func 6229 USART_TX_DMA: 6230 .LFB1222: -2768:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter - 6231 .loc 1 2768 1 is_stmt 1 view -0 +2770:Src/main.c **** while (u_tx_flg) {}//Wait until previous transfer not complete. u_tx_flg is resetting in DMA inter + 6231 .loc 1 2770 1 is_stmt 1 view -0 6232 .cfi_startproc 6233 @ args = 0, pretend = 0, frame = 0 6234 @ frame_needed = 0, uses_anonymous_args = 0 6235 @ link register save eliminated. 6236 .LVL523: 6237 .L276: -2769:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 6238 .loc 1 2769 20 discriminator 1 view .LVU1997 -2769:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); - 6239 .loc 1 2769 9 discriminator 1 view .LVU1998 +2771:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 6238 .loc 1 2771 20 discriminator 1 view .LVU1997 +2771:Src/main.c **** LL_DMA_DisableStream(DMA2, LL_DMA_STREAM_7); + 6239 .loc 1 2771 9 discriminator 1 view .LVU1998 6240 0000 0D4B ldr r3, .L277 6241 0002 1B78 ldrb r3, [r3] @ zero_extendqisi2 6242 0004 002B cmp r3, #0 6243 0006 FBD1 bne .L276 -2770:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); - 6244 .loc 1 2770 2 view .LVU1999 +2772:Src/main.c **** LL_DMA_SetDataLength(DMA2, LL_DMA_STREAM_7, sz); + 6244 .loc 1 2772 2 view .LVU1999 6245 .LVL524: 6246 .LBB505: 6247 .LBI505: 517:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 6248 .loc 6 517 22 view .LVU2000 6249 .LBB506: + ARM GAS /tmp/ccyYWdjY.s page 478 + + 519:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 6250 .loc 6 519 3 view .LVU2001 - ARM GAS /tmp/ccfIOqv2.s page 478 - - 6251 0008 0C4B ldr r3, .L277+4 6252 000a D3F8B820 ldr r2, [r3, #184] 6253 000e 22F00102 bic r2, r2, #1 @@ -28630,8 +28632,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6256 .loc 6 519 3 is_stmt 0 view .LVU2002 6257 .LBE506: 6258 .LBE505: -2771:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); - 6259 .loc 1 2771 3 is_stmt 1 view .LVU2003 +2773:Src/main.c **** LL_DMA_EnableStream(DMA2, LL_DMA_STREAM_7); + 6259 .loc 1 2773 3 is_stmt 1 view .LVU2003 6260 .LBB507: 6261 .LBI507: 971:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -28651,8 +28653,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6272 .loc 6 973 3 view .LVU2007 6273 .LBE508: 6274 .LBE507: -2772:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin - 6275 .loc 1 2772 3 is_stmt 1 view .LVU2008 +2774:Src/main.c **** u_tx_flg = 1;//indicate that transfer begin + 6275 .loc 1 2774 3 is_stmt 1 view .LVU2008 6276 .LBB509: 6277 .LBI509: 497:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -28668,19 +28670,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6285 .loc 6 499 3 is_stmt 0 view .LVU2011 6286 .LBE510: 6287 .LBE509: -2773:Src/main.c **** } - 6288 .loc 1 2773 2 is_stmt 1 view .LVU2012 -2773:Src/main.c **** } - 6289 .loc 1 2773 11 is_stmt 0 view .LVU2013 +2775:Src/main.c **** } + 6288 .loc 1 2775 2 is_stmt 1 view .LVU2012 +2775:Src/main.c **** } + 6289 .loc 1 2775 11 is_stmt 0 view .LVU2013 6290 0030 014B ldr r3, .L277 6291 0032 0122 movs r2, #1 6292 0034 1A70 strb r2, [r3] -2774:Src/main.c **** - 6293 .loc 1 2774 1 view .LVU2014 +2776:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 479 + + + 6293 .loc 1 2776 1 view .LVU2014 6294 0036 7047 bx lr - ARM GAS /tmp/ccfIOqv2.s page 479 - - 6295 .L278: 6296 .align 2 6297 .L277: @@ -28696,25 +28698,25 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6308 .thumb_func 6310 Error_Handler: 6311 .LFB1224: -2782:Src/main.c **** //------------------------------------------------------- -2783:Src/main.c **** /* USER CODE END 4 */ -2784:Src/main.c **** -2785:Src/main.c **** /** -2786:Src/main.c **** * @brief This function is executed in case of error occurrence. -2787:Src/main.c **** * @retval None -2788:Src/main.c **** */ -2789:Src/main.c **** void Error_Handler(void) -2790:Src/main.c **** { - 6312 .loc 1 2790 1 is_stmt 1 view -0 +2784:Src/main.c **** //------------------------------------------------------- +2785:Src/main.c **** /* USER CODE END 4 */ +2786:Src/main.c **** +2787:Src/main.c **** /** +2788:Src/main.c **** * @brief This function is executed in case of error occurrence. +2789:Src/main.c **** * @retval None +2790:Src/main.c **** */ +2791:Src/main.c **** void Error_Handler(void) +2792:Src/main.c **** { + 6312 .loc 1 2792 1 is_stmt 1 view -0 6313 .cfi_startproc 6314 @ Volatile: function does not return. 6315 @ args = 0, pretend = 0, frame = 0 6316 @ frame_needed = 0, uses_anonymous_args = 0 6317 @ link register save eliminated. -2791:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ -2792:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ -2793:Src/main.c **** __disable_irq(); - 6318 .loc 1 2793 3 view .LVU2016 +2793:Src/main.c **** /* USER CODE BEGIN Error_Handler_Debug */ +2794:Src/main.c **** /* User can add his own implementation to report the HAL error return state */ +2795:Src/main.c **** __disable_irq(); + 6318 .loc 1 2795 3 view .LVU2016 6319 .LBB511: 6320 .LBI511: 140:Drivers/CMSIS/Include/cmsis_gcc.h **** { @@ -28731,16 +28733,16 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6330 .L280: 6331 .LBE512: 6332 .LBE511: -2794:Src/main.c **** while (1) - 6333 .loc 1 2794 3 view .LVU2019 -2795:Src/main.c **** { -2796:Src/main.c **** } - 6334 .loc 1 2796 3 view .LVU2020 -2794:Src/main.c **** while (1) - 6335 .loc 1 2794 9 view .LVU2021 - ARM GAS /tmp/ccfIOqv2.s page 480 +2796:Src/main.c **** while (1) + 6333 .loc 1 2796 3 view .LVU2019 +2797:Src/main.c **** { +2798:Src/main.c **** } + 6334 .loc 1 2798 3 view .LVU2020 + ARM GAS /tmp/ccyYWdjY.s page 480 +2796:Src/main.c **** while (1) + 6335 .loc 1 2796 9 view .LVU2021 6336 0002 FEE7 b .L280 6337 .cfi_endproc 6338 .LFE1224: @@ -28751,8 +28753,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6344 .thumb_func 6346 MX_ADC1_Init: 6347 .LFB1188: - 856:Src/main.c **** - 6348 .loc 1 856 1 view -0 + 858:Src/main.c **** + 6348 .loc 1 858 1 view -0 6349 .cfi_startproc 6350 @ args = 0, pretend = 0, frame = 16 6351 @ frame_needed = 0, uses_anonymous_args = 0 @@ -28763,226 +28765,226 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6356 0002 85B0 sub sp, sp, #20 6357 .LCFI51: 6358 .cfi_def_cfa_offset 24 - 862:Src/main.c **** - 6359 .loc 1 862 3 view .LVU2023 - 862:Src/main.c **** - 6360 .loc 1 862 26 is_stmt 0 view .LVU2024 + 864:Src/main.c **** + 6359 .loc 1 864 3 view .LVU2023 + 864:Src/main.c **** + 6360 .loc 1 864 26 is_stmt 0 view .LVU2024 6361 0004 0023 movs r3, #0 6362 0006 0093 str r3, [sp] 6363 0008 0193 str r3, [sp, #4] 6364 000a 0293 str r3, [sp, #8] 6365 000c 0393 str r3, [sp, #12] - 870:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6366 .loc 1 870 3 is_stmt 1 view .LVU2025 - 870:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6367 .loc 1 870 18 is_stmt 0 view .LVU2026 + 872:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 6366 .loc 1 872 3 is_stmt 1 view .LVU2025 + 872:Src/main.c **** hadc1.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 6367 .loc 1 872 18 is_stmt 0 view .LVU2026 6368 000e 2B48 ldr r0, .L295 6369 0010 2B4A ldr r2, .L295+4 6370 0012 0260 str r2, [r0] - 871:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 6371 .loc 1 871 3 is_stmt 1 view .LVU2027 - 871:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; - 6372 .loc 1 871 29 is_stmt 0 view .LVU2028 + 873:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 6371 .loc 1 873 3 is_stmt 1 view .LVU2027 + 873:Src/main.c **** hadc1.Init.Resolution = ADC_RESOLUTION_12B; + 6372 .loc 1 873 29 is_stmt 0 view .LVU2028 6373 0014 4FF44032 mov r2, #196608 6374 0018 4260 str r2, [r0, #4] - 872:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 6375 .loc 1 872 3 is_stmt 1 view .LVU2029 - 872:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; - 6376 .loc 1 872 25 is_stmt 0 view .LVU2030 + 874:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 6375 .loc 1 874 3 is_stmt 1 view .LVU2029 + 874:Src/main.c **** hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE; + 6376 .loc 1 874 25 is_stmt 0 view .LVU2030 6377 001a 8360 str r3, [r0, #8] - 873:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 6378 .loc 1 873 3 is_stmt 1 view .LVU2031 - 873:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; - 6379 .loc 1 873 27 is_stmt 0 view .LVU2032 + 875:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 6378 .loc 1 875 3 is_stmt 1 view .LVU2031 + 875:Src/main.c **** hadc1.Init.ContinuousConvMode = DISABLE; + 6379 .loc 1 875 27 is_stmt 0 view .LVU2032 6380 001c 0122 movs r2, #1 6381 001e 0261 str r2, [r0, #16] - 874:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 6382 .loc 1 874 3 is_stmt 1 view .LVU2033 - ARM GAS /tmp/ccfIOqv2.s page 481 + ARM GAS /tmp/ccyYWdjY.s page 481 - 874:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; - 6383 .loc 1 874 33 is_stmt 0 view .LVU2034 + 876:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 6382 .loc 1 876 3 is_stmt 1 view .LVU2033 + 876:Src/main.c **** hadc1.Init.DiscontinuousConvMode = DISABLE; + 6383 .loc 1 876 33 is_stmt 0 view .LVU2034 6384 0020 8361 str r3, [r0, #24] - 875:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6385 .loc 1 875 3 is_stmt 1 view .LVU2035 - 875:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6386 .loc 1 875 36 is_stmt 0 view .LVU2036 + 877:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 6385 .loc 1 877 3 is_stmt 1 view .LVU2035 + 877:Src/main.c **** hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 6386 .loc 1 877 36 is_stmt 0 view .LVU2036 6387 0022 80F82030 strb r3, [r0, #32] - 876:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6388 .loc 1 876 3 is_stmt 1 view .LVU2037 - 876:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6389 .loc 1 876 35 is_stmt 0 view .LVU2038 + 878:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 6388 .loc 1 878 3 is_stmt 1 view .LVU2037 + 878:Src/main.c **** hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 6389 .loc 1 878 35 is_stmt 0 view .LVU2038 6390 0026 C362 str r3, [r0, #44] - 877:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6391 .loc 1 877 3 is_stmt 1 view .LVU2039 - 877:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6392 .loc 1 877 31 is_stmt 0 view .LVU2040 + 879:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 6391 .loc 1 879 3 is_stmt 1 view .LVU2039 + 879:Src/main.c **** hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 6392 .loc 1 879 31 is_stmt 0 view .LVU2040 6393 0028 2649 ldr r1, .L295+8 6394 002a 8162 str r1, [r0, #40] - 878:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 6395 .loc 1 878 3 is_stmt 1 view .LVU2041 - 878:Src/main.c **** hadc1.Init.NbrOfConversion = 5; - 6396 .loc 1 878 24 is_stmt 0 view .LVU2042 + 880:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 6395 .loc 1 880 3 is_stmt 1 view .LVU2041 + 880:Src/main.c **** hadc1.Init.NbrOfConversion = 5; + 6396 .loc 1 880 24 is_stmt 0 view .LVU2042 6397 002c C360 str r3, [r0, #12] - 879:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 6398 .loc 1 879 3 is_stmt 1 view .LVU2043 - 879:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; - 6399 .loc 1 879 30 is_stmt 0 view .LVU2044 + 881:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 6398 .loc 1 881 3 is_stmt 1 view .LVU2043 + 881:Src/main.c **** hadc1.Init.DMAContinuousRequests = DISABLE; + 6399 .loc 1 881 30 is_stmt 0 view .LVU2044 6400 002e 0521 movs r1, #5 6401 0030 C161 str r1, [r0, #28] - 880:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6402 .loc 1 880 3 is_stmt 1 view .LVU2045 - 880:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6403 .loc 1 880 36 is_stmt 0 view .LVU2046 + 882:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 6402 .loc 1 882 3 is_stmt 1 view .LVU2045 + 882:Src/main.c **** hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 6403 .loc 1 882 36 is_stmt 0 view .LVU2046 6404 0032 80F83030 strb r3, [r0, #48] - 881:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 6405 .loc 1 881 3 is_stmt 1 view .LVU2047 - 881:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) - 6406 .loc 1 881 27 is_stmt 0 view .LVU2048 + 883:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 6405 .loc 1 883 3 is_stmt 1 view .LVU2047 + 883:Src/main.c **** if (HAL_ADC_Init(&hadc1) != HAL_OK) + 6406 .loc 1 883 27 is_stmt 0 view .LVU2048 6407 0036 4261 str r2, [r0, #20] - 882:Src/main.c **** { - 6408 .loc 1 882 3 is_stmt 1 view .LVU2049 - 882:Src/main.c **** { - 6409 .loc 1 882 7 is_stmt 0 view .LVU2050 + 884:Src/main.c **** { + 6408 .loc 1 884 3 is_stmt 1 view .LVU2049 + 884:Src/main.c **** { + 6409 .loc 1 884 7 is_stmt 0 view .LVU2050 6410 0038 FFF7FEFF bl HAL_ADC_Init 6411 .LVL529: - 882:Src/main.c **** { - 6412 .loc 1 882 6 discriminator 1 view .LVU2051 + 884:Src/main.c **** { + 6412 .loc 1 884 6 discriminator 1 view .LVU2051 6413 003c 0028 cmp r0, #0 6414 003e 31D1 bne .L289 - 889:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6415 .loc 1 889 3 is_stmt 1 view .LVU2052 - 889:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6416 .loc 1 889 19 is_stmt 0 view .LVU2053 + 891:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 6415 .loc 1 891 3 is_stmt 1 view .LVU2052 + 891:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 6416 .loc 1 891 19 is_stmt 0 view .LVU2053 6417 0040 0923 movs r3, #9 + ARM GAS /tmp/ccyYWdjY.s page 482 + + 6418 0042 0093 str r3, [sp] - 890:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - ARM GAS /tmp/ccfIOqv2.s page 482 - - - 6419 .loc 1 890 3 is_stmt 1 view .LVU2054 - 890:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6420 .loc 1 890 16 is_stmt 0 view .LVU2055 + 892:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 6419 .loc 1 892 3 is_stmt 1 view .LVU2054 + 892:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 6420 .loc 1 892 16 is_stmt 0 view .LVU2055 6421 0044 0123 movs r3, #1 6422 0046 0193 str r3, [sp, #4] - 891:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6423 .loc 1 891 3 is_stmt 1 view .LVU2056 - 891:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6424 .loc 1 891 24 is_stmt 0 view .LVU2057 + 893:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6423 .loc 1 893 3 is_stmt 1 view .LVU2056 + 893:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6424 .loc 1 893 24 is_stmt 0 view .LVU2057 6425 0048 0723 movs r3, #7 6426 004a 0293 str r3, [sp, #8] - 892:Src/main.c **** { - 6427 .loc 1 892 3 is_stmt 1 view .LVU2058 - 892:Src/main.c **** { - 6428 .loc 1 892 7 is_stmt 0 view .LVU2059 + 894:Src/main.c **** { + 6427 .loc 1 894 3 is_stmt 1 view .LVU2058 + 894:Src/main.c **** { + 6428 .loc 1 894 7 is_stmt 0 view .LVU2059 6429 004c 6946 mov r1, sp 6430 004e 1B48 ldr r0, .L295 6431 0050 FFF7FEFF bl HAL_ADC_ConfigChannel 6432 .LVL530: - 892:Src/main.c **** { - 6433 .loc 1 892 6 discriminator 1 view .LVU2060 + 894:Src/main.c **** { + 6433 .loc 1 894 6 discriminator 1 view .LVU2060 6434 0054 40BB cbnz r0, .L290 - 899:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 6435 .loc 1 899 3 is_stmt 1 view .LVU2061 - 899:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; - 6436 .loc 1 899 19 is_stmt 0 view .LVU2062 + 901:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 6435 .loc 1 901 3 is_stmt 1 view .LVU2061 + 901:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_2; + 6436 .loc 1 901 19 is_stmt 0 view .LVU2062 6437 0056 0823 movs r3, #8 6438 0058 0093 str r3, [sp] - 900:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6439 .loc 1 900 3 is_stmt 1 view .LVU2063 - 900:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6440 .loc 1 900 16 is_stmt 0 view .LVU2064 + 902:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6439 .loc 1 902 3 is_stmt 1 view .LVU2063 + 902:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6440 .loc 1 902 16 is_stmt 0 view .LVU2064 6441 005a 0223 movs r3, #2 6442 005c 0193 str r3, [sp, #4] - 901:Src/main.c **** { - 6443 .loc 1 901 3 is_stmt 1 view .LVU2065 - 901:Src/main.c **** { - 6444 .loc 1 901 7 is_stmt 0 view .LVU2066 + 903:Src/main.c **** { + 6443 .loc 1 903 3 is_stmt 1 view .LVU2065 + 903:Src/main.c **** { + 6444 .loc 1 903 7 is_stmt 0 view .LVU2066 6445 005e 6946 mov r1, sp 6446 0060 1648 ldr r0, .L295 6447 0062 FFF7FEFF bl HAL_ADC_ConfigChannel 6448 .LVL531: - 901:Src/main.c **** { - 6449 .loc 1 901 6 discriminator 1 view .LVU2067 + 903:Src/main.c **** { + 6449 .loc 1 903 6 discriminator 1 view .LVU2067 6450 0066 08BB cbnz r0, .L291 - 908:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 6451 .loc 1 908 3 is_stmt 1 view .LVU2068 - 908:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; - 6452 .loc 1 908 19 is_stmt 0 view .LVU2069 + 910:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 6451 .loc 1 910 3 is_stmt 1 view .LVU2068 + 910:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_3; + 6452 .loc 1 910 19 is_stmt 0 view .LVU2069 6453 0068 0223 movs r3, #2 6454 006a 0093 str r3, [sp] - 909:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6455 .loc 1 909 3 is_stmt 1 view .LVU2070 - 909:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6456 .loc 1 909 16 is_stmt 0 view .LVU2071 + 911:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6455 .loc 1 911 3 is_stmt 1 view .LVU2070 + 911:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6456 .loc 1 911 16 is_stmt 0 view .LVU2071 + ARM GAS /tmp/ccyYWdjY.s page 483 + + 6457 006c 0323 movs r3, #3 6458 006e 0193 str r3, [sp, #4] - ARM GAS /tmp/ccfIOqv2.s page 483 - - - 910:Src/main.c **** { - 6459 .loc 1 910 3 is_stmt 1 view .LVU2072 - 910:Src/main.c **** { - 6460 .loc 1 910 7 is_stmt 0 view .LVU2073 + 912:Src/main.c **** { + 6459 .loc 1 912 3 is_stmt 1 view .LVU2072 + 912:Src/main.c **** { + 6460 .loc 1 912 7 is_stmt 0 view .LVU2073 6461 0070 6946 mov r1, sp 6462 0072 1248 ldr r0, .L295 6463 0074 FFF7FEFF bl HAL_ADC_ConfigChannel 6464 .LVL532: - 910:Src/main.c **** { - 6465 .loc 1 910 6 discriminator 1 view .LVU2074 + 912:Src/main.c **** { + 6465 .loc 1 912 6 discriminator 1 view .LVU2074 6466 0078 D0B9 cbnz r0, .L292 - 917:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 6467 .loc 1 917 3 is_stmt 1 view .LVU2075 - 917:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; - 6468 .loc 1 917 19 is_stmt 0 view .LVU2076 + 919:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 6467 .loc 1 919 3 is_stmt 1 view .LVU2075 + 919:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_4; + 6468 .loc 1 919 19 is_stmt 0 view .LVU2076 6469 007a 0A23 movs r3, #10 6470 007c 0093 str r3, [sp] - 918:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6471 .loc 1 918 3 is_stmt 1 view .LVU2077 - 918:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6472 .loc 1 918 16 is_stmt 0 view .LVU2078 + 920:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6471 .loc 1 920 3 is_stmt 1 view .LVU2077 + 920:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6472 .loc 1 920 16 is_stmt 0 view .LVU2078 6473 007e 0423 movs r3, #4 6474 0080 0193 str r3, [sp, #4] - 919:Src/main.c **** { - 6475 .loc 1 919 3 is_stmt 1 view .LVU2079 - 919:Src/main.c **** { - 6476 .loc 1 919 7 is_stmt 0 view .LVU2080 + 921:Src/main.c **** { + 6475 .loc 1 921 3 is_stmt 1 view .LVU2079 + 921:Src/main.c **** { + 6476 .loc 1 921 7 is_stmt 0 view .LVU2080 6477 0082 6946 mov r1, sp 6478 0084 0D48 ldr r0, .L295 6479 0086 FFF7FEFF bl HAL_ADC_ConfigChannel 6480 .LVL533: - 919:Src/main.c **** { - 6481 .loc 1 919 6 discriminator 1 view .LVU2081 + 921:Src/main.c **** { + 6481 .loc 1 921 6 discriminator 1 view .LVU2081 6482 008a 98B9 cbnz r0, .L293 - 926:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 6483 .loc 1 926 3 is_stmt 1 view .LVU2082 - 926:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; - 6484 .loc 1 926 19 is_stmt 0 view .LVU2083 + 928:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 6483 .loc 1 928 3 is_stmt 1 view .LVU2082 + 928:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_5; + 6484 .loc 1 928 19 is_stmt 0 view .LVU2083 6485 008c 0B23 movs r3, #11 6486 008e 0093 str r3, [sp] - 927:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6487 .loc 1 927 3 is_stmt 1 view .LVU2084 - 927:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) - 6488 .loc 1 927 16 is_stmt 0 view .LVU2085 + 929:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6487 .loc 1 929 3 is_stmt 1 view .LVU2084 + 929:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) + 6488 .loc 1 929 16 is_stmt 0 view .LVU2085 6489 0090 0523 movs r3, #5 6490 0092 0193 str r3, [sp, #4] - 928:Src/main.c **** { - 6491 .loc 1 928 3 is_stmt 1 view .LVU2086 - 928:Src/main.c **** { - 6492 .loc 1 928 7 is_stmt 0 view .LVU2087 + 930:Src/main.c **** { + 6491 .loc 1 930 3 is_stmt 1 view .LVU2086 + 930:Src/main.c **** { + 6492 .loc 1 930 7 is_stmt 0 view .LVU2087 6493 0094 6946 mov r1, sp 6494 0096 0948 ldr r0, .L295 6495 0098 FFF7FEFF bl HAL_ADC_ConfigChannel 6496 .LVL534: - 928:Src/main.c **** { - 6497 .loc 1 928 6 discriminator 1 view .LVU2088 + 930:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 484 + + + 6497 .loc 1 930 6 discriminator 1 view .LVU2088 6498 009c 60B9 cbnz r0, .L294 - ARM GAS /tmp/ccfIOqv2.s page 484 - - - 936:Src/main.c **** - 6499 .loc 1 936 1 view .LVU2089 + 938:Src/main.c **** + 6499 .loc 1 938 1 view .LVU2089 6500 009e 05B0 add sp, sp, #20 6501 .LCFI52: 6502 .cfi_remember_state @@ -28992,33 +28994,33 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6506 .L289: 6507 .LCFI53: 6508 .cfi_restore_state - 884:Src/main.c **** } - 6509 .loc 1 884 5 is_stmt 1 view .LVU2090 + 886:Src/main.c **** } + 6509 .loc 1 886 5 is_stmt 1 view .LVU2090 6510 00a4 FFF7FEFF bl Error_Handler 6511 .LVL535: 6512 .L290: - 894:Src/main.c **** } - 6513 .loc 1 894 5 view .LVU2091 + 896:Src/main.c **** } + 6513 .loc 1 896 5 view .LVU2091 6514 00a8 FFF7FEFF bl Error_Handler 6515 .LVL536: 6516 .L291: - 903:Src/main.c **** } - 6517 .loc 1 903 5 view .LVU2092 + 905:Src/main.c **** } + 6517 .loc 1 905 5 view .LVU2092 6518 00ac FFF7FEFF bl Error_Handler 6519 .LVL537: 6520 .L292: - 912:Src/main.c **** } - 6521 .loc 1 912 5 view .LVU2093 + 914:Src/main.c **** } + 6521 .loc 1 914 5 view .LVU2093 6522 00b0 FFF7FEFF bl Error_Handler 6523 .LVL538: 6524 .L293: - 921:Src/main.c **** } - 6525 .loc 1 921 5 view .LVU2094 + 923:Src/main.c **** } + 6525 .loc 1 923 5 view .LVU2094 6526 00b4 FFF7FEFF bl Error_Handler 6527 .LVL539: 6528 .L294: - 930:Src/main.c **** } - 6529 .loc 1 930 5 view .LVU2095 + 932:Src/main.c **** } + 6529 .loc 1 932 5 view .LVU2095 6530 00b8 FFF7FEFF bl Error_Handler 6531 .LVL540: 6532 .L296: @@ -29036,11 +29038,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6545 .thumb_func 6547 MX_ADC3_Init: 6548 .LFB1189: - 944:Src/main.c **** - 6549 .loc 1 944 1 view -0 - ARM GAS /tmp/ccfIOqv2.s page 485 + ARM GAS /tmp/ccyYWdjY.s page 485 + 946:Src/main.c **** + 6549 .loc 1 946 1 view -0 6550 .cfi_startproc 6551 @ args = 0, pretend = 0, frame = 16 6552 @ frame_needed = 0, uses_anonymous_args = 0 @@ -29051,126 +29053,126 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6557 0002 85B0 sub sp, sp, #20 6558 .LCFI55: 6559 .cfi_def_cfa_offset 24 - 950:Src/main.c **** - 6560 .loc 1 950 3 view .LVU2097 - 950:Src/main.c **** - 6561 .loc 1 950 26 is_stmt 0 view .LVU2098 + 952:Src/main.c **** + 6560 .loc 1 952 3 view .LVU2097 + 952:Src/main.c **** + 6561 .loc 1 952 26 is_stmt 0 view .LVU2098 6562 0004 0023 movs r3, #0 6563 0006 0093 str r3, [sp] 6564 0008 0193 str r3, [sp, #4] 6565 000a 0293 str r3, [sp, #8] 6566 000c 0393 str r3, [sp, #12] - 958:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6567 .loc 1 958 3 is_stmt 1 view .LVU2099 - 958:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; - 6568 .loc 1 958 18 is_stmt 0 view .LVU2100 + 960:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 6567 .loc 1 960 3 is_stmt 1 view .LVU2099 + 960:Src/main.c **** hadc3.Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV8; + 6568 .loc 1 960 18 is_stmt 0 view .LVU2100 6569 000e 1448 ldr r0, .L303 6570 0010 144A ldr r2, .L303+4 6571 0012 0260 str r2, [r0] - 959:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 6572 .loc 1 959 3 is_stmt 1 view .LVU2101 - 959:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; - 6573 .loc 1 959 29 is_stmt 0 view .LVU2102 + 961:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 6572 .loc 1 961 3 is_stmt 1 view .LVU2101 + 961:Src/main.c **** hadc3.Init.Resolution = ADC_RESOLUTION_12B; + 6573 .loc 1 961 29 is_stmt 0 view .LVU2102 6574 0014 4FF44032 mov r2, #196608 6575 0018 4260 str r2, [r0, #4] - 960:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 6576 .loc 1 960 3 is_stmt 1 view .LVU2103 - 960:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; - 6577 .loc 1 960 25 is_stmt 0 view .LVU2104 + 962:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 6576 .loc 1 962 3 is_stmt 1 view .LVU2103 + 962:Src/main.c **** hadc3.Init.ScanConvMode = ADC_SCAN_DISABLE; + 6577 .loc 1 962 25 is_stmt 0 view .LVU2104 6578 001a 8360 str r3, [r0, #8] - 961:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 6579 .loc 1 961 3 is_stmt 1 view .LVU2105 - 961:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; - 6580 .loc 1 961 27 is_stmt 0 view .LVU2106 + 963:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 6579 .loc 1 963 3 is_stmt 1 view .LVU2105 + 963:Src/main.c **** hadc3.Init.ContinuousConvMode = DISABLE; + 6580 .loc 1 963 27 is_stmt 0 view .LVU2106 6581 001c 0361 str r3, [r0, #16] - 962:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 6582 .loc 1 962 3 is_stmt 1 view .LVU2107 - 962:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; - 6583 .loc 1 962 33 is_stmt 0 view .LVU2108 + 964:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 6582 .loc 1 964 3 is_stmt 1 view .LVU2107 + 964:Src/main.c **** hadc3.Init.DiscontinuousConvMode = DISABLE; + 6583 .loc 1 964 33 is_stmt 0 view .LVU2108 6584 001e 8361 str r3, [r0, #24] - 963:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6585 .loc 1 963 3 is_stmt 1 view .LVU2109 - 963:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; - 6586 .loc 1 963 36 is_stmt 0 view .LVU2110 + 965:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 6585 .loc 1 965 3 is_stmt 1 view .LVU2109 + 965:Src/main.c **** hadc3.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE; + 6586 .loc 1 965 36 is_stmt 0 view .LVU2110 6587 0020 80F82030 strb r3, [r0, #32] - 964:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6588 .loc 1 964 3 is_stmt 1 view .LVU2111 - 964:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; - 6589 .loc 1 964 35 is_stmt 0 view .LVU2112 + 966:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + 6588 .loc 1 966 3 is_stmt 1 view .LVU2111 + 966:Src/main.c **** hadc3.Init.ExternalTrigConv = ADC_SOFTWARE_START; + ARM GAS /tmp/ccyYWdjY.s page 486 + + + 6589 .loc 1 966 35 is_stmt 0 view .LVU2112 6590 0024 C362 str r3, [r0, #44] - ARM GAS /tmp/ccfIOqv2.s page 486 - - - 965:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6591 .loc 1 965 3 is_stmt 1 view .LVU2113 - 965:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; - 6592 .loc 1 965 31 is_stmt 0 view .LVU2114 + 967:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 6591 .loc 1 967 3 is_stmt 1 view .LVU2113 + 967:Src/main.c **** hadc3.Init.DataAlign = ADC_DATAALIGN_RIGHT; + 6592 .loc 1 967 31 is_stmt 0 view .LVU2114 6593 0026 104A ldr r2, .L303+8 6594 0028 8262 str r2, [r0, #40] - 966:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 6595 .loc 1 966 3 is_stmt 1 view .LVU2115 - 966:Src/main.c **** hadc3.Init.NbrOfConversion = 1; - 6596 .loc 1 966 24 is_stmt 0 view .LVU2116 + 968:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 6595 .loc 1 968 3 is_stmt 1 view .LVU2115 + 968:Src/main.c **** hadc3.Init.NbrOfConversion = 1; + 6596 .loc 1 968 24 is_stmt 0 view .LVU2116 6597 002a C360 str r3, [r0, #12] - 967:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 6598 .loc 1 967 3 is_stmt 1 view .LVU2117 - 967:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; - 6599 .loc 1 967 30 is_stmt 0 view .LVU2118 + 969:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 6598 .loc 1 969 3 is_stmt 1 view .LVU2117 + 969:Src/main.c **** hadc3.Init.DMAContinuousRequests = DISABLE; + 6599 .loc 1 969 30 is_stmt 0 view .LVU2118 6600 002c 0122 movs r2, #1 6601 002e C261 str r2, [r0, #28] - 968:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6602 .loc 1 968 3 is_stmt 1 view .LVU2119 - 968:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; - 6603 .loc 1 968 36 is_stmt 0 view .LVU2120 + 970:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 6602 .loc 1 970 3 is_stmt 1 view .LVU2119 + 970:Src/main.c **** hadc3.Init.EOCSelection = ADC_EOC_SINGLE_CONV; + 6603 .loc 1 970 36 is_stmt 0 view .LVU2120 6604 0030 80F83030 strb r3, [r0, #48] - 969:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 6605 .loc 1 969 3 is_stmt 1 view .LVU2121 - 969:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) - 6606 .loc 1 969 27 is_stmt 0 view .LVU2122 + 971:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 6605 .loc 1 971 3 is_stmt 1 view .LVU2121 + 971:Src/main.c **** if (HAL_ADC_Init(&hadc3) != HAL_OK) + 6606 .loc 1 971 27 is_stmt 0 view .LVU2122 6607 0034 4261 str r2, [r0, #20] - 970:Src/main.c **** { - 6608 .loc 1 970 3 is_stmt 1 view .LVU2123 - 970:Src/main.c **** { - 6609 .loc 1 970 7 is_stmt 0 view .LVU2124 + 972:Src/main.c **** { + 6608 .loc 1 972 3 is_stmt 1 view .LVU2123 + 972:Src/main.c **** { + 6609 .loc 1 972 7 is_stmt 0 view .LVU2124 6610 0036 FFF7FEFF bl HAL_ADC_Init 6611 .LVL541: - 970:Src/main.c **** { - 6612 .loc 1 970 6 discriminator 1 view .LVU2125 + 972:Src/main.c **** { + 6612 .loc 1 972 6 discriminator 1 view .LVU2125 6613 003a 68B9 cbnz r0, .L301 - 977:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6614 .loc 1 977 3 is_stmt 1 view .LVU2126 - 977:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; - 6615 .loc 1 977 19 is_stmt 0 view .LVU2127 + 979:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 6614 .loc 1 979 3 is_stmt 1 view .LVU2126 + 979:Src/main.c **** sConfig.Rank = ADC_REGULAR_RANK_1; + 6615 .loc 1 979 19 is_stmt 0 view .LVU2127 6616 003c 0F23 movs r3, #15 6617 003e 0093 str r3, [sp] - 978:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6618 .loc 1 978 3 is_stmt 1 view .LVU2128 - 978:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; - 6619 .loc 1 978 16 is_stmt 0 view .LVU2129 + 980:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 6618 .loc 1 980 3 is_stmt 1 view .LVU2128 + 980:Src/main.c **** sConfig.SamplingTime = ADC_SAMPLETIME_480CYCLES; + 6619 .loc 1 980 16 is_stmt 0 view .LVU2129 6620 0040 0123 movs r3, #1 6621 0042 0193 str r3, [sp, #4] - 979:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 6622 .loc 1 979 3 is_stmt 1 view .LVU2130 - 979:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) - 6623 .loc 1 979 24 is_stmt 0 view .LVU2131 + 981:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 6622 .loc 1 981 3 is_stmt 1 view .LVU2130 + 981:Src/main.c **** if (HAL_ADC_ConfigChannel(&hadc3, &sConfig) != HAL_OK) + 6623 .loc 1 981 24 is_stmt 0 view .LVU2131 6624 0044 0723 movs r3, #7 6625 0046 0293 str r3, [sp, #8] - 980:Src/main.c **** { - 6626 .loc 1 980 3 is_stmt 1 view .LVU2132 - 980:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 487 + 982:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 487 - 6627 .loc 1 980 7 is_stmt 0 view .LVU2133 + 6626 .loc 1 982 3 is_stmt 1 view .LVU2132 + 982:Src/main.c **** { + 6627 .loc 1 982 7 is_stmt 0 view .LVU2133 6628 0048 6946 mov r1, sp 6629 004a 0548 ldr r0, .L303 6630 004c FFF7FEFF bl HAL_ADC_ConfigChannel 6631 .LVL542: - 980:Src/main.c **** { - 6632 .loc 1 980 6 discriminator 1 view .LVU2134 + 982:Src/main.c **** { + 6632 .loc 1 982 6 discriminator 1 view .LVU2134 6633 0050 20B9 cbnz r0, .L302 - 988:Src/main.c **** - 6634 .loc 1 988 1 view .LVU2135 + 990:Src/main.c **** + 6634 .loc 1 990 1 view .LVU2135 6635 0052 05B0 add sp, sp, #20 6636 .LCFI56: 6637 .cfi_remember_state @@ -29180,13 +29182,13 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6641 .L301: 6642 .LCFI57: 6643 .cfi_restore_state - 972:Src/main.c **** } - 6644 .loc 1 972 5 is_stmt 1 view .LVU2136 + 974:Src/main.c **** } + 6644 .loc 1 974 5 is_stmt 1 view .LVU2136 6645 0058 FFF7FEFF bl Error_Handler 6646 .LVL543: 6647 .L302: - 982:Src/main.c **** } - 6648 .loc 1 982 5 view .LVU2137 + 984:Src/main.c **** } + 6648 .loc 1 984 5 view .LVU2137 6649 005c FFF7FEFF bl Error_Handler 6650 .LVL544: 6651 .L304: @@ -29204,8 +29206,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6664 .thumb_func 6666 MX_USART1_UART_Init: 6667 .LFB1204: -1646:Src/main.c **** - 6668 .loc 1 1646 1 view -0 +1648:Src/main.c **** + 6668 .loc 1 1648 1 view -0 6669 .cfi_startproc 6670 @ args = 0, pretend = 0, frame = 208 6671 @ frame_needed = 0, uses_anonymous_args = 0 @@ -29216,18 +29218,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6676 .cfi_offset 5, -20 6677 .cfi_offset 6, -16 6678 .cfi_offset 7, -12 + ARM GAS /tmp/ccyYWdjY.s page 488 + + 6679 .cfi_offset 8, -8 6680 .cfi_offset 14, -4 - ARM GAS /tmp/ccfIOqv2.s page 488 - - 6681 0004 B4B0 sub sp, sp, #208 6682 .LCFI59: 6683 .cfi_def_cfa_offset 232 -1652:Src/main.c **** - 6684 .loc 1 1652 3 view .LVU2139 -1652:Src/main.c **** - 6685 .loc 1 1652 24 is_stmt 0 view .LVU2140 +1654:Src/main.c **** + 6684 .loc 1 1654 3 view .LVU2139 +1654:Src/main.c **** + 6685 .loc 1 1654 24 is_stmt 0 view .LVU2140 6686 0006 0021 movs r1, #0 6687 0008 2D91 str r1, [sp, #180] 6688 000a 2E91 str r1, [sp, #184] @@ -29236,51 +29238,51 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6691 0010 3191 str r1, [sp, #196] 6692 0012 3291 str r1, [sp, #200] 6693 0014 3391 str r1, [sp, #204] -1654:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 6694 .loc 1 1654 3 is_stmt 1 view .LVU2141 -1654:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; - 6695 .loc 1 1654 23 is_stmt 0 view .LVU2142 +1656:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 6694 .loc 1 1656 3 is_stmt 1 view .LVU2141 +1656:Src/main.c **** RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; + 6695 .loc 1 1656 23 is_stmt 0 view .LVU2142 6696 0016 2791 str r1, [sp, #156] 6697 0018 2891 str r1, [sp, #160] 6698 001a 2991 str r1, [sp, #164] 6699 001c 2A91 str r1, [sp, #168] 6700 001e 2B91 str r1, [sp, #172] 6701 0020 2C91 str r1, [sp, #176] -1655:Src/main.c **** - 6702 .loc 1 1655 3 is_stmt 1 view .LVU2143 -1655:Src/main.c **** - 6703 .loc 1 1655 28 is_stmt 0 view .LVU2144 +1657:Src/main.c **** + 6702 .loc 1 1657 3 is_stmt 1 view .LVU2143 +1657:Src/main.c **** + 6703 .loc 1 1657 28 is_stmt 0 view .LVU2144 6704 0022 9022 movs r2, #144 6705 0024 03A8 add r0, sp, #12 6706 0026 FFF7FEFF bl memset 6707 .LVL545: -1659:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 6708 .loc 1 1659 3 is_stmt 1 view .LVU2145 -1659:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; - 6709 .loc 1 1659 44 is_stmt 0 view .LVU2146 +1661:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 6708 .loc 1 1661 3 is_stmt 1 view .LVU2145 +1661:Src/main.c **** PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2; + 6709 .loc 1 1661 44 is_stmt 0 view .LVU2146 6710 002a 4023 movs r3, #64 6711 002c 0393 str r3, [sp, #12] -1660:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) - 6712 .loc 1 1660 3 is_stmt 1 view .LVU2147 -1661:Src/main.c **** { - 6713 .loc 1 1661 3 view .LVU2148 -1661:Src/main.c **** { - 6714 .loc 1 1661 7 is_stmt 0 view .LVU2149 +1662:Src/main.c **** if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) + 6712 .loc 1 1662 3 is_stmt 1 view .LVU2147 +1663:Src/main.c **** { + 6713 .loc 1 1663 3 view .LVU2148 +1663:Src/main.c **** { + 6714 .loc 1 1663 7 is_stmt 0 view .LVU2149 6715 002e 03A8 add r0, sp, #12 6716 0030 FFF7FEFF bl HAL_RCCEx_PeriphCLKConfig 6717 .LVL546: -1661:Src/main.c **** { - 6718 .loc 1 1661 6 discriminator 1 view .LVU2150 +1663:Src/main.c **** { + 6718 .loc 1 1663 6 discriminator 1 view .LVU2150 6719 0034 0028 cmp r0, #0 6720 0036 40F09E80 bne .L308 -1667:Src/main.c **** - 6721 .loc 1 1667 3 is_stmt 1 view .LVU2151 +1669:Src/main.c **** + 6721 .loc 1 1669 3 is_stmt 1 view .LVU2151 6722 .LVL547: + ARM GAS /tmp/ccyYWdjY.s page 489 + + 6723 .LBB513: 6724 .LBI513: - ARM GAS /tmp/ccfIOqv2.s page 489 - - 1587:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { 6725 .loc 3 1587 22 view .LVU2152 6726 .LBB514: @@ -29307,8 +29309,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6742 .loc 3 1593 3 is_stmt 0 view .LVU2159 6743 .LBE514: 6744 .LBE513: -1669:Src/main.c **** /**USART1 GPIO Configuration - 6745 .loc 1 1669 3 is_stmt 1 view .LVU2160 +1671:Src/main.c **** /**USART1 GPIO Configuration + 6745 .loc 1 1671 3 is_stmt 1 view .LVU2160 6746 .LBB515: 6747 .LBI515: 309:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** { @@ -29336,95 +29338,95 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6763 .LVL549: 315:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_bus.h **** } 6764 .loc 3 315 3 is_stmt 0 view .LVU2168 + ARM GAS /tmp/ccyYWdjY.s page 490 + + 6765 .LBE516: 6766 .LBE515: - ARM GAS /tmp/ccfIOqv2.s page 490 - - -1674:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6767 .loc 1 1674 3 is_stmt 1 view .LVU2169 -1674:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6768 .loc 1 1674 23 is_stmt 0 view .LVU2170 +1676:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 6767 .loc 1 1676 3 is_stmt 1 view .LVU2169 +1676:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 6768 .loc 1 1676 23 is_stmt 0 view .LVU2170 6769 0060 4FF40073 mov r3, #512 6770 0064 2793 str r3, [sp, #156] -1675:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6771 .loc 1 1675 3 is_stmt 1 view .LVU2171 -1675:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6772 .loc 1 1675 24 is_stmt 0 view .LVU2172 +1677:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 6771 .loc 1 1677 3 is_stmt 1 view .LVU2171 +1677:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 6772 .loc 1 1677 24 is_stmt 0 view .LVU2172 6773 0066 4FF00208 mov r8, #2 6774 006a CDF8A080 str r8, [sp, #160] -1676:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6775 .loc 1 1676 3 is_stmt 1 view .LVU2173 -1676:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6776 .loc 1 1676 25 is_stmt 0 view .LVU2174 +1678:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 6775 .loc 1 1678 3 is_stmt 1 view .LVU2173 +1678:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 6776 .loc 1 1678 25 is_stmt 0 view .LVU2174 6777 006e 0327 movs r7, #3 6778 0070 2997 str r7, [sp, #164] -1677:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6779 .loc 1 1677 3 is_stmt 1 view .LVU2175 -1677:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6780 .loc 1 1677 30 is_stmt 0 view .LVU2176 +1679:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 6779 .loc 1 1679 3 is_stmt 1 view .LVU2175 +1679:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 6780 .loc 1 1679 30 is_stmt 0 view .LVU2176 6781 0072 0024 movs r4, #0 6782 0074 2A94 str r4, [sp, #168] -1678:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6783 .loc 1 1678 3 is_stmt 1 view .LVU2177 -1678:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6784 .loc 1 1678 24 is_stmt 0 view .LVU2178 +1680:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 6783 .loc 1 1680 3 is_stmt 1 view .LVU2177 +1680:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 6784 .loc 1 1680 24 is_stmt 0 view .LVU2178 6785 0076 2B94 str r4, [sp, #172] -1679:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6786 .loc 1 1679 3 is_stmt 1 view .LVU2179 -1679:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6787 .loc 1 1679 29 is_stmt 0 view .LVU2180 +1681:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 6786 .loc 1 1681 3 is_stmt 1 view .LVU2179 +1681:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 6787 .loc 1 1681 29 is_stmt 0 view .LVU2180 6788 0078 0726 movs r6, #7 6789 007a 2C96 str r6, [sp, #176] -1680:Src/main.c **** - 6790 .loc 1 1680 3 is_stmt 1 view .LVU2181 +1682:Src/main.c **** + 6790 .loc 1 1682 3 is_stmt 1 view .LVU2181 6791 007c 404D ldr r5, .L309+4 6792 007e 27A9 add r1, sp, #156 6793 0080 2846 mov r0, r5 6794 0082 FFF7FEFF bl LL_GPIO_Init 6795 .LVL550: -1682:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6796 .loc 1 1682 3 view .LVU2182 -1682:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; - 6797 .loc 1 1682 23 is_stmt 0 view .LVU2183 +1684:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 6796 .loc 1 1684 3 view .LVU2182 +1684:Src/main.c **** GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + 6797 .loc 1 1684 23 is_stmt 0 view .LVU2183 6798 0086 4FF48063 mov r3, #1024 6799 008a 2793 str r3, [sp, #156] -1683:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6800 .loc 1 1683 3 is_stmt 1 view .LVU2184 -1683:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; - 6801 .loc 1 1683 24 is_stmt 0 view .LVU2185 +1685:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 6800 .loc 1 1685 3 is_stmt 1 view .LVU2184 +1685:Src/main.c **** GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_VERY_HIGH; + 6801 .loc 1 1685 24 is_stmt 0 view .LVU2185 6802 008c CDF8A080 str r8, [sp, #160] -1684:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6803 .loc 1 1684 3 is_stmt 1 view .LVU2186 -1684:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; - 6804 .loc 1 1684 25 is_stmt 0 view .LVU2187 - ARM GAS /tmp/ccfIOqv2.s page 491 +1686:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 6803 .loc 1 1686 3 is_stmt 1 view .LVU2186 + ARM GAS /tmp/ccyYWdjY.s page 491 +1686:Src/main.c **** GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL; + 6804 .loc 1 1686 25 is_stmt 0 view .LVU2187 6805 0090 2997 str r7, [sp, #164] -1685:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6806 .loc 1 1685 3 is_stmt 1 view .LVU2188 -1685:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; - 6807 .loc 1 1685 30 is_stmt 0 view .LVU2189 +1687:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 6806 .loc 1 1687 3 is_stmt 1 view .LVU2188 +1687:Src/main.c **** GPIO_InitStruct.Pull = LL_GPIO_PULL_NO; + 6807 .loc 1 1687 30 is_stmt 0 view .LVU2189 6808 0092 2A94 str r4, [sp, #168] -1686:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6809 .loc 1 1686 3 is_stmt 1 view .LVU2190 -1686:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; - 6810 .loc 1 1686 24 is_stmt 0 view .LVU2191 +1688:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 6809 .loc 1 1688 3 is_stmt 1 view .LVU2190 +1688:Src/main.c **** GPIO_InitStruct.Alternate = LL_GPIO_AF_7; + 6810 .loc 1 1688 24 is_stmt 0 view .LVU2191 6811 0094 2B94 str r4, [sp, #172] -1687:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6812 .loc 1 1687 3 is_stmt 1 view .LVU2192 -1687:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); - 6813 .loc 1 1687 29 is_stmt 0 view .LVU2193 +1689:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 6812 .loc 1 1689 3 is_stmt 1 view .LVU2192 +1689:Src/main.c **** LL_GPIO_Init(GPIOA, &GPIO_InitStruct); + 6813 .loc 1 1689 29 is_stmt 0 view .LVU2193 6814 0096 2C96 str r6, [sp, #176] -1688:Src/main.c **** - 6815 .loc 1 1688 3 is_stmt 1 view .LVU2194 +1690:Src/main.c **** + 6815 .loc 1 1690 3 is_stmt 1 view .LVU2194 6816 0098 27A9 add r1, sp, #156 6817 009a 2846 mov r0, r5 6818 009c FFF7FEFF bl LL_GPIO_Init 6819 .LVL551: -1693:Src/main.c **** - 6820 .loc 1 1693 3 view .LVU2195 +1695:Src/main.c **** + 6820 .loc 1 1695 3 view .LVU2195 6821 .LBB517: 6822 .LBI517: 1032:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29442,8 +29444,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6832 .loc 6 1034 3 is_stmt 0 view .LVU2198 6833 .LBE518: 6834 .LBE517: -1695:Src/main.c **** - 6835 .loc 1 1695 3 is_stmt 1 view .LVU2199 +1697:Src/main.c **** + 6835 .loc 1 1697 3 is_stmt 1 view .LVU2199 6836 .LBB519: 6837 .LBI519: 598:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29456,15 +29458,15 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6843 00ba 42F04002 orr r2, r2, #64 6844 00be C3F8B820 str r2, [r3, #184] 6845 .LVL553: + ARM GAS /tmp/ccyYWdjY.s page 492 + + 600:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } 6846 .loc 6 600 3 is_stmt 0 view .LVU2202 - ARM GAS /tmp/ccfIOqv2.s page 492 - - 6847 .LBE520: 6848 .LBE519: -1697:Src/main.c **** - 6849 .loc 1 1697 3 is_stmt 1 view .LVU2203 +1699:Src/main.c **** + 6849 .loc 1 1699 3 is_stmt 1 view .LVU2203 6850 .LBB521: 6851 .LBI521: 924:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29480,8 +29482,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6859 .loc 6 926 3 is_stmt 0 view .LVU2206 6860 .LBE522: 6861 .LBE521: -1699:Src/main.c **** - 6862 .loc 1 1699 3 is_stmt 1 view .LVU2207 +1701:Src/main.c **** + 6862 .loc 1 1701 3 is_stmt 1 view .LVU2207 6863 .LBB523: 6864 .LBI523: 646:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29497,8 +29499,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6872 .loc 6 648 3 is_stmt 0 view .LVU2210 6873 .LBE524: 6874 .LBE523: -1701:Src/main.c **** - 6875 .loc 1 1701 3 is_stmt 1 view .LVU2211 +1703:Src/main.c **** + 6875 .loc 1 1703 3 is_stmt 1 view .LVU2211 6876 .LBB525: 6877 .LBI525: 693:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29514,13 +29516,13 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6885 .loc 6 695 3 is_stmt 0 view .LVU2214 6886 .LBE526: 6887 .LBE525: -1703:Src/main.c **** - 6888 .loc 1 1703 3 is_stmt 1 view .LVU2215 +1705:Src/main.c **** + 6888 .loc 1 1705 3 is_stmt 1 view .LVU2215 + ARM GAS /tmp/ccyYWdjY.s page 493 + + 6889 .LBB527: 6890 .LBI527: - ARM GAS /tmp/ccfIOqv2.s page 493 - - 738:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 6891 .loc 6 738 22 view .LVU2216 6892 .LBB528: @@ -29534,8 +29536,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6898 .loc 6 740 3 is_stmt 0 view .LVU2218 6899 .LBE528: 6900 .LBE527: -1705:Src/main.c **** - 6901 .loc 1 1705 3 is_stmt 1 view .LVU2219 +1707:Src/main.c **** + 6901 .loc 1 1707 3 is_stmt 1 view .LVU2219 6902 .LBB529: 6903 .LBI529: 784:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29551,8 +29553,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6911 .loc 6 786 3 is_stmt 0 view .LVU2222 6912 .LBE530: 6913 .LBE529: -1707:Src/main.c **** - 6914 .loc 1 1707 3 is_stmt 1 view .LVU2223 +1709:Src/main.c **** + 6914 .loc 1 1709 3 is_stmt 1 view .LVU2223 6915 .LBB531: 6916 .LBI531: 831:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { @@ -29568,19 +29570,19 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6924 .loc 6 833 3 is_stmt 0 view .LVU2226 6925 .LBE532: 6926 .LBE531: -1709:Src/main.c **** - 6927 .loc 1 1709 3 is_stmt 1 view .LVU2227 +1711:Src/main.c **** + 6927 .loc 1 1711 3 is_stmt 1 view .LVU2227 6928 .LBB533: 6929 .LBI533: 1299:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** { 6930 .loc 6 1299 22 view .LVU2228 6931 .LBB534: 1301:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_dma.h **** } + ARM GAS /tmp/ccyYWdjY.s page 494 + + 6932 .loc 6 1301 3 view .LVU2229 6933 010a D3F8CC20 ldr r2, [r3, #204] - ARM GAS /tmp/ccfIOqv2.s page 494 - - 6934 010e 22F00402 bic r2, r2, #4 6935 0112 C3F8CC20 str r2, [r3, #204] 6936 .LVL560: @@ -29588,8 +29590,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6937 .loc 6 1301 3 is_stmt 0 view .LVU2230 6938 .LBE534: 6939 .LBE533: -1712:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 6940 .loc 1 1712 3 is_stmt 1 view .LVU2231 +1714:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 6940 .loc 1 1714 3 is_stmt 1 view .LVU2231 6941 .LBB535: 6942 .LBI535: 1884:Drivers/CMSIS/Include/core_cm7.h **** { @@ -29603,8 +29605,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6948 0118 D868 ldr r0, [r3, #12] 6949 .LBE536: 6950 .LBE535: -1712:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); - 6951 .loc 1 1712 3 discriminator 1 view .LVU2235 +1714:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn); + 6951 .loc 1 1714 3 discriminator 1 view .LVU2235 6952 011a 2246 mov r2, r4 6953 011c 2146 mov r1, r4 6954 011e C0F30220 ubfx r0, r0, #8, #3 @@ -29635,12 +29637,12 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6972 .loc 2 2028 47 view .LVU2242 6973 .LBE538: 6974 .LBE537: -1713:Src/main.c **** - 6975 .loc 1 1713 3 is_stmt 1 view .LVU2243 +1715:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 495 + + + 6975 .loc 1 1715 3 is_stmt 1 view .LVU2243 6976 .LBB539: - ARM GAS /tmp/ccfIOqv2.s page 495 - - 6977 .LBI539: 1896:Drivers/CMSIS/Include/core_cm7.h **** { 6978 .loc 2 1896 22 view .LVU2244 @@ -29658,56 +29660,56 @@ ARM GAS /tmp/ccfIOqv2.s page 1 6986 .loc 2 1900 43 view .LVU2248 6987 .LBE540: 6988 .LBE539: -1718:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 6989 .loc 1 1718 3 is_stmt 1 view .LVU2249 -1718:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; - 6990 .loc 1 1718 29 is_stmt 0 view .LVU2250 +1720:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 6989 .loc 1 1720 3 is_stmt 1 view .LVU2249 +1720:Src/main.c **** USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B; + 6990 .loc 1 1720 29 is_stmt 0 view .LVU2250 6991 0134 4FF4E133 mov r3, #115200 6992 0138 2D93 str r3, [sp, #180] -1719:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 6993 .loc 1 1719 3 is_stmt 1 view .LVU2251 -1719:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; - 6994 .loc 1 1719 30 is_stmt 0 view .LVU2252 +1721:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 6993 .loc 1 1721 3 is_stmt 1 view .LVU2251 +1721:Src/main.c **** USART_InitStruct.StopBits = LL_USART_STOPBITS_1; + 6994 .loc 1 1721 30 is_stmt 0 view .LVU2252 6995 013a 2E94 str r4, [sp, #184] -1720:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 6996 .loc 1 1720 3 is_stmt 1 view .LVU2253 -1720:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; - 6997 .loc 1 1720 29 is_stmt 0 view .LVU2254 +1722:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 6996 .loc 1 1722 3 is_stmt 1 view .LVU2253 +1722:Src/main.c **** USART_InitStruct.Parity = LL_USART_PARITY_NONE; + 6997 .loc 1 1722 29 is_stmt 0 view .LVU2254 6998 013c 2F94 str r4, [sp, #188] -1721:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 6999 .loc 1 1721 3 is_stmt 1 view .LVU2255 -1721:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; - 7000 .loc 1 1721 27 is_stmt 0 view .LVU2256 +1723:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 6999 .loc 1 1723 3 is_stmt 1 view .LVU2255 +1723:Src/main.c **** USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX; + 7000 .loc 1 1723 27 is_stmt 0 view .LVU2256 7001 013e 3094 str r4, [sp, #192] -1722:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 7002 .loc 1 1722 3 is_stmt 1 view .LVU2257 -1722:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; - 7003 .loc 1 1722 38 is_stmt 0 view .LVU2258 +1724:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 7002 .loc 1 1724 3 is_stmt 1 view .LVU2257 +1724:Src/main.c **** USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE; + 7003 .loc 1 1724 38 is_stmt 0 view .LVU2258 7004 0140 0C23 movs r3, #12 7005 0142 3193 str r3, [sp, #196] -1723:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 7006 .loc 1 1723 3 is_stmt 1 view .LVU2259 -1723:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; - 7007 .loc 1 1723 40 is_stmt 0 view .LVU2260 +1725:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 7006 .loc 1 1725 3 is_stmt 1 view .LVU2259 +1725:Src/main.c **** USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16; + 7007 .loc 1 1725 40 is_stmt 0 view .LVU2260 7008 0144 3294 str r4, [sp, #200] -1724:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 7009 .loc 1 1724 3 is_stmt 1 view .LVU2261 -1724:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); - 7010 .loc 1 1724 33 is_stmt 0 view .LVU2262 +1726:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 7009 .loc 1 1726 3 is_stmt 1 view .LVU2261 +1726:Src/main.c **** LL_USART_Init(USART1, &USART_InitStruct); + 7010 .loc 1 1726 33 is_stmt 0 view .LVU2262 7011 0146 3394 str r4, [sp, #204] -1725:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); - 7012 .loc 1 1725 3 is_stmt 1 view .LVU2263 +1727:Src/main.c **** LL_USART_ConfigAsyncMode(USART1); + ARM GAS /tmp/ccyYWdjY.s page 496 + + + 7012 .loc 1 1727 3 is_stmt 1 view .LVU2263 7013 0148 04F18044 add r4, r4, #1073741824 - ARM GAS /tmp/ccfIOqv2.s page 496 - - 7014 014c 04F58834 add r4, r4, #69632 7015 0150 2DA9 add r1, sp, #180 7016 0152 2046 mov r0, r4 7017 0154 FFF7FEFF bl LL_USART_Init 7018 .LVL565: -1726:Src/main.c **** LL_USART_Enable(USART1); - 7019 .loc 1 1726 3 view .LVU2264 +1728:Src/main.c **** LL_USART_Enable(USART1); + 7019 .loc 1 1728 3 view .LVU2264 7020 .LBB541: 7021 .LBI541: 2320:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -29728,8 +29730,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7033 .loc 7 2327 3 is_stmt 0 view .LVU2268 7034 .LBE542: 7035 .LBE541: -1727:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ - 7036 .loc 1 1727 3 is_stmt 1 view .LVU2269 +1729:Src/main.c **** /* USER CODE BEGIN USART1_Init 2 */ + 7036 .loc 1 1729 3 is_stmt 1 view .LVU2269 7037 .LBB543: 7038 .LBI543: 560:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** { @@ -29745,8 +29747,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7046 .loc 7 562 3 is_stmt 0 view .LVU2272 7047 .LBE544: 7048 .LBE543: -1732:Src/main.c **** - 7049 .loc 1 1732 1 view .LVU2273 +1734:Src/main.c **** + 7049 .loc 1 1734 1 view .LVU2273 7050 0170 34B0 add sp, sp, #208 7051 .LCFI60: 7052 .cfi_remember_state @@ -29756,11 +29758,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7056 .L308: 7057 .LCFI61: 7058 .cfi_restore_state -1663:Src/main.c **** } - 7059 .loc 1 1663 5 is_stmt 1 view .LVU2274 - ARM GAS /tmp/ccfIOqv2.s page 497 + ARM GAS /tmp/ccyYWdjY.s page 497 +1665:Src/main.c **** } + 7059 .loc 1 1665 5 is_stmt 1 view .LVU2274 7060 0176 FFF7FEFF bl Error_Handler 7061 .LVL568: 7062 .L310: @@ -29780,8 +29782,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7077 .thumb_func 7079 MX_TIM10_Init: 7080 .LFB1201: -1534:Src/main.c **** - 7081 .loc 1 1534 1 view -0 +1536:Src/main.c **** + 7081 .loc 1 1536 1 view -0 7082 .cfi_startproc 7083 @ args = 0, pretend = 0, frame = 0 7084 @ frame_needed = 0, uses_anonymous_args = 0 @@ -29790,59 +29792,59 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7087 .cfi_def_cfa_offset 8 7088 .cfi_offset 3, -8 7089 .cfi_offset 14, -4 -1543:Src/main.c **** htim10.Init.Prescaler = 183; - 7090 .loc 1 1543 3 view .LVU2276 -1543:Src/main.c **** htim10.Init.Prescaler = 183; - 7091 .loc 1 1543 19 is_stmt 0 view .LVU2277 +1545:Src/main.c **** htim10.Init.Prescaler = 183; + 7090 .loc 1 1545 3 view .LVU2276 +1545:Src/main.c **** htim10.Init.Prescaler = 183; + 7091 .loc 1 1545 19 is_stmt 0 view .LVU2277 7092 0002 0848 ldr r0, .L315 7093 0004 084B ldr r3, .L315+4 7094 0006 0360 str r3, [r0] -1544:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 7095 .loc 1 1544 3 is_stmt 1 view .LVU2278 -1544:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; - 7096 .loc 1 1544 25 is_stmt 0 view .LVU2279 +1546:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 7095 .loc 1 1546 3 is_stmt 1 view .LVU2278 +1546:Src/main.c **** htim10.Init.CounterMode = TIM_COUNTERMODE_UP; + 7096 .loc 1 1546 25 is_stmt 0 view .LVU2279 7097 0008 B723 movs r3, #183 7098 000a 4360 str r3, [r0, #4] -1545:Src/main.c **** htim10.Init.Period = 9; - 7099 .loc 1 1545 3 is_stmt 1 view .LVU2280 -1545:Src/main.c **** htim10.Init.Period = 9; - 7100 .loc 1 1545 27 is_stmt 0 view .LVU2281 +1547:Src/main.c **** htim10.Init.Period = 9; + 7099 .loc 1 1547 3 is_stmt 1 view .LVU2280 +1547:Src/main.c **** htim10.Init.Period = 9; + 7100 .loc 1 1547 27 is_stmt 0 view .LVU2281 7101 000c 0023 movs r3, #0 7102 000e 8360 str r3, [r0, #8] -1546:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7103 .loc 1 1546 3 is_stmt 1 view .LVU2282 -1546:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7104 .loc 1 1546 22 is_stmt 0 view .LVU2283 +1548:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7103 .loc 1 1548 3 is_stmt 1 view .LVU2282 +1548:Src/main.c **** htim10.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7104 .loc 1 1548 22 is_stmt 0 view .LVU2283 7105 0010 0922 movs r2, #9 7106 0012 C260 str r2, [r0, #12] -1547:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7107 .loc 1 1547 3 is_stmt 1 view .LVU2284 -1547:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - ARM GAS /tmp/ccfIOqv2.s page 498 +1549:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + ARM GAS /tmp/ccyYWdjY.s page 498 - 7108 .loc 1 1547 29 is_stmt 0 view .LVU2285 + 7107 .loc 1 1549 3 is_stmt 1 view .LVU2284 +1549:Src/main.c **** htim10.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 7108 .loc 1 1549 29 is_stmt 0 view .LVU2285 7109 0014 0361 str r3, [r0, #16] -1548:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 7110 .loc 1 1548 3 is_stmt 1 view .LVU2286 -1548:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) - 7111 .loc 1 1548 33 is_stmt 0 view .LVU2287 +1550:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 7110 .loc 1 1550 3 is_stmt 1 view .LVU2286 +1550:Src/main.c **** if (HAL_TIM_Base_Init(&htim10) != HAL_OK) + 7111 .loc 1 1550 33 is_stmt 0 view .LVU2287 7112 0016 8361 str r3, [r0, #24] -1549:Src/main.c **** { - 7113 .loc 1 1549 3 is_stmt 1 view .LVU2288 -1549:Src/main.c **** { - 7114 .loc 1 1549 7 is_stmt 0 view .LVU2289 +1551:Src/main.c **** { + 7113 .loc 1 1551 3 is_stmt 1 view .LVU2288 +1551:Src/main.c **** { + 7114 .loc 1 1551 7 is_stmt 0 view .LVU2289 7115 0018 FFF7FEFF bl HAL_TIM_Base_Init 7116 .LVL569: -1549:Src/main.c **** { - 7117 .loc 1 1549 6 discriminator 1 view .LVU2290 +1551:Src/main.c **** { + 7117 .loc 1 1551 6 discriminator 1 view .LVU2290 7118 001c 00B9 cbnz r0, .L314 -1557:Src/main.c **** - 7119 .loc 1 1557 1 view .LVU2291 +1559:Src/main.c **** + 7119 .loc 1 1559 1 view .LVU2291 7120 001e 08BD pop {r3, pc} 7121 .L314: -1551:Src/main.c **** } - 7122 .loc 1 1551 5 is_stmt 1 view .LVU2292 +1553:Src/main.c **** } + 7122 .loc 1 1553 5 is_stmt 1 view .LVU2292 7123 0020 FFF7FEFF bl Error_Handler 7124 .LVL570: 7125 .L316: @@ -29859,8 +29861,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7137 .thumb_func 7139 MX_UART8_Init: 7140 .LFB1203: -1611:Src/main.c **** - 7141 .loc 1 1611 1 view -0 +1613:Src/main.c **** + 7141 .loc 1 1613 1 view -0 7142 .cfi_startproc 7143 @ args = 0, pretend = 0, frame = 0 7144 @ frame_needed = 0, uses_anonymous_args = 0 @@ -29869,82 +29871,82 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7147 .cfi_def_cfa_offset 8 7148 .cfi_offset 3, -8 7149 .cfi_offset 14, -4 -1620:Src/main.c **** huart8.Init.BaudRate = 115200; - 7150 .loc 1 1620 3 view .LVU2294 -1620:Src/main.c **** huart8.Init.BaudRate = 115200; - 7151 .loc 1 1620 19 is_stmt 0 view .LVU2295 +1622:Src/main.c **** huart8.Init.BaudRate = 115200; + 7150 .loc 1 1622 3 view .LVU2294 +1622:Src/main.c **** huart8.Init.BaudRate = 115200; + 7151 .loc 1 1622 19 is_stmt 0 view .LVU2295 7152 0002 0B48 ldr r0, .L321 7153 0004 0B4B ldr r3, .L321+4 7154 0006 0360 str r3, [r0] -1621:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 7155 .loc 1 1621 3 is_stmt 1 view .LVU2296 - ARM GAS /tmp/ccfIOqv2.s page 499 + ARM GAS /tmp/ccyYWdjY.s page 499 -1621:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; - 7156 .loc 1 1621 24 is_stmt 0 view .LVU2297 +1623:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 7155 .loc 1 1623 3 is_stmt 1 view .LVU2296 +1623:Src/main.c **** huart8.Init.WordLength = UART_WORDLENGTH_8B; + 7156 .loc 1 1623 24 is_stmt 0 view .LVU2297 7157 0008 4FF4E133 mov r3, #115200 7158 000c 4360 str r3, [r0, #4] -1622:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 7159 .loc 1 1622 3 is_stmt 1 view .LVU2298 -1622:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; - 7160 .loc 1 1622 26 is_stmt 0 view .LVU2299 +1624:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 7159 .loc 1 1624 3 is_stmt 1 view .LVU2298 +1624:Src/main.c **** huart8.Init.StopBits = UART_STOPBITS_1; + 7160 .loc 1 1624 26 is_stmt 0 view .LVU2299 7161 000e 0023 movs r3, #0 7162 0010 8360 str r3, [r0, #8] -1623:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 7163 .loc 1 1623 3 is_stmt 1 view .LVU2300 -1623:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; - 7164 .loc 1 1623 24 is_stmt 0 view .LVU2301 +1625:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 7163 .loc 1 1625 3 is_stmt 1 view .LVU2300 +1625:Src/main.c **** huart8.Init.Parity = UART_PARITY_NONE; + 7164 .loc 1 1625 24 is_stmt 0 view .LVU2301 7165 0012 C360 str r3, [r0, #12] -1624:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 7166 .loc 1 1624 3 is_stmt 1 view .LVU2302 -1624:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; - 7167 .loc 1 1624 22 is_stmt 0 view .LVU2303 +1626:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 7166 .loc 1 1626 3 is_stmt 1 view .LVU2302 +1626:Src/main.c **** huart8.Init.Mode = UART_MODE_TX_RX; + 7167 .loc 1 1626 22 is_stmt 0 view .LVU2303 7168 0014 0361 str r3, [r0, #16] -1625:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 7169 .loc 1 1625 3 is_stmt 1 view .LVU2304 -1625:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; - 7170 .loc 1 1625 20 is_stmt 0 view .LVU2305 +1627:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 7169 .loc 1 1627 3 is_stmt 1 view .LVU2304 +1627:Src/main.c **** huart8.Init.HwFlowCtl = UART_HWCONTROL_NONE; + 7170 .loc 1 1627 20 is_stmt 0 view .LVU2305 7171 0016 0C22 movs r2, #12 7172 0018 4261 str r2, [r0, #20] -1626:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 7173 .loc 1 1626 3 is_stmt 1 view .LVU2306 -1626:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; - 7174 .loc 1 1626 25 is_stmt 0 view .LVU2307 +1628:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 7173 .loc 1 1628 3 is_stmt 1 view .LVU2306 +1628:Src/main.c **** huart8.Init.OverSampling = UART_OVERSAMPLING_16; + 7174 .loc 1 1628 25 is_stmt 0 view .LVU2307 7175 001a 8361 str r3, [r0, #24] -1627:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 7176 .loc 1 1627 3 is_stmt 1 view .LVU2308 -1627:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; - 7177 .loc 1 1627 28 is_stmt 0 view .LVU2309 +1629:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 7176 .loc 1 1629 3 is_stmt 1 view .LVU2308 +1629:Src/main.c **** huart8.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; + 7177 .loc 1 1629 28 is_stmt 0 view .LVU2309 7178 001c C361 str r3, [r0, #28] -1628:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 7179 .loc 1 1628 3 is_stmt 1 view .LVU2310 -1628:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; - 7180 .loc 1 1628 30 is_stmt 0 view .LVU2311 +1630:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 7179 .loc 1 1630 3 is_stmt 1 view .LVU2310 +1630:Src/main.c **** huart8.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; + 7180 .loc 1 1630 30 is_stmt 0 view .LVU2311 7181 001e 0362 str r3, [r0, #32] -1629:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 7182 .loc 1 1629 3 is_stmt 1 view .LVU2312 -1629:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) - 7183 .loc 1 1629 38 is_stmt 0 view .LVU2313 +1631:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 7182 .loc 1 1631 3 is_stmt 1 view .LVU2312 +1631:Src/main.c **** if (HAL_UART_Init(&huart8) != HAL_OK) + 7183 .loc 1 1631 38 is_stmt 0 view .LVU2313 7184 0020 4362 str r3, [r0, #36] -1630:Src/main.c **** { - 7185 .loc 1 1630 3 is_stmt 1 view .LVU2314 -1630:Src/main.c **** { - 7186 .loc 1 1630 7 is_stmt 0 view .LVU2315 +1632:Src/main.c **** { + 7185 .loc 1 1632 3 is_stmt 1 view .LVU2314 +1632:Src/main.c **** { + 7186 .loc 1 1632 7 is_stmt 0 view .LVU2315 7187 0022 FFF7FEFF bl HAL_UART_Init 7188 .LVL571: -1630:Src/main.c **** { - 7189 .loc 1 1630 6 discriminator 1 view .LVU2316 +1632:Src/main.c **** { + 7189 .loc 1 1632 6 discriminator 1 view .LVU2316 7190 0026 00B9 cbnz r0, .L320 -1638:Src/main.c **** - 7191 .loc 1 1638 1 view .LVU2317 - ARM GAS /tmp/ccfIOqv2.s page 500 + ARM GAS /tmp/ccyYWdjY.s page 500 +1640:Src/main.c **** + 7191 .loc 1 1640 1 view .LVU2317 7192 0028 08BD pop {r3, pc} 7193 .L320: -1632:Src/main.c **** } - 7194 .loc 1 1632 5 is_stmt 1 view .LVU2318 +1634:Src/main.c **** } + 7194 .loc 1 1634 5 is_stmt 1 view .LVU2318 7195 002a FFF7FEFF bl Error_Handler 7196 .LVL572: 7197 .L322: @@ -29961,8 +29963,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7209 .thumb_func 7211 MX_TIM8_Init: 7212 .LFB1200: -1487:Src/main.c **** - 7213 .loc 1 1487 1 view -0 +1489:Src/main.c **** + 7213 .loc 1 1489 1 view -0 7214 .cfi_startproc 7215 @ args = 0, pretend = 0, frame = 32 7216 @ frame_needed = 0, uses_anonymous_args = 0 @@ -29973,121 +29975,121 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7221 0002 89B0 sub sp, sp, #36 7222 .LCFI65: 7223 .cfi_def_cfa_offset 40 -1493:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7224 .loc 1 1493 3 view .LVU2320 -1493:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7225 .loc 1 1493 26 is_stmt 0 view .LVU2321 +1495:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 7224 .loc 1 1495 3 view .LVU2320 +1495:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 7225 .loc 1 1495 26 is_stmt 0 view .LVU2321 7226 0004 0023 movs r3, #0 7227 0006 0493 str r3, [sp, #16] 7228 0008 0593 str r3, [sp, #20] 7229 000a 0693 str r3, [sp, #24] 7230 000c 0793 str r3, [sp, #28] -1494:Src/main.c **** - 7231 .loc 1 1494 3 is_stmt 1 view .LVU2322 -1494:Src/main.c **** - 7232 .loc 1 1494 27 is_stmt 0 view .LVU2323 +1496:Src/main.c **** + 7231 .loc 1 1496 3 is_stmt 1 view .LVU2322 +1496:Src/main.c **** + 7232 .loc 1 1496 27 is_stmt 0 view .LVU2323 7233 000e 0193 str r3, [sp, #4] 7234 0010 0293 str r3, [sp, #8] 7235 0012 0393 str r3, [sp, #12] -1499:Src/main.c **** htim8.Init.Prescaler = 0; - 7236 .loc 1 1499 3 is_stmt 1 view .LVU2324 -1499:Src/main.c **** htim8.Init.Prescaler = 0; - 7237 .loc 1 1499 18 is_stmt 0 view .LVU2325 +1501:Src/main.c **** htim8.Init.Prescaler = 0; + 7236 .loc 1 1501 3 is_stmt 1 view .LVU2324 +1501:Src/main.c **** htim8.Init.Prescaler = 0; + 7237 .loc 1 1501 18 is_stmt 0 view .LVU2325 7238 0014 1348 ldr r0, .L331 7239 0016 144A ldr r2, .L331+4 7240 0018 0260 str r2, [r0] -1500:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 7241 .loc 1 1500 3 is_stmt 1 view .LVU2326 - ARM GAS /tmp/ccfIOqv2.s page 501 + ARM GAS /tmp/ccyYWdjY.s page 501 -1500:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; - 7242 .loc 1 1500 24 is_stmt 0 view .LVU2327 +1502:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 7241 .loc 1 1502 3 is_stmt 1 view .LVU2326 +1502:Src/main.c **** htim8.Init.CounterMode = TIM_COUNTERMODE_UP; + 7242 .loc 1 1502 24 is_stmt 0 view .LVU2327 7243 001a 4360 str r3, [r0, #4] -1501:Src/main.c **** htim8.Init.Period = 91; - 7244 .loc 1 1501 3 is_stmt 1 view .LVU2328 -1501:Src/main.c **** htim8.Init.Period = 91; - 7245 .loc 1 1501 26 is_stmt 0 view .LVU2329 +1503:Src/main.c **** htim8.Init.Period = 91; + 7244 .loc 1 1503 3 is_stmt 1 view .LVU2328 +1503:Src/main.c **** htim8.Init.Period = 91; + 7245 .loc 1 1503 26 is_stmt 0 view .LVU2329 7246 001c 8360 str r3, [r0, #8] -1502:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7247 .loc 1 1502 3 is_stmt 1 view .LVU2330 -1502:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7248 .loc 1 1502 21 is_stmt 0 view .LVU2331 +1504:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7247 .loc 1 1504 3 is_stmt 1 view .LVU2330 +1504:Src/main.c **** htim8.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7248 .loc 1 1504 21 is_stmt 0 view .LVU2331 7249 001e 5B22 movs r2, #91 7250 0020 C260 str r2, [r0, #12] -1503:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 7251 .loc 1 1503 3 is_stmt 1 view .LVU2332 -1503:Src/main.c **** htim8.Init.RepetitionCounter = 0; - 7252 .loc 1 1503 28 is_stmt 0 view .LVU2333 +1505:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 7251 .loc 1 1505 3 is_stmt 1 view .LVU2332 +1505:Src/main.c **** htim8.Init.RepetitionCounter = 0; + 7252 .loc 1 1505 28 is_stmt 0 view .LVU2333 7253 0022 0361 str r3, [r0, #16] -1504:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7254 .loc 1 1504 3 is_stmt 1 view .LVU2334 -1504:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7255 .loc 1 1504 32 is_stmt 0 view .LVU2335 +1506:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 7254 .loc 1 1506 3 is_stmt 1 view .LVU2334 +1506:Src/main.c **** htim8.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 7255 .loc 1 1506 32 is_stmt 0 view .LVU2335 7256 0024 4361 str r3, [r0, #20] -1505:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 7257 .loc 1 1505 3 is_stmt 1 view .LVU2336 -1505:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) - 7258 .loc 1 1505 32 is_stmt 0 view .LVU2337 +1507:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 7257 .loc 1 1507 3 is_stmt 1 view .LVU2336 +1507:Src/main.c **** if (HAL_TIM_Base_Init(&htim8) != HAL_OK) + 7258 .loc 1 1507 32 is_stmt 0 view .LVU2337 7259 0026 8361 str r3, [r0, #24] -1506:Src/main.c **** { - 7260 .loc 1 1506 3 is_stmt 1 view .LVU2338 -1506:Src/main.c **** { - 7261 .loc 1 1506 7 is_stmt 0 view .LVU2339 +1508:Src/main.c **** { + 7260 .loc 1 1508 3 is_stmt 1 view .LVU2338 +1508:Src/main.c **** { + 7261 .loc 1 1508 7 is_stmt 0 view .LVU2339 7262 0028 FFF7FEFF bl HAL_TIM_Base_Init 7263 .LVL573: -1506:Src/main.c **** { - 7264 .loc 1 1506 6 discriminator 1 view .LVU2340 +1508:Src/main.c **** { + 7264 .loc 1 1508 6 discriminator 1 view .LVU2340 7265 002c 98B9 cbnz r0, .L328 -1510:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 7266 .loc 1 1510 3 is_stmt 1 view .LVU2341 -1510:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) - 7267 .loc 1 1510 34 is_stmt 0 view .LVU2342 +1512:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 7266 .loc 1 1512 3 is_stmt 1 view .LVU2341 +1512:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim8, &sClockSourceConfig) != HAL_OK) + 7267 .loc 1 1512 34 is_stmt 0 view .LVU2342 7268 002e 4FF48053 mov r3, #4096 7269 0032 0493 str r3, [sp, #16] -1511:Src/main.c **** { - 7270 .loc 1 1511 3 is_stmt 1 view .LVU2343 -1511:Src/main.c **** { - 7271 .loc 1 1511 7 is_stmt 0 view .LVU2344 +1513:Src/main.c **** { + 7270 .loc 1 1513 3 is_stmt 1 view .LVU2343 +1513:Src/main.c **** { + 7271 .loc 1 1513 7 is_stmt 0 view .LVU2344 7272 0034 04A9 add r1, sp, #16 7273 0036 0B48 ldr r0, .L331 7274 0038 FFF7FEFF bl HAL_TIM_ConfigClockSource 7275 .LVL574: -1511:Src/main.c **** { - 7276 .loc 1 1511 6 discriminator 1 view .LVU2345 +1513:Src/main.c **** { + 7276 .loc 1 1513 6 discriminator 1 view .LVU2345 7277 003c 68B9 cbnz r0, .L329 -1515:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 7278 .loc 1 1515 3 is_stmt 1 view .LVU2346 - ARM GAS /tmp/ccfIOqv2.s page 502 + ARM GAS /tmp/ccyYWdjY.s page 502 -1515:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; - 7279 .loc 1 1515 37 is_stmt 0 view .LVU2347 +1517:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 7278 .loc 1 1517 3 is_stmt 1 view .LVU2346 +1517:Src/main.c **** sMasterConfig.MasterOutputTrigger2 = TIM_TRGO2_RESET; + 7279 .loc 1 1517 37 is_stmt 0 view .LVU2347 7280 003e 0023 movs r3, #0 7281 0040 0193 str r3, [sp, #4] -1516:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7282 .loc 1 1516 3 is_stmt 1 view .LVU2348 -1516:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7283 .loc 1 1516 38 is_stmt 0 view .LVU2349 +1518:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 7282 .loc 1 1518 3 is_stmt 1 view .LVU2348 +1518:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 7283 .loc 1 1518 38 is_stmt 0 view .LVU2349 7284 0042 0293 str r3, [sp, #8] -1517:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 7285 .loc 1 1517 3 is_stmt 1 view .LVU2350 -1517:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) - 7286 .loc 1 1517 33 is_stmt 0 view .LVU2351 +1519:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 7285 .loc 1 1519 3 is_stmt 1 view .LVU2350 +1519:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim8, &sMasterConfig) != HAL_OK) + 7286 .loc 1 1519 33 is_stmt 0 view .LVU2351 7287 0044 0393 str r3, [sp, #12] -1518:Src/main.c **** { - 7288 .loc 1 1518 3 is_stmt 1 view .LVU2352 -1518:Src/main.c **** { - 7289 .loc 1 1518 7 is_stmt 0 view .LVU2353 +1520:Src/main.c **** { + 7288 .loc 1 1520 3 is_stmt 1 view .LVU2352 +1520:Src/main.c **** { + 7289 .loc 1 1520 7 is_stmt 0 view .LVU2353 7290 0046 01A9 add r1, sp, #4 7291 0048 0648 ldr r0, .L331 7292 004a FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 7293 .LVL575: -1518:Src/main.c **** { - 7294 .loc 1 1518 6 discriminator 1 view .LVU2354 +1520:Src/main.c **** { + 7294 .loc 1 1520 6 discriminator 1 view .LVU2354 7295 004e 30B9 cbnz r0, .L330 -1526:Src/main.c **** - 7296 .loc 1 1526 1 view .LVU2355 +1528:Src/main.c **** + 7296 .loc 1 1528 1 view .LVU2355 7297 0050 09B0 add sp, sp, #36 7298 .LCFI66: 7299 .cfi_remember_state @@ -30097,18 +30099,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7303 .L328: 7304 .LCFI67: 7305 .cfi_restore_state -1508:Src/main.c **** } - 7306 .loc 1 1508 5 is_stmt 1 view .LVU2356 +1510:Src/main.c **** } + 7306 .loc 1 1510 5 is_stmt 1 view .LVU2356 7307 0056 FFF7FEFF bl Error_Handler 7308 .LVL576: 7309 .L329: -1513:Src/main.c **** } - 7310 .loc 1 1513 5 view .LVU2357 +1515:Src/main.c **** } + 7310 .loc 1 1515 5 view .LVU2357 7311 005a FFF7FEFF bl Error_Handler 7312 .LVL577: 7313 .L330: -1520:Src/main.c **** } - 7314 .loc 1 1520 5 view .LVU2358 +1522:Src/main.c **** } + 7314 .loc 1 1522 5 view .LVU2358 7315 005e FFF7FEFF bl Error_Handler 7316 .LVL578: 7317 .L332: @@ -30116,11 +30118,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7319 .L331: 7320 0064 00000000 .word htim8 7321 0068 00040140 .word 1073808384 + ARM GAS /tmp/ccyYWdjY.s page 503 + + 7322 .cfi_endproc 7323 .LFE1200: - ARM GAS /tmp/ccfIOqv2.s page 503 - - 7325 .section .text.MX_TIM11_Init,"ax",%progbits 7326 .align 1 7327 .syntax unified @@ -30128,8 +30130,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7329 .thumb_func 7331 MX_TIM11_Init: 7332 .LFB1202: -1565:Src/main.c **** - 7333 .loc 1 1565 1 view -0 +1567:Src/main.c **** + 7333 .loc 1 1567 1 view -0 7334 .cfi_startproc 7335 @ args = 0, pretend = 0, frame = 32 7336 @ frame_needed = 0, uses_anonymous_args = 0 @@ -30140,10 +30142,10 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7341 0002 89B0 sub sp, sp, #36 7342 .LCFI69: 7343 .cfi_def_cfa_offset 40 -1571:Src/main.c **** - 7344 .loc 1 1571 3 view .LVU2360 -1571:Src/main.c **** - 7345 .loc 1 1571 22 is_stmt 0 view .LVU2361 +1573:Src/main.c **** + 7344 .loc 1 1573 3 view .LVU2360 +1573:Src/main.c **** + 7345 .loc 1 1573 22 is_stmt 0 view .LVU2361 7346 0004 0023 movs r3, #0 7347 0006 0193 str r3, [sp, #4] 7348 0008 0293 str r3, [sp, #8] @@ -30152,107 +30154,107 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7351 000e 0593 str r3, [sp, #20] 7352 0010 0693 str r3, [sp, #24] 7353 0012 0793 str r3, [sp, #28] -1576:Src/main.c **** htim11.Init.Prescaler = 1; - 7354 .loc 1 1576 3 is_stmt 1 view .LVU2362 -1576:Src/main.c **** htim11.Init.Prescaler = 1; - 7355 .loc 1 1576 19 is_stmt 0 view .LVU2363 +1578:Src/main.c **** htim11.Init.Prescaler = 1; + 7354 .loc 1 1578 3 is_stmt 1 view .LVU2362 +1578:Src/main.c **** htim11.Init.Prescaler = 1; + 7355 .loc 1 1578 19 is_stmt 0 view .LVU2363 7356 0014 1448 ldr r0, .L341 7357 0016 154A ldr r2, .L341+4 7358 0018 0260 str r2, [r0] -1577:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 7359 .loc 1 1577 3 is_stmt 1 view .LVU2364 -1577:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; - 7360 .loc 1 1577 25 is_stmt 0 view .LVU2365 +1579:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 7359 .loc 1 1579 3 is_stmt 1 view .LVU2364 +1579:Src/main.c **** htim11.Init.CounterMode = TIM_COUNTERMODE_UP; + 7360 .loc 1 1579 25 is_stmt 0 view .LVU2365 7361 001a 0122 movs r2, #1 7362 001c 4260 str r2, [r0, #4] -1578:Src/main.c **** htim11.Init.Period = 91; - 7363 .loc 1 1578 3 is_stmt 1 view .LVU2366 -1578:Src/main.c **** htim11.Init.Period = 91; - 7364 .loc 1 1578 27 is_stmt 0 view .LVU2367 +1580:Src/main.c **** htim11.Init.Period = 91; + 7363 .loc 1 1580 3 is_stmt 1 view .LVU2366 +1580:Src/main.c **** htim11.Init.Period = 91; + 7364 .loc 1 1580 27 is_stmt 0 view .LVU2367 7365 001e 8360 str r3, [r0, #8] -1579:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7366 .loc 1 1579 3 is_stmt 1 view .LVU2368 -1579:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7367 .loc 1 1579 22 is_stmt 0 view .LVU2369 +1581:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7366 .loc 1 1581 3 is_stmt 1 view .LVU2368 +1581:Src/main.c **** htim11.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7367 .loc 1 1581 22 is_stmt 0 view .LVU2369 7368 0020 5B22 movs r2, #91 7369 0022 C260 str r2, [r0, #12] -1580:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 7370 .loc 1 1580 3 is_stmt 1 view .LVU2370 - ARM GAS /tmp/ccfIOqv2.s page 504 + ARM GAS /tmp/ccyYWdjY.s page 504 -1580:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; - 7371 .loc 1 1580 29 is_stmt 0 view .LVU2371 +1582:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 7370 .loc 1 1582 3 is_stmt 1 view .LVU2370 +1582:Src/main.c **** htim11.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE; + 7371 .loc 1 1582 29 is_stmt 0 view .LVU2371 7372 0024 0361 str r3, [r0, #16] -1581:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 7373 .loc 1 1581 3 is_stmt 1 view .LVU2372 -1581:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) - 7374 .loc 1 1581 33 is_stmt 0 view .LVU2373 +1583:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 7373 .loc 1 1583 3 is_stmt 1 view .LVU2372 +1583:Src/main.c **** if (HAL_TIM_Base_Init(&htim11) != HAL_OK) + 7374 .loc 1 1583 33 is_stmt 0 view .LVU2373 7375 0026 8023 movs r3, #128 7376 0028 8361 str r3, [r0, #24] -1582:Src/main.c **** { - 7377 .loc 1 1582 3 is_stmt 1 view .LVU2374 -1582:Src/main.c **** { - 7378 .loc 1 1582 7 is_stmt 0 view .LVU2375 +1584:Src/main.c **** { + 7377 .loc 1 1584 3 is_stmt 1 view .LVU2374 +1584:Src/main.c **** { + 7378 .loc 1 1584 7 is_stmt 0 view .LVU2375 7379 002a FFF7FEFF bl HAL_TIM_Base_Init 7380 .LVL579: -1582:Src/main.c **** { - 7381 .loc 1 1582 6 discriminator 1 view .LVU2376 +1584:Src/main.c **** { + 7381 .loc 1 1584 6 discriminator 1 view .LVU2376 7382 002e A8B9 cbnz r0, .L338 -1586:Src/main.c **** { - 7383 .loc 1 1586 3 is_stmt 1 view .LVU2377 -1586:Src/main.c **** { - 7384 .loc 1 1586 7 is_stmt 0 view .LVU2378 +1588:Src/main.c **** { + 7383 .loc 1 1588 3 is_stmt 1 view .LVU2377 +1588:Src/main.c **** { + 7384 .loc 1 1588 7 is_stmt 0 view .LVU2378 7385 0030 0D48 ldr r0, .L341 7386 0032 FFF7FEFF bl HAL_TIM_PWM_Init 7387 .LVL580: -1586:Src/main.c **** { - 7388 .loc 1 1586 6 discriminator 1 view .LVU2379 +1588:Src/main.c **** { + 7388 .loc 1 1588 6 discriminator 1 view .LVU2379 7389 0036 98B9 cbnz r0, .L339 -1590:Src/main.c **** sConfigOC.Pulse = 91; - 7390 .loc 1 1590 3 is_stmt 1 view .LVU2380 -1590:Src/main.c **** sConfigOC.Pulse = 91; - 7391 .loc 1 1590 20 is_stmt 0 view .LVU2381 +1592:Src/main.c **** sConfigOC.Pulse = 91; + 7390 .loc 1 1592 3 is_stmt 1 view .LVU2380 +1592:Src/main.c **** sConfigOC.Pulse = 91; + 7391 .loc 1 1592 20 is_stmt 0 view .LVU2381 7392 0038 6023 movs r3, #96 7393 003a 0193 str r3, [sp, #4] -1591:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7394 .loc 1 1591 3 is_stmt 1 view .LVU2382 -1591:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7395 .loc 1 1591 19 is_stmt 0 view .LVU2383 +1593:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 7394 .loc 1 1593 3 is_stmt 1 view .LVU2382 +1593:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 7395 .loc 1 1593 19 is_stmt 0 view .LVU2383 7396 003c 5B23 movs r3, #91 7397 003e 0293 str r3, [sp, #8] -1592:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7398 .loc 1 1592 3 is_stmt 1 view .LVU2384 -1592:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7399 .loc 1 1592 24 is_stmt 0 view .LVU2385 +1594:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 7398 .loc 1 1594 3 is_stmt 1 view .LVU2384 +1594:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 7399 .loc 1 1594 24 is_stmt 0 view .LVU2385 7400 0040 0022 movs r2, #0 7401 0042 0392 str r2, [sp, #12] -1593:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 7402 .loc 1 1593 3 is_stmt 1 view .LVU2386 -1593:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) - 7403 .loc 1 1593 24 is_stmt 0 view .LVU2387 +1595:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 7402 .loc 1 1595 3 is_stmt 1 view .LVU2386 +1595:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim11, &sConfigOC, TIM_CHANNEL_1) != HAL_OK) + 7403 .loc 1 1595 24 is_stmt 0 view .LVU2387 7404 0044 0592 str r2, [sp, #20] -1594:Src/main.c **** { - 7405 .loc 1 1594 3 is_stmt 1 view .LVU2388 -1594:Src/main.c **** { - 7406 .loc 1 1594 7 is_stmt 0 view .LVU2389 +1596:Src/main.c **** { + 7405 .loc 1 1596 3 is_stmt 1 view .LVU2388 +1596:Src/main.c **** { + 7406 .loc 1 1596 7 is_stmt 0 view .LVU2389 + ARM GAS /tmp/ccyYWdjY.s page 505 + + 7407 0046 01A9 add r1, sp, #4 7408 0048 0748 ldr r0, .L341 - ARM GAS /tmp/ccfIOqv2.s page 505 - - 7409 004a FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 7410 .LVL581: -1594:Src/main.c **** { - 7411 .loc 1 1594 6 discriminator 1 view .LVU2390 +1596:Src/main.c **** { + 7411 .loc 1 1596 6 discriminator 1 view .LVU2390 7412 004e 48B9 cbnz r0, .L340 -1601:Src/main.c **** - 7413 .loc 1 1601 3 is_stmt 1 view .LVU2391 +1603:Src/main.c **** + 7413 .loc 1 1603 3 is_stmt 1 view .LVU2391 7414 0050 0548 ldr r0, .L341 7415 0052 FFF7FEFF bl HAL_TIM_MspPostInit 7416 .LVL582: -1603:Src/main.c **** - 7417 .loc 1 1603 1 is_stmt 0 view .LVU2392 +1605:Src/main.c **** + 7417 .loc 1 1605 1 is_stmt 0 view .LVU2392 7418 0056 09B0 add sp, sp, #36 7419 .LCFI70: 7420 .cfi_remember_state @@ -30262,18 +30264,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7424 .L338: 7425 .LCFI71: 7426 .cfi_restore_state -1584:Src/main.c **** } - 7427 .loc 1 1584 5 is_stmt 1 view .LVU2393 +1586:Src/main.c **** } + 7427 .loc 1 1586 5 is_stmt 1 view .LVU2393 7428 005c FFF7FEFF bl Error_Handler 7429 .LVL583: 7430 .L339: -1588:Src/main.c **** } - 7431 .loc 1 1588 5 view .LVU2394 +1590:Src/main.c **** } + 7431 .loc 1 1590 5 view .LVU2394 7432 0060 FFF7FEFF bl Error_Handler 7433 .LVL584: 7434 .L340: -1596:Src/main.c **** } - 7435 .loc 1 1596 5 view .LVU2395 +1598:Src/main.c **** } + 7435 .loc 1 1598 5 view .LVU2395 7436 0064 FFF7FEFF bl Error_Handler 7437 .LVL585: 7438 .L342: @@ -30290,41 +30292,41 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7450 .thumb_func 7452 MX_TIM4_Init: 7453 .LFB1196: -1315:Src/main.c **** - 7454 .loc 1 1315 1 view -0 +1317:Src/main.c **** + 7454 .loc 1 1317 1 view -0 7455 .cfi_startproc 7456 @ args = 0, pretend = 0, frame = 56 7457 @ frame_needed = 0, uses_anonymous_args = 0 7458 0000 00B5 push {lr} + ARM GAS /tmp/ccyYWdjY.s page 506 + + 7459 .LCFI72: 7460 .cfi_def_cfa_offset 4 - ARM GAS /tmp/ccfIOqv2.s page 506 - - 7461 .cfi_offset 14, -4 7462 0002 8FB0 sub sp, sp, #60 7463 .LCFI73: 7464 .cfi_def_cfa_offset 64 -1321:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7465 .loc 1 1321 3 view .LVU2397 -1321:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; - 7466 .loc 1 1321 26 is_stmt 0 view .LVU2398 +1323:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 7465 .loc 1 1323 3 view .LVU2397 +1323:Src/main.c **** TIM_MasterConfigTypeDef sMasterConfig = {0}; + 7466 .loc 1 1323 26 is_stmt 0 view .LVU2398 7467 0004 0023 movs r3, #0 7468 0006 0A93 str r3, [sp, #40] 7469 0008 0B93 str r3, [sp, #44] 7470 000a 0C93 str r3, [sp, #48] 7471 000c 0D93 str r3, [sp, #52] -1322:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 7472 .loc 1 1322 3 is_stmt 1 view .LVU2399 -1322:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; - 7473 .loc 1 1322 27 is_stmt 0 view .LVU2400 +1324:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 7472 .loc 1 1324 3 is_stmt 1 view .LVU2399 +1324:Src/main.c **** TIM_OC_InitTypeDef sConfigOC = {0}; + 7473 .loc 1 1324 27 is_stmt 0 view .LVU2400 7474 000e 0793 str r3, [sp, #28] 7475 0010 0893 str r3, [sp, #32] 7476 0012 0993 str r3, [sp, #36] -1323:Src/main.c **** - 7477 .loc 1 1323 3 is_stmt 1 view .LVU2401 -1323:Src/main.c **** - 7478 .loc 1 1323 22 is_stmt 0 view .LVU2402 +1325:Src/main.c **** + 7477 .loc 1 1325 3 is_stmt 1 view .LVU2401 +1325:Src/main.c **** + 7478 .loc 1 1325 22 is_stmt 0 view .LVU2402 7479 0014 0093 str r3, [sp] 7480 0016 0193 str r3, [sp, #4] 7481 0018 0293 str r3, [sp, #8] @@ -30332,179 +30334,179 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7483 001c 0493 str r3, [sp, #16] 7484 001e 0593 str r3, [sp, #20] 7485 0020 0693 str r3, [sp, #24] -1328:Src/main.c **** htim4.Init.Prescaler = 0; - 7486 .loc 1 1328 3 is_stmt 1 view .LVU2403 -1328:Src/main.c **** htim4.Init.Prescaler = 0; - 7487 .loc 1 1328 18 is_stmt 0 view .LVU2404 +1330:Src/main.c **** htim4.Init.Prescaler = 0; + 7486 .loc 1 1330 3 is_stmt 1 view .LVU2403 +1330:Src/main.c **** htim4.Init.Prescaler = 0; + 7487 .loc 1 1330 18 is_stmt 0 view .LVU2404 7488 0022 1E48 ldr r0, .L355 7489 0024 1E4A ldr r2, .L355+4 7490 0026 0260 str r2, [r0] -1329:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 7491 .loc 1 1329 3 is_stmt 1 view .LVU2405 -1329:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; - 7492 .loc 1 1329 24 is_stmt 0 view .LVU2406 +1331:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 7491 .loc 1 1331 3 is_stmt 1 view .LVU2405 +1331:Src/main.c **** htim4.Init.CounterMode = TIM_COUNTERMODE_UP; + 7492 .loc 1 1331 24 is_stmt 0 view .LVU2406 7493 0028 4360 str r3, [r0, #4] -1330:Src/main.c **** htim4.Init.Period = 45; - 7494 .loc 1 1330 3 is_stmt 1 view .LVU2407 -1330:Src/main.c **** htim4.Init.Period = 45; - 7495 .loc 1 1330 26 is_stmt 0 view .LVU2408 +1332:Src/main.c **** htim4.Init.Period = 45; + 7494 .loc 1 1332 3 is_stmt 1 view .LVU2407 +1332:Src/main.c **** htim4.Init.Period = 45; + 7495 .loc 1 1332 26 is_stmt 0 view .LVU2408 7496 002a 8360 str r3, [r0, #8] -1331:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7497 .loc 1 1331 3 is_stmt 1 view .LVU2409 -1331:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; - 7498 .loc 1 1331 21 is_stmt 0 view .LVU2410 +1333:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7497 .loc 1 1333 3 is_stmt 1 view .LVU2409 +1333:Src/main.c **** htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1; + 7498 .loc 1 1333 21 is_stmt 0 view .LVU2410 7499 002c 2D22 movs r2, #45 7500 002e C260 str r2, [r0, #12] -1332:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - 7501 .loc 1 1332 3 is_stmt 1 view .LVU2411 -1332:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; - ARM GAS /tmp/ccfIOqv2.s page 507 +1334:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + ARM GAS /tmp/ccyYWdjY.s page 507 - 7502 .loc 1 1332 28 is_stmt 0 view .LVU2412 + 7501 .loc 1 1334 3 is_stmt 1 view .LVU2411 +1334:Src/main.c **** htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; + 7502 .loc 1 1334 28 is_stmt 0 view .LVU2412 7503 0030 0361 str r3, [r0, #16] -1333:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 7504 .loc 1 1333 3 is_stmt 1 view .LVU2413 -1333:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) - 7505 .loc 1 1333 32 is_stmt 0 view .LVU2414 +1335:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 7504 .loc 1 1335 3 is_stmt 1 view .LVU2413 +1335:Src/main.c **** if (HAL_TIM_Base_Init(&htim4) != HAL_OK) + 7505 .loc 1 1335 32 is_stmt 0 view .LVU2414 7506 0032 8361 str r3, [r0, #24] -1334:Src/main.c **** { - 7507 .loc 1 1334 3 is_stmt 1 view .LVU2415 -1334:Src/main.c **** { - 7508 .loc 1 1334 7 is_stmt 0 view .LVU2416 +1336:Src/main.c **** { + 7507 .loc 1 1336 3 is_stmt 1 view .LVU2415 +1336:Src/main.c **** { + 7508 .loc 1 1336 7 is_stmt 0 view .LVU2416 7509 0034 FFF7FEFF bl HAL_TIM_Base_Init 7510 .LVL586: -1334:Src/main.c **** { - 7511 .loc 1 1334 6 discriminator 1 view .LVU2417 +1336:Src/main.c **** { + 7511 .loc 1 1336 6 discriminator 1 view .LVU2417 7512 0038 30BB cbnz r0, .L350 -1338:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 7513 .loc 1 1338 3 is_stmt 1 view .LVU2418 -1338:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) - 7514 .loc 1 1338 34 is_stmt 0 view .LVU2419 +1340:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 7513 .loc 1 1340 3 is_stmt 1 view .LVU2418 +1340:Src/main.c **** if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) + 7514 .loc 1 1340 34 is_stmt 0 view .LVU2419 7515 003a 4FF48053 mov r3, #4096 7516 003e 0A93 str r3, [sp, #40] -1339:Src/main.c **** { - 7517 .loc 1 1339 3 is_stmt 1 view .LVU2420 -1339:Src/main.c **** { - 7518 .loc 1 1339 7 is_stmt 0 view .LVU2421 +1341:Src/main.c **** { + 7517 .loc 1 1341 3 is_stmt 1 view .LVU2420 +1341:Src/main.c **** { + 7518 .loc 1 1341 7 is_stmt 0 view .LVU2421 7519 0040 0AA9 add r1, sp, #40 7520 0042 1648 ldr r0, .L355 7521 0044 FFF7FEFF bl HAL_TIM_ConfigClockSource 7522 .LVL587: -1339:Src/main.c **** { - 7523 .loc 1 1339 6 discriminator 1 view .LVU2422 +1341:Src/main.c **** { + 7523 .loc 1 1341 6 discriminator 1 view .LVU2422 7524 0048 00BB cbnz r0, .L351 -1343:Src/main.c **** { - 7525 .loc 1 1343 3 is_stmt 1 view .LVU2423 -1343:Src/main.c **** { - 7526 .loc 1 1343 7 is_stmt 0 view .LVU2424 +1345:Src/main.c **** { + 7525 .loc 1 1345 3 is_stmt 1 view .LVU2423 +1345:Src/main.c **** { + 7526 .loc 1 1345 7 is_stmt 0 view .LVU2424 7527 004a 1448 ldr r0, .L355 7528 004c FFF7FEFF bl HAL_TIM_PWM_Init 7529 .LVL588: -1343:Src/main.c **** { - 7530 .loc 1 1343 6 discriminator 1 view .LVU2425 +1345:Src/main.c **** { + 7530 .loc 1 1345 6 discriminator 1 view .LVU2425 7531 0050 F0B9 cbnz r0, .L352 -1347:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7532 .loc 1 1347 3 is_stmt 1 view .LVU2426 -1347:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; - 7533 .loc 1 1347 37 is_stmt 0 view .LVU2427 +1349:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 7532 .loc 1 1349 3 is_stmt 1 view .LVU2426 +1349:Src/main.c **** sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE; + 7533 .loc 1 1349 37 is_stmt 0 view .LVU2427 7534 0052 0023 movs r3, #0 7535 0054 0793 str r3, [sp, #28] -1348:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 7536 .loc 1 1348 3 is_stmt 1 view .LVU2428 -1348:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) - 7537 .loc 1 1348 33 is_stmt 0 view .LVU2429 +1350:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 7536 .loc 1 1350 3 is_stmt 1 view .LVU2428 +1350:Src/main.c **** if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK) + 7537 .loc 1 1350 33 is_stmt 0 view .LVU2429 7538 0056 0993 str r3, [sp, #36] -1349:Src/main.c **** { - 7539 .loc 1 1349 3 is_stmt 1 view .LVU2430 -1349:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 508 +1351:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 508 - 7540 .loc 1 1349 7 is_stmt 0 view .LVU2431 + 7539 .loc 1 1351 3 is_stmt 1 view .LVU2430 +1351:Src/main.c **** { + 7540 .loc 1 1351 7 is_stmt 0 view .LVU2431 7541 0058 07A9 add r1, sp, #28 7542 005a 1048 ldr r0, .L355 7543 005c FFF7FEFF bl HAL_TIMEx_MasterConfigSynchronization 7544 .LVL589: -1349:Src/main.c **** { - 7545 .loc 1 1349 6 discriminator 1 view .LVU2432 +1351:Src/main.c **** { + 7545 .loc 1 1351 6 discriminator 1 view .LVU2432 7546 0060 C0B9 cbnz r0, .L353 -1353:Src/main.c **** sConfigOC.Pulse = 22; - 7547 .loc 1 1353 3 is_stmt 1 view .LVU2433 -1353:Src/main.c **** sConfigOC.Pulse = 22; - 7548 .loc 1 1353 20 is_stmt 0 view .LVU2434 +1355:Src/main.c **** sConfigOC.Pulse = 22; + 7547 .loc 1 1355 3 is_stmt 1 view .LVU2433 +1355:Src/main.c **** sConfigOC.Pulse = 22; + 7548 .loc 1 1355 20 is_stmt 0 view .LVU2434 7549 0062 6023 movs r3, #96 7550 0064 0093 str r3, [sp] -1354:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7551 .loc 1 1354 3 is_stmt 1 view .LVU2435 -1354:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; - 7552 .loc 1 1354 19 is_stmt 0 view .LVU2436 +1356:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 7551 .loc 1 1356 3 is_stmt 1 view .LVU2435 +1356:Src/main.c **** sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH; + 7552 .loc 1 1356 19 is_stmt 0 view .LVU2436 7553 0066 1623 movs r3, #22 7554 0068 0193 str r3, [sp, #4] -1355:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7555 .loc 1 1355 3 is_stmt 1 view .LVU2437 -1355:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; - 7556 .loc 1 1355 24 is_stmt 0 view .LVU2438 +1357:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 7555 .loc 1 1357 3 is_stmt 1 view .LVU2437 +1357:Src/main.c **** sConfigOC.OCFastMode = TIM_OCFAST_DISABLE; + 7556 .loc 1 1357 24 is_stmt 0 view .LVU2438 7557 006a 0023 movs r3, #0 7558 006c 0293 str r3, [sp, #8] -1356:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 7559 .loc 1 1356 3 is_stmt 1 view .LVU2439 -1356:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) - 7560 .loc 1 1356 24 is_stmt 0 view .LVU2440 +1358:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 7559 .loc 1 1358 3 is_stmt 1 view .LVU2439 +1358:Src/main.c **** if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK) + 7560 .loc 1 1358 24 is_stmt 0 view .LVU2440 7561 006e 0493 str r3, [sp, #16] -1357:Src/main.c **** { - 7562 .loc 1 1357 3 is_stmt 1 view .LVU2441 -1357:Src/main.c **** { - 7563 .loc 1 1357 7 is_stmt 0 view .LVU2442 +1359:Src/main.c **** { + 7562 .loc 1 1359 3 is_stmt 1 view .LVU2441 +1359:Src/main.c **** { + 7563 .loc 1 1359 7 is_stmt 0 view .LVU2442 7564 0070 0822 movs r2, #8 7565 0072 6946 mov r1, sp 7566 0074 0948 ldr r0, .L355 7567 0076 FFF7FEFF bl HAL_TIM_PWM_ConfigChannel 7568 .LVL590: -1357:Src/main.c **** { - 7569 .loc 1 1357 6 discriminator 1 view .LVU2443 +1359:Src/main.c **** { + 7569 .loc 1 1359 6 discriminator 1 view .LVU2443 7570 007a 68B9 cbnz r0, .L354 -1364:Src/main.c **** - 7571 .loc 1 1364 3 is_stmt 1 view .LVU2444 +1366:Src/main.c **** + 7571 .loc 1 1366 3 is_stmt 1 view .LVU2444 7572 007c 0748 ldr r0, .L355 7573 007e FFF7FEFF bl HAL_TIM_MspPostInit 7574 .LVL591: -1366:Src/main.c **** - 7575 .loc 1 1366 1 is_stmt 0 view .LVU2445 +1368:Src/main.c **** + 7575 .loc 1 1368 1 is_stmt 0 view .LVU2445 7576 0082 0FB0 add sp, sp, #60 7577 .LCFI74: 7578 .cfi_remember_state 7579 .cfi_def_cfa_offset 4 7580 @ sp needed + ARM GAS /tmp/ccyYWdjY.s page 509 + + 7581 0084 5DF804FB ldr pc, [sp], #4 7582 .L350: - ARM GAS /tmp/ccfIOqv2.s page 509 - - 7583 .LCFI75: 7584 .cfi_restore_state -1336:Src/main.c **** } - 7585 .loc 1 1336 5 is_stmt 1 view .LVU2446 +1338:Src/main.c **** } + 7585 .loc 1 1338 5 is_stmt 1 view .LVU2446 7586 0088 FFF7FEFF bl Error_Handler 7587 .LVL592: 7588 .L351: -1341:Src/main.c **** } - 7589 .loc 1 1341 5 view .LVU2447 +1343:Src/main.c **** } + 7589 .loc 1 1343 5 view .LVU2447 7590 008c FFF7FEFF bl Error_Handler 7591 .LVL593: 7592 .L352: -1345:Src/main.c **** } - 7593 .loc 1 1345 5 view .LVU2448 +1347:Src/main.c **** } + 7593 .loc 1 1347 5 view .LVU2448 7594 0090 FFF7FEFF bl Error_Handler 7595 .LVL594: 7596 .L353: -1351:Src/main.c **** } - 7597 .loc 1 1351 5 view .LVU2449 +1353:Src/main.c **** } + 7597 .loc 1 1353 5 view .LVU2449 7598 0094 FFF7FEFF bl Error_Handler 7599 .LVL595: 7600 .L354: -1359:Src/main.c **** } - 7601 .loc 1 1359 5 view .LVU2450 +1361:Src/main.c **** } + 7601 .loc 1 1361 5 view .LVU2450 7602 0098 FFF7FEFF bl Error_Handler 7603 .LVL596: 7604 .L356: @@ -30522,8 +30524,8 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7617 .thumb_func 7619 SystemClock_Config: 7620 .LFB1187: - 802:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; - 7621 .loc 1 802 1 view -0 + 804:Src/main.c **** RCC_OscInitTypeDef RCC_OscInitStruct = {0}; + 7621 .loc 1 804 1 view -0 7622 .cfi_startproc 7623 @ args = 0, pretend = 0, frame = 80 7624 @ frame_needed = 0, uses_anonymous_args = 0 @@ -30534,195 +30536,195 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7629 0002 95B0 sub sp, sp, #84 7630 .LCFI77: 7631 .cfi_def_cfa_offset 88 - 803:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 7632 .loc 1 803 3 view .LVU2452 - 803:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; - 7633 .loc 1 803 22 is_stmt 0 view .LVU2453 - ARM GAS /tmp/ccfIOqv2.s page 510 + 805:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 7632 .loc 1 805 3 view .LVU2452 + ARM GAS /tmp/ccyYWdjY.s page 510 + 805:Src/main.c **** RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; + 7633 .loc 1 805 22 is_stmt 0 view .LVU2453 7634 0004 3422 movs r2, #52 7635 0006 0021 movs r1, #0 7636 0008 07A8 add r0, sp, #28 7637 000a FFF7FEFF bl memset 7638 .LVL597: - 804:Src/main.c **** - 7639 .loc 1 804 3 is_stmt 1 view .LVU2454 - 804:Src/main.c **** - 7640 .loc 1 804 22 is_stmt 0 view .LVU2455 + 806:Src/main.c **** + 7639 .loc 1 806 3 is_stmt 1 view .LVU2454 + 806:Src/main.c **** + 7640 .loc 1 806 22 is_stmt 0 view .LVU2455 7641 000e 0023 movs r3, #0 7642 0010 0293 str r3, [sp, #8] 7643 0012 0393 str r3, [sp, #12] 7644 0014 0493 str r3, [sp, #16] 7645 0016 0593 str r3, [sp, #20] 7646 0018 0693 str r3, [sp, #24] - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7647 .loc 1 808 3 is_stmt 1 view .LVU2456 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7647 .loc 1 810 3 is_stmt 1 view .LVU2456 7648 .LBB545: - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7649 .loc 1 808 3 view .LVU2457 - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7650 .loc 1 808 3 view .LVU2458 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7649 .loc 1 810 3 view .LVU2457 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7650 .loc 1 810 3 view .LVU2458 7651 001a 244B ldr r3, .L365 7652 001c 1A6C ldr r2, [r3, #64] 7653 001e 42F08052 orr r2, r2, #268435456 7654 0022 1A64 str r2, [r3, #64] - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7655 .loc 1 808 3 view .LVU2459 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7655 .loc 1 810 3 view .LVU2459 7656 0024 1B6C ldr r3, [r3, #64] 7657 0026 03F08053 and r3, r3, #268435456 7658 002a 0093 str r3, [sp] - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7659 .loc 1 808 3 view .LVU2460 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7659 .loc 1 810 3 view .LVU2460 7660 002c 009B ldr r3, [sp] 7661 .LBE545: - 808:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); - 7662 .loc 1 808 3 view .LVU2461 - 809:Src/main.c **** - 7663 .loc 1 809 3 view .LVU2462 + 810:Src/main.c **** __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); + 7662 .loc 1 810 3 view .LVU2461 + 811:Src/main.c **** + 7663 .loc 1 811 3 view .LVU2462 7664 .LBB546: - 809:Src/main.c **** - 7665 .loc 1 809 3 view .LVU2463 - 809:Src/main.c **** - 7666 .loc 1 809 3 view .LVU2464 + 811:Src/main.c **** + 7665 .loc 1 811 3 view .LVU2463 + 811:Src/main.c **** + 7666 .loc 1 811 3 view .LVU2464 7667 002e 204B ldr r3, .L365+4 7668 0030 1A68 ldr r2, [r3] 7669 0032 42F44042 orr r2, r2, #49152 7670 0036 1A60 str r2, [r3] - 809:Src/main.c **** - 7671 .loc 1 809 3 view .LVU2465 + 811:Src/main.c **** + 7671 .loc 1 811 3 view .LVU2465 7672 0038 1B68 ldr r3, [r3] 7673 003a 03F44043 and r3, r3, #49152 7674 003e 0193 str r3, [sp, #4] - 809:Src/main.c **** - 7675 .loc 1 809 3 view .LVU2466 + 811:Src/main.c **** + 7675 .loc 1 811 3 view .LVU2466 + ARM GAS /tmp/ccyYWdjY.s page 511 + + 7676 0040 019B ldr r3, [sp, #4] 7677 .LBE546: - ARM GAS /tmp/ccfIOqv2.s page 511 - - - 809:Src/main.c **** - 7678 .loc 1 809 3 view .LVU2467 - 814:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 7679 .loc 1 814 3 view .LVU2468 - 814:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; - 7680 .loc 1 814 36 is_stmt 0 view .LVU2469 + 811:Src/main.c **** + 7678 .loc 1 811 3 view .LVU2467 + 816:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 7679 .loc 1 816 3 view .LVU2468 + 816:Src/main.c **** RCC_OscInitStruct.HSEState = RCC_HSE_ON; + 7680 .loc 1 816 36 is_stmt 0 view .LVU2469 7681 0042 0123 movs r3, #1 7682 0044 0793 str r3, [sp, #28] - 815:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 7683 .loc 1 815 3 is_stmt 1 view .LVU2470 - 815:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; - 7684 .loc 1 815 30 is_stmt 0 view .LVU2471 + 817:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 7683 .loc 1 817 3 is_stmt 1 view .LVU2470 + 817:Src/main.c **** RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + 7684 .loc 1 817 30 is_stmt 0 view .LVU2471 7685 0046 4FF48033 mov r3, #65536 7686 004a 0893 str r3, [sp, #32] - 816:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 7687 .loc 1 816 3 is_stmt 1 view .LVU2472 - 816:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; - 7688 .loc 1 816 34 is_stmt 0 view .LVU2473 + 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 7687 .loc 1 818 3 is_stmt 1 view .LVU2472 + 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + 7688 .loc 1 818 34 is_stmt 0 view .LVU2473 7689 004c 0223 movs r3, #2 7690 004e 0D93 str r3, [sp, #52] - 817:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 7691 .loc 1 817 3 is_stmt 1 view .LVU2474 - 817:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; - 7692 .loc 1 817 35 is_stmt 0 view .LVU2475 + 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 7691 .loc 1 819 3 is_stmt 1 view .LVU2474 + 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLM = 25; + 7692 .loc 1 819 35 is_stmt 0 view .LVU2475 7693 0050 4FF48002 mov r2, #4194304 7694 0054 0E92 str r2, [sp, #56] - 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 7695 .loc 1 818 3 is_stmt 1 view .LVU2476 - 818:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; - 7696 .loc 1 818 30 is_stmt 0 view .LVU2477 + 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 7695 .loc 1 820 3 is_stmt 1 view .LVU2476 + 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLN = 368; + 7696 .loc 1 820 30 is_stmt 0 view .LVU2477 7697 0056 1922 movs r2, #25 7698 0058 0F92 str r2, [sp, #60] - 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 7699 .loc 1 819 3 is_stmt 1 view .LVU2478 - 819:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; - 7700 .loc 1 819 30 is_stmt 0 view .LVU2479 + 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 7699 .loc 1 821 3 is_stmt 1 view .LVU2478 + 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; + 7700 .loc 1 821 30 is_stmt 0 view .LVU2479 7701 005a 4FF4B872 mov r2, #368 7702 005e 1092 str r2, [sp, #64] - 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 7703 .loc 1 820 3 is_stmt 1 view .LVU2480 - 820:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; - 7704 .loc 1 820 30 is_stmt 0 view .LVU2481 + 822:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 7703 .loc 1 822 3 is_stmt 1 view .LVU2480 + 822:Src/main.c **** RCC_OscInitStruct.PLL.PLLQ = 8; + 7704 .loc 1 822 30 is_stmt 0 view .LVU2481 7705 0060 1193 str r3, [sp, #68] - 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 7706 .loc 1 821 3 is_stmt 1 view .LVU2482 - 821:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; - 7707 .loc 1 821 30 is_stmt 0 view .LVU2483 + 823:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 7706 .loc 1 823 3 is_stmt 1 view .LVU2482 + 823:Src/main.c **** RCC_OscInitStruct.PLL.PLLR = 2; + 7707 .loc 1 823 30 is_stmt 0 view .LVU2483 7708 0062 0822 movs r2, #8 7709 0064 1292 str r2, [sp, #72] - 822:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 7710 .loc 1 822 3 is_stmt 1 view .LVU2484 - 822:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) - 7711 .loc 1 822 30 is_stmt 0 view .LVU2485 + 824:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 7710 .loc 1 824 3 is_stmt 1 view .LVU2484 + 824:Src/main.c **** if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) + 7711 .loc 1 824 30 is_stmt 0 view .LVU2485 7712 0066 1393 str r3, [sp, #76] - 823:Src/main.c **** { - 7713 .loc 1 823 3 is_stmt 1 view .LVU2486 - 823:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 512 + 825:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 512 - 7714 .loc 1 823 7 is_stmt 0 view .LVU2487 + 7713 .loc 1 825 3 is_stmt 1 view .LVU2486 + 825:Src/main.c **** { + 7714 .loc 1 825 7 is_stmt 0 view .LVU2487 7715 0068 07A8 add r0, sp, #28 7716 006a FFF7FEFF bl HAL_RCC_OscConfig 7717 .LVL598: - 823:Src/main.c **** { - 7718 .loc 1 823 6 discriminator 1 view .LVU2488 + 825:Src/main.c **** { + 7718 .loc 1 825 6 discriminator 1 view .LVU2488 7719 006e B0B9 cbnz r0, .L362 - 830:Src/main.c **** { - 7720 .loc 1 830 3 is_stmt 1 view .LVU2489 - 830:Src/main.c **** { - 7721 .loc 1 830 7 is_stmt 0 view .LVU2490 + 832:Src/main.c **** { + 7720 .loc 1 832 3 is_stmt 1 view .LVU2489 + 832:Src/main.c **** { + 7721 .loc 1 832 7 is_stmt 0 view .LVU2490 7722 0070 FFF7FEFF bl HAL_PWREx_EnableOverDrive 7723 .LVL599: - 830:Src/main.c **** { - 7724 .loc 1 830 6 discriminator 1 view .LVU2491 + 832:Src/main.c **** { + 7724 .loc 1 832 6 discriminator 1 view .LVU2491 7725 0074 A8B9 cbnz r0, .L363 - 837:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 7726 .loc 1 837 3 is_stmt 1 view .LVU2492 - 837:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; - 7727 .loc 1 837 31 is_stmt 0 view .LVU2493 + 839:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 7726 .loc 1 839 3 is_stmt 1 view .LVU2492 + 839:Src/main.c **** |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; + 7727 .loc 1 839 31 is_stmt 0 view .LVU2493 7728 0076 0F23 movs r3, #15 7729 0078 0293 str r3, [sp, #8] - 839:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 7730 .loc 1 839 3 is_stmt 1 view .LVU2494 - 839:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; - 7731 .loc 1 839 34 is_stmt 0 view .LVU2495 + 841:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 7730 .loc 1 841 3 is_stmt 1 view .LVU2494 + 841:Src/main.c **** RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + 7731 .loc 1 841 34 is_stmt 0 view .LVU2495 7732 007a 0223 movs r3, #2 7733 007c 0393 str r3, [sp, #12] - 840:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 7734 .loc 1 840 3 is_stmt 1 view .LVU2496 - 840:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; - 7735 .loc 1 840 35 is_stmt 0 view .LVU2497 + 842:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 7734 .loc 1 842 3 is_stmt 1 view .LVU2496 + 842:Src/main.c **** RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; + 7735 .loc 1 842 35 is_stmt 0 view .LVU2497 7736 007e 0023 movs r3, #0 7737 0080 0493 str r3, [sp, #16] - 841:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 7738 .loc 1 841 3 is_stmt 1 view .LVU2498 - 841:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; - 7739 .loc 1 841 36 is_stmt 0 view .LVU2499 + 843:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 7738 .loc 1 843 3 is_stmt 1 view .LVU2498 + 843:Src/main.c **** RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; + 7739 .loc 1 843 36 is_stmt 0 view .LVU2499 7740 0082 4FF4A053 mov r3, #5120 7741 0086 0593 str r3, [sp, #20] - 842:Src/main.c **** - 7742 .loc 1 842 3 is_stmt 1 view .LVU2500 - 842:Src/main.c **** - 7743 .loc 1 842 36 is_stmt 0 view .LVU2501 + 844:Src/main.c **** + 7742 .loc 1 844 3 is_stmt 1 view .LVU2500 + 844:Src/main.c **** + 7743 .loc 1 844 36 is_stmt 0 view .LVU2501 7744 0088 4FF48053 mov r3, #4096 7745 008c 0693 str r3, [sp, #24] - 844:Src/main.c **** { - 7746 .loc 1 844 3 is_stmt 1 view .LVU2502 - 844:Src/main.c **** { - 7747 .loc 1 844 7 is_stmt 0 view .LVU2503 + 846:Src/main.c **** { + 7746 .loc 1 846 3 is_stmt 1 view .LVU2502 + 846:Src/main.c **** { + 7747 .loc 1 846 7 is_stmt 0 view .LVU2503 7748 008e 0621 movs r1, #6 7749 0090 02A8 add r0, sp, #8 7750 0092 FFF7FEFF bl HAL_RCC_ClockConfig 7751 .LVL600: - 844:Src/main.c **** { - 7752 .loc 1 844 6 discriminator 1 view .LVU2504 + 846:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 513 + + + 7752 .loc 1 846 6 discriminator 1 view .LVU2504 7753 0096 30B9 cbnz r0, .L364 - ARM GAS /tmp/ccfIOqv2.s page 513 - - - 848:Src/main.c **** - 7754 .loc 1 848 1 view .LVU2505 + 850:Src/main.c **** + 7754 .loc 1 850 1 view .LVU2505 7755 0098 15B0 add sp, sp, #84 7756 .LCFI78: 7757 .cfi_remember_state @@ -30732,18 +30734,18 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7761 .L362: 7762 .LCFI79: 7763 .cfi_restore_state - 825:Src/main.c **** } - 7764 .loc 1 825 5 is_stmt 1 view .LVU2506 + 827:Src/main.c **** } + 7764 .loc 1 827 5 is_stmt 1 view .LVU2506 7765 009e FFF7FEFF bl Error_Handler 7766 .LVL601: 7767 .L363: - 832:Src/main.c **** } - 7768 .loc 1 832 5 view .LVU2507 + 834:Src/main.c **** } + 7768 .loc 1 834 5 view .LVU2507 7769 00a2 FFF7FEFF bl Error_Handler 7770 .LVL602: 7771 .L364: - 846:Src/main.c **** } - 7772 .loc 1 846 5 view .LVU2508 + 848:Src/main.c **** } + 7772 .loc 1 848 5 view .LVU2508 7773 00a6 FFF7FEFF bl Error_Handler 7774 .LVL603: 7775 .L366: @@ -30776,11 +30778,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7803 .cfi_offset 8, -16 7804 .cfi_offset 9, -12 7805 .cfi_offset 10, -8 + ARM GAS /tmp/ccyYWdjY.s page 514 + + 7806 .cfi_offset 14, -4 7807 0004 2DED028B vpush.64 {d8} - ARM GAS /tmp/ccfIOqv2.s page 514 - - 7808 .LCFI81: 7809 .cfi_def_cfa_offset 40 7810 .cfi_offset 80, -40 @@ -30836,11 +30838,11 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7848 .LVL614: 161:Src/main.c **** MX_SPI6_Init(); 7849 .loc 1 161 3 view .LVU2522 + ARM GAS /tmp/ccyYWdjY.s page 515 + + 7850 0036 FFF7FEFF bl MX_SPI5_Init 7851 .LVL615: - ARM GAS /tmp/ccfIOqv2.s page 515 - - 162:Src/main.c **** MX_USART1_UART_Init(); 7852 .loc 1 162 3 view .LVU2523 7853 003a FFF7FEFF bl MX_SPI6_Init @@ -30885,3541 +30887,3508 @@ ARM GAS /tmp/ccfIOqv2.s page 1 7882 .loc 1 173 2 view .LVU2533 7883 0062 FFF7FEFF bl Init_params 7884 .LVL626: - 185:Src/main.c **** - 7885 .loc 1 185 2 view .LVU2534 - 185:Src/main.c **** - 7886 .loc 1 185 14 is_stmt 0 view .LVU2535 - 7887 0066 8749 ldr r1, .L436 - 7888 0068 6423 movs r3, #100 - 7889 006a CB62 str r3, [r1, #44] 187:Src/main.c **** - 7890 .loc 1 187 2 is_stmt 1 view .LVU2536 + 7885 .loc 1 187 2 view .LVU2534 187:Src/main.c **** - 7891 .loc 1 187 23 is_stmt 0 view .LVU2537 - 7892 006c CB6A ldr r3, [r1, #44] - 187:Src/main.c **** - ARM GAS /tmp/ccfIOqv2.s page 516 + 7886 .loc 1 187 14 is_stmt 0 view .LVU2535 + 7887 0066 834A ldr r2, .L436 + 7888 0068 2523 movs r3, #37 + 7889 006a D362 str r3, [r2, #44] + 189:Src/main.c **** + 7890 .loc 1 189 2 is_stmt 1 view .LVU2536 + 189:Src/main.c **** + 7891 .loc 1 189 23 is_stmt 0 view .LVU2537 + ARM GAS /tmp/ccyYWdjY.s page 516 - 7893 .loc 1 187 30 view .LVU2538 + 7892 006c D36A ldr r3, [r2, #44] + 189:Src/main.c **** + 7893 .loc 1 189 30 view .LVU2538 7894 006e 0133 adds r3, r3, #1 - 187:Src/main.c **** - 7895 .loc 1 187 33 view .LVU2539 + 189:Src/main.c **** + 7895 .loc 1 189 33 view .LVU2539 7896 0070 5B08 lsrs r3, r3, #1 - 187:Src/main.c **** - 7897 .loc 1 187 36 view .LVU2540 + 189:Src/main.c **** + 7897 .loc 1 189 36 view .LVU2540 7898 0072 013B subs r3, r3, #1 - 187:Src/main.c **** - 7899 .loc 1 187 15 view .LVU2541 - 7900 0074 CB63 str r3, [r1, #60] - 193:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7901 .loc 1 193 2 is_stmt 1 view .LVU2542 - 193:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7902 .loc 1 193 23 is_stmt 0 view .LVU2543 - 7903 0076 CB6A ldr r3, [r1, #44] - 193:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7904 .loc 1 193 36 view .LVU2544 - 7905 0078 5B00 lsls r3, r3, #1 - 7906 007a 0133 adds r3, r3, #1 - 193:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7907 .loc 1 193 15 view .LVU2545 - 7908 007c 824A ldr r2, .L436+4 - 7909 007e D362 str r3, [r2, #44] - 194:Src/main.c **** - 7910 .loc 1 194 2 is_stmt 1 view .LVU2546 - 194:Src/main.c **** - 7911 .loc 1 194 25 is_stmt 0 view .LVU2547 - 7912 0080 D36A ldr r3, [r2, #44] - 194:Src/main.c **** - 7913 .loc 1 194 32 view .LVU2548 - 7914 0082 0133 adds r3, r3, #1 - 194:Src/main.c **** - 7915 .loc 1 194 35 view .LVU2549 - 7916 0084 5B08 lsrs r3, r3, #1 - 194:Src/main.c **** - 7917 .loc 1 194 38 view .LVU2550 - 7918 0086 013B subs r3, r3, #1 - 194:Src/main.c **** - 7919 .loc 1 194 16 view .LVU2551 - 7920 0088 5363 str r3, [r2, #52] - 200:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7921 .loc 1 200 2 is_stmt 1 view .LVU2552 - 200:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7922 .loc 1 200 22 is_stmt 0 view .LVU2553 - 7923 008a CB6A ldr r3, [r1, #44] - 200:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; - 7924 .loc 1 200 15 view .LVU2554 - 7925 008c D362 str r3, [r2, #44] - 201:Src/main.c **** - 7926 .loc 1 201 2 is_stmt 1 view .LVU2555 - 201:Src/main.c **** - 7927 .loc 1 201 25 is_stmt 0 view .LVU2556 - 7928 008e D36A ldr r3, [r2, #44] - 201:Src/main.c **** - 7929 .loc 1 201 32 view .LVU2557 - 7930 0090 0133 adds r3, r3, #1 - ARM GAS /tmp/ccfIOqv2.s page 517 + 189:Src/main.c **** + 7899 .loc 1 189 15 view .LVU2541 + 7900 0074 D363 str r3, [r2, #60] + 202:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; //duty 50% + 7901 .loc 1 202 2 is_stmt 1 view .LVU2542 + 202:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; //duty 50% + 7902 .loc 1 202 22 is_stmt 0 view .LVU2543 + 7903 0076 D36A ldr r3, [r2, #44] + 202:Src/main.c **** TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; //duty 50% + 7904 .loc 1 202 15 view .LVU2544 + 7905 0078 02F5A032 add r2, r2, #81920 + 7906 007c D362 str r3, [r2, #44] + 203:Src/main.c **** + 7907 .loc 1 203 2 is_stmt 1 view .LVU2545 + 203:Src/main.c **** + 7908 .loc 1 203 25 is_stmt 0 view .LVU2546 + 7909 007e D36A ldr r3, [r2, #44] + 203:Src/main.c **** + 7910 .loc 1 203 32 view .LVU2547 + 7911 0080 0133 adds r3, r3, #1 + 203:Src/main.c **** + 7912 .loc 1 203 35 view .LVU2548 + 7913 0082 5B08 lsrs r3, r3, #1 + 203:Src/main.c **** + 7914 .loc 1 203 38 view .LVU2549 + 7915 0084 013B subs r3, r3, #1 + 203:Src/main.c **** + 7916 .loc 1 203 16 view .LVU2550 + 7917 0086 5363 str r3, [r2, #52] + 7918 0088 4CE0 b .L368 + 7919 .L426: + 219:Src/main.c **** { + 7920 .loc 1 219 85 discriminator 1 view .LVU2551 + 7921 008a 7B4B ldr r3, .L436+4 + 7922 008c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 219:Src/main.c **** { + 7923 .loc 1 219 73 discriminator 1 view .LVU2552 + 7924 008e 002B cmp r3, #0 + 7925 0090 4FD1 bne .L369 + 7926 .L370: + 7927 .LBB547: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 7928 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2553 + 7929 .LBB548: +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 7930 .loc 7 3073 3 discriminator 1 view .LVU2554 +3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + ARM GAS /tmp/ccyYWdjY.s page 517 - 201:Src/main.c **** - 7931 .loc 1 201 35 view .LVU2558 - 7932 0092 5B08 lsrs r3, r3, #1 - 201:Src/main.c **** - 7933 .loc 1 201 38 view .LVU2559 - 7934 0094 013B subs r3, r3, #1 - 201:Src/main.c **** - 7935 .loc 1 201 16 view .LVU2560 - 7936 0096 5363 str r3, [r2, #52] - 7937 0098 4CE0 b .L368 - 7938 .L426: - 217:Src/main.c **** { - 7939 .loc 1 217 85 discriminator 1 view .LVU2561 - 7940 009a 7C4B ldr r3, .L436+8 - 7941 009c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 217:Src/main.c **** { - 7942 .loc 1 217 73 discriminator 1 view .LVU2562 - 7943 009e 002B cmp r3, #0 - 7944 00a0 4FD1 bne .L369 - 7945 .L370: - 7946 .LBB547: + 7931 .loc 7 3073 3 discriminator 1 view .LVU2555 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7947 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2563 - 7948 .LBB548: -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7949 .loc 7 3073 3 discriminator 1 view .LVU2564 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7950 .loc 7 3073 3 discriminator 1 view .LVU2565 -3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7951 .loc 7 3073 3 discriminator 1 view .LVU2566 - 7952 .LVL627: - 7953 .LBB549: - 7954 .LBI549: + 7932 .loc 7 3073 3 discriminator 1 view .LVU2556 + 7933 .LVL627: + 7934 .LBB549: + 7935 .LBI549: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 7955 .loc 8 1068 31 view .LVU2567 - 7956 .LBB550: + 7936 .loc 8 1068 31 view .LVU2557 + 7937 .LBB550: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 7957 .loc 8 1070 5 view .LVU2568 + 7938 .loc 8 1070 5 view .LVU2558 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 7958 .loc 8 1072 4 view .LVU2569 - 7959 00a2 7B4A ldr r2, .L436+12 - 7960 .syntax unified - 7961 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7962 00a4 52E8003F ldrex r3, [r2] - 7963 @ 0 "" 2 - 7964 .LVL628: + 7939 .loc 8 1072 4 view .LVU2559 + 7940 0092 7A4A ldr r2, .L436+8 + 7941 .syntax unified + 7942 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7943 0094 52E8003F ldrex r3, [r2] + 7944 @ 0 "" 2 + 7945 .LVL628: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7965 .loc 8 1073 4 view .LVU2570 + 7946 .loc 8 1073 4 view .LVU2560 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 7966 .loc 8 1073 4 is_stmt 0 view .LVU2571 - 7967 .thumb - 7968 .syntax unified - 7969 .LBE550: - 7970 .LBE549: + 7947 .loc 8 1073 4 is_stmt 0 view .LVU2561 + 7948 .thumb + 7949 .syntax unified + 7950 .LBE550: + 7951 .LBE549: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7971 .loc 7 3073 3 discriminator 1 view .LVU2572 - 7972 00a8 43F48073 orr r3, r3, #256 - ARM GAS /tmp/ccfIOqv2.s page 518 - - - 7973 .LVL629: + 7952 .loc 7 3073 3 discriminator 1 view .LVU2562 + 7953 0098 43F48073 orr r3, r3, #256 + 7954 .LVL629: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7974 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2573 - 7975 .LBB551: - 7976 .LBI551: + 7955 .loc 7 3073 3 is_stmt 1 discriminator 1 view .LVU2563 + 7956 .LBB551: + 7957 .LBI551: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 7977 .loc 8 1119 31 view .LVU2574 - 7978 .LBB552: + 7958 .loc 8 1119 31 view .LVU2564 + 7959 .LBB552: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 7979 .loc 8 1121 4 view .LVU2575 + 7960 .loc 8 1121 4 view .LVU2565 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 7980 .loc 8 1123 4 view .LVU2576 - 7981 .syntax unified - 7982 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 7983 00ac 42E80031 strex r1, r3, [r2] - 7984 @ 0 "" 2 - 7985 .LVL630: - 7986 .loc 8 1124 4 view .LVU2577 - 7987 .loc 8 1124 4 is_stmt 0 view .LVU2578 - 7988 .thumb - 7989 .syntax unified - 7990 .LBE552: - 7991 .LBE551: + 7961 .loc 8 1123 4 view .LVU2566 + 7962 .syntax unified + 7963 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7964 009c 42E80031 strex r1, r3, [r2] + 7965 @ 0 "" 2 + 7966 .LVL630: + 7967 .loc 8 1124 4 view .LVU2567 + 7968 .loc 8 1124 4 is_stmt 0 view .LVU2568 + 7969 .thumb + 7970 .syntax unified + 7971 .LBE552: + 7972 .LBE551: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7992 .loc 7 3073 3 discriminator 1 view .LVU2579 - 7993 00b0 0029 cmp r1, #0 - 7994 00b2 F6D1 bne .L370 - 7995 .LVL631: - 7996 .L371: + 7973 .loc 7 3073 3 discriminator 1 view .LVU2569 + 7974 00a0 0029 cmp r1, #0 + 7975 00a2 F6D1 bne .L370 + ARM GAS /tmp/ccyYWdjY.s page 518 + + + 7976 .LVL631: + 7977 .L371: 3073:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 7997 .loc 7 3073 3 discriminator 1 view .LVU2580 - 7998 .LBE548: - 7999 .LBE547: - 8000 .LBB553: + 7978 .loc 7 3073 3 discriminator 1 view .LVU2570 + 7979 .LBE548: + 7980 .LBE547: + 7981 .LBB553: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8001 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2581 - 8002 .LBB554: + 7982 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2571 + 7983 .LBB554: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8003 .loc 7 3040 3 discriminator 1 view .LVU2582 + 7984 .loc 7 3040 3 discriminator 1 view .LVU2572 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8004 .loc 7 3040 3 discriminator 1 view .LVU2583 + 7985 .loc 7 3040 3 discriminator 1 view .LVU2573 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8005 .loc 7 3040 3 discriminator 1 view .LVU2584 - 8006 .LBB555: - 8007 .LBI555: + 7986 .loc 7 3040 3 discriminator 1 view .LVU2574 + 7987 .LBB555: + 7988 .LBI555: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8008 .loc 8 1068 31 view .LVU2585 - 8009 .LBB556: + 7989 .loc 8 1068 31 view .LVU2575 + 7990 .LBB556: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8010 .loc 8 1070 5 view .LVU2586 + 7991 .loc 8 1070 5 view .LVU2576 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8011 .loc 8 1072 4 view .LVU2587 - 8012 00b4 764A ldr r2, .L436+12 - 8013 .syntax unified - 8014 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8015 00b6 52E8003F ldrex r3, [r2] - 8016 @ 0 "" 2 - ARM GAS /tmp/ccfIOqv2.s page 519 - - - 8017 .LVL632: + 7992 .loc 8 1072 4 view .LVU2577 + 7993 00a4 754A ldr r2, .L436+8 + 7994 .syntax unified + 7995 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 7996 00a6 52E8003F ldrex r3, [r2] + 7997 @ 0 "" 2 + 7998 .LVL632: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8018 .loc 8 1073 4 view .LVU2588 + 7999 .loc 8 1073 4 view .LVU2578 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8019 .loc 8 1073 4 is_stmt 0 view .LVU2589 - 8020 .thumb - 8021 .syntax unified - 8022 .LBE556: - 8023 .LBE555: + 8000 .loc 8 1073 4 is_stmt 0 view .LVU2579 + 8001 .thumb + 8002 .syntax unified + 8003 .LBE556: + 8004 .LBE555: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8024 .loc 7 3040 3 discriminator 1 view .LVU2590 - 8025 00ba 43F02003 orr r3, r3, #32 - 8026 .LVL633: + 8005 .loc 7 3040 3 discriminator 1 view .LVU2580 + 8006 00aa 43F02003 orr r3, r3, #32 + 8007 .LVL633: 3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8027 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2591 - 8028 .LBB557: - 8029 .LBI557: + 8008 .loc 7 3040 3 is_stmt 1 discriminator 1 view .LVU2581 + 8009 .LBB557: + 8010 .LBI557: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8030 .loc 8 1119 31 view .LVU2592 - 8031 .LBB558: + 8011 .loc 8 1119 31 view .LVU2582 + 8012 .LBB558: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8032 .loc 8 1121 4 view .LVU2593 + 8013 .loc 8 1121 4 view .LVU2583 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8033 .loc 8 1123 4 view .LVU2594 - 8034 .syntax unified - 8035 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8036 00be 42E80031 strex r1, r3, [r2] - 8037 @ 0 "" 2 - 8038 .LVL634: - 8039 .loc 8 1124 4 view .LVU2595 - 8040 .loc 8 1124 4 is_stmt 0 view .LVU2596 - 8041 .thumb - 8042 .syntax unified - 8043 .LBE558: - 8044 .LBE557: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8045 .loc 7 3040 3 discriminator 1 view .LVU2597 - 8046 00c2 0029 cmp r1, #0 - 8047 00c4 F6D1 bne .L371 - 8048 .LVL635: - 8049 .L372: -3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8050 .loc 7 3040 3 discriminator 1 view .LVU2598 - 8051 .LBE554: - 8052 .LBE553: - 8053 .LBB559: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8054 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2599 - 8055 .LBB560: -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8056 .loc 7 3136 3 discriminator 1 view .LVU2600 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8057 .loc 7 3136 3 discriminator 1 view .LVU2601 -3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8058 .loc 7 3136 3 discriminator 1 view .LVU2602 - 8059 .LBB561: - 8060 .LBI561: - ARM GAS /tmp/ccfIOqv2.s page 520 + 8014 .loc 8 1123 4 view .LVU2584 + 8015 .syntax unified + 8016 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8017 00ae 42E80031 strex r1, r3, [r2] + ARM GAS /tmp/ccyYWdjY.s page 519 + 8018 @ 0 "" 2 + 8019 .LVL634: + 8020 .loc 8 1124 4 view .LVU2585 + 8021 .loc 8 1124 4 is_stmt 0 view .LVU2586 + 8022 .thumb + 8023 .syntax unified + 8024 .LBE558: + 8025 .LBE557: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8026 .loc 7 3040 3 discriminator 1 view .LVU2587 + 8027 00b2 0029 cmp r1, #0 + 8028 00b4 F6D1 bne .L371 + 8029 .LVL635: + 8030 .L372: +3040:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8031 .loc 7 3040 3 discriminator 1 view .LVU2588 + 8032 .LBE554: + 8033 .LBE553: + 8034 .LBB559: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8035 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2589 + 8036 .LBB560: +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8037 .loc 7 3136 3 discriminator 1 view .LVU2590 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8038 .loc 7 3136 3 discriminator 1 view .LVU2591 +3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } + 8039 .loc 7 3136 3 discriminator 1 view .LVU2592 + 8040 .LBB561: + 8041 .LBI561: 1068:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8061 .loc 8 1068 31 view .LVU2603 - 8062 .LBB562: + 8042 .loc 8 1068 31 view .LVU2593 + 8043 .LBB562: 1070:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8063 .loc 8 1070 5 view .LVU2604 + 8044 .loc 8 1070 5 view .LVU2594 1072:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8064 .loc 8 1072 4 view .LVU2605 - 8065 00c6 724A ldr r2, .L436+12 - 8066 00c8 02F10803 add r3, r2, #8 - 8067 .syntax unified - 8068 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8069 00cc 53E8003F ldrex r3, [r3] - 8070 @ 0 "" 2 - 8071 .LVL636: + 8045 .loc 8 1072 4 view .LVU2595 + 8046 00b6 714A ldr r2, .L436+8 + 8047 00b8 02F10803 add r3, r2, #8 + 8048 .syntax unified + 8049 @ 1072 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8050 00bc 53E8003F ldrex r3, [r3] + 8051 @ 0 "" 2 + 8052 .LVL636: 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8072 .loc 8 1073 4 view .LVU2606 + 8053 .loc 8 1073 4 view .LVU2596 1073:Drivers/CMSIS/Include/cmsis_gcc.h **** } - 8073 .loc 8 1073 4 is_stmt 0 view .LVU2607 - 8074 .thumb - 8075 .syntax unified - 8076 .LBE562: - 8077 .LBE561: + 8054 .loc 8 1073 4 is_stmt 0 view .LVU2597 + 8055 .thumb + 8056 .syntax unified + 8057 .LBE562: + 8058 .LBE561: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8078 .loc 7 3136 3 discriminator 1 view .LVU2608 - 8079 00d0 43F00103 orr r3, r3, #1 - 8080 .LVL637: + 8059 .loc 7 3136 3 discriminator 1 view .LVU2598 + 8060 00c0 43F00103 orr r3, r3, #1 + 8061 .LVL637: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8081 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2609 - 8082 .LBB563: - 8083 .LBI563: + ARM GAS /tmp/ccyYWdjY.s page 520 + + + 8062 .loc 7 3136 3 is_stmt 1 discriminator 1 view .LVU2599 + 8063 .LBB563: + 8064 .LBI563: 1119:Drivers/CMSIS/Include/cmsis_gcc.h **** { - 8084 .loc 8 1119 31 view .LVU2610 - 8085 .LBB564: + 8065 .loc 8 1119 31 view .LVU2600 + 8066 .LBB564: 1121:Drivers/CMSIS/Include/cmsis_gcc.h **** - 8086 .loc 8 1121 4 view .LVU2611 + 8067 .loc 8 1121 4 view .LVU2601 1123:Drivers/CMSIS/Include/cmsis_gcc.h **** return(result); - 8087 .loc 8 1123 4 view .LVU2612 - 8088 00d4 0832 adds r2, r2, #8 - 8089 .syntax unified - 8090 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 - 8091 00d6 42E80031 strex r1, r3, [r2] - 8092 @ 0 "" 2 - 8093 .LVL638: - 8094 .loc 8 1124 4 view .LVU2613 - 8095 .loc 8 1124 4 is_stmt 0 view .LVU2614 - 8096 .thumb - 8097 .syntax unified - 8098 .LBE564: - 8099 .LBE563: + 8068 .loc 8 1123 4 view .LVU2602 + 8069 00c4 0832 adds r2, r2, #8 + 8070 .syntax unified + 8071 @ 1123 "Drivers/CMSIS/Include/cmsis_gcc.h" 1 + 8072 00c6 42E80031 strex r1, r3, [r2] + 8073 @ 0 "" 2 + 8074 .LVL638: + 8075 .loc 8 1124 4 view .LVU2603 + 8076 .loc 8 1124 4 is_stmt 0 view .LVU2604 + 8077 .thumb + 8078 .syntax unified + 8079 .LBE564: + 8080 .LBE563: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8100 .loc 7 3136 3 discriminator 1 view .LVU2615 - 8101 00da 0029 cmp r1, #0 - 8102 00dc F3D1 bne .L372 - 8103 .LBE560: + 8081 .loc 7 3136 3 discriminator 1 view .LVU2605 + 8082 00ca 0029 cmp r1, #0 + 8083 00cc F3D1 bne .L372 + 8084 .LBE560: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8104 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU2616 - 8105 .LVL639: - ARM GAS /tmp/ccfIOqv2.s page 521 - - + 8085 .loc 7 3136 3 is_stmt 1 discriminator 2 view .LVU2606 + 8086 .LVL639: 3136:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_usart.h **** } - 8106 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2617 - 8107 .LBE559: - 223:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... - 8108 .loc 1 223 4 is_stmt 1 view .LVU2618 - 8109 .LBB565: - 8110 .LBI565: + 8087 .loc 7 3136 3 is_stmt 0 discriminator 2 view .LVU2607 + 8088 .LBE559: + 225:Src/main.c **** NVIC_EnableIRQ(USART1_IRQn);//In other case you have FE error flag... + 8089 .loc 1 225 4 is_stmt 1 view .LVU2608 + 8090 .LBB565: + 8091 .LBI565: 2024:Drivers/CMSIS/Include/core_cm7.h **** { - 8111 .loc 2 2024 22 view .LVU2619 - 8112 .LBB566: + 8092 .loc 2 2024 22 view .LVU2609 + 8093 .LBB566: 2026:Drivers/CMSIS/Include/core_cm7.h **** { - 8113 .loc 2 2026 3 view .LVU2620 + 8094 .loc 2 2026 3 view .LVU2610 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8114 .loc 2 2028 5 view .LVU2621 + 8095 .loc 2 2028 5 view .LVU2611 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8115 .loc 2 2028 47 is_stmt 0 view .LVU2622 - 8116 00de 6D4B ldr r3, .L436+16 - 8117 00e0 0022 movs r2, #0 - 8118 00e2 83F82523 strb r2, [r3, #805] - 8119 .LVL640: + 8096 .loc 2 2028 47 is_stmt 0 view .LVU2612 + 8097 00ce 6C4B ldr r3, .L436+12 + 8098 00d0 0022 movs r2, #0 + 8099 00d2 83F82523 strb r2, [r3, #805] + 8100 .LVL640: 2028:Drivers/CMSIS/Include/core_cm7.h **** } - 8120 .loc 2 2028 47 view .LVU2623 - 8121 .LBE566: - 8122 .LBE565: - 224:Src/main.c **** u_rx_flg = 1; - 8123 .loc 1 224 4 is_stmt 1 view .LVU2624 - 8124 .LBB567: - 8125 .LBI567: + 8101 .loc 2 2028 47 view .LVU2613 + 8102 .LBE566: + 8103 .LBE565: + 226:Src/main.c **** u_rx_flg = 1; + 8104 .loc 1 226 4 is_stmt 1 view .LVU2614 + 8105 .LBB567: + ARM GAS /tmp/ccyYWdjY.s page 521 + + + 8106 .LBI567: 1896:Drivers/CMSIS/Include/core_cm7.h **** { - 8126 .loc 2 1896 22 view .LVU2625 - 8127 .LBB568: + 8107 .loc 2 1896 22 view .LVU2615 + 8108 .LBB568: 1898:Drivers/CMSIS/Include/core_cm7.h **** { - 8128 .loc 2 1898 3 view .LVU2626 + 8109 .loc 2 1898 3 view .LVU2616 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8129 .loc 2 1900 5 view .LVU2627 + 8110 .loc 2 1900 5 view .LVU2617 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8130 .loc 2 1900 43 is_stmt 0 view .LVU2628 - 8131 00e6 2022 movs r2, #32 - 8132 00e8 5A60 str r2, [r3, #4] - 8133 .LVL641: + 8111 .loc 2 1900 43 is_stmt 0 view .LVU2618 + 8112 00d6 2022 movs r2, #32 + 8113 00d8 5A60 str r2, [r3, #4] + 8114 .LVL641: 1900:Drivers/CMSIS/Include/core_cm7.h **** } - 8134 .loc 2 1900 43 view .LVU2629 - 8135 .LBE568: - 8136 .LBE567: - 225:Src/main.c **** } - 8137 .loc 1 225 4 is_stmt 1 view .LVU2630 - 225:Src/main.c **** } - 8138 .loc 1 225 13 is_stmt 0 view .LVU2631 - 8139 00ea 684B ldr r3, .L436+8 - 8140 00ec 0122 movs r2, #1 - 8141 00ee 1A70 strb r2, [r3] - 8142 00f0 27E0 b .L369 - 8143 .L384: - 235:Src/main.c **** task.current_param = task.min_param; - 8144 .loc 1 235 6 is_stmt 1 view .LVU2632 - 235:Src/main.c **** task.current_param = task.min_param; - 8145 .loc 1 235 20 is_stmt 0 view .LVU2633 - ARM GAS /tmp/ccfIOqv2.s page 522 + 8115 .loc 2 1900 43 view .LVU2619 + 8116 .LBE568: + 8117 .LBE567: + 227:Src/main.c **** } + 8118 .loc 1 227 4 is_stmt 1 view .LVU2620 + 227:Src/main.c **** } + 8119 .loc 1 227 13 is_stmt 0 view .LVU2621 + 8120 00da 674B ldr r3, .L436+4 + 8121 00dc 0122 movs r2, #1 + 8122 00de 1A70 strb r2, [r3] + 8123 00e0 27E0 b .L369 + 8124 .L384: + 237:Src/main.c **** task.current_param = task.min_param; + 8125 .loc 1 237 6 is_stmt 1 view .LVU2622 + 237:Src/main.c **** task.current_param = task.min_param; + 8126 .loc 1 237 20 is_stmt 0 view .LVU2623 + 8127 00e2 684B ldr r3, .L436+16 + 8128 00e4 0022 movs r2, #0 + 8129 00e6 1A70 strb r2, [r3] + 238:Src/main.c **** Stop_TIM10(); + 8130 .loc 1 238 6 is_stmt 1 view .LVU2624 + 238:Src/main.c **** Stop_TIM10(); + 8131 .loc 1 238 31 is_stmt 0 view .LVU2625 + 8132 00e8 674B ldr r3, .L436+20 + 8133 00ea 5A68 ldr r2, [r3, #4] @ float + 238:Src/main.c **** Stop_TIM10(); + 8134 .loc 1 238 25 view .LVU2626 + 8135 00ec 1A61 str r2, [r3, #16] @ float + 239:Src/main.c **** break; + 8136 .loc 1 239 6 is_stmt 1 view .LVU2627 + 8137 00ee FFF7FEFF bl Stop_TIM10 + 8138 .LVL642: + 240:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message + 8139 .loc 1 240 5 view .LVU2628 + 8140 .L373: + 743:Src/main.c **** { + 8141 .loc 1 743 3 view .LVU2629 + 8142 00f2 664B ldr r3, .L436+24 + 8143 00f4 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8144 00f6 022B cmp r3, #2 + 8145 00f8 00F04984 beq .L415 + 8146 00fc 032B cmp r3, #3 + 8147 00fe 00F07C84 beq .L422 + ARM GAS /tmp/ccyYWdjY.s page 522 - 8146 00f2 694B ldr r3, .L436+20 - 8147 00f4 0022 movs r2, #0 - 8148 00f6 1A70 strb r2, [r3] - 236:Src/main.c **** Stop_TIM10(); - 8149 .loc 1 236 6 is_stmt 1 view .LVU2634 - 236:Src/main.c **** Stop_TIM10(); - 8150 .loc 1 236 31 is_stmt 0 view .LVU2635 - 8151 00f8 684B ldr r3, .L436+24 - 8152 00fa 5A68 ldr r2, [r3, #4] @ float - 236:Src/main.c **** Stop_TIM10(); - 8153 .loc 1 236 25 view .LVU2636 - 8154 00fc 1A61 str r2, [r3, #16] @ float - 237:Src/main.c **** break; - 8155 .loc 1 237 6 is_stmt 1 view .LVU2637 - 8156 00fe FFF7FEFF bl Stop_TIM10 - 8157 .LVL642: - 238:Src/main.c **** case DECODE_ENABLE://1 - Decode rec. message - 8158 .loc 1 238 5 view .LVU2638 - 8159 .L373: - 741:Src/main.c **** { - 8160 .loc 1 741 3 view .LVU2639 - 8161 0102 674B ldr r3, .L436+28 - 8162 0104 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8163 0106 022B cmp r3, #2 - 8164 0108 00F04B84 beq .L415 - 8165 010c 032B cmp r3, #3 - 8166 010e 00F07E84 beq .L422 - 8167 0112 012B cmp r3, #1 - 8168 0114 09D1 bne .L417 - 744:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); - 8169 .loc 1 744 5 view .LVU2640 - 8170 0116 634C ldr r4, .L436+32 - 8171 0118 0221 movs r1, #2 - 8172 011a 2046 mov r0, r4 - 8173 011c FFF7FEFF bl USART_TX - 8174 .LVL643: - 746:Src/main.c **** State_Data[1]=0;//All OK! - 8175 .loc 1 746 5 view .LVU2641 - 746:Src/main.c **** State_Data[1]=0;//All OK! - 8176 .loc 1 746 18 is_stmt 0 view .LVU2642 - 8177 0120 0023 movs r3, #0 - 8178 0122 2370 strb r3, [r4] - 747:Src/main.c **** UART_transmission_request = NO_MESS; - 8179 .loc 1 747 5 is_stmt 1 view .LVU2643 - 747:Src/main.c **** UART_transmission_request = NO_MESS; - 8180 .loc 1 747 18 is_stmt 0 view .LVU2644 - 8181 0124 6370 strb r3, [r4, #1] - 748:Src/main.c **** break; - 8182 .loc 1 748 5 is_stmt 1 view .LVU2645 - 748:Src/main.c **** break; - 8183 .loc 1 748 31 is_stmt 0 view .LVU2646 - 8184 0126 5E4A ldr r2, .L436+28 - 8185 0128 1370 strb r3, [r2] - 749:Src/main.c **** case MESS_02://Transmith packet - 8186 .loc 1 749 4 is_stmt 1 view .LVU2647 - 8187 .L417: - 783:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 523 + 8148 0102 012B cmp r3, #1 + 8149 0104 09D1 bne .L417 + 746:Src/main.c **** //HAL_UART_Transmit(&huart1, State_Data, 2, 10); + 8150 .loc 1 746 5 view .LVU2630 + 8151 0106 624C ldr r4, .L436+28 + 8152 0108 0221 movs r1, #2 + 8153 010a 2046 mov r0, r4 + 8154 010c FFF7FEFF bl USART_TX + 8155 .LVL643: + 748:Src/main.c **** State_Data[1]=0;//All OK! + 8156 .loc 1 748 5 view .LVU2631 + 748:Src/main.c **** State_Data[1]=0;//All OK! + 8157 .loc 1 748 18 is_stmt 0 view .LVU2632 + 8158 0110 0023 movs r3, #0 + 8159 0112 2370 strb r3, [r4] + 749:Src/main.c **** UART_transmission_request = NO_MESS; + 8160 .loc 1 749 5 is_stmt 1 view .LVU2633 + 749:Src/main.c **** UART_transmission_request = NO_MESS; + 8161 .loc 1 749 18 is_stmt 0 view .LVU2634 + 8162 0114 6370 strb r3, [r4, #1] + 750:Src/main.c **** break; + 8163 .loc 1 750 5 is_stmt 1 view .LVU2635 + 750:Src/main.c **** break; + 8164 .loc 1 750 31 is_stmt 0 view .LVU2636 + 8165 0116 5D4A ldr r2, .L436+24 + 8166 0118 1370 strb r3, [r2] + 751:Src/main.c **** case MESS_02://Transmith packet + 8167 .loc 1 751 4 is_stmt 1 view .LVU2637 + 8168 .L417: + 785:Src/main.c **** { + 8169 .loc 1 785 5 view .LVU2638 + 785:Src/main.c **** { + 8170 .loc 1 785 17 is_stmt 0 view .LVU2639 + 8171 011a 5E4B ldr r3, .L436+32 + 8172 011c 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 785:Src/main.c **** { + 8173 .loc 1 785 8 view .LVU2640 + 8174 011e 012B cmp r3, #1 + 8175 0120 00F06D84 beq .L425 + 8176 .L368: + 217:Src/main.c **** { + 8177 .loc 1 217 3 is_stmt 1 view .LVU2641 + 219:Src/main.c **** { + 8178 .loc 1 219 3 view .LVU2642 + 219:Src/main.c **** { + 8179 .loc 1 219 8 is_stmt 0 view .LVU2643 + 8180 0124 4FF48071 mov r1, #256 + 8181 0128 5B48 ldr r0, .L436+36 + 8182 012a FFF7FEFF bl HAL_GPIO_ReadPin + 8183 .LVL644: + 219:Src/main.c **** { + 8184 .loc 1 219 6 discriminator 1 view .LVU2644 + 8185 012e 0128 cmp r0, #1 + 8186 0130 ABD0 beq .L426 + 8187 .L369: + 234:Src/main.c **** { + 8188 .loc 1 234 4 is_stmt 1 view .LVU2645 + ARM GAS /tmp/ccyYWdjY.s page 523 - 8188 .loc 1 783 5 view .LVU2648 - 783:Src/main.c **** { - 8189 .loc 1 783 17 is_stmt 0 view .LVU2649 - 8190 012a 5F4B ldr r3, .L436+36 - 8191 012c 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 783:Src/main.c **** { - 8192 .loc 1 783 8 view .LVU2650 - 8193 012e 012B cmp r3, #1 - 8194 0130 00F06F84 beq .L425 - 8195 .L368: - 215:Src/main.c **** { - 8196 .loc 1 215 3 is_stmt 1 view .LVU2651 - 217:Src/main.c **** { - 8197 .loc 1 217 3 view .LVU2652 - 217:Src/main.c **** { - 8198 .loc 1 217 8 is_stmt 0 view .LVU2653 - 8199 0134 4FF48071 mov r1, #256 - 8200 0138 5C48 ldr r0, .L436+40 - 8201 013a FFF7FEFF bl HAL_GPIO_ReadPin - 8202 .LVL644: - 217:Src/main.c **** { - 8203 .loc 1 217 6 discriminator 1 view .LVU2654 - 8204 013e 0128 cmp r0, #1 - 8205 0140 ABD0 beq .L426 - 8206 .L369: - 232:Src/main.c **** { - 8207 .loc 1 232 4 is_stmt 1 view .LVU2655 - 8208 0142 5B4B ldr r3, .L436+44 - 8209 0144 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8210 0146 092B cmp r3, #9 - 8211 0148 DBD8 bhi .L373 - 8212 014a 01A2 adr r2, .L375 - 8213 014c 52F823F0 ldr pc, [r2, r3, lsl #2] - 8214 .p2align 2 - 8215 .L375: - 8216 0150 F3000000 .word .L384+1 - 8217 0154 79010000 .word .L383+1 - 8218 0158 E3010000 .word .L382+1 - 8219 015c 19020000 .word .L381+1 - 8220 0160 49020000 .word .L380+1 - 8221 0164 59020000 .word .L379+1 - 8222 0168 75020000 .word .L378+1 - 8223 016c DD020000 .word .L377+1 - 8224 0170 31040000 .word .L376+1 - 8225 0174 77040000 .word .L374+1 - 8226 .p2align 1 - 8227 .L383: - 240:Src/main.c **** if (CheckChecksum(COMMAND)) - 8228 .loc 1 240 6 view .LVU2656 - 240:Src/main.c **** if (CheckChecksum(COMMAND)) - 8229 .loc 1 240 18 is_stmt 0 view .LVU2657 - 8230 0178 4E4C ldr r4, .L436+48 - 8231 017a 0D21 movs r1, #13 - 8232 017c 2046 mov r0, r4 - 8233 017e FFF7FEFF bl CalculateChecksum - 8234 .LVL645: - 240:Src/main.c **** if (CheckChecksum(COMMAND)) - ARM GAS /tmp/ccfIOqv2.s page 524 + 8189 0132 5A4B ldr r3, .L436+40 + 8190 0134 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8191 0136 092B cmp r3, #9 + 8192 0138 DBD8 bhi .L373 + 8193 013a 01A2 adr r2, .L375 + 8194 013c 52F823F0 ldr pc, [r2, r3, lsl #2] + 8195 .p2align 2 + 8196 .L375: + 8197 0140 E3000000 .word .L384+1 + 8198 0144 69010000 .word .L383+1 + 8199 0148 D3010000 .word .L382+1 + 8200 014c 09020000 .word .L381+1 + 8201 0150 39020000 .word .L380+1 + 8202 0154 49020000 .word .L379+1 + 8203 0158 65020000 .word .L378+1 + 8204 015c C9020000 .word .L377+1 + 8205 0160 1D040000 .word .L376+1 + 8206 0164 63040000 .word .L374+1 + 8207 .p2align 1 + 8208 .L383: + 242:Src/main.c **** if (CheckChecksum(COMMAND)) + 8209 .loc 1 242 6 view .LVU2646 + 242:Src/main.c **** if (CheckChecksum(COMMAND)) + 8210 .loc 1 242 18 is_stmt 0 view .LVU2647 + 8211 0168 4D4C ldr r4, .L436+44 + 8212 016a 0D21 movs r1, #13 + 8213 016c 2046 mov r0, r4 + 8214 016e FFF7FEFF bl CalculateChecksum + 8215 .LVL645: + 242:Src/main.c **** if (CheckChecksum(COMMAND)) + 8216 .loc 1 242 16 discriminator 1 view .LVU2648 + 8217 0172 4C4B ldr r3, .L436+48 + 8218 0174 1880 strh r0, [r3] @ movhi + 243:Src/main.c **** { + 8219 .loc 1 243 6 is_stmt 1 view .LVU2649 + 243:Src/main.c **** { + 8220 .loc 1 243 10 is_stmt 0 view .LVU2650 + 8221 0176 2046 mov r0, r4 + 8222 0178 FFF7FEFF bl CheckChecksum + 8223 .LVL646: + 243:Src/main.c **** { + 8224 .loc 1 243 9 discriminator 1 view .LVU2651 + 8225 017c 70B9 cbnz r0, .L427 + 256:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8226 .loc 1 256 7 is_stmt 1 view .LVU2652 + 256:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8227 .loc 1 256 17 is_stmt 0 view .LVU2653 + 8228 017e 444A ldr r2, .L436+28 + 8229 0180 1378 ldrb r3, [r2] @ zero_extendqisi2 + 256:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8230 .loc 1 256 21 view .LVU2654 + 8231 0182 43F00403 orr r3, r3, #4 + 8232 0186 1370 strb r3, [r2] + 257:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8233 .loc 1 257 7 is_stmt 1 view .LVU2655 + 257:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8234 .loc 1 257 17 is_stmt 0 view .LVU2656 + ARM GAS /tmp/ccyYWdjY.s page 524 - 8235 .loc 1 240 16 discriminator 1 view .LVU2658 - 8236 0182 4D4B ldr r3, .L436+52 - 8237 0184 1880 strh r0, [r3] @ movhi - 241:Src/main.c **** { - 8238 .loc 1 241 6 is_stmt 1 view .LVU2659 - 241:Src/main.c **** { - 8239 .loc 1 241 10 is_stmt 0 view .LVU2660 - 8240 0186 2046 mov r0, r4 - 8241 0188 FFF7FEFF bl CheckChecksum - 8242 .LVL646: - 241:Src/main.c **** { - 8243 .loc 1 241 9 discriminator 1 view .LVU2661 - 8244 018c 70B9 cbnz r0, .L427 - 254:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8245 .loc 1 254 7 is_stmt 1 view .LVU2662 - 254:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8246 .loc 1 254 17 is_stmt 0 view .LVU2663 - 8247 018e 454A ldr r2, .L436+32 - 8248 0190 1378 ldrb r3, [r2] @ zero_extendqisi2 - 254:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8249 .loc 1 254 21 view .LVU2664 - 8250 0192 43F00403 orr r3, r3, #4 - 8251 0196 1370 strb r3, [r2] - 255:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8252 .loc 1 255 7 is_stmt 1 view .LVU2665 - 255:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8253 .loc 1 255 17 is_stmt 0 view .LVU2666 - 8254 0198 454B ldr r3, .L436+44 - 8255 019a 0222 movs r2, #2 - 8256 019c 1A70 strb r2, [r3] - 256:Src/main.c **** } - 8257 .loc 1 256 7 is_stmt 1 view .LVU2667 - 256:Src/main.c **** } - 8258 .loc 1 256 21 is_stmt 0 view .LVU2668 - 8259 019e 3E4B ldr r3, .L436+20 - 8260 01a0 0022 movs r2, #0 - 8261 01a2 1A70 strb r2, [r3] - 8262 .L386: - 258:Src/main.c **** break; - 8263 .loc 1 258 6 is_stmt 1 view .LVU2669 - 258:Src/main.c **** break; - 8264 .loc 1 258 32 is_stmt 0 view .LVU2670 - 8265 01a4 3E4B ldr r3, .L436+28 - 8266 01a6 0122 movs r2, #1 - 8267 01a8 1A70 strb r2, [r3] - 259:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT - 8268 .loc 1 259 5 is_stmt 1 view .LVU2671 - 8269 01aa AAE7 b .L373 - 8270 .L427: - 243:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 - 8271 .loc 1 243 7 view .LVU2672 - 8272 .LVL647: - 8273 .LBB569: - 8274 .LBI569: + 8235 0188 444B ldr r3, .L436+40 + 8236 018a 0222 movs r2, #2 + 8237 018c 1A70 strb r2, [r3] + 258:Src/main.c **** } + 8238 .loc 1 258 7 is_stmt 1 view .LVU2657 + 258:Src/main.c **** } + 8239 .loc 1 258 21 is_stmt 0 view .LVU2658 + 8240 018e 3D4B ldr r3, .L436+16 + 8241 0190 0022 movs r2, #0 + 8242 0192 1A70 strb r2, [r3] + 8243 .L386: + 260:Src/main.c **** break; + 8244 .loc 1 260 6 is_stmt 1 view .LVU2659 + 260:Src/main.c **** break; + 8245 .loc 1 260 32 is_stmt 0 view .LVU2660 + 8246 0194 3D4B ldr r3, .L436+24 + 8247 0196 0122 movs r2, #1 + 8248 0198 1A70 strb r2, [r3] + 261:Src/main.c **** case DEFAULT_ENABLE://2 - Go to HALT + 8249 .loc 1 261 5 is_stmt 1 view .LVU2661 + 8250 019a AAE7 b .L373 + 8251 .L427: + 245:Src/main.c **** LL_SPI_Enable(SPI6);//Enable SPI for Laser2 DAC & TEC2 + 8252 .loc 1 245 7 view .LVU2662 + 8253 .LVL647: + 8254 .LBB569: + 8255 .LBI569: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8275 .loc 4 358 22 view .LVU2673 - 8276 .LBB570: - ARM GAS /tmp/ccfIOqv2.s page 525 - - + 8256 .loc 4 358 22 view .LVU2663 + 8257 .LBB570: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8277 .loc 4 360 3 view .LVU2674 - 8278 01ac 434A ldr r2, .L436+56 - 8279 01ae 1368 ldr r3, [r2] - 8280 01b0 43F04003 orr r3, r3, #64 - 8281 01b4 1360 str r3, [r2] - 8282 .LVL648: + 8258 .loc 4 360 3 view .LVU2664 + 8259 019c 424A ldr r2, .L436+52 + 8260 019e 1368 ldr r3, [r2] + 8261 01a0 43F04003 orr r3, r3, #64 + 8262 01a4 1360 str r3, [r2] + 8263 .LVL648: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8283 .loc 4 360 3 is_stmt 0 view .LVU2675 - 8284 .LBE570: - 8285 .LBE569: - 244:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); - 8286 .loc 1 244 7 is_stmt 1 view .LVU2676 - 8287 .LBB571: - 8288 .LBI571: + 8264 .loc 4 360 3 is_stmt 0 view .LVU2665 + 8265 .LBE570: + 8266 .LBE569: + 246:Src/main.c **** Decode_uart(COMMAND, &LD1_curr_setup, &LD2_curr_setup, &Curr_setup); + 8267 .loc 1 246 7 is_stmt 1 view .LVU2666 + 8268 .LBB571: + 8269 .LBI571: 358:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8289 .loc 4 358 22 view .LVU2677 - 8290 .LBB572: + 8270 .loc 4 358 22 view .LVU2667 + 8271 .LBB572: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8291 .loc 4 360 3 view .LVU2678 - 8292 01b6 02F58E32 add r2, r2, #72704 - 8293 01ba 1368 ldr r3, [r2] - 8294 01bc 43F04003 orr r3, r3, #64 - 8295 01c0 1360 str r3, [r2] - 8296 .LVL649: + 8272 .loc 4 360 3 view .LVU2668 + 8273 01a6 02F58E32 add r2, r2, #72704 + 8274 01aa 1368 ldr r3, [r2] + 8275 01ac 43F04003 orr r3, r3, #64 + 8276 01b0 1360 str r3, [r2] + 8277 .LVL649: 360:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8297 .loc 4 360 3 is_stmt 0 view .LVU2679 - 8298 .LBE572: - 8299 .LBE571: - 245:Src/main.c **** TO6_before = TO6; - 8300 .loc 1 245 7 is_stmt 1 view .LVU2680 - 8301 01c2 3F4B ldr r3, .L436+60 - 8302 01c4 3F4A ldr r2, .L436+64 - 8303 01c6 4049 ldr r1, .L436+68 - 8304 01c8 2046 mov r0, r4 - 8305 01ca FFF7FEFF bl Decode_uart - 8306 .LVL650: - 246:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8307 .loc 1 246 7 view .LVU2681 - 246:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; - 8308 .loc 1 246 18 is_stmt 0 view .LVU2682 - 8309 01ce 3F4B ldr r3, .L436+72 - 8310 01d0 1A68 ldr r2, [r3] - 8311 01d2 3F4B ldr r3, .L436+76 - 8312 01d4 1A60 str r2, [r3] - 249:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8313 .loc 1 249 7 is_stmt 1 view .LVU2683 - 249:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle - 8314 .loc 1 249 17 is_stmt 0 view .LVU2684 - 8315 01d6 0723 movs r3, #7 - 8316 01d8 354A ldr r2, .L436+44 - 8317 01da 1370 strb r3, [r2] - 250:Src/main.c **** } - 8318 .loc 1 250 7 is_stmt 1 view .LVU2685 - 250:Src/main.c **** } - 8319 .loc 1 250 21 is_stmt 0 view .LVU2686 - 8320 01dc 2E4A ldr r2, .L436+20 - ARM GAS /tmp/ccfIOqv2.s page 526 + 8278 .loc 4 360 3 is_stmt 0 view .LVU2669 + ARM GAS /tmp/ccyYWdjY.s page 525 - 8321 01de 1370 strb r3, [r2] - 8322 01e0 E0E7 b .L386 - 8323 .L382: - 262:Src/main.c **** Stop_TIM10(); - 8324 .loc 1 262 6 is_stmt 1 view .LVU2687 - 262:Src/main.c **** Stop_TIM10(); - 8325 .loc 1 262 31 is_stmt 0 view .LVU2688 - 8326 01e2 2E4B ldr r3, .L436+24 - 8327 01e4 5A68 ldr r2, [r3, #4] @ float - 262:Src/main.c **** Stop_TIM10(); - 8328 .loc 1 262 25 view .LVU2689 - 8329 01e6 1A61 str r2, [r3, #16] @ float - 263:Src/main.c **** Init_params(); - 8330 .loc 1 263 6 is_stmt 1 view .LVU2690 - 8331 01e8 FFF7FEFF bl Stop_TIM10 - 8332 .LVL651: - 264:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 - 8333 .loc 1 264 6 view .LVU2691 - 8334 01ec FFF7FEFF bl Init_params - 8335 .LVL652: - 265:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 - 8336 .loc 1 265 6 view .LVU2692 - 8337 .LBB573: - 8338 .LBI573: + 8279 .LBE572: + 8280 .LBE571: + 247:Src/main.c **** TO6_before = TO6; + 8281 .loc 1 247 7 is_stmt 1 view .LVU2670 + 8282 01b2 3E4B ldr r3, .L436+56 + 8283 01b4 3E4A ldr r2, .L436+60 + 8284 01b6 3F49 ldr r1, .L436+64 + 8285 01b8 2046 mov r0, r4 + 8286 01ba FFF7FEFF bl Decode_uart + 8287 .LVL650: + 248:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 8288 .loc 1 248 7 view .LVU2671 + 248:Src/main.c **** //LD1_param.LD_TEMP_Before = LD1_param.LD_TEMP; + 8289 .loc 1 248 18 is_stmt 0 view .LVU2672 + 8290 01be 3E4B ldr r3, .L436+68 + 8291 01c0 1A68 ldr r2, [r3] + 8292 01c2 3E4B ldr r3, .L436+72 + 8293 01c4 1A60 str r2, [r3] + 251:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 8294 .loc 1 251 7 is_stmt 1 view .LVU2673 + 251:Src/main.c **** CPU_state_old = WORK_ENABLE;//Save main current cycle + 8295 .loc 1 251 17 is_stmt 0 view .LVU2674 + 8296 01c6 0723 movs r3, #7 + 8297 01c8 344A ldr r2, .L436+40 + 8298 01ca 1370 strb r3, [r2] + 252:Src/main.c **** } + 8299 .loc 1 252 7 is_stmt 1 view .LVU2675 + 252:Src/main.c **** } + 8300 .loc 1 252 21 is_stmt 0 view .LVU2676 + 8301 01cc 2D4A ldr r2, .L436+16 + 8302 01ce 1370 strb r3, [r2] + 8303 01d0 E0E7 b .L386 + 8304 .L382: + 264:Src/main.c **** Stop_TIM10(); + 8305 .loc 1 264 6 is_stmt 1 view .LVU2677 + 264:Src/main.c **** Stop_TIM10(); + 8306 .loc 1 264 31 is_stmt 0 view .LVU2678 + 8307 01d2 2D4B ldr r3, .L436+20 + 8308 01d4 5A68 ldr r2, [r3, #4] @ float + 264:Src/main.c **** Stop_TIM10(); + 8309 .loc 1 264 25 view .LVU2679 + 8310 01d6 1A61 str r2, [r3, #16] @ float + 265:Src/main.c **** Init_params(); + 8311 .loc 1 265 6 is_stmt 1 view .LVU2680 + 8312 01d8 FFF7FEFF bl Stop_TIM10 + 8313 .LVL651: + 266:Src/main.c **** LL_SPI_Disable(SPI2);//Disable SPI for Laser1 DAC & TEC1 + 8314 .loc 1 266 6 view .LVU2681 + 8315 01dc FFF7FEFF bl Init_params + 8316 .LVL652: + 267:Src/main.c **** LL_SPI_Disable(SPI6);//Disable SPI for Laser2 DAC & TEC2 + 8317 .loc 1 267 6 view .LVU2682 + 8318 .LBB573: + 8319 .LBI573: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8339 .loc 4 370 22 view .LVU2693 - 8340 .LBB574: + 8320 .loc 4 370 22 view .LVU2683 + 8321 .LBB574: + ARM GAS /tmp/ccyYWdjY.s page 526 + + 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8341 .loc 4 372 3 view .LVU2694 - 8342 01f0 324A ldr r2, .L436+56 - 8343 01f2 1368 ldr r3, [r2] - 8344 01f4 23F04003 bic r3, r3, #64 - 8345 01f8 1360 str r3, [r2] - 8346 .LVL653: + 8322 .loc 4 372 3 view .LVU2684 + 8323 01e0 314A ldr r2, .L436+52 + 8324 01e2 1368 ldr r3, [r2] + 8325 01e4 23F04003 bic r3, r3, #64 + 8326 01e8 1360 str r3, [r2] + 8327 .LVL653: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8347 .loc 4 372 3 is_stmt 0 view .LVU2695 - 8348 .LBE574: - 8349 .LBE573: - 266:Src/main.c **** CPU_state = HALT; - 8350 .loc 1 266 6 is_stmt 1 view .LVU2696 - 8351 .LBB575: - 8352 .LBI575: + 8328 .loc 4 372 3 is_stmt 0 view .LVU2685 + 8329 .LBE574: + 8330 .LBE573: + 268:Src/main.c **** CPU_state = HALT; + 8331 .loc 1 268 6 is_stmt 1 view .LVU2686 + 8332 .LBB575: + 8333 .LBI575: 370:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** { - 8353 .loc 4 370 22 view .LVU2697 - 8354 .LBB576: + 8334 .loc 4 370 22 view .LVU2687 + 8335 .LBB576: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8355 .loc 4 372 3 view .LVU2698 - 8356 01fa 02F58E32 add r2, r2, #72704 - 8357 01fe 1368 ldr r3, [r2] - 8358 0200 23F04003 bic r3, r3, #64 - 8359 0204 1360 str r3, [r2] - 8360 .LVL654: + 8336 .loc 4 372 3 view .LVU2688 + 8337 01ea 02F58E32 add r2, r2, #72704 + 8338 01ee 1368 ldr r3, [r2] + 8339 01f0 23F04003 bic r3, r3, #64 + 8340 01f4 1360 str r3, [r2] + 8341 .LVL654: 372:Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_spi.h **** } - 8361 .loc 4 372 3 is_stmt 0 view .LVU2699 - 8362 .LBE576: - 8363 .LBE575: - 267:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - ARM GAS /tmp/ccfIOqv2.s page 527 + 8342 .loc 4 372 3 is_stmt 0 view .LVU2689 + 8343 .LBE576: + 8344 .LBE575: + 269:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8345 .loc 1 269 6 is_stmt 1 view .LVU2690 + 269:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8346 .loc 1 269 16 is_stmt 0 view .LVU2691 + 8347 01f6 0023 movs r3, #0 + 8348 01f8 284A ldr r2, .L436+40 + 8349 01fa 1370 strb r3, [r2] + 270:Src/main.c **** UART_transmission_request = MESS_01; + 8350 .loc 1 270 6 is_stmt 1 view .LVU2692 + 270:Src/main.c **** UART_transmission_request = MESS_01; + 8351 .loc 1 270 20 is_stmt 0 view .LVU2693 + 8352 01fc 214A ldr r2, .L436+16 + 8353 01fe 1370 strb r3, [r2] + 271:Src/main.c **** break; + 8354 .loc 1 271 6 is_stmt 1 view .LVU2694 + 271:Src/main.c **** break; + 8355 .loc 1 271 32 is_stmt 0 view .LVU2695 + 8356 0200 224B ldr r3, .L436+24 + 8357 0202 0122 movs r2, #1 + 8358 0204 1A70 strb r2, [r3] + 272:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! + 8359 .loc 1 272 5 is_stmt 1 view .LVU2696 + 8360 0206 74E7 b .L373 + 8361 .L381: + 274:Src/main.c **** State_Data[0]|=temp16&0xff; + 8362 .loc 1 274 6 view .LVU2697 + 274:Src/main.c **** State_Data[0]|=temp16&0xff; + 8363 .loc 1 274 15 is_stmt 0 view .LVU2698 + ARM GAS /tmp/ccyYWdjY.s page 527 - 8364 .loc 1 267 6 is_stmt 1 view .LVU2700 - 267:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8365 .loc 1 267 16 is_stmt 0 view .LVU2701 - 8366 0206 0023 movs r3, #0 - 8367 0208 294A ldr r2, .L436+44 - 8368 020a 1370 strb r3, [r2] - 268:Src/main.c **** UART_transmission_request = MESS_01; - 8369 .loc 1 268 6 is_stmt 1 view .LVU2702 - 268:Src/main.c **** UART_transmission_request = MESS_01; - 8370 .loc 1 268 20 is_stmt 0 view .LVU2703 - 8371 020c 224A ldr r2, .L436+20 - 8372 020e 1370 strb r3, [r2] - 269:Src/main.c **** break; - 8373 .loc 1 269 6 is_stmt 1 view .LVU2704 - 269:Src/main.c **** break; - 8374 .loc 1 269 32 is_stmt 0 view .LVU2705 - 8375 0210 234B ldr r3, .L436+28 - 8376 0212 0122 movs r2, #1 - 8377 0214 1A70 strb r2, [r3] - 270:Src/main.c **** case TRANS_S_ENABLE://3 - Transmith saved packet Before this operation must to be defaulting! - 8378 .loc 1 270 5 is_stmt 1 view .LVU2706 - 8379 0216 74E7 b .L373 - 8380 .L381: - 272:Src/main.c **** State_Data[0]|=temp16&0xff; - 8381 .loc 1 272 6 view .LVU2707 - 272:Src/main.c **** State_Data[0]|=temp16&0xff; - 8382 .loc 1 272 15 is_stmt 0 view .LVU2708 - 8383 0218 2E48 ldr r0, .L436+80 - 8384 021a FFF7FEFF bl SD_READ - 8385 .LVL655: - 272:Src/main.c **** State_Data[0]|=temp16&0xff; - 8386 .loc 1 272 13 discriminator 1 view .LVU2709 - 8387 021e 82B2 uxth r2, r0 - 8388 0220 2D4B ldr r3, .L436+84 - 8389 0222 1A80 strh r2, [r3] @ movhi - 273:Src/main.c **** if (temp16==0) - 8390 .loc 1 273 6 is_stmt 1 view .LVU2710 - 273:Src/main.c **** if (temp16==0) - 8391 .loc 1 273 16 is_stmt 0 view .LVU2711 - 8392 0224 1F49 ldr r1, .L436+32 - 8393 0226 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 273:Src/main.c **** if (temp16==0) - 8394 .loc 1 273 19 view .LVU2712 - 8395 0228 0343 orrs r3, r3, r0 - 8396 022a 0B70 strb r3, [r1] - 274:Src/main.c **** { - 8397 .loc 1 274 6 is_stmt 1 view .LVU2713 - 274:Src/main.c **** { - 8398 .loc 1 274 9 is_stmt 0 view .LVU2714 - 8399 022c 42B9 cbnz r2, .L387 - 276:Src/main.c **** } - 8400 .loc 1 276 7 is_stmt 1 view .LVU2715 - 276:Src/main.c **** } - 8401 .loc 1 276 33 is_stmt 0 view .LVU2716 - 8402 022e 1C4B ldr r3, .L436+28 - 8403 0230 0322 movs r2, #3 - 8404 0232 1A70 strb r2, [r3] - ARM GAS /tmp/ccfIOqv2.s page 528 + 8364 0208 2D48 ldr r0, .L436+76 + 8365 020a FFF7FEFF bl SD_READ + 8366 .LVL655: + 274:Src/main.c **** State_Data[0]|=temp16&0xff; + 8367 .loc 1 274 13 discriminator 1 view .LVU2699 + 8368 020e 82B2 uxth r2, r0 + 8369 0210 2C4B ldr r3, .L436+80 + 8370 0212 1A80 strh r2, [r3] @ movhi + 275:Src/main.c **** if (temp16==0) + 8371 .loc 1 275 6 is_stmt 1 view .LVU2700 + 275:Src/main.c **** if (temp16==0) + 8372 .loc 1 275 16 is_stmt 0 view .LVU2701 + 8373 0214 1E49 ldr r1, .L436+28 + 8374 0216 0B78 ldrb r3, [r1] @ zero_extendqisi2 + 275:Src/main.c **** if (temp16==0) + 8375 .loc 1 275 19 view .LVU2702 + 8376 0218 0343 orrs r3, r3, r0 + 8377 021a 0B70 strb r3, [r1] + 276:Src/main.c **** { + 8378 .loc 1 276 6 is_stmt 1 view .LVU2703 + 276:Src/main.c **** { + 8379 .loc 1 276 9 is_stmt 0 view .LVU2704 + 8380 021c 42B9 cbnz r2, .L387 + 278:Src/main.c **** } + 8381 .loc 1 278 7 is_stmt 1 view .LVU2705 + 278:Src/main.c **** } + 8382 .loc 1 278 33 is_stmt 0 view .LVU2706 + 8383 021e 1B4B ldr r3, .L436+24 + 8384 0220 0322 movs r2, #3 + 8385 0222 1A70 strb r2, [r3] + 8386 .L388: + 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8387 .loc 1 284 6 is_stmt 1 view .LVU2707 + 284:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8388 .loc 1 284 20 is_stmt 0 view .LVU2708 + 8389 0224 0023 movs r3, #0 + 8390 0226 174A ldr r2, .L436+16 + 8391 0228 1370 strb r3, [r2] + 285:Src/main.c **** break; + 8392 .loc 1 285 6 is_stmt 1 view .LVU2709 + 285:Src/main.c **** break; + 8393 .loc 1 285 16 is_stmt 0 view .LVU2710 + 8394 022a 1C4A ldr r2, .L436+40 + 8395 022c 1370 strb r3, [r2] + 286:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet + 8396 .loc 1 286 5 is_stmt 1 view .LVU2711 + 8397 022e 60E7 b .L373 + 8398 .L387: + 282:Src/main.c **** } + 8399 .loc 1 282 7 view .LVU2712 + 282:Src/main.c **** } + 8400 .loc 1 282 33 is_stmt 0 view .LVU2713 + 8401 0230 164B ldr r3, .L436+24 + 8402 0232 0122 movs r2, #1 + 8403 0234 1A70 strb r2, [r3] + 8404 0236 F5E7 b .L388 + 8405 .L380: + ARM GAS /tmp/ccyYWdjY.s page 528 - 8405 .L388: - 282:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8406 .loc 1 282 6 is_stmt 1 view .LVU2717 - 282:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8407 .loc 1 282 20 is_stmt 0 view .LVU2718 - 8408 0234 0023 movs r3, #0 - 8409 0236 184A ldr r2, .L436+20 - 8410 0238 1370 strb r3, [r2] - 283:Src/main.c **** break; - 8411 .loc 1 283 6 is_stmt 1 view .LVU2719 - 283:Src/main.c **** break; - 8412 .loc 1 283 16 is_stmt 0 view .LVU2720 - 8413 023a 1D4A ldr r2, .L436+44 - 8414 023c 1370 strb r3, [r2] - 284:Src/main.c **** case TRANS_ENABLE://4 - Transmith current packet - 8415 .loc 1 284 5 is_stmt 1 view .LVU2721 - 8416 023e 60E7 b .L373 - 8417 .L387: - 280:Src/main.c **** } - 8418 .loc 1 280 7 view .LVU2722 - 280:Src/main.c **** } - 8419 .loc 1 280 33 is_stmt 0 view .LVU2723 - 8420 0240 174B ldr r3, .L436+28 - 8421 0242 0122 movs r2, #1 - 8422 0244 1A70 strb r2, [r3] - 8423 0246 F5E7 b .L388 - 8424 .L380: - 286:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8425 .loc 1 286 6 is_stmt 1 view .LVU2724 - 286:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8426 .loc 1 286 32 is_stmt 0 view .LVU2725 - 8427 0248 154B ldr r3, .L436+28 - 8428 024a 0222 movs r2, #2 - 8429 024c 1A70 strb r2, [r3] - 287:Src/main.c **** break; - 8430 .loc 1 287 6 is_stmt 1 view .LVU2726 - 287:Src/main.c **** break; - 8431 .loc 1 287 16 is_stmt 0 view .LVU2727 - 8432 024e 124B ldr r3, .L436+20 - 8433 0250 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8434 0252 174B ldr r3, .L436+44 - 8435 0254 1A70 strb r2, [r3] - 288:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD - 8436 .loc 1 288 5 is_stmt 1 view .LVU2728 - 8437 0256 54E7 b .L373 - 8438 .L379: - 290:Src/main.c **** UART_transmission_request = MESS_01; - 8439 .loc 1 290 6 view .LVU2729 - 290:Src/main.c **** UART_transmission_request = MESS_01; - 8440 .loc 1 290 21 is_stmt 0 view .LVU2730 - 8441 0258 FFF7FEFF bl SD_REMOVE - 8442 .LVL656: - 290:Src/main.c **** UART_transmission_request = MESS_01; - 8443 .loc 1 290 16 discriminator 1 view .LVU2731 - 8444 025c 114A ldr r2, .L436+32 - 8445 025e 1378 ldrb r3, [r2] @ zero_extendqisi2 - 290:Src/main.c **** UART_transmission_request = MESS_01; - ARM GAS /tmp/ccfIOqv2.s page 529 + 288:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8406 .loc 1 288 6 is_stmt 1 view .LVU2714 + 288:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8407 .loc 1 288 32 is_stmt 0 view .LVU2715 + 8408 0238 144B ldr r3, .L436+24 + 8409 023a 0222 movs r2, #2 + 8410 023c 1A70 strb r2, [r3] + 289:Src/main.c **** break; + 8411 .loc 1 289 6 is_stmt 1 view .LVU2716 + 289:Src/main.c **** break; + 8412 .loc 1 289 16 is_stmt 0 view .LVU2717 + 8413 023e 114B ldr r3, .L436+16 + 8414 0240 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 8415 0242 164B ldr r3, .L436+40 + 8416 0244 1A70 strb r2, [r3] + 290:Src/main.c **** case REMOVE_FILE://5 - Remove file from SD + 8417 .loc 1 290 5 is_stmt 1 view .LVU2718 + 8418 0246 54E7 b .L373 + 8419 .L379: + 292:Src/main.c **** UART_transmission_request = MESS_01; + 8420 .loc 1 292 6 view .LVU2719 + 292:Src/main.c **** UART_transmission_request = MESS_01; + 8421 .loc 1 292 21 is_stmt 0 view .LVU2720 + 8422 0248 FFF7FEFF bl SD_REMOVE + 8423 .LVL656: + 292:Src/main.c **** UART_transmission_request = MESS_01; + 8424 .loc 1 292 16 discriminator 1 view .LVU2721 + 8425 024c 104A ldr r2, .L436+28 + 8426 024e 1378 ldrb r3, [r2] @ zero_extendqisi2 + 292:Src/main.c **** UART_transmission_request = MESS_01; + 8427 .loc 1 292 19 discriminator 1 view .LVU2722 + 8428 0250 0343 orrs r3, r3, r0 + 8429 0252 1370 strb r3, [r2] + 293:Src/main.c **** CPU_state = CPU_state_old; + 8430 .loc 1 293 6 is_stmt 1 view .LVU2723 + 293:Src/main.c **** CPU_state = CPU_state_old; + 8431 .loc 1 293 32 is_stmt 0 view .LVU2724 + 8432 0254 0D4B ldr r3, .L436+24 + 8433 0256 0122 movs r2, #1 + 8434 0258 1A70 strb r2, [r3] + 294:Src/main.c **** break; + 8435 .loc 1 294 6 is_stmt 1 view .LVU2725 + 294:Src/main.c **** break; + 8436 .loc 1 294 16 is_stmt 0 view .LVU2726 + 8437 025a 0A4B ldr r3, .L436+16 + 8438 025c 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 8439 025e 0F4B ldr r3, .L436+40 + 8440 0260 1A70 strb r2, [r3] + 295:Src/main.c **** case STATE://6 - Transmith state message + 8441 .loc 1 295 5 is_stmt 1 view .LVU2727 + 8442 0262 46E7 b .L373 + 8443 .L378: + 297:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8444 .loc 1 297 6 view .LVU2728 + 297:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle + 8445 .loc 1 297 32 is_stmt 0 view .LVU2729 + 8446 0264 094B ldr r3, .L436+24 + ARM GAS /tmp/ccyYWdjY.s page 529 - 8446 .loc 1 290 19 discriminator 1 view .LVU2732 - 8447 0260 0343 orrs r3, r3, r0 - 8448 0262 1370 strb r3, [r2] - 291:Src/main.c **** CPU_state = CPU_state_old; - 8449 .loc 1 291 6 is_stmt 1 view .LVU2733 - 291:Src/main.c **** CPU_state = CPU_state_old; - 8450 .loc 1 291 32 is_stmt 0 view .LVU2734 - 8451 0264 0E4B ldr r3, .L436+28 - 8452 0266 0122 movs r2, #1 - 8453 0268 1A70 strb r2, [r3] - 292:Src/main.c **** break; - 8454 .loc 1 292 6 is_stmt 1 view .LVU2735 - 292:Src/main.c **** break; - 8455 .loc 1 292 16 is_stmt 0 view .LVU2736 - 8456 026a 0B4B ldr r3, .L436+20 - 8457 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8458 026e 104B ldr r3, .L436+44 - 8459 0270 1A70 strb r2, [r3] - 293:Src/main.c **** case STATE://6 - Transmith state message - 8460 .loc 1 293 5 is_stmt 1 view .LVU2737 - 8461 0272 46E7 b .L373 - 8462 .L378: - 295:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8463 .loc 1 295 6 view .LVU2738 - 295:Src/main.c **** CPU_state = CPU_state_old;//Return to main current cycle - 8464 .loc 1 295 32 is_stmt 0 view .LVU2739 - 8465 0274 0A4B ldr r3, .L436+28 - 8466 0276 0122 movs r2, #1 - 8467 0278 1A70 strb r2, [r3] - 296:Src/main.c **** break; - 8468 .loc 1 296 6 is_stmt 1 view .LVU2740 - 296:Src/main.c **** break; - 8469 .loc 1 296 16 is_stmt 0 view .LVU2741 - 8470 027a 074B ldr r3, .L436+20 - 8471 027c 1A78 ldrb r2, [r3] @ zero_extendqisi2 - 8472 027e 0C4B ldr r3, .L436+44 - 8473 0280 1A70 strb r2, [r3] - 297:Src/main.c **** case WORK_ENABLE://7 - Main work cycle - 8474 .loc 1 297 5 is_stmt 1 view .LVU2742 - 8475 0282 3EE7 b .L373 - 8476 .L437: - 8477 .align 2 - 8478 .L436: - 8479 0284 00080040 .word 1073743872 - 8480 0288 00480140 .word 1073825792 - 8481 028c 00000000 .word u_rx_flg - 8482 0290 00100140 .word 1073811456 - 8483 0294 00E100E0 .word -536813312 - 8484 0298 00000000 .word CPU_state_old - 8485 029c 00000000 .word task - 8486 02a0 00000000 .word UART_transmission_request - 8487 02a4 00000000 .word State_Data - 8488 02a8 00000000 .word flg_tmt - 8489 02ac 00000240 .word 1073872896 - 8490 02b0 00000000 .word CPU_state - 8491 02b4 00000000 .word COMMAND - 8492 02b8 00000000 .word CS_result - ARM GAS /tmp/ccfIOqv2.s page 530 + 8447 0266 0122 movs r2, #1 + 8448 0268 1A70 strb r2, [r3] + 298:Src/main.c **** break; + 8449 .loc 1 298 6 is_stmt 1 view .LVU2730 + 298:Src/main.c **** break; + 8450 .loc 1 298 16 is_stmt 0 view .LVU2731 + 8451 026a 064B ldr r3, .L436+16 + 8452 026c 1A78 ldrb r2, [r3] @ zero_extendqisi2 + 8453 026e 0B4B ldr r3, .L436+40 + 8454 0270 1A70 strb r2, [r3] + 299:Src/main.c **** case WORK_ENABLE://7 - Main work cycle + 8455 .loc 1 299 5 is_stmt 1 view .LVU2732 + 8456 0272 3EE7 b .L373 + 8457 .L437: + 8458 .align 2 + 8459 .L436: + 8460 0274 00080040 .word 1073743872 + 8461 0278 00000000 .word u_rx_flg + 8462 027c 00100140 .word 1073811456 + 8463 0280 00E100E0 .word -536813312 + 8464 0284 00000000 .word CPU_state_old + 8465 0288 00000000 .word task + 8466 028c 00000000 .word UART_transmission_request + 8467 0290 00000000 .word State_Data + 8468 0294 00000000 .word flg_tmt + 8469 0298 00000240 .word 1073872896 + 8470 029c 00000000 .word CPU_state + 8471 02a0 00000000 .word COMMAND + 8472 02a4 00000000 .word CS_result + 8473 02a8 00380040 .word 1073756160 + 8474 02ac 00000000 .word Curr_setup + 8475 02b0 00000000 .word LD2_curr_setup + 8476 02b4 00000000 .word LD1_curr_setup + 8477 02b8 00000000 .word TO6 + 8478 02bc 00000000 .word TO6_before + 8479 02c0 00000000 .word Long_Data + 8480 02c4 00000000 .word temp16 + 8481 .L377: + 301:Src/main.c **** Stop_TIM10(); + 8482 .loc 1 301 6 view .LVU2733 + 301:Src/main.c **** Stop_TIM10(); + 8483 .loc 1 301 31 is_stmt 0 view .LVU2734 + 8484 02c8 7A4B ldr r3, .L438 + 8485 02ca 5A68 ldr r2, [r3, #4] @ float + 301:Src/main.c **** Stop_TIM10(); + 8486 .loc 1 301 25 view .LVU2735 + 8487 02cc 1A61 str r2, [r3, #16] @ float + 302:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) + 8488 .loc 1 302 6 is_stmt 1 view .LVU2736 + 8489 02ce FFF7FEFF bl Stop_TIM10 + 8490 .LVL657: + 303:Src/main.c **** { + 8491 .loc 1 303 6 view .LVU2737 + 303:Src/main.c **** { + 8492 .loc 1 303 13 is_stmt 0 view .LVU2738 + 8493 02d2 794B ldr r3, .L438+4 + 8494 02d4 1B68 ldr r3, [r3] + ARM GAS /tmp/ccyYWdjY.s page 530 - 8493 02bc 00380040 .word 1073756160 - 8494 02c0 00000000 .word Curr_setup - 8495 02c4 00000000 .word LD2_curr_setup - 8496 02c8 00000000 .word LD1_curr_setup - 8497 02cc 00000000 .word TO6 - 8498 02d0 00000000 .word TO6_before - 8499 02d4 00000000 .word Long_Data - 8500 02d8 00000000 .word temp16 - 8501 .L377: - 299:Src/main.c **** Stop_TIM10(); - 8502 .loc 1 299 6 view .LVU2743 - 299:Src/main.c **** Stop_TIM10(); - 8503 .loc 1 299 31 is_stmt 0 view .LVU2744 - 8504 02dc 7A4B ldr r3, .L438 - 8505 02de 5A68 ldr r2, [r3, #4] @ float - 299:Src/main.c **** Stop_TIM10(); - 8506 .loc 1 299 25 view .LVU2745 - 8507 02e0 1A61 str r2, [r3, #16] @ float - 300:Src/main.c **** if (TO7>TO7_before)//Main work cycle go with the timer 7 (1000 us or 1 kHz) - 8508 .loc 1 300 6 is_stmt 1 view .LVU2746 - 8509 02e2 FFF7FEFF bl Stop_TIM10 - 8510 .LVL657: - 301:Src/main.c **** { - 8511 .loc 1 301 6 view .LVU2747 - 301:Src/main.c **** { - 8512 .loc 1 301 13 is_stmt 0 view .LVU2748 - 8513 02e6 794B ldr r3, .L438+4 - 8514 02e8 1B68 ldr r3, [r3] - 8515 02ea 794A ldr r2, .L438+8 - 8516 02ec 1268 ldr r2, [r2] - 301:Src/main.c **** { - 8517 .loc 1 301 9 view .LVU2749 - 8518 02ee 9342 cmp r3, r2 - 8519 02f0 7FF607AF bls .L373 - 303:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8520 .loc 1 303 7 is_stmt 1 view .LVU2750 - 303:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8521 .loc 1 303 18 is_stmt 0 view .LVU2751 - 8522 02f4 764A ldr r2, .L438+8 - 8523 02f6 1360 str r3, [r2] - 304:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8524 .loc 1 304 7 is_stmt 1 view .LVU2752 - 304:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8525 .loc 1 304 25 is_stmt 0 view .LVU2753 - 8526 02f8 0120 movs r0, #1 - 8527 02fa FFF7FEFF bl MPhD_T - 8528 .LVL658: - 304:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 8529 .loc 1 304 23 discriminator 1 view .LVU2754 - 8530 02fe 754F ldr r7, .L438+12 - 8531 0300 3881 strh r0, [r7, #8] @ movhi - 305:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8532 .loc 1 305 7 is_stmt 1 view .LVU2755 - 305:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8533 .loc 1 305 25 is_stmt 0 view .LVU2756 - 8534 0302 0120 movs r0, #1 - 8535 0304 FFF7FEFF bl MPhD_T - ARM GAS /tmp/ccfIOqv2.s page 531 + 8495 02d6 794A ldr r2, .L438+8 + 8496 02d8 1268 ldr r2, [r2] + 303:Src/main.c **** { + 8497 .loc 1 303 9 view .LVU2739 + 8498 02da 9342 cmp r3, r2 + 8499 02dc 7FF609AF bls .L373 + 305:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8500 .loc 1 305 7 is_stmt 1 view .LVU2740 + 305:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8501 .loc 1 305 18 is_stmt 0 view .LVU2741 + 8502 02e0 764A ldr r2, .L438+8 + 8503 02e2 1360 str r3, [r2] + 306:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8504 .loc 1 306 7 is_stmt 1 view .LVU2742 + 306:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8505 .loc 1 306 25 is_stmt 0 view .LVU2743 + 8506 02e4 0120 movs r0, #1 + 8507 02e6 FFF7FEFF bl MPhD_T + 8508 .LVL658: + 306:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 8509 .loc 1 306 23 discriminator 1 view .LVU2744 + 8510 02ea 754F ldr r7, .L438+12 + 8511 02ec 3881 strh r0, [r7, #8] @ movhi + 307:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8512 .loc 1 307 7 is_stmt 1 view .LVU2745 + 307:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8513 .loc 1 307 25 is_stmt 0 view .LVU2746 + 8514 02ee 0120 movs r0, #1 + 8515 02f0 FFF7FEFF bl MPhD_T + 8516 .LVL659: + 307:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8517 .loc 1 307 23 discriminator 1 view .LVU2747 + 8518 02f4 3881 strh r0, [r7, #8] @ movhi + 308:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8519 .loc 1 308 7 is_stmt 1 view .LVU2748 + 308:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8520 .loc 1 308 25 is_stmt 0 view .LVU2749 + 8521 02f6 0220 movs r0, #2 + 8522 02f8 FFF7FEFF bl MPhD_T + 8523 .LVL660: + 308:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 8524 .loc 1 308 23 discriminator 1 view .LVU2750 + 8525 02fc 714E ldr r6, .L438+16 + 8526 02fe 3081 strh r0, [r6, #8] @ movhi + 309:Src/main.c **** + 8527 .loc 1 309 7 is_stmt 1 view .LVU2751 + 309:Src/main.c **** + 8528 .loc 1 309 25 is_stmt 0 view .LVU2752 + 8529 0300 0220 movs r0, #2 + 8530 0302 FFF7FEFF bl MPhD_T + 8531 .LVL661: + 309:Src/main.c **** + 8532 .loc 1 309 23 discriminator 1 view .LVU2753 + 8533 0306 3081 strh r0, [r6, #8] @ movhi + 312:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + 8534 .loc 1 312 7 is_stmt 1 view .LVU2754 + 312:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); + ARM GAS /tmp/ccyYWdjY.s page 531 - 8536 .LVL659: - 305:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8537 .loc 1 305 23 discriminator 1 view .LVU2757 - 8538 0308 3881 strh r0, [r7, #8] @ movhi - 306:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8539 .loc 1 306 7 is_stmt 1 view .LVU2758 - 306:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8540 .loc 1 306 25 is_stmt 0 view .LVU2759 - 8541 030a 0220 movs r0, #2 - 8542 030c FFF7FEFF bl MPhD_T - 8543 .LVL660: - 306:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 8544 .loc 1 306 23 discriminator 1 view .LVU2760 - 8545 0310 714E ldr r6, .L438+16 - 8546 0312 3081 strh r0, [r6, #8] @ movhi - 307:Src/main.c **** - 8547 .loc 1 307 7 is_stmt 1 view .LVU2761 - 307:Src/main.c **** - 8548 .loc 1 307 25 is_stmt 0 view .LVU2762 - 8549 0314 0220 movs r0, #2 - 8550 0316 FFF7FEFF bl MPhD_T - 8551 .LVL661: - 307:Src/main.c **** - 8552 .loc 1 307 23 discriminator 1 view .LVU2763 - 8553 031a 3081 strh r0, [r6, #8] @ movhi - 310:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8554 .loc 1 310 7 is_stmt 1 view .LVU2764 - 310:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(3); - 8555 .loc 1 310 14 is_stmt 0 view .LVU2765 - 8556 031c 0320 movs r0, #3 - 8557 031e FFF7FEFF bl MPhD_T - 8558 .LVL662: - 311:Src/main.c **** (void) MPhD_T(4); - 8559 .loc 1 311 7 is_stmt 1 view .LVU2766 - 311:Src/main.c **** (void) MPhD_T(4); - 8560 .loc 1 311 32 is_stmt 0 view .LVU2767 - 8561 0322 0320 movs r0, #3 - 8562 0324 FFF7FEFF bl MPhD_T - 8563 .LVL663: - 311:Src/main.c **** (void) MPhD_T(4); - 8564 .loc 1 311 30 discriminator 1 view .LVU2768 - 8565 0328 3880 strh r0, [r7] @ movhi - 312:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8566 .loc 1 312 7 is_stmt 1 view .LVU2769 - 312:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); - 8567 .loc 1 312 14 is_stmt 0 view .LVU2770 - 8568 032a 0420 movs r0, #4 - 8569 032c FFF7FEFF bl MPhD_T - 8570 .LVL664: - 313:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8571 .loc 1 313 7 is_stmt 1 view .LVU2771 - 313:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8572 .loc 1 313 32 is_stmt 0 view .LVU2772 - 8573 0330 0420 movs r0, #4 - 8574 0332 FFF7FEFF bl MPhD_T - 8575 .LVL665: - 313:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - ARM GAS /tmp/ccfIOqv2.s page 532 + 8535 .loc 1 312 14 is_stmt 0 view .LVU2755 + 8536 0308 0320 movs r0, #3 + 8537 030a FFF7FEFF bl MPhD_T + 8538 .LVL662: + 313:Src/main.c **** (void) MPhD_T(4); + 8539 .loc 1 313 7 is_stmt 1 view .LVU2756 + 313:Src/main.c **** (void) MPhD_T(4); + 8540 .loc 1 313 32 is_stmt 0 view .LVU2757 + 8541 030e 0320 movs r0, #3 + 8542 0310 FFF7FEFF bl MPhD_T + 8543 .LVL663: + 313:Src/main.c **** (void) MPhD_T(4); + 8544 .loc 1 313 30 discriminator 1 view .LVU2758 + 8545 0314 3880 strh r0, [r7] @ movhi + 314:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 8546 .loc 1 314 7 is_stmt 1 view .LVU2759 + 314:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(4); + 8547 .loc 1 314 14 is_stmt 0 view .LVU2760 + 8548 0316 0420 movs r0, #4 + 8549 0318 FFF7FEFF bl MPhD_T + 8550 .LVL664: + 315:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8551 .loc 1 315 7 is_stmt 1 view .LVU2761 + 315:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8552 .loc 1 315 32 is_stmt 0 view .LVU2762 + 8553 031c 0420 movs r0, #4 + 8554 031e FFF7FEFF bl MPhD_T + 8555 .LVL665: + 315:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8556 .loc 1 315 30 discriminator 1 view .LVU2763 + 8557 0322 3080 strh r0, [r6] @ movhi + 316:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 8558 .loc 1 316 7 is_stmt 1 view .LVU2764 + 316:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 8559 .loc 1 316 14 is_stmt 0 view .LVU2765 + 8560 0324 DFF8D081 ldr r8, .L438+68 + 8561 0328 0122 movs r2, #1 + 8562 032a 3946 mov r1, r7 + 8563 032c 4046 mov r0, r8 + 8564 032e FFF7FEFF bl PID_Controller_Temp + 8565 .LVL666: + 8566 0332 0146 mov r1, r0 + 316:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 + 8567 .loc 1 316 13 discriminator 1 view .LVU2766 + 8568 0334 644D ldr r5, .L438+20 + 8569 0336 2880 strh r0, [r5] @ movhi + 317:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 8570 .loc 1 317 7 is_stmt 1 view .LVU2767 + 8571 0338 0320 movs r0, #3 + 8572 033a FFF7FEFF bl Set_LTEC + 8573 .LVL667: + 318:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8574 .loc 1 318 7 view .LVU2768 + 318:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8575 .loc 1 318 14 is_stmt 0 view .LVU2769 + 8576 033e DFF8B491 ldr r9, .L438+64 + 8577 0342 0222 movs r2, #2 + ARM GAS /tmp/ccyYWdjY.s page 532 - 8576 .loc 1 313 30 discriminator 1 view .LVU2773 - 8577 0336 3080 strh r0, [r6] @ movhi - 314:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8578 .loc 1 314 7 is_stmt 1 view .LVU2774 - 314:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8579 .loc 1 314 14 is_stmt 0 view .LVU2775 - 8580 0338 DFF8D081 ldr r8, .L438+68 - 8581 033c 0122 movs r2, #1 - 8582 033e 3946 mov r1, r7 - 8583 0340 4046 mov r0, r8 - 8584 0342 FFF7FEFF bl PID_Controller_Temp - 8585 .LVL666: - 8586 0346 0146 mov r1, r0 - 314:Src/main.c **** Set_LTEC(3, temp16);//Drive Laser TEC 1 - 8587 .loc 1 314 13 discriminator 1 view .LVU2776 - 8588 0348 644D ldr r5, .L438+20 - 8589 034a 2880 strh r0, [r5] @ movhi - 315:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8590 .loc 1 315 7 is_stmt 1 view .LVU2777 - 8591 034c 0320 movs r0, #3 - 8592 034e FFF7FEFF bl Set_LTEC - 8593 .LVL667: - 316:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8594 .loc 1 316 7 view .LVU2778 - 316:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8595 .loc 1 316 14 is_stmt 0 view .LVU2779 - 8596 0352 DFF8B491 ldr r9, .L438+64 - 8597 0356 0222 movs r2, #2 - 8598 0358 3146 mov r1, r6 - 8599 035a 4846 mov r0, r9 - 8600 035c FFF7FEFF bl PID_Controller_Temp - 8601 .LVL668: - 8602 0360 0146 mov r1, r0 - 316:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 - 8603 .loc 1 316 13 discriminator 1 view .LVU2780 - 8604 0362 2880 strh r0, [r5] @ movhi - 317:Src/main.c **** - 8605 .loc 1 317 7 is_stmt 1 view .LVU2781 - 8606 0364 0420 movs r0, #4 - 8607 0366 FFF7FEFF bl Set_LTEC - 8608 .LVL669: - 319:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8609 .loc 1 319 7 view .LVU2782 - 319:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8610 .loc 1 319 31 is_stmt 0 view .LVU2783 - 8611 036a 3B89 ldrh r3, [r7, #8] - 319:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 8612 .loc 1 319 20 view .LVU2784 - 8613 036c 5C4C ldr r4, .L438+24 - 8614 036e 6380 strh r3, [r4, #2] @ movhi - 320:Src/main.c **** - 8615 .loc 1 320 7 is_stmt 1 view .LVU2785 - 320:Src/main.c **** - 8616 .loc 1 320 31 is_stmt 0 view .LVU2786 - 8617 0370 3389 ldrh r3, [r6, #8] - 320:Src/main.c **** - 8618 .loc 1 320 20 view .LVU2787 - ARM GAS /tmp/ccfIOqv2.s page 533 + 8578 0344 3146 mov r1, r6 + 8579 0346 4846 mov r0, r9 + 8580 0348 FFF7FEFF bl PID_Controller_Temp + 8581 .LVL668: + 8582 034c 0146 mov r1, r0 + 318:Src/main.c **** Set_LTEC(4, temp16);//Drive Laser TEC 2 + 8583 .loc 1 318 13 discriminator 1 view .LVU2770 + 8584 034e 2880 strh r0, [r5] @ movhi + 319:Src/main.c **** + 8585 .loc 1 319 7 is_stmt 1 view .LVU2771 + 8586 0350 0420 movs r0, #4 + 8587 0352 FFF7FEFF bl Set_LTEC + 8588 .LVL669: + 321:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8589 .loc 1 321 7 view .LVU2772 + 321:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8590 .loc 1 321 31 is_stmt 0 view .LVU2773 + 8591 0356 3B89 ldrh r3, [r7, #8] + 321:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 8592 .loc 1 321 20 view .LVU2774 + 8593 0358 5C4C ldr r4, .L438+24 + 8594 035a 6380 strh r3, [r4, #2] @ movhi + 322:Src/main.c **** + 8595 .loc 1 322 7 is_stmt 1 view .LVU2775 + 322:Src/main.c **** + 8596 .loc 1 322 31 is_stmt 0 view .LVU2776 + 8597 035c 3389 ldrh r3, [r6, #8] + 322:Src/main.c **** + 8598 .loc 1 322 20 view .LVU2777 + 8599 035e A380 strh r3, [r4, #4] @ movhi + 324:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 + 8600 .loc 1 324 7 is_stmt 1 view .LVU2778 + 8601 0360 B8F80C10 ldrh r1, [r8, #12] + 8602 0364 0120 movs r0, #1 + 8603 0366 FFF7FEFF bl Set_LTEC + 8604 .LVL670: + 325:Src/main.c **** + 8605 .loc 1 325 7 view .LVU2779 + 8606 036a B9F80C10 ldrh r1, [r9, #12] + 8607 036e 0220 movs r0, #2 + 8608 0370 FFF7FEFF bl Set_LTEC + 8609 .LVL671: + 329:Src/main.c **** temp16 = Get_ADC(1); + 8610 .loc 1 329 7 view .LVU2780 + 329:Src/main.c **** temp16 = Get_ADC(1); + 8611 .loc 1 329 16 is_stmt 0 view .LVU2781 + 8612 0374 0020 movs r0, #0 + 8613 0376 FFF7FEFF bl Get_ADC + 8614 .LVL672: + 329:Src/main.c **** temp16 = Get_ADC(1); + 8615 .loc 1 329 14 discriminator 1 view .LVU2782 + 8616 037a 2880 strh r0, [r5] @ movhi + 330:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8617 .loc 1 330 7 is_stmt 1 view .LVU2783 + 330:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8618 .loc 1 330 16 is_stmt 0 view .LVU2784 + 8619 037c 0120 movs r0, #1 + ARM GAS /tmp/ccyYWdjY.s page 533 - 8619 0372 A380 strh r3, [r4, #4] @ movhi - 322:Src/main.c **** Set_LTEC(2,LD2_curr_setup.CURRENT);//Drive Laser diode 2 - 8620 .loc 1 322 7 is_stmt 1 view .LVU2788 - 8621 0374 B8F80C10 ldrh r1, [r8, #12] - 8622 0378 0120 movs r0, #1 - 8623 037a FFF7FEFF bl Set_LTEC - 8624 .LVL670: - 323:Src/main.c **** - 8625 .loc 1 323 7 view .LVU2789 - 8626 037e B9F80C10 ldrh r1, [r9, #12] - 8627 0382 0220 movs r0, #2 - 8628 0384 FFF7FEFF bl Set_LTEC - 8629 .LVL671: - 327:Src/main.c **** temp16 = Get_ADC(1); - 8630 .loc 1 327 7 view .LVU2790 - 327:Src/main.c **** temp16 = Get_ADC(1); - 8631 .loc 1 327 16 is_stmt 0 view .LVU2791 - 8632 0388 0020 movs r0, #0 - 8633 038a FFF7FEFF bl Get_ADC - 8634 .LVL672: - 327:Src/main.c **** temp16 = Get_ADC(1); - 8635 .loc 1 327 14 discriminator 1 view .LVU2792 - 8636 038e 2880 strh r0, [r5] @ movhi - 328:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8637 .loc 1 328 7 is_stmt 1 view .LVU2793 - 328:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8638 .loc 1 328 16 is_stmt 0 view .LVU2794 + 8620 037e FFF7FEFF bl Get_ADC + 8621 .LVL673: + 330:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain + 8622 .loc 1 330 14 discriminator 1 view .LVU2785 + 8623 0382 2880 strh r0, [r5] @ movhi + 331:Src/main.c **** + 8624 .loc 1 331 7 is_stmt 1 view .LVU2786 + 331:Src/main.c **** + 8625 .loc 1 331 20 is_stmt 0 view .LVU2787 + 8626 0384 E081 strh r0, [r4, #14] @ movhi + 334:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8627 .loc 1 334 7 is_stmt 1 view .LVU2788 + 334:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8628 .loc 1 334 16 is_stmt 0 view .LVU2789 + 8629 0386 0120 movs r0, #1 + 8630 0388 FFF7FEFF bl Get_ADC + 8631 .LVL674: + 334:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain + 8632 .loc 1 334 14 discriminator 1 view .LVU2790 + 8633 038c 2880 strh r0, [r5] @ movhi + 335:Src/main.c **** + 8634 .loc 1 335 7 is_stmt 1 view .LVU2791 + 335:Src/main.c **** + 8635 .loc 1 335 20 is_stmt 0 view .LVU2792 + 8636 038e 2082 strh r0, [r4, #16] @ movhi + 338:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8637 .loc 1 338 7 is_stmt 1 view .LVU2793 + 338:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8638 .loc 1 338 16 is_stmt 0 view .LVU2794 8639 0390 0120 movs r0, #1 8640 0392 FFF7FEFF bl Get_ADC - 8641 .LVL673: - 328:Src/main.c **** Long_Data[7] = temp16; // PA2 -- 3V_monitor // PB1 -- U_Rt1_ext_Gain - 8642 .loc 1 328 14 discriminator 1 view .LVU2795 + 8641 .LVL675: + 338:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor + 8642 .loc 1 338 14 discriminator 1 view .LVU2795 8643 0396 2880 strh r0, [r5] @ movhi - 329:Src/main.c **** - 8644 .loc 1 329 7 is_stmt 1 view .LVU2796 - 329:Src/main.c **** - 8645 .loc 1 329 20 is_stmt 0 view .LVU2797 - 8646 0398 E081 strh r0, [r4, #14] @ movhi - 332:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8647 .loc 1 332 7 is_stmt 1 view .LVU2798 - 332:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8648 .loc 1 332 16 is_stmt 0 view .LVU2799 + 339:Src/main.c **** + 8644 .loc 1 339 7 is_stmt 1 view .LVU2796 + 339:Src/main.c **** + 8645 .loc 1 339 20 is_stmt 0 view .LVU2797 + 8646 0398 6082 strh r0, [r4, #18] @ movhi + 342:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 8647 .loc 1 342 7 is_stmt 1 view .LVU2798 + 342:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 8648 .loc 1 342 16 is_stmt 0 view .LVU2799 8649 039a 0120 movs r0, #1 8650 039c FFF7FEFF bl Get_ADC - 8651 .LVL674: - 332:Src/main.c **** Long_Data[8] = temp16; // PB0 -- U_Rt2_ext_Gain // PB0 -- U_Rt2_ext_Gain - 8652 .loc 1 332 14 discriminator 1 view .LVU2800 + 8651 .LVL676: + 342:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor + 8652 .loc 1 342 14 discriminator 1 view .LVU2800 8653 03a0 2880 strh r0, [r5] @ movhi - 333:Src/main.c **** - 8654 .loc 1 333 7 is_stmt 1 view .LVU2801 - 333:Src/main.c **** - 8655 .loc 1 333 20 is_stmt 0 view .LVU2802 - 8656 03a2 2082 strh r0, [r4, #16] @ movhi - 336:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8657 .loc 1 336 7 is_stmt 1 view .LVU2803 - 336:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8658 .loc 1 336 16 is_stmt 0 view .LVU2804 - ARM GAS /tmp/ccfIOqv2.s page 534 + 343:Src/main.c **** + 8654 .loc 1 343 7 is_stmt 1 view .LVU2801 + 343:Src/main.c **** + 8655 .loc 1 343 21 is_stmt 0 view .LVU2802 + 8656 03a2 A082 strh r0, [r4, #20] @ movhi + 346:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8657 .loc 1 346 7 is_stmt 1 view .LVU2803 + ARM GAS /tmp/ccyYWdjY.s page 534 + 346:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8658 .loc 1 346 16 is_stmt 0 view .LVU2804 8659 03a4 0120 movs r0, #1 8660 03a6 FFF7FEFF bl Get_ADC - 8661 .LVL675: - 336:Src/main.c **** Long_Data[9] = temp16; // PB1 -- U_Rt1_ext_Gain // PA2 -- 3V_monitor - 8662 .loc 1 336 14 discriminator 1 view .LVU2805 + 8661 .LVL677: + 346:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor + 8662 .loc 1 346 14 discriminator 1 view .LVU2805 8663 03aa 2880 strh r0, [r5] @ movhi - 337:Src/main.c **** - 8664 .loc 1 337 7 is_stmt 1 view .LVU2806 - 337:Src/main.c **** - 8665 .loc 1 337 20 is_stmt 0 view .LVU2807 - 8666 03ac 6082 strh r0, [r4, #18] @ movhi - 340:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8667 .loc 1 340 7 is_stmt 1 view .LVU2808 - 340:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8668 .loc 1 340 16 is_stmt 0 view .LVU2809 - 8669 03ae 0120 movs r0, #1 + 347:Src/main.c **** temp16 = Get_ADC(2); + 8664 .loc 1 347 7 is_stmt 1 view .LVU2806 + 347:Src/main.c **** temp16 = Get_ADC(2); + 8665 .loc 1 347 21 is_stmt 0 view .LVU2807 + 8666 03ac E082 strh r0, [r4, #22] @ movhi + 348:Src/main.c **** + 8667 .loc 1 348 7 is_stmt 1 view .LVU2808 + 348:Src/main.c **** + 8668 .loc 1 348 16 is_stmt 0 view .LVU2809 + 8669 03ae 0220 movs r0, #2 8670 03b0 FFF7FEFF bl Get_ADC - 8671 .LVL676: - 340:Src/main.c **** Long_Data[10] = temp16; // PC0 -- 5V1_monitor // PC0 -- 5V1_monitor - 8672 .loc 1 340 14 discriminator 1 view .LVU2810 + 8671 .LVL678: + 348:Src/main.c **** + 8672 .loc 1 348 14 discriminator 1 view .LVU2810 8673 03b4 2880 strh r0, [r5] @ movhi - 341:Src/main.c **** - 8674 .loc 1 341 7 is_stmt 1 view .LVU2811 - 341:Src/main.c **** - 8675 .loc 1 341 21 is_stmt 0 view .LVU2812 - 8676 03b6 A082 strh r0, [r4, #20] @ movhi - 344:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8677 .loc 1 344 7 is_stmt 1 view .LVU2813 - 344:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8678 .loc 1 344 16 is_stmt 0 view .LVU2814 - 8679 03b8 0120 movs r0, #1 - 8680 03ba FFF7FEFF bl Get_ADC - 8681 .LVL677: - 344:Src/main.c **** Long_Data[11] = temp16; // PC1 -- 5V2_monitor // PC1 -- 5V2_monitor - 8682 .loc 1 344 14 discriminator 1 view .LVU2815 - 8683 03be 2880 strh r0, [r5] @ movhi - 345:Src/main.c **** temp16 = Get_ADC(2); - 8684 .loc 1 345 7 is_stmt 1 view .LVU2816 - 345:Src/main.c **** temp16 = Get_ADC(2); - 8685 .loc 1 345 21 is_stmt 0 view .LVU2817 - 8686 03c0 E082 strh r0, [r4, #22] @ movhi - 346:Src/main.c **** - 8687 .loc 1 346 7 is_stmt 1 view .LVU2818 - 346:Src/main.c **** - 8688 .loc 1 346 16 is_stmt 0 view .LVU2819 - 8689 03c2 0220 movs r0, #2 - 8690 03c4 FFF7FEFF bl Get_ADC - 8691 .LVL678: - 346:Src/main.c **** - 8692 .loc 1 346 14 discriminator 1 view .LVU2820 - 8693 03c8 2880 strh r0, [r5] @ movhi - 349:Src/main.c **** temp16 = Get_ADC(4); - 8694 .loc 1 349 7 is_stmt 1 view .LVU2821 - 349:Src/main.c **** temp16 = Get_ADC(4); - 8695 .loc 1 349 16 is_stmt 0 view .LVU2822 - 8696 03ca 0320 movs r0, #3 - 8697 03cc FFF7FEFF bl Get_ADC - ARM GAS /tmp/ccfIOqv2.s page 535 + 351:Src/main.c **** temp16 = Get_ADC(4); + 8674 .loc 1 351 7 is_stmt 1 view .LVU2811 + 351:Src/main.c **** temp16 = Get_ADC(4); + 8675 .loc 1 351 16 is_stmt 0 view .LVU2812 + 8676 03b6 0320 movs r0, #3 + 8677 03b8 FFF7FEFF bl Get_ADC + 8678 .LVL679: + 351:Src/main.c **** temp16 = Get_ADC(4); + 8679 .loc 1 351 14 discriminator 1 view .LVU2813 + 8680 03bc 2880 strh r0, [r5] @ movhi + 352:Src/main.c **** Long_Data[12] = temp16; + 8681 .loc 1 352 7 is_stmt 1 view .LVU2814 + 352:Src/main.c **** Long_Data[12] = temp16; + 8682 .loc 1 352 16 is_stmt 0 view .LVU2815 + 8683 03be 0420 movs r0, #4 + 8684 03c0 FFF7FEFF bl Get_ADC + 8685 .LVL680: + 352:Src/main.c **** Long_Data[12] = temp16; + 8686 .loc 1 352 14 discriminator 1 view .LVU2816 + 8687 03c4 2880 strh r0, [r5] @ movhi + 353:Src/main.c **** temp16 = Get_ADC(5); + 8688 .loc 1 353 7 is_stmt 1 view .LVU2817 + 353:Src/main.c **** temp16 = Get_ADC(5); + 8689 .loc 1 353 21 is_stmt 0 view .LVU2818 + 8690 03c6 2083 strh r0, [r4, #24] @ movhi + 354:Src/main.c **** + 8691 .loc 1 354 7 is_stmt 1 view .LVU2819 + 354:Src/main.c **** + 8692 .loc 1 354 16 is_stmt 0 view .LVU2820 + 8693 03c8 0520 movs r0, #5 + 8694 03ca FFF7FEFF bl Get_ADC + 8695 .LVL681: + 354:Src/main.c **** + 8696 .loc 1 354 14 discriminator 1 view .LVU2821 + ARM GAS /tmp/ccyYWdjY.s page 535 - 8698 .LVL679: - 349:Src/main.c **** temp16 = Get_ADC(4); - 8699 .loc 1 349 14 discriminator 1 view .LVU2823 - 8700 03d0 2880 strh r0, [r5] @ movhi - 350:Src/main.c **** Long_Data[12] = temp16; - 8701 .loc 1 350 7 is_stmt 1 view .LVU2824 - 350:Src/main.c **** Long_Data[12] = temp16; - 8702 .loc 1 350 16 is_stmt 0 view .LVU2825 - 8703 03d2 0420 movs r0, #4 - 8704 03d4 FFF7FEFF bl Get_ADC - 8705 .LVL680: - 350:Src/main.c **** Long_Data[12] = temp16; - 8706 .loc 1 350 14 discriminator 1 view .LVU2826 - 8707 03d8 2880 strh r0, [r5] @ movhi - 351:Src/main.c **** temp16 = Get_ADC(5); - 8708 .loc 1 351 7 is_stmt 1 view .LVU2827 - 351:Src/main.c **** temp16 = Get_ADC(5); - 8709 .loc 1 351 21 is_stmt 0 view .LVU2828 - 8710 03da 2083 strh r0, [r4, #24] @ movhi - 352:Src/main.c **** - 8711 .loc 1 352 7 is_stmt 1 view .LVU2829 - 352:Src/main.c **** - 8712 .loc 1 352 16 is_stmt 0 view .LVU2830 - 8713 03dc 0520 movs r0, #5 - 8714 03de FFF7FEFF bl Get_ADC - 8715 .LVL681: - 352:Src/main.c **** - 8716 .loc 1 352 14 discriminator 1 view .LVU2831 - 8717 03e2 2880 strh r0, [r5] @ movhi - 355:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8718 .loc 1 355 7 is_stmt 1 view .LVU2832 - 355:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 8719 .loc 1 355 16 is_stmt 0 view .LVU2833 - 8720 03e4 3F4B ldr r3, .L438+28 - 8721 03e6 1B68 ldr r3, [r3] - 8722 03e8 3F4A ldr r2, .L438+32 - 8723 03ea 1360 str r3, [r2] - 356:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8724 .loc 1 356 7 is_stmt 1 view .LVU2834 - 356:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 8725 .loc 1 356 20 is_stmt 0 view .LVU2835 - 8726 03ec E380 strh r3, [r4, #6] @ movhi - 357:Src/main.c **** - 8727 .loc 1 357 7 is_stmt 1 view .LVU2836 - 357:Src/main.c **** - 8728 .loc 1 357 31 is_stmt 0 view .LVU2837 - 8729 03ee 1B0C lsrs r3, r3, #16 - 357:Src/main.c **** - 8730 .loc 1 357 20 view .LVU2838 - 8731 03f0 2381 strh r3, [r4, #8] @ movhi - 360:Src/main.c **** - 8732 .loc 1 360 7 is_stmt 1 view .LVU2839 - 360:Src/main.c **** - 8733 .loc 1 360 31 is_stmt 0 view .LVU2840 - 8734 03f2 3B88 ldrh r3, [r7] - 360:Src/main.c **** - 8735 .loc 1 360 20 view .LVU2841 - ARM GAS /tmp/ccfIOqv2.s page 536 + 8697 03ce 2880 strh r0, [r5] @ movhi + 357:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 8698 .loc 1 357 7 is_stmt 1 view .LVU2822 + 357:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 8699 .loc 1 357 16 is_stmt 0 view .LVU2823 + 8700 03d0 3F4B ldr r3, .L438+28 + 8701 03d2 1B68 ldr r3, [r3] + 8702 03d4 3F4A ldr r2, .L438+32 + 8703 03d6 1360 str r3, [r2] + 358:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 8704 .loc 1 358 7 is_stmt 1 view .LVU2824 + 358:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 8705 .loc 1 358 20 is_stmt 0 view .LVU2825 + 8706 03d8 E380 strh r3, [r4, #6] @ movhi + 359:Src/main.c **** + 8707 .loc 1 359 7 is_stmt 1 view .LVU2826 + 359:Src/main.c **** + 8708 .loc 1 359 31 is_stmt 0 view .LVU2827 + 8709 03da 1B0C lsrs r3, r3, #16 + 359:Src/main.c **** + 8710 .loc 1 359 20 view .LVU2828 + 8711 03dc 2381 strh r3, [r4, #8] @ movhi + 362:Src/main.c **** + 8712 .loc 1 362 7 is_stmt 1 view .LVU2829 + 362:Src/main.c **** + 8713 .loc 1 362 31 is_stmt 0 view .LVU2830 + 8714 03de 3B88 ldrh r3, [r7] + 362:Src/main.c **** + 8715 .loc 1 362 20 view .LVU2831 + 8716 03e0 6381 strh r3, [r4, #10] @ movhi + 365:Src/main.c **** + 8717 .loc 1 365 7 is_stmt 1 view .LVU2832 + 365:Src/main.c **** + 8718 .loc 1 365 31 is_stmt 0 view .LVU2833 + 8719 03e2 3388 ldrh r3, [r6] + 365:Src/main.c **** + 8720 .loc 1 365 20 view .LVU2834 + 8721 03e4 A381 strh r3, [r4, #12] @ movhi + 367:Src/main.c **** { + 8722 .loc 1 367 7 is_stmt 1 view .LVU2835 + 367:Src/main.c **** { + 8723 .loc 1 367 21 is_stmt 0 view .LVU2836 + 8724 03e6 3C4B ldr r3, .L438+36 + 8725 03e8 DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 + 367:Src/main.c **** { + 8726 .loc 1 367 10 view .LVU2837 + 8727 03ea 012B cmp r3, #1 + 8728 03ec 03D0 beq .L428 + 8729 .L389: + 374:Src/main.c **** } + 8730 .loc 1 374 7 is_stmt 1 view .LVU2838 + 374:Src/main.c **** } + 8731 .loc 1 374 21 is_stmt 0 view .LVU2839 + 8732 03ee 3B4B ldr r3, .L438+40 + 8733 03f0 0722 movs r2, #7 + 8734 03f2 1A70 strb r2, [r3] + 8735 03f4 7DE6 b .L373 + ARM GAS /tmp/ccyYWdjY.s page 536 - 8736 03f4 6381 strh r3, [r4, #10] @ movhi - 363:Src/main.c **** - 8737 .loc 1 363 7 is_stmt 1 view .LVU2842 - 363:Src/main.c **** - 8738 .loc 1 363 31 is_stmt 0 view .LVU2843 - 8739 03f6 3388 ldrh r3, [r6] - 363:Src/main.c **** - 8740 .loc 1 363 20 view .LVU2844 - 8741 03f8 A381 strh r3, [r4, #12] @ movhi - 365:Src/main.c **** { - 8742 .loc 1 365 7 is_stmt 1 view .LVU2845 - 365:Src/main.c **** { - 8743 .loc 1 365 21 is_stmt 0 view .LVU2846 - 8744 03fa 3C4B ldr r3, .L438+36 - 8745 03fc DB7A ldrb r3, [r3, #11] @ zero_extendqisi2 - 365:Src/main.c **** { - 8746 .loc 1 365 10 view .LVU2847 - 8747 03fe 012B cmp r3, #1 - 8748 0400 03D0 beq .L428 - 8749 .L389: - 372:Src/main.c **** } - 8750 .loc 1 372 7 is_stmt 1 view .LVU2848 - 372:Src/main.c **** } - 8751 .loc 1 372 21 is_stmt 0 view .LVU2849 - 8752 0402 3B4B ldr r3, .L438+40 - 8753 0404 0722 movs r2, #7 - 8754 0406 1A70 strb r2, [r3] - 8755 0408 7BE6 b .L373 - 8756 .L428: - 367:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8757 .loc 1 367 8 is_stmt 1 view .LVU2850 - 367:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8758 .loc 1 367 20 is_stmt 0 view .LVU2851 - 8759 040a 0234 adds r4, r4, #2 - 8760 040c 0D21 movs r1, #13 - 8761 040e 2046 mov r0, r4 - 8762 0410 FFF7FEFF bl CalculateChecksum - 8763 .LVL682: - 8764 0414 0346 mov r3, r0 - 367:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 8765 .loc 1 367 18 discriminator 1 view .LVU2852 - 8766 0416 374A ldr r2, .L438+44 - 8767 0418 1080 strh r0, [r2] @ movhi - 368:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8768 .loc 1 368 8 is_stmt 1 view .LVU2853 - 368:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); - 8769 .loc 1 368 27 is_stmt 0 view .LVU2854 - 8770 041a A01E subs r0, r4, #2 - 8771 041c 8383 strh r3, [r0, #28] @ movhi - 369:Src/main.c **** State_Data[0]|=temp16&0xff; - 8772 .loc 1 369 8 is_stmt 1 view .LVU2855 - 369:Src/main.c **** State_Data[0]|=temp16&0xff; - 8773 .loc 1 369 17 is_stmt 0 view .LVU2856 - 8774 041e FFF7FEFF bl SD_SAVE - 8775 .LVL683: - 8776 0422 0346 mov r3, r0 - 369:Src/main.c **** State_Data[0]|=temp16&0xff; - ARM GAS /tmp/ccfIOqv2.s page 537 + 8736 .L428: + 369:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8737 .loc 1 369 8 is_stmt 1 view .LVU2840 + 369:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8738 .loc 1 369 20 is_stmt 0 view .LVU2841 + 8739 03f6 0234 adds r4, r4, #2 + 8740 03f8 0D21 movs r1, #13 + 8741 03fa 2046 mov r0, r4 + 8742 03fc FFF7FEFF bl CalculateChecksum + 8743 .LVL682: + 8744 0400 0346 mov r3, r0 + 369:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 8745 .loc 1 369 18 discriminator 1 view .LVU2842 + 8746 0402 374A ldr r2, .L438+44 + 8747 0404 1080 strh r0, [r2] @ movhi + 370:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 8748 .loc 1 370 8 is_stmt 1 view .LVU2843 + 370:Src/main.c **** temp16 = SD_SAVE(&Long_Data[0]); + 8749 .loc 1 370 27 is_stmt 0 view .LVU2844 + 8750 0406 A01E subs r0, r4, #2 + 8751 0408 8383 strh r3, [r0, #28] @ movhi + 371:Src/main.c **** State_Data[0]|=temp16&0xff; + 8752 .loc 1 371 8 is_stmt 1 view .LVU2845 + 371:Src/main.c **** State_Data[0]|=temp16&0xff; + 8753 .loc 1 371 17 is_stmt 0 view .LVU2846 + 8754 040a FFF7FEFF bl SD_SAVE + 8755 .LVL683: + 8756 040e 0346 mov r3, r0 + 371:Src/main.c **** State_Data[0]|=temp16&0xff; + 8757 .loc 1 371 15 discriminator 1 view .LVU2847 + 8758 0410 2880 strh r0, [r5] @ movhi + 372:Src/main.c **** } + 8759 .loc 1 372 8 is_stmt 1 view .LVU2848 + 372:Src/main.c **** } + 8760 .loc 1 372 18 is_stmt 0 view .LVU2849 + 8761 0412 3449 ldr r1, .L438+48 + 8762 0414 0A78 ldrb r2, [r1] @ zero_extendqisi2 + 372:Src/main.c **** } + 8763 .loc 1 372 21 view .LVU2850 + 8764 0416 1343 orrs r3, r3, r2 + 8765 0418 0B70 strb r3, [r1] + 8766 041a E8E7 b .L389 + 8767 .L376: + 378:Src/main.c **** { + 8768 .loc 1 378 6 is_stmt 1 view .LVU2851 + 378:Src/main.c **** { + 8769 .loc 1 378 10 is_stmt 0 view .LVU2852 + 8770 041c 3248 ldr r0, .L438+52 + 8771 041e FFF7FEFF bl CheckChecksum + 8772 .LVL684: + 378:Src/main.c **** { + 8773 .loc 1 378 9 discriminator 1 view .LVU2853 + 8774 0422 70B9 cbnz r0, .L429 + 387:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8775 .loc 1 387 7 is_stmt 1 view .LVU2854 + 387:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8776 .loc 1 387 17 is_stmt 0 view .LVU2855 + ARM GAS /tmp/ccyYWdjY.s page 537 - 8777 .loc 1 369 15 discriminator 1 view .LVU2857 - 8778 0424 2880 strh r0, [r5] @ movhi - 370:Src/main.c **** } - 8779 .loc 1 370 8 is_stmt 1 view .LVU2858 - 370:Src/main.c **** } - 8780 .loc 1 370 18 is_stmt 0 view .LVU2859 - 8781 0426 3449 ldr r1, .L438+48 - 8782 0428 0A78 ldrb r2, [r1] @ zero_extendqisi2 - 370:Src/main.c **** } - 8783 .loc 1 370 21 view .LVU2860 - 8784 042a 1343 orrs r3, r3, r2 - 8785 042c 0B70 strb r3, [r1] - 8786 042e E8E7 b .L389 - 8787 .L376: - 376:Src/main.c **** { - 8788 .loc 1 376 6 is_stmt 1 view .LVU2861 - 376:Src/main.c **** { - 8789 .loc 1 376 10 is_stmt 0 view .LVU2862 - 8790 0430 3248 ldr r0, .L438+52 - 8791 0432 FFF7FEFF bl CheckChecksum - 8792 .LVL684: - 376:Src/main.c **** { - 8793 .loc 1 376 9 discriminator 1 view .LVU2863 - 8794 0436 70B9 cbnz r0, .L429 - 385:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8795 .loc 1 385 7 is_stmt 1 view .LVU2864 - 385:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8796 .loc 1 385 17 is_stmt 0 view .LVU2865 - 8797 0438 2F4A ldr r2, .L438+48 - 8798 043a 1378 ldrb r3, [r2] @ zero_extendqisi2 - 385:Src/main.c **** CPU_state = DEFAULT_ENABLE; - 8799 .loc 1 385 21 view .LVU2866 - 8800 043c 43F00403 orr r3, r3, #4 - 8801 0440 1370 strb r3, [r2] - 386:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8802 .loc 1 386 7 is_stmt 1 view .LVU2867 - 386:Src/main.c **** CPU_state_old = HALT;//Save main current cycle - 8803 .loc 1 386 17 is_stmt 0 view .LVU2868 - 8804 0442 2F4B ldr r3, .L438+56 - 8805 0444 0222 movs r2, #2 - 8806 0446 1A70 strb r2, [r3] - 387:Src/main.c **** } - 8807 .loc 1 387 7 is_stmt 1 view .LVU2869 - 387:Src/main.c **** } - 8808 .loc 1 387 21 is_stmt 0 view .LVU2870 - 8809 0448 294B ldr r3, .L438+40 - 8810 044a 0022 movs r2, #0 - 8811 044c 1A70 strb r2, [r3] - 8812 .L391: - 389:Src/main.c **** break; - 8813 .loc 1 389 6 is_stmt 1 view .LVU2871 - 389:Src/main.c **** break; - 8814 .loc 1 389 32 is_stmt 0 view .LVU2872 - 8815 044e 2D4B ldr r3, .L438+60 - 8816 0450 0122 movs r2, #1 - 8817 0452 1A70 strb r2, [r3] - 390:Src/main.c **** case RUN_TASK: - ARM GAS /tmp/ccfIOqv2.s page 538 + 8777 0424 2F4A ldr r2, .L438+48 + 8778 0426 1378 ldrb r3, [r2] @ zero_extendqisi2 + 387:Src/main.c **** CPU_state = DEFAULT_ENABLE; + 8779 .loc 1 387 21 view .LVU2856 + 8780 0428 43F00403 orr r3, r3, #4 + 8781 042c 1370 strb r3, [r2] + 388:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8782 .loc 1 388 7 is_stmt 1 view .LVU2857 + 388:Src/main.c **** CPU_state_old = HALT;//Save main current cycle + 8783 .loc 1 388 17 is_stmt 0 view .LVU2858 + 8784 042e 2F4B ldr r3, .L438+56 + 8785 0430 0222 movs r2, #2 + 8786 0432 1A70 strb r2, [r3] + 389:Src/main.c **** } + 8787 .loc 1 389 7 is_stmt 1 view .LVU2859 + 389:Src/main.c **** } + 8788 .loc 1 389 21 is_stmt 0 view .LVU2860 + 8789 0434 294B ldr r3, .L438+40 + 8790 0436 0022 movs r2, #0 + 8791 0438 1A70 strb r2, [r3] + 8792 .L391: + 391:Src/main.c **** break; + 8793 .loc 1 391 6 is_stmt 1 view .LVU2861 + 391:Src/main.c **** break; + 8794 .loc 1 391 32 is_stmt 0 view .LVU2862 + 8795 043a 2D4B ldr r3, .L438+60 + 8796 043c 0122 movs r2, #1 + 8797 043e 1A70 strb r2, [r3] + 392:Src/main.c **** case RUN_TASK: + 8798 .loc 1 392 5 is_stmt 1 view .LVU2863 + 8799 0440 57E6 b .L373 + 8800 .L429: + 380:Src/main.c **** TO6_before = TO6; + 8801 .loc 1 380 7 view .LVU2864 + 8802 0442 254B ldr r3, .L438+36 + 8803 0444 2B4A ldr r2, .L438+64 + 8804 0446 2C49 ldr r1, .L438+68 + 8805 0448 2748 ldr r0, .L438+52 + 8806 044a FFF7FEFF bl Decode_task + 8807 .LVL685: + 381:Src/main.c **** CPU_state = RUN_TASK; + 8808 .loc 1 381 7 view .LVU2865 + 381:Src/main.c **** CPU_state = RUN_TASK; + 8809 .loc 1 381 18 is_stmt 0 view .LVU2866 + 8810 044e 204B ldr r3, .L438+28 + 8811 0450 1A68 ldr r2, [r3] + 8812 0452 2A4B ldr r3, .L438+72 + 8813 0454 1A60 str r2, [r3] + 382:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 8814 .loc 1 382 7 is_stmt 1 view .LVU2867 + 382:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle + 8815 .loc 1 382 17 is_stmt 0 view .LVU2868 + 8816 0456 0923 movs r3, #9 + 8817 0458 244A ldr r2, .L438+56 + 8818 045a 1370 strb r3, [r2] + 383:Src/main.c **** } + 8819 .loc 1 383 7 is_stmt 1 view .LVU2869 + ARM GAS /tmp/ccyYWdjY.s page 538 - 8818 .loc 1 390 5 is_stmt 1 view .LVU2873 - 8819 0454 55E6 b .L373 - 8820 .L429: - 378:Src/main.c **** TO6_before = TO6; - 8821 .loc 1 378 7 view .LVU2874 - 8822 0456 254B ldr r3, .L438+36 - 8823 0458 2B4A ldr r2, .L438+64 - 8824 045a 2C49 ldr r1, .L438+68 - 8825 045c 2748 ldr r0, .L438+52 - 8826 045e FFF7FEFF bl Decode_task - 8827 .LVL685: - 379:Src/main.c **** CPU_state = RUN_TASK; - 8828 .loc 1 379 7 view .LVU2875 - 379:Src/main.c **** CPU_state = RUN_TASK; - 8829 .loc 1 379 18 is_stmt 0 view .LVU2876 - 8830 0462 204B ldr r3, .L438+28 - 8831 0464 1A68 ldr r2, [r3] - 8832 0466 2A4B ldr r3, .L438+72 - 8833 0468 1A60 str r2, [r3] - 380:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8834 .loc 1 380 7 is_stmt 1 view .LVU2877 - 380:Src/main.c **** CPU_state_old = RUN_TASK;//Save main current cycle - 8835 .loc 1 380 17 is_stmt 0 view .LVU2878 - 8836 046a 0923 movs r3, #9 - 8837 046c 244A ldr r2, .L438+56 - 8838 046e 1370 strb r3, [r2] - 381:Src/main.c **** } - 8839 .loc 1 381 7 is_stmt 1 view .LVU2879 - 381:Src/main.c **** } - 8840 .loc 1 381 21 is_stmt 0 view .LVU2880 - 8841 0470 1F4A ldr r2, .L438+40 - 8842 0472 1370 strb r3, [r2] - 8843 0474 EBE7 b .L391 - 8844 .L374: - 392:Src/main.c **** { - 8845 .loc 1 392 6 is_stmt 1 view .LVU2881 - 392:Src/main.c **** { - 8846 .loc 1 392 18 is_stmt 0 view .LVU2882 - 8847 0476 144B ldr r3, .L438 - 8848 0478 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8849 047a 012B cmp r3, #1 - 8850 047c 54D0 beq .L392 - 8851 047e 022B cmp r3, #2 - 8852 0480 00F08E81 beq .L393 - 8853 .L394: - 675:Src/main.c **** { - 8854 .loc 1 675 6 is_stmt 1 view .LVU2883 - 675:Src/main.c **** { - 8855 .loc 1 675 13 is_stmt 0 view .LVU2884 - 8856 0484 114B ldr r3, .L438+4 - 8857 0486 1B68 ldr r3, [r3] - 8858 0488 114A ldr r2, .L438+8 - 8859 048a 1268 ldr r2, [r2] - 675:Src/main.c **** { - 8860 .loc 1 675 9 view .LVU2885 - 8861 048c 9342 cmp r3, r2 - 8862 048e 00F23582 bhi .L430 - ARM GAS /tmp/ccfIOqv2.s page 539 - - - 8863 .L413: - 727:Src/main.c **** - 8864 .loc 1 727 13 is_stmt 1 discriminator 1 view .LVU2886 - 8865 0492 204B ldr r3, .L438+76 - 8866 0494 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 8867 0496 002B cmp r3, #0 - 8868 0498 FBD0 beq .L413 + 383:Src/main.c **** } + 8820 .loc 1 383 21 is_stmt 0 view .LVU2870 + 8821 045c 1F4A ldr r2, .L438+40 + 8822 045e 1370 strb r3, [r2] + 8823 0460 EBE7 b .L391 + 8824 .L374: + 394:Src/main.c **** { + 8825 .loc 1 394 6 is_stmt 1 view .LVU2871 + 394:Src/main.c **** { + 8826 .loc 1 394 18 is_stmt 0 view .LVU2872 + 8827 0462 144B ldr r3, .L438 + 8828 0464 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8829 0466 012B cmp r3, #1 + 8830 0468 54D0 beq .L392 + 8831 046a 022B cmp r3, #2 + 8832 046c 00F08E81 beq .L393 + 8833 .L394: + 677:Src/main.c **** { + 8834 .loc 1 677 6 is_stmt 1 view .LVU2873 + 677:Src/main.c **** { + 8835 .loc 1 677 13 is_stmt 0 view .LVU2874 + 8836 0470 114B ldr r3, .L438+4 + 8837 0472 1B68 ldr r3, [r3] + 8838 0474 114A ldr r2, .L438+8 + 8839 0476 1268 ldr r2, [r2] + 677:Src/main.c **** { + 8840 .loc 1 677 9 view .LVU2875 + 8841 0478 9342 cmp r3, r2 + 8842 047a 00F23582 bhi .L430 + 8843 .L413: 729:Src/main.c **** - 8869 .loc 1 729 6 view .LVU2887 - 8870 049a FFF7FEFF bl Stop_TIM10 - 8871 .LVL686: - 731:Src/main.c **** { - 8872 .loc 1 731 6 view .LVU2888 - 731:Src/main.c **** { - 8873 .loc 1 731 14 is_stmt 0 view .LVU2889 - 8874 049e 0A4B ldr r3, .L438 - 8875 04a0 DB8A ldrh r3, [r3, #22] - 731:Src/main.c **** { - 8876 .loc 1 731 9 view .LVU2890 - 8877 04a2 032B cmp r3, #3 - 8878 04a4 0BD9 bls .L414 - 733:Src/main.c **** TO10_counter = task.dt / 10; - 8879 .loc 1 733 7 is_stmt 1 view .LVU2891 - 733:Src/main.c **** TO10_counter = task.dt / 10; - 8880 .loc 1 733 26 is_stmt 0 view .LVU2892 - 8881 04a6 1C4B ldr r3, .L438+80 - 8882 04a8 1A68 ldr r2, [r3] - 8883 04aa 1C4B ldr r3, .L438+84 - 8884 04ac DA60 str r2, [r3, #12] - 734:Src/main.c **** } - 8885 .loc 1 734 7 is_stmt 1 view .LVU2893 - 734:Src/main.c **** } - 8886 .loc 1 734 26 is_stmt 0 view .LVU2894 - 8887 04ae 064B ldr r3, .L438 - 8888 04b0 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 - 734:Src/main.c **** } - 8889 .loc 1 734 30 view .LVU2895 - 8890 04b2 1B4A ldr r2, .L438+88 - 8891 04b4 A2FB0323 umull r2, r3, r2, r3 - 8892 04b8 DB08 lsrs r3, r3, #3 - 734:Src/main.c **** } - 8893 .loc 1 734 20 view .LVU2896 - 8894 04ba 1A4A ldr r2, .L438+92 - 8895 04bc 1360 str r3, [r2] - 8896 .L414: - 737:Src/main.c **** break; - 8897 .loc 1 737 6 is_stmt 1 view .LVU2897 - 737:Src/main.c **** break; - 8898 .loc 1 737 20 is_stmt 0 view .LVU2898 - 8899 04be 0C4B ldr r3, .L438+40 - 8900 04c0 0922 movs r2, #9 - 8901 04c2 1A70 strb r2, [r3] - 738:Src/main.c **** } - 8902 .loc 1 738 9 is_stmt 1 view .LVU2899 - 8903 04c4 1DE6 b .L373 - 8904 .L439: - 8905 04c6 00BF .align 2 - ARM GAS /tmp/ccfIOqv2.s page 540 + 8844 .loc 1 729 13 is_stmt 1 discriminator 1 view .LVU2876 + 8845 047e 204B ldr r3, .L438+76 + 8846 0480 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 8847 0482 002B cmp r3, #0 + 8848 0484 FBD0 beq .L413 + 731:Src/main.c **** + 8849 .loc 1 731 6 view .LVU2877 + 8850 0486 FFF7FEFF bl Stop_TIM10 + 8851 .LVL686: + 733:Src/main.c **** { + 8852 .loc 1 733 6 view .LVU2878 + 733:Src/main.c **** { + 8853 .loc 1 733 14 is_stmt 0 view .LVU2879 + 8854 048a 0A4B ldr r3, .L438 + 8855 048c DB8A ldrh r3, [r3, #22] + 733:Src/main.c **** { + 8856 .loc 1 733 9 view .LVU2880 + 8857 048e 032B cmp r3, #3 + 8858 0490 0BD9 bls .L414 + 735:Src/main.c **** TO10_counter = task.dt / 10; + 8859 .loc 1 735 7 is_stmt 1 view .LVU2881 + 735:Src/main.c **** TO10_counter = task.dt / 10; + 8860 .loc 1 735 26 is_stmt 0 view .LVU2882 + 8861 0492 1C4B ldr r3, .L438+80 + 8862 0494 1A68 ldr r2, [r3] + 8863 0496 1C4B ldr r3, .L438+84 + ARM GAS /tmp/ccyYWdjY.s page 539 - 8906 .L438: - 8907 04c8 00000000 .word task - 8908 04cc 00000000 .word TO7 - 8909 04d0 00000000 .word TO7_before - 8910 04d4 00000000 .word LD1_param - 8911 04d8 00000000 .word LD2_param - 8912 04dc 00000000 .word temp16 - 8913 04e0 00000000 .word Long_Data - 8914 04e4 00000000 .word TO6 - 8915 04e8 00000000 .word TO6_stop - 8916 04ec 00000000 .word Curr_setup - 8917 04f0 00000000 .word CPU_state_old - 8918 04f4 00000000 .word CS_result - 8919 04f8 00000000 .word State_Data - 8920 04fc 00000000 .word COMMAND - 8921 0500 00000000 .word CPU_state - 8922 0504 00000000 .word UART_transmission_request - 8923 0508 00000000 .word LD2_curr_setup - 8924 050c 00000000 .word LD1_curr_setup - 8925 0510 00000000 .word TO6_before - 8926 0514 00000000 .word TIM10_coflag - 8927 0518 00000000 .word TIM10_period - 8928 051c 00000000 .word htim10 - 8929 0520 CDCCCCCC .word -858993459 - 8930 0524 00000000 .word TO10_counter - 8931 .L392: - 8932 .LBB577: - 422:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8933 .loc 1 422 7 view .LVU2900 - 422:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8934 .loc 1 422 38 is_stmt 0 view .LVU2901 - 8935 0528 8B4B ldr r3, .L440 - 8936 052a D3ED077A vldr.32 s15, [r3, #28] - 422:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 8937 .loc 1 422 7 view .LVU2902 - 8938 052e FCEEE77A vcvt.u32.f32 s15, s15 - 8939 0532 17EE903A vmov r3, s15 @ int - 8940 0536 99B2 uxth r1, r3 - 8941 0538 0220 movs r0, #2 - 8942 053a FFF7FEFF bl Set_LTEC - 8943 .LVL687: - 423:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8944 .loc 1 423 7 is_stmt 1 view .LVU2903 - 423:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 8945 .loc 1 423 14 is_stmt 0 view .LVU2904 - 8946 053e 0320 movs r0, #3 - 8947 0540 FFF7FEFF bl MPhD_T - 8948 .LVL688: - 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8949 .loc 1 424 7 is_stmt 1 view .LVU2905 - 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8950 .loc 1 424 32 is_stmt 0 view .LVU2906 - 8951 0544 0320 movs r0, #3 - 8952 0546 FFF7FEFF bl MPhD_T - 8953 .LVL689: - 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 8954 .loc 1 424 30 discriminator 1 view .LVU2907 - ARM GAS /tmp/ccfIOqv2.s page 541 + 8864 0498 DA60 str r2, [r3, #12] + 736:Src/main.c **** } + 8865 .loc 1 736 7 is_stmt 1 view .LVU2883 + 736:Src/main.c **** } + 8866 .loc 1 736 26 is_stmt 0 view .LVU2884 + 8867 049a 064B ldr r3, .L438 + 8868 049c 1B7D ldrb r3, [r3, #20] @ zero_extendqisi2 + 736:Src/main.c **** } + 8869 .loc 1 736 30 view .LVU2885 + 8870 049e 1B4A ldr r2, .L438+88 + 8871 04a0 A2FB0323 umull r2, r3, r2, r3 + 8872 04a4 DB08 lsrs r3, r3, #3 + 736:Src/main.c **** } + 8873 .loc 1 736 20 view .LVU2886 + 8874 04a6 1A4A ldr r2, .L438+92 + 8875 04a8 1360 str r3, [r2] + 8876 .L414: + 739:Src/main.c **** break; + 8877 .loc 1 739 6 is_stmt 1 view .LVU2887 + 739:Src/main.c **** break; + 8878 .loc 1 739 20 is_stmt 0 view .LVU2888 + 8879 04aa 0C4B ldr r3, .L438+40 + 8880 04ac 0922 movs r2, #9 + 8881 04ae 1A70 strb r2, [r3] + 740:Src/main.c **** } + 8882 .loc 1 740 9 is_stmt 1 view .LVU2889 + 8883 04b0 1FE6 b .L373 + 8884 .L439: + 8885 04b2 00BF .align 2 + 8886 .L438: + 8887 04b4 00000000 .word task + 8888 04b8 00000000 .word TO7 + 8889 04bc 00000000 .word TO7_before + 8890 04c0 00000000 .word LD1_param + 8891 04c4 00000000 .word LD2_param + 8892 04c8 00000000 .word temp16 + 8893 04cc 00000000 .word Long_Data + 8894 04d0 00000000 .word TO6 + 8895 04d4 00000000 .word TO6_stop + 8896 04d8 00000000 .word Curr_setup + 8897 04dc 00000000 .word CPU_state_old + 8898 04e0 00000000 .word CS_result + 8899 04e4 00000000 .word State_Data + 8900 04e8 00000000 .word COMMAND + 8901 04ec 00000000 .word CPU_state + 8902 04f0 00000000 .word UART_transmission_request + 8903 04f4 00000000 .word LD2_curr_setup + 8904 04f8 00000000 .word LD1_curr_setup + 8905 04fc 00000000 .word TO6_before + 8906 0500 00000000 .word TIM10_coflag + 8907 0504 00000000 .word TIM10_period + 8908 0508 00000000 .word htim10 + 8909 050c CDCCCCCC .word -858993459 + 8910 0510 00000000 .word TO10_counter + 8911 .L392: + 8912 .LBB577: + 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + ARM GAS /tmp/ccyYWdjY.s page 540 - 8955 054a 844C ldr r4, .L440+4 - 8956 054c 2080 strh r0, [r4] @ movhi - 425:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8957 .loc 1 425 7 is_stmt 1 view .LVU2908 - 425:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 8958 .loc 1 425 14 is_stmt 0 view .LVU2909 - 8959 054e 0420 movs r0, #4 - 8960 0550 FFF7FEFF bl MPhD_T - 8961 .LVL690: - 426:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8962 .loc 1 426 7 is_stmt 1 view .LVU2910 - 426:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8963 .loc 1 426 32 is_stmt 0 view .LVU2911 - 8964 0554 0420 movs r0, #4 - 8965 0556 FFF7FEFF bl MPhD_T - 8966 .LVL691: - 426:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 8967 .loc 1 426 30 discriminator 1 view .LVU2912 - 8968 055a 814D ldr r5, .L440+8 - 8969 055c 2880 strh r0, [r5] @ movhi - 427:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8970 .loc 1 427 7 is_stmt 1 view .LVU2913 - 427:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8971 .loc 1 427 14 is_stmt 0 view .LVU2914 - 8972 055e 0122 movs r2, #1 - 8973 0560 2146 mov r1, r4 - 8974 0562 8048 ldr r0, .L440+12 - 8975 0564 FFF7FEFF bl PID_Controller_Temp - 8976 .LVL692: - 8977 0568 0146 mov r1, r0 - 427:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 8978 .loc 1 427 13 discriminator 1 view .LVU2915 - 8979 056a 7F4C ldr r4, .L440+16 - 8980 056c 2080 strh r0, [r4] @ movhi - 428:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 8981 .loc 1 428 7 is_stmt 1 view .LVU2916 - 8982 056e 0320 movs r0, #3 - 8983 0570 FFF7FEFF bl Set_LTEC - 8984 .LVL693: - 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8985 .loc 1 429 7 view .LVU2917 - 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8986 .loc 1 429 14 is_stmt 0 view .LVU2918 - 8987 0574 0222 movs r2, #2 - 8988 0576 2946 mov r1, r5 - 8989 0578 7C48 ldr r0, .L440+20 - 8990 057a FFF7FEFF bl PID_Controller_Temp - 8991 .LVL694: - 8992 057e 0146 mov r1, r0 - 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 8993 .loc 1 429 13 discriminator 1 view .LVU2919 - 8994 0580 2080 strh r0, [r4] @ movhi - 430:Src/main.c **** - 8995 .loc 1 430 7 is_stmt 1 view .LVU2920 - 8996 0582 0420 movs r0, #4 - 8997 0584 FFF7FEFF bl Set_LTEC - 8998 .LVL695: - ARM GAS /tmp/ccfIOqv2.s page 542 + 8913 .loc 1 424 7 view .LVU2890 + 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 8914 .loc 1 424 38 is_stmt 0 view .LVU2891 + 8915 0514 8B4B ldr r3, .L440 + 8916 0516 D3ED077A vldr.32 s15, [r3, #28] + 424:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 8917 .loc 1 424 7 view .LVU2892 + 8918 051a FCEEE77A vcvt.u32.f32 s15, s15 + 8919 051e 17EE903A vmov r3, s15 @ int + 8920 0522 99B2 uxth r1, r3 + 8921 0524 0220 movs r0, #2 + 8922 0526 FFF7FEFF bl Set_LTEC + 8923 .LVL687: + 425:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 8924 .loc 1 425 7 is_stmt 1 view .LVU2893 + 425:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 8925 .loc 1 425 14 is_stmt 0 view .LVU2894 + 8926 052a 0320 movs r0, #3 + 8927 052c FFF7FEFF bl MPhD_T + 8928 .LVL688: + 426:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8929 .loc 1 426 7 is_stmt 1 view .LVU2895 + 426:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8930 .loc 1 426 32 is_stmt 0 view .LVU2896 + 8931 0530 0320 movs r0, #3 + 8932 0532 FFF7FEFF bl MPhD_T + 8933 .LVL689: + 426:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 8934 .loc 1 426 30 discriminator 1 view .LVU2897 + 8935 0536 844C ldr r4, .L440+4 + 8936 0538 2080 strh r0, [r4] @ movhi + 427:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 8937 .loc 1 427 7 is_stmt 1 view .LVU2898 + 427:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 8938 .loc 1 427 14 is_stmt 0 view .LVU2899 + 8939 053a 0420 movs r0, #4 + 8940 053c FFF7FEFF bl MPhD_T + 8941 .LVL690: + 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8942 .loc 1 428 7 is_stmt 1 view .LVU2900 + 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8943 .loc 1 428 32 is_stmt 0 view .LVU2901 + 8944 0540 0420 movs r0, #4 + 8945 0542 FFF7FEFF bl MPhD_T + 8946 .LVL691: + 428:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 8947 .loc 1 428 30 discriminator 1 view .LVU2902 + 8948 0546 814D ldr r5, .L440+8 + 8949 0548 2880 strh r0, [r5] @ movhi + 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8950 .loc 1 429 7 is_stmt 1 view .LVU2903 + 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8951 .loc 1 429 14 is_stmt 0 view .LVU2904 + 8952 054a 0122 movs r2, #1 + 8953 054c 2146 mov r1, r4 + 8954 054e 8048 ldr r0, .L440+12 + 8955 0550 FFF7FEFF bl PID_Controller_Temp + ARM GAS /tmp/ccyYWdjY.s page 541 - 433:Src/main.c **** //for (uint32_t i = 100000; i; --i){;} - 8999 .loc 1 433 7 view .LVU2921 - 9000 0588 0122 movs r2, #1 - 9001 058a 8021 movs r1, #128 - 9002 058c 7848 ldr r0, .L440+24 - 9003 058e FFF7FEFF bl HAL_GPIO_WritePin - 9004 .LVL696: - 437:Src/main.c **** if (st != HAL_OK) - 9005 .loc 1 437 7 view .LVU2922 - 437:Src/main.c **** if (st != HAL_OK) - 9006 .loc 1 437 12 is_stmt 0 view .LVU2923 - 9007 0592 7848 ldr r0, .L440+28 - 9008 0594 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9009 .LVL697: - 438:Src/main.c **** while(1); - 9010 .loc 1 438 7 is_stmt 1 view .LVU2924 - 438:Src/main.c **** while(1); - 9011 .loc 1 438 10 is_stmt 0 view .LVU2925 - 9012 0598 0028 cmp r0, #0 - 9013 059a 40F09780 bne .L396 - 441:Src/main.c **** uint16_t trigger_counter = 0; - 9014 .loc 1 441 7 is_stmt 1 view .LVU2926 - 9015 .LVL698: - 442:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9016 .loc 1 442 7 view .LVU2927 - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9017 .loc 1 443 7 view .LVU2928 - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9018 .loc 1 443 47 is_stmt 0 view .LVU2929 - 9019 059e 6E4D ldr r5, .L440 - 9020 05a0 95ED027A vldr.32 s14, [r5, #8] - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9021 .loc 1 443 64 view .LVU2930 - 9022 05a4 D5ED047A vldr.32 s15, [r5, #16] - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9023 .loc 1 443 58 view .LVU2931 - 9024 05a8 37EE677A vsub.f32 s14, s14, s15 - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9025 .loc 1 443 84 view .LVU2932 - 9026 05ac D5ED036A vldr.32 s13, [r5, #12] - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9027 .loc 1 443 79 view .LVU2933 - 9028 05b0 C7EE267A vdiv.f32 s15, s14, s13 - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9029 .loc 1 443 97 view .LVU2934 - 9030 05b4 B2EE047A vmov.f32 s14, #1.0e+1 - 9031 05b8 67EE877A vmul.f32 s15, s15, s14 - 443:Src/main.c **** uint16_t task_sheduler = 0; - 9032 .loc 1 443 31 view .LVU2935 - 9033 05bc FCEEE77A vcvt.u32.f32 s15, s15 - 9034 05c0 CDED017A vstr.32 s15, [sp, #4] @ int - 9035 05c4 9DF80470 ldrb r7, [sp, #4] @ zero_extendqisi2 - 9036 .LVL699: - 444:Src/main.c **** - 9037 .loc 1 444 7 is_stmt 1 view .LVU2936 - 448:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9038 .loc 1 448 7 view .LVU2937 - ARM GAS /tmp/ccfIOqv2.s page 543 + 8956 .LVL692: + 8957 0554 0146 mov r1, r0 + 429:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 8958 .loc 1 429 13 discriminator 1 view .LVU2905 + 8959 0556 7F4C ldr r4, .L440+16 + 8960 0558 2080 strh r0, [r4] @ movhi + 430:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 8961 .loc 1 430 7 is_stmt 1 view .LVU2906 + 8962 055a 0320 movs r0, #3 + 8963 055c FFF7FEFF bl Set_LTEC + 8964 .LVL693: + 431:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8965 .loc 1 431 7 view .LVU2907 + 431:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8966 .loc 1 431 14 is_stmt 0 view .LVU2908 + 8967 0560 0222 movs r2, #2 + 8968 0562 2946 mov r1, r5 + 8969 0564 7C48 ldr r0, .L440+20 + 8970 0566 FFF7FEFF bl PID_Controller_Temp + 8971 .LVL694: + 8972 056a 0146 mov r1, r0 + 431:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 8973 .loc 1 431 13 discriminator 1 view .LVU2909 + 8974 056c 2080 strh r0, [r4] @ movhi + 432:Src/main.c **** + 8975 .loc 1 432 7 is_stmt 1 view .LVU2910 + 8976 056e 0420 movs r0, #4 + 8977 0570 FFF7FEFF bl Set_LTEC + 8978 .LVL695: + 435:Src/main.c **** //for (uint32_t i = 100000; i; --i){;} + 8979 .loc 1 435 7 view .LVU2911 + 8980 0574 0122 movs r2, #1 + 8981 0576 8021 movs r1, #128 + 8982 0578 7848 ldr r0, .L440+24 + 8983 057a FFF7FEFF bl HAL_GPIO_WritePin + 8984 .LVL696: + 439:Src/main.c **** if (st != HAL_OK) + 8985 .loc 1 439 7 view .LVU2912 + 439:Src/main.c **** if (st != HAL_OK) + 8986 .loc 1 439 12 is_stmt 0 view .LVU2913 + 8987 057e 7848 ldr r0, .L440+28 + 8988 0580 FFF7FEFF bl HAL_TIM_Base_Start_IT + 8989 .LVL697: + 440:Src/main.c **** while(1); + 8990 .loc 1 440 7 is_stmt 1 view .LVU2914 + 440:Src/main.c **** while(1); + 8991 .loc 1 440 10 is_stmt 0 view .LVU2915 + 8992 0584 0028 cmp r0, #0 + 8993 0586 40F09780 bne .L396 + 443:Src/main.c **** uint16_t trigger_counter = 0; + 8994 .loc 1 443 7 is_stmt 1 view .LVU2916 + 8995 .LVL698: + 444:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 8996 .loc 1 444 7 view .LVU2917 + 445:Src/main.c **** uint16_t task_sheduler = 0; + 8997 .loc 1 445 7 view .LVU2918 + 445:Src/main.c **** uint16_t task_sheduler = 0; + ARM GAS /tmp/ccyYWdjY.s page 542 - 9039 05c8 DFF8CCA1 ldr r10, .L440+64 - 9040 05cc 0021 movs r1, #0 - 9041 05ce 5046 mov r0, r10 - 9042 .LVL700: - 448:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock - 9043 .loc 1 448 7 is_stmt 0 view .LVU2938 - 9044 05d0 FFF7FEFF bl HAL_TIM_PWM_Stop - 9045 .LVL701: - 449:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9046 .loc 1 449 7 is_stmt 1 view .LVU2939 - 9047 05d4 DFF8C491 ldr r9, .L440+68 - 9048 05d8 0821 movs r1, #8 - 9049 05da 4846 mov r0, r9 - 9050 05dc FFF7FEFF bl HAL_TIM_PWM_Stop - 9051 .LVL702: - 450:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9052 .loc 1 450 7 view .LVU2940 - 450:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9053 .loc 1 450 13 is_stmt 0 view .LVU2941 - 9054 05e0 DFF8A881 ldr r8, .L440+52 - 9055 05e4 D8F80030 ldr r3, [r8] - 450:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode - 9056 .loc 1 450 20 view .LVU2942 - 9057 05e8 23F00803 bic r3, r3, #8 - 9058 05ec C8F80030 str r3, [r8] - 451:Src/main.c **** - 9059 .loc 1 451 7 is_stmt 1 view .LVU2943 - 451:Src/main.c **** - 9060 .loc 1 451 12 is_stmt 0 view .LVU2944 - 9061 05f0 614E ldr r6, .L440+32 - 9062 05f2 3368 ldr r3, [r6] - 451:Src/main.c **** - 9063 .loc 1 451 19 view .LVU2945 - 9064 05f4 23F00803 bic r3, r3, #8 - 9065 05f8 3360 str r3, [r6] - 455:Src/main.c **** TIM4 -> CNT = 0; - 9066 .loc 1 455 7 is_stmt 1 view .LVU2946 - 455:Src/main.c **** TIM4 -> CNT = 0; - 9067 .loc 1 455 20 is_stmt 0 view .LVU2947 - 9068 05fa 0024 movs r4, #0 - 9069 05fc C8F82440 str r4, [r8, #36] - 456:Src/main.c **** - 9070 .loc 1 456 7 is_stmt 1 view .LVU2948 - 456:Src/main.c **** - 9071 .loc 1 456 19 is_stmt 0 view .LVU2949 - 9072 0600 7462 str r4, [r6, #36] - 458:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock - 9073 .loc 1 458 7 is_stmt 1 view .LVU2950 - 9074 0602 2146 mov r1, r4 - 9075 0604 5046 mov r0, r10 - 9076 0606 FFF7FEFF bl HAL_TIM_PWM_Start - 9077 .LVL703: - 459:Src/main.c **** //TIM4 -> CNT = 0; - 9078 .loc 1 459 7 view .LVU2951 - 9079 060a 0821 movs r1, #8 - 9080 060c 4846 mov r0, r9 - 9081 060e FFF7FEFF bl HAL_TIM_PWM_Start - ARM GAS /tmp/ccfIOqv2.s page 544 + 8998 .loc 1 445 47 is_stmt 0 view .LVU2919 + 8999 058a 6E4D ldr r5, .L440 + 9000 058c 95ED027A vldr.32 s14, [r5, #8] + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9001 .loc 1 445 64 view .LVU2920 + 9002 0590 D5ED047A vldr.32 s15, [r5, #16] + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9003 .loc 1 445 58 view .LVU2921 + 9004 0594 37EE677A vsub.f32 s14, s14, s15 + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9005 .loc 1 445 84 view .LVU2922 + 9006 0598 D5ED036A vldr.32 s13, [r5, #12] + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9007 .loc 1 445 79 view .LVU2923 + 9008 059c C7EE267A vdiv.f32 s15, s14, s13 + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9009 .loc 1 445 97 view .LVU2924 + 9010 05a0 B2EE047A vmov.f32 s14, #1.0e+1 + 9011 05a4 67EE877A vmul.f32 s15, s15, s14 + 445:Src/main.c **** uint16_t task_sheduler = 0; + 9012 .loc 1 445 31 view .LVU2925 + 9013 05a8 FCEEE77A vcvt.u32.f32 s15, s15 + 9014 05ac CDED017A vstr.32 s15, [sp, #4] @ int + 9015 05b0 9DF80470 ldrb r7, [sp, #4] @ zero_extendqisi2 + 9016 .LVL699: + 446:Src/main.c **** + 9017 .loc 1 446 7 is_stmt 1 view .LVU2926 + 450:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 9018 .loc 1 450 7 view .LVU2927 + 9019 05b4 DFF8CCA1 ldr r10, .L440+64 + 9020 05b8 0021 movs r1, #0 + 9021 05ba 5046 mov r0, r10 + 9022 .LVL700: + 450:Src/main.c **** HAL_TIM_PWM_Stop(&htim4, TIM_CHANNEL_3); //start ADC clock + 9023 .loc 1 450 7 is_stmt 0 view .LVU2928 + 9024 05bc FFF7FEFF bl HAL_TIM_PWM_Stop + 9025 .LVL701: + 451:Src/main.c **** TIM11 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9026 .loc 1 451 7 is_stmt 1 view .LVU2929 + 9027 05c0 DFF8C491 ldr r9, .L440+68 + 9028 05c4 0821 movs r1, #8 + 9029 05c6 4846 mov r0, r9 + 9030 05c8 FFF7FEFF bl HAL_TIM_PWM_Stop + 9031 .LVL702: + 452:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9032 .loc 1 452 7 view .LVU2930 + 452:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9033 .loc 1 452 13 is_stmt 0 view .LVU2931 + 9034 05cc DFF8A881 ldr r8, .L440+52 + 9035 05d0 D8F80030 ldr r3, [r8] + 452:Src/main.c **** TIM4 -> CR1 &= ~(1 << 3); //disables one-pulse mode + 9036 .loc 1 452 20 view .LVU2932 + 9037 05d4 23F00803 bic r3, r3, #8 + 9038 05d8 C8F80030 str r3, [r8] + 453:Src/main.c **** + 9039 .loc 1 453 7 is_stmt 1 view .LVU2933 + 453:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 543 - 9082 .LVL704: - 462:Src/main.c **** TIM11 -> CNT = 0; - 9083 .loc 1 462 7 view .LVU2952 - 462:Src/main.c **** TIM11 -> CNT = 0; - 9084 .loc 1 462 26 is_stmt 0 view .LVU2953 - 9085 0612 F36A ldr r3, [r6, #44] - 462:Src/main.c **** TIM11 -> CNT = 0; - 9086 .loc 1 462 33 view .LVU2954 - 9087 0614 143B subs r3, r3, #20 - 462:Src/main.c **** TIM11 -> CNT = 0; - 9088 .loc 1 462 19 view .LVU2955 - 9089 0616 7362 str r3, [r6, #36] - 463:Src/main.c **** - 9090 .loc 1 463 7 is_stmt 1 view .LVU2956 - 463:Src/main.c **** - 9091 .loc 1 463 20 is_stmt 0 view .LVU2957 - 9092 0618 C8F82440 str r4, [r8, #36] - 465:Src/main.c **** uint32_t postAmpl_1_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 1.0) / task - 9093 .loc 1 465 7 is_stmt 1 view .LVU2958 - 9094 .LVL705: - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9095 .loc 1 466 7 view .LVU2959 - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9096 .loc 1 466 50 is_stmt 0 view .LVU2960 - 9097 061c 95ED026A vldr.32 s12, [r5, #8] - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9098 .loc 1 466 67 view .LVU2961 - 9099 0620 D5ED047A vldr.32 s15, [r5, #16] - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9100 .loc 1 466 61 view .LVU2962 - 9101 0624 36EE676A vsub.f32 s12, s12, s15 - 9102 0628 B7EEC66A vcvt.f64.f32 d6, s12 - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9103 .loc 1 466 87 view .LVU2963 - 9104 062c B0EE085B vmov.f64 d5, #3.0e+0 - 9105 0630 86EE057B vdiv.f64 d7, d6, d5 - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9106 .loc 1 466 100 view .LVU2964 - 9107 0634 95ED036A vldr.32 s12, [r5, #12] - 9108 0638 B7EEC66A vcvt.f64.f32 d6, s12 - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9109 .loc 1 466 94 view .LVU2965 - 9110 063c 87EE065B vdiv.f64 d5, d7, d6 - 466:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task - 9111 .loc 1 466 16 view .LVU2966 - 9112 0640 FCEEC58B vcvt.u32.f64 s17, d5 - 9113 .LVL706: - 467:Src/main.c **** - 9114 .loc 1 467 7 is_stmt 1 view .LVU2967 - 467:Src/main.c **** - 9115 .loc 1 467 87 is_stmt 0 view .LVU2968 - 9116 0644 37EE077B vadd.f64 d7, d7, d7 - 467:Src/main.c **** - 9117 .loc 1 467 94 view .LVU2969 - 9118 0648 87EE065B vdiv.f64 d5, d7, d6 - 467:Src/main.c **** - 9119 .loc 1 467 16 view .LVU2970 - ARM GAS /tmp/ccfIOqv2.s page 545 + 9040 .loc 1 453 12 is_stmt 0 view .LVU2934 + 9041 05dc 614E ldr r6, .L440+32 + 9042 05de 3368 ldr r3, [r6] + 453:Src/main.c **** + 9043 .loc 1 453 19 view .LVU2935 + 9044 05e0 23F00803 bic r3, r3, #8 + 9045 05e4 3360 str r3, [r6] + 457:Src/main.c **** TIM4 -> CNT = 0; + 9046 .loc 1 457 7 is_stmt 1 view .LVU2936 + 457:Src/main.c **** TIM4 -> CNT = 0; + 9047 .loc 1 457 20 is_stmt 0 view .LVU2937 + 9048 05e6 0024 movs r4, #0 + 9049 05e8 C8F82440 str r4, [r8, #36] + 458:Src/main.c **** + 9050 .loc 1 458 7 is_stmt 1 view .LVU2938 + 458:Src/main.c **** + 9051 .loc 1 458 19 is_stmt 0 view .LVU2939 + 9052 05ec 7462 str r4, [r6, #36] + 460:Src/main.c **** HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3); //start ADC clock + 9053 .loc 1 460 7 is_stmt 1 view .LVU2940 + 9054 05ee 2146 mov r1, r4 + 9055 05f0 5046 mov r0, r10 + 9056 05f2 FFF7FEFF bl HAL_TIM_PWM_Start + 9057 .LVL703: + 461:Src/main.c **** //TIM4 -> CNT = 0; + 9058 .loc 1 461 7 view .LVU2941 + 9059 05f6 0821 movs r1, #8 + 9060 05f8 4846 mov r0, r9 + 9061 05fa FFF7FEFF bl HAL_TIM_PWM_Start + 9062 .LVL704: + 464:Src/main.c **** TIM11 -> CNT = 0; + 9063 .loc 1 464 7 view .LVU2942 + 464:Src/main.c **** TIM11 -> CNT = 0; + 9064 .loc 1 464 26 is_stmt 0 view .LVU2943 + 9065 05fe F36A ldr r3, [r6, #44] + 464:Src/main.c **** TIM11 -> CNT = 0; + 9066 .loc 1 464 33 view .LVU2944 + 9067 0600 143B subs r3, r3, #20 + 464:Src/main.c **** TIM11 -> CNT = 0; + 9068 .loc 1 464 19 view .LVU2945 + 9069 0602 7362 str r3, [r6, #36] + 465:Src/main.c **** + 9070 .loc 1 465 7 is_stmt 1 view .LVU2946 + 465:Src/main.c **** + 9071 .loc 1 465 20 is_stmt 0 view .LVU2947 + 9072 0604 C8F82440 str r4, [r8, #36] + 467:Src/main.c **** uint32_t postAmpl_1_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 1.0) / task + 9073 .loc 1 467 7 is_stmt 1 view .LVU2948 + 9074 .LVL705: + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9075 .loc 1 468 7 view .LVU2949 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9076 .loc 1 468 50 is_stmt 0 view .LVU2950 + 9077 0608 95ED026A vldr.32 s12, [r5, #8] + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9078 .loc 1 468 67 view .LVU2951 + 9079 060c D5ED047A vldr.32 s15, [r5, #16] + ARM GAS /tmp/ccyYWdjY.s page 544 - 9120 064c BCEEC58B vcvt.u32.f64 s16, d5 - 9121 .LVL707: - 470:Src/main.c **** { - 9122 .loc 1 470 7 is_stmt 1 view .LVU2971 - 442:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 - 9123 .loc 1 442 16 is_stmt 0 view .LVU2972 - 9124 0650 2546 mov r5, r4 - 9125 .LVL708: - 9126 .L398: - 470:Src/main.c **** { - 9127 .loc 1 470 33 is_stmt 1 view .LVU2973 - 470:Src/main.c **** { - 9128 .loc 1 470 18 is_stmt 0 view .LVU2974 - 9129 0652 414B ldr r3, .L440 - 9130 0654 D3ED047A vldr.32 s15, [r3, #16] - 470:Src/main.c **** { - 9131 .loc 1 470 39 view .LVU2975 - 9132 0658 93ED027A vldr.32 s14, [r3, #8] - 470:Src/main.c **** { - 9133 .loc 1 470 33 view .LVU2976 - 9134 065c F4EEC77A vcmpe.f32 s15, s14 - 9135 0660 F1EE10FA vmrs APSR_nzcv, FPSCR - 9136 0664 45D5 bpl .L431 - 472:Src/main.c **** { - 9137 .loc 1 472 8 is_stmt 1 view .LVU2977 - 472:Src/main.c **** { - 9138 .loc 1 472 12 is_stmt 0 view .LVU2978 - 9139 0666 454B ldr r3, .L440+36 - 9140 0668 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 472:Src/main.c **** { - 9141 .loc 1 472 11 view .LVU2979 - 9142 066a 002B cmp r3, #0 - 9143 066c F1D0 beq .L398 - 474:Src/main.c **** HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_9); //toggle PG9. Change indicates that current step sta - 9144 .loc 1 474 9 is_stmt 1 view .LVU2980 - 9145 066e FCEEE77A vcvt.u32.f32 s15, s15 - 9146 0672 17EE903A vmov r3, s15 @ int - 9147 0676 99B2 uxth r1, r3 - 9148 0678 0120 movs r0, #1 - 9149 067a FFF7FEFF bl Set_LTEC - 9150 .LVL709: - 475:Src/main.c **** - 9151 .loc 1 475 9 view .LVU2981 - 9152 067e 4FF40071 mov r1, #512 - 9153 0682 3F48 ldr r0, .L440+40 - 9154 0684 FFF7FEFF bl HAL_GPIO_TogglePin - 9155 .LVL710: - 479:Src/main.c **** TO10 = 0; - 9156 .loc 1 479 9 view .LVU2982 - 479:Src/main.c **** TO10 = 0; - 9157 .loc 1 479 13 is_stmt 0 view .LVU2983 - 9158 0688 334B ldr r3, .L440 - 9159 068a D3ED047A vldr.32 s15, [r3, #16] - 479:Src/main.c **** TO10 = 0; - 9160 .loc 1 479 35 view .LVU2984 - 9161 068e 93ED037A vldr.32 s14, [r3, #12] - 479:Src/main.c **** TO10 = 0; - ARM GAS /tmp/ccfIOqv2.s page 546 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9080 .loc 1 468 61 view .LVU2952 + 9081 0610 36EE676A vsub.f32 s12, s12, s15 + 9082 0614 B7EEC66A vcvt.f64.f32 d6, s12 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9083 .loc 1 468 87 view .LVU2953 + 9084 0618 B0EE085B vmov.f64 d5, #3.0e+0 + 9085 061c 86EE057B vdiv.f64 d7, d6, d5 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9086 .loc 1 468 100 view .LVU2954 + 9087 0620 95ED036A vldr.32 s12, [r5, #12] + 9088 0624 B7EEC66A vcvt.f64.f32 d6, s12 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9089 .loc 1 468 94 view .LVU2955 + 9090 0628 87EE065B vdiv.f64 d5, d7, d6 + 468:Src/main.c **** uint32_t postAmpl_2_en_curr_step_N = ((task.max_param - task.current_param)/3.0 * 2.0) / task + 9091 .loc 1 468 16 view .LVU2956 + 9092 062c FCEEC58B vcvt.u32.f64 s17, d5 + 9093 .LVL706: + 469:Src/main.c **** + 9094 .loc 1 469 7 is_stmt 1 view .LVU2957 + 469:Src/main.c **** + 9095 .loc 1 469 87 is_stmt 0 view .LVU2958 + 9096 0630 37EE077B vadd.f64 d7, d7, d7 + 469:Src/main.c **** + 9097 .loc 1 469 94 view .LVU2959 + 9098 0634 87EE065B vdiv.f64 d5, d7, d6 + 469:Src/main.c **** + 9099 .loc 1 469 16 view .LVU2960 + 9100 0638 BCEEC58B vcvt.u32.f64 s16, d5 + 9101 .LVL707: + 472:Src/main.c **** { + 9102 .loc 1 472 7 is_stmt 1 view .LVU2961 + 444:Src/main.c **** uint16_t trigger_step = (uint8_t )((task.max_param - task.current_param)/task.delta_param * 1 + 9103 .loc 1 444 16 is_stmt 0 view .LVU2962 + 9104 063c 2546 mov r5, r4 + 9105 .LVL708: + 9106 .L398: + 472:Src/main.c **** { + 9107 .loc 1 472 33 is_stmt 1 view .LVU2963 + 472:Src/main.c **** { + 9108 .loc 1 472 18 is_stmt 0 view .LVU2964 + 9109 063e 414B ldr r3, .L440 + 9110 0640 D3ED047A vldr.32 s15, [r3, #16] + 472:Src/main.c **** { + 9111 .loc 1 472 39 view .LVU2965 + 9112 0644 93ED027A vldr.32 s14, [r3, #8] + 472:Src/main.c **** { + 9113 .loc 1 472 33 view .LVU2966 + 9114 0648 F4EEC77A vcmpe.f32 s15, s14 + 9115 064c F1EE10FA vmrs APSR_nzcv, FPSCR + 9116 0650 45D5 bpl .L431 + 474:Src/main.c **** { + 9117 .loc 1 474 8 is_stmt 1 view .LVU2967 + 474:Src/main.c **** { + 9118 .loc 1 474 12 is_stmt 0 view .LVU2968 + 9119 0652 454B ldr r3, .L440+36 + ARM GAS /tmp/ccyYWdjY.s page 545 - 9162 .loc 1 479 28 view .LVU2985 - 9163 0692 77EE877A vadd.f32 s15, s15, s14 - 9164 0696 C3ED047A vstr.32 s15, [r3, #16] - 480:Src/main.c **** TIM10_coflag = 0; - 9165 .loc 1 480 9 is_stmt 1 view .LVU2986 - 480:Src/main.c **** TIM10_coflag = 0; - 9166 .loc 1 480 14 is_stmt 0 view .LVU2987 - 9167 069a 0023 movs r3, #0 - 9168 069c 394A ldr r2, .L440+44 - 9169 069e 1360 str r3, [r2] - 481:Src/main.c **** - 9170 .loc 1 481 9 is_stmt 1 view .LVU2988 - 481:Src/main.c **** - 9171 .loc 1 481 22 is_stmt 0 view .LVU2989 - 9172 06a0 364A ldr r2, .L440+36 - 9173 06a2 1370 strb r3, [r2] - 483:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); - 9174 .loc 1 483 9 is_stmt 1 view .LVU2990 - 483:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); - 9175 .loc 1 483 12 is_stmt 0 view .LVU2991 - 9176 06a4 18EE903A vmov r3, s17 @ int - 9177 06a8 8BB1 cbz r3, .L432 - 9178 .L399: - 486:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; - 9179 .loc 1 486 9 is_stmt 1 view .LVU2992 - 486:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; - 9180 .loc 1 486 12 is_stmt 0 view .LVU2993 - 9181 06aa 18EE103A vmov r3, s16 @ int - 9182 06ae A3B1 cbz r3, .L433 - 9183 .L400: - 487:Src/main.c **** } - 9184 .loc 1 487 70 is_stmt 1 discriminator 1 view .LVU2994 - 495:Src/main.c **** OUT_trigger(trigger_counter); - 9185 .loc 1 495 9 view .LVU2995 - 495:Src/main.c **** OUT_trigger(trigger_counter); - 9186 .loc 1 495 41 is_stmt 0 view .LVU2996 - 9187 06b0 B4FBF7F3 udiv r3, r4, r7 - 9188 06b4 07FB1343 mls r3, r7, r3, r4 - 9189 06b8 9BB2 uxth r3, r3 - 495:Src/main.c **** OUT_trigger(trigger_counter); - 9190 .loc 1 495 12 view .LVU2997 - 9191 06ba A3B1 cbz r3, .L434 - 9192 .L401: - 499:Src/main.c **** - 9193 .loc 1 499 9 is_stmt 1 view .LVU2998 - 9194 06bc 0134 adds r4, r4, #1 - 9195 .LVL711: - 499:Src/main.c **** - 9196 .loc 1 499 9 is_stmt 0 view .LVU2999 - 9197 06be A4B2 uxth r4, r4 - 9198 .LVL712: - 501:Src/main.c **** //*/ - 9199 .loc 1 501 9 is_stmt 1 view .LVU3000 - 9200 06c0 0022 movs r2, #0 - 9201 06c2 8021 movs r1, #128 - 9202 06c4 2A48 ldr r0, .L440+24 - 9203 06c6 FFF7FEFF bl HAL_GPIO_WritePin - ARM GAS /tmp/ccfIOqv2.s page 547 + 9120 0654 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 474:Src/main.c **** { + 9121 .loc 1 474 11 view .LVU2969 + 9122 0656 002B cmp r3, #0 + 9123 0658 F1D0 beq .L398 + 476:Src/main.c **** HAL_GPIO_TogglePin(GPIOG, GPIO_PIN_9); //toggle PG9. Change indicates that current step sta + 9124 .loc 1 476 9 is_stmt 1 view .LVU2970 + 9125 065a FCEEE77A vcvt.u32.f32 s15, s15 + 9126 065e 17EE903A vmov r3, s15 @ int + 9127 0662 99B2 uxth r1, r3 + 9128 0664 0120 movs r0, #1 + 9129 0666 FFF7FEFF bl Set_LTEC + 9130 .LVL709: + 477:Src/main.c **** + 9131 .loc 1 477 9 view .LVU2971 + 9132 066a 4FF40071 mov r1, #512 + 9133 066e 3F48 ldr r0, .L440+40 + 9134 0670 FFF7FEFF bl HAL_GPIO_TogglePin + 9135 .LVL710: + 481:Src/main.c **** TO10 = 0; + 9136 .loc 1 481 9 view .LVU2972 + 481:Src/main.c **** TO10 = 0; + 9137 .loc 1 481 13 is_stmt 0 view .LVU2973 + 9138 0674 334B ldr r3, .L440 + 9139 0676 D3ED047A vldr.32 s15, [r3, #16] + 481:Src/main.c **** TO10 = 0; + 9140 .loc 1 481 35 view .LVU2974 + 9141 067a 93ED037A vldr.32 s14, [r3, #12] + 481:Src/main.c **** TO10 = 0; + 9142 .loc 1 481 28 view .LVU2975 + 9143 067e 77EE877A vadd.f32 s15, s15, s14 + 9144 0682 C3ED047A vstr.32 s15, [r3, #16] + 482:Src/main.c **** TIM10_coflag = 0; + 9145 .loc 1 482 9 is_stmt 1 view .LVU2976 + 482:Src/main.c **** TIM10_coflag = 0; + 9146 .loc 1 482 14 is_stmt 0 view .LVU2977 + 9147 0686 0023 movs r3, #0 + 9148 0688 394A ldr r2, .L440+44 + 9149 068a 1360 str r3, [r2] + 483:Src/main.c **** + 9150 .loc 1 483 9 is_stmt 1 view .LVU2978 + 483:Src/main.c **** + 9151 .loc 1 483 22 is_stmt 0 view .LVU2979 + 9152 068c 364A ldr r2, .L440+36 + 9153 068e 1370 strb r3, [r2] + 485:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); + 9154 .loc 1 485 9 is_stmt 1 view .LVU2980 + 485:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_SET); + 9155 .loc 1 485 12 is_stmt 0 view .LVU2981 + 9156 0690 18EE903A vmov r3, s17 @ int + 9157 0694 8BB1 cbz r3, .L432 + 9158 .L399: + 488:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; + 9159 .loc 1 488 9 is_stmt 1 view .LVU2982 + 488:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_SET);; + 9160 .loc 1 488 12 is_stmt 0 view .LVU2983 + 9161 0696 18EE103A vmov r3, s16 @ int + ARM GAS /tmp/ccyYWdjY.s page 546 - 9204 .LVL713: - 9205 06ca C2E7 b .L398 - 9206 .LVL714: - 9207 .L396: - 439:Src/main.c **** - 9208 .loc 1 439 8 view .LVU3001 - 439:Src/main.c **** - 9209 .loc 1 439 13 view .LVU3002 - 9210 06cc FEE7 b .L396 - 9211 .LVL715: - 9212 .L432: - 484:Src/main.c **** } - 9213 .loc 1 484 10 view .LVU3003 - 9214 06ce 0122 movs r2, #1 - 9215 06d0 1021 movs r1, #16 - 9216 06d2 2D48 ldr r0, .L440+48 - 9217 06d4 FFF7FEFF bl HAL_GPIO_WritePin - 9218 .LVL716: - 484:Src/main.c **** } - 9219 .loc 1 484 10 is_stmt 0 view .LVU3004 - 9220 06d8 E7E7 b .L399 - 9221 .LVL717: - 9222 .L433: - 487:Src/main.c **** } - 9223 .loc 1 487 10 is_stmt 1 view .LVU3005 - 9224 06da 0122 movs r2, #1 - 9225 06dc 2021 movs r1, #32 - 9226 06de 2A48 ldr r0, .L440+48 - 9227 06e0 FFF7FEFF bl HAL_GPIO_WritePin - 9228 .LVL718: - 487:Src/main.c **** } - 9229 .loc 1 487 10 is_stmt 0 view .LVU3006 - 9230 06e4 E4E7 b .L400 - 9231 .L434: - 496:Src/main.c **** ++trigger_counter; - 9232 .loc 1 496 10 is_stmt 1 view .LVU3007 - 9233 06e6 E8B2 uxtb r0, r5 - 9234 06e8 FFF7FEFF bl OUT_trigger - 9235 .LVL719: - 497:Src/main.c **** } - 9236 .loc 1 497 10 view .LVU3008 - 9237 06ec 0135 adds r5, r5, #1 - 9238 .LVL720: - 497:Src/main.c **** } - 9239 .loc 1 497 10 is_stmt 0 view .LVU3009 - 9240 06ee ADB2 uxth r5, r5 - 9241 .LVL721: - 497:Src/main.c **** } - 9242 .loc 1 497 10 view .LVU3010 - 9243 06f0 E4E7 b .L401 - 9244 .L431: - 526:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9245 .loc 1 526 7 is_stmt 1 view .LVU3011 - 526:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9246 .loc 1 526 13 is_stmt 0 view .LVU3012 - 9247 06f2 264A ldr r2, .L440+52 - 9248 06f4 D368 ldr r3, [r2, #12] - ARM GAS /tmp/ccfIOqv2.s page 548 + 9162 069a A3B1 cbz r3, .L433 + 9163 .L400: + 489:Src/main.c **** } + 9164 .loc 1 489 70 is_stmt 1 discriminator 1 view .LVU2984 + 497:Src/main.c **** OUT_trigger(trigger_counter); + 9165 .loc 1 497 9 view .LVU2985 + 497:Src/main.c **** OUT_trigger(trigger_counter); + 9166 .loc 1 497 41 is_stmt 0 view .LVU2986 + 9167 069c B4FBF7F3 udiv r3, r4, r7 + 9168 06a0 07FB1343 mls r3, r7, r3, r4 + 9169 06a4 9BB2 uxth r3, r3 + 497:Src/main.c **** OUT_trigger(trigger_counter); + 9170 .loc 1 497 12 view .LVU2987 + 9171 06a6 A3B1 cbz r3, .L434 + 9172 .L401: + 501:Src/main.c **** + 9173 .loc 1 501 9 is_stmt 1 view .LVU2988 + 9174 06a8 0134 adds r4, r4, #1 + 9175 .LVL711: + 501:Src/main.c **** + 9176 .loc 1 501 9 is_stmt 0 view .LVU2989 + 9177 06aa A4B2 uxth r4, r4 + 9178 .LVL712: + 503:Src/main.c **** //*/ + 9179 .loc 1 503 9 is_stmt 1 view .LVU2990 + 9180 06ac 0022 movs r2, #0 + 9181 06ae 8021 movs r1, #128 + 9182 06b0 2A48 ldr r0, .L440+24 + 9183 06b2 FFF7FEFF bl HAL_GPIO_WritePin + 9184 .LVL713: + 9185 06b6 C2E7 b .L398 + 9186 .LVL714: + 9187 .L396: + 441:Src/main.c **** + 9188 .loc 1 441 8 view .LVU2991 + 441:Src/main.c **** + 9189 .loc 1 441 13 view .LVU2992 + 9190 06b8 FEE7 b .L396 + 9191 .LVL715: + 9192 .L432: + 486:Src/main.c **** } + 9193 .loc 1 486 10 view .LVU2993 + 9194 06ba 0122 movs r2, #1 + 9195 06bc 1021 movs r1, #16 + 9196 06be 2D48 ldr r0, .L440+48 + 9197 06c0 FFF7FEFF bl HAL_GPIO_WritePin + 9198 .LVL716: + 486:Src/main.c **** } + 9199 .loc 1 486 10 is_stmt 0 view .LVU2994 + 9200 06c4 E7E7 b .L399 + 9201 .LVL717: + 9202 .L433: + 489:Src/main.c **** } + 9203 .loc 1 489 10 is_stmt 1 view .LVU2995 + 9204 06c6 0122 movs r2, #1 + 9205 06c8 2021 movs r1, #32 + 9206 06ca 2A48 ldr r0, .L440+48 + ARM GAS /tmp/ccyYWdjY.s page 547 - 526:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd - 9249 .loc 1 526 21 view .LVU3013 - 9250 06f6 43F00103 orr r3, r3, #1 - 9251 06fa D360 str r3, [r2, #12] - 536:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); - 9252 .loc 1 536 7 is_stmt 1 view .LVU3014 - 9253 06fc FFF7FEFF bl Stop_TIM10 - 9254 .LVL722: - 537:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 9255 .loc 1 537 7 view .LVU3015 - 9256 0700 214C ldr r4, .L440+48 - 9257 .LVL723: - 537:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); - 9258 .loc 1 537 7 is_stmt 0 view .LVU3016 - 9259 0702 0022 movs r2, #0 - 9260 0704 1021 movs r1, #16 - 9261 0706 2046 mov r0, r4 - 9262 0708 FFF7FEFF bl HAL_GPIO_WritePin - 9263 .LVL724: - 538:Src/main.c **** - 9264 .loc 1 538 7 is_stmt 1 view .LVU3017 - 9265 070c 0022 movs r2, #0 - 9266 070e 2021 movs r1, #32 - 9267 0710 2046 mov r0, r4 - 9268 0712 FFF7FEFF bl HAL_GPIO_WritePin - 9269 .LVL725: - 540:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9270 .loc 1 540 7 view .LVU3018 - 540:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9271 .loc 1 540 32 is_stmt 0 view .LVU3019 - 9272 0716 104C ldr r4, .L440 - 9273 0718 D4ED017A vldr.32 s15, [r4, #4] - 540:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); - 9274 .loc 1 540 26 view .LVU3020 - 9275 071c C4ED047A vstr.32 s15, [r4, #16] - 541:Src/main.c **** if (task.tau > 3) - 9276 .loc 1 541 7 is_stmt 1 view .LVU3021 - 9277 0720 FCEEE77A vcvt.u32.f32 s15, s15 - 9278 0724 17EE903A vmov r3, s15 @ int - 9279 0728 99B2 uxth r1, r3 - 9280 072a 0120 movs r0, #1 - 9281 072c FFF7FEFF bl Set_LTEC - 9282 .LVL726: - 542:Src/main.c **** { - 9283 .loc 1 542 7 view .LVU3022 - 542:Src/main.c **** { - 9284 .loc 1 542 15 is_stmt 0 view .LVU3023 - 9285 0730 E38A ldrh r3, [r4, #22] - 542:Src/main.c **** { - 9286 .loc 1 542 10 view .LVU3024 - 9287 0732 032B cmp r3, #3 - 9288 0734 0CD9 bls .L403 - 544:Src/main.c **** htim10.Init.Period = 9999; - 9289 .loc 1 544 8 is_stmt 1 view .LVU3025 - 544:Src/main.c **** htim10.Init.Period = 9999; - 9290 .loc 1 544 34 is_stmt 0 view .LVU3026 - 9291 0736 0F4A ldr r2, .L440+28 - ARM GAS /tmp/ccfIOqv2.s page 549 + 9207 06cc FFF7FEFF bl HAL_GPIO_WritePin + 9208 .LVL718: + 489:Src/main.c **** } + 9209 .loc 1 489 10 is_stmt 0 view .LVU2996 + 9210 06d0 E4E7 b .L400 + 9211 .L434: + 498:Src/main.c **** ++trigger_counter; + 9212 .loc 1 498 10 is_stmt 1 view .LVU2997 + 9213 06d2 E8B2 uxtb r0, r5 + 9214 06d4 FFF7FEFF bl OUT_trigger + 9215 .LVL719: + 499:Src/main.c **** } + 9216 .loc 1 499 10 view .LVU2998 + 9217 06d8 0135 adds r5, r5, #1 + 9218 .LVL720: + 499:Src/main.c **** } + 9219 .loc 1 499 10 is_stmt 0 view .LVU2999 + 9220 06da ADB2 uxth r5, r5 + 9221 .LVL721: + 499:Src/main.c **** } + 9222 .loc 1 499 10 view .LVU3000 + 9223 06dc E4E7 b .L401 + 9224 .L431: + 528:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9225 .loc 1 528 7 is_stmt 1 view .LVU3001 + 528:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9226 .loc 1 528 13 is_stmt 0 view .LVU3002 + 9227 06de 264A ldr r2, .L440+52 + 9228 06e0 D368 ldr r3, [r2, #12] + 528:Src/main.c **** //TIM11 -> CR1 |= 1 << 3; //sets timer to one-pulse mode. So it will turn off at the next Upd + 9229 .loc 1 528 21 view .LVU3003 + 9230 06e2 43F00103 orr r3, r3, #1 + 9231 06e6 D360 str r3, [r2, #12] + 538:Src/main.c **** HAL_GPIO_WritePin(OUT_6_GPIO_Port, OUT_6_Pin, GPIO_PIN_RESET); + 9232 .loc 1 538 7 is_stmt 1 view .LVU3004 + 9233 06e8 FFF7FEFF bl Stop_TIM10 + 9234 .LVL722: + 539:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 9235 .loc 1 539 7 view .LVU3005 + 9236 06ec 214C ldr r4, .L440+48 + 9237 .LVL723: + 539:Src/main.c **** HAL_GPIO_WritePin(OUT_7_GPIO_Port, OUT_7_Pin, GPIO_PIN_RESET); + 9238 .loc 1 539 7 is_stmt 0 view .LVU3006 + 9239 06ee 0022 movs r2, #0 + 9240 06f0 1021 movs r1, #16 + 9241 06f2 2046 mov r0, r4 + 9242 06f4 FFF7FEFF bl HAL_GPIO_WritePin + 9243 .LVL724: + 540:Src/main.c **** + 9244 .loc 1 540 7 is_stmt 1 view .LVU3007 + 9245 06f8 0022 movs r2, #0 + 9246 06fa 2021 movs r1, #32 + 9247 06fc 2046 mov r0, r4 + 9248 06fe FFF7FEFF bl HAL_GPIO_WritePin + 9249 .LVL725: + 542:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9250 .loc 1 542 7 view .LVU3008 + ARM GAS /tmp/ccyYWdjY.s page 548 - 9292 0738 D068 ldr r0, [r2, #12] - 544:Src/main.c **** htim10.Init.Period = 9999; - 9293 .loc 1 544 21 view .LVU3027 - 9294 073a 1549 ldr r1, .L440+56 - 9295 073c 0860 str r0, [r1] - 545:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9296 .loc 1 545 8 is_stmt 1 view .LVU3028 - 545:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9297 .loc 1 545 27 is_stmt 0 view .LVU3029 - 9298 073e 42F20F71 movw r1, #9999 - 9299 0742 D160 str r1, [r2, #12] - 546:Src/main.c **** } - 9300 .loc 1 546 8 is_stmt 1 view .LVU3030 - 546:Src/main.c **** } - 9301 .loc 1 546 33 is_stmt 0 view .LVU3031 - 9302 0744 013B subs r3, r3, #1 - 546:Src/main.c **** } - 9303 .loc 1 546 38 view .LVU3032 - 9304 0746 6422 movs r2, #100 - 9305 0748 02FB03F3 mul r3, r2, r3 - 546:Src/main.c **** } - 9306 .loc 1 546 21 view .LVU3033 - 9307 074c 114A ldr r2, .L440+60 - 9308 074e 1360 str r3, [r2] - 9309 .L403: - 548:Src/main.c **** break; - 9310 .loc 1 548 7 is_stmt 1 view .LVU3034 - 9311 0750 0848 ldr r0, .L440+28 - 9312 0752 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9313 .LVL727: - 549:Src/main.c **** case TT_CHANGE_CURR_2: - 9314 .loc 1 549 6 view .LVU3035 - 9315 0756 95E6 b .L394 - 9316 .L441: - 9317 .align 2 - 9318 .L440: - 9319 0758 00000000 .word task - 9320 075c 00000000 .word LD1_param - 9321 0760 00000000 .word LD2_param - 9322 0764 00000000 .word LD1_curr_setup - 9323 0768 00000000 .word temp16 - 9324 076c 00000000 .word LD2_curr_setup - 9325 0770 000C0240 .word 1073875968 - 9326 0774 00000000 .word htim10 - 9327 0778 00080040 .word 1073743872 - 9328 077c 00000000 .word TIM10_coflag - 9329 0780 00180240 .word 1073879040 - 9330 0784 00000000 .word TO10 - 9331 0788 00040240 .word 1073873920 - 9332 078c 00480140 .word 1073825792 - 9333 0790 00000000 .word TIM10_period - 9334 0794 00000000 .word TO10_counter - 9335 0798 00000000 .word htim11 - 9336 079c 00000000 .word htim4 - 9337 .LVL728: - 9338 .L393: - 553:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - ARM GAS /tmp/ccfIOqv2.s page 550 + 542:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9251 .loc 1 542 32 is_stmt 0 view .LVU3009 + 9252 0702 104C ldr r4, .L440 + 9253 0704 D4ED017A vldr.32 s15, [r4, #4] + 542:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_1, task.current_param); + 9254 .loc 1 542 26 view .LVU3010 + 9255 0708 C4ED047A vstr.32 s15, [r4, #16] + 543:Src/main.c **** if (task.tau > 3) + 9256 .loc 1 543 7 is_stmt 1 view .LVU3011 + 9257 070c FCEEE77A vcvt.u32.f32 s15, s15 + 9258 0710 17EE903A vmov r3, s15 @ int + 9259 0714 99B2 uxth r1, r3 + 9260 0716 0120 movs r0, #1 + 9261 0718 FFF7FEFF bl Set_LTEC + 9262 .LVL726: + 544:Src/main.c **** { + 9263 .loc 1 544 7 view .LVU3012 + 544:Src/main.c **** { + 9264 .loc 1 544 15 is_stmt 0 view .LVU3013 + 9265 071c E38A ldrh r3, [r4, #22] + 544:Src/main.c **** { + 9266 .loc 1 544 10 view .LVU3014 + 9267 071e 032B cmp r3, #3 + 9268 0720 0CD9 bls .L403 + 546:Src/main.c **** htim10.Init.Period = 9999; + 9269 .loc 1 546 8 is_stmt 1 view .LVU3015 + 546:Src/main.c **** htim10.Init.Period = 9999; + 9270 .loc 1 546 34 is_stmt 0 view .LVU3016 + 9271 0722 0F4A ldr r2, .L440+28 + 9272 0724 D068 ldr r0, [r2, #12] + 546:Src/main.c **** htim10.Init.Period = 9999; + 9273 .loc 1 546 21 view .LVU3017 + 9274 0726 1549 ldr r1, .L440+56 + 9275 0728 0860 str r0, [r1] + 547:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9276 .loc 1 547 8 is_stmt 1 view .LVU3018 + 547:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9277 .loc 1 547 27 is_stmt 0 view .LVU3019 + 9278 072a 42F20F71 movw r1, #9999 + 9279 072e D160 str r1, [r2, #12] + 548:Src/main.c **** } + 9280 .loc 1 548 8 is_stmt 1 view .LVU3020 + 548:Src/main.c **** } + 9281 .loc 1 548 33 is_stmt 0 view .LVU3021 + 9282 0730 013B subs r3, r3, #1 + 548:Src/main.c **** } + 9283 .loc 1 548 38 view .LVU3022 + 9284 0732 6422 movs r2, #100 + 9285 0734 02FB03F3 mul r3, r2, r3 + 548:Src/main.c **** } + 9286 .loc 1 548 21 view .LVU3023 + 9287 0738 114A ldr r2, .L440+60 + 9288 073a 1360 str r3, [r2] + 9289 .L403: + 550:Src/main.c **** break; + 9290 .loc 1 550 7 is_stmt 1 view .LVU3024 + 9291 073c 0848 ldr r0, .L440+28 + ARM GAS /tmp/ccyYWdjY.s page 549 - 9339 .loc 1 553 7 view .LVU3036 - 553:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9340 .loc 1 553 38 is_stmt 0 view .LVU3037 - 9341 07a0 A74B ldr r3, .L442 - 9342 07a2 D3ED077A vldr.32 s15, [r3, #28] - 553:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); - 9343 .loc 1 553 7 view .LVU3038 - 9344 07a6 FCEEE77A vcvt.u32.f32 s15, s15 - 9345 07aa 17EE903A vmov r3, s15 @ int - 9346 07ae 99B2 uxth r1, r3 - 9347 07b0 0120 movs r0, #1 - 9348 07b2 FFF7FEFF bl Set_LTEC - 9349 .LVL729: - 554:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9350 .loc 1 554 7 is_stmt 1 view .LVU3039 - 554:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); - 9351 .loc 1 554 14 is_stmt 0 view .LVU3040 - 9352 07b6 0320 movs r0, #3 - 9353 07b8 FFF7FEFF bl MPhD_T - 9354 .LVL730: - 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9355 .loc 1 555 7 is_stmt 1 view .LVU3041 - 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9356 .loc 1 555 32 is_stmt 0 view .LVU3042 - 9357 07bc 0320 movs r0, #3 - 9358 07be FFF7FEFF bl MPhD_T - 9359 .LVL731: - 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); - 9360 .loc 1 555 30 discriminator 1 view .LVU3043 - 9361 07c2 A04C ldr r4, .L442+4 - 9362 07c4 2080 strh r0, [r4] @ movhi - 556:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9363 .loc 1 556 7 is_stmt 1 view .LVU3044 - 556:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); - 9364 .loc 1 556 14 is_stmt 0 view .LVU3045 - 9365 07c6 0420 movs r0, #4 - 9366 07c8 FFF7FEFF bl MPhD_T - 9367 .LVL732: - 557:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9368 .loc 1 557 7 is_stmt 1 view .LVU3046 - 557:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9369 .loc 1 557 32 is_stmt 0 view .LVU3047 - 9370 07cc 0420 movs r0, #4 - 9371 07ce FFF7FEFF bl MPhD_T - 9372 .LVL733: - 557:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); - 9373 .loc 1 557 30 discriminator 1 view .LVU3048 - 9374 07d2 9D4D ldr r5, .L442+8 - 9375 07d4 2880 strh r0, [r5] @ movhi - 558:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9376 .loc 1 558 7 is_stmt 1 view .LVU3049 - 558:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9377 .loc 1 558 14 is_stmt 0 view .LVU3050 - 9378 07d6 0122 movs r2, #1 - 9379 07d8 2146 mov r1, r4 - 9380 07da 9C48 ldr r0, .L442+12 - 9381 07dc FFF7FEFF bl PID_Controller_Temp - ARM GAS /tmp/ccfIOqv2.s page 551 + 9292 073e FFF7FEFF bl HAL_TIM_Base_Start_IT + 9293 .LVL727: + 551:Src/main.c **** case TT_CHANGE_CURR_2: + 9294 .loc 1 551 6 view .LVU3025 + 9295 0742 95E6 b .L394 + 9296 .L441: + 9297 .align 2 + 9298 .L440: + 9299 0744 00000000 .word task + 9300 0748 00000000 .word LD1_param + 9301 074c 00000000 .word LD2_param + 9302 0750 00000000 .word LD1_curr_setup + 9303 0754 00000000 .word temp16 + 9304 0758 00000000 .word LD2_curr_setup + 9305 075c 000C0240 .word 1073875968 + 9306 0760 00000000 .word htim10 + 9307 0764 00080040 .word 1073743872 + 9308 0768 00000000 .word TIM10_coflag + 9309 076c 00180240 .word 1073879040 + 9310 0770 00000000 .word TO10 + 9311 0774 00040240 .word 1073873920 + 9312 0778 00480140 .word 1073825792 + 9313 077c 00000000 .word TIM10_period + 9314 0780 00000000 .word TO10_counter + 9315 0784 00000000 .word htim11 + 9316 0788 00000000 .word htim4 + 9317 .LVL728: + 9318 .L393: + 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9319 .loc 1 555 7 view .LVU3026 + 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9320 .loc 1 555 38 is_stmt 0 view .LVU3027 + 9321 078c A74B ldr r3, .L442 + 9322 078e D3ED077A vldr.32 s15, [r3, #28] + 555:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_1); + 9323 .loc 1 555 7 view .LVU3028 + 9324 0792 FCEEE77A vcvt.u32.f32 s15, s15 + 9325 0796 17EE903A vmov r3, s15 @ int + 9326 079a 99B2 uxth r1, r3 + 9327 079c 0120 movs r0, #1 + 9328 079e FFF7FEFF bl Set_LTEC + 9329 .LVL729: + 556:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 9330 .loc 1 556 7 is_stmt 1 view .LVU3029 + 556:Src/main.c **** LD1_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_1); + 9331 .loc 1 556 14 is_stmt 0 view .LVU3030 + 9332 07a2 0320 movs r0, #3 + 9333 07a4 FFF7FEFF bl MPhD_T + 9334 .LVL730: + 557:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 9335 .loc 1 557 7 is_stmt 1 view .LVU3031 + 557:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + 9336 .loc 1 557 32 is_stmt 0 view .LVU3032 + 9337 07a8 0320 movs r0, #3 + 9338 07aa FFF7FEFF bl MPhD_T + 9339 .LVL731: + 557:Src/main.c **** (void) MPhD_T(TT_CHANGE_TEMP_2); + ARM GAS /tmp/ccyYWdjY.s page 550 - 9382 .LVL734: - 9383 07e0 0146 mov r1, r0 - 558:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 - 9384 .loc 1 558 13 discriminator 1 view .LVU3051 - 9385 07e2 9B4C ldr r4, .L442+16 - 9386 07e4 2080 strh r0, [r4] @ movhi - 559:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); - 9387 .loc 1 559 7 is_stmt 1 view .LVU3052 - 9388 07e6 0320 movs r0, #3 - 9389 07e8 FFF7FEFF bl Set_LTEC - 9390 .LVL735: - 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9391 .loc 1 560 7 view .LVU3053 - 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9392 .loc 1 560 14 is_stmt 0 view .LVU3054 - 9393 07ec 0222 movs r2, #2 - 9394 07ee 2946 mov r1, r5 - 9395 07f0 9848 ldr r0, .L442+20 - 9396 07f2 FFF7FEFF bl PID_Controller_Temp - 9397 .LVL736: - 9398 07f6 0146 mov r1, r0 - 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 - 9399 .loc 1 560 13 discriminator 1 view .LVU3055 - 9400 07f8 2080 strh r0, [r4] @ movhi - 561:Src/main.c **** - 9401 .loc 1 561 7 is_stmt 1 view .LVU3056 - 9402 07fa 0420 movs r0, #4 - 9403 07fc FFF7FEFF bl Set_LTEC - 9404 .LVL737: - 563:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9405 .loc 1 563 7 view .LVU3057 - 563:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L - 9406 .loc 1 563 28 is_stmt 0 view .LVU3058 - 9407 0800 954B ldr r3, .L442+24 - 9408 0802 0222 movs r2, #2 - 9409 0804 1A70 strb r2, [r3] - 564:Src/main.c **** //LD_blinker.param = task.current_param; - 9410 .loc 1 564 7 is_stmt 1 view .LVU3059 - 564:Src/main.c **** //LD_blinker.param = task.current_param; - 9411 .loc 1 564 24 is_stmt 0 view .LVU3060 - 9412 0806 0022 movs r2, #0 - 9413 0808 9A72 strb r2, [r3, #10] - 566:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9414 .loc 1 566 7 is_stmt 1 view .LVU3061 - 566:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) - 9415 .loc 1 566 24 is_stmt 0 view .LVU3062 - 9416 080a 1A81 strh r2, [r3, #8] @ movhi - 567:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9417 .loc 1 567 7 is_stmt 1 view .LVU3063 - 567:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; - 9418 .loc 1 567 24 is_stmt 0 view .LVU3064 - 9419 080c 4FF47A72 mov r2, #1000 - 9420 0810 1A81 strh r2, [r3, #8] @ movhi - 568:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9421 .loc 1 568 7 is_stmt 1 view .LVU3065 - 568:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; - 9422 .loc 1 568 30 is_stmt 0 view .LVU3066 - ARM GAS /tmp/ccfIOqv2.s page 552 + 9340 .loc 1 557 30 discriminator 1 view .LVU3033 + 9341 07ae A04C ldr r4, .L442+4 + 9342 07b0 2080 strh r0, [r4] @ movhi + 558:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 9343 .loc 1 558 7 is_stmt 1 view .LVU3034 + 558:Src/main.c **** LD2_param.LD_CURR_TEMP = MPhD_T(TT_CHANGE_TEMP_2); + 9344 .loc 1 558 14 is_stmt 0 view .LVU3035 + 9345 07b2 0420 movs r0, #4 + 9346 07b4 FFF7FEFF bl MPhD_T + 9347 .LVL732: + 559:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9348 .loc 1 559 7 is_stmt 1 view .LVU3036 + 559:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9349 .loc 1 559 32 is_stmt 0 view .LVU3037 + 9350 07b8 0420 movs r0, #4 + 9351 07ba FFF7FEFF bl MPhD_T + 9352 .LVL733: + 559:Src/main.c **** temp16=PID_Controller_Temp(&LD1_curr_setup, &LD1_param, 1); + 9353 .loc 1 559 30 discriminator 1 view .LVU3038 + 9354 07be 9D4D ldr r5, .L442+8 + 9355 07c0 2880 strh r0, [r5] @ movhi + 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9356 .loc 1 560 7 is_stmt 1 view .LVU3039 + 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9357 .loc 1 560 14 is_stmt 0 view .LVU3040 + 9358 07c2 0122 movs r2, #1 + 9359 07c4 2146 mov r1, r4 + 9360 07c6 9C48 ldr r0, .L442+12 + 9361 07c8 FFF7FEFF bl PID_Controller_Temp + 9362 .LVL734: + 9363 07cc 0146 mov r1, r0 + 560:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_1, temp16);//Drive Laser TEC 1 + 9364 .loc 1 560 13 discriminator 1 view .LVU3041 + 9365 07ce 9B4C ldr r4, .L442+16 + 9366 07d0 2080 strh r0, [r4] @ movhi + 561:Src/main.c **** temp16=PID_Controller_Temp(&LD2_curr_setup, &LD2_param, 2); + 9367 .loc 1 561 7 is_stmt 1 view .LVU3042 + 9368 07d2 0320 movs r0, #3 + 9369 07d4 FFF7FEFF bl Set_LTEC + 9370 .LVL735: + 562:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9371 .loc 1 562 7 view .LVU3043 + 562:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9372 .loc 1 562 14 is_stmt 0 view .LVU3044 + 9373 07d8 0222 movs r2, #2 + 9374 07da 2946 mov r1, r5 + 9375 07dc 9848 ldr r0, .L442+20 + 9376 07de FFF7FEFF bl PID_Controller_Temp + 9377 .LVL736: + 9378 07e2 0146 mov r1, r0 + 562:Src/main.c **** Set_LTEC(TT_CHANGE_TEMP_2, temp16);//Drive Laser TEC 2 + 9379 .loc 1 562 13 discriminator 1 view .LVU3045 + 9380 07e4 2080 strh r0, [r4] @ movhi + 563:Src/main.c **** + 9381 .loc 1 563 7 is_stmt 1 view .LVU3046 + 9382 07e6 0420 movs r0, #4 + 9383 07e8 FFF7FEFF bl Set_LTEC + ARM GAS /tmp/ccyYWdjY.s page 551 - 9423 0812 924A ldr r2, .L442+28 - 9424 0814 5A60 str r2, [r3, #4] - 569:Src/main.c **** - 9425 .loc 1 569 7 is_stmt 1 view .LVU3067 - 569:Src/main.c **** - 9426 .loc 1 569 29 is_stmt 0 view .LVU3068 - 9427 0816 8022 movs r2, #128 - 9428 0818 5A80 strh r2, [r3, #2] @ movhi - 571:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9429 .loc 1 571 7 is_stmt 1 view .LVU3069 - 571:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU - 9430 .loc 1 571 17 is_stmt 0 view .LVU3070 - 9431 081a 914B ldr r3, .L442+32 - 9432 081c 42F21072 movw r2, #10000 - 9433 0820 DA62 str r2, [r3, #44] - 573:Src/main.c **** if (st != HAL_OK) - 9434 .loc 1 573 7 is_stmt 1 view .LVU3071 - 573:Src/main.c **** if (st != HAL_OK) - 9435 .loc 1 573 12 is_stmt 0 view .LVU3072 - 9436 0822 9048 ldr r0, .L442+36 - 9437 0824 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9438 .LVL738: - 574:Src/main.c **** while(1); - 9439 .loc 1 574 7 is_stmt 1 view .LVU3073 - 574:Src/main.c **** while(1); - 9440 .loc 1 574 10 is_stmt 0 view .LVU3074 - 9441 0828 78BB cbnz r0, .L405 - 579:Src/main.c **** uint32_t i = 10000; while (--i){} - 9442 .loc 1 579 7 is_stmt 1 view .LVU3075 - 9443 082a 0122 movs r2, #1 - 9444 082c 8021 movs r1, #128 - 9445 082e 8E48 ldr r0, .L442+40 - 9446 .LVL739: - 579:Src/main.c **** uint32_t i = 10000; while (--i){} - 9447 .loc 1 579 7 is_stmt 0 view .LVU3076 - 9448 0830 FFF7FEFF bl HAL_GPIO_WritePin - 9449 .LVL740: - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9450 .loc 1 580 7 is_stmt 1 view .LVU3077 - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9451 .loc 1 580 27 view .LVU3078 - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9452 .loc 1 580 16 is_stmt 0 view .LVU3079 - 9453 0834 42F21073 movw r3, #10000 - 9454 .LVL741: - 9455 .L406: - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9456 .loc 1 580 39 is_stmt 1 discriminator 2 view .LVU3080 - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9457 .loc 1 580 34 discriminator 2 view .LVU3081 - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9458 .loc 1 580 34 is_stmt 0 discriminator 2 view .LVU3082 - 9459 0838 013B subs r3, r3, #1 - 9460 .LVL742: - 580:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); - 9461 .loc 1 580 34 discriminator 2 view .LVU3083 - 9462 083a FDD1 bne .L406 - ARM GAS /tmp/ccfIOqv2.s page 553 + 9384 .LVL737: + 565:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 9385 .loc 1 565 7 view .LVU3047 + 565:Src/main.c **** LD_blinker.state = 0; // 0 -- disabled (do nothing); 1 -- update LD current; 2 -- blinking, L + 9386 .loc 1 565 28 is_stmt 0 view .LVU3048 + 9387 07ec 954B ldr r3, .L442+24 + 9388 07ee 0222 movs r2, #2 + 9389 07f0 1A70 strb r2, [r3] + 566:Src/main.c **** //LD_blinker.param = task.current_param; + 9390 .loc 1 566 7 is_stmt 1 view .LVU3049 + 566:Src/main.c **** //LD_blinker.param = task.current_param; + 9391 .loc 1 566 24 is_stmt 0 view .LVU3050 + 9392 07f2 0022 movs r2, #0 + 9393 07f4 9A72 strb r2, [r3, #10] + 568:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 9394 .loc 1 568 7 is_stmt 1 view .LVU3051 + 568:Src/main.c **** LD_blinker.param = 1000; // LD2 current (in unspecified units) + 9395 .loc 1 568 24 is_stmt 0 view .LVU3052 + 9396 07f6 1A81 strh r2, [r3, #8] @ movhi + 569:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 9397 .loc 1 569 7 is_stmt 1 view .LVU3053 + 569:Src/main.c **** LD_blinker.signal_port = OUT_9_GPIO_Port; + 9398 .loc 1 569 24 is_stmt 0 view .LVU3054 + 9399 07f8 4FF47A72 mov r2, #1000 + 9400 07fc 1A81 strh r2, [r3, #8] @ movhi + 570:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 9401 .loc 1 570 7 is_stmt 1 view .LVU3055 + 570:Src/main.c **** LD_blinker.signal_pin = OUT_9_Pin; + 9402 .loc 1 570 30 is_stmt 0 view .LVU3056 + 9403 07fe 924A ldr r2, .L442+28 + 9404 0800 5A60 str r2, [r3, #4] + 571:Src/main.c **** + 9405 .loc 1 571 7 is_stmt 1 view .LVU3057 + 571:Src/main.c **** + 9406 .loc 1 571 29 is_stmt 0 view .LVU3058 + 9407 0802 8022 movs r2, #128 + 9408 0804 5A80 strh r2, [r3, #2] @ movhi + 573:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 9409 .loc 1 573 7 is_stmt 1 view .LVU3059 + 573:Src/main.c **** //When it is too low -- Desktop app crashes (there is not so much compute sources on MCU + 9410 .loc 1 573 17 is_stmt 0 view .LVU3060 + 9411 0806 914B ldr r3, .L442+32 + 9412 0808 42F21072 movw r2, #10000 + 9413 080c DA62 str r2, [r3, #44] + 575:Src/main.c **** if (st != HAL_OK) + 9414 .loc 1 575 7 is_stmt 1 view .LVU3061 + 575:Src/main.c **** if (st != HAL_OK) + 9415 .loc 1 575 12 is_stmt 0 view .LVU3062 + 9416 080e 9048 ldr r0, .L442+36 + 9417 0810 FFF7FEFF bl HAL_TIM_Base_Start_IT + 9418 .LVL738: + 576:Src/main.c **** while(1); + 9419 .loc 1 576 7 is_stmt 1 view .LVU3063 + 576:Src/main.c **** while(1); + 9420 .loc 1 576 10 is_stmt 0 view .LVU3064 + 9421 0814 78BB cbnz r0, .L405 + 581:Src/main.c **** uint32_t i = 10000; while (--i){} + ARM GAS /tmp/ccyYWdjY.s page 552 - 581:Src/main.c **** LD_blinker.state = 2; - 9463 .loc 1 581 7 is_stmt 1 view .LVU3084 - 9464 083c 0022 movs r2, #0 - 9465 083e 8021 movs r1, #128 - 9466 0840 8948 ldr r0, .L442+40 - 9467 0842 FFF7FEFF bl HAL_GPIO_WritePin - 9468 .LVL743: - 582:Src/main.c **** - 9469 .loc 1 582 7 view .LVU3085 - 582:Src/main.c **** - 9470 .loc 1 582 24 is_stmt 0 view .LVU3086 - 9471 0846 844B ldr r3, .L442+24 - 9472 0848 0222 movs r2, #2 - 9473 084a 9A72 strb r2, [r3, #10] - 584:Src/main.c **** if (st != HAL_OK) - 9474 .loc 1 584 7 is_stmt 1 view .LVU3087 - 584:Src/main.c **** if (st != HAL_OK) - 9475 .loc 1 584 12 is_stmt 0 view .LVU3088 - 9476 084c 8748 ldr r0, .L442+44 - 9477 084e FFF7FEFF bl HAL_TIM_Base_Start_IT - 9478 .LVL744: - 585:Src/main.c **** while(1); - 9479 .loc 1 585 7 is_stmt 1 view .LVU3089 - 585:Src/main.c **** while(1); - 9480 .loc 1 585 10 is_stmt 0 view .LVU3090 - 9481 0852 D8B9 cbnz r0, .L408 - 9482 .L409: - 587:Src/main.c **** { - 9483 .loc 1 587 33 is_stmt 1 view .LVU3091 - 587:Src/main.c **** { - 9484 .loc 1 587 18 is_stmt 0 view .LVU3092 - 9485 0854 7A4B ldr r3, .L442 - 9486 0856 D3ED047A vldr.32 s15, [r3, #16] - 587:Src/main.c **** { - 9487 .loc 1 587 39 view .LVU3093 - 9488 085a 93ED027A vldr.32 s14, [r3, #8] - 587:Src/main.c **** { - 9489 .loc 1 587 33 view .LVU3094 - 9490 085e F4EEC77A vcmpe.f32 s15, s14 - 9491 0862 F1EE10FA vmrs APSR_nzcv, FPSCR - 9492 0866 12D5 bpl .L435 - 589:Src/main.c **** { - 9493 .loc 1 589 8 is_stmt 1 view .LVU3095 - 589:Src/main.c **** { - 9494 .loc 1 589 12 is_stmt 0 view .LVU3096 - 9495 0868 814B ldr r3, .L442+48 - 9496 086a 1B78 ldrb r3, [r3] @ zero_extendqisi2 - 589:Src/main.c **** { - 9497 .loc 1 589 11 view .LVU3097 - 9498 086c 002B cmp r3, #0 - 9499 086e F1D0 beq .L409 - 594:Src/main.c **** TO10 = 0; - 9500 .loc 1 594 9 is_stmt 1 view .LVU3098 - 594:Src/main.c **** TO10 = 0; - 9501 .loc 1 594 35 is_stmt 0 view .LVU3099 - 9502 0870 734B ldr r3, .L442 - 9503 0872 93ED037A vldr.32 s14, [r3, #12] - ARM GAS /tmp/ccfIOqv2.s page 554 + 9422 .loc 1 581 7 is_stmt 1 view .LVU3065 + 9423 0816 0122 movs r2, #1 + 9424 0818 8021 movs r1, #128 + 9425 081a 8E48 ldr r0, .L442+40 + 9426 .LVL739: + 581:Src/main.c **** uint32_t i = 10000; while (--i){} + 9427 .loc 1 581 7 is_stmt 0 view .LVU3066 + 9428 081c FFF7FEFF bl HAL_GPIO_WritePin + 9429 .LVL740: + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9430 .loc 1 582 7 is_stmt 1 view .LVU3067 + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9431 .loc 1 582 27 view .LVU3068 + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9432 .loc 1 582 16 is_stmt 0 view .LVU3069 + 9433 0820 42F21073 movw r3, #10000 + 9434 .LVL741: + 9435 .L406: + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9436 .loc 1 582 39 is_stmt 1 discriminator 2 view .LVU3070 + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9437 .loc 1 582 34 discriminator 2 view .LVU3071 + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9438 .loc 1 582 34 is_stmt 0 discriminator 2 view .LVU3072 + 9439 0824 013B subs r3, r3, #1 + 9440 .LVL742: + 582:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_RESET); + 9441 .loc 1 582 34 discriminator 2 view .LVU3073 + 9442 0826 FDD1 bne .L406 + 583:Src/main.c **** LD_blinker.state = 2; + 9443 .loc 1 583 7 is_stmt 1 view .LVU3074 + 9444 0828 0022 movs r2, #0 + 9445 082a 8021 movs r1, #128 + 9446 082c 8948 ldr r0, .L442+40 + 9447 082e FFF7FEFF bl HAL_GPIO_WritePin + 9448 .LVL743: + 584:Src/main.c **** + 9449 .loc 1 584 7 view .LVU3075 + 584:Src/main.c **** + 9450 .loc 1 584 24 is_stmt 0 view .LVU3076 + 9451 0832 844B ldr r3, .L442+24 + 9452 0834 0222 movs r2, #2 + 9453 0836 9A72 strb r2, [r3, #10] + 586:Src/main.c **** if (st != HAL_OK) + 9454 .loc 1 586 7 is_stmt 1 view .LVU3077 + 586:Src/main.c **** if (st != HAL_OK) + 9455 .loc 1 586 12 is_stmt 0 view .LVU3078 + 9456 0838 8748 ldr r0, .L442+44 + 9457 083a FFF7FEFF bl HAL_TIM_Base_Start_IT + 9458 .LVL744: + 587:Src/main.c **** while(1); + 9459 .loc 1 587 7 is_stmt 1 view .LVU3079 + 587:Src/main.c **** while(1); + 9460 .loc 1 587 10 is_stmt 0 view .LVU3080 + 9461 083e D8B9 cbnz r0, .L408 + 9462 .L409: + 589:Src/main.c **** { + ARM GAS /tmp/ccyYWdjY.s page 553 - 594:Src/main.c **** TO10 = 0; - 9504 .loc 1 594 28 view .LVU3100 - 9505 0876 77EE277A vadd.f32 s15, s14, s15 - 9506 087a C3ED047A vstr.32 s15, [r3, #16] - 595:Src/main.c **** TIM10_coflag = 0; - 9507 .loc 1 595 9 is_stmt 1 view .LVU3101 - 595:Src/main.c **** TIM10_coflag = 0; - 9508 .loc 1 595 14 is_stmt 0 view .LVU3102 - 9509 087e 0023 movs r3, #0 - 9510 0880 7C4A ldr r2, .L442+52 - 9511 0882 1360 str r3, [r2] - 596:Src/main.c **** - 9512 .loc 1 596 9 is_stmt 1 view .LVU3103 - 596:Src/main.c **** - 9513 .loc 1 596 22 is_stmt 0 view .LVU3104 - 9514 0884 7A4A ldr r2, .L442+48 - 9515 0886 1370 strb r3, [r2] - 9516 0888 E4E7 b .L409 - 9517 .LVL745: - 9518 .L405: - 575:Src/main.c **** // */ - 9519 .loc 1 575 8 is_stmt 1 view .LVU3105 - 575:Src/main.c **** // */ - 9520 .loc 1 575 13 view .LVU3106 - 9521 088a FEE7 b .L405 - 9522 .LVL746: - 9523 .L408: - 586:Src/main.c **** while (task.current_param < task.max_param) - 9524 .loc 1 586 8 view .LVU3107 - 586:Src/main.c **** while (task.current_param < task.max_param) - 9525 .loc 1 586 13 view .LVU3108 - 9526 088c FEE7 b .L408 - 9527 .L435: - 601:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 9528 .loc 1 601 7 view .LVU3109 - 9529 088e 7748 ldr r0, .L442+44 - 9530 .LVL747: - 601:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); - 9531 .loc 1 601 7 is_stmt 0 view .LVU3110 - 9532 0890 FFF7FEFF bl HAL_TIM_Base_Stop - 9533 .LVL748: - 602:Src/main.c **** - 9534 .loc 1 602 7 is_stmt 1 view .LVU3111 - 9535 0894 744C ldr r4, .L442+40 - 9536 0896 0122 movs r2, #1 - 9537 0898 8021 movs r1, #128 - 9538 089a 2046 mov r0, r4 - 9539 089c FFF7FEFF bl HAL_GPIO_WritePin - 9540 .LVL749: + 9463 .loc 1 589 33 is_stmt 1 view .LVU3081 + 589:Src/main.c **** { + 9464 .loc 1 589 18 is_stmt 0 view .LVU3082 + 9465 0840 7A4B ldr r3, .L442 + 9466 0842 D3ED047A vldr.32 s15, [r3, #16] + 589:Src/main.c **** { + 9467 .loc 1 589 39 view .LVU3083 + 9468 0846 93ED027A vldr.32 s14, [r3, #8] + 589:Src/main.c **** { + 9469 .loc 1 589 33 view .LVU3084 + 9470 084a F4EEC77A vcmpe.f32 s15, s14 + 9471 084e F1EE10FA vmrs APSR_nzcv, FPSCR + 9472 0852 12D5 bpl .L435 + 591:Src/main.c **** { + 9473 .loc 1 591 8 is_stmt 1 view .LVU3085 + 591:Src/main.c **** { + 9474 .loc 1 591 12 is_stmt 0 view .LVU3086 + 9475 0854 814B ldr r3, .L442+48 + 9476 0856 1B78 ldrb r3, [r3] @ zero_extendqisi2 + 591:Src/main.c **** { + 9477 .loc 1 591 11 view .LVU3087 + 9478 0858 002B cmp r3, #0 + 9479 085a F1D0 beq .L409 + 596:Src/main.c **** TO10 = 0; + 9480 .loc 1 596 9 is_stmt 1 view .LVU3088 + 596:Src/main.c **** TO10 = 0; + 9481 .loc 1 596 35 is_stmt 0 view .LVU3089 + 9482 085c 734B ldr r3, .L442 + 9483 085e 93ED037A vldr.32 s14, [r3, #12] + 596:Src/main.c **** TO10 = 0; + 9484 .loc 1 596 28 view .LVU3090 + 9485 0862 77EE277A vadd.f32 s15, s14, s15 + 9486 0866 C3ED047A vstr.32 s15, [r3, #16] + 597:Src/main.c **** TIM10_coflag = 0; + 9487 .loc 1 597 9 is_stmt 1 view .LVU3091 + 597:Src/main.c **** TIM10_coflag = 0; + 9488 .loc 1 597 14 is_stmt 0 view .LVU3092 + 9489 086a 0023 movs r3, #0 + 9490 086c 7C4A ldr r2, .L442+52 + 9491 086e 1360 str r3, [r2] + 598:Src/main.c **** + 9492 .loc 1 598 9 is_stmt 1 view .LVU3093 + 598:Src/main.c **** + 9493 .loc 1 598 22 is_stmt 0 view .LVU3094 + 9494 0870 7A4A ldr r2, .L442+48 + 9495 0872 1370 strb r3, [r2] + 9496 0874 E4E7 b .L409 + 9497 .LVL745: + 9498 .L405: + 577:Src/main.c **** // */ + 9499 .loc 1 577 8 is_stmt 1 view .LVU3095 + 577:Src/main.c **** // */ + 9500 .loc 1 577 13 view .LVU3096 + 9501 0876 FEE7 b .L405 + 9502 .LVL746: + 9503 .L408: + 588:Src/main.c **** while (task.current_param < task.max_param) + ARM GAS /tmp/ccyYWdjY.s page 554 + + + 9504 .loc 1 588 8 view .LVU3097 + 588:Src/main.c **** while (task.current_param < task.max_param) + 9505 .loc 1 588 13 view .LVU3098 + 9506 0878 FEE7 b .L408 + 9507 .L435: + 603:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 9508 .loc 1 603 7 view .LVU3099 + 9509 087a 7748 ldr r0, .L442+44 + 9510 .LVL747: + 603:Src/main.c **** HAL_GPIO_WritePin(GPIOD, GPIO_PIN_7, GPIO_PIN_SET); + 9511 .loc 1 603 7 is_stmt 0 view .LVU3100 + 9512 087c FFF7FEFF bl HAL_TIM_Base_Stop + 9513 .LVL748: 604:Src/main.c **** - 9541 .loc 1 604 7 view .LVU3112 - 9542 08a0 0022 movs r2, #0 - 9543 08a2 8021 movs r1, #128 - 9544 08a4 2046 mov r0, r4 - 9545 08a6 FFF7FEFF bl HAL_GPIO_WritePin - 9546 .LVL750: - 606:Src/main.c **** TIM8->CNT = 0; - ARM GAS /tmp/ccfIOqv2.s page 555 + 9514 .loc 1 604 7 is_stmt 1 view .LVU3101 + 9515 0880 744C ldr r4, .L442+40 + 9516 0882 0122 movs r2, #1 + 9517 0884 8021 movs r1, #128 + 9518 0886 2046 mov r0, r4 + 9519 0888 FFF7FEFF bl HAL_GPIO_WritePin + 9520 .LVL749: + 606:Src/main.c **** + 9521 .loc 1 606 7 view .LVU3102 + 9522 088c 0022 movs r2, #0 + 9523 088e 8021 movs r1, #128 + 9524 0890 2046 mov r0, r4 + 9525 0892 FFF7FEFF bl HAL_GPIO_WritePin + 9526 .LVL750: + 608:Src/main.c **** TIM8->CNT = 0; + 9527 .loc 1 608 7 view .LVU3103 + 9528 0896 6E48 ldr r0, .L442+36 + 9529 0898 FFF7FEFF bl HAL_TIM_Base_Stop_IT + 9530 .LVL751: + 609:Src/main.c **** + 9531 .loc 1 609 7 view .LVU3104 + 609:Src/main.c **** + 9532 .loc 1 609 17 is_stmt 0 view .LVU3105 + 9533 089c 6B4B ldr r3, .L442+32 + 9534 089e 0022 movs r2, #0 + 9535 08a0 5A62 str r2, [r3, #36] + 611:Src/main.c **** task.current_param = task.min_param; + 9536 .loc 1 611 7 is_stmt 1 view .LVU3106 + 9537 08a2 FFF7FEFF bl Stop_TIM10 + 9538 .LVL752: + 612:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9539 .loc 1 612 7 view .LVU3107 + 612:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9540 .loc 1 612 32 is_stmt 0 view .LVU3108 + 9541 08a6 614C ldr r4, .L442 + 9542 08a8 D4ED017A vldr.32 s15, [r4, #4] + 612:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); + 9543 .loc 1 612 26 view .LVU3109 + 9544 08ac C4ED047A vstr.32 s15, [r4, #16] + 613:Src/main.c **** if (task.tau > 3) + 9545 .loc 1 613 7 is_stmt 1 view .LVU3110 + 9546 08b0 FCEEE77A vcvt.u32.f32 s15, s15 + 9547 08b4 17EE903A vmov r3, s15 @ int + ARM GAS /tmp/ccyYWdjY.s page 555 - 9547 .loc 1 606 7 view .LVU3113 - 9548 08aa 6E48 ldr r0, .L442+36 - 9549 08ac FFF7FEFF bl HAL_TIM_Base_Stop_IT - 9550 .LVL751: - 607:Src/main.c **** - 9551 .loc 1 607 7 view .LVU3114 - 607:Src/main.c **** - 9552 .loc 1 607 17 is_stmt 0 view .LVU3115 - 9553 08b0 6B4B ldr r3, .L442+32 - 9554 08b2 0022 movs r2, #0 - 9555 08b4 5A62 str r2, [r3, #36] - 609:Src/main.c **** task.current_param = task.min_param; - 9556 .loc 1 609 7 is_stmt 1 view .LVU3116 - 9557 08b6 FFF7FEFF bl Stop_TIM10 - 9558 .LVL752: - 610:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9559 .loc 1 610 7 view .LVU3117 - 610:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9560 .loc 1 610 32 is_stmt 0 view .LVU3118 - 9561 08ba 614C ldr r4, .L442 - 9562 08bc D4ED017A vldr.32 s15, [r4, #4] - 610:Src/main.c **** Set_LTEC(TT_CHANGE_CURR_2, task.current_param); - 9563 .loc 1 610 26 view .LVU3119 - 9564 08c0 C4ED047A vstr.32 s15, [r4, #16] - 611:Src/main.c **** if (task.tau > 3) - 9565 .loc 1 611 7 is_stmt 1 view .LVU3120 - 9566 08c4 FCEEE77A vcvt.u32.f32 s15, s15 - 9567 08c8 17EE903A vmov r3, s15 @ int - 9568 08cc 99B2 uxth r1, r3 - 9569 08ce 0220 movs r0, #2 - 9570 08d0 FFF7FEFF bl Set_LTEC - 9571 .LVL753: - 612:Src/main.c **** { - 9572 .loc 1 612 7 view .LVU3121 - 612:Src/main.c **** { - 9573 .loc 1 612 15 is_stmt 0 view .LVU3122 - 9574 08d4 E38A ldrh r3, [r4, #22] - 612:Src/main.c **** { - 9575 .loc 1 612 10 view .LVU3123 - 9576 08d6 032B cmp r3, #3 - 9577 08d8 0CD9 bls .L411 - 614:Src/main.c **** htim10.Init.Period = 9999; - 9578 .loc 1 614 8 is_stmt 1 view .LVU3124 - 614:Src/main.c **** htim10.Init.Period = 9999; - 9579 .loc 1 614 34 is_stmt 0 view .LVU3125 - 9580 08da 644A ldr r2, .L442+44 - 9581 08dc D068 ldr r0, [r2, #12] - 614:Src/main.c **** htim10.Init.Period = 9999; - 9582 .loc 1 614 21 view .LVU3126 - 9583 08de 6649 ldr r1, .L442+56 - 9584 08e0 0860 str r0, [r1] - 615:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9585 .loc 1 615 8 is_stmt 1 view .LVU3127 - 615:Src/main.c **** TO10_counter = (task.tau - 1) * 100; - 9586 .loc 1 615 27 is_stmt 0 view .LVU3128 - 9587 08e2 42F20F71 movw r1, #9999 - 9588 08e6 D160 str r1, [r2, #12] - ARM GAS /tmp/ccfIOqv2.s page 556 + 9548 08b8 99B2 uxth r1, r3 + 9549 08ba 0220 movs r0, #2 + 9550 08bc FFF7FEFF bl Set_LTEC + 9551 .LVL753: + 614:Src/main.c **** { + 9552 .loc 1 614 7 view .LVU3111 + 614:Src/main.c **** { + 9553 .loc 1 614 15 is_stmt 0 view .LVU3112 + 9554 08c0 E38A ldrh r3, [r4, #22] + 614:Src/main.c **** { + 9555 .loc 1 614 10 view .LVU3113 + 9556 08c2 032B cmp r3, #3 + 9557 08c4 0CD9 bls .L411 + 616:Src/main.c **** htim10.Init.Period = 9999; + 9558 .loc 1 616 8 is_stmt 1 view .LVU3114 + 616:Src/main.c **** htim10.Init.Period = 9999; + 9559 .loc 1 616 34 is_stmt 0 view .LVU3115 + 9560 08c6 644A ldr r2, .L442+44 + 9561 08c8 D068 ldr r0, [r2, #12] + 616:Src/main.c **** htim10.Init.Period = 9999; + 9562 .loc 1 616 21 view .LVU3116 + 9563 08ca 6649 ldr r1, .L442+56 + 9564 08cc 0860 str r0, [r1] + 617:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9565 .loc 1 617 8 is_stmt 1 view .LVU3117 + 617:Src/main.c **** TO10_counter = (task.tau - 1) * 100; + 9566 .loc 1 617 27 is_stmt 0 view .LVU3118 + 9567 08ce 42F20F71 movw r1, #9999 + 9568 08d2 D160 str r1, [r2, #12] + 618:Src/main.c **** } + 9569 .loc 1 618 8 is_stmt 1 view .LVU3119 + 618:Src/main.c **** } + 9570 .loc 1 618 33 is_stmt 0 view .LVU3120 + 9571 08d4 013B subs r3, r3, #1 + 618:Src/main.c **** } + 9572 .loc 1 618 38 view .LVU3121 + 9573 08d6 6422 movs r2, #100 + 9574 08d8 02FB03F3 mul r3, r2, r3 + 618:Src/main.c **** } + 9575 .loc 1 618 21 view .LVU3122 + 9576 08dc 624A ldr r2, .L442+60 + 9577 08de 1360 str r3, [r2] + 9578 .L411: + 620:Src/main.c **** + 9579 .loc 1 620 7 is_stmt 1 view .LVU3123 + 9580 08e0 5D48 ldr r0, .L442+44 + 9581 08e2 FFF7FEFF bl HAL_TIM_Base_Start_IT + 9582 .LVL754: + 668:Src/main.c **** case TT_CHANGE_TEMP_1: + 9583 .loc 1 668 6 view .LVU3124 + 9584 08e6 C3E5 b .L394 + 9585 .LVL755: + 9586 .L430: + 668:Src/main.c **** case TT_CHANGE_TEMP_1: + 9587 .loc 1 668 6 is_stmt 0 view .LVU3125 + 9588 .LBE577: + 679:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 556 - 616:Src/main.c **** } - 9589 .loc 1 616 8 is_stmt 1 view .LVU3129 - 616:Src/main.c **** } - 9590 .loc 1 616 33 is_stmt 0 view .LVU3130 - 9591 08e8 013B subs r3, r3, #1 - 616:Src/main.c **** } - 9592 .loc 1 616 38 view .LVU3131 - 9593 08ea 6422 movs r2, #100 - 9594 08ec 02FB03F3 mul r3, r2, r3 - 616:Src/main.c **** } - 9595 .loc 1 616 21 view .LVU3132 - 9596 08f0 624A ldr r2, .L442+60 - 9597 08f2 1360 str r3, [r2] - 9598 .L411: - 618:Src/main.c **** - 9599 .loc 1 618 7 is_stmt 1 view .LVU3133 - 9600 08f4 5D48 ldr r0, .L442+44 - 9601 08f6 FFF7FEFF bl HAL_TIM_Base_Start_IT - 9602 .LVL754: - 666:Src/main.c **** case TT_CHANGE_TEMP_1: - 9603 .loc 1 666 6 view .LVU3134 - 9604 08fa C3E5 b .L394 - 9605 .LVL755: - 9606 .L430: - 666:Src/main.c **** case TT_CHANGE_TEMP_1: - 9607 .loc 1 666 6 is_stmt 0 view .LVU3135 - 9608 .LBE577: - 677:Src/main.c **** - 9609 .loc 1 677 7 is_stmt 1 view .LVU3136 - 677:Src/main.c **** - 9610 .loc 1 677 18 is_stmt 0 view .LVU3137 - 9611 08fc 604A ldr r2, .L442+64 - 9612 08fe 1360 str r3, [r2] - 679:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9613 .loc 1 679 7 is_stmt 1 view .LVU3138 - 679:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9614 .loc 1 679 25 is_stmt 0 view .LVU3139 - 9615 0900 0120 movs r0, #1 - 9616 0902 FFF7FEFF bl MPhD_T - 9617 .LVL756: - 679:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 - 9618 .loc 1 679 23 discriminator 1 view .LVU3140 - 9619 0906 4F4E ldr r6, .L442+4 - 9620 0908 3081 strh r0, [r6, #8] @ movhi - 680:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9621 .loc 1 680 7 is_stmt 1 view .LVU3141 - 680:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9622 .loc 1 680 25 is_stmt 0 view .LVU3142 - 9623 090a 0120 movs r0, #1 - 9624 090c FFF7FEFF bl MPhD_T - 9625 .LVL757: - 680:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9626 .loc 1 680 23 discriminator 1 view .LVU3143 - 9627 0910 3081 strh r0, [r6, #8] @ movhi - 681:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9628 .loc 1 681 7 is_stmt 1 view .LVU3144 - 681:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - ARM GAS /tmp/ccfIOqv2.s page 557 + 9589 .loc 1 679 7 is_stmt 1 view .LVU3126 + 679:Src/main.c **** + 9590 .loc 1 679 18 is_stmt 0 view .LVU3127 + 9591 08e8 604A ldr r2, .L442+64 + 9592 08ea 1360 str r3, [r2] + 681:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9593 .loc 1 681 7 is_stmt 1 view .LVU3128 + 681:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9594 .loc 1 681 25 is_stmt 0 view .LVU3129 + 9595 08ec 0120 movs r0, #1 + 9596 08ee FFF7FEFF bl MPhD_T + 9597 .LVL756: + 681:Src/main.c **** LD1_param.POWER = MPhD_T(1);//Get Data from monitor photodiode of LD1 + 9598 .loc 1 681 23 discriminator 1 view .LVU3130 + 9599 08f2 4F4E ldr r6, .L442+4 + 9600 08f4 3081 strh r0, [r6, #8] @ movhi + 682:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9601 .loc 1 682 7 is_stmt 1 view .LVU3131 + 682:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9602 .loc 1 682 25 is_stmt 0 view .LVU3132 + 9603 08f6 0120 movs r0, #1 + 9604 08f8 FFF7FEFF bl MPhD_T + 9605 .LVL757: + 682:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9606 .loc 1 682 23 discriminator 1 view .LVU3133 + 9607 08fc 3081 strh r0, [r6, #8] @ movhi + 683:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9608 .loc 1 683 7 is_stmt 1 view .LVU3134 + 683:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9609 .loc 1 683 25 is_stmt 0 view .LVU3135 + 9610 08fe 0220 movs r0, #2 + 9611 0900 FFF7FEFF bl MPhD_T + 9612 .LVL758: + 683:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 + 9613 .loc 1 683 23 discriminator 1 view .LVU3136 + 9614 0904 4B4F ldr r7, .L442+8 + 9615 0906 3881 strh r0, [r7, #8] @ movhi + 684:Src/main.c **** + 9616 .loc 1 684 7 is_stmt 1 view .LVU3137 + 684:Src/main.c **** + 9617 .loc 1 684 25 is_stmt 0 view .LVU3138 + 9618 0908 0220 movs r0, #2 + 9619 090a FFF7FEFF bl MPhD_T + 9620 .LVL759: + 684:Src/main.c **** + 9621 .loc 1 684 23 discriminator 1 view .LVU3139 + 9622 090e 3881 strh r0, [r7, #8] @ movhi + 686:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9623 .loc 1 686 7 is_stmt 1 view .LVU3140 + 686:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9624 .loc 1 686 31 is_stmt 0 view .LVU3141 + 9625 0910 3389 ldrh r3, [r6, #8] + 686:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data + 9626 .loc 1 686 20 view .LVU3142 + 9627 0912 574C ldr r4, .L442+68 + 9628 0914 6380 strh r3, [r4, #2] @ movhi + 687:Src/main.c **** + ARM GAS /tmp/ccyYWdjY.s page 557 - 9629 .loc 1 681 25 is_stmt 0 view .LVU3145 - 9630 0912 0220 movs r0, #2 - 9631 0914 FFF7FEFF bl MPhD_T - 9632 .LVL758: - 681:Src/main.c **** LD2_param.POWER = MPhD_T(2);//Get Data from monitor photodiode of LD2 - 9633 .loc 1 681 23 discriminator 1 view .LVU3146 - 9634 0918 4B4F ldr r7, .L442+8 - 9635 091a 3881 strh r0, [r7, #8] @ movhi - 682:Src/main.c **** - 9636 .loc 1 682 7 is_stmt 1 view .LVU3147 - 682:Src/main.c **** - 9637 .loc 1 682 25 is_stmt 0 view .LVU3148 - 9638 091c 0220 movs r0, #2 - 9639 091e FFF7FEFF bl MPhD_T - 9640 .LVL759: - 682:Src/main.c **** - 9641 .loc 1 682 23 discriminator 1 view .LVU3149 - 9642 0922 3881 strh r0, [r7, #8] @ movhi - 684:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9643 .loc 1 684 7 is_stmt 1 view .LVU3150 - 684:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9644 .loc 1 684 31 is_stmt 0 view .LVU3151 - 9645 0924 3389 ldrh r3, [r6, #8] - 684:Src/main.c **** Long_Data[2] = LD2_param.POWER;//Translate Data from monitor photodiode of LD2 to Long_Data - 9646 .loc 1 684 20 view .LVU3152 - 9647 0926 574C ldr r4, .L442+68 - 9648 0928 6380 strh r3, [r4, #2] @ movhi - 685:Src/main.c **** - 9649 .loc 1 685 7 is_stmt 1 view .LVU3153 - 685:Src/main.c **** - 9650 .loc 1 685 20 is_stmt 0 view .LVU3154 - 9651 092a A080 strh r0, [r4, #4] @ movhi - 689:Src/main.c **** temp16 = Get_ADC(1); - 9652 .loc 1 689 7 is_stmt 1 view .LVU3155 - 689:Src/main.c **** temp16 = Get_ADC(1); - 9653 .loc 1 689 16 is_stmt 0 view .LVU3156 - 9654 092c 0020 movs r0, #0 - 9655 092e FFF7FEFF bl Get_ADC - 9656 .LVL760: - 689:Src/main.c **** temp16 = Get_ADC(1); - 9657 .loc 1 689 14 discriminator 1 view .LVU3157 - 9658 0932 474D ldr r5, .L442+16 - 9659 0934 2880 strh r0, [r5] @ movhi - 690:Src/main.c **** Long_Data[7] = temp16; - 9660 .loc 1 690 7 is_stmt 1 view .LVU3158 - 690:Src/main.c **** Long_Data[7] = temp16; - 9661 .loc 1 690 16 is_stmt 0 view .LVU3159 + 9629 .loc 1 687 7 is_stmt 1 view .LVU3143 + 687:Src/main.c **** + 9630 .loc 1 687 20 is_stmt 0 view .LVU3144 + 9631 0916 A080 strh r0, [r4, #4] @ movhi + 691:Src/main.c **** temp16 = Get_ADC(1); + 9632 .loc 1 691 7 is_stmt 1 view .LVU3145 + 691:Src/main.c **** temp16 = Get_ADC(1); + 9633 .loc 1 691 16 is_stmt 0 view .LVU3146 + 9634 0918 0020 movs r0, #0 + 9635 091a FFF7FEFF bl Get_ADC + 9636 .LVL760: + 691:Src/main.c **** temp16 = Get_ADC(1); + 9637 .loc 1 691 14 discriminator 1 view .LVU3147 + 9638 091e 474D ldr r5, .L442+16 + 9639 0920 2880 strh r0, [r5] @ movhi + 692:Src/main.c **** Long_Data[7] = temp16; + 9640 .loc 1 692 7 is_stmt 1 view .LVU3148 + 692:Src/main.c **** Long_Data[7] = temp16; + 9641 .loc 1 692 16 is_stmt 0 view .LVU3149 + 9642 0922 0120 movs r0, #1 + 9643 0924 FFF7FEFF bl Get_ADC + 9644 .LVL761: + 692:Src/main.c **** Long_Data[7] = temp16; + 9645 .loc 1 692 14 discriminator 1 view .LVU3150 + 9646 0928 2880 strh r0, [r5] @ movhi + 693:Src/main.c **** + 9647 .loc 1 693 7 is_stmt 1 view .LVU3151 + 693:Src/main.c **** + 9648 .loc 1 693 20 is_stmt 0 view .LVU3152 + 9649 092a E081 strh r0, [r4, #14] @ movhi + 696:Src/main.c **** Long_Data[8] = temp16; + 9650 .loc 1 696 7 is_stmt 1 view .LVU3153 + 696:Src/main.c **** Long_Data[8] = temp16; + 9651 .loc 1 696 16 is_stmt 0 view .LVU3154 + 9652 092c 0120 movs r0, #1 + 9653 092e FFF7FEFF bl Get_ADC + 9654 .LVL762: + 696:Src/main.c **** Long_Data[8] = temp16; + 9655 .loc 1 696 14 discriminator 1 view .LVU3155 + 9656 0932 2880 strh r0, [r5] @ movhi + 697:Src/main.c **** + 9657 .loc 1 697 7 is_stmt 1 view .LVU3156 + 697:Src/main.c **** + 9658 .loc 1 697 20 is_stmt 0 view .LVU3157 + 9659 0934 2082 strh r0, [r4, #16] @ movhi + 700:Src/main.c **** Long_Data[9] = temp16; + 9660 .loc 1 700 7 is_stmt 1 view .LVU3158 + 700:Src/main.c **** Long_Data[9] = temp16; + 9661 .loc 1 700 16 is_stmt 0 view .LVU3159 9662 0936 0120 movs r0, #1 9663 0938 FFF7FEFF bl Get_ADC - 9664 .LVL761: - 690:Src/main.c **** Long_Data[7] = temp16; - 9665 .loc 1 690 14 discriminator 1 view .LVU3160 + 9664 .LVL763: + 700:Src/main.c **** Long_Data[9] = temp16; + 9665 .loc 1 700 14 discriminator 1 view .LVU3160 9666 093c 2880 strh r0, [r5] @ movhi - 691:Src/main.c **** - 9667 .loc 1 691 7 is_stmt 1 view .LVU3161 - 691:Src/main.c **** - 9668 .loc 1 691 20 is_stmt 0 view .LVU3162 - ARM GAS /tmp/ccfIOqv2.s page 558 + 701:Src/main.c **** + 9667 .loc 1 701 7 is_stmt 1 view .LVU3161 + ARM GAS /tmp/ccyYWdjY.s page 558 - 9669 093e E081 strh r0, [r4, #14] @ movhi - 694:Src/main.c **** Long_Data[8] = temp16; - 9670 .loc 1 694 7 is_stmt 1 view .LVU3163 - 694:Src/main.c **** Long_Data[8] = temp16; - 9671 .loc 1 694 16 is_stmt 0 view .LVU3164 + 701:Src/main.c **** + 9668 .loc 1 701 20 is_stmt 0 view .LVU3162 + 9669 093e 6082 strh r0, [r4, #18] @ movhi + 704:Src/main.c **** Long_Data[10] = temp16; + 9670 .loc 1 704 7 is_stmt 1 view .LVU3163 + 704:Src/main.c **** Long_Data[10] = temp16; + 9671 .loc 1 704 16 is_stmt 0 view .LVU3164 9672 0940 0120 movs r0, #1 9673 0942 FFF7FEFF bl Get_ADC - 9674 .LVL762: - 694:Src/main.c **** Long_Data[8] = temp16; - 9675 .loc 1 694 14 discriminator 1 view .LVU3165 + 9674 .LVL764: + 704:Src/main.c **** Long_Data[10] = temp16; + 9675 .loc 1 704 14 discriminator 1 view .LVU3165 9676 0946 2880 strh r0, [r5] @ movhi - 695:Src/main.c **** - 9677 .loc 1 695 7 is_stmt 1 view .LVU3166 - 695:Src/main.c **** - 9678 .loc 1 695 20 is_stmt 0 view .LVU3167 - 9679 0948 2082 strh r0, [r4, #16] @ movhi - 698:Src/main.c **** Long_Data[9] = temp16; - 9680 .loc 1 698 7 is_stmt 1 view .LVU3168 - 698:Src/main.c **** Long_Data[9] = temp16; - 9681 .loc 1 698 16 is_stmt 0 view .LVU3169 + 705:Src/main.c **** + 9677 .loc 1 705 7 is_stmt 1 view .LVU3166 + 705:Src/main.c **** + 9678 .loc 1 705 21 is_stmt 0 view .LVU3167 + 9679 0948 A082 strh r0, [r4, #20] @ movhi + 708:Src/main.c **** Long_Data[11] = temp16; + 9680 .loc 1 708 7 is_stmt 1 view .LVU3168 + 708:Src/main.c **** Long_Data[11] = temp16; + 9681 .loc 1 708 16 is_stmt 0 view .LVU3169 9682 094a 0120 movs r0, #1 9683 094c FFF7FEFF bl Get_ADC - 9684 .LVL763: - 698:Src/main.c **** Long_Data[9] = temp16; - 9685 .loc 1 698 14 discriminator 1 view .LVU3170 + 9684 .LVL765: + 708:Src/main.c **** Long_Data[11] = temp16; + 9685 .loc 1 708 14 discriminator 1 view .LVU3170 9686 0950 2880 strh r0, [r5] @ movhi - 699:Src/main.c **** - 9687 .loc 1 699 7 is_stmt 1 view .LVU3171 - 699:Src/main.c **** - 9688 .loc 1 699 20 is_stmt 0 view .LVU3172 - 9689 0952 6082 strh r0, [r4, #18] @ movhi - 702:Src/main.c **** Long_Data[10] = temp16; - 9690 .loc 1 702 7 is_stmt 1 view .LVU3173 - 702:Src/main.c **** Long_Data[10] = temp16; - 9691 .loc 1 702 16 is_stmt 0 view .LVU3174 - 9692 0954 0120 movs r0, #1 + 709:Src/main.c **** temp16 = Get_ADC(2); + 9687 .loc 1 709 7 is_stmt 1 view .LVU3171 + 709:Src/main.c **** temp16 = Get_ADC(2); + 9688 .loc 1 709 21 is_stmt 0 view .LVU3172 + 9689 0952 E082 strh r0, [r4, #22] @ movhi + 710:Src/main.c **** + 9690 .loc 1 710 7 is_stmt 1 view .LVU3173 + 710:Src/main.c **** + 9691 .loc 1 710 16 is_stmt 0 view .LVU3174 + 9692 0954 0220 movs r0, #2 9693 0956 FFF7FEFF bl Get_ADC - 9694 .LVL764: - 702:Src/main.c **** Long_Data[10] = temp16; - 9695 .loc 1 702 14 discriminator 1 view .LVU3175 + 9694 .LVL766: + 710:Src/main.c **** + 9695 .loc 1 710 14 discriminator 1 view .LVU3175 9696 095a 2880 strh r0, [r5] @ movhi - 703:Src/main.c **** - 9697 .loc 1 703 7 is_stmt 1 view .LVU3176 - 703:Src/main.c **** - 9698 .loc 1 703 21 is_stmt 0 view .LVU3177 - 9699 095c A082 strh r0, [r4, #20] @ movhi - 706:Src/main.c **** Long_Data[11] = temp16; - 9700 .loc 1 706 7 is_stmt 1 view .LVU3178 - 706:Src/main.c **** Long_Data[11] = temp16; - 9701 .loc 1 706 16 is_stmt 0 view .LVU3179 - 9702 095e 0120 movs r0, #1 - 9703 0960 FFF7FEFF bl Get_ADC - 9704 .LVL765: - 706:Src/main.c **** Long_Data[11] = temp16; - 9705 .loc 1 706 14 discriminator 1 view .LVU3180 - 9706 0964 2880 strh r0, [r5] @ movhi - 707:Src/main.c **** temp16 = Get_ADC(2); - ARM GAS /tmp/ccfIOqv2.s page 559 + 713:Src/main.c **** temp16 = Get_ADC(4); + 9697 .loc 1 713 7 is_stmt 1 view .LVU3176 + 713:Src/main.c **** temp16 = Get_ADC(4); + 9698 .loc 1 713 16 is_stmt 0 view .LVU3177 + 9699 095c 0320 movs r0, #3 + 9700 095e FFF7FEFF bl Get_ADC + 9701 .LVL767: + 713:Src/main.c **** temp16 = Get_ADC(4); + 9702 .loc 1 713 14 discriminator 1 view .LVU3178 + 9703 0962 2880 strh r0, [r5] @ movhi + 714:Src/main.c **** Long_Data[12] = temp16; + 9704 .loc 1 714 7 is_stmt 1 view .LVU3179 + 714:Src/main.c **** Long_Data[12] = temp16; + 9705 .loc 1 714 16 is_stmt 0 view .LVU3180 + ARM GAS /tmp/ccyYWdjY.s page 559 - 9707 .loc 1 707 7 is_stmt 1 view .LVU3181 - 707:Src/main.c **** temp16 = Get_ADC(2); - 9708 .loc 1 707 21 is_stmt 0 view .LVU3182 - 9709 0966 E082 strh r0, [r4, #22] @ movhi - 708:Src/main.c **** - 9710 .loc 1 708 7 is_stmt 1 view .LVU3183 - 708:Src/main.c **** - 9711 .loc 1 708 16 is_stmt 0 view .LVU3184 - 9712 0968 0220 movs r0, #2 - 9713 096a FFF7FEFF bl Get_ADC - 9714 .LVL766: - 708:Src/main.c **** - 9715 .loc 1 708 14 discriminator 1 view .LVU3185 - 9716 096e 2880 strh r0, [r5] @ movhi - 711:Src/main.c **** temp16 = Get_ADC(4); - 9717 .loc 1 711 7 is_stmt 1 view .LVU3186 - 711:Src/main.c **** temp16 = Get_ADC(4); - 9718 .loc 1 711 16 is_stmt 0 view .LVU3187 - 9719 0970 0320 movs r0, #3 - 9720 0972 FFF7FEFF bl Get_ADC - 9721 .LVL767: - 711:Src/main.c **** temp16 = Get_ADC(4); - 9722 .loc 1 711 14 discriminator 1 view .LVU3188 - 9723 0976 2880 strh r0, [r5] @ movhi - 712:Src/main.c **** Long_Data[12] = temp16; - 9724 .loc 1 712 7 is_stmt 1 view .LVU3189 - 712:Src/main.c **** Long_Data[12] = temp16; - 9725 .loc 1 712 16 is_stmt 0 view .LVU3190 - 9726 0978 0420 movs r0, #4 - 9727 097a FFF7FEFF bl Get_ADC - 9728 .LVL768: - 712:Src/main.c **** Long_Data[12] = temp16; - 9729 .loc 1 712 14 discriminator 1 view .LVU3191 - 9730 097e 2880 strh r0, [r5] @ movhi - 713:Src/main.c **** temp16 = Get_ADC(5); - 9731 .loc 1 713 7 is_stmt 1 view .LVU3192 - 713:Src/main.c **** temp16 = Get_ADC(5); - 9732 .loc 1 713 21 is_stmt 0 view .LVU3193 - 9733 0980 2083 strh r0, [r4, #24] @ movhi - 714:Src/main.c **** - 9734 .loc 1 714 7 is_stmt 1 view .LVU3194 - 714:Src/main.c **** - 9735 .loc 1 714 16 is_stmt 0 view .LVU3195 - 9736 0982 0520 movs r0, #5 - 9737 0984 FFF7FEFF bl Get_ADC - 9738 .LVL769: - 714:Src/main.c **** - 9739 .loc 1 714 14 discriminator 1 view .LVU3196 - 9740 0988 2880 strh r0, [r5] @ movhi - 717:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9741 .loc 1 717 7 is_stmt 1 view .LVU3197 - 717:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; - 9742 .loc 1 717 16 is_stmt 0 view .LVU3198 - 9743 098a 3F4B ldr r3, .L442+72 - 9744 098c 1B68 ldr r3, [r3] - 9745 098e 3F4A ldr r2, .L442+76 - 9746 0990 1360 str r3, [r2] - ARM GAS /tmp/ccfIOqv2.s page 560 + 9706 0964 0420 movs r0, #4 + 9707 0966 FFF7FEFF bl Get_ADC + 9708 .LVL768: + 714:Src/main.c **** Long_Data[12] = temp16; + 9709 .loc 1 714 14 discriminator 1 view .LVU3181 + 9710 096a 2880 strh r0, [r5] @ movhi + 715:Src/main.c **** temp16 = Get_ADC(5); + 9711 .loc 1 715 7 is_stmt 1 view .LVU3182 + 715:Src/main.c **** temp16 = Get_ADC(5); + 9712 .loc 1 715 21 is_stmt 0 view .LVU3183 + 9713 096c 2083 strh r0, [r4, #24] @ movhi + 716:Src/main.c **** + 9714 .loc 1 716 7 is_stmt 1 view .LVU3184 + 716:Src/main.c **** + 9715 .loc 1 716 16 is_stmt 0 view .LVU3185 + 9716 096e 0520 movs r0, #5 + 9717 0970 FFF7FEFF bl Get_ADC + 9718 .LVL769: + 716:Src/main.c **** + 9719 .loc 1 716 14 discriminator 1 view .LVU3186 + 9720 0974 2880 strh r0, [r5] @ movhi + 719:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9721 .loc 1 719 7 is_stmt 1 view .LVU3187 + 719:Src/main.c **** Long_Data[3] = (TO6_stop)&0xffff; + 9722 .loc 1 719 16 is_stmt 0 view .LVU3188 + 9723 0976 3F4B ldr r3, .L442+72 + 9724 0978 1B68 ldr r3, [r3] + 9725 097a 3F4A ldr r2, .L442+76 + 9726 097c 1360 str r3, [r2] + 720:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9727 .loc 1 720 7 is_stmt 1 view .LVU3189 + 720:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; + 9728 .loc 1 720 20 is_stmt 0 view .LVU3190 + 9729 097e E380 strh r3, [r4, #6] @ movhi + 721:Src/main.c **** + 9730 .loc 1 721 7 is_stmt 1 view .LVU3191 + 721:Src/main.c **** + 9731 .loc 1 721 31 is_stmt 0 view .LVU3192 + 9732 0980 1B0C lsrs r3, r3, #16 + 721:Src/main.c **** + 9733 .loc 1 721 20 view .LVU3193 + 9734 0982 2381 strh r3, [r4, #8] @ movhi + 724:Src/main.c **** + 9735 .loc 1 724 7 is_stmt 1 view .LVU3194 + 724:Src/main.c **** + 9736 .loc 1 724 31 is_stmt 0 view .LVU3195 + 9737 0984 3388 ldrh r3, [r6] + 724:Src/main.c **** + 9738 .loc 1 724 20 view .LVU3196 + 9739 0986 6381 strh r3, [r4, #10] @ movhi + 727:Src/main.c **** } + 9740 .loc 1 727 7 is_stmt 1 view .LVU3197 + 727:Src/main.c **** } + 9741 .loc 1 727 31 is_stmt 0 view .LVU3198 + 9742 0988 3B88 ldrh r3, [r7] + 727:Src/main.c **** } + 9743 .loc 1 727 20 view .LVU3199 + ARM GAS /tmp/ccyYWdjY.s page 560 - 718:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9747 .loc 1 718 7 is_stmt 1 view .LVU3199 - 718:Src/main.c **** Long_Data[4] = (TO6_stop>>16)&0xffff; - 9748 .loc 1 718 20 is_stmt 0 view .LVU3200 - 9749 0992 E380 strh r3, [r4, #6] @ movhi - 719:Src/main.c **** - 9750 .loc 1 719 7 is_stmt 1 view .LVU3201 - 719:Src/main.c **** - 9751 .loc 1 719 31 is_stmt 0 view .LVU3202 - 9752 0994 1B0C lsrs r3, r3, #16 - 719:Src/main.c **** - 9753 .loc 1 719 20 view .LVU3203 - 9754 0996 2381 strh r3, [r4, #8] @ movhi - 722:Src/main.c **** - 9755 .loc 1 722 7 is_stmt 1 view .LVU3204 - 722:Src/main.c **** - 9756 .loc 1 722 31 is_stmt 0 view .LVU3205 - 9757 0998 3388 ldrh r3, [r6] - 722:Src/main.c **** - 9758 .loc 1 722 20 view .LVU3206 - 9759 099a 6381 strh r3, [r4, #10] @ movhi - 725:Src/main.c **** } - 9760 .loc 1 725 7 is_stmt 1 view .LVU3207 - 725:Src/main.c **** } - 9761 .loc 1 725 31 is_stmt 0 view .LVU3208 - 9762 099c 3B88 ldrh r3, [r7] - 725:Src/main.c **** } - 9763 .loc 1 725 20 view .LVU3209 - 9764 099e A381 strh r3, [r4, #12] @ movhi - 9765 09a0 77E5 b .L413 - 9766 .L415: - 753:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9767 .loc 1 753 5 is_stmt 1 view .LVU3210 - 753:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9768 .loc 1 753 17 is_stmt 0 view .LVU3211 - 9769 09a2 3B4C ldr r4, .L442+80 - 9770 09a4 0D21 movs r1, #13 - 9771 09a6 2046 mov r0, r4 - 9772 09a8 FFF7FEFF bl CalculateChecksum - 9773 .LVL770: - 753:Src/main.c **** Long_Data[DL_16-1] = CS_result; - 9774 .loc 1 753 15 discriminator 1 view .LVU3212 - 9775 09ac 394B ldr r3, .L442+84 - 9776 09ae 1880 strh r0, [r3] @ movhi - 754:Src/main.c **** - 9777 .loc 1 754 5 is_stmt 1 view .LVU3213 - 754:Src/main.c **** - 9778 .loc 1 754 24 is_stmt 0 view .LVU3214 - 9779 09b0 6083 strh r0, [r4, #26] @ movhi - 756:Src/main.c **** { - 9780 .loc 1 756 5 is_stmt 1 view .LVU3215 - 9781 .LBB578: - 756:Src/main.c **** { - 9782 .loc 1 756 10 view .LVU3216 - 9783 .LVL771: - 756:Src/main.c **** { - 9784 .loc 1 756 19 is_stmt 0 view .LVU3217 - ARM GAS /tmp/ccfIOqv2.s page 561 + 9744 098a A381 strh r3, [r4, #12] @ movhi + 9745 098c 77E5 b .L413 + 9746 .L415: + 755:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9747 .loc 1 755 5 is_stmt 1 view .LVU3200 + 755:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9748 .loc 1 755 17 is_stmt 0 view .LVU3201 + 9749 098e 3B4C ldr r4, .L442+80 + 9750 0990 0D21 movs r1, #13 + 9751 0992 2046 mov r0, r4 + 9752 0994 FFF7FEFF bl CalculateChecksum + 9753 .LVL770: + 755:Src/main.c **** Long_Data[DL_16-1] = CS_result; + 9754 .loc 1 755 15 discriminator 1 view .LVU3202 + 9755 0998 394B ldr r3, .L442+84 + 9756 099a 1880 strh r0, [r3] @ movhi + 756:Src/main.c **** + 9757 .loc 1 756 5 is_stmt 1 view .LVU3203 + 756:Src/main.c **** + 9758 .loc 1 756 24 is_stmt 0 view .LVU3204 + 9759 099c 6083 strh r0, [r4, #26] @ movhi + 758:Src/main.c **** { + 9760 .loc 1 758 5 is_stmt 1 view .LVU3205 + 9761 .LBB578: + 758:Src/main.c **** { + 9762 .loc 1 758 10 view .LVU3206 + 9763 .LVL771: + 758:Src/main.c **** { + 9764 .loc 1 758 19 is_stmt 0 view .LVU3207 + 9765 099e 0023 movs r3, #0 + 758:Src/main.c **** { + 9766 .loc 1 758 5 view .LVU3208 + 9767 09a0 0BE0 b .L418 + 9768 .LVL772: + 9769 .L419: + 760:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9770 .loc 1 760 6 is_stmt 1 view .LVU3209 + 760:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9771 .loc 1 760 33 is_stmt 0 view .LVU3210 + 9772 09a2 334A ldr r2, .L442+68 + 9773 09a4 32F81320 ldrh r2, [r2, r3, lsl #1] + 760:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9774 .loc 1 760 17 view .LVU3211 + 9775 09a8 5900 lsls r1, r3, #1 + 760:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9776 .loc 1 760 21 view .LVU3212 + 9777 09aa 3648 ldr r0, .L442+88 + 9778 09ac 00F81320 strb r2, [r0, r3, lsl #1] + 761:Src/main.c **** } + 9779 .loc 1 761 6 is_stmt 1 view .LVU3213 + 761:Src/main.c **** } + 9780 .loc 1 761 19 is_stmt 0 view .LVU3214 + 9781 09b0 0131 adds r1, r1, #1 + 761:Src/main.c **** } + 9782 .loc 1 761 23 view .LVU3215 + 9783 09b2 120A lsrs r2, r2, #8 + 9784 09b4 4254 strb r2, [r0, r1] + ARM GAS /tmp/ccyYWdjY.s page 561 - 9785 09b2 0023 movs r3, #0 - 756:Src/main.c **** { - 9786 .loc 1 756 5 view .LVU3218 - 9787 09b4 0BE0 b .L418 - 9788 .LVL772: - 9789 .L419: - 758:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9790 .loc 1 758 6 is_stmt 1 view .LVU3219 - 758:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9791 .loc 1 758 33 is_stmt 0 view .LVU3220 - 9792 09b6 334A ldr r2, .L442+68 - 9793 09b8 32F81320 ldrh r2, [r2, r3, lsl #1] - 758:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9794 .loc 1 758 17 view .LVU3221 - 9795 09bc 5900 lsls r1, r3, #1 - 758:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9796 .loc 1 758 21 view .LVU3222 - 9797 09be 3648 ldr r0, .L442+88 - 9798 09c0 00F81320 strb r2, [r0, r3, lsl #1] - 759:Src/main.c **** } - 9799 .loc 1 759 6 is_stmt 1 view .LVU3223 - 759:Src/main.c **** } - 9800 .loc 1 759 19 is_stmt 0 view .LVU3224 - 9801 09c4 0131 adds r1, r1, #1 - 759:Src/main.c **** } - 9802 .loc 1 759 23 view .LVU3225 - 9803 09c6 120A lsrs r2, r2, #8 - 9804 09c8 4254 strb r2, [r0, r1] - 756:Src/main.c **** { - 9805 .loc 1 756 38 is_stmt 1 discriminator 3 view .LVU3226 - 9806 09ca 0133 adds r3, r3, #1 - 9807 .LVL773: - 756:Src/main.c **** { - 9808 .loc 1 756 38 is_stmt 0 discriminator 3 view .LVU3227 - 9809 09cc 9BB2 uxth r3, r3 - 9810 .LVL774: - 9811 .L418: - 756:Src/main.c **** { - 9812 .loc 1 756 28 is_stmt 1 discriminator 1 view .LVU3228 - 9813 09ce 0E2B cmp r3, #14 - 9814 09d0 F1D9 bls .L419 - 9815 .LBE578: - 766:Src/main.c **** UART_transmission_request = NO_MESS; - 9816 .loc 1 766 5 view .LVU3229 - 9817 09d2 1E20 movs r0, #30 - 9818 09d4 FFF7FEFF bl USART_TX_DMA - 9819 .LVL775: - 767:Src/main.c **** break; - 9820 .loc 1 767 5 view .LVU3230 - 767:Src/main.c **** break; - 9821 .loc 1 767 31 is_stmt 0 view .LVU3231 - 9822 09d8 304B ldr r3, .L442+92 - 9823 09da 0022 movs r2, #0 - 9824 09dc 1A70 strb r2, [r3] - 768:Src/main.c **** case MESS_03://Transmith saved packet - 9825 .loc 1 768 4 is_stmt 1 view .LVU3232 - 9826 09de FFF7A4BB b .L417 - ARM GAS /tmp/ccfIOqv2.s page 562 + 758:Src/main.c **** { + 9785 .loc 1 758 38 is_stmt 1 discriminator 3 view .LVU3216 + 9786 09b6 0133 adds r3, r3, #1 + 9787 .LVL773: + 758:Src/main.c **** { + 9788 .loc 1 758 38 is_stmt 0 discriminator 3 view .LVU3217 + 9789 09b8 9BB2 uxth r3, r3 + 9790 .LVL774: + 9791 .L418: + 758:Src/main.c **** { + 9792 .loc 1 758 28 is_stmt 1 discriminator 1 view .LVU3218 + 9793 09ba 0E2B cmp r3, #14 + 9794 09bc F1D9 bls .L419 + 9795 .LBE578: + 768:Src/main.c **** UART_transmission_request = NO_MESS; + 9796 .loc 1 768 5 view .LVU3219 + 9797 09be 1E20 movs r0, #30 + 9798 09c0 FFF7FEFF bl USART_TX_DMA + 9799 .LVL775: + 769:Src/main.c **** break; + 9800 .loc 1 769 5 view .LVU3220 + 769:Src/main.c **** break; + 9801 .loc 1 769 31 is_stmt 0 view .LVU3221 + 9802 09c4 304B ldr r3, .L442+92 + 9803 09c6 0022 movs r2, #0 + 9804 09c8 1A70 strb r2, [r3] + 770:Src/main.c **** case MESS_03://Transmith saved packet + 9805 .loc 1 770 4 is_stmt 1 view .LVU3222 + 9806 09ca FFF7A6BB b .L417 + 9807 .LVL776: + 9808 .L420: + 9809 .LBB579: + 774:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9810 .loc 1 774 6 view .LVU3223 + 774:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9811 .loc 1 774 33 is_stmt 0 view .LVU3224 + 9812 09ce 284A ldr r2, .L442+68 + 9813 09d0 32F81320 ldrh r2, [r2, r3, lsl #1] + 774:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9814 .loc 1 774 17 view .LVU3225 + 9815 09d4 5900 lsls r1, r3, #1 + 774:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; + 9816 .loc 1 774 21 view .LVU3226 + 9817 09d6 2B48 ldr r0, .L442+88 + 9818 09d8 00F81320 strb r2, [r0, r3, lsl #1] + 775:Src/main.c **** } + 9819 .loc 1 775 6 is_stmt 1 view .LVU3227 + 775:Src/main.c **** } + 9820 .loc 1 775 19 is_stmt 0 view .LVU3228 + 9821 09dc 0131 adds r1, r1, #1 + 775:Src/main.c **** } + 9822 .loc 1 775 23 view .LVU3229 + 9823 09de 120A lsrs r2, r2, #8 + 9824 09e0 4254 strb r2, [r0, r1] + 772:Src/main.c **** { + 9825 .loc 1 772 38 is_stmt 1 discriminator 3 view .LVU3230 + 9826 09e2 0133 adds r3, r3, #1 + ARM GAS /tmp/ccyYWdjY.s page 562 - 9827 .LVL776: - 9828 .L420: - 9829 .LBB579: - 772:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9830 .loc 1 772 6 view .LVU3233 - 772:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9831 .loc 1 772 33 is_stmt 0 view .LVU3234 - 9832 09e2 284A ldr r2, .L442+68 - 9833 09e4 32F81320 ldrh r2, [r2, r3, lsl #1] - 772:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9834 .loc 1 772 17 view .LVU3235 - 9835 09e8 5900 lsls r1, r3, #1 - 772:Src/main.c **** UART_DATA[i*2+1] = (Long_Data[i]>>8)&0xff; - 9836 .loc 1 772 21 view .LVU3236 - 9837 09ea 2B48 ldr r0, .L442+88 - 9838 09ec 00F81320 strb r2, [r0, r3, lsl #1] - 773:Src/main.c **** } - 9839 .loc 1 773 6 is_stmt 1 view .LVU3237 - 773:Src/main.c **** } - 9840 .loc 1 773 19 is_stmt 0 view .LVU3238 - 9841 09f0 0131 adds r1, r1, #1 - 773:Src/main.c **** } - 9842 .loc 1 773 23 view .LVU3239 - 9843 09f2 120A lsrs r2, r2, #8 - 9844 09f4 4254 strb r2, [r0, r1] - 770:Src/main.c **** { - 9845 .loc 1 770 38 is_stmt 1 discriminator 3 view .LVU3240 - 9846 09f6 0133 adds r3, r3, #1 - 9847 .LVL777: - 770:Src/main.c **** { - 9848 .loc 1 770 38 is_stmt 0 discriminator 3 view .LVU3241 - 9849 09f8 9BB2 uxth r3, r3 - 9850 .LVL778: - 9851 .L416: - 770:Src/main.c **** { - 9852 .loc 1 770 28 is_stmt 1 discriminator 1 view .LVU3242 - 9853 09fa 0E2B cmp r3, #14 - 9854 09fc F1D9 bls .L420 - 9855 .LBE579: - 779:Src/main.c **** UART_transmission_request = NO_MESS; - 9856 .loc 1 779 5 view .LVU3243 - 9857 09fe 1E20 movs r0, #30 - 9858 0a00 FFF7FEFF bl USART_TX_DMA - 9859 .LVL779: - 780:Src/main.c **** break; - 9860 .loc 1 780 5 view .LVU3244 - 780:Src/main.c **** break; - 9861 .loc 1 780 31 is_stmt 0 view .LVU3245 - 9862 0a04 254B ldr r3, .L442+92 - 9863 0a06 0022 movs r2, #0 - 9864 0a08 1A70 strb r2, [r3] - 781:Src/main.c **** } - 9865 .loc 1 781 4 is_stmt 1 view .LVU3246 - 9866 0a0a FFF78EBB b .L417 - 9867 .LVL780: - 9868 .L422: - 741:Src/main.c **** { - ARM GAS /tmp/ccfIOqv2.s page 563 + 9827 .LVL777: + 772:Src/main.c **** { + 9828 .loc 1 772 38 is_stmt 0 discriminator 3 view .LVU3231 + 9829 09e4 9BB2 uxth r3, r3 + 9830 .LVL778: + 9831 .L416: + 772:Src/main.c **** { + 9832 .loc 1 772 28 is_stmt 1 discriminator 1 view .LVU3232 + 9833 09e6 0E2B cmp r3, #14 + 9834 09e8 F1D9 bls .L420 + 9835 .LBE579: + 781:Src/main.c **** UART_transmission_request = NO_MESS; + 9836 .loc 1 781 5 view .LVU3233 + 9837 09ea 1E20 movs r0, #30 + 9838 09ec FFF7FEFF bl USART_TX_DMA + 9839 .LVL779: + 782:Src/main.c **** break; + 9840 .loc 1 782 5 view .LVU3234 + 782:Src/main.c **** break; + 9841 .loc 1 782 31 is_stmt 0 view .LVU3235 + 9842 09f0 254B ldr r3, .L442+92 + 9843 09f2 0022 movs r2, #0 + 9844 09f4 1A70 strb r2, [r3] + 783:Src/main.c **** } + 9845 .loc 1 783 4 is_stmt 1 view .LVU3236 + 9846 09f6 FFF790BB b .L417 + 9847 .LVL780: + 9848 .L422: + 743:Src/main.c **** { + 9849 .loc 1 743 3 is_stmt 0 view .LVU3237 + 9850 09fa 0023 movs r3, #0 + 9851 09fc F3E7 b .L416 + 9852 .L425: + 785:Src/main.c **** { + 9853 .loc 1 785 28 discriminator 1 view .LVU3238 + 9854 09fe 1D4B ldr r3, .L442+72 + 9855 0a00 1B68 ldr r3, [r3] + 9856 0a02 224A ldr r2, .L442+96 + 9857 0a04 1268 ldr r2, [r2] + 9858 0a06 9B1A subs r3, r3, r2 + 785:Src/main.c **** { + 9859 .loc 1 785 21 discriminator 1 view .LVU3239 + 9860 0a08 642B cmp r3, #100 + 9861 0a0a 7FF68BAB bls .L368 + 787:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 9862 .loc 1 787 4 is_stmt 1 view .LVU3240 + 787:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! + 9863 .loc 1 787 18 is_stmt 0 view .LVU3241 + 9864 0a0e 0022 movs r2, #0 + 9865 0a10 1F4B ldr r3, .L442+100 + 9866 0a12 1A80 strh r2, [r3] @ movhi + 788:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9867 .loc 1 788 4 is_stmt 1 view .LVU3242 + 788:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9868 .loc 1 788 14 is_stmt 0 view .LVU3243 + 9869 0a14 1F49 ldr r1, .L442+104 + 9870 0a16 0B78 ldrb r3, [r1] @ zero_extendqisi2 + ARM GAS /tmp/ccyYWdjY.s page 563 - 9869 .loc 1 741 3 is_stmt 0 view .LVU3247 - 9870 0a0e 0023 movs r3, #0 - 9871 0a10 F3E7 b .L416 - 9872 .L425: - 783:Src/main.c **** { - 9873 .loc 1 783 28 discriminator 1 view .LVU3248 - 9874 0a12 1D4B ldr r3, .L442+72 - 9875 0a14 1B68 ldr r3, [r3] - 9876 0a16 224A ldr r2, .L442+96 - 9877 0a18 1268 ldr r2, [r2] - 9878 0a1a 9B1A subs r3, r3, r2 - 783:Src/main.c **** { - 9879 .loc 1 783 21 discriminator 1 view .LVU3249 - 9880 0a1c 642B cmp r3, #100 - 9881 0a1e 7FF689AB bls .L368 - 785:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9882 .loc 1 785 4 is_stmt 1 view .LVU3250 - 785:Src/main.c **** State_Data[0] |= UART_ERR;//timeout error! - 9883 .loc 1 785 18 is_stmt 0 view .LVU3251 - 9884 0a22 0022 movs r2, #0 - 9885 0a24 1F4B ldr r3, .L442+100 - 9886 0a26 1A80 strh r2, [r3] @ movhi - 786:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9887 .loc 1 786 4 is_stmt 1 view .LVU3252 - 786:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9888 .loc 1 786 14 is_stmt 0 view .LVU3253 - 9889 0a28 1F49 ldr r1, .L442+104 - 9890 0a2a 0B78 ldrb r3, [r1] @ zero_extendqisi2 - 786:Src/main.c **** UART_transmission_request = MESS_01;//Send status - 9891 .loc 1 786 18 view .LVU3254 - 9892 0a2c 43F00203 orr r3, r3, #2 - 9893 0a30 0B70 strb r3, [r1] - 787:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9894 .loc 1 787 4 is_stmt 1 view .LVU3255 - 787:Src/main.c **** flg_tmt = 0;//Reset timeout flag - 9895 .loc 1 787 30 is_stmt 0 view .LVU3256 - 9896 0a32 1A4B ldr r3, .L442+92 - 9897 0a34 0121 movs r1, #1 - 9898 0a36 1970 strb r1, [r3] - 788:Src/main.c **** } - 9899 .loc 1 788 4 is_stmt 1 view .LVU3257 - 788:Src/main.c **** } - 9900 .loc 1 788 12 is_stmt 0 view .LVU3258 - 9901 0a38 1C4B ldr r3, .L442+108 - 9902 0a3a 1A70 strb r2, [r3] - 9903 0a3c FFF77ABB b .L368 - 9904 .L443: - 9905 .align 2 - 9906 .L442: - 9907 0a40 00000000 .word task - 9908 0a44 00000000 .word LD1_param - 9909 0a48 00000000 .word LD2_param - 9910 0a4c 00000000 .word LD1_curr_setup - 9911 0a50 00000000 .word temp16 - 9912 0a54 00000000 .word LD2_curr_setup - 9913 0a58 00000000 .word LD_blinker - 9914 0a5c 00040240 .word 1073873920 - ARM GAS /tmp/ccfIOqv2.s page 564 + 788:Src/main.c **** UART_transmission_request = MESS_01;//Send status + 9871 .loc 1 788 18 view .LVU3244 + 9872 0a18 43F00203 orr r3, r3, #2 + 9873 0a1c 0B70 strb r3, [r1] + 789:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 9874 .loc 1 789 4 is_stmt 1 view .LVU3245 + 789:Src/main.c **** flg_tmt = 0;//Reset timeout flag + 9875 .loc 1 789 30 is_stmt 0 view .LVU3246 + 9876 0a1e 1A4B ldr r3, .L442+92 + 9877 0a20 0121 movs r1, #1 + 9878 0a22 1970 strb r1, [r3] + 790:Src/main.c **** } + 9879 .loc 1 790 4 is_stmt 1 view .LVU3247 + 790:Src/main.c **** } + 9880 .loc 1 790 12 is_stmt 0 view .LVU3248 + 9881 0a24 1C4B ldr r3, .L442+108 + 9882 0a26 1A70 strb r2, [r3] + 9883 0a28 FFF77CBB b .L368 + 9884 .L443: + 9885 .align 2 + 9886 .L442: + 9887 0a2c 00000000 .word task + 9888 0a30 00000000 .word LD1_param + 9889 0a34 00000000 .word LD2_param + 9890 0a38 00000000 .word LD1_curr_setup + 9891 0a3c 00000000 .word temp16 + 9892 0a40 00000000 .word LD2_curr_setup + 9893 0a44 00000000 .word LD_blinker + 9894 0a48 00040240 .word 1073873920 + 9895 0a4c 00040140 .word 1073808384 + 9896 0a50 00000000 .word htim8 + 9897 0a54 000C0240 .word 1073875968 + 9898 0a58 00000000 .word htim10 + 9899 0a5c 00000000 .word TIM10_coflag + 9900 0a60 00000000 .word TO10 + 9901 0a64 00000000 .word TIM10_period + 9902 0a68 00000000 .word TO10_counter + 9903 0a6c 00000000 .word TO7_before + 9904 0a70 00000000 .word Long_Data + 9905 0a74 00000000 .word TO6 + 9906 0a78 00000000 .word TO6_stop + 9907 0a7c 02000000 .word Long_Data+2 + 9908 0a80 00000000 .word CS_result + 9909 0a84 00000000 .word UART_DATA + 9910 0a88 00000000 .word UART_transmission_request + 9911 0a8c 00000000 .word TO6_uart + 9912 0a90 00000000 .word UART_rec_incr + 9913 0a94 00000000 .word State_Data + 9914 0a98 00000000 .word flg_tmt + 9915 .cfi_endproc + 9916 .LFE1186: + 9918 .global task + 9919 .section .bss.task,"aw",%nobits + 9920 .align 2 + 9923 task: + 9924 0000 00000000 .space 52 + 9924 00000000 + ARM GAS /tmp/ccyYWdjY.s page 564 - 9915 0a60 00040140 .word 1073808384 - 9916 0a64 00000000 .word htim8 - 9917 0a68 000C0240 .word 1073875968 - 9918 0a6c 00000000 .word htim10 - 9919 0a70 00000000 .word TIM10_coflag - 9920 0a74 00000000 .word TO10 - 9921 0a78 00000000 .word TIM10_period - 9922 0a7c 00000000 .word TO10_counter - 9923 0a80 00000000 .word TO7_before - 9924 0a84 00000000 .word Long_Data - 9925 0a88 00000000 .word TO6 - 9926 0a8c 00000000 .word TO6_stop - 9927 0a90 02000000 .word Long_Data+2 - 9928 0a94 00000000 .word CS_result - 9929 0a98 00000000 .word UART_DATA - 9930 0a9c 00000000 .word UART_transmission_request - 9931 0aa0 00000000 .word TO6_uart - 9932 0aa4 00000000 .word UART_rec_incr - 9933 0aa8 00000000 .word State_Data - 9934 0aac 00000000 .word flg_tmt - 9935 .cfi_endproc - 9936 .LFE1186: - 9938 .global task - 9939 .section .bss.task,"aw",%nobits - 9940 .align 2 - 9943 task: - 9944 0000 00000000 .space 52 - 9944 00000000 - 9944 00000000 - 9944 00000000 - 9944 00000000 - 9945 .global LD_blinker - 9946 .section .bss.LD_blinker,"aw",%nobits - 9947 .align 2 - 9950 LD_blinker: - 9951 0000 00000000 .space 12 - 9951 00000000 - 9951 00000000 - 9952 .global LD2_param - 9953 .section .bss.LD2_param,"aw",%nobits - 9954 .align 2 - 9957 LD2_param: - 9958 0000 00000000 .space 12 - 9958 00000000 - 9958 00000000 - 9959 .global LD1_param - 9960 .section .bss.LD1_param,"aw",%nobits - 9961 .align 2 - 9964 LD1_param: - 9965 0000 00000000 .space 12 - 9965 00000000 - 9965 00000000 - 9966 .global Def_setup - 9967 .section .bss.Def_setup,"aw",%nobits - 9968 .align 2 - 9971 Def_setup: - 9972 0000 00000000 .space 18 - ARM GAS /tmp/ccfIOqv2.s page 565 + 9924 00000000 + 9924 00000000 + 9924 00000000 + 9925 .global LD_blinker + 9926 .section .bss.LD_blinker,"aw",%nobits + 9927 .align 2 + 9930 LD_blinker: + 9931 0000 00000000 .space 12 + 9931 00000000 + 9931 00000000 + 9932 .global LD2_param + 9933 .section .bss.LD2_param,"aw",%nobits + 9934 .align 2 + 9937 LD2_param: + 9938 0000 00000000 .space 12 + 9938 00000000 + 9938 00000000 + 9939 .global LD1_param + 9940 .section .bss.LD1_param,"aw",%nobits + 9941 .align 2 + 9944 LD1_param: + 9945 0000 00000000 .space 12 + 9945 00000000 + 9945 00000000 + 9946 .global Def_setup + 9947 .section .bss.Def_setup,"aw",%nobits + 9948 .align 2 + 9951 Def_setup: + 9952 0000 00000000 .space 18 + 9952 00000000 + 9952 00000000 + 9952 00000000 + 9952 0000 + 9953 .global Curr_setup + 9954 .section .bss.Curr_setup,"aw",%nobits + 9955 .align 2 + 9958 Curr_setup: + 9959 0000 00000000 .space 18 + 9959 00000000 + 9959 00000000 + 9959 00000000 + 9959 0000 + 9960 .global LD2_def_setup + 9961 .section .bss.LD2_def_setup,"aw",%nobits + 9962 .align 2 + 9965 LD2_def_setup: + 9966 0000 00000000 .space 16 + 9966 00000000 + 9966 00000000 + 9966 00000000 + 9967 .global LD1_def_setup + 9968 .section .bss.LD1_def_setup,"aw",%nobits + 9969 .align 2 + 9972 LD1_def_setup: + 9973 0000 00000000 .space 16 + 9973 00000000 + 9973 00000000 + ARM GAS /tmp/ccyYWdjY.s page 565 - 9972 00000000 - 9972 00000000 - 9972 00000000 - 9972 0000 - 9973 .global Curr_setup - 9974 .section .bss.Curr_setup,"aw",%nobits - 9975 .align 2 - 9978 Curr_setup: - 9979 0000 00000000 .space 18 - 9979 00000000 - 9979 00000000 - 9979 00000000 - 9979 0000 - 9980 .global LD2_def_setup - 9981 .section .bss.LD2_def_setup,"aw",%nobits - 9982 .align 2 - 9985 LD2_def_setup: - 9986 0000 00000000 .space 16 - 9986 00000000 - 9986 00000000 - 9986 00000000 - 9987 .global LD1_def_setup - 9988 .section .bss.LD1_def_setup,"aw",%nobits - 9989 .align 2 - 9992 LD1_def_setup: - 9993 0000 00000000 .space 16 - 9993 00000000 - 9993 00000000 - 9993 00000000 - 9994 .global LD2_curr_setup - 9995 .section .bss.LD2_curr_setup,"aw",%nobits - 9996 .align 2 - 9999 LD2_curr_setup: - 10000 0000 00000000 .space 16 - 10000 00000000 - 10000 00000000 - 10000 00000000 - 10001 .global LD1_curr_setup - 10002 .section .bss.LD1_curr_setup,"aw",%nobits - 10003 .align 2 - 10006 LD1_curr_setup: - 10007 0000 00000000 .space 16 - 10007 00000000 - 10007 00000000 - 10007 00000000 - 10008 .global sizeoffile - 10009 .section .bss.sizeoffile,"aw",%nobits - 10010 .align 2 - 10013 sizeoffile: - 10014 0000 00000000 .space 4 - 10015 .global fgoto - 10016 .section .bss.fgoto,"aw",%nobits + 9973 00000000 + 9974 .global LD2_curr_setup + 9975 .section .bss.LD2_curr_setup,"aw",%nobits + 9976 .align 2 + 9979 LD2_curr_setup: + 9980 0000 00000000 .space 16 + 9980 00000000 + 9980 00000000 + 9980 00000000 + 9981 .global LD1_curr_setup + 9982 .section .bss.LD1_curr_setup,"aw",%nobits + 9983 .align 2 + 9986 LD1_curr_setup: + 9987 0000 00000000 .space 16 + 9987 00000000 + 9987 00000000 + 9987 00000000 + 9988 .global sizeoffile + 9989 .section .bss.sizeoffile,"aw",%nobits + 9990 .align 2 + 9993 sizeoffile: + 9994 0000 00000000 .space 4 + 9995 .global fgoto + 9996 .section .bss.fgoto,"aw",%nobits + 9997 .align 2 + 10000 fgoto: + 10001 0000 00000000 .space 4 + 10002 .global test + 10003 .section .bss.test,"aw",%nobits + 10004 .align 2 + 10007 test: + 10008 0000 00000000 .space 4 + 10009 .global fresult + 10010 .section .bss.fresult,"aw",%nobits + 10013 fresult: + 10014 0000 00 .space 1 + 10015 .global COMMAND + 10016 .section .bss.COMMAND,"aw",%nobits 10017 .align 2 - 10020 fgoto: - 10021 0000 00000000 .space 4 - 10022 .global test - 10023 .section .bss.test,"aw",%nobits - ARM GAS /tmp/ccfIOqv2.s page 566 - - + 10020 COMMAND: + 10021 0000 00000000 .space 30 + 10021 00000000 + 10021 00000000 + 10021 00000000 + 10021 00000000 + 10022 .global Long_Data + 10023 .section .bss.Long_Data,"aw",%nobits 10024 .align 2 - 10027 test: - 10028 0000 00000000 .space 4 - 10029 .global fresult - 10030 .section .bss.fresult,"aw",%nobits - 10033 fresult: - 10034 0000 00 .space 1 - 10035 .global COMMAND - 10036 .section .bss.COMMAND,"aw",%nobits - 10037 .align 2 - 10040 COMMAND: - 10041 0000 00000000 .space 30 - 10041 00000000 - 10041 00000000 - 10041 00000000 - 10041 00000000 - 10042 .global Long_Data - 10043 .section .bss.Long_Data,"aw",%nobits - 10044 .align 2 - 10047 Long_Data: - 10048 0000 00000000 .space 30 - 10048 00000000 - 10048 00000000 - 10048 00000000 - 10048 00000000 - 10049 .global temp16 - 10050 .section .bss.temp16,"aw",%nobits - 10051 .align 1 - 10054 temp16: - 10055 0000 0000 .space 2 - 10056 .global CS_result - 10057 .section .bss.CS_result,"aw",%nobits - 10058 .align 1 - 10061 CS_result: - 10062 0000 0000 .space 2 - 10063 .global UART_header - 10064 .section .bss.UART_header,"aw",%nobits - 10065 .align 1 - 10068 UART_header: - 10069 0000 0000 .space 2 - 10070 .global UART_rec_incr - 10071 .section .bss.UART_rec_incr,"aw",%nobits - 10072 .align 1 - 10075 UART_rec_incr: - 10076 0000 0000 .space 2 - 10077 .global TIM10_coflag - 10078 .section .bss.TIM10_coflag,"aw",%nobits - 10081 TIM10_coflag: - 10082 0000 00 .space 1 - 10083 .global u_rx_flg - 10084 .section .bss.u_rx_flg,"aw",%nobits - 10087 u_rx_flg: - 10088 0000 00 .space 1 - 10089 .global u_tx_flg - 10090 .section .bss.u_tx_flg,"aw",%nobits - 10093 u_tx_flg: - 10094 0000 00 .space 1 - ARM GAS /tmp/ccfIOqv2.s page 567 + 10027 Long_Data: + 10028 0000 00000000 .space 30 + 10028 00000000 + 10028 00000000 + 10028 00000000 + 10028 00000000 + 10029 .global temp16 + 10030 .section .bss.temp16,"aw",%nobits + 10031 .align 1 + ARM GAS /tmp/ccyYWdjY.s page 566 - 10095 .global flg_tmt - 10096 .section .bss.flg_tmt,"aw",%nobits - 10099 flg_tmt: + 10034 temp16: + 10035 0000 0000 .space 2 + 10036 .global CS_result + 10037 .section .bss.CS_result,"aw",%nobits + 10038 .align 1 + 10041 CS_result: + 10042 0000 0000 .space 2 + 10043 .global UART_header + 10044 .section .bss.UART_header,"aw",%nobits + 10045 .align 1 + 10048 UART_header: + 10049 0000 0000 .space 2 + 10050 .global UART_rec_incr + 10051 .section .bss.UART_rec_incr,"aw",%nobits + 10052 .align 1 + 10055 UART_rec_incr: + 10056 0000 0000 .space 2 + 10057 .global TIM10_coflag + 10058 .section .bss.TIM10_coflag,"aw",%nobits + 10061 TIM10_coflag: + 10062 0000 00 .space 1 + 10063 .global u_rx_flg + 10064 .section .bss.u_rx_flg,"aw",%nobits + 10067 u_rx_flg: + 10068 0000 00 .space 1 + 10069 .global u_tx_flg + 10070 .section .bss.u_tx_flg,"aw",%nobits + 10073 u_tx_flg: + 10074 0000 00 .space 1 + 10075 .global flg_tmt + 10076 .section .bss.flg_tmt,"aw",%nobits + 10079 flg_tmt: + 10080 0000 00 .space 1 + 10081 .global UART_DATA + 10082 .section .bss.UART_DATA,"aw",%nobits + 10083 .align 2 + 10086 UART_DATA: + 10087 0000 00000000 .space 30 + 10087 00000000 + 10087 00000000 + 10087 00000000 + 10087 00000000 + 10088 .global State_Data + 10089 .section .bss.State_Data,"aw",%nobits + 10090 .align 2 + 10093 State_Data: + 10094 0000 0000 .space 2 + 10095 .global UART_transmission_request + 10096 .section .bss.UART_transmission_request,"aw",%nobits + 10099 UART_transmission_request: 10100 0000 00 .space 1 - 10101 .global UART_DATA - 10102 .section .bss.UART_DATA,"aw",%nobits - 10103 .align 2 - 10106 UART_DATA: - 10107 0000 00000000 .space 30 - 10107 00000000 - 10107 00000000 - 10107 00000000 - 10107 00000000 - 10108 .global State_Data - 10109 .section .bss.State_Data,"aw",%nobits - 10110 .align 2 - 10113 State_Data: - 10114 0000 0000 .space 2 - 10115 .global UART_transmission_request - 10116 .section .bss.UART_transmission_request,"aw",%nobits - 10119 UART_transmission_request: - 10120 0000 00 .space 1 - 10121 .global CPU_state_old - 10122 .section .bss.CPU_state_old,"aw",%nobits - 10125 CPU_state_old: - 10126 0000 00 .space 1 - 10127 .global CPU_state - 10128 .section .bss.CPU_state,"aw",%nobits - 10131 CPU_state: - 10132 0000 00 .space 1 - 10133 .global uart_buf - 10134 .section .bss.uart_buf,"aw",%nobits - 10137 uart_buf: - 10138 0000 00 .space 1 - 10139 .global TIM10_period - 10140 .section .bss.TIM10_period,"aw",%nobits - 10141 .align 2 - 10144 TIM10_period: - 10145 0000 00000000 .space 4 - 10146 .global TO10_counter - 10147 .section .bss.TO10_counter,"aw",%nobits - 10148 .align 2 - 10151 TO10_counter: - 10152 0000 00000000 .space 4 - 10153 .global TO10 - 10154 .section .bss.TO10,"aw",%nobits - 10155 .align 2 - 10158 TO10: - 10159 0000 00000000 .space 4 - 10160 .global TO7_PID - 10161 .section .bss.TO7_PID,"aw",%nobits - 10162 .align 2 - 10165 TO7_PID: - 10166 0000 00000000 .space 4 - 10167 .global TO7_before - 10168 .section .bss.TO7_before,"aw",%nobits - 10169 .align 2 - ARM GAS /tmp/ccfIOqv2.s page 568 + 10101 .global CPU_state_old + 10102 .section .bss.CPU_state_old,"aw",%nobits + 10105 CPU_state_old: + 10106 0000 00 .space 1 + 10107 .global CPU_state + 10108 .section .bss.CPU_state,"aw",%nobits + ARM GAS /tmp/ccyYWdjY.s page 567 - 10172 TO7_before: - 10173 0000 00000000 .space 4 - 10174 .global TO7 - 10175 .section .bss.TO7,"aw",%nobits - 10176 .align 2 - 10179 TO7: - 10180 0000 00000000 .space 4 - 10181 .global temp32 - 10182 .section .bss.temp32,"aw",%nobits - 10183 .align 2 - 10186 temp32: - 10187 0000 00000000 .space 4 - 10188 .global SD_SLIDE - 10189 .section .bss.SD_SLIDE,"aw",%nobits - 10190 .align 2 - 10193 SD_SLIDE: - 10194 0000 00000000 .space 4 - 10195 .global SD_SEEK - 10196 .section .bss.SD_SEEK,"aw",%nobits - 10197 .align 2 - 10200 SD_SEEK: - 10201 0000 00000000 .space 4 - 10202 .global TO6_uart - 10203 .section .bss.TO6_uart,"aw",%nobits - 10204 .align 2 - 10207 TO6_uart: - 10208 0000 00000000 .space 4 - 10209 .global TO6_stop - 10210 .section .bss.TO6_stop,"aw",%nobits - 10211 .align 2 - 10214 TO6_stop: - 10215 0000 00000000 .space 4 - 10216 .global TO6_before - 10217 .section .bss.TO6_before,"aw",%nobits - 10218 .align 2 - 10221 TO6_before: - 10222 0000 00000000 .space 4 - 10223 .global TO6 - 10224 .section .bss.TO6,"aw",%nobits - 10225 .align 2 - 10228 TO6: - 10229 0000 00000000 .space 4 - 10230 .global huart8 - 10231 .section .bss.huart8,"aw",%nobits - 10232 .align 2 - 10235 huart8: - 10236 0000 00000000 .space 136 - 10236 00000000 - 10236 00000000 - 10236 00000000 - 10236 00000000 - 10237 .global htim11 - 10238 .section .bss.htim11,"aw",%nobits - 10239 .align 2 - 10242 htim11: - 10243 0000 00000000 .space 76 - 10243 00000000 - ARM GAS /tmp/ccfIOqv2.s page 569 + 10111 CPU_state: + 10112 0000 00 .space 1 + 10113 .global uart_buf + 10114 .section .bss.uart_buf,"aw",%nobits + 10117 uart_buf: + 10118 0000 00 .space 1 + 10119 .global TIM10_period + 10120 .section .bss.TIM10_period,"aw",%nobits + 10121 .align 2 + 10124 TIM10_period: + 10125 0000 00000000 .space 4 + 10126 .global TO10_counter + 10127 .section .bss.TO10_counter,"aw",%nobits + 10128 .align 2 + 10131 TO10_counter: + 10132 0000 00000000 .space 4 + 10133 .global TO10 + 10134 .section .bss.TO10,"aw",%nobits + 10135 .align 2 + 10138 TO10: + 10139 0000 00000000 .space 4 + 10140 .global TO7_PID + 10141 .section .bss.TO7_PID,"aw",%nobits + 10142 .align 2 + 10145 TO7_PID: + 10146 0000 00000000 .space 4 + 10147 .global TO7_before + 10148 .section .bss.TO7_before,"aw",%nobits + 10149 .align 2 + 10152 TO7_before: + 10153 0000 00000000 .space 4 + 10154 .global TO7 + 10155 .section .bss.TO7,"aw",%nobits + 10156 .align 2 + 10159 TO7: + 10160 0000 00000000 .space 4 + 10161 .global temp32 + 10162 .section .bss.temp32,"aw",%nobits + 10163 .align 2 + 10166 temp32: + 10167 0000 00000000 .space 4 + 10168 .global SD_SLIDE + 10169 .section .bss.SD_SLIDE,"aw",%nobits + 10170 .align 2 + 10173 SD_SLIDE: + 10174 0000 00000000 .space 4 + 10175 .global SD_SEEK + 10176 .section .bss.SD_SEEK,"aw",%nobits + 10177 .align 2 + 10180 SD_SEEK: + 10181 0000 00000000 .space 4 + 10182 .global TO6_uart + 10183 .section .bss.TO6_uart,"aw",%nobits + 10184 .align 2 + 10187 TO6_uart: + 10188 0000 00000000 .space 4 + 10189 .global TO6_stop + ARM GAS /tmp/ccyYWdjY.s page 568 - 10243 00000000 - 10243 00000000 - 10243 00000000 - 10244 .global htim10 - 10245 .section .bss.htim10,"aw",%nobits - 10246 .align 2 - 10249 htim10: - 10250 0000 00000000 .space 76 - 10250 00000000 - 10250 00000000 - 10250 00000000 - 10250 00000000 - 10251 .global htim8 - 10252 .section .bss.htim8,"aw",%nobits - 10253 .align 2 - 10256 htim8: - 10257 0000 00000000 .space 76 - 10257 00000000 - 10257 00000000 - 10257 00000000 - 10257 00000000 - 10258 .global htim4 - 10259 .section .bss.htim4,"aw",%nobits - 10260 .align 2 - 10263 htim4: - 10264 0000 00000000 .space 76 - 10264 00000000 - 10264 00000000 - 10264 00000000 - 10264 00000000 - 10265 .global hsd1 - 10266 .section .bss.hsd1,"aw",%nobits - 10267 .align 2 - 10270 hsd1: - 10271 0000 00000000 .space 132 - 10271 00000000 - 10271 00000000 - 10271 00000000 - 10271 00000000 - 10272 .global hadc3 - 10273 .section .bss.hadc3,"aw",%nobits - 10274 .align 2 - 10277 hadc3: - 10278 0000 00000000 .space 72 - 10278 00000000 - 10278 00000000 - 10278 00000000 - 10278 00000000 - 10279 .global hadc1 - 10280 .section .bss.hadc1,"aw",%nobits - 10281 .align 2 - 10284 hadc1: - 10285 0000 00000000 .space 72 - 10285 00000000 - 10285 00000000 - 10285 00000000 - 10285 00000000 - ARM GAS /tmp/ccfIOqv2.s page 570 + 10190 .section .bss.TO6_stop,"aw",%nobits + 10191 .align 2 + 10194 TO6_stop: + 10195 0000 00000000 .space 4 + 10196 .global TO6_before + 10197 .section .bss.TO6_before,"aw",%nobits + 10198 .align 2 + 10201 TO6_before: + 10202 0000 00000000 .space 4 + 10203 .global TO6 + 10204 .section .bss.TO6,"aw",%nobits + 10205 .align 2 + 10208 TO6: + 10209 0000 00000000 .space 4 + 10210 .global huart8 + 10211 .section .bss.huart8,"aw",%nobits + 10212 .align 2 + 10215 huart8: + 10216 0000 00000000 .space 136 + 10216 00000000 + 10216 00000000 + 10216 00000000 + 10216 00000000 + 10217 .global htim11 + 10218 .section .bss.htim11,"aw",%nobits + 10219 .align 2 + 10222 htim11: + 10223 0000 00000000 .space 76 + 10223 00000000 + 10223 00000000 + 10223 00000000 + 10223 00000000 + 10224 .global htim10 + 10225 .section .bss.htim10,"aw",%nobits + 10226 .align 2 + 10229 htim10: + 10230 0000 00000000 .space 76 + 10230 00000000 + 10230 00000000 + 10230 00000000 + 10230 00000000 + 10231 .global htim8 + 10232 .section .bss.htim8,"aw",%nobits + 10233 .align 2 + 10236 htim8: + 10237 0000 00000000 .space 76 + 10237 00000000 + 10237 00000000 + 10237 00000000 + 10237 00000000 + 10238 .global htim4 + 10239 .section .bss.htim4,"aw",%nobits + 10240 .align 2 + 10243 htim4: + 10244 0000 00000000 .space 76 + 10244 00000000 + 10244 00000000 + ARM GAS /tmp/ccyYWdjY.s page 569 - 10286 .text - 10287 .Letext0: - 10288 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" - 10289 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" - 10290 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" - 10291 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" - 10292 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" - 10293 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" - 10294 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" - 10295 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" - 10296 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" - 10297 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" - 10298 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" - 10299 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" - 10300 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" - 10301 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" - 10302 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" - 10303 .file 24 "Inc/main.h" - 10304 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" - 10305 .file 26 "Inc/File_Handling.h" - 10306 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" - 10307 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" - 10308 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" - 10309 .file 30 "Inc/fatfs.h" - 10310 .file 31 "" - ARM GAS /tmp/ccfIOqv2.s page 571 + 10244 00000000 + 10244 00000000 + 10245 .global hsd1 + 10246 .section .bss.hsd1,"aw",%nobits + 10247 .align 2 + 10250 hsd1: + 10251 0000 00000000 .space 132 + 10251 00000000 + 10251 00000000 + 10251 00000000 + 10251 00000000 + 10252 .global hadc3 + 10253 .section .bss.hadc3,"aw",%nobits + 10254 .align 2 + 10257 hadc3: + 10258 0000 00000000 .space 72 + 10258 00000000 + 10258 00000000 + 10258 00000000 + 10258 00000000 + 10259 .global hadc1 + 10260 .section .bss.hadc1,"aw",%nobits + 10261 .align 2 + 10264 hadc1: + 10265 0000 00000000 .space 72 + 10265 00000000 + 10265 00000000 + 10265 00000000 + 10265 00000000 + 10266 .text + 10267 .Letext0: + 10268 .file 9 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f767xx.h" + 10269 .file 10 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" + 10270 .file 11 "Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f7xx.h" + 10271 .file 12 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_def.h" + 10272 .file 13 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc_ex.h" + 10273 .file 14 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_rcc.h" + 10274 .file 15 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_gpio.h" + 10275 .file 16 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_dma.h" + 10276 .file 17 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_adc.h" + 10277 .file 18 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_sdmmc.h" + 10278 .file 19 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sd.h" + 10279 .file 20 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim.h" + 10280 .file 21 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_uart.h" + 10281 .file 22 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" + 10282 .file 23 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_gpio.h" + 10283 .file 24 "Inc/main.h" + 10284 .file 25 "Middlewares/Third_Party/FatFs/src/ff.h" + 10285 .file 26 "Inc/File_Handling.h" + 10286 .file 27 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_tim_ex.h" + 10287 .file 28 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_pwr_ex.h" + 10288 .file 29 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal.h" + 10289 .file 30 "Inc/fatfs.h" + 10290 .file 31 "" + ARM GAS /tmp/ccyYWdjY.s page 570 DEFINED SYMBOLS *ABS*:00000000 main.c - /tmp/ccfIOqv2.s:20 .text.NVIC_EncodePriority:00000000 $t - /tmp/ccfIOqv2.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority - /tmp/ccfIOqv2.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t - /tmp/ccfIOqv2.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init - /tmp/ccfIOqv2.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d - /tmp/ccfIOqv2.s:10270 .bss.hsd1:00000000 hsd1 - /tmp/ccfIOqv2.s:137 .text.MX_DMA_Init:00000000 $t - /tmp/ccfIOqv2.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init - /tmp/ccfIOqv2.s:238 .text.MX_DMA_Init:0000003c $d - /tmp/ccfIOqv2.s:245 .text.Decode_task:00000000 $t - /tmp/ccfIOqv2.s:250 .text.Decode_task:00000000 Decode_task - /tmp/ccfIOqv2.s:527 .text.Decode_task:00000150 $d - /tmp/ccfIOqv2.s:9943 .bss.task:00000000 task - /tmp/ccfIOqv2.s:10151 .bss.TO10_counter:00000000 TO10_counter - /tmp/ccfIOqv2.s:537 .text.PID_Controller_Temp:00000000 $t - /tmp/ccfIOqv2.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp - /tmp/ccfIOqv2.s:711 .text.PID_Controller_Temp:000000cc $d - /tmp/ccfIOqv2.s:10179 .bss.TO7:00000000 TO7 - /tmp/ccfIOqv2.s:10165 .bss.TO7_PID:00000000 TO7_PID - /tmp/ccfIOqv2.s:721 .text.OUT_trigger:00000000 $t - /tmp/ccfIOqv2.s:726 .text.OUT_trigger:00000000 OUT_trigger - /tmp/ccfIOqv2.s:744 .text.OUT_trigger:0000000a $d - /tmp/ccfIOqv2.s:754 .text.OUT_trigger:00000014 $t - /tmp/ccfIOqv2.s:950 .text.OUT_trigger:0000011c $d - /tmp/ccfIOqv2.s:956 .text.MPhD_T:00000000 $t - /tmp/ccfIOqv2.s:961 .text.MPhD_T:00000000 MPhD_T - /tmp/ccfIOqv2.s:1045 .text.MPhD_T:00000056 $d - /tmp/ccfIOqv2.s:1049 .text.MPhD_T:0000005a $t - /tmp/ccfIOqv2.s:1593 .text.MPhD_T:00000210 $d - /tmp/ccfIOqv2.s:1603 .text.Stop_TIM10:00000000 $t - /tmp/ccfIOqv2.s:1608 .text.Stop_TIM10:00000000 Stop_TIM10 - /tmp/ccfIOqv2.s:1637 .text.Stop_TIM10:00000014 $d - /tmp/ccfIOqv2.s:10249 .bss.htim10:00000000 htim10 - /tmp/ccfIOqv2.s:10081 .bss.TIM10_coflag:00000000 TIM10_coflag - /tmp/ccfIOqv2.s:10158 .bss.TO10:00000000 TO10 - /tmp/ccfIOqv2.s:1644 .text.MX_GPIO_Init:00000000 $t - /tmp/ccfIOqv2.s:1649 .text.MX_GPIO_Init:00000000 MX_GPIO_Init - /tmp/ccfIOqv2.s:2098 .text.MX_GPIO_Init:00000228 $d - /tmp/ccfIOqv2.s:2110 .text.MX_SPI4_Init:00000000 $t - /tmp/ccfIOqv2.s:2115 .text.MX_SPI4_Init:00000000 MX_SPI4_Init - /tmp/ccfIOqv2.s:2320 .text.MX_SPI4_Init:000000c8 $d - /tmp/ccfIOqv2.s:2327 .text.MX_SPI2_Init:00000000 $t - /tmp/ccfIOqv2.s:2332 .text.MX_SPI2_Init:00000000 MX_SPI2_Init - /tmp/ccfIOqv2.s:2537 .text.MX_SPI2_Init:000000c4 $d - /tmp/ccfIOqv2.s:2544 .text.MX_SPI5_Init:00000000 $t - /tmp/ccfIOqv2.s:2549 .text.MX_SPI5_Init:00000000 MX_SPI5_Init - /tmp/ccfIOqv2.s:2754 .text.MX_SPI5_Init:000000c4 $d - /tmp/ccfIOqv2.s:2761 .text.MX_SPI6_Init:00000000 $t - /tmp/ccfIOqv2.s:2766 .text.MX_SPI6_Init:00000000 MX_SPI6_Init - /tmp/ccfIOqv2.s:2971 .text.MX_SPI6_Init:000000c4 $d - /tmp/ccfIOqv2.s:2978 .text.MX_TIM2_Init:00000000 $t - /tmp/ccfIOqv2.s:2983 .text.MX_TIM2_Init:00000000 MX_TIM2_Init - /tmp/ccfIOqv2.s:3161 .text.MX_TIM2_Init:00000088 $d - /tmp/ccfIOqv2.s:3170 .text.MX_TIM5_Init:00000000 $t - /tmp/ccfIOqv2.s:3175 .text.MX_TIM5_Init:00000000 MX_TIM5_Init - ARM GAS /tmp/ccfIOqv2.s page 572 + /tmp/ccyYWdjY.s:20 .text.NVIC_EncodePriority:00000000 $t + /tmp/ccyYWdjY.s:25 .text.NVIC_EncodePriority:00000000 NVIC_EncodePriority + /tmp/ccyYWdjY.s:88 .text.MX_SDMMC1_SD_Init:00000000 $t + /tmp/ccyYWdjY.s:93 .text.MX_SDMMC1_SD_Init:00000000 MX_SDMMC1_SD_Init + /tmp/ccyYWdjY.s:131 .text.MX_SDMMC1_SD_Init:0000001c $d + /tmp/ccyYWdjY.s:10250 .bss.hsd1:00000000 hsd1 + /tmp/ccyYWdjY.s:137 .text.MX_DMA_Init:00000000 $t + /tmp/ccyYWdjY.s:142 .text.MX_DMA_Init:00000000 MX_DMA_Init + /tmp/ccyYWdjY.s:238 .text.MX_DMA_Init:0000003c $d + /tmp/ccyYWdjY.s:245 .text.Decode_task:00000000 $t + /tmp/ccyYWdjY.s:250 .text.Decode_task:00000000 Decode_task + /tmp/ccyYWdjY.s:527 .text.Decode_task:00000150 $d + /tmp/ccyYWdjY.s:9923 .bss.task:00000000 task + /tmp/ccyYWdjY.s:10131 .bss.TO10_counter:00000000 TO10_counter + /tmp/ccyYWdjY.s:537 .text.PID_Controller_Temp:00000000 $t + /tmp/ccyYWdjY.s:542 .text.PID_Controller_Temp:00000000 PID_Controller_Temp + /tmp/ccyYWdjY.s:711 .text.PID_Controller_Temp:000000cc $d + /tmp/ccyYWdjY.s:10159 .bss.TO7:00000000 TO7 + /tmp/ccyYWdjY.s:10145 .bss.TO7_PID:00000000 TO7_PID + /tmp/ccyYWdjY.s:721 .text.OUT_trigger:00000000 $t + /tmp/ccyYWdjY.s:726 .text.OUT_trigger:00000000 OUT_trigger + /tmp/ccyYWdjY.s:744 .text.OUT_trigger:0000000a $d + /tmp/ccyYWdjY.s:754 .text.OUT_trigger:00000014 $t + /tmp/ccyYWdjY.s:950 .text.OUT_trigger:0000011c $d + /tmp/ccyYWdjY.s:956 .text.MPhD_T:00000000 $t + /tmp/ccyYWdjY.s:961 .text.MPhD_T:00000000 MPhD_T + /tmp/ccyYWdjY.s:1045 .text.MPhD_T:00000056 $d + /tmp/ccyYWdjY.s:1049 .text.MPhD_T:0000005a $t + /tmp/ccyYWdjY.s:1593 .text.MPhD_T:00000210 $d + /tmp/ccyYWdjY.s:1603 .text.Stop_TIM10:00000000 $t + /tmp/ccyYWdjY.s:1608 .text.Stop_TIM10:00000000 Stop_TIM10 + /tmp/ccyYWdjY.s:1637 .text.Stop_TIM10:00000014 $d + /tmp/ccyYWdjY.s:10229 .bss.htim10:00000000 htim10 + /tmp/ccyYWdjY.s:10061 .bss.TIM10_coflag:00000000 TIM10_coflag + /tmp/ccyYWdjY.s:10138 .bss.TO10:00000000 TO10 + /tmp/ccyYWdjY.s:1644 .text.MX_GPIO_Init:00000000 $t + /tmp/ccyYWdjY.s:1649 .text.MX_GPIO_Init:00000000 MX_GPIO_Init + /tmp/ccyYWdjY.s:2098 .text.MX_GPIO_Init:00000228 $d + /tmp/ccyYWdjY.s:2110 .text.MX_SPI4_Init:00000000 $t + /tmp/ccyYWdjY.s:2115 .text.MX_SPI4_Init:00000000 MX_SPI4_Init + /tmp/ccyYWdjY.s:2320 .text.MX_SPI4_Init:000000c8 $d + /tmp/ccyYWdjY.s:2327 .text.MX_SPI2_Init:00000000 $t + /tmp/ccyYWdjY.s:2332 .text.MX_SPI2_Init:00000000 MX_SPI2_Init + /tmp/ccyYWdjY.s:2537 .text.MX_SPI2_Init:000000c4 $d + /tmp/ccyYWdjY.s:2544 .text.MX_SPI5_Init:00000000 $t + /tmp/ccyYWdjY.s:2549 .text.MX_SPI5_Init:00000000 MX_SPI5_Init + /tmp/ccyYWdjY.s:2754 .text.MX_SPI5_Init:000000c4 $d + /tmp/ccyYWdjY.s:2761 .text.MX_SPI6_Init:00000000 $t + /tmp/ccyYWdjY.s:2766 .text.MX_SPI6_Init:00000000 MX_SPI6_Init + /tmp/ccyYWdjY.s:2971 .text.MX_SPI6_Init:000000c4 $d + /tmp/ccyYWdjY.s:2978 .text.MX_TIM2_Init:00000000 $t + /tmp/ccyYWdjY.s:2983 .text.MX_TIM2_Init:00000000 MX_TIM2_Init + /tmp/ccyYWdjY.s:3161 .text.MX_TIM2_Init:00000088 $d + /tmp/ccyYWdjY.s:3170 .text.MX_TIM5_Init:00000000 $t + /tmp/ccyYWdjY.s:3175 .text.MX_TIM5_Init:00000000 MX_TIM5_Init + ARM GAS /tmp/ccyYWdjY.s page 571 - /tmp/ccfIOqv2.s:3352 .text.MX_TIM5_Init:00000084 $d - /tmp/ccfIOqv2.s:3361 .text.MX_TIM7_Init:00000000 $t - /tmp/ccfIOqv2.s:3366 .text.MX_TIM7_Init:00000000 MX_TIM7_Init - /tmp/ccfIOqv2.s:3527 .text.MX_TIM7_Init:0000007c $d - /tmp/ccfIOqv2.s:3535 .text.MX_TIM6_Init:00000000 $t - /tmp/ccfIOqv2.s:3540 .text.MX_TIM6_Init:00000000 MX_TIM6_Init - /tmp/ccfIOqv2.s:3701 .text.MX_TIM6_Init:0000007c $d - /tmp/ccfIOqv2.s:3709 .rodata.Init_params.str1.4:00000000 $d - /tmp/ccfIOqv2.s:3716 .text.Init_params:00000000 $t - /tmp/ccfIOqv2.s:3721 .text.Init_params:00000000 Init_params - /tmp/ccfIOqv2.s:4355 .text.Init_params:00000280 $d - /tmp/ccfIOqv2.s:10228 .bss.TO6:00000000 TO6 - /tmp/ccfIOqv2.s:10172 .bss.TO7_before:00000000 TO7_before - /tmp/ccfIOqv2.s:10221 .bss.TO6_before:00000000 TO6_before - /tmp/ccfIOqv2.s:10207 .bss.TO6_uart:00000000 TO6_uart - /tmp/ccfIOqv2.s:10099 .bss.flg_tmt:00000000 flg_tmt - /tmp/ccfIOqv2.s:10075 .bss.UART_rec_incr:00000000 UART_rec_incr - /tmp/ccfIOqv2.s:10020 .bss.fgoto:00000000 fgoto - /tmp/ccfIOqv2.s:10013 .bss.sizeoffile:00000000 sizeoffile - /tmp/ccfIOqv2.s:10093 .bss.u_tx_flg:00000000 u_tx_flg - /tmp/ccfIOqv2.s:10087 .bss.u_rx_flg:00000000 u_rx_flg - /tmp/ccfIOqv2.s:10047 .bss.Long_Data:00000000 Long_Data - /tmp/ccfIOqv2.s:9971 .bss.Def_setup:00000000 Def_setup - /tmp/ccfIOqv2.s:9992 .bss.LD1_def_setup:00000000 LD1_def_setup - /tmp/ccfIOqv2.s:9985 .bss.LD2_def_setup:00000000 LD2_def_setup - /tmp/ccfIOqv2.s:9978 .bss.Curr_setup:00000000 Curr_setup - /tmp/ccfIOqv2.s:10006 .bss.LD1_curr_setup:00000000 LD1_curr_setup - /tmp/ccfIOqv2.s:9999 .bss.LD2_curr_setup:00000000 LD2_curr_setup - /tmp/ccfIOqv2.s:10106 .bss.UART_DATA:00000000 UART_DATA - /tmp/ccfIOqv2.s:10200 .bss.SD_SEEK:00000000 SD_SEEK - /tmp/ccfIOqv2.s:10193 .bss.SD_SLIDE:00000000 SD_SLIDE - /tmp/ccfIOqv2.s:10027 .bss.test:00000000 test - /tmp/ccfIOqv2.s:10131 .bss.CPU_state:00000000 CPU_state - /tmp/ccfIOqv2.s:10040 .bss.COMMAND:00000000 COMMAND - /tmp/ccfIOqv2.s:4394 .text.Get_ADC:00000000 $t - /tmp/ccfIOqv2.s:4399 .text.Get_ADC:00000000 Get_ADC - /tmp/ccfIOqv2.s:4419 .text.Get_ADC:0000000c $d - /tmp/ccfIOqv2.s:4425 .text.Get_ADC:00000012 $t - /tmp/ccfIOqv2.s:4523 .text.Get_ADC:00000068 $d - /tmp/ccfIOqv2.s:10284 .bss.hadc1:00000000 hadc1 - /tmp/ccfIOqv2.s:10277 .bss.hadc3:00000000 hadc3 - /tmp/ccfIOqv2.s:4529 .text.Set_LTEC:00000000 $t - /tmp/ccfIOqv2.s:4535 .text.Set_LTEC:00000000 Set_LTEC - /tmp/ccfIOqv2.s:4560 .text.Set_LTEC:0000000e $d - /tmp/ccfIOqv2.s:4564 .text.Set_LTEC:00000012 $t - /tmp/ccfIOqv2.s:4976 .text.Set_LTEC:00000148 $d - /tmp/ccfIOqv2.s:4984 .text.Decode_uart:00000000 $t - /tmp/ccfIOqv2.s:4989 .text.Decode_uart:00000000 Decode_uart - /tmp/ccfIOqv2.s:5552 .text.Decode_uart:000002cc $d - /tmp/ccfIOqv2.s:5567 .text.Advanced_Controller_Temp:00000000 $t - /tmp/ccfIOqv2.s:5573 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp - /tmp/ccfIOqv2.s:5742 .text.Advanced_Controller_Temp:000000cc $d - /tmp/ccfIOqv2.s:5752 .text.CalculateChecksum:00000000 $t - /tmp/ccfIOqv2.s:5758 .text.CalculateChecksum:00000000 CalculateChecksum - /tmp/ccfIOqv2.s:5803 .text.CheckChecksum:00000000 $t - /tmp/ccfIOqv2.s:5809 .text.CheckChecksum:00000000 CheckChecksum - /tmp/ccfIOqv2.s:5871 .text.CheckChecksum:0000003c $d - ARM GAS /tmp/ccfIOqv2.s page 573 + /tmp/ccyYWdjY.s:3352 .text.MX_TIM5_Init:00000084 $d + /tmp/ccyYWdjY.s:3361 .text.MX_TIM7_Init:00000000 $t + /tmp/ccyYWdjY.s:3366 .text.MX_TIM7_Init:00000000 MX_TIM7_Init + /tmp/ccyYWdjY.s:3527 .text.MX_TIM7_Init:0000007c $d + /tmp/ccyYWdjY.s:3535 .text.MX_TIM6_Init:00000000 $t + /tmp/ccyYWdjY.s:3540 .text.MX_TIM6_Init:00000000 MX_TIM6_Init + /tmp/ccyYWdjY.s:3701 .text.MX_TIM6_Init:0000007c $d + /tmp/ccyYWdjY.s:3709 .rodata.Init_params.str1.4:00000000 $d + /tmp/ccyYWdjY.s:3716 .text.Init_params:00000000 $t + /tmp/ccyYWdjY.s:3721 .text.Init_params:00000000 Init_params + /tmp/ccyYWdjY.s:4355 .text.Init_params:00000280 $d + /tmp/ccyYWdjY.s:10208 .bss.TO6:00000000 TO6 + /tmp/ccyYWdjY.s:10152 .bss.TO7_before:00000000 TO7_before + /tmp/ccyYWdjY.s:10201 .bss.TO6_before:00000000 TO6_before + /tmp/ccyYWdjY.s:10187 .bss.TO6_uart:00000000 TO6_uart + /tmp/ccyYWdjY.s:10079 .bss.flg_tmt:00000000 flg_tmt + /tmp/ccyYWdjY.s:10055 .bss.UART_rec_incr:00000000 UART_rec_incr + /tmp/ccyYWdjY.s:10000 .bss.fgoto:00000000 fgoto + /tmp/ccyYWdjY.s:9993 .bss.sizeoffile:00000000 sizeoffile + /tmp/ccyYWdjY.s:10073 .bss.u_tx_flg:00000000 u_tx_flg + /tmp/ccyYWdjY.s:10067 .bss.u_rx_flg:00000000 u_rx_flg + /tmp/ccyYWdjY.s:10027 .bss.Long_Data:00000000 Long_Data + /tmp/ccyYWdjY.s:9951 .bss.Def_setup:00000000 Def_setup + /tmp/ccyYWdjY.s:9972 .bss.LD1_def_setup:00000000 LD1_def_setup + /tmp/ccyYWdjY.s:9965 .bss.LD2_def_setup:00000000 LD2_def_setup + /tmp/ccyYWdjY.s:9958 .bss.Curr_setup:00000000 Curr_setup + /tmp/ccyYWdjY.s:9986 .bss.LD1_curr_setup:00000000 LD1_curr_setup + /tmp/ccyYWdjY.s:9979 .bss.LD2_curr_setup:00000000 LD2_curr_setup + /tmp/ccyYWdjY.s:10086 .bss.UART_DATA:00000000 UART_DATA + /tmp/ccyYWdjY.s:10180 .bss.SD_SEEK:00000000 SD_SEEK + /tmp/ccyYWdjY.s:10173 .bss.SD_SLIDE:00000000 SD_SLIDE + /tmp/ccyYWdjY.s:10007 .bss.test:00000000 test + /tmp/ccyYWdjY.s:10111 .bss.CPU_state:00000000 CPU_state + /tmp/ccyYWdjY.s:10020 .bss.COMMAND:00000000 COMMAND + /tmp/ccyYWdjY.s:4394 .text.Get_ADC:00000000 $t + /tmp/ccyYWdjY.s:4399 .text.Get_ADC:00000000 Get_ADC + /tmp/ccyYWdjY.s:4419 .text.Get_ADC:0000000c $d + /tmp/ccyYWdjY.s:4425 .text.Get_ADC:00000012 $t + /tmp/ccyYWdjY.s:4523 .text.Get_ADC:00000068 $d + /tmp/ccyYWdjY.s:10264 .bss.hadc1:00000000 hadc1 + /tmp/ccyYWdjY.s:10257 .bss.hadc3:00000000 hadc3 + /tmp/ccyYWdjY.s:4529 .text.Set_LTEC:00000000 $t + /tmp/ccyYWdjY.s:4535 .text.Set_LTEC:00000000 Set_LTEC + /tmp/ccyYWdjY.s:4560 .text.Set_LTEC:0000000e $d + /tmp/ccyYWdjY.s:4564 .text.Set_LTEC:00000012 $t + /tmp/ccyYWdjY.s:4976 .text.Set_LTEC:00000148 $d + /tmp/ccyYWdjY.s:4984 .text.Decode_uart:00000000 $t + /tmp/ccyYWdjY.s:4989 .text.Decode_uart:00000000 Decode_uart + /tmp/ccyYWdjY.s:5552 .text.Decode_uart:000002cc $d + /tmp/ccyYWdjY.s:5567 .text.Advanced_Controller_Temp:00000000 $t + /tmp/ccyYWdjY.s:5573 .text.Advanced_Controller_Temp:00000000 Advanced_Controller_Temp + /tmp/ccyYWdjY.s:5742 .text.Advanced_Controller_Temp:000000cc $d + /tmp/ccyYWdjY.s:5752 .text.CalculateChecksum:00000000 $t + /tmp/ccyYWdjY.s:5758 .text.CalculateChecksum:00000000 CalculateChecksum + /tmp/ccyYWdjY.s:5803 .text.CheckChecksum:00000000 $t + /tmp/ccyYWdjY.s:5809 .text.CheckChecksum:00000000 CheckChecksum + /tmp/ccyYWdjY.s:5871 .text.CheckChecksum:0000003c $d + ARM GAS /tmp/ccyYWdjY.s page 572 - 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/tmp/ccfIOqv2.s:6310 .text.Error_Handler:00000000 Error_Handler - /tmp/ccfIOqv2.s:6341 .text.MX_ADC1_Init:00000000 $t - /tmp/ccfIOqv2.s:6346 .text.MX_ADC1_Init:00000000 MX_ADC1_Init - /tmp/ccfIOqv2.s:6535 .text.MX_ADC1_Init:000000bc $d - /tmp/ccfIOqv2.s:6542 .text.MX_ADC3_Init:00000000 $t - /tmp/ccfIOqv2.s:6547 .text.MX_ADC3_Init:00000000 MX_ADC3_Init - /tmp/ccfIOqv2.s:6654 .text.MX_ADC3_Init:00000060 $d - /tmp/ccfIOqv2.s:6661 .text.MX_USART1_UART_Init:00000000 $t - /tmp/ccfIOqv2.s:6666 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init - /tmp/ccfIOqv2.s:7065 .text.MX_USART1_UART_Init:0000017c $d - /tmp/ccfIOqv2.s:7074 .text.MX_TIM10_Init:00000000 $t - /tmp/ccfIOqv2.s:7079 .text.MX_TIM10_Init:00000000 MX_TIM10_Init - /tmp/ccfIOqv2.s:7128 .text.MX_TIM10_Init:00000024 $d - /tmp/ccfIOqv2.s:7134 .text.MX_UART8_Init:00000000 $t - /tmp/ccfIOqv2.s:7139 .text.MX_UART8_Init:00000000 MX_UART8_Init - /tmp/ccfIOqv2.s:7200 .text.MX_UART8_Init:00000030 $d - /tmp/ccfIOqv2.s:10235 .bss.huart8:00000000 huart8 - /tmp/ccfIOqv2.s:7206 .text.MX_TIM8_Init:00000000 $t - /tmp/ccfIOqv2.s:7211 .text.MX_TIM8_Init:00000000 MX_TIM8_Init - /tmp/ccfIOqv2.s:7320 .text.MX_TIM8_Init:00000064 $d - /tmp/ccfIOqv2.s:10256 .bss.htim8:00000000 htim8 - /tmp/ccfIOqv2.s:7326 .text.MX_TIM11_Init:00000000 $t - /tmp/ccfIOqv2.s:7331 .text.MX_TIM11_Init:00000000 MX_TIM11_Init - /tmp/ccfIOqv2.s:7441 .text.MX_TIM11_Init:00000068 $d - /tmp/ccfIOqv2.s:10242 .bss.htim11:00000000 htim11 - /tmp/ccfIOqv2.s:7447 .text.MX_TIM4_Init:00000000 $t - /tmp/ccfIOqv2.s:7452 .text.MX_TIM4_Init:00000000 MX_TIM4_Init - /tmp/ccfIOqv2.s:7607 .text.MX_TIM4_Init:0000009c $d - /tmp/ccfIOqv2.s:10263 .bss.htim4:00000000 htim4 - /tmp/ccfIOqv2.s:7613 .text.SystemClock_Config:00000000 $t - /tmp/ccfIOqv2.s:7619 .text.SystemClock_Config:00000000 SystemClock_Config - /tmp/ccfIOqv2.s:7778 .text.SystemClock_Config:000000ac $d - /tmp/ccfIOqv2.s:7784 .text.main:00000000 $t - /tmp/ccfIOqv2.s:7790 .text.main:00000000 main - /tmp/ccfIOqv2.s:8216 .text.main:00000150 $d - /tmp/ccfIOqv2.s:8226 .text.main:00000178 $t - /tmp/ccfIOqv2.s:8479 .text.main:00000284 $d - /tmp/ccfIOqv2.s:10125 .bss.CPU_state_old:00000000 CPU_state_old - ARM GAS /tmp/ccfIOqv2.s page 574 + /tmp/ccyYWdjY.s:10048 .bss.UART_header:00000000 UART_header + /tmp/ccyYWdjY.s:10041 .bss.CS_result:00000000 CS_result + /tmp/ccyYWdjY.s:5878 .rodata.SD_SAVE.str1.4:00000000 $d + /tmp/ccyYWdjY.s:5882 .text.SD_SAVE:00000000 $t + /tmp/ccyYWdjY.s:5888 .text.SD_SAVE:00000000 SD_SAVE + /tmp/ccyYWdjY.s:5957 .text.SD_SAVE:00000030 $d + /tmp/ccyYWdjY.s:5964 .text.SD_READ:00000000 $t + /tmp/ccyYWdjY.s:5970 .text.SD_READ:00000000 SD_READ + /tmp/ccyYWdjY.s:6048 .text.SD_READ:0000003c $d + /tmp/ccyYWdjY.s:6056 .text.SD_REMOVE:00000000 $t + /tmp/ccyYWdjY.s:6062 .text.SD_REMOVE:00000000 SD_REMOVE + /tmp/ccyYWdjY.s:6130 .text.SD_REMOVE:00000034 $d + /tmp/ccyYWdjY.s:6137 .text.USART_TX:00000000 $t + /tmp/ccyYWdjY.s:6143 .text.USART_TX:00000000 USART_TX + /tmp/ccyYWdjY.s:6218 .text.USART_TX:00000028 $d + /tmp/ccyYWdjY.s:6223 .text.USART_TX_DMA:00000000 $t + /tmp/ccyYWdjY.s:6229 .text.USART_TX_DMA:00000000 USART_TX_DMA + /tmp/ccyYWdjY.s:6298 .text.USART_TX_DMA:00000038 $d + /tmp/ccyYWdjY.s:6304 .text.Error_Handler:00000000 $t + /tmp/ccyYWdjY.s:6310 .text.Error_Handler:00000000 Error_Handler + /tmp/ccyYWdjY.s:6341 .text.MX_ADC1_Init:00000000 $t + /tmp/ccyYWdjY.s:6346 .text.MX_ADC1_Init:00000000 MX_ADC1_Init + /tmp/ccyYWdjY.s:6535 .text.MX_ADC1_Init:000000bc $d + /tmp/ccyYWdjY.s:6542 .text.MX_ADC3_Init:00000000 $t + /tmp/ccyYWdjY.s:6547 .text.MX_ADC3_Init:00000000 MX_ADC3_Init + /tmp/ccyYWdjY.s:6654 .text.MX_ADC3_Init:00000060 $d + /tmp/ccyYWdjY.s:6661 .text.MX_USART1_UART_Init:00000000 $t + /tmp/ccyYWdjY.s:6666 .text.MX_USART1_UART_Init:00000000 MX_USART1_UART_Init + /tmp/ccyYWdjY.s:7065 .text.MX_USART1_UART_Init:0000017c $d + /tmp/ccyYWdjY.s:7074 .text.MX_TIM10_Init:00000000 $t + /tmp/ccyYWdjY.s:7079 .text.MX_TIM10_Init:00000000 MX_TIM10_Init + /tmp/ccyYWdjY.s:7128 .text.MX_TIM10_Init:00000024 $d + /tmp/ccyYWdjY.s:7134 .text.MX_UART8_Init:00000000 $t + /tmp/ccyYWdjY.s:7139 .text.MX_UART8_Init:00000000 MX_UART8_Init + /tmp/ccyYWdjY.s:7200 .text.MX_UART8_Init:00000030 $d + /tmp/ccyYWdjY.s:10215 .bss.huart8:00000000 huart8 + /tmp/ccyYWdjY.s:7206 .text.MX_TIM8_Init:00000000 $t + /tmp/ccyYWdjY.s:7211 .text.MX_TIM8_Init:00000000 MX_TIM8_Init + /tmp/ccyYWdjY.s:7320 .text.MX_TIM8_Init:00000064 $d + /tmp/ccyYWdjY.s:10236 .bss.htim8:00000000 htim8 + /tmp/ccyYWdjY.s:7326 .text.MX_TIM11_Init:00000000 $t + /tmp/ccyYWdjY.s:7331 .text.MX_TIM11_Init:00000000 MX_TIM11_Init + /tmp/ccyYWdjY.s:7441 .text.MX_TIM11_Init:00000068 $d + /tmp/ccyYWdjY.s:10222 .bss.htim11:00000000 htim11 + /tmp/ccyYWdjY.s:7447 .text.MX_TIM4_Init:00000000 $t + /tmp/ccyYWdjY.s:7452 .text.MX_TIM4_Init:00000000 MX_TIM4_Init + /tmp/ccyYWdjY.s:7607 .text.MX_TIM4_Init:0000009c $d + /tmp/ccyYWdjY.s:10243 .bss.htim4:00000000 htim4 + /tmp/ccyYWdjY.s:7613 .text.SystemClock_Config:00000000 $t + /tmp/ccyYWdjY.s:7619 .text.SystemClock_Config:00000000 SystemClock_Config + /tmp/ccyYWdjY.s:7778 .text.SystemClock_Config:000000ac $d + /tmp/ccyYWdjY.s:7784 .text.main:00000000 $t + /tmp/ccyYWdjY.s:7790 .text.main:00000000 main + /tmp/ccyYWdjY.s:8197 .text.main:00000140 $d + /tmp/ccyYWdjY.s:8207 .text.main:00000168 $t + /tmp/ccyYWdjY.s:8460 .text.main:00000274 $d + /tmp/ccyYWdjY.s:10105 .bss.CPU_state_old:00000000 CPU_state_old + ARM GAS /tmp/ccyYWdjY.s page 573 - /tmp/ccfIOqv2.s:10119 .bss.UART_transmission_request:00000000 UART_transmission_request - /tmp/ccfIOqv2.s:10113 .bss.State_Data:00000000 State_Data - /tmp/ccfIOqv2.s:10054 .bss.temp16:00000000 temp16 - /tmp/ccfIOqv2.s:8504 .text.main:000002dc $t - /tmp/ccfIOqv2.s:8907 .text.main:000004c8 $d - /tmp/ccfIOqv2.s:9964 .bss.LD1_param:00000000 LD1_param - /tmp/ccfIOqv2.s:9957 .bss.LD2_param:00000000 LD2_param - /tmp/ccfIOqv2.s:10214 .bss.TO6_stop:00000000 TO6_stop - /tmp/ccfIOqv2.s:10144 .bss.TIM10_period:00000000 TIM10_period - /tmp/ccfIOqv2.s:8935 .text.main:00000528 $t - /tmp/ccfIOqv2.s:9319 .text.main:00000758 $d - /tmp/ccfIOqv2.s:9341 .text.main:000007a0 $t - /tmp/ccfIOqv2.s:9907 .text.main:00000a40 $d - /tmp/ccfIOqv2.s:9950 .bss.LD_blinker:00000000 LD_blinker - /tmp/ccfIOqv2.s:9940 .bss.task:00000000 $d - /tmp/ccfIOqv2.s:9947 .bss.LD_blinker:00000000 $d - /tmp/ccfIOqv2.s:9954 .bss.LD2_param:00000000 $d - /tmp/ccfIOqv2.s:9961 .bss.LD1_param:00000000 $d - /tmp/ccfIOqv2.s:9968 .bss.Def_setup:00000000 $d - /tmp/ccfIOqv2.s:9975 .bss.Curr_setup:00000000 $d - /tmp/ccfIOqv2.s:9982 .bss.LD2_def_setup:00000000 $d - /tmp/ccfIOqv2.s:9989 .bss.LD1_def_setup:00000000 $d - /tmp/ccfIOqv2.s:9996 .bss.LD2_curr_setup:00000000 $d - /tmp/ccfIOqv2.s:10003 .bss.LD1_curr_setup:00000000 $d - /tmp/ccfIOqv2.s:10010 .bss.sizeoffile:00000000 $d - /tmp/ccfIOqv2.s:10017 .bss.fgoto:00000000 $d - /tmp/ccfIOqv2.s:10024 .bss.test:00000000 $d - /tmp/ccfIOqv2.s:10033 .bss.fresult:00000000 fresult - /tmp/ccfIOqv2.s:10034 .bss.fresult:00000000 $d - /tmp/ccfIOqv2.s:10037 .bss.COMMAND:00000000 $d - /tmp/ccfIOqv2.s:10044 .bss.Long_Data:00000000 $d - /tmp/ccfIOqv2.s:10051 .bss.temp16:00000000 $d - /tmp/ccfIOqv2.s:10058 .bss.CS_result:00000000 $d - /tmp/ccfIOqv2.s:10065 .bss.UART_header:00000000 $d - /tmp/ccfIOqv2.s:10072 .bss.UART_rec_incr:00000000 $d - /tmp/ccfIOqv2.s:10082 .bss.TIM10_coflag:00000000 $d - /tmp/ccfIOqv2.s:10088 .bss.u_rx_flg:00000000 $d - /tmp/ccfIOqv2.s:10094 .bss.u_tx_flg:00000000 $d - /tmp/ccfIOqv2.s:10100 .bss.flg_tmt:00000000 $d - /tmp/ccfIOqv2.s:10103 .bss.UART_DATA:00000000 $d - /tmp/ccfIOqv2.s:10110 .bss.State_Data:00000000 $d - /tmp/ccfIOqv2.s:10120 .bss.UART_transmission_request:00000000 $d - /tmp/ccfIOqv2.s:10126 .bss.CPU_state_old:00000000 $d - /tmp/ccfIOqv2.s:10132 .bss.CPU_state:00000000 $d - /tmp/ccfIOqv2.s:10137 .bss.uart_buf:00000000 uart_buf - /tmp/ccfIOqv2.s:10138 .bss.uart_buf:00000000 $d - /tmp/ccfIOqv2.s:10141 .bss.TIM10_period:00000000 $d - /tmp/ccfIOqv2.s:10148 .bss.TO10_counter:00000000 $d - /tmp/ccfIOqv2.s:10155 .bss.TO10:00000000 $d - /tmp/ccfIOqv2.s:10162 .bss.TO7_PID:00000000 $d - /tmp/ccfIOqv2.s:10169 .bss.TO7_before:00000000 $d - /tmp/ccfIOqv2.s:10176 .bss.TO7:00000000 $d - /tmp/ccfIOqv2.s:10186 .bss.temp32:00000000 temp32 - /tmp/ccfIOqv2.s:10183 .bss.temp32:00000000 $d - /tmp/ccfIOqv2.s:10190 .bss.SD_SLIDE:00000000 $d - /tmp/ccfIOqv2.s:10197 .bss.SD_SEEK:00000000 $d - /tmp/ccfIOqv2.s:10204 .bss.TO6_uart:00000000 $d - ARM GAS /tmp/ccfIOqv2.s page 575 + /tmp/ccyYWdjY.s:10099 .bss.UART_transmission_request:00000000 UART_transmission_request + /tmp/ccyYWdjY.s:10093 .bss.State_Data:00000000 State_Data + /tmp/ccyYWdjY.s:10034 .bss.temp16:00000000 temp16 + /tmp/ccyYWdjY.s:8484 .text.main:000002c8 $t + /tmp/ccyYWdjY.s:8887 .text.main:000004b4 $d + /tmp/ccyYWdjY.s:9944 .bss.LD1_param:00000000 LD1_param + /tmp/ccyYWdjY.s:9937 .bss.LD2_param:00000000 LD2_param + /tmp/ccyYWdjY.s:10194 .bss.TO6_stop:00000000 TO6_stop + /tmp/ccyYWdjY.s:10124 .bss.TIM10_period:00000000 TIM10_period + /tmp/ccyYWdjY.s:8915 .text.main:00000514 $t + /tmp/ccyYWdjY.s:9299 .text.main:00000744 $d + /tmp/ccyYWdjY.s:9321 .text.main:0000078c $t + /tmp/ccyYWdjY.s:9887 .text.main:00000a2c $d + /tmp/ccyYWdjY.s:9930 .bss.LD_blinker:00000000 LD_blinker + /tmp/ccyYWdjY.s:9920 .bss.task:00000000 $d + /tmp/ccyYWdjY.s:9927 .bss.LD_blinker:00000000 $d + /tmp/ccyYWdjY.s:9934 .bss.LD2_param:00000000 $d + /tmp/ccyYWdjY.s:9941 .bss.LD1_param:00000000 $d + /tmp/ccyYWdjY.s:9948 .bss.Def_setup:00000000 $d + /tmp/ccyYWdjY.s:9955 .bss.Curr_setup:00000000 $d + /tmp/ccyYWdjY.s:9962 .bss.LD2_def_setup:00000000 $d + /tmp/ccyYWdjY.s:9969 .bss.LD1_def_setup:00000000 $d + /tmp/ccyYWdjY.s:9976 .bss.LD2_curr_setup:00000000 $d + /tmp/ccyYWdjY.s:9983 .bss.LD1_curr_setup:00000000 $d + /tmp/ccyYWdjY.s:9990 .bss.sizeoffile:00000000 $d + /tmp/ccyYWdjY.s:9997 .bss.fgoto:00000000 $d + /tmp/ccyYWdjY.s:10004 .bss.test:00000000 $d + /tmp/ccyYWdjY.s:10013 .bss.fresult:00000000 fresult + /tmp/ccyYWdjY.s:10014 .bss.fresult:00000000 $d + /tmp/ccyYWdjY.s:10017 .bss.COMMAND:00000000 $d + /tmp/ccyYWdjY.s:10024 .bss.Long_Data:00000000 $d + /tmp/ccyYWdjY.s:10031 .bss.temp16:00000000 $d + /tmp/ccyYWdjY.s:10038 .bss.CS_result:00000000 $d + /tmp/ccyYWdjY.s:10045 .bss.UART_header:00000000 $d + /tmp/ccyYWdjY.s:10052 .bss.UART_rec_incr:00000000 $d + /tmp/ccyYWdjY.s:10062 .bss.TIM10_coflag:00000000 $d + /tmp/ccyYWdjY.s:10068 .bss.u_rx_flg:00000000 $d + /tmp/ccyYWdjY.s:10074 .bss.u_tx_flg:00000000 $d + /tmp/ccyYWdjY.s:10080 .bss.flg_tmt:00000000 $d + /tmp/ccyYWdjY.s:10083 .bss.UART_DATA:00000000 $d + /tmp/ccyYWdjY.s:10090 .bss.State_Data:00000000 $d + /tmp/ccyYWdjY.s:10100 .bss.UART_transmission_request:00000000 $d + /tmp/ccyYWdjY.s:10106 .bss.CPU_state_old:00000000 $d + /tmp/ccyYWdjY.s:10112 .bss.CPU_state:00000000 $d + /tmp/ccyYWdjY.s:10117 .bss.uart_buf:00000000 uart_buf + /tmp/ccyYWdjY.s:10118 .bss.uart_buf:00000000 $d + /tmp/ccyYWdjY.s:10121 .bss.TIM10_period:00000000 $d + /tmp/ccyYWdjY.s:10128 .bss.TO10_counter:00000000 $d + /tmp/ccyYWdjY.s:10135 .bss.TO10:00000000 $d + /tmp/ccyYWdjY.s:10142 .bss.TO7_PID:00000000 $d + /tmp/ccyYWdjY.s:10149 .bss.TO7_before:00000000 $d + /tmp/ccyYWdjY.s:10156 .bss.TO7:00000000 $d + /tmp/ccyYWdjY.s:10166 .bss.temp32:00000000 temp32 + /tmp/ccyYWdjY.s:10163 .bss.temp32:00000000 $d + /tmp/ccyYWdjY.s:10170 .bss.SD_SLIDE:00000000 $d + /tmp/ccyYWdjY.s:10177 .bss.SD_SEEK:00000000 $d + /tmp/ccyYWdjY.s:10184 .bss.TO6_uart:00000000 $d + ARM GAS /tmp/ccyYWdjY.s page 574 - /tmp/ccfIOqv2.s:10211 .bss.TO6_stop:00000000 $d - /tmp/ccfIOqv2.s:10218 .bss.TO6_before:00000000 $d - /tmp/ccfIOqv2.s:10225 .bss.TO6:00000000 $d - /tmp/ccfIOqv2.s:10232 .bss.huart8:00000000 $d - /tmp/ccfIOqv2.s:10239 .bss.htim11:00000000 $d - /tmp/ccfIOqv2.s:10246 .bss.htim10:00000000 $d - /tmp/ccfIOqv2.s:10253 .bss.htim8:00000000 $d - /tmp/ccfIOqv2.s:10260 .bss.htim4:00000000 $d - /tmp/ccfIOqv2.s:10267 .bss.hsd1:00000000 $d - /tmp/ccfIOqv2.s:10274 .bss.hadc3:00000000 $d - /tmp/ccfIOqv2.s:10281 .bss.hadc1:00000000 $d + /tmp/ccyYWdjY.s:10191 .bss.TO6_stop:00000000 $d + /tmp/ccyYWdjY.s:10198 .bss.TO6_before:00000000 $d + /tmp/ccyYWdjY.s:10205 .bss.TO6:00000000 $d + /tmp/ccyYWdjY.s:10212 .bss.huart8:00000000 $d + /tmp/ccyYWdjY.s:10219 .bss.htim11:00000000 $d + /tmp/ccyYWdjY.s:10226 .bss.htim10:00000000 $d + /tmp/ccyYWdjY.s:10233 .bss.htim8:00000000 $d + /tmp/ccyYWdjY.s:10240 .bss.htim4:00000000 $d + /tmp/ccyYWdjY.s:10247 .bss.hsd1:00000000 $d + /tmp/ccyYWdjY.s:10254 .bss.hadc3:00000000 $d + /tmp/ccyYWdjY.s:10261 .bss.hadc1:00000000 $d UNDEFINED SYMBOLS HAL_GPIO_WritePin diff --git a/build/main.o b/build/main.o index 5fb69b9..f15836e 100644 Binary files a/build/main.o and b/build/main.o differ