ChTheo/RadioPhotonic_PCB_software
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

added AD9833 and DS1809 support

Browse Source
This commit is contained in:
Ayzen
2026-02-09 10:28:20 +03:00
parent 7442f4dd3a
commit b1ae9a5e49
25 changed files with 30112 additions and 27513 deletions
Download Patch File Download Diff File Expand all files Collapse all files

BIN
AD7686.pdf Normal file
View File

Binary file not shown.

BIN
DS1809.pdf Normal file
View File

Binary file not shown.

38
For_stm32.ioc
View File

@ -89,7 +89,7 @@ Mcu.Pin0=PF3
Mcu.Pin1=PF4 Mcu.Pin1=PF4
Mcu.Pin10=PC0 Mcu.Pin10=PC0
Mcu.Pin11=PC1 Mcu.Pin11=PC1
Mcu.Pin12=PC2 Mcu.Pin12=PC7
Mcu.Pin13=PC3 Mcu.Pin13=PC3
Mcu.Pin14=PA0/WKUP Mcu.Pin14=PA0/WKUP
Mcu.Pin15=PA1 Mcu.Pin15=PA1
@ -166,8 +166,12 @@ Mcu.Pin79=VP_TIM8_VS_ClockSourceINT
Mcu.Pin8=PH0/OSC_IN Mcu.Pin8=PH0/OSC_IN
Mcu.Pin80=VP_TIM10_VS_ClockSourceINT Mcu.Pin80=VP_TIM10_VS_ClockSourceINT
Mcu.Pin81=VP_TIM11_VS_ClockSourceINT Mcu.Pin81=VP_TIM11_VS_ClockSourceINT
Mcu.Pin82=PD12
Mcu.Pin83=PD13
Mcu.Pin84=PE2
Mcu.Pin85=PE3
Mcu.Pin9=PH1/OSC_OUT Mcu.Pin9=PH1/OSC_OUT
Mcu.PinsNb=82 Mcu.PinsNb=86
Mcu.ThirdPartyNb=0 Mcu.ThirdPartyNb=0
Mcu.UserConstants= Mcu.UserConstants=
Mcu.UserName=STM32F767ZITx Mcu.UserName=STM32F767ZITx
@ -250,7 +254,7 @@ PB11.GPIO_Label=TEC1_PD
PB11.Locked=true PB11.Locked=true
PB11.Signal=GPIO_Output PB11.Signal=GPIO_Output
PB12.GPIOParameters=PinState,GPIO_Label PB12.GPIOParameters=PinState,GPIO_Label
PB12.GPIO_Label=DAC_TEC1_CS PB12.GPIO_Label=AD9102_CS
PB12.Locked=true PB12.Locked=true
PB12.PinState=GPIO_PIN_SET PB12.PinState=GPIO_PIN_SET
PB12.Signal=GPIO_Output PB12.Signal=GPIO_Output
@ -296,10 +300,10 @@ PC11.Mode=SD_4_bits_Wide_bus
PC11.Signal=SDMMC1_D3 PC11.Signal=SDMMC1_D3
PC12.Mode=SD_4_bits_Wide_bus PC12.Mode=SD_4_bits_Wide_bus
PC12.Signal=SDMMC1_CK PC12.Signal=SDMMC1_CK
PC2.GPIOParameters=GPIO_Label PC7.GPIOParameters=GPIO_Label
PC2.GPIO_Label=EN_5V2 PC7.GPIO_Label=EN_5V2
PC2.Locked=true PC7.Locked=true
PC2.Signal=GPIO_Output PC7.Signal=GPIO_Output
PC3.GPIOParameters=GPIO_Speed,GPIO_Label PC3.GPIOParameters=GPIO_Speed,GPIO_Label
PC3.GPIO_Label=EN_5V1 PC3.GPIO_Label=EN_5V1
PC3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH PC3.GPIO_Speed=GPIO_SPEED_FREQ_VERY_HIGH
@ -325,6 +329,16 @@ PD1.GPIOParameters=GPIO_Label
PD1.GPIO_Label=TEST_01 PD1.GPIO_Label=TEST_01
PD1.Locked=true PD1.Locked=true
PD1.Signal=GPIO_Output PD1.Signal=GPIO_Output
PD12.GPIOParameters=PinState,GPIO_Label
PD12.GPIO_Label=DAC_TEC1_CS
PD12.Locked=true
PD12.PinState=GPIO_PIN_SET
PD12.Signal=GPIO_Output
PD13.GPIOParameters=PinState,GPIO_Label
PD13.GPIO_Label=AD9833_CS
PD13.Locked=true
PD13.PinState=GPIO_PIN_SET
PD13.Signal=GPIO_Output
PD2.Mode=SD_4_bits_Wide_bus PD2.Mode=SD_4_bits_Wide_bus
PD2.Signal=SDMMC1_CMD PD2.Signal=SDMMC1_CMD
PD7.Locked=true PD7.Locked=true
@ -339,6 +353,16 @@ PE0.Signal=UART8_RX
PE1.Locked=true PE1.Locked=true
PE1.Mode=Asynchronous PE1.Mode=Asynchronous
PE1.Signal=UART8_TX PE1.Signal=UART8_TX
PE2.GPIOParameters=PinState,GPIO_Label
PE2.GPIO_Label=DS1809_UC
PE2.Locked=true
PE2.PinState=GPIO_PIN_SET
PE2.Signal=GPIO_Output
PE3.GPIOParameters=PinState,GPIO_Label
PE3.GPIO_Label=DS1809_DC
PE3.Locked=true
PE3.PinState=GPIO_PIN_SET
PE3.Signal=GPIO_Output
PE10.GPIOParameters=GPIO_Label PE10.GPIOParameters=GPIO_Label
PE10.GPIO_Label=ADC_MPD1_CS PE10.GPIO_Label=ADC_MPD1_CS
PE10.Locked=true PE10.Locked=true

28
Inc/main.h
View File

@ -83,8 +83,8 @@ void Set_LTEC(uint8_t, uint16_t);
#define SPI5_CNV_GPIO_Port GPIOF #define SPI5_CNV_GPIO_Port GPIOF
#define ADC_ThrLD2_CS_Pin GPIO_PIN_10 #define ADC_ThrLD2_CS_Pin GPIO_PIN_10
#define ADC_ThrLD2_CS_GPIO_Port GPIOF #define ADC_ThrLD2_CS_GPIO_Port GPIOF
#define EN_5V2_Pin GPIO_PIN_2 #define EN_5V2_Pin GPIO_PIN_7
#define EN_5V2_GPIO_Port GPIOC #define EN_5V2_GPIO_Port GPIOC
#define EN_5V1_Pin GPIO_PIN_3 #define EN_5V1_Pin GPIO_PIN_3
#define EN_5V1_GPIO_Port GPIOC #define EN_5V1_GPIO_Port GPIOC
#define AD9102_RESET_Pin GPIO_PIN_6 #define AD9102_RESET_Pin GPIO_PIN_6
@ -122,11 +122,21 @@ void Set_LTEC(uint8_t, uint16_t);
#define TEC1_PD_Pin GPIO_PIN_11 #define TEC1_PD_Pin GPIO_PIN_11
#define TEC1_PD_GPIO_Port GPIOB #define TEC1_PD_GPIO_Port GPIOB
#define DAC_TEC1_CS_Pin GPIO_PIN_12 #define DAC_TEC1_CS_Pin GPIO_PIN_12
#define DAC_TEC1_CS_GPIO_Port GPIOB #define DAC_TEC1_CS_GPIO_Port GPIOD
#define DAC_LD1_CS_Pin GPIO_PIN_14 #define DAC_LD1_CS_Pin GPIO_PIN_14
#define DAC_LD1_CS_GPIO_Port GPIOB #define DAC_LD1_CS_GPIO_Port GPIOB
#define LD1_EN_Pin GPIO_PIN_8 #define LD1_EN_Pin GPIO_PIN_8
#define LD1_EN_GPIO_Port GPIOD #define LD1_EN_GPIO_Port GPIOD
#define AD9102_CS_Pin GPIO_PIN_12
#define AD9102_CS_GPIO_Port GPIOB
#define AD9833_CS_Pin GPIO_PIN_13
#define AD9833_CS_GPIO_Port GPIOD
#define AD9833_MCLK_Pin GPIO_PIN_9
#define AD9833_MCLK_GPIO_Port GPIOE
#define DS1809_UC_Pin GPIO_PIN_2
#define DS1809_UC_GPIO_Port GPIOE
#define DS1809_DC_Pin GPIO_PIN_3
#define DS1809_DC_GPIO_Port GPIOE
#define AD9102_TRIG_Pin GPIO_PIN_11 #define AD9102_TRIG_Pin GPIO_PIN_11
#define AD9102_TRIG_GPIO_Port GPIOD #define AD9102_TRIG_GPIO_Port GPIOD
#define USB_FLAG_Pin GPIO_PIN_8 #define USB_FLAG_Pin GPIO_PIN_8
@ -178,6 +188,8 @@ void Set_LTEC(uint8_t, uint16_t);
#define DECODE_TASK 8 #define DECODE_TASK 8
#define RUN_TASK 9 #define RUN_TASK 9
#define AD9102_CMD 10 #define AD9102_CMD 10
#define AD9833_CMD 11
#define DS1809_CMD 12
#define SD_ERR 0x01 #define SD_ERR 0x01
#define UART_ERR 0x02 #define UART_ERR 0x02
@ -197,12 +209,16 @@ void Set_LTEC(uint8_t, uint16_t);
#define AD9102_CMD_HEADER 0x8888 #define AD9102_CMD_HEADER 0x8888
#define AD9102_CMD_8 10 // total bytes including header #define AD9102_CMD_8 10 // total bytes including header
#define AD9102_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum) #define AD9102_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum)
#define AD9833_CMD_HEADER 0x9999
#define AD9833_CMD_8 10 // total bytes including header
#define AD9833_CMD_WORDS 4 // data words (flags, freq LSW, freq MSW, checksum)
#define DS1809_CMD_HEADER 0xAAAA
#define DS1809_CMD_8 10 // total bytes including header
#define DS1809_CMD_WORDS 4 // data words (flags, count, pulse_ms, checksum)
#define AD9102_ON_SPI2 1 #define AD9102_ON_SPI2 1
// AD9102 CS (chip select). Adjust to your wiring. // AD9102 CS (chip select) uses AD9102_CS_* pin definitions above.
#define AD9102_CS_GPIO_Port DAC_TEC1_CS_GPIO_Port
#define AD9102_CS_Pin DAC_TEC1_CS_Pin
typedef struct{ typedef struct{

482
Src/main.c
View File

@ -80,6 +80,7 @@
#define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u #define AD9102_SRAM_START_DELAY_BASE_DEFAULT 0x1u
#define AD9102_SRAM_START_DLY_DEFAULT 0x0000u #define AD9102_SRAM_START_DLY_DEFAULT 0x0000u
#define AD9102_SRAM_HOLD_DEFAULT 0x1u #define AD9102_SRAM_HOLD_DEFAULT 0x1u
#define AD9102_SRAM_AMP_DEFAULT 8191u
#define AD9102_SRAM_SAMPLES_DEFAULT 16u #define AD9102_SRAM_SAMPLES_DEFAULT 16u
#define AD9102_SRAM_MAX_SAMPLES 4096u #define AD9102_SRAM_MAX_SAMPLES 4096u
#define AD9102_SRAM_RAMP_MIN (-8192) #define AD9102_SRAM_RAMP_MIN (-8192)
@ -95,6 +96,13 @@
#define AD9102_FLAG_ENABLE 0x0001u #define AD9102_FLAG_ENABLE 0x0001u
#define AD9102_FLAG_TRIANGLE 0x0002u #define AD9102_FLAG_TRIANGLE 0x0002u
#define AD9102_FLAG_SRAM 0x0004u #define AD9102_FLAG_SRAM 0x0004u
#define AD9102_FLAG_SRAM_FMT 0x0008u
#define AD9833_FLAG_ENABLE 0x0001u
#define AD9833_FLAG_TRIANGLE 0x0002u
#define DS1809_FLAG_UC 0x0001u
#define DS1809_FLAG_DC 0x0002u
#define DS1809_PULSE_MS_DEFAULT 2u
/* USER CODE END PD */ /* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
@ -108,10 +116,11 @@ ADC_HandleTypeDef hadc3;
SD_HandleTypeDef hsd1; SD_HandleTypeDef hsd1;
TIM_HandleTypeDef htim4; TIM_HandleTypeDef htim4;
TIM_HandleTypeDef htim8; TIM_HandleTypeDef htim8;
TIM_HandleTypeDef htim10; TIM_HandleTypeDef htim1;
TIM_HandleTypeDef htim11; TIM_HandleTypeDef htim10;
TIM_HandleTypeDef htim11;
UART_HandleTypeDef huart8; UART_HandleTypeDef huart8;
@ -188,11 +197,12 @@ static void MX_USART1_UART_Init(void);
static void MX_SDMMC1_SD_Init(void); static void MX_SDMMC1_SD_Init(void);
static void MX_TIM7_Init(void); static void MX_TIM7_Init(void);
static void MX_TIM6_Init(void); static void MX_TIM6_Init(void);
static void MX_TIM10_Init(void); static void MX_TIM10_Init(void);
static void MX_UART8_Init(void); static void MX_UART8_Init(void);
static void MX_TIM8_Init(void); static void MX_TIM8_Init(void);
static void MX_TIM11_Init(void); static void MX_TIM11_Init(void);
static void MX_TIM4_Init(void); static void MX_TIM4_Init(void);
static void MX_TIM1_Init(void);
/* USER CODE BEGIN PFP */ /* USER CODE BEGIN PFP */
static void Init_params(void); static void Init_params(void);
static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup); static void Decode_uart(uint16_t *Command, LDx_SetupTypeDef *LD1_curr_setup, LDx_SetupTypeDef *LD2_curr_setup, Work_SetupTypeDef *Curr_setup);
@ -206,10 +216,14 @@ static void AD9102_WriteReg(uint16_t addr, uint16_t value);
static uint16_t AD9102_ReadReg(uint16_t addr); static uint16_t AD9102_ReadReg(uint16_t addr);
static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count); static void AD9102_WriteRegTable(const uint16_t *values, uint16_t count);
static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle); static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude);
static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle); static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude);
static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period); static uint8_t AD9102_CheckFlags(uint16_t pat_status, uint8_t expect_run, uint8_t saw_type, uint8_t saw_step, uint8_t pat_base, uint16_t pat_period);
static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold); static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, uint16_t samples, uint8_t hold);
static void SPI2_SetMode(uint32_t polarity, uint32_t phase);
static void AD9833_WriteWord(uint16_t word);
static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word);
static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms);
uint8_t CheckChecksum(uint16_t *pbuff); uint8_t CheckChecksum(uint16_t *pbuff);
uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len); uint16_t CalculateChecksum(uint16_t *pbuff, uint16_t len);
//int SD_Init(void); //int SD_Init(void);
@ -273,11 +287,12 @@ int main(void)
MX_TIM6_Init(); MX_TIM6_Init();
MX_TIM10_Init(); MX_TIM10_Init();
MX_UART8_Init(); MX_UART8_Init();
MX_TIM8_Init(); MX_TIM8_Init();
MX_TIM11_Init(); MX_TIM11_Init();
MX_TIM4_Init(); MX_TIM4_Init();
/* USER CODE BEGIN 2 */ MX_TIM1_Init();
Init_params(); /* USER CODE BEGIN 2 */
Init_params();
//HAL_TIM_Base_Start(&htim11); //HAL_TIM_Base_Start(&htim11);
//HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator //HAL_TIM_PWM_Start(&htim11, TIM_CHANNEL_1); //start modulating by Mach-Zander modulator
@ -293,10 +308,14 @@ int main(void)
TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1; TIM4 -> CCR3 = (TIM4 -> ARR +1)/2 - 1;
//Mach-Zander clock (should be 1/4 of ADC clock freq) //Mach-Zander clock (should be 1/4 of ADC clock freq)
TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1; TIM11 -> ARR = (TIM4 -> ARR +1)*4 - 1;
TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1; TIM11 -> CCR1 = (TIM11 -> ARR +1)/2 - 1;
// AD9833 MCLK output on PE9 (TIM1_CH1)
// TIM1 clock = 184 MHz, ARR=8 -> ~20.44 MHz output
HAL_TIM_PWM_Start(&htim1, TIM_CHANNEL_1);
/* /*
if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){ if (HAL_GPIO_ReadPin(INP_0_GPIO_Port, INP_0_Pin) == 0){
@ -468,7 +487,7 @@ int main(void)
CPU_state_old = WORK_ENABLE;//Save main current cycle CPU_state_old = WORK_ENABLE;//Save main current cycle
} }
break; break;
case AD9102_CMD://10 - Configure AD9102 sawtooth output case AD9102_CMD://10 - Configure AD9102 sawtooth output
if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1]) if (CalculateChecksum(COMMAND, AD9102_CMD_WORDS - 1) == COMMAND[AD9102_CMD_WORDS - 1])
{ {
uint16_t flags = COMMAND[0]; uint16_t flags = COMMAND[0];
@ -480,9 +499,25 @@ int main(void)
if (sram_mode) if (sram_mode)
{ {
uint16_t samples = param0; uint8_t sram_fmt = (flags & AD9102_FLAG_SRAM_FMT) ? 1u : 0u;
uint8_t hold = (uint8_t)(param1 & 0x0Fu); uint16_t samples;
uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle); uint8_t hold;
uint16_t amplitude;
if (sram_fmt)
{
amplitude = param0;
samples = param1;
hold = AD9102_SRAM_HOLD_DEFAULT;
}
else
{
samples = param0;
hold = (uint8_t)(param1 & 0x0Fu);
amplitude = AD9102_SRAM_AMP_DEFAULT;
}
uint16_t pat_status = AD9102_ApplySram(enable, samples, hold, triangle, amplitude);
State_Data[1] = (uint8_t)(pat_status & 0x00FFu); State_Data[1] = (uint8_t)(pat_status & 0x00FFu);
if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold)) if (AD9102_CheckFlagsSram(pat_status, enable, samples, hold))
{ {
@ -530,9 +565,70 @@ int main(void)
{ {
State_Data[0] |= UART_DECODE_ERR; State_Data[0] |= UART_DECODE_ERR;
} }
UART_transmission_request = MESS_01; UART_transmission_request = MESS_01;
CPU_state = CPU_state_old; CPU_state = CPU_state_old;
break; break;
case AD9833_CMD://11 - Configure AD9833 triangle output
State_Data[1] = 0u;
if (CalculateChecksum(COMMAND, AD9833_CMD_WORDS - 1) == COMMAND[AD9833_CMD_WORDS - 1])
{
uint16_t flags = COMMAND[0];
uint16_t lsw = (uint16_t)(COMMAND[1] & 0x3FFFu);
uint16_t msw = (uint16_t)(COMMAND[2] & 0x3FFFu);
uint8_t enable = (flags & AD9833_FLAG_ENABLE) ? 1u : 0u;
uint8_t triangle = (flags & AD9833_FLAG_TRIANGLE) ? 1u : 0u;
uint32_t freq_word = ((uint32_t)msw << 14) | (uint32_t)lsw;
AD9833_Apply(enable, triangle, freq_word);
}
else
{
State_Data[0] |= UART_DECODE_ERR;
}
UART_transmission_request = MESS_01;
CPU_state = CPU_state_old;
break;
case DS1809_CMD://12 - Pulse DS1809 UC/DC controls
if (CalculateChecksum(COMMAND, DS1809_CMD_WORDS - 1) == COMMAND[DS1809_CMD_WORDS - 1])
{
uint16_t flags = COMMAND[0];
uint16_t count = COMMAND[1];
uint16_t pulse_ms = COMMAND[2];
uint8_t uc = (flags & DS1809_FLAG_UC) ? 1u : 0u;
uint8_t dc = (flags & DS1809_FLAG_DC) ? 1u : 0u;
if (uc && dc)
{
State_Data[0] |= UART_DECODE_ERR;
}
else
{
if (count == 0u)
{
count = 1u;
}
if (count > 64u)
{
count = 64u;
}
if (pulse_ms == 0u)
{
pulse_ms = DS1809_PULSE_MS_DEFAULT;
}
if (pulse_ms > 500u)
{
pulse_ms = 500u;
}
DS1809_Pulse(uc, dc, count, pulse_ms);
}
}
else
{
State_Data[0] |= UART_DECODE_ERR;
}
UART_transmission_request = MESS_01;
CPU_state = CPU_state_old;
break;
case DECODE_TASK: case DECODE_TASK:
if (CheckChecksum(COMMAND)) if (CheckChecksum(COMMAND))
{ {
@ -1703,7 +1799,7 @@ static void MX_TIM10_Init(void)
* @param None * @param None
* @retval None * @retval None
*/ */
static void MX_TIM11_Init(void) static void MX_TIM11_Init(void)
{ {
/* USER CODE BEGIN TIM11_Init 0 */ /* USER CODE BEGIN TIM11_Init 0 */
@ -1740,9 +1836,78 @@ static void MX_TIM11_Init(void)
/* USER CODE BEGIN TIM11_Init 2 */ /* USER CODE BEGIN TIM11_Init 2 */
/* USER CODE END TIM11_Init 2 */ /* USER CODE END TIM11_Init 2 */
HAL_TIM_MspPostInit(&htim11); HAL_TIM_MspPostInit(&htim11);
} }
/**
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
TIM_OC_InitTypeDef sConfigOC = {0};
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
htim1.Init.Prescaler = 0;
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
htim1.Init.Period = 8;
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
htim1.Init.RepetitionCounter = 0;
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
{
Error_Handler();
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
{
Error_Handler();
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
sConfigOC.Pulse = 4;
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
{
Error_Handler();
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
sBreakDeadTimeConfig.DeadTime = 0;
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
sBreakDeadTimeConfig.BreakFilter = 0;
sBreakDeadTimeConfig.Break2State = TIM_BREAK2_DISABLE;
sBreakDeadTimeConfig.Break2Polarity = TIM_BREAK2POLARITY_HIGH;
sBreakDeadTimeConfig.Break2Filter = 0;
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN TIM1_Init 2 */
/* USER CODE END TIM1_Init 2 */
HAL_TIM_MspPostInit(&htim1);
}
/** /**
* @brief UART8 Initialization Function * @brief UART8 Initialization Function
@ -1924,22 +2089,25 @@ static void MX_GPIO_Init(void)
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(DAC_TEC2_CS_GPIO_Port, DAC_TEC2_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOE, ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(GPIOE, DS1809_UC_Pin|DS1809_DC_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(SPI4_CNV_GPIO_Port, SPI4_CNV_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin HAL_GPIO_WritePin(GPIOB, REF0_EN_Pin|TEC1_PD_Pin|OUT_6_Pin
|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET); |OUT_7_Pin|OUT_8_Pin|OUT_9_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(GPIOD, LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7, GPIO_PIN_RESET);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */ /*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin HAL_GPIO_WritePin(GPIOG, GPIO_PIN_9|OUT_0_Pin|OUT_1_Pin|OUT_2_Pin
@ -1987,12 +2155,19 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */ /*Configure GPIO pins : ADC_MPD1_CS_Pin ADC_ThrLD1_CS_Pin */
GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin; GPIO_InitStruct.Pin = ADC_MPD1_CS_Pin|ADC_ThrLD1_CS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pins : DS1809_UC_Pin DS1809_DC_Pin */
GPIO_InitStruct.Pin = DS1809_UC_Pin|DS1809_DC_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/*Configure GPIO pin : SPI4_CNV_Pin */ /*Configure GPIO pin : SPI4_CNV_Pin */
GPIO_InitStruct.Pin = SPI4_CNV_Pin; GPIO_InitStruct.Pin = SPI4_CNV_Pin;
@ -2001,21 +2176,21 @@ static void MX_GPIO_Init(void)
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct); HAL_GPIO_Init(SPI4_CNV_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin DAC_TEC1_CS_Pin /*Configure GPIO pins : REF0_EN_Pin TEC1_PD_Pin AD9102_CS_Pin
OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */ OUT_6_Pin OUT_7_Pin OUT_8_Pin OUT_9_Pin */
GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|DAC_TEC1_CS_Pin GPIO_InitStruct.Pin = REF0_EN_Pin|TEC1_PD_Pin|AD9102_CS_Pin
|OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin; |OUT_6_Pin|OUT_7_Pin|OUT_8_Pin|OUT_9_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin */ /*Configure GPIO pins : LD1_EN_Pin TEST_01_Pin PD7 AD9102_TRIG_Pin DAC_TEC1_CS_Pin AD9833_CS_Pin */
GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin; GPIO_InitStruct.Pin = LD1_EN_Pin|TEST_01_Pin|GPIO_PIN_7|AD9102_TRIG_Pin|DAC_TEC1_CS_Pin|AD9833_CS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
/*Configure GPIO pin : USB_FLAG_Pin */ /*Configure GPIO pin : USB_FLAG_Pin */
GPIO_InitStruct.Pin = USB_FLAG_Pin; GPIO_InitStruct.Pin = USB_FLAG_Pin;
@ -2448,24 +2623,114 @@ void OUT_trigger(uint8_t out_n)
} }
} }
static void AD9102_Init(void) static void AD9102_Init(void)
{ {
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET); HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_RESET);
for (volatile uint32_t d = 0; d < 1000; d++) {} for (volatile uint32_t d = 0; d < 1000; d++) {}
HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(AD9102_RESET_GPIO_Port, AD9102_RESET_Pin, GPIO_PIN_SET);
AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT); AD9102_WriteRegTable(ad9102_example4_regval, AD9102_REG_COUNT);
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET); HAL_GPIO_WritePin(AD9102_TRIG_GPIO_Port, AD9102_TRIG_Pin, GPIO_PIN_SET);
} }
static void SPI2_SetMode(uint32_t polarity, uint32_t phase)
{
if (LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Disable(SPI2);
}
LL_SPI_SetClockPolarity(SPI2, polarity);
LL_SPI_SetClockPhase(SPI2, phase);
if (!LL_SPI_IsEnabled(SPI2))
{
LL_SPI_Enable(SPI2);
}
}
static void AD9833_WriteWord(uint16_t word)
{
uint32_t tmp32 = 0;
SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_1EDGE);
HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_RESET);
while((!LL_SPI_IsActiveFlag_TXE(SPI2)) && (tmp32++ < 1000)) {}
LL_SPI_TransmitData16(SPI2, word);
tmp32 = 0;
while((!LL_SPI_IsActiveFlag_RXNE(SPI2)) && (tmp32++ < 1000)) {}
(void) SPI2->DR;
HAL_GPIO_WritePin(AD9833_CS_GPIO_Port, AD9833_CS_Pin, GPIO_PIN_SET);
}
static void AD9833_Apply(uint8_t enable, uint8_t triangle, uint32_t freq_word)
{
uint16_t control = 0x2000u; // B28 = 1
if (triangle)
{
control |= 0x0002u; // MODE = 1 (triangle)
}
control |= 0x0100u; // RESET = 1 while updating
freq_word &= 0x0FFFFFFFu;
uint16_t lsw = (uint16_t)(0x4000u | (freq_word & 0x3FFFu)); // FREQ0 LSB
uint16_t msw = (uint16_t)(0x4000u | ((freq_word >> 14) & 0x3FFFu)); // FREQ0 MSB
AD9833_WriteWord(control);
AD9833_WriteWord(lsw);
AD9833_WriteWord(msw);
AD9833_WriteWord(0xC000u); // PHASE0 = 0
if (enable)
{
control &= (uint16_t)(~0x0100u);
}
AD9833_WriteWord(control);
}
static void DS1809_Pulse(uint8_t uc, uint8_t dc, uint16_t count, uint16_t pulse_ms)
{
for (uint16_t i = 0; i < count; i++)
{
if (uc)
{
HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_RESET);
}
if (dc)
{
HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_RESET);
}
HAL_Delay(pulse_ms);
if (uc)
{
HAL_GPIO_WritePin(DS1809_UC_GPIO_Port, DS1809_UC_Pin, GPIO_PIN_SET);
}
if (dc)
{
HAL_GPIO_WritePin(DS1809_DC_GPIO_Port, DS1809_DC_Pin, GPIO_PIN_SET);
}
HAL_Delay(pulse_ms);
}
}
static void AD9102_WriteReg(uint16_t addr, uint16_t value) static void AD9102_WriteReg(uint16_t addr, uint16_t value)
{ {
uint32_t tmp32 = 0; uint32_t tmp32 = 0;
uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address uint16_t cmd = (uint16_t)(addr & 0x7FFFu); // R/W = 0 (write), 15-bit address
SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
if (!LL_SPI_IsEnabled(SPI2)) if (!LL_SPI_IsEnabled(SPI2))
{ {
LL_SPI_Enable(SPI2); LL_SPI_Enable(SPI2);
@ -2495,6 +2760,11 @@ static uint16_t AD9102_ReadReg(uint16_t addr)
uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read) uint16_t cmd = (uint16_t)(0x8000u | (addr & 0x7FFFu)); // R/W = 1 (read)
uint16_t value; uint16_t value;
SPI2_SetMode(LL_SPI_POLARITY_LOW, LL_SPI_PHASE_1EDGE);
HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_SET);
HAL_GPIO_WritePin(DAC_TEC1_CS_GPIO_Port, DAC_TEC1_CS_Pin, GPIO_PIN_SET);
if (!LL_SPI_IsEnabled(SPI2)) if (!LL_SPI_IsEnabled(SPI2))
{ {
LL_SPI_Enable(SPI2); LL_SPI_Enable(SPI2);
@ -2571,7 +2841,7 @@ static uint16_t AD9102_Apply(uint8_t saw_type, uint8_t enable, uint8_t saw_step,
return AD9102_ReadReg(AD9102_REG_PAT_STATUS); return AD9102_ReadReg(AD9102_REG_PAT_STATUS);
} }
static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle) static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle, uint16_t amplitude)
{ {
if (samples < 2u) if (samples < 2u)
{ {
@ -2581,6 +2851,10 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
{ {
samples = AD9102_SRAM_MAX_SAMPLES; samples = AD9102_SRAM_MAX_SAMPLES;
} }
if (amplitude > AD9102_SRAM_AMP_DEFAULT)
{
amplitude = AD9102_SRAM_AMP_DEFAULT;
}
// Enable SRAM access. // Enable SRAM access.
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u); AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0004u);
@ -2588,6 +2862,9 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
for (uint16_t i = 0; i < samples; i++) for (uint16_t i = 0; i < samples; i++)
{ {
int32_t value; int32_t value;
int32_t min_val = -(int32_t)amplitude;
int32_t max_val = (int32_t)amplitude;
int32_t span = max_val - min_val;
if (triangle) if (triangle)
{ {
uint16_t half = samples / 2u; uint16_t half = samples / 2u;
@ -2598,22 +2875,40 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
if (i < half) if (i < half)
{ {
uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u; uint16_t denom = (half > 1u) ? (uint16_t)(half - 1u) : 1u;
value = AD9102_SRAM_RAMP_MIN + if (span == 0)
((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; {
value = 0;
}
else
{
value = min_val + (span * (int32_t)i) / (int32_t)denom;
}
} }
else else
{ {
uint16_t tail = (uint16_t)(samples - half); uint16_t tail = (uint16_t)(samples - half);
uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u; uint16_t denom = (tail > 1u) ? (uint16_t)(tail - 1u) : 1u;
value = AD9102_SRAM_RAMP_MAX - if (span == 0)
((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)(i - half)) / (int32_t)denom; {
value = 0;
}
else
{
value = max_val - (span * (int32_t)(i - half)) / (int32_t)denom;
}
} }
} }
else else
{ {
uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u; uint16_t denom = (samples > 1u) ? (uint16_t)(samples - 1u) : 1u;
value = AD9102_SRAM_RAMP_MIN + if (span == 0)
((int32_t)AD9102_SRAM_RAMP_SPAN * (int32_t)i) / (int32_t)denom; {
value = 0;
}
else
{
value = min_val + (span * (int32_t)i) / (int32_t)denom;
}
} }
if (value < -8192) if (value < -8192)
@ -2634,7 +2929,7 @@ static void AD9102_LoadSramRamp(uint16_t samples, uint8_t triangle)
AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u); AD9102_WriteReg(AD9102_REG_PAT_STATUS, 0x0000u);
} }
static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle) static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold, uint8_t triangle, uint16_t amplitude)
{ {
if (samples == 0u) if (samples == 0u)
{ {
@ -2657,6 +2952,11 @@ static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold,
hold = 0x0Fu; hold = 0x0Fu;
} }
if (amplitude > AD9102_SRAM_AMP_DEFAULT)
{
amplitude = AD9102_SRAM_AMP_DEFAULT;
}
uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) | uint16_t pat_timebase = (uint16_t)(((uint16_t)(hold & 0x0Fu) << 8) |
((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) | ((AD9102_SRAM_PAT_PERIOD_BASE_DEFAULT & 0x0Fu) << 4) |
(AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu)); (AD9102_SRAM_START_DELAY_BASE_DEFAULT & 0x0Fu));
@ -2683,7 +2983,7 @@ static uint16_t AD9102_ApplySram(uint8_t enable, uint16_t samples, uint8_t hold,
AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4)); AD9102_WriteReg(AD9102_REG_STOP_ADDR, (uint16_t)((samples - 1u) << 4));
AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u); AD9102_WriteReg(AD9102_REG_RAMUPDATE, 0x0001u);
AD9102_LoadSramRamp(samples, triangle); AD9102_LoadSramRamp(samples, triangle, amplitude);
if (enable) if (enable)
{ {
@ -2880,20 +3180,18 @@ static uint8_t AD9102_CheckFlagsSram(uint16_t pat_status, uint8_t expect_run, ui
return (ok ? 0u : 1u); return (ok ? 0u : 1u);
} }
void Set_LTEC(uint8_t num, uint16_t DATA) void Set_LTEC(uint8_t num, uint16_t DATA)
{ {
uint32_t tmp32; uint32_t tmp32;
#if AD9102_ON_SPI2 if (num == 1 || num == 3)
// AD9102 occupies SPI2; skip LD1/TEC1 writes to avoid CS conflicts. {
if (num == 1 || num == 3) SPI2_SetMode(LL_SPI_POLARITY_HIGH, LL_SPI_PHASE_2EDGE);
{ HAL_GPIO_WritePin(AD9102_CS_GPIO_Port, AD9102_CS_Pin, GPIO_PIN_SET);
return; }
}
#endif switch (num)
{
switch (num)
{
case 1: case 1:
HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1 HAL_GPIO_WritePin(DAC_LD1_CS_GPIO_Port, DAC_LD1_CS_Pin, GPIO_PIN_RESET);//Start operation with LDAC1
//tmp32=0; //tmp32=0;

75
Src/stm32f7xx_hal_msp.c
View File

@ -332,8 +332,8 @@ void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
*/ */
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base) void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{ {
if(htim_base->Instance==TIM4) if(htim_base->Instance==TIM4)
{ {
/* USER CODE BEGIN TIM4_MspInit 0 */ /* USER CODE BEGIN TIM4_MspInit 0 */
/* USER CODE END TIM4_MspInit 0 */ /* USER CODE END TIM4_MspInit 0 */
@ -341,10 +341,21 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
__HAL_RCC_TIM4_CLK_ENABLE(); __HAL_RCC_TIM4_CLK_ENABLE();
/* USER CODE BEGIN TIM4_MspInit 1 */ /* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */ /* USER CODE END TIM4_MspInit 1 */
} }
else if(htim_base->Instance==TIM8) else if(htim_base->Instance==TIM1)
{ {
/* USER CODE BEGIN TIM1_MspInit 0 */
/* USER CODE END TIM1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
/* USER CODE BEGIN TIM1_MspInit 1 */
/* USER CODE END TIM1_MspInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspInit 0 */ /* USER CODE BEGIN TIM8_MspInit 0 */
/* USER CODE END TIM8_MspInit 0 */ /* USER CODE END TIM8_MspInit 0 */
@ -391,8 +402,8 @@ void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim) void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{ {
GPIO_InitTypeDef GPIO_InitStruct = {0}; GPIO_InitTypeDef GPIO_InitStruct = {0};
if(htim->Instance==TIM4) if(htim->Instance==TIM4)
{ {
/* USER CODE BEGIN TIM4_MspPostInit 0 */ /* USER CODE BEGIN TIM4_MspPostInit 0 */
/* USER CODE END TIM4_MspPostInit 0 */ /* USER CODE END TIM4_MspPostInit 0 */
@ -409,10 +420,31 @@ void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
/* USER CODE BEGIN TIM4_MspPostInit 1 */ /* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */ /* USER CODE END TIM4_MspPostInit 1 */
} }
else if(htim->Instance==TIM11) else if(htim->Instance==TIM1)
{ {
/* USER CODE BEGIN TIM1_MspPostInit 0 */
/* USER CODE END TIM1_MspPostInit 0 */
__HAL_RCC_GPIOE_CLK_ENABLE();
/**TIM1 GPIO Configuration
PE9 ------> TIM1_CH1
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF1_TIM1;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* USER CODE BEGIN TIM1_MspPostInit 1 */
/* USER CODE END TIM1_MspPostInit 1 */
}
else if(htim->Instance==TIM11)
{
/* USER CODE BEGIN TIM11_MspPostInit 0 */ /* USER CODE BEGIN TIM11_MspPostInit 0 */
/* USER CODE END TIM11_MspPostInit 0 */ /* USER CODE END TIM11_MspPostInit 0 */
@ -451,10 +483,21 @@ void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* htim_base)
__HAL_RCC_TIM4_CLK_DISABLE(); __HAL_RCC_TIM4_CLK_DISABLE();
/* USER CODE BEGIN TIM4_MspDeInit 1 */ /* USER CODE BEGIN TIM4_MspDeInit 1 */
/* USER CODE END TIM4_MspDeInit 1 */ /* USER CODE END TIM4_MspDeInit 1 */
} }
else if(htim_base->Instance==TIM8) else if(htim_base->Instance==TIM1)
{ {
/* USER CODE BEGIN TIM1_MspDeInit 0 */
/* USER CODE END TIM1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_TIM1_CLK_DISABLE();
/* USER CODE BEGIN TIM1_MspDeInit 1 */
/* USER CODE END TIM1_MspDeInit 1 */
}
else if(htim_base->Instance==TIM8)
{
/* USER CODE BEGIN TIM8_MspDeInit 0 */ /* USER CODE BEGIN TIM8_MspDeInit 0 */
/* USER CODE END TIM8_MspDeInit 0 */ /* USER CODE END TIM8_MspDeInit 0 */

26
Src/stm32f7xx_it.c
View File

@ -481,6 +481,12 @@ void UART_RxCpltCallback(void)
case AD9102_CMD_HEADER: // AD9102 command case AD9102_CMD_HEADER: // AD9102 command
UART_rec_incr = 2;//timeout flag is still setting! UART_rec_incr = 2;//timeout flag is still setting!
break; break;
case AD9833_CMD_HEADER: // AD9833 command
UART_rec_incr = 2;//timeout flag is still setting!
break;
case DS1809_CMD_HEADER: // DS1809 UC/DC pulse command
UART_rec_incr = 2;//timeout flag is still setting!
break;
default: //error decoding header default: //error decoding header
UART_rec_incr = 0; UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag flg_tmt = 0;//Reset the timeout flag
@ -503,6 +509,26 @@ void UART_RxCpltCallback(void)
UART_rec_incr = 0; UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag flg_tmt = 0;//Reset the timeout flag
} }
else if (UART_header == AD9833_CMD_HEADER)
{
if ((UART_rec_incr & 0x0001) > 0)
COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
else
COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
CPU_state = AD9833_CMD;
UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag
}
else if (UART_header == DS1809_CMD_HEADER)
{
if ((UART_rec_incr & 0x0001) > 0)
COMMAND[(UART_rec_incr >> 1) - 1] += ((uint16_t)(uart_buf)) << 8;
else
COMMAND[(UART_rec_incr >> 1) - 1] = (uint16_t)(uart_buf);
CPU_state = DS1809_CMD;
UART_rec_incr = 0;
flg_tmt = 0;//Reset the timeout flag
}
else else
{ {
if ((UART_rec_incr&0x0001)>0) if ((UART_rec_incr&0x0001)>0)

BIN
ad9833.pdf Normal file
View File

Binary file not shown.

262
build/File_Handling.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cczIN1cV.s page 1 ARM GAS /tmp/cc6OCjXR.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
28:Src/File_Handling.c **** 28:Src/File_Handling.c ****
29:Src/File_Handling.c **** 29:Src/File_Handling.c ****
30:Src/File_Handling.c **** void Send_Uart (char *string) 30:Src/File_Handling.c **** void Send_Uart (char *string)
ARM GAS /tmp/cczIN1cV.s page 2 ARM GAS /tmp/cc6OCjXR.s page 2
31:Src/File_Handling.c **** { 31:Src/File_Handling.c **** {
@ -118,7 +118,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
75 0012 0120 movs r0, #1 75 0012 0120 movs r0, #1
76 .L2: 76 .L2:
41:Src/File_Handling.c **** else return 0; 41:Src/File_Handling.c **** else return 0;
ARM GAS /tmp/cczIN1cV.s page 3 ARM GAS /tmp/cc6OCjXR.s page 3
42:Src/File_Handling.c **** } 42:Src/File_Handling.c **** }
@ -178,7 +178,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n"); 48:Src/File_Handling.c **** return 1;//else Send_Uart("ERROR!!! in UNMOUNTING SD CARD\n\n\n");
126 .loc 1 48 9 view .LVU21 126 .loc 1 48 9 view .LVU21
127 0012 0120 movs r0, #1 127 0012 0120 movs r0, #1
ARM GAS /tmp/cczIN1cV.s page 4 ARM GAS /tmp/cc6OCjXR.s page 4
128 .L8: 128 .L8:
@ -238,7 +238,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
171 .LCFI2: 171 .LCFI2:
172 .cfi_def_cfa_offset 16 172 .cfi_def_cfa_offset 16
173 .cfi_offset 4, -16 173 .cfi_offset 4, -16
ARM GAS /tmp/cczIN1cV.s page 5 ARM GAS /tmp/cc6OCjXR.s page 5
174 .cfi_offset 5, -12 174 .cfi_offset 5, -12
@ -298,7 +298,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char)); 69:Src/File_Handling.c **** char *buf = malloc(30*sizeof(char));
70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname); 70:Src/File_Handling.c **** sprintf (buf, "Dir: %s\r\n", fno.fname);
71:Src/File_Handling.c **** Send_Uart(buf); 71:Src/File_Handling.c **** Send_Uart(buf);
ARM GAS /tmp/cczIN1cV.s page 6 ARM GAS /tmp/cc6OCjXR.s page 6
72:Src/File_Handling.c **** free(buf); 72:Src/File_Handling.c **** free(buf);
@ -358,7 +358,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
247 .loc 1 65 46 discriminator 1 view .LVU49 247 .loc 1 65 46 discriminator 1 view .LVU49
248 004c 1D4B ldr r3, .L21+12 248 004c 1D4B ldr r3, .L21+12
249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2 249 004e 5B7A ldrb r3, [r3, #9] @ zero_extendqisi2
ARM GAS /tmp/cczIN1cV.s page 7 ARM GAS /tmp/cc6OCjXR.s page 7
65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */ 65:Src/File_Handling.c **** if (fno.fattrib & AM_DIR) /* It is a directory */
@ -418,7 +418,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
290 0082 FFF7FEFF bl strlen 290 0082 FFF7FEFF bl strlen
291 .LVL24: 291 .LVL24:
292 0086 0546 mov r5, r0 292 0086 0546 mov r5, r0
ARM GAS /tmp/cczIN1cV.s page 8 ARM GAS /tmp/cc6OCjXR.s page 8
293 .LVL25: 293 .LVL25:
@ -478,7 +478,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
331 .loc 1 91 1 is_stmt 0 view .LVU76 331 .loc 1 91 1 is_stmt 0 view .LVU76
332 00b0 014B ldr r3, .L21 332 00b0 014B ldr r3, .L21
333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2 333 00b2 1878 ldrb r0, [r3] @ zero_extendqisi2
ARM GAS /tmp/cczIN1cV.s page 9 ARM GAS /tmp/cc6OCjXR.s page 9
334 00b4 0CB0 add sp, sp, #48 334 00b4 0CB0 add sp, sp, #48
@ -538,7 +538,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
384 .LVL33: 384 .LVL33:
385 000a 0446 mov r4, r0 385 000a 0446 mov r4, r0
386 .LVL34: 386 .LVL34:
ARM GAS /tmp/cczIN1cV.s page 10 ARM GAS /tmp/cc6OCjXR.s page 10
98:Src/File_Handling.c **** sprintf (path, "%s","/"); 98:Src/File_Handling.c **** sprintf (path, "%s","/");
@ -598,7 +598,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
420 002e 6846 mov r0, sp 420 002e 6846 mov r0, sp
421 0030 FFF7FEFF bl f_readdir 421 0030 FFF7FEFF bl f_readdir
422 .LVL38: 422 .LVL38:
ARM GAS /tmp/cczIN1cV.s page 11 ARM GAS /tmp/cc6OCjXR.s page 11
105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */ 105:Src/File_Handling.c **** if (fresult != FR_OK || fno.fname[0] == 0) break; /* Break on error or end of dir */
@ -658,7 +658,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
461 .L26: 461 .L26:
116:Src/File_Handling.c **** } 116:Src/File_Handling.c **** }
117:Src/File_Handling.c **** } 117:Src/File_Handling.c **** }
ARM GAS /tmp/cczIN1cV.s page 12 ARM GAS /tmp/cc6OCjXR.s page 12
118:Src/File_Handling.c **** f_closedir(&dir); 118:Src/File_Handling.c **** f_closedir(&dir);
@ -718,7 +718,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
507 .loc 1 128 1 is_stmt 0 view .LVU117 507 .loc 1 128 1 is_stmt 0 view .LVU117
508 0000 70B5 push {r4, r5, r6, lr} 508 0000 70B5 push {r4, r5, r6, lr}
509 .LCFI8: 509 .LCFI8:
ARM GAS /tmp/cczIN1cV.s page 13 ARM GAS /tmp/cc6OCjXR.s page 13
510 .cfi_def_cfa_offset 16 510 .cfi_def_cfa_offset 16
@ -778,7 +778,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
153:Src/File_Handling.c **** 153:Src/File_Handling.c ****
154:Src/File_Handling.c **** else 154:Src/File_Handling.c **** else
155:Src/File_Handling.c **** { 155:Src/File_Handling.c **** {
ARM GAS /tmp/cczIN1cV.s page 14 ARM GAS /tmp/cc6OCjXR.s page 14
156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw); 156:Src/File_Handling.c **** fresult = f_write(&fil, data, strlen(data), &bw);
@ -838,7 +838,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
150:Src/File_Handling.c **** return fresult; 150:Src/File_Handling.c **** return fresult;
559 .loc 1 150 10 view .LVU136 559 .loc 1 150 10 view .LVU136
151:Src/File_Handling.c **** } 151:Src/File_Handling.c **** }
ARM GAS /tmp/cczIN1cV.s page 15 ARM GAS /tmp/cc6OCjXR.s page 15
560 .loc 1 151 10 view .LVU137 560 .loc 1 151 10 view .LVU137
@ -898,7 +898,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
182:Src/File_Handling.c **** } 182:Src/File_Handling.c **** }
598 .loc 1 182 13 is_stmt 0 view .LVU154 598 .loc 1 182 13 is_stmt 0 view .LVU154
599 004a C0B2 uxtb r0, r0 599 004a C0B2 uxtb r0, r0
ARM GAS /tmp/cczIN1cV.s page 16 ARM GAS /tmp/cc6OCjXR.s page 16
600 004c E2E7 b .L34 600 004c E2E7 b .L34
@ -958,7 +958,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
649 .loc 1 191 5 is_stmt 0 view .LVU162 649 .loc 1 191 5 is_stmt 0 view .LVU162
650 0012 08B1 cbz r0, .L40 650 0012 08B1 cbz r0, .L40
651 .LBB6: 651 .LBB6:
ARM GAS /tmp/cczIN1cV.s page 17 ARM GAS /tmp/cc6OCjXR.s page 17
192:Src/File_Handling.c **** { 192:Src/File_Handling.c **** {
@ -1018,7 +1018,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
237:Src/File_Handling.c **** //Send_Uart(buf); 237:Src/File_Handling.c **** //Send_Uart(buf);
238:Src/File_Handling.c **** free(buf); 238:Src/File_Handling.c **** free(buf);
239:Src/File_Handling.c **** } 239:Src/File_Handling.c **** }
ARM GAS /tmp/cczIN1cV.s page 18 ARM GAS /tmp/cc6OCjXR.s page 18
240:Src/File_Handling.c **** } 240:Src/File_Handling.c **** }
@ -1078,7 +1078,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
215:Src/File_Handling.c **** if (fresult != FR_OK) 215:Src/File_Handling.c **** if (fresult != FR_OK)
699 .loc 1 215 15 discriminator 1 view .LVU181 699 .loc 1 215 15 discriminator 1 view .LVU181
700 003c 2070 strb r0, [r4] 700 003c 2070 strb r0, [r4]
ARM GAS /tmp/cczIN1cV.s page 19 ARM GAS /tmp/cc6OCjXR.s page 19
216:Src/File_Handling.c **** { 216:Src/File_Handling.c **** {
@ -1138,7 +1138,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000" 737 004c 4552524F .ascii "ERROR!!! No. %d in reading file *%s*\012\012\000"
737 52212121 737 52212121
737 204E6F2E 737 204E6F2E
ARM GAS /tmp/cczIN1cV.s page 20 ARM GAS /tmp/cc6OCjXR.s page 20
737 20256420 737 20256420
@ -1198,7 +1198,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
777 000e B8B9 cbnz r0, .L54 777 000e B8B9 cbnz r0, .L54
778 .LBB8: 778 .LBB8:
250:Src/File_Handling.c **** { 250:Src/File_Handling.c **** {
ARM GAS /tmp/cczIN1cV.s page 21 ARM GAS /tmp/cc6OCjXR.s page 21
251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 251:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
@ -1258,7 +1258,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
814 003a 2B4B ldr r3, .L55+4 814 003a 2B4B ldr r3, .L55+4
815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2 815 003c 1878 ldrb r0, [r3] @ zero_extendqisi2
816 003e 0CE0 b .L48 816 003e 0CE0 b .L48
ARM GAS /tmp/cczIN1cV.s page 22 ARM GAS /tmp/cc6OCjXR.s page 22
817 .LVL70: 817 .LVL70:
@ -1318,7 +1318,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
285:Src/File_Handling.c **** 285:Src/File_Handling.c ****
286:Src/File_Handling.c **** else 286:Src/File_Handling.c **** else
287:Src/File_Handling.c **** { 287:Src/File_Handling.c **** {
ARM GAS /tmp/cczIN1cV.s page 23 ARM GAS /tmp/cc6OCjXR.s page 23
288:Src/File_Handling.c **** Send_Uart(buffer); 288:Src/File_Handling.c **** Send_Uart(buffer);
@ -1378,7 +1378,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
277:Src/File_Handling.c **** { 277:Src/File_Handling.c **** {
873 .loc 1 277 3 is_stmt 1 view .LVU228 873 .loc 1 277 3 is_stmt 1 view .LVU228
277:Src/File_Handling.c **** { 277:Src/File_Handling.c **** {
ARM GAS /tmp/cczIN1cV.s page 24 ARM GAS /tmp/cc6OCjXR.s page 24
874 .loc 1 277 6 is_stmt 0 view .LVU229 874 .loc 1 277 6 is_stmt 0 view .LVU229
@ -1438,7 +1438,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
916 00a0 FFF7FEFF bl free 916 00a0 FFF7FEFF bl free
917 .LVL88: 917 .LVL88:
292:Src/File_Handling.c **** if (fresult != FR_OK) 292:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cczIN1cV.s page 25 ARM GAS /tmp/cc6OCjXR.s page 25
918 .loc 1 292 4 view .LVU242 918 .loc 1 292 4 view .LVU242
@ -1498,7 +1498,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
961 .LVL97: 961 .LVL97:
303:Src/File_Handling.c **** Send_Uart(buf); 303:Src/File_Handling.c **** Send_Uart(buf);
962 .loc 1 303 5 is_stmt 1 view .LVU254 962 .loc 1 303 5 is_stmt 1 view .LVU254
ARM GAS /tmp/cczIN1cV.s page 26 ARM GAS /tmp/cc6OCjXR.s page 26
963 00d4 2246 mov r2, r4 963 00d4 2246 mov r2, r4
@ -1558,7 +1558,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1010 .LCFI11: 1010 .LCFI11:
1011 .cfi_def_cfa_offset 24 1011 .cfi_def_cfa_offset 24
1012 .cfi_offset 4, -24 1012 .cfi_offset 4, -24
ARM GAS /tmp/cczIN1cV.s page 27 ARM GAS /tmp/cc6OCjXR.s page 27
1013 .cfi_offset 5, -20 1013 .cfi_offset 5, -20
@ -1618,7 +1618,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 332:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name); 333:Src/File_Handling.c **** sprintf (buf, "ERROR!!! No. %d in opening file *%s*\n\n", fresult, name);
334:Src/File_Handling.c **** //Send_Uart(buf); 334:Src/File_Handling.c **** //Send_Uart(buf);
ARM GAS /tmp/cczIN1cV.s page 28 ARM GAS /tmp/cc6OCjXR.s page 28
335:Src/File_Handling.c **** free(buf); 335:Src/File_Handling.c **** free(buf);
@ -1678,7 +1678,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1086 .LBE15: 1086 .LBE15:
1087 .LBB16: 1087 .LBB16:
318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name); 318:Src/File_Handling.c **** sprintf (buf, "ERRROR!!! *%s* does not exists\n\n", name);
ARM GAS /tmp/cczIN1cV.s page 29 ARM GAS /tmp/cc6OCjXR.s page 29
1088 .loc 1 318 3 is_stmt 1 view .LVU282 1088 .loc 1 318 3 is_stmt 1 view .LVU282
@ -1738,7 +1738,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
376:Src/File_Handling.c **** 376:Src/File_Handling.c ****
377:Src/File_Handling.c **** /* Close file */ 377:Src/File_Handling.c **** /* Close file */
378:Src/File_Handling.c **** fresult = f_close(&fil); 378:Src/File_Handling.c **** fresult = f_close(&fil);
ARM GAS /tmp/cczIN1cV.s page 30 ARM GAS /tmp/cc6OCjXR.s page 30
379:Src/File_Handling.c **** if (fresult != FR_OK) 379:Src/File_Handling.c **** if (fresult != FR_OK)
@ -1798,7 +1798,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1141 .loc 1 336 14 view .LVU296 1141 .loc 1 336 14 view .LVU296
1142 .LBE17: 1142 .LBE17:
353:Src/File_Handling.c **** if (fresult != FR_OK) 353:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cczIN1cV.s page 31 ARM GAS /tmp/cc6OCjXR.s page 31
1143 .loc 1 353 3 is_stmt 1 view .LVU297 1143 .loc 1 353 3 is_stmt 1 view .LVU297
@ -1858,7 +1858,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1180 00b6 BA70 strb r2, [r7, #2] 1180 00b6 BA70 strb r2, [r7, #2]
374:Src/File_Handling.c **** } 374:Src/File_Handling.c **** }
1181 .loc 1 374 5 is_stmt 1 view .LVU315 1181 .loc 1 374 5 is_stmt 1 view .LVU315
ARM GAS /tmp/cczIN1cV.s page 32 ARM GAS /tmp/cc6OCjXR.s page 32
374:Src/File_Handling.c **** } 374:Src/File_Handling.c **** }
@ -1918,7 +1918,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1222 .loc 1 394 13 is_stmt 0 view .LVU329 1222 .loc 1 394 13 is_stmt 0 view .LVU329
1223 00e2 0F4B ldr r3, .L70+4 1223 00e2 0F4B ldr r3, .L70+4
1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2 1224 00e4 1878 ldrb r0, [r3] @ zero_extendqisi2
ARM GAS /tmp/cczIN1cV.s page 33 ARM GAS /tmp/cc6OCjXR.s page 33
1225 00e6 C2E7 b .L59 1225 00e6 C2E7 b .L59
@ -1978,7 +1978,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1271 011c 00000000 .word fno 1271 011c 00000000 .word fno
1272 0120 00000000 .word fresult 1272 0120 00000000 .word fresult
1273 0124 00000000 .word fil 1273 0124 00000000 .word fil
ARM GAS /tmp/cczIN1cV.s page 34 ARM GAS /tmp/cc6OCjXR.s page 34
1274 0128 00000000 .word .LC10 1274 0128 00000000 .word .LC10
@ -2038,7 +2038,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1320 .loc 1 406 3 view .LVU346 1320 .loc 1 406 3 view .LVU346
407:Src/File_Handling.c **** return fresult; 407:Src/File_Handling.c **** return fresult;
1321 .loc 1 407 6 view .LVU347 1321 .loc 1 407 6 view .LVU347
ARM GAS /tmp/cczIN1cV.s page 35 ARM GAS /tmp/cc6OCjXR.s page 35
1322 .loc 1 407 13 is_stmt 0 view .LVU348 1322 .loc 1 407 13 is_stmt 0 view .LVU348
@ -2098,7 +2098,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1336 .LVL141: 1336 .LVL141:
411:Src/File_Handling.c **** if (fresult != FR_OK) 411:Src/File_Handling.c **** if (fresult != FR_OK)
1337 .loc 1 411 11 discriminator 1 view .LVU352 1337 .loc 1 411 11 discriminator 1 view .LVU352
ARM GAS /tmp/cczIN1cV.s page 36 ARM GAS /tmp/cc6OCjXR.s page 36
1338 001e 074B ldr r3, .L77+4 1338 001e 074B ldr r3, .L77+4
@ -2158,7 +2158,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1376 .LFE1195: 1376 .LFE1195:
1378 .section .text.Update_File,"ax",%progbits 1378 .section .text.Update_File,"ax",%progbits
1379 .align 1 1379 .align 1
ARM GAS /tmp/cczIN1cV.s page 37 ARM GAS /tmp/cc6OCjXR.s page 37
1380 .global Update_File 1380 .global Update_File
@ -2218,7 +2218,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1423 .loc 1 457 13 view .LVU381 1423 .loc 1 457 13 view .LVU381
1424 .LBE23: 1424 .LBE23:
458:Src/File_Handling.c **** } 458:Src/File_Handling.c **** }
ARM GAS /tmp/cczIN1cV.s page 38 ARM GAS /tmp/cc6OCjXR.s page 38
459:Src/File_Handling.c **** 459:Src/File_Handling.c ****
@ -2278,7 +2278,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1428 .L80: 1428 .L80:
463:Src/File_Handling.c **** if (fresult != FR_OK) 463:Src/File_Handling.c **** if (fresult != FR_OK)
1429 .loc 1 463 6 is_stmt 1 view .LVU383 1429 .loc 1 463 6 is_stmt 1 view .LVU383
ARM GAS /tmp/cczIN1cV.s page 39 ARM GAS /tmp/cc6OCjXR.s page 39
463:Src/File_Handling.c **** if (fresult != FR_OK) 463:Src/File_Handling.c **** if (fresult != FR_OK)
@ -2338,7 +2338,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name); 485:Src/File_Handling.c **** //sprintf (buf, "*%s* UPDATED successfully\n", name);
1470 .loc 1 485 7 view .LVU398 1470 .loc 1 485 7 view .LVU398
488:Src/File_Handling.c **** } 488:Src/File_Handling.c **** }
ARM GAS /tmp/cczIN1cV.s page 40 ARM GAS /tmp/cc6OCjXR.s page 40
1471 .loc 1 488 7 view .LVU399 1471 .loc 1 488 7 view .LVU399
@ -2398,7 +2398,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1506 .section .text.Remove_File,"ax",%progbits 1506 .section .text.Remove_File,"ax",%progbits
1507 .align 1 1507 .align 1
1508 .global Remove_File 1508 .global Remove_File
ARM GAS /tmp/cczIN1cV.s page 41 ARM GAS /tmp/cc6OCjXR.s page 41
1509 .syntax unified 1509 .syntax unified
@ -2458,7 +2458,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1547 0018 164B ldr r3, .L93+4 1547 0018 164B ldr r3, .L93+4
1548 001a 1870 strb r0, [r3] 1548 001a 1870 strb r0, [r3]
527:Src/File_Handling.c **** if (fresult == FR_OK) 527:Src/File_Handling.c **** if (fresult == FR_OK)
ARM GAS /tmp/cczIN1cV.s page 42 ARM GAS /tmp/cc6OCjXR.s page 42
1549 .loc 1 527 3 is_stmt 1 view .LVU418 1549 .loc 1 527 3 is_stmt 1 view .LVU418
@ -2518,7 +2518,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1584 .loc 1 517 15 is_stmt 0 view .LVU430 1584 .loc 1 517 15 is_stmt 0 view .LVU430
1585 003a 6420 movs r0, #100 1585 003a 6420 movs r0, #100
1586 003c FFF7FEFF bl malloc 1586 003c FFF7FEFF bl malloc
ARM GAS /tmp/cczIN1cV.s page 43 ARM GAS /tmp/cc6OCjXR.s page 43
1587 .LVL161: 1587 .LVL161:
@ -2578,7 +2578,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1630 .align 2 1630 .align 2
1631 .L93: 1631 .L93:
1632 0070 00000000 .word fno 1632 0070 00000000 .word fno
ARM GAS /tmp/cczIN1cV.s page 44 ARM GAS /tmp/cc6OCjXR.s page 44
1633 0074 00000000 .word fresult 1633 0074 00000000 .word fresult
@ -2638,7 +2638,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1677 000a 1870 strb r0, [r3] 1677 000a 1870 strb r0, [r3]
549:Src/File_Handling.c **** if (fresult == FR_OK) 549:Src/File_Handling.c **** if (fresult == FR_OK)
1678 .loc 1 549 5 is_stmt 1 view .LVU447 1678 .loc 1 549 5 is_stmt 1 view .LVU447
ARM GAS /tmp/cczIN1cV.s page 45 ARM GAS /tmp/cc6OCjXR.s page 45
1679 .loc 1 549 8 is_stmt 0 view .LVU448 1679 .loc 1 549 8 is_stmt 0 view .LVU448
@ -2698,7 +2698,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1716 .LVL177: 1716 .LVL177:
1717 0032 0646 mov r6, r0 1717 0032 0646 mov r6, r0
1718 .LVL178: 1718 .LVL178:
ARM GAS /tmp/cczIN1cV.s page 46 ARM GAS /tmp/cc6OCjXR.s page 46
559:Src/File_Handling.c **** Send_Uart(buf); 559:Src/File_Handling.c **** Send_Uart(buf);
@ -2758,7 +2758,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1761 .cfi_startproc 1761 .cfi_startproc
1762 @ args = 0, pretend = 0, frame = 0 1762 @ args = 0, pretend = 0, frame = 0
1763 @ frame_needed = 0, uses_anonymous_args = 0 1763 @ frame_needed = 0, uses_anonymous_args = 0
ARM GAS /tmp/cczIN1cV.s page 47 ARM GAS /tmp/cc6OCjXR.s page 47
1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr} 1764 0000 F8B5 push {r3, r4, r5, r6, r7, lr}
@ -2818,7 +2818,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1813 .LVL183: 1813 .LVL183:
573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total); 573:Src/File_Handling.c **** sprintf (buf, "SD CARD Total Size: \t%lu\n",total);
1814 .loc 1 573 5 is_stmt 1 view .LVU475 1814 .loc 1 573 5 is_stmt 1 view .LVU475
ARM GAS /tmp/cczIN1cV.s page 48 ARM GAS /tmp/cc6OCjXR.s page 48
1815 0046 2246 mov r2, r4 1815 0046 2246 mov r2, r4
@ -2878,7 +2878,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1861 .cfi_restore 80 1861 .cfi_restore 80
1862 .cfi_restore 81 1862 .cfi_restore 81
1863 .cfi_def_cfa_offset 24 1863 .cfi_def_cfa_offset 24
ARM GAS /tmp/cczIN1cV.s page 49 ARM GAS /tmp/cc6OCjXR.s page 49
1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc} 1864 0092 F8BD pop {r3, r4, r5, r6, r7, pc}
@ -2938,7 +2938,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1915 000e 104B ldr r3, .L110+4 1915 000e 104B ldr r3, .L110+4
1916 0010 1870 strb r0, [r3] 1916 0010 1870 strb r0, [r3]
587:Src/File_Handling.c **** if (fresult != FR_OK) 587:Src/File_Handling.c **** if (fresult != FR_OK)
ARM GAS /tmp/cczIN1cV.s page 50 ARM GAS /tmp/cc6OCjXR.s page 50
1917 .loc 1 587 2 is_stmt 1 view .LVU497 1917 .loc 1 587 2 is_stmt 1 view .LVU497
@ -2998,7 +2998,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
629:Src/File_Handling.c **** if (fresult != FR_OK) 629:Src/File_Handling.c **** if (fresult != FR_OK)
630:Src/File_Handling.c **** { 630:Src/File_Handling.c **** {
631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char)); 631:Src/File_Handling.c **** char *buf = malloc(100*sizeof(char));
ARM GAS /tmp/cczIN1cV.s page 51 ARM GAS /tmp/cc6OCjXR.s page 51
632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name); 632:Src/File_Handling.c **** //sprintf (buf, "ERROR!!! No. %d in closing file *%s*\n\n", fresult, name);
@ -3058,7 +3058,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
1959 002e 0A4B ldr r3, .L110+12 1959 002e 0A4B ldr r3, .L110+12
1960 0030 3246 mov r2, r6 1960 0030 3246 mov r2, r6
1961 0032 2946 mov r1, r5 1961 0032 2946 mov r1, r5
ARM GAS /tmp/cczIN1cV.s page 52 ARM GAS /tmp/cc6OCjXR.s page 52
1962 0034 3846 mov r0, r7 1962 0034 3846 mov r0, r7
@ -3118,7 +3118,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
2005 .LVL200: 2005 .LVL200:
2006 .LFB1201: 2006 .LFB1201:
646:Src/File_Handling.c **** 646:Src/File_Handling.c ****
ARM GAS /tmp/cczIN1cV.s page 53 ARM GAS /tmp/cc6OCjXR.s page 53
647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize) 647:Src/File_Handling.c **** FRESULT Update_File_byte (char *name, uint8_t *data, unsigned int bytesize)
@ -3178,7 +3178,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
661:Src/File_Handling.c **** { 661:Src/File_Handling.c **** {
662:Src/File_Handling.c **** /* Create a file with read write access and open it */ 662:Src/File_Handling.c **** /* Create a file with read write access and open it */
663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE); 663:Src/File_Handling.c **** fresult = f_open(&fil, name, FA_OPEN_APPEND | FA_WRITE);
ARM GAS /tmp/cczIN1cV.s page 54 ARM GAS /tmp/cc6OCjXR.s page 54
664:Src/File_Handling.c **** if (fresult != FR_OK) 664:Src/File_Handling.c **** if (fresult != FR_OK)
@ -3238,7 +3238,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
2053 0018 3222 movs r2, #50 2053 0018 3222 movs r2, #50
2054 001a 2146 mov r1, r4 2054 001a 2146 mov r1, r4
2055 001c 0D48 ldr r0, .L117+8 2055 001c 0D48 ldr r0, .L117+8
ARM GAS /tmp/cczIN1cV.s page 55 ARM GAS /tmp/cc6OCjXR.s page 55
2056 001e FFF7FEFF bl f_open 2056 001e FFF7FEFF bl f_open
@ -3298,7 +3298,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
2094 .LVL208: 2094 .LVL208:
692:Src/File_Handling.c **** if (fresult != FR_OK) 692:Src/File_Handling.c **** if (fresult != FR_OK)
2095 .loc 1 692 14 discriminator 1 view .LVU561 2095 .loc 1 692 14 discriminator 1 view .LVU561
ARM GAS /tmp/cczIN1cV.s page 56 ARM GAS /tmp/cc6OCjXR.s page 56
2096 0044 2070 strb r0, [r4] 2096 0044 2070 strb r0, [r4]
@ -3358,7 +3358,7 @@ ARM GAS /tmp/cczIN1cV.s page 1
2158 .align 2 2158 .align 2
2161 fno: 2161 fno:
2162 0000 00000000 .space 24 2162 0000 00000000 .space 24
ARM GAS /tmp/cczIN1cV.s page 57 ARM GAS /tmp/cc6OCjXR.s page 57
2162 00000000 2162 00000000
@ -3396,86 +3396,86 @@ ARM GAS /tmp/cczIN1cV.s page 1
2187 .file 10 "/usr/include/newlib/stdio.h" 2187 .file 10 "/usr/include/newlib/stdio.h"
2188 .file 11 "/usr/include/newlib/stdlib.h" 2188 .file 11 "/usr/include/newlib/stdlib.h"
2189 .file 12 "<built-in>" 2189 .file 12 "<built-in>"
ARM GAS /tmp/cczIN1cV.s page 58 ARM GAS /tmp/cc6OCjXR.s page 58
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 File_Handling.c *ABS*:00000000 File_Handling.c
/tmp/cczIN1cV.s:20 .text.Send_Uart:00000000 $t /tmp/cc6OCjXR.s:20 .text.Send_Uart:00000000 $t
/tmp/cczIN1cV.s:26 .text.Send_Uart:00000000 Send_Uart /tmp/cc6OCjXR.s:26 .text.Send_Uart:00000000 Send_Uart
/tmp/cczIN1cV.s:40 .text.Mount_SD:00000000 $t /tmp/cc6OCjXR.s:40 .text.Mount_SD:00000000 $t
/tmp/cczIN1cV.s:46 .text.Mount_SD:00000000 Mount_SD /tmp/cc6OCjXR.s:46 .text.Mount_SD:00000000 Mount_SD
/tmp/cczIN1cV.s:86 .text.Mount_SD:0000001c $d /tmp/cc6OCjXR.s:86 .text.Mount_SD:0000001c $d
/tmp/cczIN1cV.s:2175 .bss.fs:00000000 fs /tmp/cc6OCjXR.s:2175 .bss.fs:00000000 fs
/tmp/cczIN1cV.s:92 .text.Unmount_SD:00000000 $t /tmp/cc6OCjXR.s:92 .text.Unmount_SD:00000000 $t
/tmp/cczIN1cV.s:98 .text.Unmount_SD:00000000 Unmount_SD /tmp/cc6OCjXR.s:98 .text.Unmount_SD:00000000 Unmount_SD
/tmp/cczIN1cV.s:138 .text.Unmount_SD:0000001c $d /tmp/cc6OCjXR.s:138 .text.Unmount_SD:0000001c $d
/tmp/cczIN1cV.s:143 .rodata.Scan_SD.str1.4:00000000 $d /tmp/cc6OCjXR.s:143 .rodata.Scan_SD.str1.4:00000000 $d
/tmp/cczIN1cV.s:156 .text.Scan_SD:00000000 $t /tmp/cc6OCjXR.s:156 .text.Scan_SD:00000000 $t
/tmp/cczIN1cV.s:162 .text.Scan_SD:00000000 Scan_SD /tmp/cc6OCjXR.s:162 .text.Scan_SD:00000000 Scan_SD
/tmp/cczIN1cV.s:344 .text.Scan_SD:000000b8 $d /tmp/cc6OCjXR.s:344 .text.Scan_SD:000000b8 $d
/tmp/cczIN1cV.s:2161 .bss.fno:00000000 fno /tmp/cc6OCjXR.s:2161 .bss.fno:00000000 fno
/tmp/cczIN1cV.s:355 .rodata.Format_SD.str1.4:00000000 $d /tmp/cc6OCjXR.s:355 .rodata.Format_SD.str1.4:00000000 $d
/tmp/cczIN1cV.s:359 .text.Format_SD:00000000 $t /tmp/cc6OCjXR.s:359 .text.Format_SD:00000000 $t
/tmp/cczIN1cV.s:365 .text.Format_SD:00000000 Format_SD /tmp/cc6OCjXR.s:365 .text.Format_SD:00000000 Format_SD
/tmp/cczIN1cV.s:485 .text.Format_SD:00000078 $d /tmp/cc6OCjXR.s:485 .text.Format_SD:00000078 $d
/tmp/cczIN1cV.s:494 .text.Write_File:00000000 $t /tmp/cc6OCjXR.s:494 .text.Write_File:00000000 $t
/tmp/cczIN1cV.s:500 .text.Write_File:00000000 Write_File /tmp/cc6OCjXR.s:500 .text.Write_File:00000000 Write_File
/tmp/cczIN1cV.s:604 .text.Write_File:00000050 $d /tmp/cc6OCjXR.s:604 .text.Write_File:00000050 $d
/tmp/cczIN1cV.s:2168 .bss.fil:00000000 fil /tmp/cc6OCjXR.s:2168 .bss.fil:00000000 fil
/tmp/cczIN1cV.s:2147 .bss.bw:00000000 bw /tmp/cc6OCjXR.s:2147 .bss.bw:00000000 bw
/tmp/cczIN1cV.s:612 .text.Write_File_byte:00000000 $t /tmp/cc6OCjXR.s:612 .text.Write_File_byte:00000000 $t
/tmp/cczIN1cV.s:618 .text.Write_File_byte:00000000 Write_File_byte /tmp/cc6OCjXR.s:618 .text.Write_File_byte:00000000 Write_File_byte
/tmp/cczIN1cV.s:721 .text.Write_File_byte:0000004c $d /tmp/cc6OCjXR.s:721 .text.Write_File_byte:0000004c $d
/tmp/cczIN1cV.s:729 .rodata.Read_File.str1.4:00000000 $d /tmp/cc6OCjXR.s:729 .rodata.Read_File.str1.4:00000000 $d
/tmp/cczIN1cV.s:745 .text.Read_File:00000000 $t /tmp/cc6OCjXR.s:745 .text.Read_File:00000000 $t
/tmp/cczIN1cV.s:751 .text.Read_File:00000000 Read_File /tmp/cc6OCjXR.s:751 .text.Read_File:00000000 Read_File
/tmp/cczIN1cV.s:976 .text.Read_File:000000e4 $d /tmp/cc6OCjXR.s:976 .text.Read_File:000000e4 $d
/tmp/cczIN1cV.s:2154 .bss.br:00000000 br /tmp/cc6OCjXR.s:2154 .bss.br:00000000 br
/tmp/cczIN1cV.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d /tmp/cc6OCjXR.s:991 .rodata.Seek_Read_File.str1.4:00000000 $d
/tmp/cczIN1cV.s:995 .text.Seek_Read_File:00000000 $t /tmp/cc6OCjXR.s:995 .text.Seek_Read_File:00000000 $t
/tmp/cczIN1cV.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File /tmp/cc6OCjXR.s:1001 .text.Seek_Read_File:00000000 Seek_Read_File
/tmp/cczIN1cV.s:1271 .text.Seek_Read_File:0000011c $d /tmp/cc6OCjXR.s:1271 .text.Seek_Read_File:0000011c $d
/tmp/cczIN1cV.s:1287 .text.Create_File:00000000 $t /tmp/cc6OCjXR.s:1287 .text.Create_File:00000000 $t
/tmp/cczIN1cV.s:1293 .text.Create_File:00000000 Create_File /tmp/cc6OCjXR.s:1293 .text.Create_File:00000000 Create_File
/tmp/cczIN1cV.s:1372 .text.Create_File:00000038 $d /tmp/cc6OCjXR.s:1372 .text.Create_File:00000038 $d
/tmp/cczIN1cV.s:1379 .text.Update_File:00000000 $t /tmp/cc6OCjXR.s:1379 .text.Update_File:00000000 $t
/tmp/cczIN1cV.s:1385 .text.Update_File:00000000 Update_File /tmp/cc6OCjXR.s:1385 .text.Update_File:00000000 Update_File
/tmp/cczIN1cV.s:1489 .text.Update_File:00000050 $d /tmp/cc6OCjXR.s:1489 .text.Update_File:00000050 $d
/tmp/cczIN1cV.s:1497 .rodata.Remove_File.str1.4:00000000 $d /tmp/cc6OCjXR.s:1497 .rodata.Remove_File.str1.4:00000000 $d
/tmp/cczIN1cV.s:1507 .text.Remove_File:00000000 $t /tmp/cc6OCjXR.s:1507 .text.Remove_File:00000000 $t
/tmp/cczIN1cV.s:1513 .text.Remove_File:00000000 Remove_File /tmp/cc6OCjXR.s:1513 .text.Remove_File:00000000 Remove_File
/tmp/cczIN1cV.s:1632 .text.Remove_File:00000070 $d /tmp/cc6OCjXR.s:1632 .text.Remove_File:00000070 $d
/tmp/cczIN1cV.s:1642 .rodata.Create_Dir.str1.4:00000000 $d /tmp/cc6OCjXR.s:1642 .rodata.Create_Dir.str1.4:00000000 $d
/tmp/cczIN1cV.s:1649 .text.Create_Dir:00000000 $t /tmp/cc6OCjXR.s:1649 .text.Create_Dir:00000000 $t
/tmp/cczIN1cV.s:1655 .text.Create_Dir:00000000 Create_Dir /tmp/cc6OCjXR.s:1655 .text.Create_Dir:00000000 Create_Dir
/tmp/cczIN1cV.s:1734 .text.Create_Dir:00000048 $d /tmp/cc6OCjXR.s:1734 .text.Create_Dir:00000048 $d
/tmp/cczIN1cV.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d /tmp/cc6OCjXR.s:1742 .rodata.Check_SD_Space.str1.4:00000000 $d
/tmp/cczIN1cV.s:1752 .text.Check_SD_Space:00000000 $t /tmp/cc6OCjXR.s:1752 .text.Check_SD_Space:00000000 $t
/tmp/cczIN1cV.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space /tmp/cc6OCjXR.s:1758 .text.Check_SD_Space:00000000 Check_SD_Space
/tmp/cczIN1cV.s:1870 .text.Check_SD_Space:00000094 $d /tmp/cc6OCjXR.s:1870 .text.Check_SD_Space:00000094 $d
/tmp/cczIN1cV.s:2140 .bss.pfs:00000000 pfs /tmp/cc6OCjXR.s:2140 .bss.pfs:00000000 pfs
/tmp/cczIN1cV.s:2133 .bss.fre_clust:00000000 fre_clust /tmp/cc6OCjXR.s:2133 .bss.fre_clust:00000000 fre_clust
ARM GAS /tmp/cczIN1cV.s page 59 ARM GAS /tmp/cc6OCjXR.s page 59
/tmp/cczIN1cV.s:2126 .bss.total:00000000 total /tmp/cc6OCjXR.s:2126 .bss.total:00000000 total
/tmp/cczIN1cV.s:2119 .bss.free_space:00000000 free_space /tmp/cc6OCjXR.s:2119 .bss.free_space:00000000 free_space
/tmp/cczIN1cV.s:1881 .text.Update_File_float:00000000 $t /tmp/cc6OCjXR.s:1881 .text.Update_File_float:00000000 $t
/tmp/cczIN1cV.s:1887 .text.Update_File_float:00000000 Update_File_float /tmp/cc6OCjXR.s:1887 .text.Update_File_float:00000000 Update_File_float
/tmp/cczIN1cV.s:1990 .text.Update_File_float:0000004c $d /tmp/cc6OCjXR.s:1990 .text.Update_File_float:0000004c $d
/tmp/cczIN1cV.s:1998 .text.Update_File_byte:00000000 $t /tmp/cc6OCjXR.s:1998 .text.Update_File_byte:00000000 $t
/tmp/cczIN1cV.s:2004 .text.Update_File_byte:00000000 Update_File_byte /tmp/cc6OCjXR.s:2004 .text.Update_File_byte:00000000 Update_File_byte
/tmp/cczIN1cV.s:2107 .text.Update_File_byte:0000004c $d /tmp/cc6OCjXR.s:2107 .text.Update_File_byte:0000004c $d
/tmp/cczIN1cV.s:2116 .bss.free_space:00000000 $d /tmp/cc6OCjXR.s:2116 .bss.free_space:00000000 $d
/tmp/cczIN1cV.s:2123 .bss.total:00000000 $d /tmp/cc6OCjXR.s:2123 .bss.total:00000000 $d
/tmp/cczIN1cV.s:2130 .bss.fre_clust:00000000 $d /tmp/cc6OCjXR.s:2130 .bss.fre_clust:00000000 $d
/tmp/cczIN1cV.s:2137 .bss.pfs:00000000 $d /tmp/cc6OCjXR.s:2137 .bss.pfs:00000000 $d
/tmp/cczIN1cV.s:2144 .bss.bw:00000000 $d /tmp/cc6OCjXR.s:2144 .bss.bw:00000000 $d
/tmp/cczIN1cV.s:2151 .bss.br:00000000 $d /tmp/cc6OCjXR.s:2151 .bss.br:00000000 $d
/tmp/cczIN1cV.s:2158 .bss.fno:00000000 $d /tmp/cc6OCjXR.s:2158 .bss.fno:00000000 $d
/tmp/cczIN1cV.s:2165 .bss.fil:00000000 $d /tmp/cc6OCjXR.s:2165 .bss.fil:00000000 $d
/tmp/cczIN1cV.s:2172 .bss.fs:00000000 $d /tmp/cc6OCjXR.s:2172 .bss.fs:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
f_mount f_mount

BIN
build/For_stm32.bin
View File

Binary file not shown.

BIN
build/For_stm32.elf
View File

Binary file not shown.

5331
build/For_stm32.hex
View File

File diff suppressed because it is too large Load Diff

2210
build/For_stm32.map
View File

File diff suppressed because it is too large Load Diff

52
build/diskio.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cckyLcZT.s page 1 ARM GAS /tmp/ccdXV1P2.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/ 28:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private function prototypes -----------------------------------------------*/
29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/ 29:Middlewares/Third_Party/FatFs/src/diskio.c **** /* Private functions ---------------------------------------------------------*/
30:Middlewares/Third_Party/FatFs/src/diskio.c **** 30:Middlewares/Third_Party/FatFs/src/diskio.c ****
ARM GAS /tmp/cckyLcZT.s page 2 ARM GAS /tmp/ccdXV1P2.s page 2
31:Middlewares/Third_Party/FatFs/src/diskio.c **** /** 31:Middlewares/Third_Party/FatFs/src/diskio.c **** /**
@ -118,7 +118,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
71 disk_initialize: 71 disk_initialize:
72 .LVL3: 72 .LVL3:
73 .LFB1184: 73 .LFB1184:
ARM GAS /tmp/cckyLcZT.s page 3 ARM GAS /tmp/ccdXV1P2.s page 3
45:Middlewares/Third_Party/FatFs/src/diskio.c **** 45:Middlewares/Third_Party/FatFs/src/diskio.c ****
@ -178,7 +178,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat; 62:Middlewares/Third_Party/FatFs/src/diskio.c **** return stat;
111 .loc 1 62 3 is_stmt 1 view .LVU23 111 .loc 1 62 3 is_stmt 1 view .LVU23
63:Middlewares/Third_Party/FatFs/src/diskio.c **** } 63:Middlewares/Third_Party/FatFs/src/diskio.c **** }
ARM GAS /tmp/cckyLcZT.s page 4 ARM GAS /tmp/ccdXV1P2.s page 4
112 .loc 1 63 1 is_stmt 0 view .LVU24 112 .loc 1 63 1 is_stmt 0 view .LVU24
@ -238,7 +238,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res; 80:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT res;
150 .loc 1 80 3 is_stmt 1 view .LVU29 150 .loc 1 80 3 is_stmt 1 view .LVU29
81:Middlewares/Third_Party/FatFs/src/diskio.c **** 81:Middlewares/Third_Party/FatFs/src/diskio.c ****
ARM GAS /tmp/cckyLcZT.s page 5 ARM GAS /tmp/ccdXV1P2.s page 5
82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count); 82:Middlewares/Third_Party/FatFs/src/diskio.c **** res = disk.drv[pdrv]->disk_read(disk.lun[pdrv], buff, sector, count);
@ -298,7 +298,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
187 @ args = 0, pretend = 0, frame = 0 187 @ args = 0, pretend = 0, frame = 0
188 @ frame_needed = 0, uses_anonymous_args = 0 188 @ frame_needed = 0, uses_anonymous_args = 0
189 .loc 1 101 1 is_stmt 0 view .LVU38 189 .loc 1 101 1 is_stmt 0 view .LVU38
ARM GAS /tmp/cckyLcZT.s page 6 ARM GAS /tmp/ccdXV1P2.s page 6
190 0000 38B5 push {r3, r4, r5, lr} 190 0000 38B5 push {r3, r4, r5, lr}
@ -358,7 +358,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1 116:Middlewares/Third_Party/FatFs/src/diskio.c **** #if _USE_IOCTL == 1
117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl ( 117:Middlewares/Third_Party/FatFs/src/diskio.c **** DRESULT disk_ioctl (
118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */ 118:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE pdrv, /* Physical drive nmuber (0..) */
ARM GAS /tmp/cckyLcZT.s page 7 ARM GAS /tmp/ccdXV1P2.s page 7
119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */ 119:Middlewares/Third_Party/FatFs/src/diskio.c **** BYTE cmd, /* Control code */
@ -418,7 +418,7 @@ ARM GAS /tmp/cckyLcZT.s page 1
131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC 131:Middlewares/Third_Party/FatFs/src/diskio.c **** * @brief Gets Time from RTC
132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None 132:Middlewares/Third_Party/FatFs/src/diskio.c **** * @param None
133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD 133:Middlewares/Third_Party/FatFs/src/diskio.c **** * @retval Time in DWORD
ARM GAS /tmp/cckyLcZT.s page 8 ARM GAS /tmp/ccdXV1P2.s page 8
134:Middlewares/Third_Party/FatFs/src/diskio.c **** */ 134:Middlewares/Third_Party/FatFs/src/diskio.c **** */
@ -446,28 +446,28 @@ ARM GAS /tmp/cckyLcZT.s page 1
294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 294 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 295 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 296 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
ARM GAS /tmp/cckyLcZT.s page 9 ARM GAS /tmp/ccdXV1P2.s page 9
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 diskio.c *ABS*:00000000 diskio.c
/tmp/cckyLcZT.s:20 .text.disk_status:00000000 $t /tmp/ccdXV1P2.s:20 .text.disk_status:00000000 $t
/tmp/cckyLcZT.s:26 .text.disk_status:00000000 disk_status /tmp/ccdXV1P2.s:26 .text.disk_status:00000000 disk_status
/tmp/cckyLcZT.s:60 .text.disk_status:00000014 $d /tmp/ccdXV1P2.s:60 .text.disk_status:00000014 $d
/tmp/cckyLcZT.s:65 .text.disk_initialize:00000000 $t /tmp/ccdXV1P2.s:65 .text.disk_initialize:00000000 $t
/tmp/cckyLcZT.s:71 .text.disk_initialize:00000000 disk_initialize /tmp/ccdXV1P2.s:71 .text.disk_initialize:00000000 disk_initialize
/tmp/cckyLcZT.s:124 .text.disk_initialize:00000024 $d /tmp/ccdXV1P2.s:124 .text.disk_initialize:00000024 $d
/tmp/cckyLcZT.s:129 .text.disk_read:00000000 $t /tmp/ccdXV1P2.s:129 .text.disk_read:00000000 $t
/tmp/cckyLcZT.s:135 .text.disk_read:00000000 disk_read /tmp/ccdXV1P2.s:135 .text.disk_read:00000000 disk_read
/tmp/cckyLcZT.s:171 .text.disk_read:00000014 $d /tmp/ccdXV1P2.s:171 .text.disk_read:00000014 $d
/tmp/cckyLcZT.s:176 .text.disk_write:00000000 $t /tmp/ccdXV1P2.s:176 .text.disk_write:00000000 $t
/tmp/cckyLcZT.s:182 .text.disk_write:00000000 disk_write /tmp/ccdXV1P2.s:182 .text.disk_write:00000000 disk_write
/tmp/cckyLcZT.s:218 .text.disk_write:00000014 $d /tmp/ccdXV1P2.s:218 .text.disk_write:00000014 $d
/tmp/cckyLcZT.s:223 .text.disk_ioctl:00000000 $t /tmp/ccdXV1P2.s:223 .text.disk_ioctl:00000000 $t
/tmp/cckyLcZT.s:229 .text.disk_ioctl:00000000 disk_ioctl /tmp/ccdXV1P2.s:229 .text.disk_ioctl:00000000 disk_ioctl
/tmp/cckyLcZT.s:263 .text.disk_ioctl:00000014 $d /tmp/ccdXV1P2.s:263 .text.disk_ioctl:00000014 $d
/tmp/cckyLcZT.s:268 .text.get_fattime:00000000 $t /tmp/ccdXV1P2.s:268 .text.get_fattime:00000000 $t
/tmp/cckyLcZT.s:274 .text.get_fattime:00000000 get_fattime /tmp/ccdXV1P2.s:274 .text.get_fattime:00000000 get_fattime
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
disk disk

34
build/fatfs.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccFLcHcr.s page 1 ARM GAS /tmp/ccXTUOPr.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccFLcHcr.s page 1
29:Src/fatfs.c **** 29:Src/fatfs.c ****
30:Src/fatfs.c **** void MX_FATFS_Init(void) 30:Src/fatfs.c **** void MX_FATFS_Init(void)
31:Src/fatfs.c **** { 31:Src/fatfs.c **** {
ARM GAS /tmp/ccFLcHcr.s page 2 ARM GAS /tmp/ccXTUOPr.s page 2
28 .loc 1 31 1 view -0 28 .loc 1 31 1 view -0
@ -118,7 +118,7 @@ ARM GAS /tmp/ccFLcHcr.s page 1
69 @ frame_needed = 0, uses_anonymous_args = 0 69 @ frame_needed = 0, uses_anonymous_args = 0
70 @ link register save eliminated. 70 @ link register save eliminated.
47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */ 47:Src/fatfs.c **** /* USER CODE BEGIN get_fattime */
ARM GAS /tmp/ccFLcHcr.s page 3 ARM GAS /tmp/ccXTUOPr.s page 3
48:Src/fatfs.c **** return 0; 48:Src/fatfs.c **** return 0;
@ -169,24 +169,24 @@ ARM GAS /tmp/ccFLcHcr.s page 1
114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 114 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
115 .file 10 "Inc/sd_diskio.h" 115 .file 10 "Inc/sd_diskio.h"
116 .file 11 "Inc/fatfs.h" 116 .file 11 "Inc/fatfs.h"
ARM GAS /tmp/ccFLcHcr.s page 4 ARM GAS /tmp/ccXTUOPr.s page 4
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 fatfs.c *ABS*:00000000 fatfs.c
/tmp/ccFLcHcr.s:20 .text.MX_FATFS_Init:00000000 $t /tmp/ccXTUOPr.s:20 .text.MX_FATFS_Init:00000000 $t
/tmp/ccFLcHcr.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init /tmp/ccXTUOPr.s:26 .text.MX_FATFS_Init:00000000 MX_FATFS_Init
/tmp/ccFLcHcr.s:51 .text.MX_FATFS_Init:00000010 $d /tmp/ccXTUOPr.s:51 .text.MX_FATFS_Init:00000010 $d
/tmp/ccFLcHcr.s:97 .bss.SDPath:00000000 SDPath /tmp/ccXTUOPr.s:97 .bss.SDPath:00000000 SDPath
/tmp/ccFLcHcr.s:103 .bss.retSD:00000000 retSD /tmp/ccXTUOPr.s:103 .bss.retSD:00000000 retSD
/tmp/ccFLcHcr.s:58 .text.get_fattime:00000000 $t /tmp/ccXTUOPr.s:58 .text.get_fattime:00000000 $t
/tmp/ccFLcHcr.s:64 .text.get_fattime:00000000 get_fattime /tmp/ccXTUOPr.s:64 .text.get_fattime:00000000 get_fattime
/tmp/ccFLcHcr.s:83 .bss.SDFile:00000000 SDFile /tmp/ccXTUOPr.s:83 .bss.SDFile:00000000 SDFile
/tmp/ccFLcHcr.s:80 .bss.SDFile:00000000 $d /tmp/ccXTUOPr.s:80 .bss.SDFile:00000000 $d
/tmp/ccFLcHcr.s:90 .bss.SDFatFS:00000000 SDFatFS /tmp/ccXTUOPr.s:90 .bss.SDFatFS:00000000 SDFatFS
/tmp/ccFLcHcr.s:87 .bss.SDFatFS:00000000 $d /tmp/ccXTUOPr.s:87 .bss.SDFatFS:00000000 $d
/tmp/ccFLcHcr.s:94 .bss.SDPath:00000000 $d /tmp/ccXTUOPr.s:94 .bss.SDPath:00000000 $d
/tmp/ccFLcHcr.s:104 .bss.retSD:00000000 $d /tmp/ccXTUOPr.s:104 .bss.retSD:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
FATFS_LinkDriver FATFS_LinkDriver

1070
build/ff.lst
View File

File diff suppressed because it is too large Load Diff

48
build/ff_gen_drv.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccoeDKf8.s page 1 ARM GAS /tmp/ccaLv9j7.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** 28:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c ****
29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /** 29:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** /**
30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active 30:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * @brief Links a compatible diskio driver/lun id and increments the number of active
ARM GAS /tmp/ccoeDKf8.s page 2 ARM GAS /tmp/ccaLv9j7.s page 2
31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers. 31:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** * linked drivers.
@ -118,7 +118,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
64 .loc 1 48 5 is_stmt 1 view .LVU13 64 .loc 1 48 5 is_stmt 1 view .LVU13
65 .loc 1 48 18 is_stmt 0 view .LVU14 65 .loc 1 48 18 is_stmt 0 view .LVU14
66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2 66 002c 5C7A ldrb r4, [r3, #9] @ zero_extendqisi2
ARM GAS /tmp/ccoeDKf8.s page 3 ARM GAS /tmp/ccaLv9j7.s page 3
67 .LVL2: 67 .LVL2:
@ -178,7 +178,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0; 41:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** uint8_t DiskNum = 0;
111 .loc 1 41 11 view .LVU32 111 .loc 1 41 11 view .LVU32
112 004c 0120 movs r0, #1 112 004c 0120 movs r0, #1
ARM GAS /tmp/ccoeDKf8.s page 4 ARM GAS /tmp/ccaLv9j7.s page 4
113 .LVL10: 113 .LVL10:
@ -238,7 +238,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
156 .global FATFS_UnLinkDriverEx 156 .global FATFS_UnLinkDriverEx
157 .syntax unified 157 .syntax unified
158 .thumb 158 .thumb
ARM GAS /tmp/ccoeDKf8.s page 5 ARM GAS /tmp/ccaLv9j7.s page 5
159 .thumb_func 159 .thumb_func
@ -298,7 +298,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
195 .LVL15: 195 .LVL15:
196 .loc 1 90 25 view .LVU54 196 .loc 1 90 25 view .LVU54
197 001c 0020 movs r0, #0 197 001c 0020 movs r0, #0
ARM GAS /tmp/ccoeDKf8.s page 6 ARM GAS /tmp/ccaLv9j7.s page 6
198 .LVL16: 198 .LVL16:
@ -358,7 +358,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
242 .align 1 242 .align 1
243 .global FATFS_UnLinkDriver 243 .global FATFS_UnLinkDriver
244 .syntax unified 244 .syntax unified
ARM GAS /tmp/ccoeDKf8.s page 7 ARM GAS /tmp/ccaLv9j7.s page 7
245 .thumb 245 .thumb
@ -418,7 +418,7 @@ ARM GAS /tmp/ccoeDKf8.s page 1
283 @ frame_needed = 0, uses_anonymous_args = 0 283 @ frame_needed = 0, uses_anonymous_args = 0
284 @ link register save eliminated. 284 @ link register save eliminated.
118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr; 118:Middlewares/Third_Party/FatFs/src/ff_gen_drv.c **** return disk.nbr;
ARM GAS /tmp/ccoeDKf8.s page 8 ARM GAS /tmp/ccaLv9j7.s page 8
285 .loc 1 118 3 view .LVU75 285 .loc 1 118 3 view .LVU75
@ -450,25 +450,25 @@ ARM GAS /tmp/ccoeDKf8.s page 1
311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 311 .file 6 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 312 .file 7 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 313 .file 8 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
ARM GAS /tmp/ccoeDKf8.s page 9 ARM GAS /tmp/ccaLv9j7.s page 9
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 ff_gen_drv.c *ABS*:00000000 ff_gen_drv.c
/tmp/ccoeDKf8.s:20 .text.FATFS_LinkDriverEx:00000000 $t /tmp/ccaLv9j7.s:20 .text.FATFS_LinkDriverEx:00000000 $t
/tmp/ccoeDKf8.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx /tmp/ccaLv9j7.s:26 .text.FATFS_LinkDriverEx:00000000 FATFS_LinkDriverEx
/tmp/ccoeDKf8.s:120 .text.FATFS_LinkDriverEx:00000050 $d /tmp/ccaLv9j7.s:120 .text.FATFS_LinkDriverEx:00000050 $d
/tmp/ccoeDKf8.s:303 .bss.disk:00000000 disk /tmp/ccaLv9j7.s:303 .bss.disk:00000000 disk
/tmp/ccoeDKf8.s:125 .text.FATFS_LinkDriver:00000000 $t /tmp/ccaLv9j7.s:125 .text.FATFS_LinkDriver:00000000 $t
/tmp/ccoeDKf8.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver /tmp/ccaLv9j7.s:131 .text.FATFS_LinkDriver:00000000 FATFS_LinkDriver
/tmp/ccoeDKf8.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t /tmp/ccaLv9j7.s:155 .text.FATFS_UnLinkDriverEx:00000000 $t
/tmp/ccoeDKf8.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx /tmp/ccaLv9j7.s:161 .text.FATFS_UnLinkDriverEx:00000000 FATFS_UnLinkDriverEx
/tmp/ccoeDKf8.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d /tmp/ccaLv9j7.s:237 .text.FATFS_UnLinkDriverEx:00000038 $d
/tmp/ccoeDKf8.s:242 .text.FATFS_UnLinkDriver:00000000 $t /tmp/ccaLv9j7.s:242 .text.FATFS_UnLinkDriver:00000000 $t
/tmp/ccoeDKf8.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver /tmp/ccaLv9j7.s:248 .text.FATFS_UnLinkDriver:00000000 FATFS_UnLinkDriver
/tmp/ccoeDKf8.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t /tmp/ccaLv9j7.s:272 .text.FATFS_GetAttachedDriversNbr:00000000 $t
/tmp/ccoeDKf8.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr /tmp/ccaLv9j7.s:278 .text.FATFS_GetAttachedDriversNbr:00000000 FATFS_GetAttachedDriversNbr
/tmp/ccoeDKf8.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d /tmp/ccaLv9j7.s:294 .text.FATFS_GetAttachedDriversNbr:00000008 $d
/tmp/ccoeDKf8.s:300 .bss.disk:00000000 $d /tmp/ccaLv9j7.s:300 .bss.disk:00000000 $d
NO UNDEFINED SYMBOLS NO UNDEFINED SYMBOLS

42277
build/main.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/main.o
View File

Binary file not shown.

66
build/sd_diskio.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/cc8X4L5w.s page 1 ARM GAS /tmp/ccx8I3an.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -58,7 +58,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
29:Src/sd_diskio.c **** #include "sd_diskio.h" 29:Src/sd_diskio.c **** #include "sd_diskio.h"
30:Src/sd_diskio.c **** 30:Src/sd_diskio.c ****
31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/ 31:Src/sd_diskio.c **** /* Private typedef -----------------------------------------------------------*/
ARM GAS /tmp/cc8X4L5w.s page 2 ARM GAS /tmp/ccx8I3an.s page 2
32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/ 32:Src/sd_diskio.c **** /* Private define ------------------------------------------------------------*/
@ -118,7 +118,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */ 86:Src/sd_diskio.c **** /* USER CODE END beforeFunctionSection */
87:Src/sd_diskio.c **** 87:Src/sd_diskio.c ****
88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/ 88:Src/sd_diskio.c **** /* Private functions ---------------------------------------------------------*/
ARM GAS /tmp/cc8X4L5w.s page 3 ARM GAS /tmp/ccx8I3an.s page 3
89:Src/sd_diskio.c **** 89:Src/sd_diskio.c ****
@ -178,7 +178,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
71 .global SD_initialize 71 .global SD_initialize
72 .syntax unified 72 .syntax unified
73 .thumb 73 .thumb
ARM GAS /tmp/cc8X4L5w.s page 4 ARM GAS /tmp/ccx8I3an.s page 4
74 .thumb_func 74 .thumb_func
@ -238,7 +238,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
106 .loc 1 123 1 view .LVU21 106 .loc 1 123 1 view .LVU21
107 0014 10BD pop {r4, pc} 107 0014 10BD pop {r4, pc}
108 .LVL4: 108 .LVL4:
ARM GAS /tmp/cc8X4L5w.s page 5 ARM GAS /tmp/ccx8I3an.s page 5
109 .L9: 109 .L9:
@ -298,7 +298,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
152 .cfi_endproc 152 .cfi_endproc
153 .LFE1185: 153 .LFE1185:
155 .section .text.SD_read,"ax",%progbits 155 .section .text.SD_read,"ax",%progbits
ARM GAS /tmp/cc8X4L5w.s page 6 ARM GAS /tmp/ccx8I3an.s page 6
156 .align 1 156 .align 1
@ -358,7 +358,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
193 .L16: 193 .L16:
152:Src/sd_diskio.c **** (uint32_t) (sector), 152:Src/sd_diskio.c **** (uint32_t) (sector),
153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK) 153:Src/sd_diskio.c **** count, SD_TIMEOUT) == MSD_OK)
ARM GAS /tmp/cc8X4L5w.s page 7 ARM GAS /tmp/ccx8I3an.s page 7
154:Src/sd_diskio.c **** { 154:Src/sd_diskio.c **** {
@ -418,7 +418,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128) 173:Src/sd_diskio.c **** * @param count: Number of sectors to write (1..128)
174:Src/sd_diskio.c **** * @retval DRESULT: Operation result 174:Src/sd_diskio.c **** * @retval DRESULT: Operation result
175:Src/sd_diskio.c **** */ 175:Src/sd_diskio.c **** */
ARM GAS /tmp/cc8X4L5w.s page 8 ARM GAS /tmp/ccx8I3an.s page 8
176:Src/sd_diskio.c **** #if _USE_WRITE == 1 176:Src/sd_diskio.c **** #if _USE_WRITE == 1
@ -478,7 +478,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
264 001a FAD1 bne .L21 264 001a FAD1 bne .L21
265 .L20: 265 .L20:
266 .LVL24: 266 .LVL24:
ARM GAS /tmp/cc8X4L5w.s page 9 ARM GAS /tmp/ccx8I3an.s page 9
190:Src/sd_diskio.c **** res = RES_OK; 190:Src/sd_diskio.c **** res = RES_OK;
@ -538,7 +538,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
302 .cfi_def_cfa_offset 48 302 .cfi_def_cfa_offset 48
210:Src/sd_diskio.c **** DRESULT res = RES_ERROR; 210:Src/sd_diskio.c **** DRESULT res = RES_ERROR;
303 .loc 1 210 3 is_stmt 1 view .LVU64 303 .loc 1 210 3 is_stmt 1 view .LVU64
ARM GAS /tmp/cc8X4L5w.s page 10 ARM GAS /tmp/ccx8I3an.s page 10
304 .LVL27: 304 .LVL27:
@ -598,7 +598,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
341 002a 0DE0 b .L25 341 002a 0DE0 b .L25
342 .LVL31: 342 .LVL31:
343 .L28: 343 .L28:
ARM GAS /tmp/cc8X4L5w.s page 11 ARM GAS /tmp/ccx8I3an.s page 11
228:Src/sd_diskio.c **** 228:Src/sd_diskio.c ****
@ -658,7 +658,7 @@ ARM GAS /tmp/cc8X4L5w.s page 1
245:Src/sd_diskio.c **** } 245:Src/sd_diskio.c **** }
246:Src/sd_diskio.c **** 246:Src/sd_diskio.c ****
247:Src/sd_diskio.c **** return res; 247:Src/sd_diskio.c **** return res;
ARM GAS /tmp/cc8X4L5w.s page 12 ARM GAS /tmp/ccx8I3an.s page 12
248:Src/sd_diskio.c **** } 248:Src/sd_diskio.c **** }
@ -708,31 +708,31 @@ ARM GAS /tmp/cc8X4L5w.s page 1
427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h" 427 .file 9 "Middlewares/Third_Party/FatFs/src/ff_gen_drv.h"
428 .file 10 "Inc/bsp_driver_sd.h" 428 .file 10 "Inc/bsp_driver_sd.h"
429 .file 11 "Inc/sd_diskio.h" 429 .file 11 "Inc/sd_diskio.h"
ARM GAS /tmp/cc8X4L5w.s page 13 ARM GAS /tmp/ccx8I3an.s page 13
DEFINED SYMBOLS DEFINED SYMBOLS
*ABS*:00000000 sd_diskio.c *ABS*:00000000 sd_diskio.c
/tmp/cc8X4L5w.s:20 .text.SD_CheckStatus:00000000 $t /tmp/ccx8I3an.s:20 .text.SD_CheckStatus:00000000 $t
/tmp/cc8X4L5w.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus /tmp/ccx8I3an.s:25 .text.SD_CheckStatus:00000000 SD_CheckStatus
/tmp/cc8X4L5w.s:65 .text.SD_CheckStatus:00000020 $d /tmp/ccx8I3an.s:65 .text.SD_CheckStatus:00000020 $d
/tmp/cc8X4L5w.s:416 .data.Stat:00000000 Stat /tmp/ccx8I3an.s:416 .data.Stat:00000000 Stat
/tmp/cc8X4L5w.s:70 .text.SD_initialize:00000000 $t /tmp/ccx8I3an.s:70 .text.SD_initialize:00000000 $t
/tmp/cc8X4L5w.s:76 .text.SD_initialize:00000000 SD_initialize /tmp/ccx8I3an.s:76 .text.SD_initialize:00000000 SD_initialize
/tmp/cc8X4L5w.s:122 .text.SD_initialize:00000024 $d /tmp/ccx8I3an.s:122 .text.SD_initialize:00000024 $d
/tmp/cc8X4L5w.s:127 .text.SD_status:00000000 $t /tmp/ccx8I3an.s:127 .text.SD_status:00000000 $t
/tmp/cc8X4L5w.s:133 .text.SD_status:00000000 SD_status /tmp/ccx8I3an.s:133 .text.SD_status:00000000 SD_status
/tmp/cc8X4L5w.s:156 .text.SD_read:00000000 $t /tmp/ccx8I3an.s:156 .text.SD_read:00000000 $t
/tmp/cc8X4L5w.s:162 .text.SD_read:00000000 SD_read /tmp/ccx8I3an.s:162 .text.SD_read:00000000 SD_read
/tmp/cc8X4L5w.s:218 .text.SD_write:00000000 $t /tmp/ccx8I3an.s:218 .text.SD_write:00000000 $t
/tmp/cc8X4L5w.s:224 .text.SD_write:00000000 SD_write /tmp/ccx8I3an.s:224 .text.SD_write:00000000 SD_write
/tmp/cc8X4L5w.s:280 .text.SD_ioctl:00000000 $t /tmp/ccx8I3an.s:280 .text.SD_ioctl:00000000 $t
/tmp/cc8X4L5w.s:286 .text.SD_ioctl:00000000 SD_ioctl /tmp/ccx8I3an.s:286 .text.SD_ioctl:00000000 SD_ioctl
/tmp/cc8X4L5w.s:320 .text.SD_ioctl:00000018 $d /tmp/ccx8I3an.s:320 .text.SD_ioctl:00000018 $d
/tmp/cc8X4L5w.s:324 .text.SD_ioctl:0000001c $t /tmp/ccx8I3an.s:324 .text.SD_ioctl:0000001c $t
/tmp/cc8X4L5w.s:398 .text.SD_ioctl:00000054 $d /tmp/ccx8I3an.s:398 .text.SD_ioctl:00000054 $d
/tmp/cc8X4L5w.s:407 .rodata.SD_Driver:00000000 SD_Driver /tmp/ccx8I3an.s:407 .rodata.SD_Driver:00000000 SD_Driver
/tmp/cc8X4L5w.s:404 .rodata.SD_Driver:00000000 $d /tmp/ccx8I3an.s:404 .rodata.SD_Driver:00000000 $d
UNDEFINED SYMBOLS UNDEFINED SYMBOLS
BSP_SD_GetCardState BSP_SD_GetCardState

2167
build/stm32f7xx_hal_msp.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/stm32f7xx_hal_msp.o
View File

Binary file not shown.

3455
build/stm32f7xx_it.lst
View File

File diff suppressed because it is too large Load Diff

BIN
build/stm32f7xx_it.o
View File

Binary file not shown.

4
build/syscall.lst
View File

@ -1,4 +1,4 @@
ARM GAS /tmp/ccd6fn4Z.s page 1 ARM GAS /tmp/ccgATpUY.s page 1
1 .cpu cortex-m7 1 .cpu cortex-m7
@ -24,7 +24,7 @@ ARM GAS /tmp/ccd6fn4Z.s page 1
21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h" 21 .file 3 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_tim.h"
22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h" 22 .file 4 "Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_ll_rcc.h"
23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h" 23 .file 5 "/usr/lib/gcc/arm-none-eabi/13.2.1/include/stdint.h"
ARM GAS /tmp/ccd6fn4Z.s page 2 ARM GAS /tmp/ccgATpUY.s page 2
DEFINED SYMBOLS DEFINED SYMBOLS